Digital PDFs

EK-VS200-PS-PRE

November 1984

130 pages

Original

3.2MB

Document:	VAXstation I Service Guide
Order Number:	EK-VS200-PS
Revision:	PRE
Pages:	130
Original Filename:

OCR Text

EK-VS200-PS-PRE

•
I

VAXstation I

Service Guide

•

PRELIMINARY

••
PLEASE RETURN TO
LIB RARY
CRG / TELESUPPORT

•

VNO

I .

•

Prepared by Educational Services

of
Olgltal EQulpment Corporation
)

Preliminary, November 1984

Copyright Digital Equipment Corporation 1984
All Rights Reserved
Printed in U.S.A.
The material in this document is for informational purposes and
is subfect to change without notice; it should not be construed
as a commitment by Digitial Equipment Corporation.
Digital
Equipment Corporation assumes no responsibility for any errors
that may appear in this document.
NOTICE: The VAXstation I generates, uses, and may emit radio
frequency energy.
The equipment has been type tested and found
to comply with the limits for a Class A computing device pursuant
to Subpart J of Part 15 of FCC Rules, which are designed to
provide reasonable protection against such radio
frequency
interference
when
operated
in
a commercial environment.
Operation of this equipment in a residential area may cause
interference in which case the user at his own expense may be
required to take measures to correct the interference.

Book production was done by Educational Services Development
Publishing in Marlboro, MA.

and

The following are trademarks of Digital Equipment Corporation:

mamanmaTM
DEC
DECmate
DECsystem-10
DECSYSTEM'-20
DECUS
DECwr i ter··
DIBOL

/"'

;•l:
I•

MAS SB US
PDP
P/OS
Professional
Rainbow
ReGIS
RSTS
RSX
TOPS·lO

TOPS-20
UNIBUS
VAX
VAX.station
VMS
VT
Work Processor

______,,-

VAXstation I SERVICE GUIDE
CONTENTS
"---· .

PREFACE
CHAPTER l

SYSTEM CONFIGURATION

BACKPLANE
1.1
KD32·AB CPU
1.2
M7135-YA OAP
l. 2 .1
• .
Switches . . . • • . .
1.2.1.1
Microverify Jumper .
1.2.1.2
M7136 MCT Module • . . .
l. 2. 2
MSVll·QA MEMORY . . . . .
1.3
Switches • . • • • . . •
l. 3 .1
Jumpers • . • .
l. 3. 2
MASS STORAGE . . . . • . . . . . . .
l. 4
RQDXl Controller • • . • •
1. 4: l
Jumpers
1.4.1.l
RX50
Diskette Drive
1. 4 .2
RD52 Fixed-disk Drive
1.4.3
VCBOl VIDEO CONTROLLER •
1.5
Switches . . . • • . .
•
1.5.1
Memory Starting Address (MSA)
1.5.1.1
1.5.1.2
CSR Base Address • • • • • • • •
Display Density . • • . .
1.5.1.3
OPERATOR I/0 DEVICES • • . • • •
1.6
VRlOO Video Monitor
1.6 .1
LK201 Keyboard . . . . . . • •
1. 6. 2
VSlOX
Mouse . • • •
. • •
1.6.3
LASO
And
LAlOO
Printers
.
•
.
.
.
1. 6. 4
OPTION MODULES . . . • . . •
1.7
OEQNA Ethernet Controller
l. 7 .1
• • •
Jumpers
•.•.•..
1.7.1.l
DZVll Asynchronous Line Multiplexer
l. 7. 2
Switches And Jumpers . . . . . . .
1.7.2.l

CHAPTER 2

....

1-1
1-5
. .

l ·5

1-5
1-5
1·8
1-8
1·8

. 1-12
. 1·15
• 1-15
. 1-15
. 1-15
. 1·15
• 1-17
. 1-17
•• 1·17
. 1-18
1-18
. 1-19
. 1-19
. 1-20
. . 1-20
. 1·20
. 1-20
• • l • 20

. 1-20
1-22
• 1-22

PROGRAMMING INFORMATION

VCBOl REGISTERS . . • . . . . . .
2.1
Control And Status Register
2 .1.1
Cursor X Position
....
2 .1. 2
Mouse Position Register • . . . •
2 .1. 3
CRTC Registers . . . • •
• •.
2 .1. 4
CRTC Address Register Pointer
2.1.4.1
· CRTC Data Register . . . . . . .
2.1.4.2
Interrupt Controller Registers . .
2 .1. 5
2.1.S.l
I CDR . . .
. . · - · · .
iii

2-1
2-2

2-3
2-4
2-4
2-4
2-6
2-7
2. 7

vAXstation I SERVICE GUIDE
2.1.5.2
2.1.5.3
2.1.5.4
2.1.5.5
2.1.5.6
2.1.5.7
2 .l.6
2.1.6.1
2.1.6.2
2.1.6.3
2.1.6.4
2.1.6.5
2.1.6.6
2.1.6.7
2.1.6.8
2.1.6.9
CHAPTER 3

ICSR .
>RR

•

. • • • • •
•

•

• • • .
•

•

2-7

• 2• l 0

IMR . . • .
. • • • • .
• 2·10
ISR
• • • • • • • •
• 2·11
ACR
• 2·11
Mode •
• 2·11
UART Registers • • • • •
2·12
Mode Registers lA And 2A •
• • . 2-12
Mode Registers lB And 28 •
• • • . • 2·13
Status/Clock Select Register A •
2·13
Status/Clock Select Register B •
• 2·14
Command Register A • • • •
• ••.•• 2·15
Command Register 8 • • • • •
• 2·16
Transmit/Receive Buffer A • • •
• 2·16
Transmit/Receive Buffer B • • • • • • • 2·16
Interrupt Status/Mask Register •
• • 2·16
MAINTENANCE

MICRC~ERIFY
. . . • . • • • •
3.1
• • • • • 3 -1
Microverify Error Reporting
3 .1.1
3·2
Monitor Display Errors
3 .1. 2
• • • • • . 3- 4
STANDALONE DIAGNOSTICS • . • • .
3.2
3-4
3.5
Macroverify • • • • .
3.2.1
3.5
Running Macroverify • • • • •
3.2.1.1
Macroverify Error Messages •
. . . .
3. 7
3.2.1.2
3.7
3.2.2
CPU Diagnostic • • • • • • • •
• • • • 3. 8
Running The CPU Diagnostic •
3.2.2.1
CPU Diagnostic Error Reporting
3.2.2.2
3·8
3.9
Memory Diagnostic . . • • • • • • •
3.2.3
Running The Memo~y Diagnostic • • . • . 3·10
3.2.3.1
Memory Diagnostic Error Reporting
3.2.3.2
. 3·14
VDS DIAGNOSTICS • • • • • • • •
3.3
• 3·14
VCBOl Diagnostic (EHXVS) • . • • •
3. 3.1
• 3·16
Running The VCBOl Diagnostic • •
3.3.1.1
. 3·20
VCBOl Diagnostic Error Messages
3.3.1.2
• 3·21
. • 3. 22
MONITOR LED INDICATORS . • • .
3.4
MONITOR ADJUSTMENT PROCEDURES . . • • • • • 3. 2 3
3.5
• . • . 3. 23
Power Supply . . . . • . • • •
3.5.1
• • • • 3. 2 4
Viueo Module . . . . . . . •
3.S.2
• • 3. 2 4
Deflection Module . . . . •
3.5.3
Cutoff Preset <G2 Voltage) •
. . 3·24
3.5.3.1
Horizontal Frequency • • • . • •
• 3·24
3.5.3.2
• • • • 3. 2 s
Contrast . . . . . • . . • •
3.S.3.3
Horizontal Size
. 3·25
3.5.3.4
· Horizontal Centering •
• . • . . . 3. 26
3.5.3.S
Vertical Height
3.S.3.6
• 3·26
Vertical Centering .
. 3·26
3.5.3.7

VAXstation I SERVICE GUIDE
Horizontal And Vertical Linearity
3.5.3.8
.Static And Dynamic Focus
3.5.3.9
TROUBLESHOOTING FLOW
3.6

3·26

..
. 3-27
. .........
3·28

"--

CHAPTER 4

4.1
4 .1.1
4.1.2
4.2
4.2.l
4.2.2
4. 2. 3
4.2.4
4. 2. 5
4.3
4.3.l
4.3.2
4.4
4.4.l
4.4.2
4.5
4. 5 .1
4.5.2
4. 5. 3
4. 5. 4
4.6
4. 6. l
4.6.2
4.7
4.7.l
4.7.2
4.8
4.8.1
4.8.2
4. 8. 3
4.8.4
4.8.S
4.8.6

\......__

4. 8. i

REPLACEMENT

. ..... .
..... ... .

.
BACKPLANE MODULES
.
Module Removal .
Module Replacement
STORAGE SUBSYSTEM
Access
.
RD52 Removal
RD52 Replacement .
RX50 Removal
RX50 Replacement .
POWER SUPPLY .
Power Supply Removal
.
.
Power Supply Replacement
BACKPLANE AND SIGNAL DISTRIBUTION PANEL
Backplane Removal
Backplane Replacement
COOLING FANS
. . . .
Rear Fan Removal
.
Rear Fan Replacement
Fan
Removal
Front
Front Fan Replacement
.
PATCH ANO FILTER PANEL
Insert Removal
. .
Insert Installation
.
FRONT CONTROL PANEL
·control Panel Removal
Control Panel Replacement
MONITOR
. .
Monitor Cover Removal
EMI Screen
.
Monitor Power Supply
Deflection Module
Video Module
. .
CRT Cable
. .
Monitor Cover Replacement

.. .

... .

.
. . . ......
.

.. . . . . .

...
. .
.
...
. .. .
...

. . .
.

4-1

4·1
4.4
4·6
4-6
4·8
. 4-12
4-17
4·18
4-19
. 4·19
4-20
4-22
4·22
. 4·25
4-27
4-27
4-27
4-29
. 4-31
4-32
4·32
.J. 3 3
4-33
4-33
. 4-35
4-36
4-36

.
..
.
.
.

. . .
.
. ...

.. .. . .
.. .. .
. .
. . .

4-36

. 4-37
.

4.37
4-37
4-38
4 - 38

EXAMPLES
l·l
l -2

One MSVll ·QA Starting Address Selection
Two MSVll·QA Starting Address Selection

1-9
l. 9

""'I

VAXstation I SERVICE GUIDE
FIGURES
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
1-9
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
3-1
3-2
3-3
3-4
3-5
3-6
3-7
4-1
4. 2
4. 3
4. 4
4. 5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19

. . . . .
. . .
.
.
. . . . .
..
. . .. .
. .. .
. .
. ..
.
. . . .
.
. . . .
. . .
.. .
.
. .
.
. . . .
. . ... . ..
.
. . . . . . . . . . .
. .. . . . .
...
..
.
.
. . . . . . . .
. . . . .
. .
. . . . . . . .
. ... ...
. .
. .
.
.
. .
.
.

Backplane Configuration Example .
1-3
H9278-A Backplane
.
.
1-4
M7135-YA OAP Switches and Jumper
. . 1-6
MSVll-QA Jumpers and Switches .
.
1-10
RQDXl Jumpers
.
.
1-14
VCBOl Switches . .
.
. . .
1-16
VRlOO Monitor Rear Panel .
.
1-19
DEQNA Jumpers
.
1-21
DZVll Switches and Jumpers
.
1-23
CSR Format . . . .
.
2-2
Cursor x Position Format .
. . .
2-3
Mouse Position Register Format
2-4
CRTC Address Register Pointer Format
2-5
CRTC Data Register F•.lrmat .
2-6
ICDR Format
. . .
.
2-7
!CSR Format .
.
.
2-7
Mode Registers lA and 2A Format .
2-12
Status/Clock Select Register A Format
2-14
Command Register A Format
.
2-15
Transmit/Receive Buffer A Format
. 2-16
Interrupt Status/Mask Register Format .
2-16
Macroverify Run Report .
.
.
3-6
CPU Diagnostic Run Report
3-8
CPU Diagnostic Error Message Format
3-9
Memory Diagnostic EHXMS View Command
. . 3-13
Memory Diagnostic Operator Error Format
3-14
Memory Diagnostic Memory Error Format . . . 3-14
Monitor Internal Controls
3-23
Rear Cover Removal . .
. . . . .
. .
4-2
Rear Cable Removal . .
. . . . . . .
4-2
Patch and Filter Panel Assembly Access
4-3
Module Cable Removal .
4- 3
Module Remcval . .
.
. . .
4-4
Module Cable Replacement
4-5
Module Replacement . .
4-5
Front Cover Removal
. .
4-6
Removal
Front Bracket
.
4-7
Storage Subsystem Cover Removal
4-7
RD52 Cable Access .
.
.
4-9
RD52 Cable Removal . . . . . .
4-10
RD52 Head Positioning Arm Cover Replacement 4-11
RD52 Shipping Container . . .
. . . . 4-12
DIP
Switches
.
RD52
. . . .
.
. . . 4-13
RD52 Head Positioning Arm Cover Removal . . 4-14
.
RD52 Insertion .
. 4-15
RD52 Cable Connection
4-16
RX50 Cable Access
.
4-17

. .. .

. .

. . .
.. .
.
. . .
. . . .
. .. . . . .
. .

vi
'---'

VAXstation I SERVICE GUIDE
4-20
4·21
4-22
4-23
4-24
4-25
4·26
4-27
4-28
4·29
4-30
4-31

• • • •
RXSO Removal . . • . • . • •
RXSO Cable Connection
.•.
Power Supply Cable Removal . . • . • . •
Fan Power Connector • • • . . • .
Drive Cable Backplane Connectors .
Other Backplane Cable Connectors
Q22·bus Cable Backplane Connector • • •
Rear Fan Installation
..•
Front Fan Removal . . . . . •
Front Fan Installation . . .
.
Front Control Panel Removal . • • • • •
Front Control Panel Disassembly

. • 4. 1 7
4-18
4·20
. 4-21
4-23

l·l
1·2
1·3
1·4
1·5
1·6
1-7
1·8
1·9
1-10

Components and Options . . . .
1·2
OAP Option Switches . . . . . • . . . . • • l - 7
MSVll·QA Switches . . . . .
. 1-11
MSVll·QA CSR Address Jumpers . • . .
. 1-12
MSVll·QA Jumper Pairs . . • . . • .
. . l · 13
RQD'U Device Address Select . . . •
. 1·15
VCBOl MSA Selection
. 1-17
CSR Base Address Select
1·18
Display Density Selection
. 1·18
DZVll Address Switches . . . . . . • . . . • 1-22
DZVll Vector Switches
. 1-24
DZVll Jumpers
. • . •
. l. 2 4
VCBOl Registers
. . . .
2. 2
CSR Bits . . . .
2-3
Cursor X Position Bits .
2-4
Mouse Position Register Bits . . . . .
2-4
CRTC Address Register Pointer Bits .
2-5
CRTC Internal Registers
2-S
CRTC Data Register Bits . . . .
2-6
ICDR Bits
2·7
ICSR Bits . . . .
2·8
ICSR Commands
2-9
Interrupt Controller Mode Register Bits
2·11
Mode Regist~rs lA and 2A Bits
2-13
Status;c:ock Select Register A Bits
. 2·14
Command ~egister A Bits
2·15
Transmit/Receive Buffer A Bits . . . .
. 2·16
Interrupt Status/Mask Register Bits
. • 2•l 7
Microverify Error Codes . . . .
3·2
Monitor Display Errors . • . . •
• • • 3. 4
Memory Diagnostic Tests . . . .
. . . .
3. 9
Memory Diagnostic Control Keys
• 3. 11
Memory Diagnostic Commands
. . 3 . 11

• • 4. 2 4
• • 4. 2 5

. • 4-28
• 4-30
• . 4 - 31
• • 4. 3 4

. 4.35

TABLES

l · 11

1-12
2-1
2-2

2-3
2-4
2-5
2·6
2-7
2-8

2-9
2-10
2-11
2-12

2-13
2-14
2-15
2-16
3-1
3·2
3. 3

3.5

Sy3t~m

vii

VAXstation I SERVICE GUIDE~
3-6
3·7
3·8
3·9
3·10
3-11
4-1

Memory Diagnostic command Options • • • . . 3-12
VOS Command Summary . • •
• . • • • . 3·15
VCBOl Diagnostic Tests • • • • • • •
3-16
VCBOl Diagnostic Sections
. • 3-19
Monitor LED Description • • • .
3-22
Troubleshooting Flow . . • •
. 3-29
Part Numbers . . • . • •
. • 4-39

viii

PREFACE

INTRODUCTION TO THE GUIDE
This guide contains system
configuration
and
maintenance
information and procedures.
All the information in this guide
has been abstracted from the VAXstation I · Technical Manual,
EK·VS200-TM.
For more detailed descriptions and explanations,
refer to that manual.
CHAPTER:
1

SYSTEM CONFIGURATION .. Brifely describes switches, jumpers,
and
backplane configuration.
For more information see
Chapter 2 in the VAXstation r Technical Manual, EK·VS200-TM.

PROGRAMMING INFORMATION ·- This chapter describes the 32 I/0
page locations that are used for the exchange of control and
status information between the CPU nad the VCBOl.
For more
information see Chapter 4 in the VAXstation I Technical
Manual, EK-VS200-TM.

MAINTENANCE -- Describes diagnostic procedures.
For more
information see Chapter 5 in the VAXstation I Technical
Manual, EK·VS200-TM.

REPLACEMENT ·· Gives step-by-step procedures for removing and
replacing
system
components.
This chapter is nearly
identical to Chapter 6 in the VAXstation I Technical Manual,
EK-VS200·TM.

PREFACE
RELATED DOCUMENTS
VAXstation I Owner's Manual
EK-VS200-0M
VAXstation I Technical Manual
EK-VS200-TM
MicroVAX I CPU Technical Description
EK-KD32A-TD
MicroVAX I Owner's Manual
EK-KD32A-OM
MicroVAX Handbook
EB·25156-47
RQDXl Controller User's Guide
EK-RQDXl-UG
RX50-D-4 Dual Flexible Disk Drive Manual
EK-LEPOl-OM
RD52 Fixed Disk Drive
[TBS]
DEQNA User's Guide
EK-DEQNA-UG
DZVll Asynchronous Multiplexer Technical Manual EK-DZVll·TM
MSVll-QA Memory [TBS]
[TBS]
Microcomputer Interfaces Handbook
EB-20175-20
MP-02005-01
Print Set
You can order these documents from:
Digital Equipment Corporation
Accessories and Supplies Group
P. O. Box CS2008
Nashua, NH 03061
Attention: Documentation Products

PREFACE
CONVENTIONS

The following table defines the conventions used throughout
guide.

this

····---------·--···--··+·········-························----·CONVENTION

iMEANING

- •••.••..•• - • - •. - .••.. -+ .... - - - .. - - •.••.•••. - . - •. - - - - - .••..•.• - .

<mm:nn>

Read as "mm through nn"; indicates a bit
field or a set of lines or signals. For
example, A<l7:00> is the mnemonic for
Unibus Address Lines Al7 through AOO.

OS> RUN EHXVS<RETURN>

Terminal dialogue.
Prompts and system
typeouts are shown in normal type. User
responses are shown in boldface type.
<RETURN> is described below.

The boldface symbol of a label enclosed
by
angle
brackets represents a key
(usually a control or special character
key) on the keyboard (in this case, the
RETURN key). (Draft document only.
The
convention
is
different
for
final
documentation -- see DEC STD 165.)

abbreviations

Abbreviations used in this manual are in
accordance with DEC STD 015, 3 February
1983 .

. . . . . - .... - - ... - - ... - . ·+· ...... - ..... - ................. - ..... - ..

NOTE
CAUTION

WARNING

contains general information.
contains information to prevent damage to equipment.
contains information to prevent personal injury.

CHAPTER l
SYSTEM CONFIGURATION

This chapter brifely describes switches, jumpers, and backplane
configuration.
For more information see Chapter 2 in the
VAXstation I Technical Manual, EK-VS200·TM.
l.l

BACKPLANE

Figure l·l shows an example backplane installation for a system
configured with all the option modules listed in Table l·l.
Figure 1-2 shows grant continuity chaining
and
interrupt
acknowledge
priority.
With regard to the backplane, the
following should be observed:
o

The M7136 MCT (memory controller) module is installed in
slot 1.

The M7135-YA OAP (data path) module is installed in slot
2•

Memory modules are installed adjacent to
that is, starting with slot 3.

It is recommended that the DEQNA be installed ahead
(that is, in the lower-numbered slot) the VCBOl.

The DEQNA is a dual-height module and requires a G7272
Grant Continuity card in the A or C position of the same
slot. As Figure l·l shows, the DEQNA occupies the A/B
position and the G7272 occupies the r position. (Figure
1-2, below, shows the Grant path).

The RQDXl Disk Controller is installed in the last
active slot in the backplane. For example, in a base
1-1

the

M7135-YA;
of

..
SYSTEM CONFIGURATION

system with no options, the VCBOl would
and the RQDXl would occupy slot 5.
Table l·l:

occupy

slot

System Components and Options

+. - .• - - - •••. - .• - .... - - - - - - - - - .• - . - . - .• - - - - - - - - - - - - •• - - -+
j BASE SYSTEM
+- - - - - - - - - ·+- .• - ... - - . - .. - - . - .. - .. - • - • - - - ••• - - - - - - - • - • -+

KD32-AB
MSVll·QA
RQDXl
RD52
RXSO
VCBOl
VRlOO
LK20l·CA
VSlOX

MicroVAX I CPU (includes):
M7135-YA OAP (Data Path) Module
M7136
MCT (Memory Controller) Module
1 MB Memory Module
Disk Controller
28 MB Fixed-disk Drive
400 kB Diskette Drive
Video Graphics Controller Module
48 cm (19 in) Video Monitor
Keyboard
Mouse

+· - ••....• ·+·. - - - - . - • - - ••. - ..••.• - . - - ••• - - - .. - - - •••••• ·+
j OPTIONS
+· - - .. - ... ·+· ..• - ...•..• - .. - •••• - - • - . - - - • - • - . - •• - . - - • - ·+

I MSVll-QA
I DEQNA
I DZVll
! LASO or
!
LAlOO
[TBO]
[TBS]

l MB Memory Module
Ethernet Controller
4-line Asynchronous Multiplexer
Printer
Printer
Graphics Tablet
Tilt/swivel Base for Monitor

+· .. - - . - . - -+- ... - - ......... - - ...• - • - .• - - .... - - - - - .. - - - -+

1-2

(

--------- ------------------------------------------------------------------------------+I
c

------- ---------------------------------------------------------------------------------+I
MEMORY CONTROLLER (K032-AB CPU)
·-- ----------··
-------- ----------------------------------------------------------------------------+
:!I M7135-VA
OAP - DATA PATH
(KD32-AB CPU)
I
+-----------------------------------------------------------------~------------------------+
MSV11-QA MEMORY
31 M7551
... -------------------------------------------------------------------------------------------------------+
MSVll-QA MEMORY
41 M7551
~------------ ----------------------------------------+--------------------------+--------------------------+
5l M7504
DEQNA ETHERNET CONTROLLER
I G7272
GRANT CONTINUITY I
I
~-----------------------------------------------+--------------------------+--------------------------+
6j M7602
VCBOI VIDEO CONTROLLER
I
--------------- - ------------------------------------------------------------------------+
71 M7957
DZV11 A$VNC:HROtlOUS LINE MULTIPLEXER
I
--------------------------------------+
RQDXI DISK
Bl M8639
·-··-

11 M713f>

MCT

--~

II
I
I

1•

I
I

+-~--

+--- ... ---

CO~TROLLER

+---------------------- --,--------------------------~-------------------------------------------------------+
--~

T --

------ - -------------+

--T

Fiqure l·l:

I
I

+------------------------------------------------------------+

=
g"'

Backplane Conf iquration Example

.
0

)

·,

)

+----------------------------------------------------------------------------------------------------------------------+
I
I
I

II
I

GRANT

+---------------------!----+--------------------------+--------------------------+------------------------+I
11 022
PRlORlTV 1
v
I
C/O
+---------------------1----+--------------------------+--------------------------·--------------------------+
21 022
PRIOIUTY 2
v
I
C/O
I

+---------------------1----+--------------------------+--------------------------·--------------------------+
PRIORITY 3
v
I
CID
I
+---------------------1----+--------------------------+-------------------- ----~---------------- --- ·-----·

31 Q22

PRIORITY 4
+------------------->----------------+
PRIORITY 5
022 I
+--------------------------+--------------------------+----!-------------------+-----------------------+
51 Q22
PRIORITY 7
+-------------------<----------------+
PRIORITY 6
022
+---------------------t----+--------------------------+------------------- ·--------------------------+
II
61 022
PRIORITY 8
------->-------------- -•
PRIORITY 9
022
------+
I
------------------+----!-------------------+-----+--------------------------+----PRIORI
TY
10
022 I
I
71 Q22
PRIORITY 11
+-------------------<----------------+
I
+---------------------1----+--------------------------+-------------·--------------------------+
?RI OR ITV 13
022 I
I
SI Q22
PRIORITY 12
+------------------->----------------+
1
--··-------------------------+
+--------------------------+--------------------------+--------·-----------------------------+
ol
•'
..,.1
SIDE
ff I
------------··---·----------------·
+-------------~ +-----------------------------+

I
I

41 Q22

---------

--~--------

.•
M

....
Cl)

Figure 1·2:

H9278·A Backplane

SYSTEM CONFIGURATION

1. 2

KD32·AB CPU

The KD32-AB CPU comprises two quad-height modules: the M7135-YA
OAP (data path) module, and the M7136 MCT (memory controller)
module. For more information on the KD32-AB, see the MicroVAX I
CPU Technical Description, EK-KD32A-TD.
1.2.1

M713S·YA DAP

The OAP module (Part Number M7135-YA) is
with a ribbon cable.

connected

the

MCT

1.2.1.l Switches · As Figure 1-3 shows, the OAP contains two
sets of eight DIP switches and a single jumper. The SID register
switches are used by manufacturing and should not be changed.
Table 1-2 lists the Option switch functions and the normal
setting for the VAXstation 1.
The three LEDs display a binary error code that matches the error
code displayed in the segmented-LED display on the CPU insert
mounted in the Patch and Filter Panel assembly.
1.2.l.2 Microverify Jumper - This jumper determines the test
mode for Microverify. The jumper is factory-set to single-pass
mode {as shown in Figure 1-3). In the alternate jumper positon,
multipl~loop
mode, OAP Option Switch 2 {Table 1-2) must be in
the OFF (VTlOO compatible) position {also see the NOTE
VTlOO
Mode, below).
NOTE - VTlOO Mode
If OAP Option switch 2 is set to the OFF
position,
a VTlOO can be connected to the
terminal SLU and used as the console terminal.

1-5

)

+··----------------------------------------------------------------------------------------------------------------------+
I
I

I ·-~:::::j r-~:::::j

I, :::::1 •-•-•1
I

lJL~~·rJ

•-•-•I I
1','

+-+-+j

: : : : : , ,

i-~~-i

+-------------;~---------------i

•----+

•----------------------------~-•

TERMINAL

DAP TO MCT CABLE CONNECTOR

i-~;-i

•----•

=~~!:::~~NEL
CABLE
CONNECTOR

+-+-+

I ._!:::::! ._!:::::!
I
I
I

SID

I
I
1,,

OPTION
SWITCHES

II
'1'

III

MULTIPLE
LOOP
+

SINGLE
PASS

I'°

•--+

I •

Ml CROVER I FY
JUMPER

, .....

•-+

I I
•---• I
I

·------------------------+

+-+

·------------------------· ·----------------------Figure 1·3:

+ ~· --+

·---- ------------------·

M7135·YA DAP Switches and Jumper

SYSTEM CONFIGURATION

Table 1·2:

OAP Option Switches

+· •••• ·+·. - . - . ·+·. - .. - - - . - ......... - - .............. - ........... ·+

SWITCHINORMAL !FUNCTION
I SETTING!

+· - ... -+·. - .. - ·+- .. - - - - . - •. - - .......•........ - •..... - •.. - ••.. - • ·+

8
7

OFF
OFF

BAUD RATE SELECT .. specify the data trans.fer
baud rate between the CPU and console terminal.
8

OFF
OFF
ON
ON

OFF
ON
OFF
ON

9600

19200
300

1200

OFF

(reserved)

OFF

BREAK DETECT ENABLE .. determines whether a break
condition on the SLU causes a halt:
OFF = <BREAK> key disabled
ON = <BREAK> key enabled

4
3

OFF
OFF

RECOVERY ACTION ·· determine attempted CPU
functions during Power-on:
4

OFF
OFF
ON
ON

OFF
ON
OFF
ON

warm start or boot or halt
boot or halt
warm start or halt
halt

CONSOLE TERMINAL TYPE -· identifies the type
console terminal connected to the system:
OFF= VTlOO compatible (See NOTE ..
above)
ON = Graphics terminal

OFF

VTlOO

Mode,

BOOTSTRAP
SEARCH
ORDER -- determines
which
devices
are
searched
when
the system is
bootstrapped:
OFF = All devices searched
ON = Disk/diskette drives not searched

.;.- .... ·+· . . . . . -+· ..... - .... - - .. - - - - ........ - ....• - - - - .. - - - ... - - ·+

SYSTEM CONFIGURATION
1.2.2

M7136 MCT Module

The MCT module (Part Number M7136) contains no user-configurable
components, and is connected to the DAP with a ribbon cable.
1.3

MSVll-QA MEMORY

The MSVll-QA Memory switches and jumpers are described in
1-4 and Tables 1-3, 1-4 and 1-5.
1.3.1

Figure

Switches

As Figure 1-4 shows, the MSVll has two sets of six DIP switches.
These are the memory's starti~g and ending address switches, and
select the address on 128 kB boundaries (Table 1-3).
VAXstation I configuration guidelines are:
1 = OFF and 0 = ON.

For all switches:

SWl positon 6 is not used.

If the MSVll-QA is the only memory or the first memory
installed (in other words, the memory installed in
backplane slot 3):
the STARTING ADDRESS must be 00000.
the ENDING ADDRESS must be 1024 kB.

If the MSVll-QA is the second memory:
the STARTING ADDRESS must be 1024 kB
the first memory's ending address).

(the

same

the ENDING ADDRESS must be 2048 kB.
The VAXstation I supports only one or two MSVll-QA
memories, and they must be configured as stated above
and shown in the following examples.
Any
other
configuration is invalid and not supported.

SYSTBK CORFIGtJRATIOR
+·. - .. - - . - .. - .. - - . - - . - - - . - . - - ·+. - - - - - - - ...... - ...... - - -+
I
STARTING ADDRESS
I
ENDING ADDRESS
I
+- .. - .. - - - . - .•• - .....•• - ·+· - - ·+- - - ••• - •.. - - •••...• - .• - ·+
SWl
SW2
+-·-·+····+····+····+·-··+-···+····+····+····+····+····+
Is
4
3
2
1
6!
s
4
3
2
l!
ONE
ON
ON
ON
ON
ON i OFF OFF ON
ON
ON I
MSVll·QA 1 ON

00000

1024 kB

+····+···-+·---+--·-+····+···-+····+····+····+----+----+

Bzample l·l:

One MSVll-OA Startinq Address Selection

+· ......•.•...•• - .. - ••.• - .•• - ·+· .. - - . - - - .. - . - - ... - . - - - -+
:
STARTING ADDRESS
I
ENDING ADDRESS
+· ....... - - - - - - - - - ........ ~ - - ·+- - .. ·+- - • - - ......... - - - • - • - ....... - ·+
SWl
SW2
+····+····+····+····+····+····+····+····+····+····+····+
FI RS T
5
4
3
2
l
6 I 5
4
3
2
l
MSVll·QA ! ON
ON
ON
ON
ON
ON i OFF OFF ON
ON
ON ;

00000

1024 kB

+····+····+····+····+····+····+····+····+·--·+····+··-·+
SECOND
5
4
3
2
l
6 i 5
4
3
2
1
MSVll·QA ! OFF OFF ON
ON
ON
OFF! OFF ON
ON
ON
ON I

1024 kB

2048 kB

+····+-···+····+····+····+----+-···+····+····+····+····+

Example 1·2:

Two MSVll·QA Startinq Address Selection

1-9

SYSTBN C08FIGORATI08

·------·

·---·

I
I
I
I

I
I
I
I
I
I
I
I
I
I
I
I
I
I
I

I
I
I

I
I

I
I
I
I
I
I
I
I

I
I
I
I
I
I
I

I
I

+-+

.
....

"'c:.,

....

•

......

c.i

•

"O
CD

"'
(It

a.
CA

....c

""n:r

(It

I
I
I

+-+
I
+-----+

I
I

I
I
I
I
I
I
I

I
I

I
I
I
I
I
I
I
I
I

I
I

I
I
I
I
I

I
I

·---+
I
+-+
I
·-----+

I
I

I
I
I
I
I

I
I

I
I
I
I
I
I
I

I
I

I
I
I
I
I
I

I
I

I
I
I
I

I
!

·---·.

I
!

I
I

+-+
I

·-----+

• z 'O :Iii
+-+
GI

+++++
I
I

I
I

+ + + +

..."l'I °'+ + + + + +

I
I

I
I
I

C..

I
I

I
I
I
I

I
I

IN
I

Cit

r- !I:
+-+
+

I Ill

·l[

+-----+

o+++ + + +

++++++:(
O++++++

+ + + + + +I(

l"I
"l'I 0t
+-+"l'I++++++

+-+

I( I

(ltl

I
I
I

+I
I
I
I
I

i---------------------------·--------!

SYSTEM CONFIGURATION
Table 1·3:
\.

BOAL:

MSVll-QA Switches

+····+····+····+····+····+
19
18
17 I
20
I 21

+····+····+····+····+····+·-~·+···-+····+-·--+-···+··-·+

::-

ENDING ADDRESS
STARTING ADDRESS
+·. - . - • - - •... - •• - .•••. - • ·+· •• ·+· •••••••.•••••••••• - ••• ·+
SWl POSITION
SW2 POSITION
+··-···+··--+----+--·-?··-·+·---+····+····+····+····+····+····+
4
3
2
1 I
i (kB) !
4
3
2
1 I 6 I 5
5
+------+-·--+----+-···+·---+--··+-···+-·-·+-···+···-+····+·---+
0
0
0
0
0
4096
0
1
1
0
0
0
1
0
0
0
396e
0
1
0
0
0
1
0
0
1
0
3840
0
0
1
1
1
c
0
0
0
1
1
0
3712
0
0
0
1
0
0
1
0
1
0
0
3584
0
1
0
1
0
0
1
0
1
1
0
3456
0
1
1
0
1
0
1
1
0
1
0
0
3328
1
1
1
1
1
0
0
1
1
3200
0
0
1
0
1
0
0
0
0
0
0
0
1
3072
1
1
0
0
0
0
1
1
1
0
2944
0
0
1
0
1
0
1
1
0
1
0
2816
0
0
1
1
1
1
1
1
0
1
0
0
2688
1
1
0
0
1
0
1
0
0
0
1
2560
1
1
1
1
0
1
0
1
1
0
2432
0
1
0
1
1
0
1
1
1
0
1
2304
0
1
1
1
l
1
1
1
1
1
. 1
2176
0
0
0
0
0
0
0
1
l
0
1
0
* i 2048
1
0
0
1
l
0
0
1
0
0
1920
1
1
0
0
0
l
0
1
l
0
1
0
1792
1
1
1
1
1
0
0
0
l
0
1664
1
1
0
0
0
0
1
l
0
1
0
l
1536
0
0
1
1
1
l
1
1
0
1
1308
0
1
1
0
0
l
1
1
0
1
0
1280
1
1
1
1
l
l
0
l
l
l
0
1152
1
1 !
1
1
0
0
0
0
0
1
0
1
• 1024
1
1
0
0
1
1
1
0
1
1
0
896
l
1
0
0
1
0
l
1
0
1
l
768
1
l
1
l
l
1
0
1
1
0
1
640
1
l
l
1
0
0
0
1
0
512
1
1
1
1
0
l
1
1
1
0
l
384
1
1
l
1
0
l
0
1
1
l
1
1
256
1
1
l
1
l
1
1
1
l
1
1
1
128
:')
!
0
0
0
0
0
0
*
+------+----+- • -+- - - -+- - - ·+· - - ·+· - . -+- - • -+- .. -+- - - ·+- - - -+- .. -+
ON
1
OFF
0
* VAXstation I addresses
I

1-11

SYSTEM CONFIGURATION

1.3.2

Jumpers

As Figure 1·4 shows, the MSVll-QA has 6 sets of jumpers. The CSR
Address jumpers (Table 1-4) are a set of 4 jumpers. In the
VAXstation I, the first (or only) MSVll-QA CSR address is set to
17772100, and the second MSVll-QA CSR address is set to 17772102.
Because the VAXstation I supports only one or two MSVll-QAs, the
jumpers should not be set to any other positions.
Table 1-4:

HSVll-QA CSR Address Jumpers

+- - .. - .. - . - - .... ·+- - - ·+-. - - - - - - . - - - - - - . - - -+- -+
BOAL: I 21
I 05 i 04
03
02
01 l 0 0 I
+- .•.... - .. - .. - . ·+·. - ·+· - ... - . - . - - .. - - - .. -+- ·+
111111111110100011 0 ! x
x
x
x I 01
+· ..••.....•.... ·+· .. ·+·. - .. - .• ·+· .... - . - -+- ·+
OCTAL: ;1 7 7 7 2 1 I
x
x
I
+·. - ............ ·+· .. ·+· .. ·+· .. ·+· - . ·+·. - -+- -+
JUMPER
+····+--·-+··-·+·-··+
p
M
N
R I
+·. - ............... - - ·+· .. ·+· - . ·+· .. ·+· .. ·+
FIRST
17772100
IN
IN
IN
IN I
* SECOND
17772102
IN
IN
IN
OUT!
*
17772104
IN
IN
OUT IN I
17772106
IN
IN
OUT OUTI
17772110
IN
OUT IN
IN i
17772112
IN
OUT IN
OUT!
17772114
IN
OUT OUT IN I
17772116
IN
OUT OUT OUT!
17772120
OUT IN
IN
IN I
17772122
OUT IN
IN
OUT!
17772124
OUT IN
OUT IN I
17772126
OUT IN
OUT OUT!
17772130
OUT OUT IN
IN I
17772132
OUT OUT IN
OUTI
17772134
OUT OUT OUT IN j
. I
17772136
OUT OUT OUT OUTl'
!
+· .. - .•......... - •.. - ·+· - . ·+-. - ·+· .. ·+· .. ·+· -+
ADDRESS

VAXstation I MSVll·QA CSR addresses

The remaining sets (Table 1·5) consist of 5 pairs of jumpers,
each pair having a common pin. The VAXstation 1 settings are
indicated with an asterisk (*).

1-12

'-----•

SYSTEM CONFIGURATION
Table 1-5:

MSVll·OA Jumper Pairs

+· .. - ...... - ..... - . - - ·+· .. - ....••.. - •. ·+- - - - • - - ·+· - - ... - ·+
i FUNCTION
I SELECTION
I JUMPER l STATUS i
+· - - • - . - ........... - - -+- .. - ..• - •.••. - - -+- - .... - -+- - - .. - • -+
MEMORY TYPE
i CSR PARITY
A
OUT I *
B
IN
I
+·. - •.. - ... - - ..• ·+· - - •... ·+· ... - •• ·+
! NON-PARITY
A
IN
B
OUT
+· •.......•..•• - ...•• ·+· .. - .. - - .... - .. -+- - ••..• ·+. - - - ... ·+
PARITY ERROR ENABLE ; ENABLE
H
IN
:*
;
J
OUT
+· ..... - .... - ... ·+- - .. - . - ·+· ...... ·+

! DISABLE

OUT

J
IN
+- .......... - - - ....•• -+· •.• - .••.•••... ·+· - . - ... ·+· ...... ·+
; CSR MEMORY TYPE
I 22 bit CSR
K
OUT . i *

I
L
IN
I
+·. - - - .. - . - .. - .. ·+- .....• ·+· .. - - . - ·+
I 18 bit CSR
I
K
IN
I
L
OUT

+· ................... ·+· ........... - .. ·+· ...... ·+· .. - ... ·+
I/0 PAGE SIZE

I
I

i 4 k WORD

C
D

OUT

I*
I

+················+·-······+········+
i

i 2 k WORD

·.'-._

OUT
IN

+-····················+················+········+········+
BLOCK MODE

Wl
IN
i *
W2
OUT
+ . . . . • . - - . - ••• - - • + - •• - ••• ·+ . . • . - . . - +

, ENABLE

DISABLE

OUT
IN

+·····················+················+········+······-·+
\"'--

WRITE WRONG PARITY

FROM CSR

OUT

W6
IN
+ •..••.••••• - - •• -+ - - .• - - • - + .• - ••• - • +

; FROM BOAL<l6>

IN
OUT

+··········I-··········+················+········+········+
* VAXstation I position

For more information on the MSVll·QA
[TBS] , [TBS I .

1-13

memory,

see

the

MSVll·QA

)

-----------+
+----------------------------------------------------------------------------------------------------------()()()()
7
0
-------+
+--------------------+ + + + + + + +
LEDs

·------------------------------+
RQDXI TO SIGNAL DISTRIBUTION

+ + + + + +

LUN

PANEL CABLE CONNECTOR

I
I
I
•I
o

,.....
t!

W41

J;j

IW3

......

I •

I. .

A12

+--+
W2

+ + +

+
+

WI
+-+

·,---ri

+-----------·------------+

+--+

ADDRESS .JUMPERS
( 12150 OCTAL)
+ + +

! ·-i
8
ii

II~

·1

+------------------------·
Figure 1·51

_ri1'
+-----------------------·+
RODXl Jumpers

+-+

+- ---·---- ---- - - ... ---- ------·

SYSTEM CONFIGURATION
1.4

MASS STORAGE

The VAXstation I
Controller (Part
Fixed-disk Drive.
1.4.1

Mass Storage subsystem includes the RQDXl
Number M8639), RXSO Diskette Drive, and RD52

RQDXl Controller

1.4.1.1 Jumpers · Figure 1-5 shows the three sets of RQDXl
jumpers in their factory-set configuration. Wl through W4 are
for manufacturing use only. The LUN is set to LUN O; that is
jumpers LUN7 through LUNO are all out. The device address is set
to 772150 (octal); that is jumpers Al2, AlO, A6, AS, and A3 are
in (see Table 1·6).
Table 1·6:

·"-._,

RQDXl Device Address Select

+··············+····-····-··--·-·-··-·····-··-··+··---+

BOAL: 117 16 15 14 13)12 11 10 09 08 07 06 05 04 03 02!01 001
+· .. - ..... - ... ·+· ... - ..... - .... - ... - - .. - - - - . - . - ·+· .. - ·+
I
DEVICE ADDRESS SELECT
JUMPER + · · · · · · · · · - · · · • + · · · · · · · · · · · · • • · · • • · · - · · · · · · · · · · · + • • • • • +
A: I
! 12 11 10
9 8 7 6 5 4 3 21
!
I 1 1 1 1 l! 1 o 1 o o o 1 l
o l 01 o 01
OCTAL:

+· .... - . ·+· ... ·+· ·+· ...... ·+·. - ... - ·+· •. - - .. ·+· ·+· ... ·+
7
7
2
1
5
!
0
+· ...... ·+· ...... ·+- ...... ·+· ... - .. ·+·. - ... - ·+· ...... ·+

For more information on the RQDXl, see the
EK·RQDXl·UG.
1.4.2

RQDXl

User's

Guide,

RXSO Diskette Drive

The RX50 is connected to the Mass Storage Cable Distribution
Panel with one cable (Part Number 17·00285-02), and to the power
supply with another cable (Part Number 70-20435-lK). This second
cable also connects the RD52 to the power supply.
1.4.3

RD52 Fixed·disk Drive

The RD52 is connected to the Mass Storage Cable Distribution
Panel with two cables (Part Numbers 17-00282 and 17-00286), and
to the power supply with another cable (Part Number 70-20435-lK).
This third cable also connects the RX50 to the P.Ower supply.

1-15

SYSTEM CORFIGORATIOR

--------+

+
I
+-----+
I
I
I

I
I
I
I

I
I

I
I
I
I

I
I
I

I
I
I
I

I
I

+--+
I

l
I

+-+
I
+-----+
I

I
I

I
I
I
I
I

,..."IJ
l.Q

.,c:
GI

....•
°'
••
<
n
tD

I
I
I

I
I
I
I

I
I
I

I
I

l
I
I
l
I
C.. I
I
I
I

I
I
I
I
I
I
I
I
I

I
I

+---+
I
+-+
I
+-----+
I
I

::r

Ill

I
I

0
....

....(
rt'

+--+

I
I
I

I
I

I
I
I
I
I
I
I

+ + + + + + + +
I
I I I I I I Im
+ + + + + + + + ,,.
I I I I I I I I OI
+ + + + + + .. +

+
1m
+ Ol
I OI
+

I
I

+--+

·---+
I

I
I

+-+
I
+-----+

+ + + +
I I I Im
+ + • +
I

I .I>

+ + + +

I
I

I
I
I

I
I

I
I
I

I
I
I
I
I

I
I

+-----+

+----------------1-16

I
I
I

---------+

SYSTEM CORFIGORATION

1.5

VCB01 VIDEO CONTROLLER

The VCBOl is shown in Figure 1-6.
1.5.1

Switches

The VCBOl switches select:
o
o
o

The MSA (Memory Starting Address)
The CSR (Control and Status Register) base address
Display density

1.5.l.l Memory Starting Address (MSA) • Switches l through 4 of
switch-pack El4 select the starting address for the 256 kB block
of MicroVAX physical memory where the VCBOl resides.
Table 1·7
1
shows the switch settings 0 •ON and 1 •OFF).
Table 1·7:

VCBOl MSA Selection

+·--·+····+--··+····+

BOAL:

18 I

+··--+----+---·+·-··+

El4:

54 I

+······+····+····+·--·+--·-+
I'

(kB) I

+· •. - . ·+·. - ·+· .. ·+· .• ·+· - . ·+
1
l
l
1
*i 3840 i

3584 ;
3328
3072
2816
2560
2304
2048
1792
1536
1280
1024
768 !
512
256
~

l
l
l
l
l
l
1
0

0
0
0
0

l
l
l
0
0
0
0

l
l
l

l
0
0
1
l

0
l
0
1
0

0
0

l
l

0
0

l
l

0
l
0
1

0
1
0
l

0
0
0
0
O·
0
+······+····+····+·-··+·-··+

OFF

* VAXstation I setting
The video memory always resides in the topmost 256 kB of the 4 MB
MicroVAX physical address space. Therefore, all the MSA switches
1-17

SYSTBK CORFIGURATIOR
are set to OFF; that is,
starting at 3840 k.

BDAL<21:18>

select

the

256 kB

block

1.s.1.2 CSR Base Address - As Table 1-8 shows, BDAL<l7:13> are
all ls (ones), giving an address range of 7600xx through 7777xx
·(octal). Switches l through 7 of switch-pack E48 correspond to
BDAL<l2:06>, and select the CSR base address (that is, the I/0
registers base address).
BDAL<05:01> select one of the 32
registers; and BDAL<OO> is byte select and MBZ (must be zero).
Currently, in the VAXstation I, E48 switchesS7:Sl are set to·112
(octal). This makes BDAL<l7:00> • 7772xx (octal; 3FExx, hex).
Table 1·8:

CSR Base Address Select

+ - - • - •• - - - • - - - - + - - - - - - - - - - - - - - - - - - - - + • - - -·- - - - - - ••• - + • - +

BOAL: 117 .. 16 15 14 13112 11 10 09 08 07 06105 04 03 02 011001
+· - ..•. - - - . - . - ·+· .. - .... - •. - - .. - •. - -+- - ... - - .•... - -+- ·+
I (HARD WIRED) I CSR BASB ADDRBSS
I CSR SELECT
+- - - - - - .. - • - .• -+- .• - • - .. - - - - . - - - - - - -+- - - - . - - - - - - - . -+- -+

E48: I

I 1

I S7 S6 SS S4 S3 S2 Sl I
11 1 1 1 1 o 1 01 x

I I
xi 01

+---·-···+-----+--+--------+------··+···-····+·-···+··+
OCTAL:
7
7
I
7
2
X
X
I
+· ..•... ·+· - - •• - • ·+·. - - - . - -+- - - - - - - -+- - - - - •. ·+- - - •.• - ·+

1.S.1.3 Display Density · Switch
E68
and
switch
S8
of
switch-pack E48 select either a full-page or half-page monitor
(Table 1-9). The VRlOO is a full-page monitor and E68 is ON
(position C2); E48 SS is OFF.
Table 1·9:

Display Density Selection

+- - . - - - - • - - - - • - ·+· ... - - - - ... - - . ·+

l FULL·PAGE
i HALF-PAGE
I MONITOR
l MONITOR
i
+- - - - •.• - -+- - - - - - • - - • - - . - ·+· - . - - - - - • - - ... -+
B68
OR (C2)
OFF (Cl)
I
B48 S8

OFF

I
ON
I
+- - - - - • - • ·+· - . - - - . - - - - - - . -+·. - - - - - - - .. - .. ·+
j DIAGNOL ! 48 cm (19 in) l 38 cm (15 in) :
I
I
I
I PIXELS j 829 k
I 384 k
+. - - .. - - .. + •••• - - • - • - •••• ·+. - . - - - - .. - - . - - . +

1-18

SYSTEM CONFIGURATION
1.6
1.6.l

OPERATOR I/O DEVICES

VRlOO Video Monitor

The VRlOO monitor (Part Number VR100-AA) has only two external
controls,
contrast and brightness (Figure 1-7).
Alignment
controls and adjustments are contained within the enclosure, and
described in Chapter 3. The functions of the four LEDs are also
described in Chapter 3.

YSYNC

VIDEO BNC
CONTRA.ST
HSYNC 8NC

VSYNC 8NC

LEO.

Figure 1·7:

VRlOO Monitor Rear Panel

The monitor is connected to the Patch and Filter Panel Assembly
with the video cable (Part Number BC18T-l0). At the VRlOO end of
this cable, the VIDEO, HSYNC, and VSYNC coaxial leads are
connected to match the icons molded in the cable and the VRlOO
enclosure. The lead from the keyboard also plugs into the VRlOO
end of this cable.

1-19

SYSTEM CONFIGURATION
1.6.2

LK201 Keyboard

The keyboard Part Number is LK201-CA.
The keyboard lead is
terminated in a 4-pin modular connector that plugs into the
monitor end of the video cable (Part Number BC18T-10).
1.6.3

VSlOX Mouse

The hand-held mouse (Part Number 30-20038-01) is connected to the
Patch and Filter Panel Assembly with a 3.7 m (12 ft) 10-conductor
cable.
1.6.4

LASO And LAlOO Printers

Either an LASO or an LAlOO can be connected to the CPU insert in
the Patch and Filter Panel Assembly with a single cable (Part
Number BC22D-10).
1.7

OPTION MODULES

1.7.1

DEQNA Ethernet Controller

The DEQNA (Figure 1·8) module (Part Number M7504) communicates
with the Ethernet through an H4000 Ethernet Transceiver and Cable
Tap. A Transceiver Cable connects the H4000 to the DEQNA insert
in the Patch and Filter Panel Assembly.
NOTE - G7272 Required
In the VAXstation 1, it is recommended that the
dual-height DEQNA be installed between the last
quad-height MSVll-QA and the quad-height VCBOl
(see section 2.1).
Therefore, a G7272 Grant
Continuity card must be installed in the A or C
connector position of the same slot as the DEQNA.
1.7.1.1

Jumpers - Figure 1-8 shows the three DEQNA jumpers:

This jumper identifies the first or second DEQNA in the
system.
Factory connected to pin 1 as shown, it identifies
the first (and only, in the VAXstation 1) DEQNA.
It is
normally installed.

This jumper controls the Hold-off
removed.
1-20

Ti~er.

normally

SYSTEM CONFIGURATION
+ •••••• - • - - - • - - - - • - - - • - • - • - - - - - - ••••• - - - - • - - - - - - - - - - - - • - - • - - - - - --+
+- - •••• - - - •••• - - • - - - ·-+
Jl
I
LEDs
I [J CJ [J
-+- •• - - - - - • - - - - - • - • - - ·-+
i
-+---------------------+
2
1 I EXTENDED BOOT ROM
-+ -+··-+
I
Wl
-+- • • • • • - - • - - • • • • - • • • - -+
-+-·-+
W3

-+ • - . • • • • • • • • • - • • • -+
DMARC

GATE ARRAY

-+
-+ • • • • • • • • • • • • • • • • +

-+
W2

(OUT)

-+.-+

+.-+

-+ • -+

-+- --+

-+·························--+
Figure 1·8:

-+-------····-·-· ---·········-+
[MicroVAX I OM Figure 22-1]
DEQRA Jumpers

1-21

SYS'l'BM CONFIGURATION .

This jumper controls
installed.

the

Sanity

Timer.

normally

correct
for
most
Factory set as shown, W2 and W3 are
For more information see the DEQNA User's Guide
applications.
EK·DEQNA·UG.
1.7.2

DZVll Asynchronous Line Multiplexer

The DZVll (Part Number M7957) includes the module, an insert for
the Patch and Filter Panel Assembly, and a cable between the two.
1.7.2.1 Switches And Jumpers · As shown in Figure 1·9, the DZVll
contains a set of 10 and a set of 8 DIP switches, and 16 jumpers.
The switches select the device starting address (Table 1-10) and
floating vector (Table 1-11). The jumpers (Table 1·12) configure
the module for various applications; factory set as shown, they
are correct for most applications.
·
\

The address switches are factory set to
except S7):
Table 1·10:

address

760100 (all OFF

DZVll Address Switches

+ •••• - •• - - •• - - • +. - - . - ••••••••••• - - ••••••••• - -+- - - • - • - -+

BOAL: 117 16 15 14 13112 11 10 09 08 07 06 05 04 J3!02 01 00!
+- - •• - ••• - • - - . -+-. - •••• - ••• - •••• - - - •• - - - - - - • -+- - - • - •• -+

DBVICB ADDRESS SBLBC'l'

SWITCH + • • • • • · • • • • • • • • + · • • • • • • • • - • • • • - - • - - • • • • • - • • • • + • - • - .• · - +
S: !
I 1 2 3 4 5 6 7 8 9 101
A: I
112 11 10 9 8 7 6 5 4 3 i
l l l l 11 0 0 0 0 0 0 l 0 0 01 0 0 Oi
OCTAL:

+- - - • - - - ·+· - - - ·+· ·+· - - - - - . -+- •• - - - - -+- - . - - - - ·+· ...... ·+
7
!
6
0
l
0
i
0
+ ••• - - • - -+ •• - ••••• + ••••.•• - + - - - - •.•. +·- ••. - - - - +- - • - .••• +

1·22

(

·--·---------:====~========================:-----------------------------------------------------------------------------+
+-----------------------------+
W5-r
we+

...
+

+W6
•w7

+----------------------+ +----------------------+I
I
+--------------------·--+ +----------------------+
+----------------------+I +----------------------+
I
+----------------------+ +----------------------+

I
I
.-1
I
NI
w I
I
I
I
I

+--+
w1+
+
W4+
+

+
+

... w2
+W3

... +--+W9

+--+

+--+ +--+ +--+

W13

W14

W15

W16

+--+

W12

A
12

I
I
I
I

A
6

A
3

+--+

T--+

OFF I 111111111

OFFI 11111

ONI 111111111

ONI 11111

++++++

WIO

WI I

+-+
+-+

1"---+

+------------------------+

+------------------------+
Fiqu re 1·9:

+---+

DZVll Switches and Jumpers

..t=
toC

VECTOR
SWITCHES
+-+

+------------------------+

++++++

ADDRESS
SWITCHES

+-+

+ -+

++++++

... +++++++++

I
I
I

++++++++++

+-+

+------------------------+

SYSTEM CONFIGURATION

The vector switches are factory set to vector. 310: Sl, S4, and
ss OFF; S2, S3, and S6 ON. Switches S7 and sa are not used:
Table 1·11:

DZVll vector Switches

+· ..... - ....... - ..... - ... - ·+- .. - . - - . - - ... - - . -+-. - . - - - -+
BOAL: 117 16 15 14 13 12 11 10 09108 07 06 05 04 03102 01 00[
SWITCH

+- .. - . - - .... - ............. ·+-. - ........ - . - .. ·+- - - . - .. ·+
!
VECTOR SELECT
+- ..... - . - - ... - - - -+· .. - .. - -+

I l

I 8

l 0

61 7
Ji
1: 0

+·-----··+-·······+········+
I
3
I
1
o !
+. - ..... ·+ ....... ·+ ..... - - . +

OCTAL:
Table 1·12:

DZVll Jumpers

+· ... - ·+- ....... ·+· .. ·+· ................... - - ..... - . - - ..•...... ·+

!JUMPER! STATUS

.NOTE! FUNCTION

+·····-+·········+····+-········································+
Wl
W2
W3
W4

!REMOVED
!REMOVED
I REMOVED
I REMOVED

Wl:W4 connect DTR (data terminal ready
to RTS {request to send)

!REMOVED
!REMOVED
!REMOVED
!REMOVED

I W5:W8 connect FB {forced busy) to RTS

+· ... - -+· ....... ·+· .. ·+·. - . - ............. - ... - .... - . - .......... ·+
W6
W7

, we

+······+······-··+· ···+···-··············· ······················+
W9
WlO
Wll
Wl2
Wl3
Wl4
Wl5
Wl6

!INSTALLED1
!INSTALLED 1
!INSTALLED
!INSTALLED!
!INSTALLED

l
2
2

1
1

~INSTALLED!

!INSTALLED'
iINSTALLEDi

W9:Wl6 connect bus signals

+······+·········+·-··+·········································+

NOTES: 1. Removed only for manufacturing tests. Should not be
removed in the field.
2. Removed if the module is installed in C/D interconnect
slot.
For more information, see the
Technical Manual, EK·DZVll·TM.

DZVll

1·24

Asynchronous

Multiplexer

CHAPTER 2
PROGRAMMING INFORMATION

This chapter briefly describes the programmable functions of the
VCBOl; that is, the functions that can be specified and/or
examined by software. For more information see Chapter 4 in the
VAXstation I Technical Manual, EK-VS200-TM.
2.1

VCBOl REGISTERS

Control and Status information is exchanged between the VCBOl and
the CPU through 32 16-bit locations in the I/O Page. These
locations are listed in Table 2-1 and described below.
NOTE - Bit Descriptions

Many of the bit descriptions in the following
tables
include a value in parenthesis; for
This
usually
example:
(1 =chip
armed).
indicates the initialized value of the bit.

2-1

PROGRAMMING INFORMATION

Table 2·1:

VC:BOl Registers

+- .... - .. ·+ •• - ..• - - - •.••• - • - •• - ..• - - - - - •.• - - .• - - ••.•.•••••• - . - . -+

I ADDRESS*! NAME
+·. - ..•. - ·+-. - . - - .. - ........... ~ - .•.. ~ - • - • - - . - - . - .•••... - - - - . - - ·+
CSR ·• Control and Status Register
BASE
cursor X Position
BASE+2
Mouse Position Register
BASE+4
(spare)
BASE+6
CRTC Address Pointer Register
BASE+8
CRTC Data Register
BASE+lO
ICDR
Interrupt Controller Data Register
BASE+l2
BASE+l4
ICSR
Interrupt Controller Comm.and/Status Register
(spare)
BASE+l6
through
BASE+31
(spare)
UART Mode Registers lA and 2A
BASE+32
BASE+34
UART Status/Clock Select Register A
UART Command Register A
BASE+36
BASE+38
UART Transmit/Receive Buffer A
(spare)
BASE+40
BASE+42
UART Interrupt Status/Mask Register
(spare)
BASE+44
(spare)
BASE+46
UART Mode Registers lB and 2B
BASE+48
BASE+ SO
UART Status/Clock Select Register B
BASE+52
UART Command Register B
UART Transmit/Receive Buffer B
BASE+54
(spare)
BASE+56
through
(spare)
BASE+62

+- ••• - - •• ·+-. - - - .... - ... - - - ................ - •....... - •....... - . ·+
* BASE = The CSR Base Address

2.1.l

Control And Status Register

The CSR bits are described in Figure 2-1 and Table 2·2.
Note
that following a Q22-bus BINIT, bits <06:02> a:e cleared(= 0).
15 14 13 12 11 10 09 08 07 06 OS 04 03 02 01 00
+···+···+···+···+···+···+-·-+·--+-·-+-··+··-+···+·-·+-·-+··-+·-·+
nu·S't3·BK2 BK! BKO.MSC.MSBiMSA:CUR:IEN TSTlVRB;FNCiVIDi nu.MOD
+·--+··-+·--+---+···+···+·--+···+···+---+···+···+···+··-+---+---+
ADDRESS = CSR BASE
Figure 2·1:

CSR Form.at

2-2

PROGRAMMING INFORMATION
Table 2·2:

CSR Bi ts

+· ...... -+-. - • - •. -+- - - - •.. - • - - - - - - - •• - • - - - - - - - - - - • - - ••••••• - - •• ·+

I BITS

I ACCESS I DESCRIPTION

+- - - - - - - ·+- - - - . - - -+- - - - • - - - - • - • - - - - - - •• - - - - - - - •• - - - - - - • - - •• - - - - -+

<15>

(spare - not used)

<14:11>

READ

Memory bank switch 0:3 (MSA switch El4 Sl:S4)

<10:09>

READ

Mouse switch C:A (0 • closed)

<07>

READ

Cursor a~tive (1 • cursor on)

<06>

RD/WR

Interrupt Enable (1 •enabled)

<05>

RD/WR

Test Bit (used with loop-back connector)

<04>

RD/WR

Enable video read-back (1 • enabled)

<03>

RO/WR

Cursor function (1 • OR, 0 •AND)

<02>

RO/WR

Enable video output (1

enabled)

(spare - not used)

<01>

<00>
READ
19 in/ 15 in mode (1 • 19 in)
+- - - .•. - -+·. - - .. - -+· - - . - . - - - •• - - - - • - - • - - - - - - - .• - - - - • - - ••• - .. - . - -+
2.1.2

Cursor X Position

This location contains the horizontal position of the top left
corner of the 16 X 16 (pixel) cursor image. The value is in
pixels and must not allow the cursor to be positioned beyond the
maximum x pixel.
That is, the maximum value is 943 (959 - 16)
for a VRlOO monitor, and 783 (799 - 16) for a 38 cm (15 in)
monitor.
15

+• - - - - - • - - • - - - - • • • • • - - - •+• • • • • • - • • • • • • - - - • • • - • - - • - • • • • • • - • • • • • • •+

not used

· i

CURSOR X POSITION

+· .•.• - - - . - •. - - . - - - - • - . ·+- .... - . - - - - - - - •••. - - . - ••••. - - . - - - - - - . - ·+

ADDRESS

= CSR BASE + 2
Figure 2-2:

Cursor X Position Format

2-3

PROGRAMMING INFORMATION'
Table 2·3:

Cursor X Position Bits

+· - - - - - - -+- - - - - - - -+- - - • - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
j BITS
I ACCESS ! DESCRIPTION
I
+- - - - - - - -+- - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - • - - - - - - - - - -+
<15:10>
(not used)

Cursor X position in pixels.
WRITE
<09:00>
+- - - - - - - -+- - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
2.1.3

Mouse Position Register

This register contains mouse X and ·y position values. The values
are counted up or down, in proportion to the direction and amount
of mouse movement.
15
08 07
00
+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
Y COUNT
X COUNT
+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
= CSR BASE + 4

ADDRESS

Figure 2-3:

Mouse Position Register Format

Table 2·4:

Mouse Position Register Bits

+- - - - - - - -+- - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
BITS
ACCESS
DESCRIPTION
+- - - - - - - -+ - - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+
<15:08>
READ
Mouse Y position count.

<07:00>

READ

Mouse X position count.

+- - - - - - - -+- - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+

2.1.4

CRTC Registers

2.1.4.l CRTC Address Register Pointer - This register points to
the one of 17
internal CRTC registers (Table 2-6), that is to
receive the data contained in the CRTC Data Register (described
below).
It also contains three status bits (Figure 2-4 and Table
2 - 5) •

2-4

PROGRAMMING IRFORMATION

+·. - .•.... - - . - .. - - ••.. - - - - .• - - - -+- - -+- - ·+- - -+- - - - • - - .. - - • - . - - •. -+

"'-·

I UST I LPF I VBL I REGISTER ADDRESS

not used

+· - - .. - - - • - .. - - .•. - - - - - - - - . - - - - -+- - -+· - -+- - -+- - - - - - ••. - - - - . - - . - ·+
ADDRESS = CSR BASE + 8

Figure 2-4:

CRTC Address Register Pointer Format

Table 2·5:

CRTC Address Register Pointer Bits

+ •• - •• - • -+ .. - .... -+-. - - ••.. - •.. - • - - - .•. - ... - . - •..•. - . - ....•.... -+
i BITS
I ACCESS
DESCRIPTION
+ .. - - •. - -+ .... - - .. +- - • - ... - ••• - - - - . - - ..•..••. - •.. - ..••... - - .•... +

<15:08>

(not used)

<07>

READ

~pdate

<06>

READ

Light pen register full (1

<05>

READ

Vertical blank (1 = Vblank time)

<04:00>

WRITE

CRTc· internal register address (Table 2 - 6)

strobe (not used)
s

full)

+· - ••... ·+· - .• - . - -+· ...•....•.......•...•.. - - •..•• - .. - . - ..• - ..• ·+

Table 2-6:

CRTC Internal Registers

+·. ·+· .. - - . . . . . . . . . . . - ...... ·+·. - .. - . . . . . . . . . . - . . . . . . . . . - . - .. - . ·+
•REG· NAME
l DESCRIPTION
+·. ·+· - - . - . - . - ..... - ........ ·+· .......... - ...... - . - . - - ....... - - ·+

Horizontal Total

Horizontal Displayed

Hsync Positon

Hsync/Vsync Widths

Vertical Total

Vertical Total Adjust

Vertical Displayed

Vsync Position

The total number of
character
times in a line, minus 1.
The total number of
displayed
characters in a line.
Defines the number of character
times
until
Hsync {horizontal
sync) .
.
Four bits each are used to define
the Hsync pulse width and the
Vsync (vertical sync) pulse width.
Total number of character rows on
the screen, minus 1.
The number of scan
lines
to
complete tr~ screen.
The number of
character
rows
displayed.
Number of character rows until
Vsync.
2-5

PROGRAMMING INFORMATION
Table 2-5:

CRTC Internal Registers (continued)

+· - -+- - .. - .. - . - - .. - . - ..... - . ·+- ... - .. - ... - ..... - .... - - .... - - ... ·+
IREGI NAME
I DESCRIPTION
I
+·. -+· - - .... - - ... - - - .. - .. - - . -+·. - ........... - ... - - - . - . - . - - - - - .. ·+
08

Mode

Maximum Scan Line

Cursor Scan Start

Cursor Scan End

Controls addressing,
interlace,
and cursor.
The number of scan "lines in a
character row, minus l.
Defines the scan line at which the
cursor starts.
Defines where the cursor ends.

12
13

Start Address High
Start Address Low

Defines the RAM location where
video refresh begins.

14
15

Cursor Address High
Cursor Address Low

Defines the cursor position in
RAM.

16
17

Light Pen Position High
Light Pen Position Low

Contains the position of the
light pen.

+···+························+······-········-··················+
2.1.4.2 CRTC Data Register · This register contains the eight
bits of data to be loaded into the internal CRTC register
addressed by bits <04:00> of the CRTC Address Pointer Register
(above).
08

+. - . - - ... - ••. - .........••..•••• ·+·. - ........... - . - - ... - - - - .. - . - ·+

not used

DATA

+· ...... - - - ......•....• - ....•.. ·+· ..... - ...... - ... - . . . . . . . . . . . . ·+
ADDRESS = CSR BASE + 10

Figure 2·5:

CRTC Data Register Format

Table 2·7:

CRTC Data Register Bits

+- ...... ·+· ..•... ·+·. - .. - - ... - .. - - ... - .... - ............. - ...... ·+

BITS

ACCESS

DESCRIPTION

+········+········+·································-·····-···-·+
<15:08>
<07:08>

(not used)

RD/WR

CRTC internal register data

+········+········+································--·-········-+

2-6

PROGRAMMING INFORMATION
2.1.s

Interrupt Controller Reqisters

2.1.s.1 ICDR - The Interrupt Controller Data Register contains
the data for/from the internal Interrupt Controller register
addressed by the last Preselect command (see ICSR, below).
08

+- - - • • • - • • • • • • - - • • • • • • • • - • • • - • - -+ - - - - - - • - • - - • - - • - - - - - - - - - - - - - • • -+

not used

DATA

+· - - . - • - - - . - • - - - ... - - .. - .. - .• - - ·+- - - - - - - - - - • - - - - - - - - - . - - - •. - - - • -+
ADDRESS • CSR BASE + 12

Figure 2·6:

ICDR Format

Table 2·8:

ICDR Bits

+· .•. - .. -+- ... - - - -+- - • - • - - •• - - • - - - - - - - - - - •• - - - ••••• - •• - - - • - •• - • ·+
l BITS
I ACCESS ! DESCRIPTION
+- .....• ·+·. - • - . - -+- .. - - •.•• - - - - - - - • - - - .• - • - • - - - • - - - - - • - •..•.•. ·+

(not used)

<15:08>
<07:08>

RD/WR

Interrupt Controller internal register data

+-. - - - . - ·+-. - . - - - -+- .•.••.. - .... - •••.•••• - • - - - .••.• - - - • - - - - - - - • ·+

2.1.5.2 ICSR - The internal Interrupt Controller registers are
accessed through the ICDR (above) and the ICSR (Interrupt
controller Command/Status Register).
The ICSR is a command
register on write operations and a status register on read
operations.
READ:
08

+· ..•..... - ......... - ..•..••... -+-. ·+·. ·+-. ·+·. ·+·. ·+- •.. - . - ... ·+

not used

,GRiiENAiPRM:INM MMS.IRR VECTOR

+· .............. - . - - - - - - - . - . - . - -+-. -+- - ·+·. -+· - ·+·. ·+· - . - .. - .. - -+

WRITE::
08 07
15
00
+· - . - . - ....... - . - - . - - - .. - . - . - - . ·+· .. - - - - - . - ...... - - ... - .. - - - - .. ·+

not used

COfilMAND

+- - - - - - - . • - - - • - - - - - - - - - - - - - - . - - -+- - • • - • • • - - - - - - - - - - - - • • . - - - - - • - •+

ADDRESS = CSR BASE + 14
Figure 2·7:

ICSR Format

2-7

PROGRAMMING INFORMATION
Table 2·9:

ICSR Bi ts

+· .•. - . - ·+· ••.• - . -+· ..• - - . - - - - - . - - . - - •.• - - ••• - - - - - - - • - •• - - - - . - - -+
BITS
! ACCESS I DESCRIPTION
+· ... - - - -+- - - ... - ·+- - - - - - • - •.• - . - •.•...•..••. - • - •..• - ••. - . - - - - • -+

<15:08>

(not used)

<07>

READ

Group interrupt
(l = interrupt
Vector is in bits <02:00>.

pending).

<06>

READ

Enable (l =chip enabled).

<05>

READ

Priority mode (l =rotating, 0 = fixed).

<04>

READ

Interrupt mode (l =polled, 0 =interrupt).

<03>

READ

Master mask (l =chip armed).

<02:00>

READ

Binary vector of the highest unmasked bit in
the
IRR
(Interrupt Controller Interrupt
Response Register). Valid only when bit <07>
is set.

<07:00>

WRITE

Command (see Table 2-10).

+- - - - . - - ·+·. - - - - . -+· - .• - - - - - • - - - • - - - • - - - - - - • - - . - • - • - . - ••• - . - . - - -+

2-8

PROGRAMMIRG INFORMATION
Table 2·10:
~,

ICSR Commands

+-. - - - - •• -+- - ••• - - - - - - - - - - - - • -+- - - - - - - •••• - - - • - - - • - - - •• - - • - - • - • ·+

l ICSR*
I COMMAND
I <07:00> I

I DESCRIPTION

+- - • - • - - - -+- - - • - ••••• - ••• - - •• -+· .•. - - •••.• - . - • - - . - - . - •.• - - - - - - . -+

00000000

RESET

Sets the IMR (Interrupt
Mask
Register) to all ones. Clears to
zeros,
the
IRR
(Interrupt
Response
Register),
ISR
(Interrupt Service Register), ACR
(Auto Clear Register), and Mode
Register.
Response Memory and
byte
count registers are not
affected.

OOOlOxxx

CLEAR IRR AND IMR

Clears all bits in
!MR.

OOOlOBBB

CLEAR ONE IRR AND
!MR BIT

Clears both the IRR bit and the
IMR bit specified in <02:00>.

OOllOxxx

SET !MR

Sets all IMR bits to ones.

.00111B8B

SET ONE !MR BIT

Sets the
<02:00>.

OlOOOxxx

CLEAR IRR

Clears all IRR bits to zeros.

010018BB

CLEAR ONE IRR BIT

Clears the IRR bit
<02:00>.

OllOxxxx

CLEAR HIGHEST
PRIORITY ISR BIT

Clears the highest priority bit
set in th~ ISR.

OlllOxxx

CLEAR ISR

Clears all ISR bits to zeros.

01111888

CLEAR ONE ISR BIT

Clears the ISR bit
<02:00>.

lOOMMMMM

LOAD MODE BITS
M4:MO

Sets the five low-order bits of
the Mode Register to the value in
<04:00>.

2-9

IMR

bit

the

IRR

and

specified

PROGRAMMING INFORMATION
Table 2·10:

ICSR Commands (continued)

+- - - - - - - - -+- - - - - - - - - - - - - - - - - - -+- - - - - - - - - - - - - - - - - - - • - - - - - - - - • - - - -+
J

ICSR*

I COMMAND

I DESCRIPTION

i <07:00> I

+- - - - - - - • ·+- - - - - - - - - - - - - - - - - - -+- - - - •• - - - - - •• - - - - - •• - - - - - - - - - - - - -+

lOlOMMNN

CONTROL MODE BITS
M7:MS

Sets Mode Register bits 6 and 5
to the value in <06:05>.
Mode
Register bit 7 is set according
to <01:00>, as follows:
01 00
0

0
1

Bit 7
.. - - .......... - ...
Unchanged
Set
Cleared
(illegal)

lOllxxxx

PRESELECT IMR FOR
WRITING

All future write operations to
the ICDR load the data into the
IMR.

llOOxxxx

PRESELECT ACR FOR
WRITING

All future write operations to
the ICDR load the data into the
ACR.

lllOOLLL

PRESELECT RESPONSE
MEMORY FOR WRITING

All future write operations to
the ICDR load the data into the
Response Memory at the interrupt
request level location specified
in <02:00>.

+· .. - .... ·+· - - . - - . - - . - - - - - - - . -+- - - - - - • - - • - - - . - - - - - - - •... - ...•. - ·+
* x = 1 or 0 (doesn't matter)

2.1.5.3 IRR · The 8-bit Interrupt Request
Register
stores
pending
interrupt requests.
An IRR bit is set when the
corresponding interrrupt
request
line
is
asserted;
and
automatically cleared when the request is acknowledged. The IRR
bits can be read, set, and cleared through the ICSR and ICDR.
RESET clears the IRR.
2.1.5.4 IMR - The 8-bit Interrupt Mask Register is used to
enable (bit cleared) or disable (bit set) the corresponding
interrupt request lines. ~ set IMR bit does not disable the IRR
bit, and the request will remain pending until the IMR bit is
cleared. Only •Jnmasked interrupts generate the Group Interrupt
output. All IMR bits are set by RESET.
2-10

PROGRAMMING INFORMATION

2.1.s.s ISR · The 8-bit Interrupt Service .Register stores the
acknowledge status of interrupt requests. When an interrupt is
acknowledged, the controller selects the highest priority pending
request, clears its IRR bit, and sets its ISR bit. ISR bits can
be automatically cleared at the end of the acknowledge cycle or
on specific command. The ISR can be read throught the !CSR and
ICDR. RESET clears the IRR.
2.1.S.6 ACR · The 8-bit Auto Clear Register specifies
the
clearing mode for the ISR.
A set ACR bit specifies the
corresponding ISR bit will be automatically cleared at the end of
the acknowledge cycle: and a cleared ACR bit means that the
corresponding ISR bit must be cleared by the CPU through the ICSR
and ICDR. The ACR can be read through the ICSR and ICDR. RESET
clears the ACR.
2.1.5.7 Mode · The 8-bit Interrupt Controller Mode Register
controls many controller options. The Mode register is loaded
through the ICSR and ICDR. It cannot be read. Bits 00, 02, and
07 are available to the ICSR on read operations. RESET clears
the Mode ~egister. The bits are described in Table 2·11.
Table 2·11:

Interrupt Controller Mode Register Bits

+. . . . . -. +. . . . . . . . . . . . -. . . . . . . . . . . . . . . . . . . . . . - - . - . -. . . . . . . . . . . . . . +
I

BITS

i DESCRIPTION

+···-··-+·················--····································+
07

06:05

MM ·· Master ~ask.
Enables
(set)
(cleared) group interrupts to the CPU.

and

disables

RPl:RPO ·· Repister Preselect.
Select the internal
register to be read when the CPU reads the ICDR:
RPl RPO Register
0
0 ISR
0
1 IMR
1
0 IRR
1
l
ACR

REQP
Interrupt
Request
Polarity.
Determines
interrupt request transition direction for setting IRR
bits. Set = LOW to HIGH, cleared • HIGH to LOW.
(Should always be cleared.)

GIP ·· Group Interrupt (GINT) Polarity. When set, GINT
is asserted HIGH; when cleared, GINT is asserted LOW.
(Should always be cleared.)

2-11

PROGRAMMING INFORMATION

Table 2·11:

IMR Bits (continued)

+- - • - - - . +- - • - ~ . - - - - - - - . - • - - • . - • . - • - • - - • - • - - . • . • - . - • • • - - - • • . • • • . •+
I BITS I DESCRIPTION
I
+·. - - •. ·+· .• - . - - - - - - - - - .. - • - • - • - - • - .•..••.•.• - ..• - • - ..••.••. - - - ·+

IM -- Interrupt Mode.
When set, polled
mode
is
selected, and group interrupt disabled. The controller
will not interrupt the CPU. To respond determine if
there are any pending interrupts, the CPU must read the
ICSR. When cleared, interrupt mode is selected, and
group interrupt functions normally.

vs -- vector Selection. When cleared, each interrupt
will generate its own vector (contained in Response
Memory). When set, all interrupts generate the same
vector (request level 0 vector).

PM·- Priority Mode. When cleared (fixed priority),
level 0 interrupt requests are the highest priority,
level 7 the lowest. When set (rotating priority), the
last
interrupt level serviced becomes the lowest
priority level.

+·. - - - • -+· •.... - . - - . - - - .... - - .•.•. - ...•..•....•...... - ........• -+

2.1.6

UART Registers

2.1.6.l Mode Registers lA And 2A · These UART registers are
accessed by two successive references to the same I/0 address.
lA:
15

+·. - - . - . - . - - . - - - . - - .. - - • - - - - - - . -+· - -+·. -+· - ·+· ... - . ·+-. ·+-. - ..• ·+

not used

RRC:RIS ERM, PAR MOD:PAT,8/CHAR

+- - - - - . - .... - - - - - .. - •. - - •. - . - - - ·+- - ·+- - ·+- - ·+· .... - -+· - -+-. - - . - ·+

2A:

+-. - - . - - - - - . - - . - - . - - - - - - .. - . - - - ·+· ... - . ·+·. -+- - ·+· - - . - - - - . - - - - - ·+

not used

:CH MODE1TRC'CET!STOP BIT LENGTH

+- .. - - - - - - - - •. - •. - - - - • - • - • - • - - - -+- - - - - . -+-. -+-. -+- - - - - - - - - - - •• - -+

ADDRESS

= CSR BASE + 32
Figure 2·8:

Mode Registers lA and 2A Format

2-12

PROGRAMMING INFORMATION
Table 2·12:
'"-'

Mode Registers lA and 2A Bits

+ - - • - • - - - + - • - • - - • - + - - - - • - - • - - - - - • - • - - - - - - - - - - - - - - - •• - - - - •• - - - - - - +
I BITS
I ACCESS ! DESCRIPTION
I
+- •• - ••. -+- - - . - - • ·+- - - - - - • - - - - - - - - - - - - - - - - •• - •• - - - •• - • - • - ••••. - -+

<15:08>

(not used)

lA:
<07>

RD/WR

Rx (receive) RTS (request
( 1 • no) .

<06>

RD/WR

Rx interrupt select (1 •FIFO full).

<05>

RD/WR

Error mode (1 •block).

<04:03>

RD/WR

Parity mode (10 =no parity).

<02>

RD/WR

Parity type (l •odd).

<01:00>

RD/WR

Bits per character (11

<07:06>

RD/WR

Channel mode (00 =normal).

<05>

RD/WR

Tx (transmit) RTS control (1 •no).

<04>

RD/WR

CTS (clear-to-send) enable Tx (1 •no).

<03:00>

RD/WR

Stop bit length (0111

"---

send)

control

= 8).

2A:

= 1 bit).

+· .. - ... ·+·. - - - - - -+- - - - - .. - . - - - - - - - - . - - - - . - - . - - . - . - . - .. - - - . - . - . ·+

2.1.6.2 Mode Registers lB And 2B · (ADDRESS • CSR BASE + 48) See
Mode Registers lA and 2A
2.1.6.3 Status/Clock Select Register A · This register returns
UART status information on a read, and selects the Transmit and
Receive baud rates on a write.

2-13

PROGRAMMING INFORHATIPN
READ:
15

08 07 06 OS 04 03 02 01 00
+· - .......... - ....... - - ........ -+·. ·+· - -+- - ·+·. ·+·. ·+· - ·+·. ·+·. ·+
not used

iRXBIFERIPERIOERITXEITXRjFFL!RXRI

+· - - .... - ...... - .. - ....... - - - - . ·+·. ·+·. ·+·. ·+·. ·+·. ·+· - ·+·. ·+· - ·+

WRITE:
15

+· ..... - ...... - ... - . - ......... - ·+· - ...... - ..... ·+· ............. ·+
not used

iRX CLOCK SELECTITX CLOCK SELECT!

+································+···············+···············+

ADDRESS = CSR BASE + 34
Figure 2·9:

Status/Clock Select Register A Format

Table 2·13:

Status/Clock Select Reqister A Bits

+· •.••.• ·+· - ..... ·+· ....... - - ..... - . - - ............... - ...... - .. ·+

I BITS

! ACCESS i DESCRIPTION

+· ...... ·+· ...... ·+· ... - .. - ...... - ... - - .. - ....... - . - . - . - ... - ... ·+

<15:08>

(not used)

<07>

READ

Received break (1 •yes).

<06>

READ

Framing error (1 •yes).

<05>

READ

Parity error (1 •yes).

<04>

READ

Overrun error (1 •yes).

<03>

READ

Transmitter empty (1 =yes).

<02>

READ

Transmitter ready (1 =yes).

<01>

READ

FIFO full (1 =yes).

<00>

READ

Receiver ready (1 =yes).

<07:04>

WRITE

Receiver clock select (1001

<03:00>

WRITE

Transmitter clock select (1001 = 4800 baud).

= 4800 baud).

+········+········+·············································+
2.1.6.4 Status/Clock Select Reqister B . (ADDRESS = CSR
50) See Status/Clock Select Register A

2-14

BASE

PROGRAMMIRG IRFOIUIATION

2.1.6.S Command Register A - All the bits in this UART
are write access only.

+·. - .. - .. - . - - ... - - ... - ......... ·+·. ·+· ••. - - - - - - -+-. -+- - ·+· - ·+· - ·+

I 0 !MIS COMMANDIDTXIETXIDRXIERXI

not used

+- -- - . - - • - - •... - .. - - - • - - . - - . - •• ·+-. -+- - •• - - - - •• ·+·. ·+-. ·+- - -+- - ·+

ADDRESS = CSR BASE + 36

Figure 2·10:

Command Register A Format

Table 2·14:

Command Register A Bits

+· - ..... ·+· ...... ·+- - . - - .. - - .. ~ - - - - .. - - .... - .. - - . - .... - . - - - • - - . ·+
i ACCESS i DESCRIPTION
I BITS
+·. - . - - • -+- - .. - - - -+- - - - - - - - - - - - • - - • - • - •••••• - - •••• - • - • - - •••••• - -+

<15:08>

(not used)

<07>

WRITE

(spare - must be zero).

<06:04>

WRITE

Miscellaneous commands:
000 NOP (no operation)
001 Reset mode register pointer. Causes the
Mode
Register
pointer
to point to
register l.
010 Reset receiver
011 Reset transmitter
100 Reset error status. Clears error status
bits
<07:04>
in Status/Clock Select
Register.
101 Reset channel A break-change interrupt.
Clears Interrupt Status/Mask Register bit
<02>.
110 Start break
111 Stop break

<03>

WRITE

Disable Transmitter (1 •yes).

<02>

WRITE

Enable Transmitter (1 •yes).

<02>

WRITE

Disable Receiver (1 =yes).

<00>

WRITE

Enable Receiver (1 =yes).

+· - •...• -+· . . . . . ·+- - - ... - .............•..... - ...•.... - - ...... - ·+

2-15

PROGRAMMING INFORMATION ,

2.1.6.6 Command Register B - (ADDRESS
Command Register A
2.1.6.7

•

-CSR

BASE

52)

See

Transmit/Receive Buffer A 08

+- - - - - - . - - - . - - - - - - - - . - - - - - - - - - . -+- - - - - - - - - - - - - - - - - - - - - . - - . - • - . - ·+

not used

DATA

+· - - .. - - - .. - - - ...... - . - .. - .. - . - ·+·. - ........ - - .. - - - - - .. - ... - - .. ·+
ADDRESS • CSR BASE + 38

Figure 2·11:

Transmit/Receive Buffer A Format

Table 2·15:

Transmit/Receive Buffer A Bits

+· - . - .. - ·+· .. - ... ·+· ........ - ........ - ............... - - - - - - - . - . -+
! BITS
I ACCESS
DESCRIPTION
+ . . . . . . . . +. - . . . . . -+ - • • - • - • • - • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • - • • • • +

(not used}

<07:00>

READ

Receive data.

<07:00>

WRITE

Transmit data.

+· ...... ·+·. - - . - . -+-. - . - .. - . - ... - - .. - . - .... - . - ..... - . - ........ - ·+

2.1.6.8 Transmit/Receive Buffer B · (ADDRESS
See Transmit/Receive Buffer A

CSR

BASE

54)

2.1.6.9 Interrupt Status/Mask Register · This register transfers
interrupt status on a read. On a write, set bits enable the U.\RT
interrupt request associated with the corresponding status bit.
READ:
15

+- - ••• - •••• - - - - - - • - - • - ••• - ••••• ·+-. ·+·. ·+·· ·+·. ·+·. ·+·. ·+· - ·+· - ·+

not used

;IPCiCBB!RBI!TBI:CRiiCBA!RAiiTAI

+· - ... - - ....... - . - - - ........ - .. ·+·. ·+·. ·+·· ·+·. ·+·. ·+·. ·+·. ·+·. ·+

WRITE:
15

+·························-·····+·······························+
not used

MASK

+· .... - - ... - - .... - .... - .... - - . - ·+ ... - .• - . - ..•.... - ............. ·+

ADDRESS

= CSR BASE + 42

Figure 2·12:

Interrupt Status/Mask Register Format

2-16

-~-

PROGRAMMING IRFORJIATIOR

Table 2·16:

Interrupt Status/Mask Register Bits

+- - - - - - - -+- - - - ... ·+· •••••... - - •. - - - .....• - . - . - . - . - - ••.•...•.. - .. +

! BITS
I ACCESS I DESCRIPTION
I
+-. - - . - . ·+· - . - .. - -+~ ... - . - ..... - . - - - ... - .... - ...... - .... - . - .... ·+
<15:08>

(not used)

<07>

READ

Input port change (l •yes).

<06>

READ

Change in break B (l •yes).

<05>

READ

Receiver ready/FIFO full B (l •yes).

<04>

READ

Transmitter ready B (l =yes).

<03>

READ

Counter ready (l •yes).

<02>

READ

Change in break A (1 •yes).

<01>

READ

Receiver ready/FIFO full A (l •yes).

<00>

READ

Transmitter ready A (l •yes).

<07:00>

WRITE

Bit-for-bit mask to enable interrupt request
asscociated
with
the above status bits
(00000010 = enable Receiver Ready interrupt
on channel A).

+········+········+·············································+

2-17

CHAPTER 3
MAIRTBNAJJCE

This chapter briefly describes waintenance features, diagnostic
procedures, and monitor alignment. A troubleshootirig flow (Table
3-11) is included at the end of the chapter.
For
more
information see Chapter 5 in the VAXstation I Technical Manual,
EK·VS200·TM.
3.1

MICROVERIFY

Microverify is automatically executed at
response to the console-mode TEST command.

power-up,

and

runs in single-pass mode, but can
in multiple-loop mode (see Chapter

be
1,

CAUTION - Console Mode
Before entering console mode, all open files
should
be
closed,
and
all open accounts
logged-off the system. The console interface is
described in Appendix A of the VAXstation I
Owner's Manual, EK·VS200-0M.
Microverify normally
configured
to
run
subsection 1.2.1.2)

In single-pass mode, the result of Microverify
reported on the monitor screen as follows:

3-1

execution

MAINTENANCE
MICROVERIFY STARTED

(approximately five seconds later:)
MICROVERIFY PASSED
(Or}

MICROVERIFY FAILED

When Microverify, including the VCBOl self ·tests, is successfully
completed and bootstrap is initiated, the keyboard bell sounds.
3.1.l

Microverify Error Reporting

If the MICROVERIFY FAILED response is displayed, the system
returns to console mode, and the >>> console prompt is displayed
on the screen. Failures are reported in the seven-segment LED
located on the CPU insert in the Patch and Filter Panel assembly
(and in the LEDs on the M7135·YA OAP module).
A blinking code
indicates a VCBOl self ·test failure.
The failure codes are
listed in Table 3·1.
Table 3·1:

Microverify Error Codes

+·. -.. - . -... ·+· .................. -.. -- -- - -. - ............ - -..... ·+
CODE

DESCRIPTION/ACTION

+··---······ ·+···········-······································+
7

Microverify failed before completing t~e
microsequencer test. Error on OAP module.

M7135·YA OAP error.

M7136 MCT error.

3-2

OAP

HAIRTBNARCE

Table 3-1:

Microverify Error Codes (continued)

+- - .••• - - - . - -+-. - - - ...••• - - - - - - • - . - - - • - •• - •• - - - - - - - - - • - - - - - - - - - -+
I
CODE
I DESCRIPTION/ACTION
I
+ •••••• - - - • - • +· •.• - - •.....•.....•. - •.•.•.....• - - - - - - - - - - - . - - - - . -+

Undertermined error in DAP/MCT interface.
be OAP, MCT, or interconnect cable.

Memory error.
diagnostics.

Run CPU (EHKAA) and memory

Boot device
controller.

was

Unable to boot from selected
fault).

not

found.

Could
(EHXMS)

Check

device

RQDXl

(media/drive

(period) Primary bootstrap successful.
passed to secondary bootstrap.

Control

BLINKING 7
BLINKING 6

Scan line map test failed if either blinking 7 or
blinking 6 is displayed. Replace the VCBOl.

BLINKING 5

Keyboard
power-up
self-test
failed.
Check
keyboard
cable
and
BClBT-10
video
cable
connections, or replace the keyboard, or replace
the VCBOl.

BLINKING 4

DUART polled loop-back test failed.
VCBOl.

BLINKING 3

Bitmap memory test failed.

BLINKING 2

Make sure the
backplane slot

Replace

the

Replace the VCBOl.

VCBOl is in
(see Chapter

the
2,

correct
subsection

2. 1) •
b)
C)

Make sure the MSA is set to 3840 k.
switch pack El4, Sl:S4 all OFF.
Replace VCBOl.

3.3

VCBOl

MAINTENANCE
Table 3-1:

Microverify Error Codes (continued)

+· ..... - -... ·+· ............... -..... - . - .... - - - - - - - - -.. -.. -..... ·+
!
CODE
l DESCRIPTION/ACTION
+· ..... - . - .. ·+· .... - - - - .. - - ... - - ..... - . - .. - - - - .. - .... - ..... - - .. ·+

BLINKING l

Failed CSR test:
a)

Make sure that the CSR base address is 177200.
VCBOl switch pack E48:
51
ON

53
ON

54
ON

SS 56
OFF ON

OFF

Replace VCBOl.

+·. - ..... - .. ·+· ..... - .. - ........ - ........ - ...............• - .... ·+

3.1.2

Monitor Display Errors

In addition to displaying diagnostic failure reports, the monitor
display itself may indicate errors, as described in Table 3-2.
Table 3·2:

Monitor Display Errors

+· ...... - . - ·+· ........................•. - . - - .. - ... - . ~ .... - ..... ·+

l DESCRIPTION/ACTION

i DISPLAY

+···········+···················································+
HALF-PAGE

Check VCBOl switches E68 and E48 58.

IMPROPER
SYNC

Check VCBOl switches E68 and E48 58.
E68
""' OFF
E48 SB • ON

+···········+·····-·············································+
3.2

STANDALONE DIAGNOSTICS

The standalone diagnostic comprise:
o
0

Macroverify (EHKMV)
CPU Diagnostic (EHKAA)
Memory Diagnostic (EHXMS)

The three diagnostics are

contained
3-4

one

diskette,

labeled

MAINTENANCE

"MICROVAX DIAGNOSTICS
console mode.
3.2.l

.3, 11 and are run with the system in

Macroverify

Macroverify (EHKMV)
is
normally
run
to
verify
system
installation, and run before any other diagnostics to isolate
faults. Running Macroverify does not destroy disk data.
3.2.l.l Running Macroverify - Figure 3-1 is
Macroverify run reporc. To run Macroverify:

example

Close any open files and log-out any open accounts.

Turn system power OFF.

Disconnect external cables from the
(if any).

Turn monitor power ON.

Turn system power ON.

Enter console mode (press the HALT button twice).

Insert a blan~ diskette in drive 2.

DZVll

panel

Insert the MICROVAX DIAGNOSTICS 1 of 3 diskette in drive
1.

patch

In response to the >>> console prompt type:
>>> B DUAl<RETURN>

3-5

MAINTENANCE

-- - -- - . -- . . . - -- - . - --- -- --- - - -- --- . --- -- --- -- - --- -. - - --- -- - ---- -- ---- - >>> B DUAl
ATTEMPTING BOOTSTRAP
Mac rove ri fy Vl. 7
This MicroVAX is at microcode revision level 5, hardware revision
level 1, and includes support for F FLOAT and D FLOAT data types.

Testing

Time to
Test (Mins.)

Memory
0:50
Disk unit DUAO 0:20
Disk unit DUAl 0:20
Disk unit DUA2 0:20
0:40
DLVJl
DZVll
DEQNA
VCBOl

0:40
0:10
0:10

Comments
TEST SUCCEEDED { 1. 0 MB)
TEST SUCCEEDED (RD52)
TEST SUCCEEDED (RX50)
TEST SUCCEEDED (RX50)
DEVICE DLVJl WITH CSR 776500 NOT FOUND.
NO TESTING PERFORMED.
TEST SUCCEEDED
TEST SUCCEEDED (Address•AA·00·03·01·10)
TEST SUCCEEDED

Macroverify test completed.
Press RETURN key to enter console command mode.

Figure 3·1:

Macroverify Run Report

Verify that the reported memory size (1 MB in Figure 3-1) is the
size of memory installed in the system. If not, run the Memory
Diagnostic (EHXMS, described below).
Macroverify tests each device to see if it responds to its
assigned Q2·bus address.
If the device does not respond, no
testing is done and Macroverify outputs the device name, CSR
address, and vector address (see DLVJl in Figure 3·1). The
vector address is not output for devices with floating vectors
(such as the DLVJl and DEQNA). Verify that devices not found are
not installed.
For devices that do respon_, the test result is reported as
~ither
TEST SUCCEEDED or TEST FAILED.
If a given test time
exceeds the minutes indicated in Time to Test (Mins.)
(that is,
SU~CEEDED
or FAILED status is not reported), assume the device
3-6

"-...-

MAINTBRARCE

·'-.._..

failed. A complete Macroverify run takes approximately four
minutes. If a device fails Macroverify testing, run the specific
device diagnostic.
3.2.1.2 Macroverify Error Messages - The diagnostic
reports
·operator and hardware errors In the Comments column (Figure 3-1).
The following list gives some examples and corrective action.
MESSAGE: Please verify that the cable from the DEQNA module to
the DEQNA patch panel assembly is correctly connected.
Please verify that the fuse at the DEQNA patch panel
assembly has not blown.
ACTION: Check cable connection and fuse.
MESSAGE: This unit either has no media or has been disabled.
Please correct and rerun this diagnostic.
ACTION: Make sure the Fixed Disk Ready pushbutton (on the system
control panel) is in the out position (glowing green)
and that the diskettes are correctly inserted.
Re-run
Macroverify.
MESSAGE: This disk is not hardware formatted. Please format the
disk, or, if this is a diskette, please use another
diskette with correct hardware format and rerun this
diagnostic.
ACTION: Fixed-disk -· run the disk subsystem diagnostic.
Diskette -· Insert the correct diskette and
re-run
Macroverify.
MESSAGE: This disk is write protected. Please enable writing on
the disk and rerun this diagnostic. NOTE: Testing will
not destroy disk data.
ACTION: Fixed-disk -- put the Fixed Disk Write Protect and Ready
push buttons (on the system control panel) in the out
position (Write Protect does not glow, Ready glows
green).
Diskette -- Remove the write protect tab from
the
diskette or replace the diskette with one that has the
write protect tab removed.
Insert the diskette (the
Removable Disk Write Protect indicator(s) should be
off). Re-run Macroverify.
3.2.2

CPO Diagnostic

This diagnostic (EHKAA) is run when a CPU fault is indicated by
Microverify or Macroverify failing, intermittent system problems,
or failure to bootstrap correctly.

3-7

MAINTENANCE
3.2.2.l Running The CPU Diagnostic - Figure 3-2 is an example of
a CPU diagnostic run report. To run the diagnostic:
1.

Insert the MICROVAX DIAGNOSTICS 1 of 3 diskette· in drive
1.

In response to the >>> console prompt enter:
>>> B/100 DUAl<RETURN>

Enter the CPU diagnostic file name
prompt appears:

when

the

Bootfile:

Bootfile: [SYSO.SYSMAINT)EHKAA.EXE<RETURN>
The test will start running, and report every 10
passes
(approximately 20 seconds) as shown in Figure 3-2. It will
continue to run until an error is detected, or until it is
stopped (press HALT pushbutton twice).

EHKAA Vl.13 CPU Test
EHKAA Vl.13 pass number
EHKAA Vl.13 pass number
EHKAA Vl.13 pass number
EHKAA Vl.13 pass number
EHKAA Vl.13 pass number
EHKAA Vl.13 pass number

Figure 3·2:

10 done!
20 done!
30 done!
40 done!
50 done!
60 done!

CPU Diagnostic Run Report

3.2.2.2 CFU Diagnostic Error Reporting · If the
diagnostic
detects an error, it executes a HALT instruction, and outputs an
error message in the format:

3-8

MAINTENANCE

....... ---------·- ·--------------·--·-----·--·-·----·--·--·-····--·???Error Test n subtest n problem
problem description
No expected/received data
(Or)

Expected · nnnnnnnn
Received · nnnnnnnn

Figure 3·3:

·~

CPO Diagnostic Error Message Format

If the CPU fails, replace the DAP module and re-run the
diagnostic.
If the CPU fails again, replace the MCT module.
(Also see the Troubleshooting Flow, Table 3-11.)
3.2.3

Memory Diagnostic

The Memory diagnostic (EHXMS) is run to isolate a ~.aili.n9~· mem.£..(1
module when the operating system detects memory er ruts or-·when'
intermittent program failures indicate possible memory problems.
The tests are described in Table 3-3.
Before running the Memory diagnostic, the CPU
be run to verify CPU operation.
Table 3·3:

diagnostic

should

Memory Diaqnostic Tests

+-·-·+··············································-···········+
'TEST• DESCRIPTION

+····+···························································+
l

CSR FUNCTION TEST·· Determines the number of CSRs present
and that they set and clear correctly when the Q22·bus is
initilaized.

MEMORY CONFIGURATION TEST ·· Verifies the size of memory,
memory contiguity, and the CSR/memory correlati~n.

MEMORY ADDRESS TEST PART 1
Memory addresses are written
and verified, one longword at a time.

MEMORY ADDRESS TEST PART 2 ·· Two's complement memory
addresses are written and verified, one word at a time.

3-9

MAINTENANCE

Table 3·3:

Memory Diagnostic Tests (continued)

+· - . ·+- ......... - - .••......•..... - .•••................•.•...... ·+
:TEST! DESCRIPTION
+· .. ·+·. - - - ...... - .. - ... - ... - - ....... - .....•... - - . - .•.......... ·+

MEMORY ADDRESS TEST PART 3 .. The 16 kB bank
written and verified, one byte at a time.

number

MEMORY ADDRESS TEST PART 4 ·· The two's complement 16 kB
bank number is written and verified, one byte at a time.

WORST CASE NOISE
TEST ··A
series
of
stuck-at-0,
stuck-at-1,
and worst-case word parity patterns are
written and verified, one word at a time.

MEMORY PARITY TEST ·· Forced bad parity, together with a
set of worst-case patterns, is written into each byte in
memory. This test is executed only if the parity option
is enabled, by entering an ENABLE PARITY command.

DATIO TEST .. Uses the Q22-bus DAT IO
memory data, one word at a t irne.

function

write

DATIOB TEST . - uses the Q22-bus DAT I OB function
memory data, one byte at a time.

write

INSTRUCTION EXECUTION TEST .. Executes a series of simple
instruction sequences, from locations throughout memory.

MARCHING ONES AND ZEROS TEST .. Exercises each 16 kB
memory bank by writing and reading several passes of
alternating bytes of ones and zeros. Memory refresh and
quadword memory references are also checked.

+·. - ·+- ....... - ... - ...... - ..... - - . - ... - ......... - ..... - . - ...... ·+

3.2.3.l Running The Memory Diagnostic · The diagnostic control
keys, commands, and options are described in Tables 3-4, 3-5, and
3. 6.

3-10

..
MAIRTERABCE

Table 3·4:

Memory Diaqnostic control Keys

+-. - - - •.• ·+· .•......• - . - ...... - - - . - - •. - • - •. - ..••.. - • - - - - - - . - .• - -+
I KEY
I DESCRIPTION
I
+. - .. - .. - -+- - • - • - - .• - ••• - - •. - •• - - - - - - •• - - - - - •. - - • - - - - - - - - . - - - - • -+

Backspaces one character and deletes it. The deleted
character is displayed, preceded and followed by a
backslash (\).

<CTRL>U

Deletes and ignores the current line of text.

<CTRL>R

Reprints the current line of text
characters and backslashes omitted.

with

deleted

+. - - •••.. -+- •• - - ••• - •••••••• - - ••••• - • - • - - •• - - - ••• - - - - • - - ••• - - - - -+

Table 3-5:

Memory Diagnostic Commands

+. - . - - - . - . - ... - +- .•• - • - - • - - .•• - • - ••• - •• - - - - - •• - .•••. - .•••••.•. - ·+
I COMMAND
! DESCRITPION
+-. - .•. - - - - ... -+· •... - - - ... - - .. - . - - - - - - •. - . - .. - . - .. - ..... - . - - .. ·+

HELP

Provides information about the commands.

ENABLE

Selects a command option.

DISABLE

Disables a command option.

MEMORY.SIZE n

Specifies the amount of installed memory.

START n

Starts the test(s).

VIEW

Shows the status of command options.

+ •••• - - - • - - - •• -+ ..••• - •• - •••.•.. - • - •• - - - • - • - - ••••• - - - - •• - - . - - •. -+

3-11

MAINTENANCE
Table 3·6:

Memory Diagnostic Command Options

+· •• - - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - •• - - - - - - - - - - - - - • - - - - -+

I OPTION

I DESCRIPTION

+- - - - - - - - - - -+- - - - - - - - - - - - - - - • - - - - - - - - - - - - - - - - - - - - - • - • - - - - - - - • - - -+

BELL

Sounds keyboard bell upon error detection.

ERRORS

Prints error messages upon error detection.

HALT

Halts the test upon error detection.

LOOP

Loops on test upon error detection.

MAP

Outputs a memory map.

PARITY

Enables Test 11 execution.

RELOCATION

Causes the diagnostic to relocate itself in
during testing. E*

TRACE

Prints status after each test.

E*
E*
memory

+- - - - - - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - • -+

E*
D*

Default enabled.
Default dis~~led.

To run Che diagnostic:
1.

Insert the MICROVAX DIAGNOSTICS 1 of 3 diskette in drive
1.

respons~

to the >>> console prompt enter:

>>> B/100 DUAl<RETURN>
3.

Enter the CPU diagnostic file name
prompt appears:

when

the

Bootfile:

Bootfile: [SYSO.SYSMAINT)EHXMS.EXE<RETURN>
A header message with the diagnostic version number, and
the EHXMS> prompt, wiil appear on the screen. Testing
is continued by typing commands in response to the
prompt.
4.

To display status after each test, enter:
EHXMS> ENABLE TRACE<RETURN>

3-12

MAINTENANCE

Enter the memory size {in kilobytes), for example:
EHXMS> MEMORY.SIZE 1024<RETOR.N>

To run all the memory tests, enter:
EHXMS> START<RETOR.R>
There are 12 memory tests
particular test, enter:

{Table

3-3}.

run

EHXMS> START n<RETOR.R>
where n is the number of the test.
7.

To get descriptions of the diagnostic commands, options,
and syntax, use the HELP command:
EHXMS> HELP<RETURN>
The command options are enabled and diabled
ENABLE and DISABLE commands. For example:

with

the

enables (and is required} to run the Memory Parity
{Test 8).

Test

EHXMS> ENABLE PARITY<RETOR.N>

The status of the options, and the specified memory size
can be displayed with the VIEW command:

EHXMS> VIEW<RETURN>
Options status: BELL = ENABLED, ERRORS • ENABLED,
HALT = ENABLED, LOOP = DISABLED,
MAP • ENABLED, PARITY = ENABLED,
RELOCATION = ENABLED, TRACE = DISABLED
Memory size

= 1024 kB

:::

Figure 3·4:

Memory Diagnostic EHXMS View Command

3·13

MAINTENANCE
8.

The diagnostic will loop through the specified test(s)
until stopped.
To stop testing and return to the
prompt, enter <CTRL>C. To exit the diagnostic press the
HALT pushbutton (on the system control panel).

3.2.3.2 Memory Diagnostic Error Reporting - The diagnostic will
print error messages in two formats, one for operator error
(Figure 3-5) and the other fo~ memory errors detected by tests
(Figure 3-6).

EHXMS - message text

Figure 3·5:

Memory Diagnostic Operator Error Format

EHXMS - Error durnig test n, subtest n
testname, subtestname
message text

Figure 3·6:
3.3

Memory Diagnostic Memory Error Format

VOS DIAGNOSTICS

The VDS diagnostics are contained on two diskettes, as follows:
Diskette:

MICROVAX DIAGNOSTICS
2 of 3

MICROVAX DIAGNOSTICS
3 of 3

(EHXRQ) Storage Subsystem
(EHXDZ) DZVll
(EHXQN) DEQNA

(EHXVS) VCBOl

Table 3-7 is a summary of the VOS commands needed to run
diagnostics. The diagnostics are booted from console mode.

3-14

the

MAIRTBNARCB
CAUTION - Console Mode
Before entering console mode, all open files
should
be
closed,
and
all open accounts
logged-off the system. The console interface is
described in Appendix A of the VAXstation I
owner's Manual, EK·VS200·0M.

'--·

Table 3·7:

VDS Command Summary

+· ••.....•.. - - .•. -+- .••.......•.....••••.••••.••• - - • - - . - . - .••. ·+

! COMMAND/
: QUALIFIER

DESCRIPTION

+· - .. - . - ...... - .. ·+· ...... - ...•..••. - ........... - - - ...... - . - . - . ·+

ATTACH

Defines the device to be tested, and path
the device, in the following order:
1.

2.
3.
4.

device type
link type
device name
CSR base address (octal)
vector address (octal)

Note that every item in the
apply to a particular device.

list

may

not

DEATTACH

Used to correct ATTACH command mistakes.

HELP EHXnn

Displays information about the diagnostic,
where nn identifies the specific diagnostic
mnemonic.

RUN

EHXnn

Loads and starts the diagnostic.
used
in
place
of the LOAD
commands.)

(Sometimes
and START

LOAD EHXnn

Copies the diagnostic into system memory
execution.

START EHXnn

Executes the diagnostic.

3·15

for

MAINTENANCE
Table 3·7:

VDS Comm.and Summary (continued)

+· .........•.•. - . ·+· - - - - - - - - - - - . - - - .....•.. - . - •.• - - - - - - - - •. - ..• ·+

I COMMAND/
I DESCRIPTION
! QUALIFIER
l
+· ...... - .. - - - - . - ·+· .• - - . - - - - - - - .. - - .• - .... - . - - - - - - - . - - - - - - - - .. ·+
/PASSES•n
Where n is the number of times the diagnostic
will be run.

/SECTION-name

Where name is the specific test or section of
the diagnostic selected for execution.

SET EVENT FLAG n

Where n specifies a specific test condition.

SELECT

Identifies the UUT (unit under test).

+· ... - .. - .... - ... ·+·. - .. - - . - ....•. - .• - - - ...... - . - - - - .. - . - - . - - . - ·+

3.3.l

VCBOl Diagnostic (EHXVS)

The diagnostic comprises 14 tests/routines (described in Table
3-8).
The tests are structured in nine sections; four ·of which
are selectable (Table 3·9).
The monitor screen should be observed while the tests are
running, to verify correct operation. More specifically, Tests
12, 13, and 14 require visual verification.
Error messages are displayed in standard VDS format. When there
is no apparent output or activity for certain tests, the keyboard
WAIT LED is turned-on, to indicate that the software is running.
Table 3·8:

VCBOl Diagnostic Tests

+·. - -+· .. - ..... - - • - ....•••..... - ....•.... - • - .•.•.... - ... - - .• - •. ·+

TEST! DESCRIPTION

+ •.•• + •••••••••••••••••••••••••••••••••••••••••••••••••••••••••• +

REGISTER PROBE TEST ·· Performs an access test on the
VCBOl I/O registers residing on the Q22-bus. The test is
checking for bus time-outs resulting from the register
probe.

BITMAP MEMORY TEST ·· Performs byte, word, and longword
read/write operations on the 512 kB on-board memory.
Memory addressing, time-outs, and invalid memory responses
are
~becked.
using alternating ones-and-r1ros data
patterns.

3-16

MAIR'.l'BNANCE

Table 3·8:

VCBOl Diagnostic Tests (continued)

+· - . ·+· - - - - - - . - - - - - - - - .. - - - . - - - - . - - - - . - - - - - .. - - - - - - . - - - - . - - - - - - -+
[TEST! DESCRIPTION
I
+-. - ·+-. - . - - - - - - - - . - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - .. - -+

INTERRUPT CONTROLLER R/W -- Tests the internal functions
of
the
Interrupt
Controller chip, with interrupts
turned-off at the CSR and the Interrupt Controller.
(Because
interrupts
are
turned-off,
the Interrupt
Controller response memory is not tested.)

INTERRUPT CONTROLLER
INTERRUPT
TEST •· An
Interrupt
Controller internal test, including response memory, with
interrupts enabled, using fixed and rotating interrupts.

DUART REGISTER R/W TEST -- Tests
all
the
internal
read/write registers in UARTs A· and B, using all-ones,
all-zeros, and alternating ones-and-zeros data patterns.

DUART LOOPBACK TEST -~ Using the chip's internal loopback
facilities, verifies that both UARTs can transmit data at
all baud rates. The patch panel and cables can be tested
if
an external loopback connector is used and the
appropriate event flag is set.

DUART INTERRUPT
DRIVEN
LOOPBACK
TEST -- Using
the
Interrupt Controller to drive the software, this :est
verifies that data can be transmitted through the DUART.
The patch panel and cables will be tested if an external
loopback connector is used; otherwise, only the internal
loopback path will be tested.

CURSOR TEST .. Tests the CRTC and the Cursor RAM.
Using
the video readback path, the following functions are
checked for valid responses:
o
o
o
o

cursor positioning
cursor RAM
cursor-generated interrupts
cursor enable/disable

SCAN LINE MAP TEST .. Tests each word in the Scan Line Map
RAM.
Data patterns are written into the RAM and verified
using the video readback path.

3-17

MAINTENANCE

Table 3·8:

VCBOl Diagnostic Tests (continued)

+. - . -+- - • - - - - - - - •• - - • - - - - - • - • - - - • - - - - - - • - - - - • - • - - - - - - - - - - • - - - •• -+

iTEST! DESCRIPTION

+- - - ·+· - - - - - - - - - - - - - - - - - - - - - - - - - •.. - • - - - - - .• - • - - • - . - - - - • - - ••. - • ·+

MOUSE COUNTER TEST -- Using exetrnal loopback connectors,
the CSR, and UART B, this test forces the mouse X/Y
counters to count up and down.

MEMORY REFRESH TEST ·· Verifies
VCBOl's memory refresh circuitry.

ODD/EVEN PIXEL GENERATOR ·- Verifies the video
shift
registers (requires visual verification).
Odd pixels
should be displayed on the top-half of the screen and even
pixels on the bottom-half. If half or all of the screen
is blank, then a problem exists in either or both shift
registers.

MOUSE AND KEYBOARD INTERACTIVE
TEST -· Displays
the
pointer icon, and a test pattern comprising a square in
each corner of the screen. The test also initializes the
keyboard.
The icon should reflect mouse movement, and a
check is made to see if the returned mouse coordinates
compare to the coordinates of the squares displayed on the
screen. Any combination of depressed mouse buttons should
display the equivalent octal code, and the code for any
depressed keyboard key should be displayed.

ALIGNMENT PATTERN
alignment pattern.

the

operation

GENERATOR -- Displays

the

monitor

+·. - ·+- - ....... - - - - . - - .. - .. - . - - . - - - - ..... - - - - - . - •.. - . - ...•. - . - - -+

3-18

MAINTENANCE
Table 3·9:

"---

VCBOl Diaqnostic Sections

.•.••...•. + •.•..•••.... - ••••••.. - ••..•• - ..•••.••..• ·+ • ••••....••
I
TESTS
I
SECTIONS

+··+··+··+··+··+··+··+··+··+··+··+··+··+··+SELECTABLE

! 11 2! 31 41 51 6! 71 81 9110jll!l21131141
·-········+··+··+··+··+··+··+··+··+··+··+··+··+··+··+···········
MEMORY
I x! x I
I
I
I xI i xI xI I I
··········+··+··+··+··+··+··+··+··+··+··+··+··+··+··+···········

INTERRUPT I

I XI X!

I XI

i XI

-·········+··+··+··+··+--+··+··+··+··+··+··+··+··+··+···········

: X ! Xi XI

DUART

··········+··+··+·-+··+··+··+··+··+··+··+··+··+··+··+········---

CURSOR

I XI

··········+··+··+··+··+··+··+··+··+··+··+··+··+··+··+·-·········
MOUSE
i
I
i X! I I I
- - . . . . . - - -+· -+- ·+· ·+· ·+· ·+· ·+· ·+· ·+· ·+· ·+· ·+· ·+· ·+· -+- . . . . . . . . . .

REFRESH

·········-+··+··+··+--+--+-·+··+--+··+··+··+··+··+··+···········

DEFAULT

! X! Xi XI X

Xi X! XI Xi Xi Xi Xi Xi

··········+··+··+··+··+··+··+··+··+··+··+·-+··+··+··+···········
OPERATOR
!
!
I XI
I
X
··········+··+··+··+··+·-+··+··+·-+··+··+·-+··+··+··+····-······
AL I GN
I
!
I
!
I
I XI
X
··········+··+··+··+··+··+··+··+··+-·+··+··+··+··+··+···········

The selectable sections (Table 3-9) are:
o

DEFAULT ·· This section, comprising tests 1 through 12,
is run when no other section is selected. One pass
takes approximately two minutes.

REFRESH ·· This section runs Test 11. If event flag 2
is set, a prompt asks for the number of seconds the test
is to run, otherwise, the test runs for 20 seconds.

OPERATOR ·· This section runs Test 13.
To exit the
test, press either the leftmost mouse button or the
keyboard <CTRL> key three consecutive times.

ALIGN-· This section runs
the
alignment
pattern
generatot (Test 14). Pressing <CTRL>C exits the pattern
and returns to the DS> prompt.

3-19

MAINTENANCE
3.3.l.l
l.

Running The VCBOl Diagnostic - To run the diagnostic:
Press the HALT pushbutton twice, to enter console mode.
CAUTION - Console Mode
Before entering console mode, all open files
should
be
closed,
and all open accounts
logged-off the system. The console interface is
described in Appendix A of the VAXstation I
Owner's Manual, EK·VS200-0M.

Load the MICROVAX DIAGNOSTICS 2 of 3 diskette
1.

Enter:

drive·

>>> B/10 DUAl<RETURN>
The VDS header should be displayed, with the DS> prompt.
4.

Load the MICROVAX DIAGNOSTICS 3 of 3 diskette
2•

Enter:

drive

DS> ATTACH RXSO DUA DUA2<RETURN>
OS> SET LOAD DUA2:[SYS0.SYSMAINT]<RETURN>
OS> LOAD EHXVS<RETURN>
DS> ATTACH VCBOl HUB VCBO 777200 100<RETURN>
DS> SELECT VCBO<RETURN>
6.

If the screen display appears to be missing pixels, the
run time for the Refresh Test (Test 11) can be increased
by se~ting event flag 2:
OS> SET EV 2<RETURN>
and responding to the number of seconds prompt with a
value between 0 and 327679. Running the test for a few
minutes (that is, between 150 and 300 seconds) is
usually enough.
If the screen display appears to be
step.

3-20

normal,

omit

this

MAIJ.n'ERANCE
7.

If the VCBOl is not the console
must be set:

device,

event

flag

DS> SET EV 5<RETURR>
8.

Run the diagnostic, by entering:
OS> START<RETURR>
The diagnostic will execute the DEFAULT section.
To run a different section, use the /SECTION
for example:

qualifier,

DS> START/SECTIOR=ALIGH<RETURR>
will run the
9.

alig~ment

pattern generator (Test 14).

To abort testing and return to the DS> prompt, type
<CTRL>C.
To exit the test normally after completion,
enter:
DS> EXIT<RETURN>

3.3.1.2

VCBOl Diagnostic Error Messages {TBC ... ]

MAINTENANCE
3.4

MONITOR LED INDICATORS

The monitor is equipped with four LEDs, located and labeled as
shown in Figure 1-7.
All the LEDs normally glow. With the
exception of the POWER LED, a turned-off LED means that the
associated signal is not present. Table 3-10 specifies the LEDs,
their operation, and associated FRU.
Table 3·10:

Monitor LED Description

• - • • •+- - •+- • • - - - - - - - - - - - - - - - - • - - • • - - • • • - - • • - • - - - • • • - • • • • • • • • • - • - •

LABELIFRUjOPERATION
. - .. ·+. - -+- •. - - - - .• - - - .. - ...• - ••.....••.. - .. - •.••.•• - • - - •••• - .•••

POWER [a] The LED is switched OFF when the Power Supply
voltage drops below its failure threshold.

output

VIDEO [b] The LED is switched OFF when
below its failure threshold.

drops

the

Video

signal

HSYNC [b] The LED is switched OFF when the Horizontal Sync signal
drops below its failure threshold.
VSYNC [b] The LED is switched OFF when the Vertical
drops below its failure threshold.
[a]

Power Supply

[b]

Most probable failed·FRU first:

Sync

signal

1 VCBOl Module
2 Monitor Video Module
3 Video Cable BC18T-10

When most of the screen is black (that is, only one or two
lines of text are displayed) the VIDEO LED may appear to be
OFF (due to low average-video-pulse input). To verify, run
the VCBOl diagnostic ALIGN section (subsection 3.3.1.1). If
the LED remains OFF, replace the Video module. If the LED
turns ON, there is no failure.

3·22

MAIRTERARCE
3.5

MORITOR ADJUSTMENT PROCEDURES

DYNAMIC

FOCUS
HORIZONTAL

VllllTICAL
LINEAl'llTY

VOLTAGE

STATIC

.&;.='-~-----.JL---------------71r--'OCUS
llOWIR SUPf>LY _ _ _ _ _ _ __
MODULE

OUTPUT
YOLTAGE
ADJUST

!COMPONENT

SIDE OF IOAROI

Figure 3·7:

3.5.1

Monitor Internal Controls

Power Supply
1.

Connect a digital voltmeter across the Power Supply
output:
positive test lead to the red output lead;
negative test lead to ground.
3-23

MAINTENANCE
2.

Adjust the OUTPUT VOLTAGE control (Rl4) for an output of
+52 Vdc +/- 0.1 Vdc.
CAUTION - Overvoltage Adjustment
DO NOT adjust the OVERVOLTAGE ADJUSTMENT
(R21). It is preset at the factory.

3.5.2

control

Video Module
l.
2.
3.
4.
5.

3.5.3

Remove the video input cable from the rear panel BNC
connector.
Set the BIAS control (R609) fully clockwise.
Turn up the BRIGHTNESS control (rear panel) until the
raster is visible on the screen.
Turn BIAS control counter-clockwise until the raster
brightness starts to increase. Leave at this setting.
Reconnect the video input cable.
Deflection Module

3.5.3.l
l.

2.
3.
4.

3.5.3.2
1.

Cutoff Preset (G2 Voltage) Remove the video input cable from the rear panel BNC
connector.
Set the BRIGHTNESS control (rear panel) to its midrange,
or to the point where the raster becomes visible.
Adjust the CUTOFF PRESET control (R434) to the point
where the raster disappears.
Reconnect the video input cable.
Horizontal Frequency ·
Run the VCBOl diagnostic and select
(subsection 3.3.1.1):

a.
b.
c.

Enter console mode.
Load the MICROVAX DIAGNOSTICS 2
drive 1.
Enter:

the

ALIGN

section

diskette

>>> B/10 DUAl<RETURN>
d.

Load the MICROVAX DIAGNOSTICS 3
drive 2.
3-24

HAINTBNARCE
e.

Enter:
DS> ATTACH RXSO DUA DUA2<RETURN>
OS> SBT LOAD DUA2:[SYS0.SYSHAINT)<RETURN>
DS> LOAD BHXVS<RETURN>
DS> ATTACH VCBOl HUB VCBO 777200 lOO<RETURN>
DS> SELECT VCBO<RETURN>
DS> START/SECTION=ALIGN<RETURN>

Turn the HORIZONTAL FREQUENCY control {R211) clockwise
and counter-clockwise, noting the points where the image
loses synchronization. There can be none, one, or two
points of sync loss:
a.

b.
c.

3.5.3.3

1.
2.
3.

3.5.3.4
1.

If there is no loss of synchronization, set the
HORIZONTAL FREQUENCY control to its midrange.
If there is one point, set the HORIZONTAL FREQUENCY
control midway between the sync loss point and the
end of its range.
If there are two points, set
the
HORIZONTAL
FREQUENCY control midway between the two points.

Contrast Run the VCBOl diagnostic and select the ALIGN section
{see
subsection
3.3.1.1
or
Horizontal Frequency
adjustment, above}.
Using the rear panel CONTRAST control, increase contrast
until the horizontal crosshatch lines at the right start
to distort.
Decrease contrast to the point where the crosshatch is
not distorted and there has been a noticeable decrease
in intensity.
Horizontal Size ·
Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.1.1
or
Horizontal Frequency
adjustment, above}.
Using an alignment tool adjust the HORIZONTAL SIZE
control
until
the image is set to 3 width of:
368.3 +/· 3 mm (14.5 in}.

3-25

MAINTENANCE
3.S.3.S
1.
2.
3.
4.

3.S.3.6
1.
2.

3.5.3.7
1.

2.
3.
4.

3.5.3.8
1.

2.
3.

Horizontal Centerinq ·
Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.1.l
or
Horizontal Frequency
adjustment, above).
Measure and record the distance between the center left
edge of the test pattern and the monitor bezel.
Measure and record the distance between the center right
edge of the test pattern and the monitor bezel.
Compare the measurements of steps 2 and 3.
If the
difference between the two measurements is greater than
5 mm, adjust the HORIZONTAL CENTERING control until the
difference is less than 5 mm.
vertical Height Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.1.1
or
Horizontal Frequency
adjustment, above).
Adjust the VERTICAL SIZE control until the image· is set
to a height of: 283.5 +/- 3 mm (11.16 in).
Vertical Centering Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.1.l
or
Horizontal Frequency
adjustment, above).
Measure and record the distance between the center top
edge of the test pattern and the monitor bezel.
Measure and record the distance between the center
bottom edge of the test pattern and the monitor bezel.
Compare the two measurements of steps 2 and 3.
If the
difference between the two measurements is greater than
5 mm, adjust the VERTICAL CENTERING control until
the
difference is less than 5 mm.
Horizontal And Vertical Linearity Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.l.l
or
Horizontal Frequency
adjustment, above).
Check that all vertical lines in the test pattern are
equidistant across the screen.
If not, adjust the VERTICAL LINEARITY control (R318}
until the vertical lines are equidistant.
3-26

MAINTENANCE
NOTE

Exact equidistance may not be possible. In that
case, adjust for the best possible pattern.
4.
5.
6.

3.5.3.9
1.

2.
3•

"--·

Check that all horizontal lines of the test pattern are
equidistant across the screen.
If not, adjust the HORIZONTAL LINEARITY control (L232)
until all horizontal lines are equidistant (see the note
above).
Recheck the horizontal and vertical size, and horizontal
and vertical centering. There will be some interaction
between these adjustments -- readjust if necessary.
Static And Dynamic Focus Run the VCBOl diagnostic and select the ALIGN section
(see
subsection
3.3.l.l
or
Horizontal Frequency
adjustment, above).
Adjust the STATIC FOCUS control (R43lf for a sharp image
at the screen center.
Individual pixels should be
distinguishable.
Adjust the HORIZONTAL DYNAMIC FOCUS control (R418} for a
sharp image at the right and left edges of the screen.
Adjust the VERTICAL DYNAMIC FOCUS control (R416) for a
sharp image at the top and bottom of the screen edges.
Visually check the entire image for center, horizontal,
and vertical focus quality. If necessary, repeat steps
2, 3, and 4.

3-27

MAINTENANCE

3.6

TROUBLESHOOTING FLOW

The following notes apply
3-11):

the

Troubleshooting

Flow

The answer to any procedure decision is either the
line, or a branch to another step

The•> ("arrow") is read as:

(Table
next

"go to step."

For example:
- - ... -+· - - ...... - - - - .. - - • - • - - - •• - • - - .. - ........ - •• - ... - - .. - - ·+· .... - ...

STEP JPROCEOURE/O!CISION
!BRANCH
... - ·+· .. - ... - ...... - .... - ........ - ... - ........ ·+· ..... .
START ·Turn system power ON.
Does the system bootstrap?
N •> l
Is the system operating reliably?
N •> 20
DONE
If the answer to: "Does the system bootstrap?" is no
(N), branch to step 1 (N •> l); if yes (Y), take the
next line: "Is the system operating reliably?" If that
answer is no, branch to step 20 (N •> 20); if yes, you
are done.
o

Microverify error numbers displayed in the CPU patch
panel segmented-LED display, are valid only when the CPU
is in console Halt mode (the >>> console prompt is
displayed on the monitor screen).

3-28

MAINTBNANCE

Table 3·11:

Troubleshooting Flow

- • - . -+- - - - - - - - - - - - - - - .. - - .. - - •• - - • - - . - - - - - - - - - - - - - - - - . - - ·+· - - - - - •
STEP

I PROCEDURE/DECISION

I BRANCH

- - - - -+- - - - - - - - - - • - - - • - • - - - • - - • - - - - - • - - - - - - - - - - - • - • - - - - - • -+- - - - - - -

START Turn system power ON.
Does system bootstrap?
Is the system operating reliably?
DONE
l

Is DC OK LED ON?
"MICROVERIFY STARTED" displayed on monitor?
Garbled or no monitor display?
Error number in Microverify LED display?
Error message dispalyed on monitor?

N •> l
N •> 20
N •>
N •>
y =>
y •>
y =>
N ->

10
14
19
20

N ->
•>

2
8

Is AC power switch lighted?
Both fans turning?
Turn power OFF.
Remove all modules except CPU.
Turn power ON.
Is DC OK LED ON?

•>

a)
b)
c)
d)

•>

N =,

Turn power OFF.
Re-install one module in backplane.
Turn power ON.
Is DC OK LED ON?

Repeat a), b), c) until d) =NO
3

Check: AC wall receptacle
AC power cord
AC circuit breaker
Power-on switch
AC power switch

Possibly power supply and/or fan.
Replace fan; or
Replace H7864 power supply.
Return to START

Replace H7864 power supply.
Return to START

Replace failed module.
Is DC OK LED ON'?
Return to START
3-29

MAINTENANCE

Table 3-11:

Troubleshootinq Flow (continued)

- - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+- - - - - - -

STEP !PROCEDURE/DECISION

!BRANCH

- - - - -+- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -+- - - - - - 7

Power supply +5 Vdc and +12 Vdc outputs OK?
Possibly faulty LED or cable.
Replace DC OK LED; or
Replace Front Control Panel cable.
Return to START

Microverify LED display • 6 or 7?
HALT light ON?
Press HALT button (to release it).
Return to START

Replace OAP.
If error still present, replace MCT.
Return to START

VCBOl Display Density switches set OK?

N •>

•>

7 or 10
N •>
9

•> 11

•> 12

Set: E68
= ON
E48 sa = OFF
Return to START
11

Run VCBOl diagnostic.
VCBOl passes diagnostic.
Replace VCBOl
Return to START
Possibly faulty cable.
Replace BC18T-10 video cable.
Problem resolved?
Return to START

Possibly monitor problem.
Repair/replace monitor.
Return to START

LED = 6 or 7?
LED = 5?
LED = 4?
LED = 3?

N •> 13

•> 8
•> 15
•> 16
•> 17
N •> 19
y
y
y
y

3-30

MAIR'l'El\TARCE

Table 3·llz

Troubleshooting Flow (continued)

.. - . -+·. - . - ......... - ........................ - • - ... - •. - - ·+· - - - .. STEP I PROCEDURE/DECISION
I BRANCH
.... ·+· .... - - - - ... - ... - - .... - ................. - .. - • - .... ·+· .... - -

Replace MCT
Return to START

Check OAP to MCT interconnect cable seating.
If seated OK: replace OAP; then MCT; then cable.
Return to START

Can deposit/examine any memory location?
Error message on monitor?

N •> 18
y •> 19
N

Possibly MCT or memory.
Replace MCT; then first MSVll·QA.
Return to START

LED = 2 or l?
Is one of following error messages true?

•> 20

•> 20
N •> 24

DEVICE IS NOT PRESENT
DEVICE IS OFFLINE
NO VALID ROM IMAGE FOUND
BOOT DEVICE I/0 ERROR
FAILED TO INITIALIZE BOOT DEVICE
NO RESPONSE FROM LOAD SERVER
MEMORY INITIALIZATION ERROR
Do all the following check OK?
Named valid boot device?
Beatable media is in boot device?
Fixed-disk is ready?
Boot device installation is OK?
system configuration is correct?
Grant continuity is OK?
Switch and jumper settings are correct?
Cable connections are OK?
Correct configuration and re-boot.
Return to START

3-31

'{ => 22

MAINTENANCE

Table 3·11:

Troubleshooting Flow (continued)

- . - . . -+· - ...... - . . - - - - - - - - . . - - .... - - - . - - ....... - - .... - - ... - - - - - - •• - - ·+- - .... - - STEP !PROCEDURE/DECISION
I BRANCH
- - •. -+- - .. - • - ... - . . - - - - - - .. - .. - - .... - .... - - - - - - .. - .... - - - - - .......... - .... ·+·. - - - - -

Boot diagnostic diskette.
Will Macroverify or other dia9nostics load?
Load and Run Macroverify.
Did Macroverify find failed FRU?
Replace FRU.
Return to START

Run applicable device diagnostic.
Replace FRU.
Return to START

Will any (other) device boot?
Replace boot unit, then RQDXl.
Return to START

Possible interrupt or 022·bus fault.
Replace OAP for interrupt fault.
Replace MCT or backplane for Q22·bus fault.
Return to START

Is following error message true?

•> 27

N •> 21

N •> 23

Y •> 27

UNEXPECTED SCB EXCEPTION OR MACHINE CHECK
Is one of following error messages true?
NO VALID BOOT DEVICE IS PRESENT IN THE CONFIGURATION
NONE OF THE BOOTABLE DEVICES CONTAIN A PROGRAM IMAGE
PROGRAM IMAGE NOT FOUND
INVALID BOOT DEVICE FILE STRUCTURE
PROGRAM IMAGE FILE NOT CONTIGUOUS
FILE CHECKSUM ERROR
BAD FILE STRUCTURE HEADER
BAD VOLUME DIRECTORY
INVALID PROGRAM IMAGE FORMAT
PREM\TURE END OF FILE
UNEXPECTED EXCEPTION AFTER STARTING PROGRAM IMAGE
Suspect media.
Try to boot from another media.
Return to START

3-32

N •> 27

MAINTENANCE
Table 3·11:

Troubleshooting Flow (continued)

.... ·+· ..... - - . - - - . - - - - - - - - - - - - - - - - - - - - . - - - - - - - - - - - - - - - - -+- - - - - - STEP !PROCEDURE/DECISION
!BRANCH
- - • - -+- - - . - - - - - - - - • - - - - - - . - . - • - - - - • - - - - - - - - - - - - - - - - - - - - - -+- - - - - ••

Is following error message true?

N •> 26

INVALID FILENAME
Re-enter correct filename.
Return to START
26

Is following error message true?

N •> 27

PROGRAM IMAGE DOES NOT FIT IN AVAILABLE MEMORY
More physical memory is required ~or this boot.
Return to START
27

FATAL SYSTEM ERROR.
Possible multiple failures. The following sequence is
recommended:
a)

Reduce system to minimum configuration:
o
o
o
o

o
b)
c)
d)
e)

CPU
MSVll·QA (1)
RQDXl
RXSO
VCBOl

Follow troubleshooting flow from START.
Replace failed unit.
Re-install other FRUs, one-at-a-time.
Verify each re-installed unit, by repeating
through d) .

steps

. . . . . ·+· - - .. - ............. - ...... - - .... - .... - - . - .. - .. ·+·. - ...... .

3-33

CHAPTER 4
REPLACEMENT

This chapter lists the procedures for removing and replacing
failed FRUs in a desk-top system. With the exception of cover
removal, the same
procedures ·apply
to
floor-stand
and
rack-mounted systems. Table 4-1, at the end of this chapter, is
a list of replacement part numbers.
4.1

BACKPLANE MODULES

The general procedure for removing/replacing modules plugged into
the backplane is the same for all modules.
4.1.1

Module Removal
l.

Turn-off system and monitor power.

Remove the
receptacle.

system

4-1

power

cord

f rum

the

wall

REPLACEMENT

Remove the system unit rear cover, by grasping each
and pulling the cover toward you (Figure 4-1).

Figure 4·1:

end

Rear Cover Removal

Note the position of any external ~ables connected to
the Patch and Filter Panel assembly. Remove the cables
(Figure 4·2).

Figure 4·2:

Rear Cable Removal

4-2

RBPLACBMENT

Loosen the two captive screws on the
Patch and Filter Panel assembly,
(Figure 4-3).

left end of the
and swing it open

Captive Screws
Fiqure 4·3:

Patch and Filter Panel Assembly Acce·ss

Note the location of the module to be replaced, and
position of any cables connected to the module.

Disconnect any cables connected to the module (Figure
4-4).
Note: the module may first have to be partially
withdrawn, before the cable(s) can be removed.

Figure 4·4:

Module Cable Removal

4-3

the

REPLACEMENT

Pull the levers at each end of the module to release it,
and carefully pull the module toward you (Figure 4·5).

l"igure 4·5:

4.1.2

Module Removal

Note the settings of any switches
removed module.

and

jumpers

the

Module Replacement
1.

Normally, swi;ches and jumpers on the replacement module
should be set to the same position as those on the
removed module. (Also see Chapter 1.)

Make sure the locking levers at each end of
are in the released position.

4.4

the

module

REPI.ACEMERT

Slide the module partially into the slot, and reconnect
any cables removed from the old module (Figure 4-6).

Figure 4·6:
4.

Module Cable Replacement

Slide the module into the slot until firmly seated,
close the locking levers (Figure 4·7).

Figure 4·7:

and

Module Replacement

Close the Patch and Filter Panel assembly, and
the two captive screws.

Reconnect any removed cables to
Panel assembly.
4.5

the

Patch

and

refasten
Filter

REPLACEMENT

4.2

Replace the rear cover.

Turn-on system and monitor
run.

Run Macroverify.

power.

Microverify

should

STORAGE $0BSYSTBM

This procedure describes removal/replacement of the RD52 and RXSO
drives.
Access

4.2.1

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit rear cover, by grasping each
and pulling the cover toward you (Figure 4-1).

Remove the system unit front cover, by grasping each end
and pulling the cover toward you (Figure 4-8).

system

Figure 4·8:

power

cord

Front Cover Removal

4·6

from

the

wall
end

REPLACEMENT

Remove the front chassis retaining bracket by removing
the screws that secure it to the enclosure (Figure 4-9).

Figure 4-9:

Front Bracket Removal

Make sure there is enough slack in the cables connected
to the back of the system unit, and slide the system
unit out of the enclosure until restrained by the
stopper on the chassis.

Remove the storage subsystem cover (Figure 4-10).

Figure 4-10:

Storage Subsystem Cover Removal

4-7

REPLACEMENT
4.2.2

RD52 Removal
CAUTION - RD52

Use extreme care when handling the R052 drive.
It will be damaged by sudden physical shocks
(such as dropping it on a hard surface).
A
shipping case is required to protect the drive in
transit.
CAUTION - Head Positoner Flaq

When handling the drive, do not hold the front,
right·hand side of the drive; doing so will cause
the head_positioner flag to rotate (Figure 4·11).

4·8

REPLACEMENT

Push down the release tab, and slide the drive forward
to access the cables at the rear of the drive (Figure
4·11).

Figure 4·11:

RDS2 Cable Access

4.9

REPLACEMENT

Disconnect the de power and two signal cables
drive (Figure 4-12).

from

the

Rear

Figure 4-12:
3.

RD52 Cable Removal

Remove the drive from the chassis by sliding it forward.
Observe
the previous head positioner flag caution
(Figure 4-11).

4-10

REPLACEMENT

Replace the red plastic cover on the head positioning
arm (Figure 4-13). (This cover should ha.ve reen removed
and taped to the top of the drive during installation.)

Fiqure 4·13:

RD52 Head Positioninq Arm Cover Replacement

4-11

REPLACEMENT

Pack the removed drive
(Figure 4-14).

Figure 4·14:
4.2.3

its

RD52 Shipping Container

RD52 Replacement

special

Unpack the replacement drive~

4-12

shipping

case

REPLACEMENT

Set the DIP switches as shown in Figure 4-15 .

.....
Rear of drive
tr £ Z I

BBQB!
NO

....

Front of drive

Figure 4·15:

RD52 DIP Switches

REPLACEMENT
3.

Remove the red plastic cover on the head positioning arm
and tape it to the top of the drive (Figure 4-16).

Fiqure 4·16:

RD52 Head Positioninq Arm cover Removal

4-14

RBPLACEMENT

Slide the drive most of the way into the chassis,
leaving enough room to reconnect the cables (Figure
4-17). Push on the front corners of the drive. Observe
the head positioner flag caution.

Head flag positioner

donottouch!=::;;;~--,__.rtfJ/!fll~=:::::::::::::::::.::=:::::::::::::::::.:::=:iiiii

Figure 4·17:

RDS2 Insertion

4-15

REPLACEMENT

Connect the de power and two
4 -18).
Push the drive into
latches.

Fiqure 4·18:

signal cables (Figure
the chassis until it

RD52 Cable Connection

Replace the storage subsystem cover.

Push the system unit all the way into the enclosure.

Replace the front chassis retaining bracket.

Replace the front cover.

10.

Reformat the disk (see Chapter
Owner's Manual, EK-VS200-0M).

11.

Turn-on system and monitor
run.

12.

Run Macroverify.

4-16

power.

the

VAXstation I

Microverify

should

RBPLACBMBRT

4.2.4

RXSO Removal
1.

Slide the drive forward to access the cables at the rear
of the drive, and disconnect the de power cable and
signal cable (Figure 4-19).

Figure 4·19:

RXSO cable Access

Push down the release tab, and slide the
and out (Figure 4-20).

Figure.4·20:

RXSO Removal

4-17

drive

forward

REPLACEMENT
RXSO Replacement

4.2.5

Slide the drive into the chassis to reconnect
power and signal cables (Figure 4·21).

Figure 4·21:

the

RXSO Cable connection

Push the drive all the way into the chassis.

Replace the storage subsystem cover.

Push the system unit all the way into the enclosure.

Replace the front chassis retaining bracket.

Replace the front cover.

Turn-on system and monitor
run.

Run Macroverify.

4-18

power.

Microverify

should

RBPLACBMBNT
4.3
"'----·

POWER SUPPLY

The power supply is not adjustable and does not contain any FRUs;
it is an FRU.
4.3.1

Power Supply Removal
l.

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit front cover and rear cover.
Grasp each end of the cover and pull the cover toward
you (Figures 4-1 and 4-8).

Note the position of any external cables connected to
the ~atch and Filter Panel assembly. Remove the cables
(Figure 4-2).

Remove the rear chassis retaining bracket on
left side of the system unit.

Slide the system unit out of the enclosure.

Remove the storage subsystem cover (Figure 4·10).

Loosen the two captive screws on the
Panel assembly (Figure 4-3).

system

4-19

power

cord

from

Patch

the

and

wall

rear,

Filter

REPLACEMENT

From the front of the power supply,
4·22):
a.
b.
c.
d.

disconnect

(Figure

J7
6-pin, keyed, locking ac power connector.
J8
9-pin mass storage power connector.
J9
18-pin backplane power connector.
JlO
4-pin, in-line, keyed, locking fan power
connector.
J7

Figure 4·22:

Power Supply Cable Removal

10.

Remove the five screws that hold the power supply to the
chassis.

11.

Carefully lift the power supply and rest it on the cover
of the backplane modules.

12.

Disconnect the rear cooling fan power connector.
Power Supply Replacement

4.3.2
l.

Re3t the power supply on
modules, and reconnect
connector.

4-20

the
the

cover of the backplane
rear cooling fan power

RBPLACBMERT

CAUTION - Fan Power
The polarized, de power connector to the cooling
fan must be installed with the curve of the
connector matching the curve of the fan housing,
for correct fan rotation (Figure 4·23).

Figure 4·23:
2.

Place the power supply in positon, making sure that the
rear fan power cable is routed over the top of the fan.

Insert the five power supply hold·down screws.

On the front of
4-22):
a.
b.

Fan Power Connector

J7
J8

JlO

the

power

supply,

reconnect

(Figure

assembly

captive

6-pin, keyed connector.
9-pin connector.
18-pin connector.
4-pin, keyed connector.

Refasten the Patch and
screws.

Filter

Replace the storage subsystem cover.

Make sure that the voltage selector switch
local requirements.

4·21

Panel

set

for

REPLACEMENT

Slide the ·system unit into the enclosure.

Install the rear chassis retaining bracket.

10.

Reconnect any removed cables to
Panel assembly.

11.

Replace the front and rear covers.

12.

Turn-on system and monitor
run.

13.

Run Macroverify.

4.4

the

power.

Patch

and

Filter

Microverify

should

BACKPLANE AND SIGNAL DISTRIBUTION PANEL

4.4.1

Backplane Removal

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit front cover and rear cover.
Grasp each end of the cover and pull the cover toward
you (Figures 4-1 and 4-8).

Note the position of any external cables connected to
the Patch and Filter Panel assembly. Remove the cables.

Remove the rear chassis retaining bracket on
left side of the system unit.

Slide the system unit out of the enclosure.

Remove the storage subsystem cover (Figure 4·10}.

Remove the backplane modules cover.

Loosen the two captive screws on the Patch and
Panel assembly and swing it open (Figure 4·3).

10.

Remove the· backplane modules as described in
4.1.1, steps 6, 7, and 8.

system

4-22

power

cord

from

the

wall

rear,

Filter

subsection

REPLACEMENT

11.

Without disconnecting the cables from the drives, remove
the disk drives, following the procedures described in
subsection 4.2.2, steps 1 and 3, and subsection 4.2.4,
steps 1 and 2. The drive cables are disconnected from
the backplane (Figure 4·24}:

a.
b.
c.

J6
J2
J7

RXSO signal cable
RD52 ~ignal cable
RD52 signal cable

Figure 4·24:

Drive Cable Backplane Connectors

4-23

REPLACEMENT

12.

Remove the following cables (Figure 4·25):

a.
b.
c.

J2
J4

Power supply cable
10-pin connector
10-pin connector

Figure 4·25:

Other Backplane Cable Connectors

4-24

REPLACEMENT

13.

To remove the 022-bus cable connected to the signal
distribution panel, loosen the two screws holding the
cover and lide the cover off. Remove the cable (Figure
4-26).

Figure 4·26:

Q22·bus Cable Backplane Connector

14.

Remove the four screws holding the backplane assembly to
the chassis.

15.

Pivot the C/D interconnect side of the backplane 45
degrees (toward the Patch and Filter Panel assembly).
Remove the backplane assembly from the chassis by
lifting it straight up.

16.

Remove the signal distribution panel from the
by removing four screws.

4.4.2

backplane

Backplane Replacement
1.

Install the signal distribution panel on
with four screws.

Install the backplane assembly with four screws.

Reconnect the Q22-bus cable (Figure
the cover.
4-25

4-26)

the

and

backplane

install

REPLACEMENT

Reconnect (Figure 4·25):

a.
b.

Jl
J2
J4

Power supply cable
10-pin connector
10-pin connector

Replace the disk drives as described in subsection
4.2.3, steps 3 and 5, and subsection 4.2.5, steps 1 and
2.

Making sure that the connectors
properly aligned, reconnect:

J2
J7

(Figure

4-24)

are

described

RXSO signal cable
RD52 signal cable
RD52 signal cable

Re-install the backplane modules as
subsection 4.1.2, steps 2, 3, and 4.

Refasten the Patch and
screws.

Replace the backplane modules cover.

10.

Replace the storage subsystem cover.

11.

Slide the system unit into the enclosure.

12.

Install the rear chassis retaining bracket.

13.

Reconnect any removed cables to
Panel assembly.

14.

Replace the front and rear covers.

15.

Turn-on system and monitor
run.

16.

Run Macroverify.

Filter

4-26

Panel

the

power.

assembly

Patch

captive.

and

Filter

Microverify

should

REPLACEMENT

4.5

COOLING FANS

4.5.1

Rear Fan Removal

Turn·off system and monitor power.

Remove the
receptacle.

Remove the system unit front cover and rear cover.
Grasp each end. of the cover and pull the cover toward
you (Figures 4·1 and 4·8).

Note the position of any external cables connected to
the Patch and Filter Panel assembly. Remove the cables
(Figure 4-2).

Remove the rear chassis retaining bracket on
left side of the system unit.

Slide the system unit out of the enclosure.

Remove the power supply as
4.3.1, steps 7 through 12.

Remove the four screws and spacers holding the fan to
the chassis; lift the fan and guard from the chassis.

4.5.2

system

power

cord

from

described

the

wall

rear,

subsection

Rear Fan Replacement
1.

Place the four fan mounting screws in the chassis holes.

4-27

REPLACEMENT
2.

Place the guard over the screws, with the circular wires
of the guard against the chassis (Figure 4-27).

Place the four spacers over the screws.
4t1Rear

Front . .

Figure 4·27:

Rear Fan Installation

Fasten the screws to the fan. The fan must be
such that airflow is away from the power supply.

Reconnect the rear cooling fan power connector.

placed

CAUTION - Fan Power
The polarized, de power connector to the cooling
fan must be installed with the curve of the
connector matching the -urve of the fan housing,
for correct fan rotation (Figure 4-23).

4-28

RBPLACBMERT

Replace the power supply
4.3.2, steps 2 through 7.

described

Slide the system unit into the enclosure.

Install the rear chassis retaining bracket.

Reconnect any removed cables to
Panel assembly.

subsection

\,___

the

10.

Replace the front and rear covers.

11.

Turn-on system and monitor
run.

12.

Run Macroverify.

4.5.3

power.

Patch

and

Filter

Microverify

should

Front Fan Removal
1.

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit front cover, by grasping each end
and pulling the cover toward you (Figure 4-8).

Remove the front chassis retaining bracket by
the screws thac secure it to the enclosure.

Make sure there is enough slack in the cables connected
to the back of the system urrit, and slide the system
unit out of the enclosure until restrained by the
stopper on the chassis.

Remove the storage subsystem cover (Figure 4-10).

Remove the RXSO as described in subsection 4.2.4,
1 and 2.

system

4-29

power

cord

from

the

wall

removing

steps

RBPLACBMBNT

Disconnect the power cord from JlO (Figure 4-28).

Remove the four screws and spacers holding the fan to
the chassis; lift the fan and guards from the chassis.

Fiqure 4-28:

Front Fan Removal

4-30

REPLACEMENT

4.5.4

Front Fan Replacement

Remove the power cable and fan guard from the intake
side of the removed fan and fit them to the replacement
fan.
CAUTION - Fan Power

The polarized, de power connector to the cooling
fan must be installed with the curve of the
connector matching the curve of the fan housing,
for correct fan rotation (Figure 4·23).
2.

Place the four fan mounting screws in the chassis holes.

Place the guard "over the screws, with the circular wires
of the guard against the chassis (Figure 4-29).

Place the four spacers over the screws •

...

Figure 4·29:

Front Fan Installation

Fasten the screws to the fan. The fan must be
such that airflow is away from the power supply.

Reconnect the fan power cable to JlO.

4. 31

placed

REPLACEMENT

Install the RXSO drive as described in subsection 4.2.S,
steps 1 and 2.

Replace the storage subsystem cover.

Slide the system unit into the enclosure.

10.

Install the front chassis retaining bracket.

11.

Replace the front cover.

12.

Turn-on system and monitor
run.

13.

Run Macroverify.

4.6

power.

Microverify

should

PATCH AND FILTER PANEL

Insert Removal

4.6.1

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit rear cover, by grasping each
and pulling the cover toward you (Figure 4·1).

Note the position of any external cables connected to
the Patch and Filter Panel assembly. Remove the cables.

Loosen the two captive screws on the
Patch and Filter Panel assembly,
(Figure 4-3).

Note the position of any internal cables connected to
the Patch and Filter Panel assembly insert. Remove the
cables.

Remove the four screws holding the insert to the
and Filter Panel assembly. Remove the insert.

system

4-32

power

cord

from

the

wall
end

left end of the
and swing it open

Patch

REPLACEMENT

4.6.2

Insert Installation
1.

Using four screws, fasten the insert to
Filter Panel assembly.

Connect the internal cables to the insert.

Refasten the Patch and
screws .

Filter

Panel

assembly

captive

Reconnect any removed cables to
Panel assembly.

the

Patch

and

Filter

Replace the rear cover.

Turn-on sy~tem and monitor
run.

Microverify

should

Run Macroverify.

4.7

power.

the

Patch

and

FRONT CONTROL PANEL

4.7.1

Control Panel Removal
1.

Turn-off system and monitor power.

Remove the
receptacle.

Remove the system unit front cover. Grasp each end of
the cover and pull the cover toward you (Figure 4-8).

Remove the four screws from the
panel assembly.

system

4-33

power

cord

front

from

the

wall

control

RBPLACBMBRT

Remove the connector from the
circuit board (Figure 4-30) •

control

•
0

.0°00 °00

Fiqure 4·30:

Front Control Panel Removal

4-34

panel

printed

RBPt.ACEMENT

Remove the four screws that hold
assembly together (Figure 4-31).

the

control

panel

t
T. vr
I .I

Figure 4·31:
4.7.2

Front Control Panel Disassembly

Control Panel Replacement
LEDs
the

to correctly positi.:>n the assembly,
four screws that hold the assembly

Using the
refasten
together.

Reconnect the control panel cable.

Remount the panel with four screws.

Replace the front cover.

RB PLACEMENT

4.8

Turn-on system and monitor
run.

Run Macroverify.

power.

Microverify

CRT

should

MONITOR
~onitor

4.8.l

Cover Removal

Place the monitor on
surfacl!.

its

face

level

work

WARRING - CRT Face

The integral CRT bezel is designed to keep the
CRT face above the work surface; however, the
work surface under the CRT face should be clear
of any debris. In addition, it is recommended
that rough work surfaces be covered to prevent
any unnecessary scratches on the bezel.
2.
3.
4.

To remove the tilt-swivel base from the monitor cover,
remove the four mounting feet from the monitor. The
mounting feet are finger tight.
Remove the four philips-head screws from the rear of the
cover.
Lift the cover off the monitor compartment.
EMI Screen

4.8.2

WARNING - CRT Neck

With the EMI screen removed, the neck of the CRT
is exposed and can be broken. Be very careful
when removing modules or passing tools over the
monitor compartment.
1.
2.
3.

With the cover removed, place the monitor in its
viewing position.
Loosen the· six screen hold-down screws.
Remove the EMI screen.
4-36

normal

RBPLACBMBNT

S.
4.8.3

When installing the screen, be sure that each slot of
the screen flange is under its associated hold·down
screw.
Tighten the hold-down screws.
Monitor Power Supply

1.
2.
3.
4.
4.8.4

Remove the two connectors on the Power Supply assembly.
Loosen the four philips-head mounting screws (right side
panel, viewed from rear).
Remove the assembly by working the mounting screws
through the elongated mounting holes.
To install the assembly, reverse the previous steps.
Deflection Module

1.
2.
3.
4.
4.8.5

Remove the four module connectors.
Loosen the four philips-head module mounting screws
(left side panel~ viewed from rear).
Remove the module by working the mounting screws through
their elongated mounting holes.
To install the module, reverse the previous steps.
Video Module

1.
2.
3.

Remove the four module connectors.
Loosen the four philips·head mounting screws on the rear
panel.
Remove the module by working the mounting screws through
their elongated mounting holes.
CAUTION

Be careful not to entangle any module component
on the CRT cable, or bend/break the LEDs of the
module assembly.
4.

To install the module, reverse
observing the previous caution.

4.37

the

steps,

RBPLACBMBNT

4.8.6

CRT Cable

1.
2.
3.
4.
5.
4.8.7

Remove the CRT cable connector from the Video Module.
Slide the quick-disconnect spade and pin of the cable
from the Video Module.
Slide the quick-disconnect spade from the grounding lug.
Disconnect the CRT socket and remove the cable from the
compartment.
To install the cable, reverse the previous steps.
Monitor Cover Replacement

Place the monitor on its CRT face.
WARNING - CRT Face

Place the cover over the compartment; be sure that the
cover edge fits into the CRT bezel assembly.
Insert and tighten the four philips-head mounting screws
on the rear of the cover.
Hold the tilt-swivel base, with the levee pointed down,
against the monitor bottom.
Align the base and monitor mounting holes, and replace
and tighten the monitor feet.
Place the monitor in its normal viewing position.

4-38

REPLACBMENT
Table 4·1:

Part Numbers

+· ...................... - ............... - .... ·+· ..... - ..... ·+

I DESCRIPTION

l PART R'OMBER I

+· ..•..• - .... - - - - - •. - .... - - .••....•• - ... - •... -+- •• - - •• - - - - • ·+

K032·AB

Module, Data Path
Module, Memory Controller
Fll MMU
Cable, LEO and Baud Rate
Cable, OAP . MCT
Cable, Patch Panel
Insert, Patch Panel

M7135-YA
M7136
1 21-15542-01
I
BC22K·lC
I 70-18448-00
I 70-11411-lC
I 70-21150-01

I MSVll·QA

Module, l MB Memory

+· ..•..•.•..•............................... - ·+· ..• - . - ..... ·+

M755l·AA I

+···-········--·-·····························+·············+
I RQDXl
I

Module, Disk Controller
Cable, ~D/RX Data

M8639
I
BC06L·lC !

+············································-+·····-·······+
R052

Drive, 30 MB Winchester
Cable, Data · 20 Conductor
Cable, Data · 34 Conductor

I
RD52
! 17-00282
! 17-00286

Drive, Diskette
Cable, Data

I
RXSO ·AA I
I 17-00285-02 I

Cable, Power

I 70-20435-lK I

+· .....•. - .•.... - ... - - . - .••......... - .......• ·+· ........... ·+

: RXSO ·

+ .•.••••• - • - •• - •••••••••• - •••.••••••••••••••• ·+ ............ ·+

; RD/RX

+·············································+·············+
VCBOl

Module, Video Controller
I
M7602
I
Cable, Monitor/Keyboard (Video) I
BC18T-10 I
Insert, Patch Panel
I 70-21495·01 I

+···················· ·························+·············+
VRlOO

Mani tor
I
VRlOO ·AA
Power Supply
29-24782
Board, Video
29-24783
Board, Deflection
29-24784
Assembly, CRT Socket
29-24785
Assembly, Control Bracket
29-24789
Cable, Video · Deflection
i 29-24786
Cable, Power Supply
Video
29·24787
Cable, Power Supply · Deflection
29-24788
Alignment Wrench
29-21190
Alignment Ruler
29-24868

+·············································+·············+

4-39

REPLACEMENT
Table 4·1:

Part Numbers (continued)

+........ - - - . - .. - - . - - . - - .. - - - - - - - - . - . - - - . - - - - -+. - - - - - ... - - - . +
I DESCRIPTION

I PART NUMBER I

+······-····················-·················+·············+
I H7864

I 30-21794-01 I

Power Supply
Fan, 12 Vdc

I 12-17556-01 i
+· - . - . - - - - - - - - - - - - ... - . - - - - - - - - . - - - - .. - - - - .. - -+- - - - - - - - . - . - ·+
I H9278-A
Backplane Assembly
! 70-19986
+· .... - - . - . - . - - - . - - - .. - - - - . - - . - - . - - - - - - . - - - .. -+- - - - - ... - - - - ·+
j

! Keyboard

LK20l·CA I

+ .. - - - . - - - - - - - - - - - . - .. - . - ... - . - - . - - - - .. - - .... -+- .......... - . +
I Mouse

: 30-20038-01 :

+·. - . - - ... - - - . - - - .. - - - - - - - - - - - - - - - . - - - - . - . - .. ·+· ... - . - ... - - ·+
I Jumper
Two-position
1
12-18783
+· - - - - - . - .. - .. - - - - - - - - .. - - - . - - - - ... - - - . - . - .. - ·+· - .... - .. - - . ·+
Module, Ethernet Controller
I DEQNA
M7504
! Cable, Patch Panel
[TBS]
Insert, Patch Panel
[TBS]
Transceiver
H4000
[TBS]
Cable, Transceiver
[TBS]
+· - . - .. - ....... - - - - - . - .. - .. - - - - - .. - - - - - - - - - - . ·+· - ... - - .... - ·+
DZVll
Module, Async. Line Multiplexer
M7957
Cable, Patch Panel
[TBS]
Insert, Patch Panel
[TBS]
+· - . - . - - - - - - . - . - - - ... - - - - - .. - - - - .. - - - - - - - - - . - -+-. - - . - - - - - . - ·+
Printer
I LASO
[TBS]
Printer
I LAlOO
[TBS]
Cable,
Printer
SLU
BC22D-10
I
+·. - - . - - ............ - . - - .... - .... - - - - - . - . - - - - -+- •. - - ••. - - •• -+

4-40

REPLACEMENT

BLANK PAGE

4-41