Digital PDFs

EK-VAXV3-HB-001

March 1983

354 pages

Original

26MB

view download

OCR Version

16MB

view download

Document:	VAX Maintenance Handbook VAX-11/750
Order Number:	EK-VAXV3-HB
Revision:	001
Pages:	354
Original Filename:

OCR Text

EK-VAXV3-HB-001

1983 Edition

Prepared by Educational Services
of

Digital Equipment Corporation

First Edition, March 1983

The information in this document is subject to change without
notice and should not be construed as a commitment by Digital

Equipment Corporation. Digital Equipment Corporation assumes
no responsibility for any errors that may appear in this document,
Printed in U.S.A.

The manuscript for this book was created on a Word Processing
System. Book production was done by Educational Services
Development and Publishing in South Lawrence, MA.

The following are trademarks of Digital Equipment Corporation:

DATATRIEVE
DEC
DECmate
DECnet

DECUS
DECwriter
DIBOL
dlilgliltlall

DECSYSTEM-20
DECtape

P/OS
Professional

DECset
DECsystem-10

MASSBUS
PDP

Rainbow
RSTS
RSX
UNIBUS

VAX
VMS
VT
Work Processor

CONTENTS

CHAPTER 1

INTRODUCTION

INtrodUCtioN. . . . . . i it
e e
e e e e e e e e
e e e3
VAX-11/750 System Hardware Manuals . . .................. 4
.6
... ... o0 ...
VAX-11/750 Peripheral Manuals . ... ........
VAX-11/750 Maintenance Philosophy. .. ... ... . ... ........9

aa s s o 10
CPUModules . . ... .. ittt i i it e e et e e et e
e s 11
CPU Options . .. o it it i e i e et e e e et e e
The Remote Diagnostic Facility. . . .. .. .. ... ... ... ... ... 12
e 12
i
Contactingthe DDC. . . . . .. .. .
CHAPTER 2

SYSTEM REGISTERS

CMC (MS750) Registers . . . . . v vt i v et et e et e e n e e e 15
Control/Status Register O(CSRO0) . ... . ... ... ... ... .. ..., 15
.. 15
Control/Status Register 1 (CSR 1) . ... ... .. . .
.. 15
Control/Status Register 2 (CSR 2) . .. ... ... ... ...
CPU (KA750) Processor Status Longword (PSL). . ............ 16
Internal Processor Register (IPR) Summary ... .............. 17
i i 19
Internal Processor Registers. . . . . ... .. ..
Interval Register Hardware Usage . . . . .. .. .. .............. 22
TB Register Bit Fields . . ... .. ... .. oo 28
.. 29
Cache Register Bit Fields . . ... ... .. ... ...
TB and Cache Control/Status Register Bit Fields. . .. .......... 30
WCS (KU750) Register Data Write Format. . .. .. ............ 31
e e e e s e e 32
UBI and SUB Registers. . . . . . o o v it it e it i e
... .... 32
...
(CSR).
UBI or SUB (DW750) Control/Status Register
e e 32
e
e
e
e
e
e
CSR AdAresses . . . v v v vt i e e e e e e e
33
...
...
...
...
.
UBI or SUB MAP RegisterData. .
33
.
..
..
..
.
MAP Register Addresses. .
UNIBUS to CMI Address Translation . .. .................. 34

UET Reqgisters. . . v v v it i et e e et e et m e ee i e e as o e s e s 35
e e 36
e
IPEC RegiSters . . . v v v v i et e i e it e e

UNIBUS Address and Data Registers. . . .. ... ... .. 36
e e 36
et e
i i it
Control Register 1 (CR1) . . . .. o

Control Register 2 (CR2) . . ... .

i et 36

e 37
i
.o
. . ..ters.
MBA (RH750) Regis
e 37
e
e
v
v
v
v
vt
v
o
v
v
i
v
o
o
.
.
.
.
.
.
MBA Internal Registers.
37
.
..
...
....
..
4.
Control Register (CR)-F2800
37
i
..
...
..
...
...
.
08
Status Register (SR)-F280
37
........
.........
.
0C
(VAR)-F280
Register
Virtual Address
38
.....
.........
...
...
.
10
(BCR)-F280
Register
Count
Byte
Diagnostic Register (DR) - F28014. . ... ... .. ... .o 38
Command Address Register (CAR)-F2801C................ 38

MBA MAP Register Data - F28800-F28BFC. .. ... ... ... .. ... 39
MBA to CMI MAP Address Translation . . ... ... ............ 39
MASSBUS External Device Registers. . . ... ... ... 40
... ...... 40
Drive Control Register (RO)-F28400. .. .........

Attention Summary Register (R4) - F28410. .. .............. 40
e e 41
e e
DZ11 Registers. . . . .o v ittt e e e e e e e e
RKBTT Registers. . . . o v it e e et e e e e et et et e et e e e 42
e 44
e
e
DR750 Registers. . . . .o i i it i it e e e e e
DR750 Command Block. . .. .. ... .

i e 44

DR750 Command Packet . . ... .. ... ...

DR750 DCR Register- Read Format. . . . .. ... .. .. ......... 45
DR750 DCR Register - Write Format ... .................. 46
DR750 Status Longword . . . .. ... .. .
DR750 Utility Register. . . . . . . . o

it it i

e e e 47
e

e e e e e it e

e e 48

Dl Clock Data Rate Selection . ... ... ... ... ... ... ... .. 48
DR750 Device VeCtors.

. . .. . v v v it it e e e e et et

e e e e e e 49

CHAPTER 3

MODULES AND GATE ARRAYS

VAX-11/750 Module Utilization ... ... ... ..o 53
e b4
CMC Gate Array Layout (LOO11). . .. .. . oo v oo
s 55
i
..
...
..
.
.
(LOO16).
Layout
CMC Gate Array
56
oo
i
i
oo
...
.
.
.
Description.
CMC Gate Array
56
e
i
it
..o
..
.
.
.
.
ROMs
Bootstrap Device
56
e
ooo
o
.
..
..
.
.
.
sses
ROM Starting Microaddre
DPM Gate Array Layout (LO002). .. ... ... v 57
e o 58
DPM Gate Array Description. . . .. .. .i o
o 59
.
..
..
..
.
.
(LOOO3)
Layout
MIC Gate Array
60
e
c
i
..o
..
..
.
n
Descriptio
Array
MIC Gate
61
oo
..
...
...
.
.
(10004)
Layout
UBI Gate Array

e 62
SUB Gate Array Layout (LOO10) . . .. ... oo i i oo
63
o
e
oo
oo
oo
.o
..
..
.
on
Descripti
Array
Gate
UB! and SUB
64
o
o
..
...
...
.
(LO0OO7).
Layout
Array
MBA Gate
65
e
oo
o
i
i
oo
.
..
.
.
.
n.
Descriptio
Array
Gate
MBA
e 66
FPA Gate Array Layout (LOOOT) . ... .. ..o
oo 67
FPA Gate Array Description . . . .. ... oo
Gate Array Part Number/Module Cross-Reference . . ........... 68
CCS Module with WCS (LO0O5B). . . .. .o o oo 71
CCS Module ROM Layout. . . .. .. o vt i e oo e e e e 72
UET Component Layout . . .. ... .o 73
TU58 Interface Component and Jumper Layout. . .. .......... 74
CHAPTER 4

CONFIGURATION AND CABLING

VAX-11/750 System Configurations. . . ... .. ..o 77
e e 77
e e
e
Dual RKO7 System . . . .. ot ot
e 78
i
...
...
Dual RKO7 System with TST1.
e 79
e
e
et
e
ee
e
e
e
e
e
e
e
e
et
v
v
v
v
RMO3/TSTT SYSTEM. + v v
80
e
e
e
e
e
e
i
e
e
et
e
e
e
v
v
RMB0/TSTT SYStEM. « &
81
e
v
oo
..o
..
..
.
System Cabling Diagrams
81
o
o
..
..
..
.
.
Cables
TU58 and Front Panel
82
e
e
e
e
e
e
et
e
et
e
e
o
v
v
.
MASSBUS Cables . .
83
e
e
e
e
e
e
o
e
e
e
e
e
e
e
e
e
e
e
e
e
o
v
.
.
UNIBUS Cables. .
84
e
o
.
..
.
.
.
.
Panel.
DZ11 Distribution

DZ11 Distribution Terminals. . . ... ... ...

. 84

VAX-11/750 Power System. . . . . . ..o v it it

e e e e e e e

e 85

System Interconnection Diagram . . ... ...........
... ..... 85

VAX-11/750 Power Supply. . . . .. .. i 87
AC Power ControllerPanel . .. .. ... ... ... ... .
REMOTE/LOCAL Switch. . . .. . . .

... 89

it i e e et

e e s 90

H7104 Power System Block Diagram . .. ... ............... 91

AC Power Distribution.

. .. . .. .

DC Power Distribution.

. . .. ... ... ittt
i i it e 93

Power System Sensing . . . . . . .

i i ittt i e 92
. ittt it

e e

e e 94

+2.5 V Power Supply Block Diagram. . .. ... ............... 95
+5 V Power Supply Block Diagram.

. .. ... .............
... 96

Applying System Power . . .. .. . . ..

. . e 97

CPU Cabinet Power Requirements . . . .. .. .. ...
on.. 97

Standard Power Plugs and Receptacles. . . .. ... ... .......... 98
CHAPTER 5

BOOTSTRAPPING AND OPERATION

VAX-11/750 FrontPanel . . .. ... .. .. . ... . . ... 101
Console Panel Indicators.

. . .. ... .. ... ... . . ..., 102

Console Switch Functions. . . ... ... ... ... ... .. ..

..... 103

Console Bootstrap Flow . . . . . ... .. ... . . . . ... 105

Console Subsystem ActiononaBoot . ... ................ 106
Bootstrap Sequence.
Input Arguments.

. .. .. . .. . .

. . . .. .. . .

107

112

Software Boot Control Flags . . . . .. .. .. ... ... .. .. ...... 113
VMB Primary Boot Failures.

. ... ... .. .. ... ... . ... . ..., 114

Console Commands . . . ... ... .. .. ... 115
Console Command Error Codes . . . .. ... ... .. .. ... . ..... 117
Console Halt Codes . . . ... .... ... ... ... . . .

.. 117

Boot, Power-Up, and Initialization Halt Codes . . ... ... ... ... 117
Microverify Error Codes . . . .. . ... . .. . ... . . .
118
BOOTS8 Commands . . ...... .. ... 120

CHAPTER 6

RDM AND MICRODIAGNOSTICS

RDM Installation. . . . . .. .o
RDM Hardware. . .. .. .

it e s

i it i it i

e s a e s s

i it ettt et e e et s e oa e n oo s s

Preinstallation. . . . . . . i i v i it it

i e

Installation Procedure . . .. ... ...

i i

e e

it ittt

nannan

Installation Verification . . . . . . . . 0 i it ittt it i ea e
e an e s
e e i e e e it et e an
i
i
RDM Removal . . .. v i i
Installation Qutside the United States . . . ... ... .. ... .....
RDM Cabling . .. ..o

et et

Filtered Cable Installation. . . . .. ... .. i
RDM/Modem Signals . . . .. . .o

Selected CPU Backplane Signals.

v ittt

. . .. ... ... .o

RDM Installation Tests. . . .. « v v v i v e i v it e e a e a s s s s s oo
s
e e e e e e e e a e ne aa e e

VAX CPU TSt . . ot s e e e

VAX Memory Bus Test. . .. .. .o o

e e

e oo

e e

...
......
VAX Control Store Parity Check . . . ... ...

Microbreak Pointand Trace. . . . . . .. v it i i it o v e s o
Microdiagnostic Run Test. . . ... ... oo
o n e e n e
RDM Commands. . . . v v v v v v v e e e a s o m e a s e

..
RDM Troubleshooting Flow . . . .. ... ... ...
an o
RDM Control Key Functions. . . .. ... ..o
RDM Console Commands . . . .. v o oo vt oo ot o m oo s e s o v o

e i
RDM Console Error Codes . . . ... v v i i it i
e
ieae
v
VAX-11/750 Diagnostics . . . o v v v v v v e

i e e v e s
e

Micromonitor (MICMON) Commands . . . ... ... ..o
...
Micromonitor Program Control Flags . . .. .. ...........

Visibility Bus (VBUS) Signals ... ...

CHAPTER 7

BLOCK DIAGRAMS

VAX-11/750 Basic Diagram. . . . . .« .t v it v v i e e eae e
c i
VAX-11/750 System Diagram . . . . .. . oo i oo
i
v
o
...
.
.
.
.
Diagram.
Basic
CMC (MS750)
n e e
CMC (MS750) Block Diagram . . ... . .. oo i
DPM BasicDiagram . . . . . o v oo v v e i e o

vii

DPM Block Diagram. . . . . . . . . 0 it i

it e

MIC Block Diagram . . . .. .. .. .

TB Functional Diagram . .. .. .. .. .

e e

e 160
e 165

e e 169

Cache Functional Diagram . . . . . . . . i 170

e e 171
CCS Block Diagram . . . . . o v v v i e et e e e
o e oy 172
WCS (KU750) Block Diagram . . . . .. . oo v it oo
CCS/WCS Microword. . . . v v o e e e e e e e e e e et e e e e e 173
e e e 174
e
UBI Block Diagram . . . .. . . . 0 oo i
e 175
UBI Microword. . . . . . i i et e e e e e e e e et e e e
SUB (DW750) Block Diagram . . .. .. .. .. i 176
e e 177
e e e
SUB Microword . .. .. . it e et i e e e e e i

UDP Data Fiow Block Diagram . . .. ... .. .. ... ... 178
UBI Interface to First UNIBUS Lines . .. .. .. ... ... ....... 179
SUB Interface to Second UNIBUS Lines . . . .. ... .......... 180
MBA (RH750) Block Diagram . . .. .. ... . ... 181
MDP Data Flow Block Diagram . . . .. ... ... ... .. ... .. ... 184
e e e e e 185
FPA (FP750) Basic Diagram . . . .. . . . it i i e
FPA (FP750) Block Diagram. . . .. .. ..
i i ittt e i 186
TUS8 Drive/Cartridge Diagram. . . . .. .. ... i 187
TUB8 Cassette Tape Block Locations ... ................. 187
TUB8 Block Diagram . . . . . . . .o o i i
e
e e e
e 188
RDM Block Diagram . . . . . . oot i
e et e e e
e e e 189
CHAPTER 8

CMI, UNIBUS, AND MASSBUS

CMI Physical Address Map . . .. . . .. ..

. it 193

CMI| Address and Data Format. . .. ... ... ... ... . ...
CMI Address Format . . . . . . . .

e e

..., 194

e 194

CMI Byte Mask and FunctionBits . . ... ... ... ... . ....... 194
CMI Data Format . . ... . . . .

CMI Signal Description.

. . . . . . .

i it

e e e

e e e e e e

e 194
e

VAX-11/760 Backplane . . . .. ... ... ... . . . .

e 195

... 197

CMI Signal Pin Assignments on Option Slots. . .. ... ......... 197
Bus Grant Chain and Continuity Jumpers. . .. .. ... . ... ..... 200
MBA Installation Jumpers.

. . .. .. . . . .

MBA Select Jumpers . . . . . . .

i i 202

e e e e

MBA CMI Arbitration Jumpers . .. .. .. .. . ...

viil

e e

e 203

... o.... 203

MBA Interrupt Priority Plug . . . .. . ... ... oo 203
Reserved Arbitration Jumpers . . . ... .. ... .. 204
e 205
Module Block Layout. . . . . .. .. i it it it i e e
Module Pin Breakouts . .. .. .. .. .. .. 206
CPU Backplane fromPinSide . .. ... ... ... ... ....... 207
Backplane Connector Housing Installation Diagram . . . ... ... 208
UB! and SUB Physical Address Space . . ... ............. 209
First and Second UNIBUS Register Summary . . ........... 210
Fixed Device Address and Vector Assignments . . . . ... .. ... 211
Floating Address UNIBUS Devices . . .. ................ 215
Floating Vector UNIBUS Devices. . . . ... ... . ... .. 216

UNIBUS Signal Description. . . . .. .. .. oo 217
UNIBUS Cable Pin Assignments. . . . ... ... ... 220
MBA Physical AddressSpace. . .. ... ... ... 221
MBA and MASSBUS Register Summary. . .. .. .. .. .. ..... 222
MBA Register Offsets. . .. ... .. i 223
MBA Physical Base Addresses . . . . ... ... ..o 223
MBA Internal Register Offsets. . . ... ................. 223
.. 223
MBA MAP Register Offsets . . . ... ... ... ...
224
.........
MBA External (MASSBUS) Register Offsets. . ...
225
MASSBUS Signal Description . .. ... ... ...
228
...
MASSBUS Cable Pin Assignments. . .. .. ..
CHAPTER 9

TROUBLESHOOTING AIDS

System Troubleshooting Flow . . ... .................. 233
... 234
UNIBUS Troubleshooting with the UET or IPEC. . . .. ...
e e 236
e
e
e
e
e
et
e
e
e
e
i
e
i
o
..
.
.
Utility.
FILEX
The
e e e 237
e
The WRITEBOOT Utility . . . . . o oo i
i i 239
Machine Checks . . . .. . . . o i i i i

Translation Buffer or Bus Error . . . . . ..o

i i o v L...239

i e 242
Control Store Parity Error. . . .. .. . .
Writing SPRS . . . o oo i e 243
e e e 243
e
General Guidelines. . . . . . . . i it e
e 251
General NOtes. . . . . . v i i i i e e e e e e e e
n o 251
VAX-11/750 Troubleshooting Tips. . . .. .. ..o v
e e 253
DW750 Installation . . . . . v i i it o e e e e e e e
UNIBUS Exerciser (UBE) on the Second UNIBUS. . . ....... 253

CHAPTER 10

CHARTS AND MACROS

System Scratchpad Logic . .. .......
... .. ... .. .. ... . 257

RTEMP and GPR Functions . .. .. .. ..
Privileged IPR and MTEMP Functions.

RSRC Assignments . . .. . .. .

. ... 258

. . .. ............. 259

it it it it it et

en e e 260

MSRC Assignments . . .. .. oo v ittt i e et et et e e me

Charts.

. . . o

e e e e e e e e

e e e

e e 262

e 263

L=
oo
X3 302

SNSITEN

CHAPTER

INTRODUCTION

B
.

cmorer s[RI
N
8
CHAPTER

CHAPTER 9

10 [
CHAPTER

5 OCK DIAGRAMS

INTRODUCTION

summary

This handbook

VAX-11/750

system

maintenance

information.
It is intended to serve as a single source reference
for DIGITAL Field Service, and for Engineering, Manufacturing, and
personnel.

Training

in
available
information
detailed
complements
material
The
It
manuals and in maintenance print sets.
service
and
hardware
the
that
assumes
and
procedures,
and
diagrams,
contains tables,
with the VAX-11/758 system, its nomenclature
familiar
is
reader
and

mnemonics.

For further

VAX-11/758

chapter

that

information,

microfiche

list

refer

1library,

the

and

<combined

hardware manuals.

VAX-11/7808

and

tables included in this

nearest
the
through
Hard copy documents may be ordered
Group
Supplies
and
Accessories
the
office,
sales

DIGITAL
catalog

(Documentation Products Directory), or directly from the following

addresses.,

Customers

and

OEMs:

Equipment

Digital

Corporation

444 Whitney Street
Northboro, MA #1532

Attn:
Digital

Publishing

Customer

and Circulation Services,

Services

Section

NR2

personnel:

Equipment

Digital

Corporation

19 Forbes Road
Northboro, MA #1532

Attn:

Publishing

and Circulation Services, NR3

on
available
Technical descriptions and service manuals are also
on microfiche libraries (including
information
For
microfiche.
maintenance print sets and diagnostic listings), contact:
Digital Equipment Corporation
Micropublishing Systems, BU/E46
12 Crosby Drive

Bedford,

01730

VAX-11/750 SYSTEM HARDWARE MANUALS

Document

Title

VAX-11/750 Central Processor Unit
Technical

VAX-11/750
Technical

Description

UNIBUS

Interface

Number

EK-KA750~TD

EK-UI750-TD

Description

VAX-11/75¢ Memory System
Technical Description

EK-MS750-TD

RH750 MASSBUS Adapter
Technical Description

EK-RH750-TD

DW7508 Second

UNIBUS

Interface

Description

ERK-DW750-TD

FP750 Floating Point Accelerator
Technical Description

EK-FP750~TD

Technical

System

VAX-11/750 H7104 Power
Technical Description

VAX Architecture

EK-PS750-TD
EB-19580-20

Handbook

VAX

Hardware

Handbook

EB-21710-20

VAX

Software

Handbook

EB-21812-20

VAX Systems
VAX~11/750

Site

Preparation Guide

Installation
Test

VAX-11/751

User's Guide

VAX Maintenance

VAX Diagnostic

EK-SI750-1IN

Manual

Acceptance

Handbook,

EK-11751-UG

VAX

Systems

System User's Guide

VAX-11/750 Diagnostic

ED-22517-20

and

System Overview Manual

EK-VAXV1-HB
EK-VX11D-UG
EK-VXD75-UG

VAX-11/75@ Diagnostic Mini Reference Guide

'EK-KC750-RM

VAX-11/750 Gate Array Chip Reference Manual

EP-GA750~RM*

*Available

only on microfiche

VAX-11/750 SYSTEM HARDWARE MANUALS (CONT)

Document

Title

KC75@ Microdiagnostic/Technical

Manual

Number

EK-KC750-TM

KC75@¢ Options

User Guide

EK~-KC750-UG

KC75@8 Options

Installation Guide

EK-KC750-1IN

KC750@ Technical

Change Notice

EK-KC750~-N1

VAX Diagnostic Design Guide

EK-1VAXD-TM

VAX~-11/750 Microdiagnostic Reference Manual

EK-758YA-RM

VAX-11/758 Self-Maintenance Diagnostic Guide

EK-750YA-UG

VAX~-11/750 Change Notice

EK-7508YA-0A1
EN-01570-12

Map

VAX-11/758

System

VAX-11/750

PM Worksheets

VAX-11/750 Equipment Care Sheets
Site Preparation Data

Sheets

EK-11750-WS
EK-11750-EC
EK-CORP-SP

VAX-11/750 PERIPHERAL MANUALS

Document

Title

Number

LA38

DECwriter

IPB

EK-OLA38-1IP

LA34

DECwriter

IPB

EK-LA34S-1IP

EK-LA345-TM

Manual

DECwriter

IV Technical

DECwriter

IV Pocket Service Guide

EK-LA34S-PS

IV User Guide

EK-0LA34-UG

LLA34 DECwriter
LA34

EK-@LA34-N1

User's Guide Addendum

LLA34 DECwriter

IV Reference Guide

LAl12¢ Technical

Manual

LA120

User's

EK-LA120-TM
EK-LA120-UG

Guide
Guide

LAl12@

User's

LA12@

Operator

LA120

Pocket

EK-ALA12-UG

Addendum

Reference

Card

EK-LA120-RG

Service Guide

EK-LA120-5V

LA12@ Pocket Service Guide Addendum
Pocket

LA120

Series

LA12@¢

Customer

LA120

DECwriter

EK-LA120-PS

Care

EK-LA120-EC
EK-LA120-IP

IPB

Technical

Manual

DECtape

TU58 DECtape

User's Guide

Pocket

TU58

TU58 DECtape
TU58

DECtape

Customer

TU58 Cartridge
TU58-VA
TU58

DECtape

Tape
II

EK-ALA12-5V

Service Guide

Equipment
III

EK-OLA34-RG

EK-gTUS58-TM

ERK-@TUS58-UG

Service Guide

EK-@TU58-PS

Care

EK-0TU58~EC

Equipment

Drive

IPB

Configuration

Installation

Sheets

EK-@TUS8~-1IP
EK-@TU58-CG

EK-Q0TUS58-WS

VAX-11/750 PERIPHERAL MANUALS (CONT)

Number

Title

Document

PDP~-11 DECdisk Subsystem
Register Reference Card

EH-18955-18

RKP6/07 Technical Description Manual

EXK~RK#67-TD

Manual

EK~-RK@67-UG

RK@6/07

User's

RK@6/@7 Disk Drive Service Manual

EK-RK@67-5V

RK@6/07 FTB Operating/Service Manual

EK-RK67F-0P

RK@6/87

Customer

Care

EK-RK@67-EC

Sheet

IPB

EK-ARKA7-1IP

RK611 Technical Description Manual

EK-RK611~-TM

RK@7

RK611

Disk

Drive

IPB

EK-RK611-IP

Manual

ER-ORM@A3-TM

Controller

RM@3 Technical

RM@3 Disk Drive Maintenance Manual

ER-@JRM@3-MP

IPB

EK-ORM@3-IP

RM@3

Disk

RM@2/083

Drive

EK-RM@A23-UG

User's Guide

RM@2/83 Disk Subsystem Service Manual
RM@2/@83 Customer
RM@2/63

Equipment

EK-RM@23-5SV

EK-RM@23-EC

Care

EK-RM@23-WS

PM Worksheets

TS11 Subsystem Technical Manual

EK-0TS11-TM

TS11 Subsystem User's Guide

EK-ATS11-UG

TS11 Subsystem Customer Equipment Care

EK-0TS11-EC

TS11 Pocket Service Guide

EK-0TS11-PS

TS11-A Magnetic Tape Subsystem IPB

EK-TS11A-1IP

TS11-B Magnetic Tape

EK-TSB11-IP

Subsystem
IPB

EK-TS11B-IP

TS11-C Magnetic Tape Subsystem IPB

EK-TS11C-IP

TS11-B Magnetic Tape Subsystem

VAX-11/750 PERIPHERAL MANUALS (CONT)

Document Number

Title
RM@5

Disk

Drive

Service

RM@5

Disk

Subsystem

RM@5

Disk

Drive

RM@5

User's

EK-0ORM@S5-SV

Guide

Magtape

Tape

ERK-ARM@5-IP
EK-@RM@5-WS

Transport

Technical

TU77

Technical

TU77

Magtape

V1
V2

EK-2TU77-TM

User's

Guide

EK-@TU77~-UG

Update

Transport

EK-2TU77-01

TU77

Magnetic

Tape

Addendum

Magnetic

Tape

Transport

IPB

Magnetic

Transport

Equipment

TU77/TU78

ERK-@TU77-01

Worksheets

Disk

Drive

Technical

RM8@

Disk

Drive

Service

RM8@

Disk

Drive

User's

Guide

Description

Guide

Manual

RM8¢

Disk

Drive

Pocket

RM8@

Disk

Drive

Customer

RM8@

Disk

Drive

IPB

TE16/TE10W/TE1ON

Care

EK-TU778-EC

TE16/TE10W/TE1QN

Equipment
IPB

EK-ORMB8@-TD
EK-ORMB80-SV
EK-@RM8@-UG
EK-@RM8O-PG

Package

EK-@RM8A-EC
EK-ORM80G-IP

Maintenance

TE16

Magtape

EK-ATU77-1P

EK-TU778-WS

RM8¢

DEC

EK-1TU77-TM

Manual

TU77

TU77/78

EK-@RM@A5-UG

IPB

Worksheets

TU77 Magnetic
TU77

Manual

Care

EK-ATE16-TM

EK-@TE16-EC
EK-O6TE16~-1P

VAX-11/750 MAINTENANCE PHILOSOPHY

or
repair
the
of
consists
maintenance
system
VAX-11/750
components, or complete hardware units,
modules,
of
replacement
of
level
the
and
test
depending on the type of hardware under
testing

that

applies

each

unit.

on
overall CPU maintenance consists of replacing gate array chips
the defective CPU module as determined by microdiagnostic testing.
If replacing the gate array(s) called out by the microdiagnostic
test does not fix the problem,

Corrective maintenance

for

the module must be

internal

CPU

replaced.

options

such

the

floating-point accelerator (FPA) module and the remote diagnostic
module (RDM) consists of module replacement if the associated
diagnostic

indicates

failure.

The MASSBUS adapter (MBA) and second UNIBUS (SUB) modules are also
failure.
indicates a
associated diagnostic
if the
replaced
replaceable wunit
Attached external devices normally follow field
their
to
according
fault 1isolation and are serviced
(FRU)
respective maintenance

philosophies.

The following tables provide an overview of the corrective

prescribed for devices inside the VAX-11/750 system cabinet.

action

VAX-11/750 MAINTENANCE PHILOSOPHY (CONT)

CPU MODULES
of

Level

Replacement

Module

Name

Number

Component/

(Mnem)

(Slot)

Gate

Data

LO0O2

Primary

Path

(2)

(micro~-

(DPM)

Replace
Module

Array

Notes/Comments

Secondary

Replace module
arrays do
the problem.

if the
not fix

Replace

if the
not fix

gate

diagnostic
testing)

Memory

Looo3

Inter-

(3)

Primary

Secondary

connect

module

gate

arrays

the

problem.

(MIC)
UNIBUS

Lpgo4

Inter-

(4)

face

Primary

Tested by running
level 3 diagnostic,

Secondary

ECCBA.EXE,

Tape

(UBI)
CpPU

LA@Oo5

Control

(5)

Primary

diagnostic

this

test

module.

Store

(CCS)
NOTE:

way

check
must

to
as
be

determine
follows.
in

the
The

condition of
L@PO6 remote

Performing
RDM>

STO

RDM>

PAR

CSAD

RDM

(MTM)

to do a parity
module (RDM)

series

this

test

address

produces

printouts.

If CSAD
the CCS

The

the CCS is
diagnostic

place.

= 17FD (hex),
is okay.

17FD

also

known

the

LO@GO6YA maintenance

customers.

tool

module

VAX-11/750 MAINTENANCE PHILOSOPHY (CONT)

CPU OPTIONS
Level
Module

Module

Name

Number

Remote

L@QG6

Diag-

(6)

(Mnem)

(Slot)

Replacement

Component/

Gate

Array

Replace
Module

Notes/Comments

Primary

DIGITAL-owned option
used to run microdiagnostics locally or
Test by
remotely.

Primary

Tested

nosis

(RDM)

running

Float-

L@@l

ing

(1)

Point

ECKAF.EXE

running

EVKAC.EXE.

Accelerator

(FPA)

MASSBUS

L@@@a7

Adapter

(7,8,9)

Primary

three

MBAsS

may

exist.

(MBA)

Second

Lgo1od

UNIBUS

(7,8,9)

Primary

Interface

(SUB)

SUB typically resides in
Microcode
slot 7.
driven it contains its
UBI
own NPR arbitrator.
handles BR arbitration
for first and second
UNIBUS and MASSBUS
(option slots).

CMI/Memory
Control

Primary

Secondary

diagnostic

(CMC)

Microcode driven, the
controls memory refreshes error checking,
data buffering, select
timing and contains ECC
Test by running
logic.
CMC

(micro-

testing)

ECKAM. EXE.

1 = 256 kilobytes
memory array module

CMC
16K

1,
RAMs

Logll
(10)

CMC
per

CMC

2,
RAMs

Log16
(19)

CMC 2 = 1 megabyte per
memory array module

64K

TU58

Control/
Drive

Replace

module/
drive
unit

Test with sections
9 of diagnostic
ECKAX.EXE.

and

VAX-11/750 MAINTENANCE PHILOSOPHY (CONT)

THE REMOTE DIAGNOSTIC FACILITY

The customer is required to provide a voice grade telephone line
and connector for DIGITAL Diagnostic Center (DDC) communication.
The RDM option will be installed in all VAX-11/758 systems during
customer during the
the
to
1its wvalue
to prove
installation

warranty period.

customers with the

will

all

for

backplane

the

1left

standard RD maintenance contract.

CONTACTING THE DDC
Basic

Flow:

The customer calls the DDC toll free number when

there

problem.

For DDC connection (toll free)
For Field Service assistance
U.S.F.S Library (DEC employees

1-800-525-6570
1-303-599-4000
1-303-593-7890

2.
3.

DDC

The

identifies

only)

stop is CX/DDC

The Library mail

remote

performs
the

failing

(Colorado Springs).

subsystem

option

the

and

isolation

fault

Branch office.

The Branch office sends a Field Service Engineer with parts to
correct

the

problem.

Problems:

For

CPU

The engineer takes the CPU spares and RDM tool

to the site.

The engineer

tapes.

For
in

runs

the microdiagnostic

customers with non-RD contracts,
the
VAX-11/758
backplane
and

cassette
the
1is

RDM tool
removed

is installed
when work 1is

complete.

CPU modules,

also
3.

string

faults
of

are

chips

isolated
(average

to
of

The engineer performs component
level
replacing the indicated gate arrays.

specific

two

gate

module

and

arrays).

replacement

(CLR)

When CLR does not correct the fault on CPU
modules
or
other
CPU~-related
failures,
the
failing
module
or
assembly
Iis
replaced.,

IMPORTANT:

The

them

building

fix

should
a

verified

with

case

history

VAX-11/750.

the

DDC

failures

assist
for

the

CHAPTER 2

SYSTEM REGISTERS

CMC (MS750)

REGISTERS

CONTROL/STATUS REGISTER 0 (CSR 0)
00

09 08 07 06

24 23

31 30 29

OF ERROR I 00 IERROR SYNDROMEI
OFZOOOO[ ] l lOOOOOl PAGE ADDRESS
l I— CRD ERROR LOG REQUEST (1 BIT ERROR)
LOST ERROR

UCE UNCORRECTABLE ERROR

CONTROL/STATUS REGISTER 1 (CSR 1)
31

09 08 07 06

29 28 27 26 25 24 23

1 F20004 r 000 l l l l l 0 l PAGE MODE ADDRESS [ 00 l CHECK SYNDROMEJ
l——— DISABLE ERROR CORRECTION

DIAGNOSTIC CHECK MODE (FOR VERIFY SYNDROME
BITS FUNCTION)
PAGE MODE

ENABLE REPORTING CORRECTED ERRORS ENABLE
CRD INTERRUPT
TK-4114

CONTROL/STATUS REGISTER 2 (CSR 2)
31

23 24 23

2 F20008 || UNDEFINED lOl

STARTING
ADDRESS

17 16 15

l ‘

MEMORY PRESENT
Y

— |

BACKPLANE JUMPER
SELECTABLE

—

BITS <15:0> INDICATE MEMORY PRESENT
IN 128KB INCREMENTS (2 BITS PER
MODULE)

INIT

0 INDICATES 16K

RAMS USED IN
MEMORY ARRAY

COLD/WARM RESTART FLAG

=1 ON POWER UP OR BATTERY DEAD
=0 AFTER FIRST4 BYTE WRITE

‘

—

TK-4115

ALITIEILYdNOD_

AYHYD

MOT4H3AO0

JAILYO3IN

LdNHYHILNIALIHHOOISHEd3T0IAHTd SNIVLS QdOM
T44ONVINOYDIIIILWLILIVONOYAINOQOTMMDOOMTT'OAJSTHd3YHddI3H0AIDIOAAC0NddVvHHd1dvL1HN1NL33N3

311S0dHVN!HY114HLI1HLOVNNvIIdOAINHNIOOVdAYLQS
ISNN3O-IHAIENH2dJJ00 WW

3709VYNL3

1SG96-3

HOS 30 4d SNLVLS JHOMONOT
CPU (KA750) PROCESSOR STATUS LONGWORD (PSL)

INTERNAL PROCESSOR REGISTER (IPR) SUMMARY

Address

Mnemonic

KSP

Kernel

g2
g3
g4

SSP
uUsp
ISP

Supervisor Stack Pointer
User Stack Pointer
Interrupt Stack Pointer

B5-07

Reserved

28
g9
gA
@B
gC

POBR
POLR
P1BR
P1LR
SBR
SLR

P@ Base Register
P@ Length Register
P1 Base Register
P1 Length Register
System Base Register

10
11

PCBB
SCBB

Process Control Block Base
System Control Block Base

GE-OF

ESP

Name

Stack

Executive

Pointer

Stack Pointer

System Length Register

Reserved

12
13
14

IPL
ASTR
SIRR

Reserved

Type*

SISR

W/0

Interrupt Priority Level
AST Level Register
Software Interrupt Request Register

Software Interrupt Summary Register

CMIERR

R/0

CMI Error Register

18
19

ICCS
NICR

W/0

Interval Clock Control/Status
Next Interval Count Register

CSRS

1A
1B

1D
1E
1F

ICR
TODR

CSRD

CSTS
CSTD

R/0

R/0O
W/0

Interval Count Register
Time of Day Register

Console Storage Receiver Data

Console Storage Transmit Status
Console Storage Transmit Data

*Registers are read/write unless otherwise specified;
R/0 means read-only; W/0 means write-only to perform
the

specified

Console Storage Receiver Status |

function(s).

INTERNAL PROCESSOR REGISTER (IPR) SUMMARY (CONT)

Address

Mnemonic

RXCS

RXDB

TXCS

TXDB

TBDR

Type¥*

R/0

W/0

Name

Console Receive Control/Status
Console Receive Data Buffer
Console Transmit Control/Status
Console Transmit Data Buffer
Translation Buffer Disable Register
Cache Disable Register

CADR

MCESR

CAER

ACCS

R/0O

Accelerator Control/Status

Reserved
I0 RESET

W/0

Initialize

MME

TBIA

TB1IS

Reserved

3D
3E

PMR
SID

R/0O

TBHP

W/0

Cache

Error Register

UNIBUS

Memory Management Enable
W/0

W/0

DATA

Translation Buffer Invalidate All
Translation Buffer Invalidate Single
Translation

Buffer

Data

By
Per formance Monitor Register
System Identification
Hit
TB
for
Buffer
Translation
Probe

29-36

Machine Check Error Summary Register

*Registers are read/write unless otherwise specified;
R/0 means read-only; W/0 means write-only to perform
the

specified

function(s).

INTERNAL PROCESSOR REGISTERS

HEX NAME

IPR #00

KSP

KERNEL STACK POINTER

IPR #01

ESP

EXECUTIVE STACK POINTER

IPR #02

SSP

SUPERVISOR STACK POINTER

IPR #03

USP

USER STACK POINTER

(PR #04

ISP

INTERRUPT STACK POINTER
31

VIRTUAL ADDRESS OF TOP OF STACK

IPR #08

POBR

PO BASE REGISTER
RESERVED OPERAND FAULT IF VLA < 2**31

IPR #0A

P1BR

P1 BASE REGISTER

RESERVED OPERAND FAULT IF VLA < 2%*31 - 2%*21
31

[

VIRTUAL LONGWORD ADDRESS

IPR #09

POLR

PO LENGTH REGISTER

IPR #0B

PILR

P1 LENGTH REGISTER

IPR #0D

SLR

SYSTEM LENGTH REGISTER

01 00

] MBZ

LENGTH OF POPT IN LONGWORDS

2**21 - LENGTH OF P1PT IN LONGWORDS

LENGTH OF SPT IN LONGWORDS

RESERVED OPERAND FAULT IF MBZ #0
31

MBZ

LENGTH IN LONGWORDS

TK-1750

INTERNAL PROCESSOR REGISTERS (CONT)

HEX NAME

IPR #10 PCBB

PROCESS CONTROL BLOCK BASE
RESERVED OPERAND FAULT IF MBZ # 0.

3130 29

FABZ[

IPR #11 SCBB

02 0100

lMBZ]

PHYSICAL LONGWORD ADDRESSOF PCB

SYSTEM CONTROL BLOCK BASE
RESERVED OPERAND FAULT IF MBZ # 0.
313029

MZI

IPR #12 IPLR

020100

PHYSICAL PAGE ADDRESS OF SCB

INTERRUPT PRIORITY LEVEL REGISTER
31

0504

IPR #13 ASTR

lMBZl

MBZ

lPSL<20:16>l

AST LEVEL REGISTER
RESERVED OPERAND FAULT {F NOT VALID I.E.,, MBZ # 0.

03 02

[

IPR #0C SBR

MBZ

ASTLVL

SYSTEM BASE REGISTER
RESERVED OPERAND FAULT IF MBZ # 0.

31 3029

[MBZ[

PHYSICAL LONGWORD ADDRESS

02 01 00

lMBZ]

TK-1753

INTERNAL PROCESSOR REGISTERS (CONT)

IPR #19 NICR NEXT INTERVAL COUNT REGISTER (WRITE ONLY)

IPR #

NAME

NICR

ICR

ICCS

2'S COMPLEMENT OF INTERVAL DESIRED X 1 u5EC

IPR #1A ICR INTERVAL COUNT REGISTER (READ ONLY)
31

ACTUAL INTERVAL COUNT PERIOD

IPR #18 1CCS INTERVAL CLOCK CONTROL AND STATUS (COMET HARDWARE)
31302928 2726252423222120191817 16

]

HERSHSEEE

TRANSFER OVERFLO PENDING
INT REQUEST
INT ENABLE
SINGLE CLOCK
TRANSFER

SERVICE REQUEST

TRANSFER REQUEST
OVERFLOW PENDING
RUN

IPR #18 1CCS

INTERVAL CLOCK CONTROL STATUS (VAX SOFTWARE)
31

7 6 5

16 15 14

3 21

INT REQ‘E——J
INT EN

SINGLE CLOCK
TRANSFER
RUN

INTERVAL TIMER PROCESSOR REGISTERS
TK-5929

INTERNAL PROCESSOR REGISTERS (CONT)

INTERVAL REGISTER HARDWARE USAGE
WBUS

54 23 22 21 20 19 18 17 16 15

OVERFLO
ERROR jTRANSFER
NT REQ
PENDING

00
NICR <15:0>
ICR <15:0>

TOK GATE ARRAY
INTERFACE

TO CPU WBUS

INT EN
SINGLE CLOCK
TRANSFER—

SERVICE REQ—
TRANSFER REQ-

OVERFLOW PENDING—
—
RUN

ICR

IPR 1A [ SCRATCHPAD ICR R [SPNICR,SPICR] <15:0>
NICR

IPR 19 ( SCRATCHPAD NICR R [SPNICR,SPICR] <31:16>

16 15

ICCS

IPR 18 r

lERRl

TOK GATE ARRAY <31>~J

TOK GATE ARRAY ICR <15:0>
TOK GATE ARRAY NICR <15:0>

07 06 05 04

[IRIIE]SCITR[

TOK <23>—J J

J
00

]

TOK<16>J

TOK 22>

TOK <21>
TOK <20>
TK4311

INTERNAL PROCESSOR REGISTERS (CONT)

TIME OF DAY REGISTER

IPR IB TODR

[
IPR #14 SIRR

TIME OF DAY (10 MILLISECOND INCREMENTS)

SOFTWARE INTERRUPT REQUEST REGISTER
RESERVED OPERAND FAULT IF READ

04 03

MBZ

SIRL

WRITE ONLY

iIPR #15 SISR

SOFTWARE INTERRUPT SUMMARY REGISTER
31

{

1615

0100

L SOFTWARE INTERRUPT REQUEST I J

MBZ

EDCBA9876%5 4321

MBZ

TK-1752

IPR #1C CSRS

CONSOLE STORAGE RECEIVER STATUS

!D]tEI

CONSOLE STORAGE RECEIVER DATA

IPR #1D CSRD[

DATA

RECEIVE

RECEIVE FROM TU-58

CONSOLE STORAGE TRANSMIT STATUS
31

IPR #1E CSTS[

BREAK———J

CONSOLE STORAGE TRANSMIT DATA

7 6 56 4 3

31
iPR #1F CSTD

]RIIE[

TRANSMIT

DATA

0
TRANSMIT TO TU-58

TK-1733

ENTERNAL PROCESSOR REGISTERS (CONT)

b! =3 67 0 00

§wl§““ {-J

;{,,ALJM.W,

Botr

{fi}£}

TRANSLATION BUFFER

IPR #24 TBGDR

g\’(&'} f“‘d‘ E éjfifi Yj%
gv%%
O

;f."”
:I‘ l
i,
#
LtLL Dilafc
4G%g

"!(ki 0 STTRlg
PeIT0

IPR #24

GROUP DISABLE REGISTER

THIS IPR IS READ/WRITE TO ALL BITS

3l
MBZ

EMENT
0= RANDOM REPLAC
EMENT
1=FORCE REPLAC

3210

0= REPLACE GROUPO
1= REPLACE GROUP 1
FORCE MISS GROUP 1
FORCE MISS GROUPO

CACHE DISABLE REGISTER

IPR #25 CADR

IPR #25

THIS IPR IS READ/WRITE

31
MBZ

DISABLE CACHE ————
CACHE ERROR REGISTER

IPR #27 CAER

IPR #27

THIS IPR IS READ/WRITE

3210

]
|]

CACHE TAG PARITY ERROR

CACHE DATA PARITY ERROR
LOST ERROR
CACHE HIT

IPR #26 MCESR

MACHINE CHECK ERROR SUMMARY REGISTER

IPR #26

A1TOBIT 3
THIS IPR IS READ/WRITE TO ALL BITS. WRITING,
CLEARS THE BUS ERROR REGISTER. WRITING A 1TOBIT 2
CLEARS THE TB GROUP PARITY REGISTER.

3210

31
MBZ

BUS ERROR, REFER TO BUS ERROR REG.

]

TB PARITY ERROR
UNALIGNED UNIBUS REFERENCE
XB FETCH =1, OPERAND FETCH=0

TK-5765

INTERNAL PROCESSOR REGISTERS (CONT)

IPR NO. 28 ACCS ACCELERATOR CONTROL/STATUS

0100

16 1514

FP ACCELERATOR ENABLE

(WRITE ONLY)

FP ACCELERATOR PRESENT

(READ ONLY)

HEX

NAME

IPR #20

RXCS

TK-9662

CONSOLE RECEIVE CONTROL/STATUS
31

08 070605

l le{

MBZ

}

DONE

IPR #21

RXDB

CONSOLE RECEIVE DATA BUFFER
31

|
IPR#22

READ ONLY

TXCS ~ CONSOLE TRANSMIT CONTROL/STATUS
31

TXDB

08 070605

BT
00

]

|
IPR #23

08 07

| L ENABLE INTERRUPTS

READY

& EXCEPTIONS = 1

08 07

CONSOLE TRANSMIT DATA BUFFER

WRITE ONLY

o |
TK-1748

INTERNAL PROCESSOR REGISTERS (CONT)

HEX

IPR #38

NAME

mMmE

ID#

MEMORY MANAGEMENT ENABLE
WRITE 1 ALSO CAUSES MICROCODE TO INVALIDATE TB.

0100

MME

IPR #39

T7TBIA

TRANSLATION BUFFER INVALIDATE ALL
RESERVED OPERAND FAULT IF READ

MBZ
WRITE ONLY

IPR #3A

TBIS

TRANSLATION BUFFER INVALIDATE SINGLE
RESERVED OPERAND FAULT IF READ

{

VIRTUAL ADDRESS
WRITE ONLY

IPR #3D

prwmR

PERFORMANCE MONITOR REGISTER
RESERVED OPERAND FAULT IF =1

0100

MBZ

l J
l

PME

IPR #3E

siD

SYSTEM IDENTIFICATION

(READ ONLY)

RESERVED OPERAND FAULT IF WRITE

24 23

SYSTEM TYPE

0 UNDEFINED
1 11/780
2

11/750

NEBULA

- 255

16 15

MICROCODE

HARDWARE

REVISION

LEVEL

BACKPLANE
FROM MICRO.
WORD LITERAL ~ JUMPERS
FIELD

SLOT 4 OR BACKPLANE

SWITCH CARD

RESERVED

TK-2099

INTERNAL PROCESSOR REGISTERS (CONT)

IPR NO. 3F TBHP PROBE TRANSLATION BUFFER FORTB HIT
31

VIRTUAL ADDRESS

WRITE ONLY
TK-9653

1PR#17l

20 19 18 17 16

12 1110 09 08

04 0302 0100

] {

0= CMI ENABLED
1= CM| DISABLED
READ=1, MODIFY=0

VIRTUAL=0, PHYSICAL=1
CPU MODE,

K,E, 5, U

READ LOCK TIMEOUT
TB G1 TAG ERROR

TB GO TAG ERROR
TB G1 DATA ERROR
TB GO DATA ERROR

TBHIT

MEMORY ERROR

READ DATA SUBSTITUTE
LOST ERROR

CORRECTED READ DATA

CMI ERROR PROCESSOR REGISTER
TK-3266

iPR #37 IO RESET INITIALIZE UNIBUS
00

ISSUE UNIBUS INIT———-————J
IO RESET PROCESSOR REGISTER
TK-3267

INTERNAL PROCESSOR REGISTERS (CONT)

TB REGISTER BIT FIELDS

INTERNAL PROCESSOR
REGISTER (IPR) BITS

NAME

r3!2[1]OEMME

IPR #

MEMSCAR #

'ADK CHIP’

T
OFF
0= MEMORY MANAGEMEN
1=MEMORY MANAGEMENT ON
-0
=0
'

s | TM
7o

IPR #

MEMSCAR
#

‘UTR CHIP’

Lozmsss

1=HIT

=0
N O

EERERER

TBGDR

IPR #

MEMSCAR
#

3
'ADK CHIP’

| 0=NORMAL

{ = FORCE MISS IN GO

0= NORMAL

1 = FORCE A MISS IN G1

0= FORCE REPLACE GO

~ 1= FORCE REPLACE G1
|

0=RANDOM REPLACEMENT
1= FORCE REPLACE (USED WITH BIT 2)

TBGPR

IPR #
17

0=NORMAL

MEMSCAR
#

‘UTR CHIP’

1=GO DATA ERROR

0= NORMAL.

1=G1DATA ERROR

L0=NORMAL
1=G0
TAG ERROR
L0=NORMAL

1=G1TAG ERROR
TK5769

INTERNAL PROCESSOR REGISTERS (CONT)

CACHE REGISTER BIT FIELDS

INTERNAL PROCESSOR

IPR#

CAER

EIEIEE

MEMSCAR #
4
‘CAK CHIP’

L
LOST ERROR
0=NORMAL

1=DATA ERROR
0=NORMAL

1=TAG ERROR

IPR #

0-cAcHE ON

MEMSCAR #

6
‘CAK CHIP’

1 = DISABLE CACHE (FORCE MISS)
UNDEFINED
UNDEFINED

UNDEFINED

[23 { 22 l ! l 20_] ONLY REGISTER
CACHE WRITE

MEMSCAR #

0=CMI ON

‘'UTR CHIP'

1= DISABLE CMI

=0
1l

IPR #

=0
TK-5802

INTERNAL PROCESSOR REGISTERS (CONT)

TB AND CACHE CONTROL/STATUS REGISTER BIT FIELDS
INTERNAL PROCESSOR

r3 1 2 [ ! [ 0 J

NAME

MCESR

MEMSCAR #

IPR #

'"UTR CHIP’

0= OPERAND FETCH
1=XB FETCH
0= NORMAL
1= UNALIGNED UNIBUS REFERENCE
| 0= NORMAL

1=TB ERROR (WRITING A ONE CLEARS TBGPR)
| 0=NORMAL

1=BUS ERROR (WRITING A ONE CLEARS BER)

)

BUS ERROR

SUMMARY REGISTER

IPR #

MEMSCAR
#

"UTR CHIP’

L_OzNORMAL

1=CORRECTED READ DATA

0=NORMAL
1=L0OST ERROR

| 0=NORMAL

1=UNCORRECTECTABLE DATA ERROR
| 0=NORMAL

1= NONEXISTENT MEMORY

[ 19 [ 18 [ 17 [ 16 ] REGISTER
SAVED

MODE

IPR#

MEMSCAR
#

‘ADK CHIP’

- MODE <0>

= MODE <1>
0=VIRTUAL
1=PHYSICAL

0= READ — MODIFY

[ 15

1=NORMAL READ

12*
I

WRITE VECTOR

OCCURRED REGISTER

0=NORMAL

IPR #

MENMSCAR #

'ADK CHIP’

1=VECTOR IN MDR

* ALSO READS AS THE READ LOCK TIMEOUT BIT

TK5770

WCS (KU750) REGISTER DATA WRITE FORMAT

19
F0O0000

161514 13

FPA

NEXT*

CLKX
JSR

34 33323130

RSRC

F00004

CcC

25 24

WCTRL

BUS

ISTRM

59 58 57

48 47

F00008

42 41 40

ALPCTL

BUT

ROT

<1:0>

DTYPE

7978777675
LIT

FO000C

7170 69 68
MISC

SPW|

64 63

MSRC

60
ROT
<B:2>

PAR1
PAR2

WCS PRESENT”
*NOTE:

WCS ADDRESS SPACE IS FO0000 THROUGH FOFFFC.
BIT <20> ISWRITTEN AS 1 ON THE LAST WORD
WRITTEN TO THE WCS. WCS PRESENT SET ENABLES
THE WCS MICROCODE TO BE EXECUTED.
TK-9658

UBI AND SUB REGISTERS

UBI OR SUB (DW750) CONTROL/STATUS REGISTER (CSR)
CMI

DATA LONGWORD

77/, 01]00|

(NOT USED)/

{31]30|29}28"777"7

[—PURGE(PUR)REOUEST
UNCORRECTABLE
ERROR (UCE)

MEMORY (NXM)
NON—EXISTANT
ERROR (ERR) FLAG
TK-3886

CSR Addresses
Control/Status
Register

UBI
Address

SUB
Address

CE8R 1
CSR 2
CSR 3

F3pp04
F30008
Fl3ppacC

F32004
F32008
F3206C

Buffered
Path

Data
BDP

BDP

UBI AND SUB REGISTERS (CONT)

UBI OR SUB MAP REGISTER DATA

CMI DATA LONGWORD

os{ )22 21y

[31]

00]

114

PFN

‘

PAGE FRAME NUMBER

DP SEL 1,0 —— DATA PATH SELECT
“0" —— OFFSET BIT

BIT
“V'" —— VALID
TK-3882

DP
1

SEL
]

4]
@

@
1

Bits

Data

Path

Direct Data Path (DDP)
Buffered Data Path 1 (BDP 1)
Buffered

Data

Path

Buffered Data Path 3

(BDP

MAP Register Addresses

UBI Address

SUB Address

000
004

F30800
F30804

F32800
F32804

MAP 7F8
MAP 7FC

F3QFF8
F3@FFC

F32FF8
F32FFC

MAP Register
MAP
MAP

(BDP 3)

UBI AND SUB REGISTERS (CONT)

UNIBUS TO CMI MAP ADDRESS TRANSLATION

UNIBUS ADDRESS

MAP

ADDRESS

DP SEL 1,0

& C1, CO

U UeN

02| 01]oo]
v

A1, AO TO UCN
WITH C1, CO

> ADDRESS MAP

EROM UNIBUS: VALID, OFFSET,
A1, AO,

09 | 08

512X 19

RAM

MAP

DATA

[14

v
PFN

)

28|27

[31
l

25]7]23

BYTE

FUNCTION|

MASK

CODE

09/08

PHYSICAL LONGWORD ADDRESS

7173 cmi
-

TK-3883

UBI AND SUB REGISTERS (CONT)

UET REGISTERS
15

]

[P
UNIBUS ADDRESS REGISTER

| |

UNIBUS DATA REGISTER

UET CONTROL STATUS REGISTER

UET
SSYN
TIME

BUS REQUEST
LEVEL SELECT
ISSUE

UNIBUS

FORCE

UNIBUS — PB

UNIBUS

TRANSFER

PARITY

SELECT

ERROR

NPR

OUT | ADDRESS
EXTENSION

—=— (3§, () -

“‘?}f’é"“’”’“&

C PP

%; 0 = Tzfm‘a

I, 1= AT oR
FFF466

ZERO

ROM DATA

TK-5609

UBI AND SUB REGISTERS (CONT)

IPEC REGISTERS

UNIBUS Address and Data Registers
15

“}

UNIBUS ADDRESS

FBF460§

<A15:A00>

UNIBUS DATA

FBF4625

)

<D15:000>

TK-80O1

Control Register 1 (CR1)
15-

FBFaezx!stI

acLoll Acie

INT

PE ?%YN P | Aa17 | a6 | c1 | co NPR]

—

CR1<BR7:BR4>

DONE1

TK-8002

Control Register 2 (CR2)
S5

! ENG
BF 46 OPT

FBF466

<V8:VO>

TK-8003

MBA (RH750) REGISTERS

MBA INTERNAL REGISTERS

Control Register (CR) — F28004

MBA (RH750) REGISTERS (CONT)

MBA INTERNAL REGISTERS (CONT)
Byte Count Register (BCR) — F28010

BCR i

16 15

MASSBUS BYTE COUNTER

00,

CMI BYTE COUNTER

TK-7166

Diagnostic Register (DR) — F28014

00
08 07
3130 292827262524 232221201918 171615 1312
J
.
| MDSEL] MRSEL | MDIB <07:00>

1NN ==
/
l

EBL

BLK

MAPP

SIM

scoM | ATTN
SIM

oce

DIB |

scLK | | SEL

IMD

ISPG

SIM

IMC

.
RUN| |cTOD

EXC

WCLK

8 | BIT <23>= 1

=0
08] ST <23

13112

[FAIL [EXC

SIM

MDIB <15:0

OSEL
<2:0>

MASEL
<4:0>

TK.-7168

Command Address Register {CAR) — F2801C
31

28 27

2524 23

BYTE
] CMI FUN
CAR§ MASK

09 08

020100

PHYSICAL LONGWORD ADDR-————w
1
i

TK-7170

MBA (RH750) REGISTERS (CONT)

MBA MAP REGISTER DATA — F28800 - F28BFC

31 30

1514

MAP
TTTTTTT

MBA TO CMI MAP ADDRESS TRANSLATION

VIRTUAL ADDRESS
N
P

fifi

09 08

[

020100

I VAR

MAP
ADDRESS

(MSC
BYTE

CTRL)
ADDRESS
MAP

256 X 17
RAM
MAP

DATA <14:00>

[

PEN

?[wvaf&a 23

MSC

09 08

[

v 02

jCMD/ADD
IBUS TO

(VAR<1:0>)

MClI

BYTE

MASK

FUNCTION

09 08 V 02
|

PHYSICAL LONGWORD ADDRESS

CODE

| | Rooness

MBA (RH750) REGISTERS (CONT)

MASSBUS EXTERNAL DEVICE REGISTERS
Drive Control Register (R0) — F28400
15

Attention Summary Register (R4) — F28410

N\\\\{\\\{\\\i\\\“\{\\\w ATA[ATAIATAiATAlATAlAgA ATATATA
07

(ly4anSia9syn)vuvdaonYv&a/oSg|ov[N©3||solH/8voXNfYl3|D3SoI%|08o3oadynA4||8DaoInYHm4||Dvso3vHymd|@0loy|g9dqovvyNd3||85dQoYOYLNS3|HQoYyHO|W£VaoHYD|z3oaNSdIT|L3aIoNo}FtT|03oaASNdIT|«2Z0L0844Zy03.

H(esHC(]a3)L4aiYLv)vMi8s|vA1LuG&vgHQ||BIg"&N/8E||W&wegSvYM/aHTEsY[|WEw¥NYvEeIYPoSl£w|/uSs||0E4zwNys||g3iw|WN8|vi30ovOwNuIeH||M434LOHnN0vTe08dQl|||W4498InnvN8eIyl3|||N4345Yn0nOgaSy0l|||4H44bYI0039891y10|||I144£N1nnI9887VdL1A||s4z94nna8&lY||/44gLsnng88Ly|||&40vy0n8/g4l||1««wSon9Z0g0l1LIo00N89A4.rWILSp90Av05S03034T3444Y4DISAHd

g9L 0Lz£b
« 3ILHSLHIH4LSISN3ISHAYIHLYAOEQNYSdY3SIS4N03vH40L3OI8LM43YH0L4LY1SW1YO2iZ0dSL0N2OZ43IL8N4OH1O94NALT9NMOY

0|z£b53L

L296-M

-v5g

V(TH34A&YILONQVAI0WYLVGHI)

RK611 REG ISTERS

SYSTEM

PHYSICAL
UNIBUS

CONTROL AND STATUS REGISTER 1
RKCS1
15

CTOICDTl

] DI lgfi:;\

‘

READ/WRITE

04}03

107

(OCTAL)

RDYl IE ‘ 0 ] Fa | F3 I le F1 lGfiwaxo

BYTE
ADDRESS
FOR UBI
(HEX)

FFFF20

BA17

CFMT

CERR

ADDRESS

OCLR

BA16

WORD COUNT REGISTER
RKWC

R/W

08 | 07

WC TWCIWC|wclwc|wc|[we|wc]iwc|wc|]we|we wclwcl WCLWC 277442
|14 [ 13

|12

111

|10

|09

|08

§03 | 02 | 01

|04

|05

|06

|07

|00

FFFF22

BUS ADDRESS REGISTER
RKBA

|BA | BA
13
|14

BA
15

|BA | BA | BA | BA
|09
{10
111
|12

R/W

08 | 07

BA | BA| BAIBA]
|02 | O1 |00
103

[BA [ BA[BA[BA [ BA|
|04
07 |06 |05
|08

___

FFFF24

DISK ADDRESS (TRACK & SECTOR) REG
RKDA

R/W

08 { 07

[oTeTooo [0 e oo S ITITIT]TM
TA | TA | TA

SAISA | SA[SA[SA

446

FFFF26

l777450

FFFF28

] 0 [DRA] 777452

FFFF2A

CONTROL AND STATUS REGISTER 2
R/W

RKCS2

08 { 07

IDLT[WCE]UPE}NEDNEMIPGE]MDS]UFE ORIIR[ ' ]BAI RLS! ) lDf']
DS

SCLR

DRIVE STATUS REGISTER

RKDS
15

READ ONLY
08 | 07

ISDA’ PIP] 0 WRLI 0 [ 0 lDDT

T
SVAL

]vv}
T
DRDY

]

T
DROT

[
ACLO
OFST

SPLS

ERROR REGISTER

RKER
15

12111

08{07

04]03

’NXF] SKI l H_F] 777454
BSE]ECH[ l
IDCK[UNS] 0PI lDTE wuz] ]COE!
T
T
T
]
IDAE
HVRC
DTYE [ DRPAR

FFFF2C

FMTE

ATTENTION SUMMARY AND OFFSET

RKAS/OF
15

120111

R/W
08}07

04]03

lATNlATNlATNlATN ATNIATN)ATN]ATN OF | OF [ OF | OF | OF | OF | OF [ OF}
7

3|2

11017165

1| 4]s3

___

FFFF2E

TK-9694

RK611 REGISTERS (CONT)

SYSTEM

DESIRED CYLINDER REGISTER

UNIBUS

RAW

RKDC

lololo}o

}11

08}

04}03

PHYSICAL
BYTE

ADDRESS

ADDRESS FOR

(OCTAL)

UB! (HE X)

O]OlDC}DC DCIDC‘DC'DC DCIDC}DC}DC} 777460

FFFF30

777462

FFFF32

777464

FFFF34

777466

FFFF36

777470

FFFF38

777472

FFFF3A

777474

FFFF3C

777476

FFFF3E

UNUSED

DATA BUFFER

08 | 07

lDBlDBlDBlDB
|13

|14

[12

pe|DB|DB[DB|
11|10

DB|DB|DB]

08|07

]09

|06

DB|

R/W

DB|

DB | DB

|05]04]03]|02]01]00

MAINTENANCE REGISTER 1
RKMR1

[

ECCW

PCA

| MERD

|MIND

2]1]o0

DMD

PAT

MSP

MCLK

MEWD

PCO|

MS | MS [ MS | MS

]

GATE

WRT

R/W

08 ] 07

GATE
ECC POSITION REGISTER

RKECPS

08 | 07

[ 0 l 0 lo lEPS EPS | EPS EPSlEPs EPS{EPSIEPS EPS EPSIEPS EPS |EPS
12

|11 | 10|

ECC PATTERN REGISTER

RKECPT
14 13 12
15
olololo

|11

09]

0810706 | 05]04]03]|02]01]00

RO
05 0403 02 01 00
10 09 0807 06
| EPT|EPT|EPT
EPT
|
EPT|EPT
EPT | EPT[EPT | EPT|EPT|
10

{08 | 07 | 06|

05|

04]

08}

04}03

MAINTENANCE REGISTER 2

RKMR2

1514

12111

MAINTENANCE REGISTER 3

RKMR3
15

12|11

03]

|09

08}07

04}03

0100

TK-9695

DR750 REGISTERS

DR750 COMMAND BLOCK
BASE

DEC

HEX

INPUT QUEUE FORWARD LINK (INPTQ HEAD)
INPUT QUEUE BACKWARD LINK (INPTQ TAIL)

0
4

FREE QUEUE BACKWARD LINK (FREEQ TAIL)

TERMINATION QUEUE FORWARD LINK (TERMQ HEAD) | 8
TERMINATION QUEUE BACKWARD LINK (TERMQ TAIL) | 12
16
FREE QUEUE FORWARD LINK (FREEQ HEAD)

8
C
10
14

COMMAND PACKET SPACE

TK-9280

DR750 COMMAND PACKET
31

B AGKET

CONTROL

LONGWORD

2423

08 07

16 15

SELF RELATIVE BACKWARD LINK

INTRPT[5[0 [NOT [ 500 [DEVICE CON|

LICNTRL |#|O | USED

03 02 00

SELF RELATIVE FORWARD LINK

TROL CODES|

LAST REG IN

LOG AREA

LENGTH OF

000

DEVICE MESSAGE

BYTE COUNT

VIRTUAL ADDRESS OF BUFFER

RESIDUAL MEMORY BYTE COUNT
RESIDUAL DDI BYTE COUNT

DR32 STATUS LONGWORD (DSL)
DEVICE MESSAGE

LOG AREA

TK-9279

DR750 REGISTERS (CONT)

L88Z6-M

DR750 DCR REGISTER — READ FORMAT

HOd4d3 sad

s
a
y
Y
3
4
O
Y
4
0
3
Q
)
1
8
(
G
L
9
—
4
v
3
1
o
W
Y
r
Y
2
Q
)
1
1
8
(
Z
L
¢ - 4V310 L1VHH0Q) 1 8(£1

F_Hv31Dun—‘~s
0LNILLIHM
AT1D3HIQ
OL HTOHLINOD
V807314Y3 0/13«Sx
a3asnnn
LNODNREIR
104R

€¥79g———H‘dLVHO3YYV-3S3YIOTI1LN1DDdNHLY1ILTdHWMHYINDLOONIdY8HONYININLMLNI3Xd7OSI9NQ3VHLO7YYJ48HNVI0SO3YQLIEN)NHH3YI0I1¥Q44)90DAQd1Q()£)Z9111(19088Z((b(b0l8Z1 ¥¢§2€/—~—11HJ¥Y33O4ISS-TOW1T3NDYSY3rNLIH¥4INODL2IQ¥XNV)DId)1Q)LW9HA1(NOZY98L4HY{I9(14L0NQIA)I4H12AQ8)(1bz8(6L

TJLIHM0|—HdOV-IO1ND&TOYN3HIL8MA2NOdOD[NTDd3NQ4723QG1)4v1vZ8(2Z 0|—HdGVOlY-3vOIl1NDAxT|sYO2tHNLILQLNOOLDNTQ738014/g0 0

J_ M _ ON1934V ~__MON10344V_,
DR750 REGISTERS (CONT)

DR750 DCR REGISTER — WRITE FORMAT

DR750 REGISTERS (CONT)

DR750 STATUS LONGWORD

DDI STATUS

A—

2
1110 090807060504 03020100
161514131

313029 2827262524 23222120

lefelolefelefel TT1
FAR END DEV ERR

LOG FAR END REG

NON EXIST REG

END DEVICE STATUS (USER DEFINED)
DDI PAR ERR
DRV ABORT

LEN ERR
INV DDl CMD
RAN ENA

FREE QUEUE EMPTY

INVALID COMMAND PACKET

UNALIGNED QUEUE ERROR
RANGE ERROR

SELF TEST
FE DISABLE
CMD IN
INV PTE

CMD STARTED

SUCCESS
TK-9282

DR750 REGISTERS (CONT)

DR750 UTILITY REGISTER

12 11 10

16 15

—

UNUSED

SILO

COUNTER

<6:3>

<2:0>

BYTE

08 07
J—

DI CLOCK

DATA RATE *

BITS

VALID

* NOTE:

FD
FF THRU

ARE NOT VALID
TK.9286

DI CLOCK DATA RATE SELECTION
Utility

<7:8> Value
FF

Data

FD¥*

3.12
2.50
2.08
1.78

FC
FB
FA
F9
F8
F7
Fo6

1.56
1.38

F2
F1l
Fog

1.25
1.14
1.04
7.96
#.89
#.83
g.78

7.0488

F5
F4
F3

*Loading
be

Rate

(Mbyte/sec)

these

registers

by the

prevented.

software must

DR750 REGISTERS (CONT)

DR750 DEVICE VECTORS

Base

Slot

Address

Number

BR4

BR5

BR6*

BR7

F34000

128

168

1A8

1E8

F36000

12¢C

16C

1AC

1EC

F38000

130

170

1Bg

1F@

F3A000

134

174

1B4

F3C000

178
17C

1F8

138
13C

1B8

F3E000

1BC

1FC

*Standard

interrupt

level

BR6.

1F4

CHAPTER 3
MODULES AND GATE ARRAYS

Qo
=

& — O

20—

7S]

Vv —-—=0Ww

o ol R

TM~

=2 m <

= m <

0 OO

cO=2w

= W o2z QO

Q=W
X

d>w

o~
TM

HEX

TM~

= W= O >

o))

DZ —~m 2w

O D

= O N O N

—

DZ -mDw

—_Z

20O NO N

DZz_mDwvn

ODF

L 00X

>wm

UNIBUS

Mm—m

BOX

SEPARATE

QO N e e

CABLE

fve)

FRONT VIEW

—

OwIDm

BACKPLANE
CARD LOCATION

EXTENDED
HEX

—

TK-9656

VAX-11/750 MODULE UTILIZATION

CMC GATE ARRAY LAYOUT (L0011)

CP1U
THE L001
MEMORY

CONTROLLER

ffig{?fiWgégg

RN
LED

ION
CONFIGURAT
ERROR

F
i

POWER OK

fom

MDL2

GRLEDEEN

'—
§
=

MEC 2

—

1
MEC

TK-4717

CMC GATE ARRAY LAYOUT (L0016)

GREEN

LED

POWER OK Mf/
CONFIGURATION

ERROR

Kx
RED

MAP

LED

MDL 3

MDL 2

MDL 1

2
MEC

MDL 4

MEC
1

II II II II
.

TK-9660

CMC GATE ARRAY DESCRIPTION

MDL - Four memory data loop (MDL) chips make up the data
path between the CMI and memory, the CMI and the
control/status registers, and from the bootstrap
to

ROMs

memory.

MEC - Two memory error correction (MEC)

chips detect double

bit errors, and detect and correct single bit errors.

MAP/MAD - One memory address processor (MAP) chip on the
L@@l1l and one memory address decoder (MAD) chip on
Address bits are decoded to enable
the L@pl6.
memory arrays and determine starting address
Address validity checks are performed
offsets.
and memory array board population is detected.

BOOTSTRAP DEVICE ROMS
Device

ROM Part

Code

Number

23-908A9-00

23-294E2-02

23-990A9-00

*Modified

radial

Device

Controller

Type

RH750

RM8 4@

RABO

TU58

serial

- MRSP¥*

protocol

Starting
Microaddress
FAQ?2

FB@2

FC@2

" FD@2

Y
UDAS

(MRSP)

ROM Starting Microaddresses
Device
ROM

‘

WENAN

required

for

UNIX.

DPM GATE ARRAY LAYOUT (L0002)

!
AP

L.
TG, &

30,2383 ) i3 dl eV

vi2a.es 21,17

MODULE (DPM)

@"’Kg’;”

w;i }

—_—

e
3
ALP

ALP7

W ol

elp T
| SN
Je—

ALP 6

|W———
Fm——,

2
ALP

eTM

| NN

|SN|

Fe—1 G

;

O-Z

|N
r——

|SE—
__f———

ALK

CLA

s B

ALP5
W

ALP 1
Py

i 1

SRK

IRD
(W

——

f———

SAC

cce

|WE—|

W e

|oo &, 8 VE

Ve P&

GATE ARRAY CHIP

LOCATIONS

2057
i 20, 26,
28
T

_fe—

asessanai

THE DATA PATH

|, inieamaa "W

TOK

) IS soeunmnnan

ITN
s

SPA
FENIIINE s

MSQ

PHB

| SN——

|SRR

TKA4711

DPM GATE ARRAY DESCRIPTION

SRM

SRK

Four super rotator multiplex (SRM) chips perform 64
functions under the control of the SRK.
One super

chip controls SRM

(SRK)

rotator control

operations.
ALP

up the

arithmetic

logic

unit

chips make

(ALP)

processor

logic

Eight arithmetic

(ALU)

the

DPM.

The ALU performs most of the data manipulation during
the
ALK

CLA

TOK

execution

macroinstructions.

One

arithmetic

logic

the

necessary

signals.

operations

control

by decoding

(ALK)

microcode

chip controls ALP

inputs

and

One carry lookahead (CLA) chip contains the
that the ALU uses to generate and propagate
One

timed

operation

programmable

control

interval

time

(TOK)

chip

generating

logic
carries.

contains

the

clock.

IRD

One instruction register decode (IRD) chip processes
the IR decodes.
Receives opcode and operand specifier
from the execution buffer decodes (XB), decodes 1it,
and generates signals to select the correct microcode

SPA

One

routine.

scratchpad

addressing

keeps track of
autoincrements
SAC

cccC

One

service

chip

controls

Contains

general purpose register
and autodecrements.

arbitration

associated

with

and

clocks.

system

(SPA)

addressing.

the

and

IRD

clock

counter,

One condition code (CCC)
condition codes for both

chip

VAX-11

instructions.
It stores PSL
and C, and reads the bits at

(SAC)

the

logic

that

(GPR)

chip

service

arbitration,

associated with the
compatability mode

and

bits FuU, IV, DV, N,
the request of the

microcode.
MSQ

PHB

One

microsequencer

module,

forms

the

CPU

microcode.

One

practically

bits,

status

performs

the

(MSQ)
CPU

half

flags,

about

half

chip,

together

microsequencer

the
the
of

BUTs
step

the

(PHB)

with

that

chip

counter,

and

CCS

contains
logic

BUT micro-orders.

the

sequences

PSL

that

MIC GATE ARRAY LAYOUT (L0003)

——————

____,____J—“”""”"-\—-———-———-_,_________J""'""—"L———

CMK/CML

CAK

UTR

ADK

I
TK-9661

MIC GATE ARRAY DESCRIPTION

MDR

Eight memory data register (MDR) chips contain logic that
routes MIC data to or from the CMI or the M-bus, W-bus,
or

PRK

cache,

One prefetch control (PRK) chip initially fetches eight
instruction (I-stream) bytes from memory starting with the
It then replaces four bytes at a time during
PC address.,
program

ADK

One

execution.

address control

(ADK)

chip controls

the MIC addressing

logic.
ADD

CMK

Four

address

and

their

One

CMI

(ADD)

chips

load

paths.

control

(CMK)

make

the

chip monitors

and

control signals.
Stalls the microcode
conditions. A CML chip is installed in

and

registers

transmits

CMI

under certain
its place for

the

DR750.
CAK

UTR

One cache control (CAK) chip enables or disables
Controls the transfer of data to or from the MDR
One

microtrap

cause
ACV

One

chip monitors

machine

conditions

that

microtrap.

access

control

(UTR)

cache.
chips.

violation

store

unaligned

parity

data,

and

(ACV)

chip

errors,

page

detects

FPA

boundary

access

reserved

violations,

operands,

violations.

UBI GATE ARRAY LAYOUT (L0004)

LOCATIONS

«-+q¢+++#

-r#fi--wv»r LR

CONSOLE

CON 2

¢+¢«+-iv«r+v++f¢flw&-fl-+f

CON 1
¢

{:fi A

- TUB8
-

bbb bbbty
S bttt

S R

PR R R

S L S

"Fen

RNIGVARN

GATE ARRAY CHIP

»mmwj

THE UBI MODULE

INT

¢ | 0 Pl

b et bbb beded t
hb bbbt

UDP3

deet bttt

[DATA

ubP4

s
, FETEerrrE

rdtbrie s
ebrrb
bbb
todeebb

UDP 2

T TIPSR
S
s
T+

1
ubP

et
petrep dbbedesipbtebed

rrees

UCN
&
IPPUPRVIIN FOUTETI. Seeee
{

TK-4718

DISVARN

SUB GATE ARRAY LAYOUT (L0010)

UDP 1

‘

+++++++++++ Fri et erteeed
+

UbDP
3

+
+

i s
tr
bbb rrbtbrr
tedovdiedbr

4
uprbh

AL AL R

e
[4

UCN

A
L4

X IRY Y

I P LY Y T
[T
*O

UDP 2

*id ‘+++,+04:++++4+«—'+++++4
&

TK-9667

UBI AND SUB GATE ARRAY DESCRIPTION

ubp

Four

UNIBUS data

logic

for

the

UBI

path

(UDP)

chips

and

SUB.

All

make

address

the

and

data

path

data

information passes through the UDP between four tristate
ports (CMI, BUF CMI, UB data, UB address).
Contains
address latch and compare logic for the buffered data
paths

and

for

CPU

access

UBI

SUB

and

UNIBUS

registers.
UCN

One
the

UNIBUS control (UCN) chip works in conjunction with
UBI and SUB control stores to provide microsequencer

control

of all operations.
Contains the byte and error
flags for the buffered data paths.
Performs interpretation
between the CMI and UNIBUS control signals and defines
operations.
INT

One

interrupt

process all
microvector

(INT)

the PSL, arbitrates
CPU, arbitrates bus

CON

and

issues

Two

console

chip on

the

interrupt requests
lines to steer the

bus

the UNIBUS for
requests (BRs)

grants

(CON)

UBI performs

arbitration

and inserts values on the
CCS.
Contains bits of

transactions from the
from the backplane,

(BGs).

chips

the

UBI

each

convert

serial/parallel data for communication between the CPU and
Contain
the TU58 and console terminal via the W-bus.
limited console command character recognition.

MBA GATE ARRAY LAYOUT (L0007)

r——'rf

MASSBUS ADAPTER
MODULE (MBA)
GATE ARRAY CHIP
LOCATIONS

MDC
.

MDP6
e

MDP7
%

r_________/'-————-\

VNN o

r__.‘.___J"“‘‘—““\.___._...._._._._

L N UAUNNUINIY.

MRC
s

MDP1

MDP4

~
-

r___.____._..._l"“‘—""‘\

MDP2
R

MDP8

e ORI e

—
]

MCI

MDP5

—

Jr——a

MDP3
R

—

Faammaam—¥

MSC
|WSS

L..__....l

TK-5709

MBA GATE ARRAY DESCRIPTION

MDP

Eight MASSBUS data path (MDP) chips route data between five
All address
tristate ports (CMI, IBUS, CBUS, SILO, MBUS).
Contain
and data information is routed through the MDPs.
to MBA and
access
CPU
for
logic
address latch and compare
MASSBUS

MDC

registers.

One MASSBUS data bus control

maintains status on control

(MDC)

chip controls and

bus parity and on MAP parity

Initiates and coordinates the start and end
and validity.
Contains and controls bit fields of the
of DMA transfers.

VAR and
MCI

initiates MAP parity/validity checks,.

One MBA CMI interface control (MCI) chip controls MBA and
CMI interfacing plus CMI arbitration, status generation and

checking,

and

processor

interrupts.

Produces

the CMI

function codes for DMA transfers on the CMI and controls
Slave logic detects CPU
MAP address translations.
transfers with internal or external registers and directs
the MRC to perform the

MRC

transfer.

One
CPU
the
for

MBA register control (MRC) chip responds to the MCI on
Detects
transfers with internal or external registers.
issue of a valid data transfer command and defines it
Produces control signals to the control bus
the MBA.

the

MDP

and data transfer function codes that control clocking in

MSC

registers.

One MBA SILO control (MSC) chip produces data transfer
function codes that control data routing and alignment
Produces the SILO
between the SILO and the MDP registers.
address, detects SILO full or SILO empty conditions, and
data.
MASSBUS
and
SILO
on
generates and checks parity
Produces the CMI data byte mask for DMA transfers on the
CMI.

FPA GATE ARRAY LAYOUT (L0001)

Y e

P——

WD ot

FIO 3

Jreemm———m—

| WO

R ——

FFA
3
DN s

I ammentasass NUOUR——

F ana——"

R e

FMR 2

FCS 3

WIS sos

FFA2
|

Y Anammnanan WCCET—

CLAZ2
SR
\oo

FFAD

FCS 2

F1O 1

VRN

7
FFA

) WY e

r.._...__._.-/"'-'"'-"_‘

sos
VY

e
NW

FIO 2

.____]--—-——w

r——-———-’—-'—"
FEX 2
W

I it

FCS 1

FMR 1
Rl

| SO

FFA4

S ——

\.__._._J—-_—_-

FCS4
o

m_____f‘“‘—""-—\

FIO 4

FIO 6

| WY o
CLA1

FIO5

——

8
FFA

FIO 8

FIO 7

Fom—

rs—

FFAGB

FFA 1

FEX 1
o

FQA
Wo

) WOC——

GREEN

LED

pra——

FCC
L WY oo

FLOATING-POINT ACCELERATOR (FPA) GATE ARRAY CHIP LOCATIONS
TK-8067

FPA GATE ARRAY DESCRIPTION

FFA

Eight

floating

arithmetic

most

the

data

floating-point
to
CLA

FIO

the

Two

carry
and

from

unit

arithmetic

(ALU)

manipulation

instructions.

the

during
It

(FFA)

FPA.

chips

The

the

form

ALU

execution

outputs

the

contain

logic

the

performs

64-bit

bus

the

FIO.

ALU

Eight

fractional

logic

look

floating
the

ahead

incrementer

M-bus

(CLA)

input/output
and

chips

multiplexer

W-bus.

used

circuits.

(FIO)
Store

chips

interface

immediate

operands

multiple

operand

results.
FCS

Four
left
from

FOA

One floating quick aligner
certain operations.

FMR

Two fraction multiplier (FMR) chips contain most
logic that performs fraction multiplication.

FEX

Two

floating coarse shifter (FCS)
shifts in multiples of four.
a 64-bit input.

floating

exponent

(FEX)

(FQA)

chips

chips perform right or
Produce a 67-bit output

chip

form

positions

the

FCS

the

exponent

for

data

path.
FCC

One floating condition code (FCC)
operands to obtain condition code
and

the

PSL.

chip processes all
status for traps, faults,

GATE ARRAY PART NUMBER/MODULE CROSS-REFERENCE

Chip

DIGITAL

Part No.

Module

Number

Diagram

Data

DC6 @6

TIM

19-14688

DPM

(Use TOK chip)

DC6@7

MDR

19-14681

MIC

Number

DC608

Mnemonic

ALP

19-14682

Home

DPM

<@#1,089,17,25>
<@¢2,10,18,26>
<#3,11,19,27>
<94,12,20,28>
<#5,13,21,29>

7
8

<@96,14,22,30>
<#7,15,23,31>

<PT:34>
<11:88>

<15:12>

7
8

19-14683

MIC

DC610

ccc

19-14684

DPM

DC611

CON

19-14685

UBI

DC612

DC613

CLA
FpPA

SRM

19-14686

19-14687

DPM

<@3:00>

2
3

ADD

<P0,08,16,24>

2
3
4
5
5

DC609

String

<19:15>
<23:20>
<27:24>
<31:28>

<@7:00>

<15:08>

<23:16>

<31:24>

(TUS8)

(Console)

<IC7:1IC8>

<C7:C0>

<p0,04,08,12,
16,20,24,28,32>

<91,85,09,13,

17,21,25,29,33>
18,22,26,30,34>
4

<@3,87,11,15,

19,23,27,31>
DC614

SRK

19-14688

DPM

DC615

ALK

DC616

SPA

19-14689

DPM

19-14690

DPM

DC617

SAC

19-14691

DPM

GATE ARRAY PART NUMBER/MODULE CROSS-REFERENCE (CONT)

Chip
Number

Chip
Mnemonic

DIGITAL

Home

Diagram

Data

Part

Module

Number

String

DC618

UDP

19-14692

<Aa,01,08, 29,

<@92,03,10, 11,

No.

UBI/SUB

16,17,24, 25>
18,19,26, 27>
<P4,05,12, 13,

20,21,28, 29> T
<96,07,14,
22,23,36, 31>
UCN

19-14693

UBI/SUB

DC620

TOK

19-14694

DPM

DC621

MSQ

19-14695

DPM

DC622

IRD

19-14696

DPM

DC623

CMK

19-14697

MIC

DC624

PRK

19-14698

MIC

DC625

ACVY

19-14699

MIC

DC626

ADK

19-14700

MIC

DC627

CAK

19-14701

MIC

DC628

UTR

19-14702

MIC

DC629

PHB

19-14703

DPM

DC630

INT

19-14704

UBI

DC631

MEC

19-14705

CMC

DC632

MAP

DC636

FIO

19-147@7

19-14710

CMC

CcMC

MDL

19-14706

(LOO211)

=R
VV N N I

DC633

<15:00>

<31:16>

<B7:00>

CO~J YUk
W BN

DC619

FPA

<15:08>
<23:16>

<31:24>

<35:32,03: 2a>
<39:36,07: 24>
<43:40,11: 38>

<47:44,15: 12>
<51:48,19: 16>
{55:52,23: 20>
<59:56,27: 24>
<h3:60,31: 28>

GATE ARRAY PART NUMBER/MODULE CROSS-REFERENCE (CONT)

Chip

Number

Chip

Mnemonic

DIGITAL

Part No.

Home

Diagram

Module

Number

Data

String

<pgp,04,08...64>

DC637

FCS

19-14711

FPA

DC638

FFA

19-14712

FPA

DC639

FMR

19-14713

FPA

DC641

FEX

19-14715

FPA

DC642

FOA

19-14716

FPA

DC643

FCC

19-14717

FPA

DC645

MDP

19-14719

MBA

DC646

MSC

19-14728

MBA

DC647

MRC

19-14721

MBA

DC648

MDC

19-14722

MBZ,

DC649

MCI

19-14723

MBA

DC650

MAD

19~14724

CMC

(LOB16)

DC651

CML

19-14725

MIC

(DR750 usage)

2
3
4

2
3
4
5
6
7
8

1
2
3
4
5
6
7
8

<@1,05,7#9...65>
KP2,06,10...H6>
<@¢3,87,11...67>

<B7:80>

<15:708>
<23:16>
<31:24>
<39:32>
<47:40>
<55:48>
<63:56>

<59:56,51:48...>

<h3:60,55:52...>

<B4:00>

<P9:085>

<17,16,081,00>
<19,18,03,02>
<21,20,05,084>
<23,22,07,086>
<25,24,09,08>
27,26,11,108>
<29,28,13,12>
<31,30,15,14>

CCS MODULE WITH WCS (L0005)

—1

[

I
L__J
]

[

CCS MODULE ROM LAYOUT

—
o
e
o
P
e— vo

MUX

¥Note:

BUT

ALPCTL

The microcode 1listing is
bits with respect to the

reversed for these
actual PROM pattern.

LITRL

]
|
|
i

!
[

|
it

Reversed

]
&

=>|%

313

212

211

$§1

141

010

050

615

211

817

413

019

615

211

817

413

"
4

&
+

UET COMPONENT LAYOUT

W& VIEW

SII2

* -+

fi“...“m-mm.u'--

__]

PATNSY

-+ + ++

u.m m “
4+

_+WEJ
-+

—m

L]
@

)

NOTE

T - _

[Cio}

+ +

L.L.L.an.L(.TLm

[Ci2

mTEC3

l+v

83X

For circuit details refer to schematic D-CS-M9313-0-4.

TU58 INTERFACE COMPONENT AND JUMPER LAYOUT

€23

00ogCt aanvdnvg
00089vY68E aannvvdd
aNNOYo
L£IH2¥NA-S5NSYVNYHH3LIA3EINQIT +=

an0vg9d a0novec a0n2v6d1 AgHVITIXNY I1AHN5OIL3OV1dS

Z"HI¥A-—ISHYA

2 5y H3IAIYA +

O 0

gooood

£ed

LLAA

V1LM ILMAM MM81 LEM

[ T

913

€20
2o

€¢d

S2d

9¢d

vZd

e0S+vC

g90+8%y L0 +96 82B+l

G20 _j*

4+ +4++4+ —+

0l+61 Z+0¢

ve€22212 0Z6L 8L L1 _

Gd+NlD

9¢o

~} 0

O oW

<L O

] fad m

—d (98] m

£ed

ZLY

osd |
£l

1OF

vid
Gid

%
¥
H

VAX-11/750 SYSTEM CONFIGURATIONS

—

LOXd

DUAL RKO07 SYSTEM

—

LOXY

\[EREITZRE

I e|

. ///

gili31e|e (¥Q-10Q) Yy {1ZY#NO1I3LNAVO)d ¢3

JMASIHdA

Hv3y)

VAX-11/750 SYSTEM CONFIGURATIONS (CONT)

DUAL RKO07 SYSTEM WITH TS11

vLEPI-A

—

LISl

£0MY

S—

L0MY

IHNSTIEaA

05L/L-XVANdDLaNIBYD

Q| 0sIv|wivle

13098 21 2121 oy 3nvgs] SIANTON NOILNBIYLSIA

.AHOWIW NOIL,dO

03 30ves|

ONIT0D

| anxova

a4|wo AVHY

SH31I7MdONdS HO4371N0HLYINOD

3dVLOVIN

RA0XS4/v4L
yv3y)

3<zorEM_,

(G3LNOW

HSIa IATHA

NOISNVdX3|A8H¥OeWsIzWenONYolol=
1|13INNVV12z .yz (Sv3-AiN1zTaOND|SANoOHvIOgsWsNIvTWax32¥S0|141I|2Z2||53@]|l5D3]ovaSO s>|
{a-1a) (= ndof»

o0 0 OO0

FIal}

0SL/L-XVANdDLINIBVD

L1SL IdVIOVIN

VAX-11/750 SYSTEM CONFIGURATIONS (CONT)

RMO03/TS11 SYSTEM

CMELPE

8HLO AVEHY {Sauvo8

ONIT00

H30OVd4S NOILNgIY1SIa

£0WY

VAX-11/750 SYSTEM CONFIGURATIONS (CONT)

RMB80/TS11 SYSTEM

LSEVS-H

|:}jnwotmL_mnfair_yfilsia|[ (w-iza AYOWIW |e3

0Xs8iWaHA XVA0SZ/1-NdDL3INIBYD LI1dSVLLOVIA

BauetantatananITeatIR:IRBAIARtIEANY

JxRO0ovsonu |0w36os0va1svB3O02dV
m

|yvay |(@3.LNnOW

¥o awl

SH3I1MdO0N4S 4LO3N7OY0D4

AH3IL1lvE |NOILdO

]“[@iazm

—Jafsafslaf

8GNl

85-91)7 AVHY (SOHVOS

SYSTEM CABLING DIAGRAMS

TUS8 AND FRONT PANEL CABLES

FRONT PANEL

SIGNAL CABLE

TUS8

}

POWER ~

|—

TU58

CONSOLE

T CABLE

SIGNAL

TERMINAL
CABLE

TERMINAL

/o pORT

PANEL

FILTERED CABLE

(7016927-00)
TK-9825

SYSTEM CABLING DIAGRAMS (CONT)

MASSBUS CABLES

Z?&mggi TN OSSRE NG® §

PLUG

—
TRANSITION

2Ly

SYSTEM CABLING DIAGRAMS (CONT)

UNIBUS CABLES

TO
EXPANDER
§ =

CABLE (BC11)

sf@m%VaAVOnv@nfiwaeanMWMLWa

CABINET

8
TOSLOT

[SERERSIAREEsEEeIsIeIsNIeTsIIsTaIsOaNsncas
—

DD11-DK

BACKPLANE

SYSTEM CABLING DIAGRAMS (CONT)

DZ11 DISTRIBUTION PANEL

_EB/K.M,HT/

SISISIS
-

S
oy

B—

XMIT
XMIT

SIS

REC

Signal
Name

{3
-

o I

—
R—

e
<~

bMg

i
Terminal
Number

SSSlS

SRS

SIS

DZ11 DISTRIBUTION TERMINALS

b—

VAX-11/750 POWER SYSTEM

SYSTEM INTERCONNECTION DIAGRAM

/0 PANEL

7016931

10 PIN rLlpg |"L|p1 6 PIN
2]

SIG

PWR

CONTROLLER J3fi_ TU58
TU58 BOARD
DRIVE

7016386

pin[P2]1

PIN [PIN_]

|I D

[Pa

PIN]

I O D

PIN]

B I

|P3]

+12

CPU BACKPLANE
(CCA)

(CPA)

BACKPLANE

H3 2.5 V REMOTE SENSE RTN (BLK)
+5 BB

l_ H2 25V RETURN

G3 2.5V REMOTE SENSE

[]G2+25 V INPUT
a1

(RED)

7016930

+12

415

Ac/DC

[31

Lp2]

LOW

9PIN

7016938-00
3]

3PIN

e
8758

PLUG

P pin
7016928
9 PIN

113
P21

[P1]3PIN 1|

|6PIN

[2PIN

15 PIN[P11

J14
J15

PLUG

7016514

ac J16]

TOBATTERY

1BACKUP
pLUGT'T YoeTion

[07]
[P
[P1]15PIN

TIME OF YEAR BATTERY

[Pa]

I_J_3J4PIN

2PIN

5.0V DC

JH7104C

RETURN

5413396

5413382 50V

2.5 VP/DSC#1 POWER

20
p

P519PIN

M M

RET(URN

p1lia

PLUG E

7016894

1016385

_|7016938-0 :

(PIC)

7015474 \lg FILTER |, .

230V

Lp1]

T.0.Y.

7016516

6 PIN

230
V.

[35]

l%fi]

7016938-02

CONTROLLER

17?515\;173

T.0.Y.

7016938-03

[P3

L2y B3]

115 V 7016908-00

P2]

6 PIN 15]PIN |6 PIN|15

L {M1 UNIBUS OPTION-GRND
MU
“CBLIO (RED) =5~5BB +5BB
M2
L1+5V RETURN

k5146Vv ineur

CONTROL PANEL

230v 7016908-01|

| |N2 +5 V INPUT-UNIBUS OPTION *15 -5

PWR
SIG
0

3] [P1]

|_|nq1 ACON. g con. BCON. CCON. +12

1P2 8PN
cafmiierl
192

17] [32] [us] [

SLOT 6 SLOT 6 SLOT
6 SLOT
6 IN

7016929

IJT r_E,"_—

[P3]

7016922

RETY

5413396

(P/S #2)

SUPPLY

7016513

F—4 PIN= 15PINL
131
P1]|

[015
[P2]

2016163

LINE CORD TO

CONTROLLER AC PLUG

BATTERY BACKUP
OPTION

POWER

b1l | sopeLy
H7104D

15 PIN

[11]
P3

7016379

|/014320-OF
AIR FLOW SENSOR

TK-9696

VAX-11/750 POWER SYSTEM (CONT)

VAX-11/750 POWER SUPPLY, PART 1

AT18INISSY

ATEWISY

d0L1 M3I A

N[A=1°1=20

VAX-11/750 POWER SYSTEM (CONT)

VAX-11/750 POWER SUPPLY, PART 2
875 POWER CONTROLLER

H7104C
+2.5V POWER SUPPLY

ASSEMBLY

POWER

CONTROLLER

DIGITAL
A

"IIMRER

)

[PART NUMBER]
g

Orower 0K

(O OVER CURRENT
(O OVER VOLTAGE
(O +sv FAIL

(O +25FAIL

O REG FAIL

OVER TEMP
_DEC POWER BUS

NORMAL

DELAYED

FUSE
@‘QA

REMOTE

250V

OFF

@POWER

LOCAL

5% MARGIN SWITCHES

H7104D
+5V POWER SUPPLY

ASSEMBLY

VAX-11/750 POWER SYSTEM (CONT)

The ac power controller panel consists of
circuit
Dbreaker, one REMOTE/LOCAL switch,
and

two

DIGITAL

power

bus

eight
indicators,
one
one .12 A (1/8 A) fuse,

connectors.

AC POWER CONTROLLER PANEL
Indicator

Definition

The green DC

system is
any fault

OK indicator

the

power

is on when

there

functioning correctly.
indicator is on in the

when

It is off if
power supply

system.

OVERVOLTAGE

OVERCURRENT

The

red OVERVOLTAGE indicator

is
+5

an overvoltage condition in the +2.5 V or
V power supply.
The affected power supply

indicated

by its

fail

indicator

The red OVERCURRENT indicator

on.

is an overcurrent condition in the +2.5 V or
The affected power supply
+5 V power supply.
is indicated by its fail indicator being on.

+5 V FAIL

The red +5 V FAIL indicator

+2.5 V FAIL

The

REG FAIL

The red REG FAIL indicator
a regulator malfunction in

a malfunction

the +5

is on when there
V power

red +2.5 V FAIL indicator
a malfunction

or +/-15

OVER TEMP

being

is on when there

the

supply.

is on when

+2.5 V power

there

supply.

is on when there is
the +/-5 VvV, +12 V,

supply.

V power

The OVER TEMP indicator is on when there is an

overtemperature condition in
The indicator
power supply.
however,

when

system

the

the 45 V or +2.5 V
is not lit,

shut

down by an

overtemperature condition inside the controller.

POWER

is on when the ac power
into a live ac power source.
CBl is on or off.

The POWER indicator

cable is plugged
It is on whether

VAX-11/750 POWER SYSTEM (CONT)

REMOTE/LOCAL SWITCH
Definition

Position

UnThis is the normal operating position.
switched ac power is applied to the power bus.
Switched ac power is controlled by the key
operated switch on the CPU front panel.

REMOTE

No switched ac power can be applied to the

OFF

system.

Switched ac power is applied to the system
regardless of the position of the CPU power

LOCAL

keyswitch.

CIRCUIT

BREAKER

(CB1)

CB1 is the main circuit breaker to the power
When in the ON position,
supply system.
unswitched ac power is applied to the power bus
and switched ac power is determined by the
When in
position of the REMOTE/LOCAL switch.
the OFF position, ac power cannot be applied to
the

DEC

POWER

BUS

power

There

are

bus.

two

DIGITAL power

bus

connectors:

These connectors provide a
normal and delayed.
POWER UP REQUEST signal that can be interconnected between the H875 power system and
remote

There

power

systems.

is a half-second delay on delayed power bus

connector

output

J9.

VAX-11/750 POWER SYSTEM (CONT)

H7104 POWER SYSTEM BLOCK DIAGRAM

AGL—
AGL+

NG+

vwg

gAG+ GZ+ OV
anzL+ lans—| oa

ol /z|

LINN

AHILLVE

~HOSNIS| yojom

3LOW34 auative| |STEVES

43IMOd

H3IMTSOY.LMISN|ODu«_OLIMS<«

dN>Iove

2HAI1dM+GONdS

HOLOW

v ov|

TOHLINOD AT1dN3ISSY

OVAOEZ/OVASGL DN'IV HIMOd TYNOILdO310W3Y
43d0HVHO

A0071D

VAX-11/750 POWER SYSTEM (CONT)

AC POWER DISTRIBUTION

AOL

,S51 vd

AOL

Ad3lvd

AOY

AGZ+ GAGH

wvs vol|

AT9NISSY

LIN ALT AHIL1VSE
PLLV-ML

e o=l AT9NISSY

LgwH4N,O3mLD_I1wMw4OW3_9w7w08dAONLHX|IO(LV11v¥VdNYOILdOa)0.AH0OILD7H10VHDJOelOAGLm\VSVAX-11/750 POWER SYSTEM (CONT)

DC POWER DISTRIBUTION

VAX-11/750 POWER SYSTEM (CONT)

POWER SYSTEM SENSING
AC LOW

OPTIONAL

DCLOW

REMOTE

SENSE

OVER TEMPERATURE
SENSE

STATUS

+2.5V

POWER

AC.POWER | CONTROL | 100
|
" CONTROLLER[TM
ASSEMBLY

STATUS

SENSE | oV POWER
SUPPLY
ASSEMBLY

EBATTERYBACKUPENABLE
OVERTEMPERATURE

SHUTDOWN

BLOWER
MOTOR

BATTERY
BACKUP

TOY
CLOCK

( OPTIONAL)

CHARGER

AIR ELOW

]. sEnsOR

UNIT

BATTERY

TOY
BATTS’

£\

FLOW
SENSE
TK-4713

VAX-11/750 POWER SYSTEM (CONT)

+2.5 V POWER SUPPLY BLOCK DIAGRAM

AC LOW

DC LOW

OVERTEMPERATURE SENSE

5 5\ CONTROL

L, t12VA BIAS VOLTAGE

VOLTAGE/CURRENT STATUS

BOARD

o ZVABIAS VOLTAGE

TSR STATUS

) 5V MOTHER

+5VA BIAS VOLTAGE

BOARD

OPTIONS

AC IN FROM CONTROLLER

27V TO 40V

FROM BATTERY

+12VB

+oVB

BOARD

STATUS SENSE

REGULATOR | REGULATOR

FROM +5V SUPPLY
-

BACKUP BOX

+12VB
10A

+5VB -5VB
10A 1.2A

+2.5V
85A
TKA4716

VAX-11/750 POWER SYSTEM (CONT)

+5 V POWER SUPPLY BLOCK DIAGRAM
+5VA BIAS VOLTAGE

—12VA BIAS VOLTAGE
+12VA BIAS VOLTAGE

VOLTAGE/CURRENT STATUS
REGULATOR STATUS

+5V CONTROL BOARD

~ OVERTEMPERATURE SENSE

+5V MOTHER BOARD

OPTION

AC IN FROM CONTROLLER

+15 VOLT

REGULATOR
BOARD

v
+15V

—15vV

+bV

3.5V

135A
TK-4715

VAX-11/750 POWER SYSTEM (CONT)

APPLYING SYSTEM POWER
Use

the

following

procedure

correctly

apply

power

the

system.

Ensure
power

that

the

CPU's

controller

main

off

circuit

breaker

(CBl)

Verify that the two 5 percent margin switches
supply are in the center position (up).
Place
panel

the
in

REMOTE/LOCAL
the
REMOTE

switch on

the

front

the

(down).

switch on the ac
position.
The

panel

should

the

power

power
controller
CPU power key lock

the

off position.

Connect the CPU cabinet ac power cable to the external
ac
The power phase indicator on the ac power
source.
power
controller

the

should

now be

Move

Power can now be

applied

panel.

the

CB1l circuit

CPU

front

on.

breaker
to

to
the

the

position

CPU by the

(up).

key lock

switch

CPU CABINET POWER REQUIREMENTS
Single Phase

Nominal

Mininum

Max imum

vac (RMS)
Phase to neutral
Phase to ground*

120
120
120

9¢
90
90

128
128
128

Neutral to ground
Hertz
Hertz

Current

(amperes)

vac (RMS)
Phase to neutral
Phase to ground
Neutral to ground
Hertz
Hertz

Current (amperes)

N/A

47
47

60
50

180
186
N/A
N/A
47
47

240
240
N/A
N/A
60
50

N/A
63
63

25.0 A at 9¢ Vac

256
256
N/A
N/A
63
63

12.5 A at 186 Vvac

CAUTION

Expansion cabinets with separate power cables
powered from the same ac line phase
be
must
the
to
result
damage may
CPU or
as the
are
that
systems
Also,
equipment.
same
the
interconnected by cables and share

logic and/or chassis grounding must share the

same

phase.

VAX-11/750 POWER SYSTEM (CONT)

STANDARD POWER PLUGS AND RECEPTACLES

120V
30A

1-PHASE

HUBBEL

_
#2611
NEMA # L5-30P

DEC #12-11193

#2610
L5-30R

12-11194

240V
1bA

1-PHASE

6-15R
12-11204

NEMA # 6-15P
DEC # 90-08853

TK-5997

CHAPTER S5

Jiyi 4L

40123735 HOLIMS

/E1R0IL8EL NOI-LHO3VMO/d

HOLYOIANI 3135VD1H0d SLHOIM Nd3LVS1LSHOIT LOE3DIA3Q H3MOdNONOILOY VD07

3\@ dYLNOILOW 8NLfiIdv.lQaW3L10Sw3WL3QyYaHY3111YHNHOvVL4OVIANIH@3IMOd@NAHHI@OOHW(UH_IM_M_U_1©3834vwg\EL1<i1Hm0V.0,18_Su,IwYm\ JH4NHOI03LSIMSAIN\m3f1i0o%wm3dm
VAX-11/750 FRONT PANEL

LEL86°

3gn

0XSLV/AL1

050

101

VAX-11/750 FRONT PANEL (CONT)

CONSOLE PANEL INDICATORS
Indicator

Description

that the console subsystem is supplied

Indicates
or
with correct voltage. The VAX-11/75/A process
can lose partial power and still light the LED

POWER

and allow diagnostic testing.

The CPU is in program mode, running a main memory

RUN

program.

Glows dimly to indicate a control store (CCS or

WCS) parity error. Fully on indicates a double
control store parity error and CPU clock stopped.

ERROR

Switch

RESET

REMOTE

FAULT

Pressing the RESET switch causes the system to

perform the action selected by the POWER ON
ACTION switch (initializes the processor) .

power key switch is in the REMOTE or REMOTE

SECURE position.

RDM logic failure.

Lights for about ten seconds

during console power-up as part of logic
self-test.

TEST

DDC host computer is performing RD tests.

CARRIER

Carrier signal

Tape

Motion

detected

from DDC.

steady on during a search or rewind.
indicates a

read or write

102

Blinking

in progress.

VAX-11/750 FRONT PANEL (CONT)

CONSOLE SWITCH FUNCTIONS
Position
Power

Key

Description
Switch

OFF

LOCAL

Switched ac power is removed
Unswitched ac power is still

Normal
Console

All

on position.

operator

controls

mode

- The

the

from

power

system

operator

the

system.

applied.

from

applied
the

performs

the

and

console.

console

commands.

Program mode - The operator communicates with the
CTRL/P and CTRL/D are not passed
system program.
to the system program but are recognized by the
console

LOCAL SECURE

subsystem.

Normal operation as for LOCAL except as follows:
Console mode - The
switch

are

local

terminal

and

Program mode - CTRL/P and CTRL/D are
the console subsystem and are passed
system

REMOTE

the

RESET

disabled.

ignored
to the

program.

System responds only to the remote terminal and

to a

remote CTRL/P or CTRL/D to change processor

states.

REMOTE SECURE

System responds only to the remote terminal and

remote CTRL/P or CTRL/D are passed to the system
The remote operator can enable the
program.
system TALK state to communicate with the local
operator.

103

VAX-11/750 FRONT PANEL (CONT)

CONSOLE SWITCH FUNCTIONS (CONT)
Description

Position

Power-0On

Action

Switch

The console subsystem performs a power-—up bootstrap of the system on a power-up, a fatal error,
The boot is
or when the RESET switch is pressed.

BOOT

performed
DEVICE

RESTART/BOOT

restart,

power-fail

selected

from the device

BOOT

by the

switch.

the

CPU microcode

initialize sequence checks for a valid restart
If the RPB is valid, the
parameter block (RPB).
program returns to its previous operating state.
If not, the system performs
from the device selected by

a bootstrap sequence
the BOOT DEVICE

switch.
HALT

The

RESTART/HALT

A restart is attempted
unsuccessful, however,

Boot

Device

Switch

processor

(Typical

TUS58

Boot

Device

System

Device

Alternate

Device

Spare

halts

and

restart

1is

attempted.

as for RESTART.
If
the processor halts.

Devices)

ROM

Disk

Boot

Disk

ROM

Boot

104

(DB
ROM

MASSBUS,

UNIBUS)

CONSOLE BOOTSTRAP FLOW

|GO DLHV1S3H <

N O N ATV

_L089~\30IA30

ANILNGD NOILND3X3

HOL=IMS

g3V0IN3A

105

JdAL 3T0SNOD

dnNid GO09

0Q0D3L21AA830J130HLO0NL8IIOMdS

SINIWNOHY
ONYHO4 WAOY 30 2

914

L13dS4v(13S138av1s0I9a)

1IN} INILNOY

JdAL

I3LvHd0AL2 J=HOHY3T3O4S’N61OD

H03HD
LHYILS OV144710
WOY

H%03H4DLISLIXNIVON

ONOD3S3dAL

1OdNWOYHd

—d015-

(¥L3I7N10)

1 Vavo’

94A0oND 9HdOH‘YgL3I=L3T0VH7 A43I1H0INSANHOOODHO4LIV3N4

Ay9
40
AHOWIW

3Td0SANOLD 3'0=y49l0
—d01S—

Q70 LHVY1S OV14

CONSOLE SUBSYSTEM ACTION ON A BOOT

IWNOILHNOY
LTLy-AL

3Ldy0l »0 74d

V10NT
1

106

1W03O13Y8

~d01S—

BOOTSTRAP SEQUENCE

The

following

VAX-11/750
lQ
2.

The

steps

are

required

obtain

operator

powers

up the

VAX-11/750

The VAX-11/750 microcode detects
by
selected
strategy
power-on
on

located

a.
b.

running

system

processor:

the

processor

control

system.

the
follows
and
on
©power
ACTION switch
POWER-ON
the
panel.

If the microcode cannot perform a restart,

it will perform

a bootstrap from the default or execute a halt.

If the machine halts, the microcode program gains control.
This

program:

prompt

console

the

Issues

(1)

(>>»>)

console

the

terminal

system
Accepts interactive commands to bootstrap the
a
or
default bootstrap device
the
of
means
by

(2)

user-specified bootstrap device

The microcode program looks

and

bootstrap

the

executes

This ROM is 256 bytes and
device read-only memory (ROM).
The
contains a main routine (at the entry) and a subroutine.
main routine reads block @ from the bootstrap device and jumps
The main routine and the boot block
to the boot block entry.
the ROM subroutine to read arbitrary blocks from
use
routine
the

bootstrap device

into memory.

The boot block contains the logical block address,

entry

offset

size,

and

the program to be executed in the bootstrap

standalone BOOT58,
(1)
process. This program can be either
when the bootstrap device is the TUS58 console drive, or (2)
VMB.EXE, when the bootstrap device is the system disk.

1If the bootstrap operation is performed from

console

and

1If the bootstrap operation is performed directly from

the

BOOT58 commands to set up register
load

the

TU58 tape cassette using standalone BOOTS8, the user types
and

system
the

start

disk

input

wvalues

VMB.EXE.

wusing VMB.EXE, the microcode program derives

input values.

107

BOOTSTRAP SEQUENCE (CONT)

program.

VMB.EXE is the primary bootstrap
a

set

possible

all

file

primitive

and

devices

CpU

for

drivers

non-interrupt-driven

primitive

system

<contains

It also contailns

independent code and CPU dependent routines.

system for

locating and reading Files-11 Structure Level 1 and Structure
VMB.EXE performs the following steps:
Level 2 files.

Reads the system identification register to determine 'the
the table of appropriate

select

and

type

processor

processor dependent data and

from

Saves the register values and some values calculated

the register values in the restart parameter block (RPB]).

subroutines.

Determines the amount and pattern of memory.
Unless

bitmap is constructed.

(PFN)

number

A page frame

inhibited by a

uncorrectable
gross,
for
tested
1is
memory
boot flag,
VMB.EXE constructs, in the RPB, a table
parity errors.
1/0
and
indexed by nexus number of all memory controller
adapter

types.

will

(LBN)

A file named

(2)

memory

and

memory

and

read

into

[SYSMAINT]DIAGBOOT.EXE will be

read

into

given

control.

A file specified by the user
will be read into memory and

(4)

will

[SYSEXE]SYSBOOT.EXE

given

A file named

(3)

number

into memory and given control.

read

block

1logical

A boot block at the designated

(1)

following occurs:

Based on

response to
control.

prompt

given

SYSBOOT is
the
standard
secondary
Dbootstrap
program.
It
performs initialization suitable for the unmapped environment.
SYSBOOT performs the following steps:
a.

Reads

current

parameter

settings

Looks

bootstrap

device

driver

indicate,

prompts

the

information

about

it.

values

from

current
system
parameter
settings.
the start-up command
procedure
name

SYS.EXE.

file

the
The
and

and

user

user can
modify

stores

modify
change
system

parameters
using
SET
or
a previously created parameter
file.
New parameters become the "current"
parameters
on
the next bootstrap operation.
d.

Sets

Reads

Locates

SPT,

the

SYSPHD,

resident

and

SCB,

and

executive

transfers

INIT

108

PFN

data

structures.

into

high

physical

code,

memory.

BOOTSTRAP SEQUENCE (CONT)

The

system

INIT,

initialization

SYSINIT,

INIT

is part

(1)

Enables

(2)

Prints

(3)

process

STARTUP.COM,

SYS.EXE.

mapping

and

system

the

and

«consists

four

SYSTARTUP.COM.

It
sets

performs
the

announcement

the

following:

system

stages:

space

message

requested by means of the boot

flag,

stops

the

XDELTA breakpoint

Initializes

the

system

paging

for

Deallocates available physical pages

(PFN

bitmap

set

table

for

paged

and

Initializes
nonpaged

the

up by VMB)

the

free page

list

page

system

pools

Initializes

I/0 adapters using

the

1list

present

Initialization
VMB., EXE.
by
generated
adapters
the
(only
consists of mapping adapter register space
of pages actually used are mapped) and calling
number

data
adapter specific routines to allocate and set up
1In
structures and to initialize the adapter hardware.
of
page
I/O
byte
addition, for UNIBUS adapters, the 8K
the

Data

UNIBUS

is mapped.

structures

are:

allocated

block

MASSBUS - adapter control

channel request block
interrupt descriptor block

UNIBUS - adapter control

block

performs additional process initialization tasks

Transfers the primitive VMB.EXE system

device

driver

into nonpaged pool and saves the driver entry and boot
device control/status register as virtual (rather than
physical)

addresses

the

109

RPB

BOOTSTRAP SEQUENCE (CONT)

(19)

(11)

Loads the CPU dependent code image into nonpaged

and

links

into

pool

system

the

and
into nonpaged pool
handler
Loads the terminal
Loads the driver
interrupt wvectors.
the
connects
pool,
nonpaged
into
system device
the
for
image
connects its interrupt vector, and derives the name of
device
disk
system
the
for
rule
The
the system disk.
name

follows:

Examine the primitive driver,

device name

the device name

where

stored.

The controller designator

controller

for the first,
occurrence of

"A," "B," or "C"
second, or third
this

kind

For

adapter.

example, if the adapter of the
system device is the second
MASSBUS, the controller is B.
(Note that for a generally configured system, it is possible
to use the AUTOCONFIGURE command
procedure to derive the controller name incompatibly with
Therefore, some care 1is
INIT.
required when configuring multiple controllers of possible
system

disks

multiple

across

buses.)

Passed

unit

the

prologues

(12)

Adds

example,

MB,

(13)

Performs

initialization

(14)

Moves

NL)

completion

the

code

input,

from VMB.EXE

R3.

the

resident

prologue

of
of

list

resident
INIT

drivers

(for

drivers

into

the

pool

and

executes
it.
The
completion code deallocates space
occupied by INIT (and optionally XDELTA) to
the
free
page
1list.
The
completion
code
then jumps to the
scheduler, which ultimately results in
SYSINIT
being
swapped 1n and started.

110

BOOTSTRAP SEQUENCE (CONT)

Cc.

SYSINIT

performs

the

necessary

(1)

(2)

Writes

system

prompts

parameters

(3)

Creates

some

(4)

Sets

swapping

(5)

Installs the VAX-11 RMS image
as pageable system sections

(6)

Mounts

(7)

Creates

the

job

(8)

Creates

the

STARTUP

the

STARTUP reads
which

causes

Create

(1)

Run

Invoke
Log

logical

and

system

input
it

paging

disk

day

system message

process
OPCOM,

file

created)

and

ERRFMT

process

the

start-up

command

configure

procedure,

to:

logical

names

known

I/0 system

images

[SYSMGR]SYSTARTUP.COM

out

SYSTARTUP.COM is an empty command procedure distributed by
can edit SYSTARTUP.COM to
manager
system
The
DIGITAL.
perform site-specific start-up functions.

time.

SYSGEN:

Provides for dynamic loading of and connecting to drivers.
null, and mailbox drivers are permanently
operator,
(The

part

time

SYS.EXE

and

SYSGEN is run by STARTUP or at any other

the

files

(ACP

controler,

from

for

names

SYS$SYSTEM:SYSGEN to

Install

back

following:
requested,

the

executive

image.)

Provides for the creation of new parameter files that have

encoded

format)

Creates paging, swapping, and system dump files

111

BOOTSTRAP SEQUENCE (CONT)

INPUT ARGUMENTS
The
the
R1

general registers receive the following input
console

arguments

from

(MBAY

unless

subsystem.

system bus

address

otherwise specified

MASSBUS

adapter

in the BOOT command).

physical address of the UNIBUS I/O page associated
UNIBUS adapter

with

1in

the

(UBI@ unless otherwise specified in the BOOT

command)
.
R3

device unit number
BOOT

otherwise

software boot control flags (¢ unless
in

(@ unless

specified

.
command)

the

otherwise

specified

.
BOOT command)

<base address + "“X200> of the 64K bytes of good memory.

112

BOOTSTRAP SEQUENCE (CONT)

SOFTWARE BOOT CONTROL FLAGS
Hex

Flag

Value

EZ /1

Function

Conversational boot.
SYSBOOT>

Debug.

and

§§/4

allow

the

code

included

Initial
the

for

the

breakpoint.

executive

the

VMS

If this flag
code

{%/B

Not used on the VAX-11/750.

fig/l@;

Diagnostic boot.

3%/2@

Bootstrap breakpoint.

D /a0

§§/8@

:g/lflfi%*

i5 /200

for

the

is set,

included

and

(flag

This flag causes a boot by

diagnostic

bootstrap to stop at
performing necessary

Image header.

will occur immediately
enables mapping.

name

debugger

system.

supervisor.

This flag causes the

a breakpoint after
initialization.

If this flag is set, the transfer

address from the image header of the boot file
will be used.
Otherwise, control will transfer
to the first byte of the boot file.

This flag inhibits the

Memory test inhibit.
testing

memory during

File name.

‘

name

the

bootstrapping.

Causes the bootstrap to solicit the

boot

file.

Halt before transfer.

Causes a halt instruction

to be executed before transfer to
boot file.,
This optlon is useful

y SYSEB
O . EX

parameter.

executive

running

debugger

bit 1), a breakpoint
after executive mode

file

This flag is passed through to VMS

causes

Returns the prompt

alteration

the
for

secondary
debugging.

@ji U DOV A
ow,

Sy §5Tee
S¥SReer >
=,

»8/1o e m s
DS 7

DSk v COI0LE

e
Ra2imes

:
i~

PRiAS~IFTIC

Fictmmm [

Anwasaan

By
o
g R
= Y
. Gyl
DIAGEOOT

SUPE VLT

og
g
5o
R / 08 DG

s
DiCaBee . Gag
113

7 o g
e

VAl

Soem

(commmug) ~Tc

{:”*'i
, N
.
E,
LUDAX
-

F00

I
g*fiqu

:
;z:sm
Tl-vyl.

STg

B g

s ED

PO e isee

- Ol

iy Sek
e

ffl'“‘“‘“s te

€.
E

BOOTSTRAP SEQUENCE (CONT)

VMB PRIMARY BOOT FAILURES
‘

BOOT is the program name for VMB.EXE.

.
The 'F' indicates a fatal error and the type of error is reported
$BOOT-F-Unknown processor

Indicates that the CPU is not

a VAX-11/756 or VAX-11/78@.
Check SID register; if wrong,
is

CCS module

$BOOT-F-Unexpected exception

following exceptions occurred:
1.
2.
3.
4,

$BOOT-F-Unexpected machine

check

bad.

Indicates that one of the
Access violation
Breakpoint op code
Reserved operand
T-bit

Page

trap

fault

(TNV)

Indicates that a machine check

occurred.

Check all apapters

using console EXAMINE and
Probably a
DEPOSIT commands.
timeout.

$B0OOT-F-Nonexistent drive

self-explanatory.

command and

$BO0OT-F~Unable to locate

boot file

$BOOT-F-Bootfile not
contiqguous

booted.

VMB cannot find [SYSEXE]SYSBOOT.EXE
or if bit 4 in RS is set, VMB

cannot

find

[SYSMAINT]DIAGBOOT.EXE.

Indicates that [SYSEXE]SYSBOOT.EXE
or [SYSMAINT]DIAGBOOT.EXE is not

contiguous on
or

$BOOT-~-F-I/0 error reading
boot file

Check boot

ensure system disk

is drive being

system disk.

Recopy

rebuild.

Indicates a problem reading boot
file from disk by $QIO service (VMS
system

114

service).

CONSOLE COMMANDS

Command

Description

CTRL/P

Enter

console

CTRL/D

Enter

RDM

>>>E

Examine

command

>>>D

Deposit

command

mode,

console

issues

mode,

>>>

prompt.

issues

RDM>

prompt.

Format:

[QUALIFIER]<SP>[ADDRESS]<CR>

[QUALIFIER]<SP>[ADDRESS]<SP>[DATA]<CR>

Qualifiers:

Address:

Set

size

byte

Set

size

Set

size

to
to

word

/P
/V

Physical address space
Virtual address space

IPR

GPR

nnnn

Hex

longword

number

physical

virtual

address

{SpP>*

LLast

address

<SP>+

address

<SP>P

PSL

>>>H

Processor

halt

>>>1

Processor

initialize

cache.

Test

>>>T

>>>5

nnnn

1Issues

command;

Start

>>>5<CR>

>>>C

Continue

>>>B

the

Boot
panel

invalidates

INIT

and

microverify

performs
in

UNIBUS

initialize
PC,

without
the

starts

and

program

initialize
program

command; boots from
device switch.

116

and

INIT.

routine,
functions,

starts

performs initialize
at current contents

command;

Single-steps

command;

processor

address

Start command;
starts program

of
>>>N

hex

only)

command

runs

command;

specified

(deposit

stores

program

there.

functions and
of the PC,
current

contents

functions.

after
device

the

selected
:

loaded.
by

front

CONSOLE COMMANDS (CONT)

Description

Command
Format:

B [QUALIFIER]<SP>[DDCU]<CR>

gualifiers: /X

/hex number
DD

>>>B DDCU

Device

Adapter code
unit number

C
8]

Examples:

Inhibit running of microverify.

Stores boot control flags in Rb5.

Boot device specified by DDCU.

t
>>>B/X DDCU Boot device specified by DDCU and inhibi
microverify.

>>>B/n DDCU

Pass four-digit hex number to R5 and boot

device specified by DDCU.

>>>D/G/L F 1000

>>>D/P 1000 001234EF
>>>E/I 25
>>>1
>>>B/18/X DMAY

>>>X

Stores 10080 in PC.

stores longword of code in 10080.
Fxamines cache disable register.
lize.
performs processor initia
Boots diagnostic supervisor from

DMA@, without microverify.

load command; reserved for use by

Binary load/un
that
manufacturing for automated test device r(APT)
data
communicates with the console to transfe

between
Binary

itself and memory.

Load:

UM2>
>>>X<SP>[ADDRESS]<SP><@'COUNT)(CR)(CHKSUMl)[DATA]<CHKS
of the load

CHKSUM1

Sstarting address
Number of bytes to be transferred (unsigned
3g-bit hex number, bit <31> is a zero)
Two's complement checksum of the command

Data

Bytes of binary data

Address

Count

string

Two's complement checksum of the data

CHKSUM?2
Binary

Unload:

>>>X<SP>[ADDRESS]<SP><1'COUNT)(CR)(CHKSUM)

Address

Count

CHKSUM

Starting address of the unload

Number of bytes to be transferred (unsigned
3g-bit hex number, bit <31> is a one)
Two's complement checksum of the command
string

116

CONSOLE COMMANDS (CONT)

CONSOLE COMMAND ERROR CODES
Code

Description

220

Memory examine or deposit failed:
access violation
(ACV), translation not valdid (TNV), machine check,
bus error, TB parity error, CCS/WCS parity error.

211

Error

230
233

Checksum error on APT load or unload
Attempt to boot from unrecognized device

?34

Controller

(bM,

DL,

accessing

DD,

not

IPR

PSL

DB)

BOOT

command

CONSOLE HALT CODES
Code

Description

Test

g2
g4
25
26

CTRL/P halt or single macroinstruction mode
Interrupt stack not valid
Double bus write error halt
Processor halt instruction executed (>>>H)

console

command

executed

a7
@8
gA
@B

Vector
Vector
Change
Change

(>>>N)

<1:90> = 3, halt at vector
<1:8> = 2, WCS disabled or not present
mode instruction executed on interrupt stack
mode instruction executed, vector <1:0> not =

BOOT, POWER-UP, AND INITIALIZATION HALT CODES
Code

11
12
13
14

16%
FF
*Normal

Description

Halt

instruction

boot

ROM,

VMB.EXE

console

boot

command,

failed

Power-up, cannot find RPB, FPS1 at RESTART/HALT
Power-up, warm start flag false FPS1 at RESTART/HALT
Power-up, cannot find good 64KB of memory
Power-up and boot, bad or nonexistent boot ROM

Power-up, cold start flag set during boot subroutine

Power—-up halt FPS1 at HALT position
Microverify test failure
halt.

117

CONSOLE COMMANDS (CONT)

MICROVERIFY ERROR CODES
Code

PC+2

Test Name/Error

g0
201

Bad bit
Bad bit

WBUS

BBUS,

!@!

MBUS
231
p32

Message

test

in DREG or SUPROT
in RBUS or WBUS

test

Bad bit

in OREG

in MBUS

Scratch pad bit test
clearing

RTEMP

clearing

GPR

@51

Error

952
p54

Error

857

Error

filling GPR with ones

258

Error

clearing

g5B

Error

filling

@5D

Error

clearing

g5E

Error

MTEMP

g61

Error

262

Error

ged
067

Error

P68

Error
Error

RTEMP

291

Error

292

Error

294
697

Error

298

Error

gAl

Error

gA2

Error

gA4

Error

gA7

Error

@A8

Error

filling RTEMP with ones
IPR

IPR with ones
MTEMP

filling MTEMP with ones

explicit address test
addressing MTEMPQ
addressing MTEMP1
addressing MTEMP?Z2
addressing MTEMP4
addressing MTEMPS8

explicit address test
addressing RTEMPY
addressing
addressing
addressing
addressing

RTEMPI1
RTEMP2
RTEMP4
RTEMPS8

IPR explicit address

IJI

addressing
addressing
addressing
addressing
addressing

GPR explicit
0C1

Error

0C2

Error

0C4

Error

0C7

Error

0C8

Error

OCE

Error

address

addressing
addressing
addressing
addressing
addressing
addressing

test

IRP#
IPRI1
IPR2
IPR4
IPRS8

test

RO
Rl
R2
R4
RS8
dual

118

port

CONSOLE COMMANDS (CONT)

MICROVERIFY ERROR CODES (CONT)
Code

PC+2

Name/Error

Test

XB/IR/0OSR bit

IOI

Message

test
.

Error

XB<31:0>

OF2

Error

XB<63:32> -

OF4

Error

OF7

Error

OF1

Source
111

112

Error
Error

OSR

¥XB

117

Error
Error

124

Error

127

Error

128

Error

12B

Error

12D

Error

12E

Error

182
184

1B2

1B4
1B7
1B8
1BB

1B2

1E1

1E2

one byte from XB
2 bytes from XB or

PC by

longword

|
%
!
¥

test

reading DSIZE ROM operand

loading/reading

RNUM

loading/reading

RNUM

loading/reading

RNUM

loading/reading

RNUM

reading

DSIZE ROM operand

reading DSIZE ROM operand
reading DSIZE ROM operand

Error

loading/reading

Error

reading

Cache

parity error

Failed

RNUM

DSIZE ROM operand

to get cache

test

parity error

Bad machine check error summary register:
Bad

cache

error

parity error

Failed to get group @ TB parity error
Bad TB group parity error register

Bad machine check error summary register
Failed to get group 1 TB parity error
Bad TB group parity error register

Bad machine check error summary register
Control

1D1

increment

RNUM/DSIZE test continued
Error reading DSIZE ROM operand

TB
1B1

test

incrementing PC by 2
incrementing PC by 4
Error

RNUM/DSIZE

181

‘

Error sourcing an unaligned

121

144

122

141
142

.....

sourcing
sourcing

Incrementing

114

|
}

store parity error

test

Failed to get control store parity error
Error

in control

Cache

test

store parity error

filling cache with ones.
Location not initially = 0
FError filling cache with ones.
Unable to write ones
Error

119

BOOT58 COMMANDS

The following is a description of the commands that can be entered
to the standalone BOOTS58 program. They are listed in alphabetical

order.

BOOT
B[{device-name]

Bootstraps the system from the specified device. I1f you omit
the device name, the system is bootstrapped using the default

bootstrap command
the
cannot enter

that vyou
Note
(DEFBOO.CMD).
procedure
name of a command procedure to the BOOT

command and you cannot specify this command within

command

procedure,

DEPOSIT
D[loc-qual,size-qual]l

value

location

is
location
The
Deposits a value in the specified location.
interpreted
according
to
the
location and size qualifiers.
The

The

location

qualifier

can

general register
internal process
physical memory

size

qualifier

expressed

the

location

and

byte

word

longword

you do

default

not

values

can

specify

established

expressed

/G
/1
/P

follows:

120

follows:

size

qualifiers,

command

are

used.

the

BOOT58 COMMANDS (CONT)

EXAMINE

E[loc-qual,size-qual]

location

Displays the contents of the specified location. The location
is interpreted according to the location and size qualifiers.
The location qualifier can be expressed as follows:
/G

general

physical

memory

internal process register

The size qualifier can be expressed as follows:
/B

byte

/W
/L

word
longword

the
If you do not specify the location and size qualifiers,
default values established by a previous command are used.
HELP

Displays the BOOT58 help file at the

console

terminal.

cannot specify this command within a command procedure.

You

LOAD

L0 file-spec

[/START:address]

memory, starting
Loads a file from the bootstrap device into qualifie
r. If you
at the address specified with the /STARTloaded
1into memory
is
omit the /START qualifier, the file

beginning at the first free address.

START
S value

ed.
Transfers control to the value specifi
.
this command with the LOAD command

You

generally

use

@file-spec

You
re specified.
Executes the name of the command procedu
procedure file-spec of more than six
cannot specify acancommand
you specify nested command procedures.

characters, nor

121

CHAPTER 6

RDM AND MICRODIAGNOSTICS

RDM IN STALLATION

RDM HARDWARE

The following hardware is supplied with the indicated RDM options.
Option

KC750-CA

Hardware (One Each)

Usage

RDM module - L@026

Uu.S.

Freestanding modem
Diagnostic kit

Filtered interface cable (70-16921)
Modem interface cable (BC@5D-25)

KC750 Options User Guide (EK-KC750-UG)

Foreign

RDM module - LO@O6

KC750~DA

Diagnostic

Filter

kit

interface cable

(70-16921)

KC75@ Options User Guide (EK-KC758-UG)
(Modem and cable supplied by customer)

PREINSTALLATION

The following items must take place

before

1installation

the

RDM.

and
The customer's system configuration must be evaluated
to the DIGITAL

system

Diagnostic

configuration worksheet supplied

Center

(DDC).

only) must furnish the telephone
The customer (U.S.
company with the following information on the modem to be
used.

number

Model

Manufacturer's number

Ringer equivalence number?*

FCC registration number?*

Voice jack direct-connect type receptacle

Telephone number of line/RJ11C if already installed

*To be supplied by the DIGITAL district office.

125

RDM INSTALLATION (CONT)

INSTALLATION PROCEDURE

The following is the procedure for installing the
and

module

RDM

hardware.
1.

system,
operating
perform an orderly shutdown of the
by turning the console
system
the
down
power
then
OFF.

switch

key

power

baud
port
The RDM module is supplied with the remote
the module.
on
Jjumpers
by
baud
3¢
to
set
rate
location
the
in
switchpack
a
had
Earlier modules
currently occupied

the

jumpers.

W7/
W6,
as shown

W5,
selected by jumpers W4,
E198-1 through 4)
positions

rate is
switch

The baud
by
(or

below.

Europe,

the

module

Baud

Rate

remove
from
W4

baud

300

On
On

400

1,200
2,400
3,600
4,000
4,800
7,200
9,600
19,200

opposite

jumpers.

E190-2

Of £

Of £
On
Oof £
On
Off
On
Off
On

Oof £
On
On
Of £
Oof f
On
On
Of £

Of £

slot

Of £
On
On
On
On
of £
Of £
Of f

E190-4

end

E190-3

Of £

Ooff

L@@PP6 module

the

rate

E190-1

600

Install

jumper W-3 on

the

On
Of£
of£
Of£
Of
f
£
of
Ooff
Of
f

the

extended

hex

backplane.

Refer
the

the

RDM

and

modem cabling

illustrations

for

steps.

On the pin side of the CPU backplane,
carefully
move
the following cables from the left side of slot A& (odd
numbered pins) to the
right
side
of
slot
6
(even
numbered pins), keeping the same vertical placement.
a.

Front

TuU58

panel

Console

cable

(row

cable

(row

CAUTION

Make

sure

console

there
cable

are
and

two

open

the

plugs.

126

pins

console

between

the

baud

rate

RDM INSTALLATION (CONT)

the RDM filtered cable assembly (70-16921)

into

the

Plug
bottom 22 pins of set C on the right side of slot 6.
Attach the assembly to the backplane so that pin 1 is on
top and pin 22 is on the bottom (pin C@06-92).
CAUTION

that

When installing this cable, be sure

is connected properly and that the two bottom

pins C@6-93 and C@6-94 are left unconnected.

I/0 port panel
Attach the filtered cable assembly to the cover
plate.

the
Attach the asset tag around the filtered cableof wusing
the tag.

8.
9.

using two 6-32 Kepnuts provided with the

tie strap and tighten it to prevent movement

the

into

plug

Plug the modem cable cinch

RDM

cable connector in the I/O0 port panel and secure.

filtered

connect it to the
Route the modem cable as necessary and
freestanding unit that

modem.

requires

The
a

115

U.S.

Vac

modem

power

source.

CAUTION

the
Modem ac power must not come from
distribution
power
internal
VAX-11/758
and
ions
regulat
system. This violates UL
cabinet power

integrity.

INSTALLATION VERIFICATION

Use the following procedure to verify RDM operation.
1. Mount diagnostic software and scratch media.

switch to
Power up the system by turning the boot device
and the power key

the

switch

power-on action switch to HALT,
LOCAL.

power-up self-test.

After

power-up,

the

Observe the RDM
seconds.
fault indicator should turn on for about rten does
not
Inspect the installation if the fault indicato no console
is
turn on or does not turn off, or if there
SYS, ROM, or RAM code.
printout or error message with the remove
the RDM. 1Install
If the installation is correct,
original
another

RDM

positions.

return

the

127

cables

their

RDM INSTALLATION (CONT)

prints

terminal

console

the

is successful,

If the power-up test
the

following.
3

0P000P0006
>>>

4.,

Perform

the

RDM

installation

chapter yourself or ask the
installation verification.
5.

For

remote

switch

Check

with

telephone

testing

REMOTE.

the
for

DDC

the

DDC,

from

results

tests
DDC

later

telephone

turn

the

described

the

console

this

perform

power

terminal

key

verification.

RDM REMOVAL
Removing

the

removal

performed

place.

RDM

the

temporary,

reverse
only

reverse.

the

installation

The

modem

steps

cables

and

procedure.

through

connectors

need

are

left

CAUTION

Always

power
down
installing or removing

the
system
the RDM.

before

INSTALLATION OUTSIDE THE UNITED STATES
DIGITAL

does

not

United

States.

country

must

provide

The

modems

standard

followed

with

practices

obtain

KC750 Options Installation Guide
modems that work with the RDM.

128

RDM

options

and

modem

outside

procedures

there.

(EK-KC750-IN)

for

Refer

a
to

the

given
the

specifications

RDM INSTALLATION (CONT)

RDM CABLING
FRONT PANEL
SIGNAL CABLE

CONSOLE

|
] —TSIGNALS
|
|

,T,. SET C

RDM

MODEM

- FILTERED
CABLE

(7016921)

TERMINAL
CABLE

TERMINAL
{/O PORT
PANEL

FILTERED CABLE

( 7016927-00)
TK-9872

129

RDM INSTALLATION (CONT)

FILTERED CABLE INSTALLATION
TERMINAL
FILTERED
CABLE

CONNECTOR

RDM FILTERED

CABLE CONNECTOR
TERMINAL
CABLE

CINCH PLUG

.—

I/O PORT

PANEL

MODEM CABLE

CINCH PLUG

MA-5529

130

RDM INSTALLATION (CONT)

MODEM CABLING

CUSTOMER

SUPPLIED

RJ11C RECEPTACLE

FOR THE KC750-CA
OPTION

RJ11C JACK

BCOsD 25

CABLE ASSY.
/

*THIS CABLE PLUGS INTO THE

CUSTOMER SUPPLIED DATA SETS
FOR THE KC750-DA OPTION.
AC

LINE CORD
MA-2791A

131

RDM INSTALLATION (CONT)

RDM/MODEM SIGNALS

Conn. Pin

coge71l

EIA

EIA (RS232-C)

70-16921 Cable

RDM

Abbr.

Circuit

Protective Ground

GND

Received Data

RXD

GND
TXD

cC@672
cCpPe78

7
2

Signal Ground
Transmitted Data

CR690
Cp688
Cpe86
cg682
C@s692
Cp684

4
5
6
20
22
8

Request to Send
Clear to Send
Data Set Ready
Data Terminal Ready
Ring Indicator
Carrier Detect

Co680

Force Busy

(Unused)

EIA

Signal Name

RTS
CTS
DSR
DTR
RI
CD
FB

AB
BA

CA
CB
cc
CD
CE
CF
CN

SELECTED CPU BACKPLANE SIGNALS
Signal

Pin
Local

Name

Terminal

Ground

Cge24

Cg634
Ccge632

RDM terminal
RDM terminal

serial
serial

out to TUS58 serial in
in to TUS58 serial out

baud
baud

rate
rate

A
B

L
L

baud

rate

baud

rate

Cge64ds

Console

Coo646
Co649

Console
Console

Cp650

Console

TUS8

out (signals between TU58 and RDM)
in (signals between TU58 and RDM)
EIA TU serial out L (signals between RDM and

TU58 serial
TU58 serial

Bp686
Bp688

B@685

CPU)

EIA TU serial

Bpe687

(signals

between RDM and

CPU)
Front

Panel

Ago6d1

The front panel
(top half) with
to

RDM

cable
cable

is plugged into set A
pin 1 on top connecting

AQ601.

Specific

Cp675

RDM SA CLK
SA ST/SP L

Coe74

RDM

RESET

cge8l

RDM

MATCH

PULSE

Ca673

L (drive)
(drive)
(receive)

132

(receive)

RDM INSTALLATION
TESTS

The

following

series of tests

should be

run

the order given.

VAX CPU TEST

mount
installed,
been
To verify CPU operation after the RDM has
the EVKAA diagnostic and type the
<contains
that
tape
TUS58
the
following.
D/I

1<RET>

B<RET>

Cache is disabled and the

tape

motion

indicator

the

for

TU58

should blink or stay on for about two minutes while EVKAA is
loaded. The diagnostic runs repeatedly until it is stopped by
CTRL/P.

The following dialogue summarizes the procedure.

>>>D/1

1<RET>

>>>B<LRET>

EVKAA EVKAA -

4.0
4.0

done!
done!

CTRL/P

ged@

nnnn

>>>

In this dialogue, n stands for some number. The EVKAA diagnostic
(CTRL/P may have
should run at least twice before being stopped.
to be typed more than once to stop EVKAA.)

Next, use the VAX firmware to write and read test

memory locations.

data

Type the following to load memory.

with

VAX

data,

the

>>>D/P/L @ O<KRET>
>>>D + FFFFFFFF<RET>
>>>D + AAAAAAAALRET>
>>>D + 55555555<RET>

>>>D 2FFFC 12345678<RET>
>>>D + 87654321<RET>

Then, type the following to examine memorye.
>>>E

@<KRET>

>>>E<LRET>
>>>E<KRET>

>>>E<RET>

>>>E

2FFFC<KRET>

>>>E<CRET>

Aodoe000

0o003000

Poe00004

FFFFFFFF

POCEA0a8

AAAAARAA

0eo0eaacC

55555555

PgA@2FFFC

12345678

0oV30000

87654321

If the examined data does not agree with the deposited

test

has

failed.

133

RDM INSTALLATION TESTS (CONT)

VAX MEMORY BUS TEST
and
read
to
This test verifies the ability of the RDM hardware
VAX CPU test should be run
(The
with VAX memory.
data
write
before

this

test.)

To run the test, first enter the RDM console state as follows.
>>>CTRL/D
RDM>

Examine

VAX memorye.

RDM>E

@<RET>

go0000

pa0oR0Aa

0B0004

FFFFFFFF

003008

AAAAAAAA

poBRaC

55555555

g2FFFC

12345678

B30000

87654321

RDM>E<RET>

RDM>E<KRET>
RDM>E<KRET>

RDM>E

2FFFC<KRET>

RDM>E<KRET>

Deposit

memory.

RDM>D

FFFFFFFF<{RET>

RDM>D

@<RET>

RDM>D
RDM>D

2FFFC 55AA55AA<RET>
+ AAS55AAS55<RET>

Reexamine
RDM>E

memory.
@<RET>

godo0n

FFFFFFFF

pooeo4d

gooeovep

@2FFFC

55AA55AA

g30000

AA55AA55

RDM>E<RET>
RDM>E

2FFFC<KRET>

RDM>E<LRET>

RDM>

the data

memory,

the

read

test

from memory is not the same as data written
has

failed.

134

into

RDM INSTALLATION TESTS (CONT)

VAX CONTROL STORE PARITY CHECK
This test exercises the RDM's ability
to
know
whether
the
VAX
clock
is running, to stop the VAX clock, and to check VAX control
store parity.
(The VAX memory bus test should be run before
this
test.)

If the RDM is working properly, it refuses to
check
VAX
control
store
parity
while the VAX clock is running.
1In order to see if
check
parity
a
do
to
it
ask
clock,
the RDM can detect the VAX
while

the

VAX clock

running.

RDM>PAR<KRET>
CLK

RUNNING

RDM>

Check

that

the

RDM

can

stop

the

VAX

clock.

RDM>STO<RET>

STOPPED

CLK

this dialogue,

CSAD

@96n

stands

for

some

296n

number.

Now test the RDM's ability to check the VAX control store
(An error has been preset at microaddress
RDM>PAR

PARITY

17FD.)

parity.

@<RET>

ERROR

CSAD

17FD

RDM>

If any other address appears in the dialogue, a parity
been detected in that address of the VAX control store.

error

has

MICROBREAK POINT AND TRACE

This test exercises the RDM logic that stops the VAX clock when
the CPU executes the microinstruction at a preset microaddress
called the microbreak point. The test also exercises the RDM's
A trace is a
ability to trace VAX control store addresses.
listing of the CS addresses of the 1last 65 microinstructions
executed,

in the order of their execution.

(The VAX control store

parity check should be run before this test.)
First,

initialize

the CPU as

follows.

RDM>RETKRET>
%%

Qo000

>>>CTRL/D
RDM>

135

RDM INSTALLATION TESTS (CONT)

Set the microbreak
RDM>SE

point.

A2Z2B<RET>

RDM>

the

CPU's

carriage

return

Where n is some hexadecimal number and NEXT indicates the

address

the

address

This microbreak point happens to

Return to the VAX console state.

The CPU does a

When the CPU does a carrilage
carriage return microinstruction.
return, the RDM should then stop the CPU clock.
in

the

process.

RDM>RET/D<KRET>
CLK STOPPED CSAD

NEXT nnnn

@A2B

of the next instruction to be executed.

Next check that the RDM does a VAX control

store trace.

RDM>TR<RET>

NEXT nnnn

PA2ZB

CSAD
CSAD

nnnn

CSAD

nnnn

CSAD

2965

CSAD

p964

CSAD
CSAD

0966
@964

CSAD

g966

the
In
all.
1in
displayed
Sixty-five microaddresses should be
(...) shows that a continuation of
ellipsis
an
above dialogue,

takes
printouts
address
and
number
hexadecimal

microinstruction

©place.
NEXT

executed.

Note that the address of the

1is

Also,
the

represents
n
the
of
address

last microinstruction executed

some
next

(0A2B)

The
return microinstruction.
«carriage
the
of
address
the
is
a
addresses 9964 and 0966 are the loop in which the CPU waits for

carriage

return.

136

RDM INSTALLATION TESTS (CONT)

MICRODIAGNOSTIC RUN TEST

on
run
The most RDM hardware is tested when a microdiagnostic is
beginning the test, make sure the system is in
Before
VAX.
the
the RDM console state.
The microdiagnostic used here is the
data
Mount the TU58 tape with
path module (DPM) microdiagnostic ECKAA.
this

program

load

the VAX front

the microdiagnostic

panel.

Use

the

into RDM memory and

following

dialogue

run

it twice.

RDM>TE/C<RET>
MIC>DI

PA:2<RET>

ECKAA-V@2.8@

DPM-V@2.00

04,
11,

g1,
gE,

@2,
OF,

03,
14,

1B,

1¢,

1D,

1lE,

END

PASS

DPM-V@2.00

g1,
¢E,

92,
O0F,

95,
12,

@06,
13,

@7,
14,

08,
15,

09,
16,
23,

1F,

26,

21,

22,

03,
14,

¢4,
11,

@5,
12,

@6,
13,

07,
14,

08,
15,

09,
16,

1E,

1F,

20,

21,

22,

23,

18,

1¢,

1D,

END

PASS

@A,
17,

0B,
18,

0C,
19,

0D,
1A,

@A,
17,

@B,
18,

0C,
19,

0D,
1A,

MIC>RET<RET>
RDM>

Note that the MIC> prompt is displayed when the system is

microdiagnostic

state.

If the printout

is not the same as the one just given and

the

the test

1If a
been performed correctly, replace the RDM with a spare.
has
the
return
and
RDM
spare is not available, remove the existing

backplane cables

their

original

positions.

137

RDM COMMANDS

RDM TROUBLESHOOTING FLOW

INSTALL THE

ROM

INST ALLED

RDM SEE

MANUAL

Tuss

LOADING
oK

YES

CORRECNONSAJ

TO LOCAL/HALT

SET FRONT

MAKE

PANEL SWITCHES

CHECK FOR
PROPER

INSTALLATION

(

ANY

GET HELP ,

FAILURES

CHANGE TAPE

CONSOLE

PERFORM

CLR OR FRU

AND RUN NEW

ACTION:

TEST

¥
RETEST

PERFORM
FRONT PANEL

INITIALIZE

1
NO

YOUSLICK

DEVIL

THE NEXT
CHANGE
HIGHER ASSEMBLY

MOUNT
SELECTED

IF POSSIBLE

TUS8 TAPE

CONSOLE
ACTION:
TE

TK-4720

138

RDM COMMANDS (CONT)

RDM CONTROL KEY FUNCTIONS
Key

CTRL/D
CTRL/P
CTRL/U
CTRL/O
CTRL/R
CTRL/C
CTRL/S
CTRL/Q

Function

Enter RDM console command mode
Enter CPU console command mode
Abort current command line
Inhibit printouts during diagnostic test
line

Retype current command

Cancel current function (halts REP or R command)
Disable CPU output to active terminal
Enable CPU output to active terminal

RDM CONSOLE COMMANDS
Command

Function

RDM>E

Examine - uses the following command switches:
E/B <ADDRESS>
E/W <ADDRESS>

E/L <ADDRESS>

E/C <ADDRESS>
E/N or E +
E E *

RDM>D

Data size is byte
Data size is word

Data size is longword

Examines RDM status registers

8007

range

the

8FF8

Examines next address
Examines previous address
Uses data last examined or

deposited

the

address

Deposit - uses the following command switches:
D/B <ADDRESS> <DATA>
D/W <ADDRESS> <DATA>
D/L <ADDRESS> <DATA>

D/N or D + <DATA>
D - <DATA>

Data size 1s byte
Data size is word

Data size is longword
Deposits data in next address
Deposits data in previous
address

Uses data last examined or

D * <DATA>
RDM>INI

RAM addresses

and

deposited

the

address

Initialize - simlates a power-fail sequence to

Asserts ACLO
(May be used with R command to

recover CPU from a hung condition.

and DCLO signals.

troubleshoot power-fail recovery problems.)

RDM>RET

RDM>RET/D

Return — switches system from RDM

console/command mode to CPU program mode.
Stop-on-micromatch, if set, is disabled.

Return/D - switches system from RDM command
mode to RDM control mode. System is at prompt

level of the program but, unlike CPU program
mode, CTRL/D returns the system to RDM console

node whether the CPU is running or not.

Stop-on-micromatch, if set, remains enabled.

139

RDM COMMANDS (CONT)

RDM CONSOLE COMMANDS (CONT)
Command

Function

RDM>TA

Talk - enables talk mode between local
remote terminal during an RD session.

RDM>SH

Show - displays

RDM>SH/V

Show version - displays current
of

the

firmware

8085 CPU operating

running

the

Repeat - continually repeats

RDM>REP

CTRL/C

until

states.

level

revision
RDM.

command given

last

(CTRL/O

typed.

and

output

stops

terminal.)
RDM>R

RDM>PAR

Repeat next -~
command until

continually repeats specified
(CTRL/O stops
CTRL/C is typed.

output

terminal.)

the

Parity scan - runs CCS parity check from the
specified starting address.
Stops at preset
error address 17FD if no error is found.
CPU
clock must be stopped to use this command.
WCS
may be checked by specifying addresses 2000
through 2408 (WCS must be loaded after
power-up)
.
RDM>STO

Stop

RDM>STE

Step - steps through one microinstruction
M clock tick.
Displays address of micro-

RDM>STE/T

stops

clock.

instruction

currently

microinstruction.

the

Step tick clock tick.
in

CpPU

clock

and

latched

CPU

and

advances microinstruction
Displays current address
data

latched

the

address

by one B
latched
next

tick.

RDM>CON

Continue

RDM>TR

Trace
store

RDM>UA

CPU

restarts

the

CPU

clock.

- displays in reverse order
addresses stored in the RDM

the control
diagnostic

control
display

store (DCS).
CTRL/C or CTRL/D halts
of the 65 stored addresses.
CPU clock

must

stopped

use

this

command.

Microaddress - halts the
selected microaddress in

CPU
CCS

then

restarts

parity

data.

(May

loop.)
is

and

checks

used

with

Stop~-on-micromatch

disabled.

140

and latches
latches.
CPU
on

the

address

command

for

scope

function,

set,

RDM COMMANDS (CONT)

RDM CONSOLE COMMANDS (CONT)
Function

Command

RDM>UA/C

clock tick.
CCS latching
not changed.

Used to isolate failures in the
mechanism.
CPU program flow is
Stop-on-micromatch function, if

CSS

address

lines

selected

set,
RDM>SE

temporarily places

Microaddress/C microaddress

until

disabled.

Set - enables stop-on-micromatch function.
CPU clock is stopped when the CCS address bus
TR command is
equals the selected address.
then used to trace path taken by the CPU to
reach

that

point

the

CCS.

RDM>CL

Clear - disables

RDM>LIN

Link - used to create executable control file
in the RDM RAM with the LNK> prompt.
CTRL/C
exits file or PER command causes it to execute
until CTRL/C is given.
Link list is destroyed
if system is powered down or if the RET, RET/D,
or any TE command is given,

RDM>PER

RDM>LO

Perform - causes

executed

until

stop-on-micromatch

link list

CTRL/C

function.

to be continuously

is given.

<FILENAME><SP>[ADDRESS]

Load

main

memory,

reads

the

specified

starting

the

file
load

from
at

TUS58

the

specified address.
May be used to load files
if CPU does not have the functionality to do
so,

the

file

not

properly

an RT11 boot block.
RDM needs only
base clock to achieve the 1load.

hooked
the

CPU

Test - loads the microdiagnostic monitor
(MICMON) from TUS8 to RDM RAM and runs microdiagnostic tests.,
Testing is canceled if an
error is detected or CTRL/C is typed.
MICMON
then switches to the command state, giving the

RDM>TE

MIC>

RDM>TE/C

prompt.

Test-command
places it in

- loads MICMON as
the command state

for
with

TE but
the MIC>

prompt.

RDM>TE

Test-file RDM RAM and
sist of six

loads user-specified program
The file name must
runs it,
characters and the file type

three.

example:

For

RDM>TE MICMON.TSTCCR>

141

into
conof

RDM COMMANDS (CONT)

RDM CONSOLE ERROR CODES
Description

Code

TU58

Function

TAP:01

Tape

TAP:02

Tape

TAP:03

Tape

TAP:04

Tape

TAP:05

Tape

TAP:06

Tape

TAP:07

Tape

TAP:08

Tape

TAP:09

Errors

- Device timeout
- Error from UART
UART - Data set ready dropped
UART - Receive overflow
checksum error received
byte count maximum exceeded
no end packet (invalid operation
invalid packet received
UART
UART

not

Tape

file

TAP:12

Tape

directory

TAP:13

Tape

flag

TAP:14

Tape

read

TAP:C9

Tape

found
error

received

(not

length error

TAP:DF

Tape

TAP: E@

Tape

bad record number
bad operation code
motor stopped
block not found

TAP:D@

Tape

TAP:EF

Tape

data

Tape

TAP:F7

Tape

write protocol error
cartridge not present

TAP:F8

Tape

bad

TAP:EE

Tape

TAP:FF

Tape

partial operation (end
diagnostic failure

Console

Terminal

TRM: 02

Terminal
Terminal
Terminal

TRM:04

Terminal
Terminal

TRM:
A

all

data)

records

fit)

error

number

medium)

UART

Device timeout
Error from UART

UART

Data

UART CTRL/C

set ready dropped
Receive overflow
received

TRM:@3C

Terminal
Terminal

TRM:¢D

Terminal

command input buffer
CTRL/D received
command input larger

TRM:QGE

Terminal

remote

TRM: @B

Errors

TRM:03

TRM:01

check

command

(not

TAP:F5

unit

code)

line

CRC

142

error

overloaded
than

buffer

RDM COMMANDS (CONT)

RDM CONSOLE ERROR CODES (CONT)
Description

Code
CMI

Errors

Nonexistent

CMI:00

Corrected
Read data

CMI:01
CMI:02

General
SYNTAX
ERROR

INVALID

memory

read data
substitute

Errors

Error entering console command

COMMAND

RDM does not recognize command

ROM

ROM failed RDM power-up self test

RAM

RAM failed RDM power-up self test

RDM:10
RDM:11

Operation already in progress
Invalid operation code in macro

REM:01

Remote

REM:02

Remote

UART
UART

REM:03

Remote

UART

REM:04

Remote

UART

CPU:01

CrPU:03

CPU
CPU
CPU

UART
UART
UART

CrPU:04

CPU

UART

CPU:02

Device timeout
Error from UART

Data set ready dropped
Receive overflow

Device

timed

out

Error received from UART
Data set ready dropped

Receive overflow

143

VAX-11/750 DIAGNOSTICS

VAX-11/750 diagnostic programs are available under
of

levels

the

following

operation.

Level

VMS operating system based diagnostic programs
that run without the diagnostic supervisor.

Level

Diagnostic supervisor based programs - any diagnostic

UETP,

that

ERRLOG,

requires

SPEAR,

a VMS based

SDA

driver.

supported by the

peripheral diagnostics not
in

supervisor

diagnostic

System
Level

Diagnostic
run

on-line

Bus

the

standalone
control

supervisor based
under

VMS or

interaction

Formatter

and

mode

program

programs
the

that can be

standalone

mode.

program

reliability-level

peripheral

diagnostics
Level

Diagnostic
be

run

supervisor
the

based

standalone

programs

that

can

only

mode.

Functional-level peripheral diagnostics
Repair-level peripheral diagnostics
CPU cluster diagnostics
Level

Standalone

macrodiagnostics

that

run

without

the

supervisor.

Hardcore instruction test (tests the basic
functions necessary to run the supervisor)
Level

Console

based

standalone

diagnostics

that

mode.

Microdiagnostics
Console operating
Microverify

program

144

run

only

the

CPU

VAX-11/750 DIAGNOSTICS (CONT)

TUS8

ECKAB
ECKAC
ECKAL

EVKAA

Diagnostic Supervisor
Microdiagnostic Monitor
Micro

Micro Memory Interface (MIC)
Cache/Translation Buffer

VAX

Data

Cassette

Number

|2
R VY]

KA750

Description

ECSAA
ECKAA

Level

e U

Name

Device

Path

Hardcore

Module

(DPM)

Instruction

EVKAC
EVKAD
EVKAE

(FP750)

(Bootable)

EVKAB

VAX Architectural Instruction
VAX Floating-Point Instruction
VAX Compatability Mode Instruction

VAX Privileged
Instruction

Architectural

RDM Microdiagnostic

KC759

ECKAF

VAX

MS750

ECKAM

VAX-11/750 Memory
VAX Memory User Mode

EVKAM

TUS8

VAX~-11/7508 Cluster Exerciser
VAX RP/RK/RM/RX/TUS8 Data

ECKAX
EVRAA

9,39

Reliability
ECCAA

VAX-11/75#

MASSBUS

Adapter

(DW750)

ECCBA

VAX-11/75@

UNIBUS

Interface

RK@7

EVRAA

VAYX

(MBA)

RH750

VAX

(UBI)

EVREC

EVREA

EVREB

EVREF
EVREG

EVREE

EVRED

Second

UNIBUS

Reliability
Disk Formatter
VAX RK611 Controller

(SUB)

Data
9,38,39
9

Part
VAX RK611 Controller Part
VAX RK61l1l Controller Part
VAX RK611 Controller Part
VAX RK611 Controller Part
VAZ RK@O6/87 Functional Part
VAX RK@6/87 Functional Part

= 0wy

EVRAC

and

RP/RK/RM/RX/TU58

6,17,33
65,17,33

11
12
12

1
2

Refer to the microfiche VAX diagnostic listing index (EVNDX)
NOTE:
for the current diagnostic revision and TU58 cassette numbers.

145

VAX-11/750 DIAGNOSTICS (CONT)

Level

TUS58 Cassette
Number

Description

Device

Name

RLO?2

EVRAA

VAX RP/RK/RM/RX/TU58 Data

EVRFA

RLP2 Subsystem Functional

RM@3/

EVRAA

RMB5

EVRAC

Reliability

VAX RP/RK/RM/RX/TUS58

VAX RM@3/05/80 Diskless
VAX RM@3/@85 Functional

EVRAA

VAX RP/RK/RM/RX/TU58

EVRDA

VAX RM@3/05/8¢0

EVRGA

RM8#

Formatter

EVRGB

RM8@

Functional

RPO4/

EVRAA

VAX RP/RK/RM/RX/TU58

RP@5/

EVRAC

VAX

RPO6

EVRBA

\]
(V5 VS U I OO

EVRAA

EVRAC

EVRIA
TS11

EVMAA

EVMAD

TE16/

EVMAA

TU45/

EVMAB

9
25

Data

TU77

EVMAC
EVMAA

EVMAE

Reliability
VAX Disk Formatter

9,38,39

VAX RX@2 Subsystem Repair

VAX Magtape Data Reliability
VAX TS11 System Repair

VAX Magtape Data Reliability
VAX TE16,TU45/77 Drive Function
VAX TE1l6,TU45/77 Control Logic

TU78

9,38,39

Functional
Dual Port Controller

VAX RP/RK/RM/RX/TUS58

Data

Reliability
VAX Disk Formatter
RP@7 Front End

RP@P7
RP@7

16,39

VAX RP/RK/RM/RX/TU58

EVRHC

9,38,39
14

9,38,39

Formatter

EVRAA

EVRHB

VAX DCL/RP@4/05/06 Repair

EVRHA

Data

EVRCA

EVRAC

RX@2

Diskless

Reliability

Disk

9,38,39

Data

VAX RP@4/05/06 Functional

RP@7

Reliability

EVRDB

EVRDA

RM80

Data

Reliability
VAX Disk Formatter

9,38,39

VAX Magtape Data Reliability
TM78/TU78 Control Logic

15
15
15
15
15

Refer to the microfiche VAX diagnostic listing indeyx (EVNDX)
for the current diagnostic revision and TU58 cassette numbers.

NOTE:

146

MICROMONITOR (MICMON) COMMANDS

Command

Function

MIC>RE

Return

command

Diagnose

MIC>DI

system

diagnostic
MIC>DI

leaves

MICMON

and

returns

RDM

mode.

performs TU58
control store

diagnostics
(DCS).

from

the

RDM

PA:<PASS-COUNT>

Diagnose - initializes program control
starts execution loop of test programs
specified number of passes.
MIC>DI

TE:<TEST-NUMBER>

MIC>DI

TE:<TEST-NUMBER>
: <TEST-NUMBER>

flags and
in DCS for

Diagnose

executes

specified

test

range

tests.

MIC>DI

TE:<TEST-NUMBER>

Diagnose - continually executes specified
until stopped by an error or CTRL/C.
MIC>DI

MIC>CO

Diagnose

runs

Continue

restarts

diagnostic
DCS

module

test

ECKAF.EXE.

following

error

CTRL/C.
Loop

MIC>LO

sets

loop

detected

and

MIC>SE

Set

MIC>CL

Clear

flag

sets

flag

reported

and

specified

clears

loops

program

error.

program

specified

control

program

flag.

control

flag.
MIC>SH

Show flags - displays
program

MIC>SH

control

Show VBUS - displays current
visibility

MIC>SE

current

bus

states

the

flags.

signal

states on

(VBUS).

S0:<DCS-ADDRESS>

Halts execution of DCS program at specified

address.

147

the

MICROMONITOR (MICMON) COMMANDS (CONT)

Function

Command

MIC>SE ST CY
MIC>SE ST TI

Steps through DCS microinstructions on M clock

cycle.

Steps through DCS microinstructions, stopping

twice in each M clock cycle as a function of the

phase

MIC>SE ST

clock.

[:TEST-PC]

Set step instruction - steps through pseudois
If test-pc
instructions in current test.

specified, step function starts when the

instruction at test-pc is ready to be executed.
If test-pc is not specified, stepping begins on

the next pseudo instruction of the current test

following a loop (LO) or continue (CO) command.

MIC>CL

SO:

<DCS-~-ADDRESS>

Clear stop-on-micromatch - DCS address, if
specified, generates scope sync pulse on slot 6,
(1809 hex is added to desired address).

pin C81

pulse occurs with M clock when the current

address matches

MIC>SE CF:

<DCS-ADDRESS>

DCS address.

<BIT-NUMBER>

Set control file bit - sets specified control
file bit at the specified DCS address (bits

.
<95:88>)

MIC>CL CF:

<DCS-ADDRESS>

<BIT-NUMBER>

Clear control file bit - clears specified control
file bit

the

specified DCS address.

MIC>EX

MIC>EX

<REGISTER:NUMBER>

following processor

Examines the

MA
pC
PB
RT:nn
MT:n

Vvirtual

address

registers:
(VAR)

Memory address register (MAR)
CPU program counter (PC)
PC backup register (PCB)
Rtemp registers @ through 2F
Mtemp registers @ through F

PS
MD
WD

Processor status longword (PSL)
Memory data register (MDR)
Write data register (WDR)

Status

Step

SR:n

status and control
flags

counter

148

registers @ through E

MICROMONITOR (MICMON) COMMANDS (CONT)

MICROMONITOR PROGRAM CONTROL FLAGS
Flag
HALT

Function

Halt

program
LOOP

error

loop may

error

Bell
every

the

monitor

error.

include

instructions

instruction
is set or a
not loop on
be clear to

BELL

returns

Loop on error - loops on program detected error.
When set by MIC>SE FL LO, the HALT flag must be
cleared and the NER flag set for continuous loop.

The

NER

detected

from

report

error

fifth

the

pseudo

instructions

ERRLOOP

the

and

DCS

IFERROR

in the failing test.
If the IB flag
microtrap occurs, the program does
microinstructions in DCS.
NER must
inhibit error messages.
-

inhibits

rings

error

messages.

bell

the

of,

error.

occurrence

first,

then

Inhibit burst - when used with LOOP flag, program
does not loop only on DCS instructions but loops
instead between the ERRLOOP and IFERROR pseudo
instructions.

test

Quality assurance - each

error

was

Trace

- monitor

Signature

prints

analysis

test

used

to help diagnose

faults.

progress

Flag

reponds

detected.

whether

provides

two

not

sync

names

with

and

numbers.

signature

Loop occurs on
error

points

analyzer

test

occurs.

the

Start/stop window, slot 6, pin
Clock pulse, slot 6, pin C73

backplane:

C75

The signature analyzer analyzes test points by
displaying a value (signature) if the signal
This value is compared with
pattern is steady.
the value

from a

known good module

failures.

149

locate

MICROMONITOR (MICMON) COMMANDS (CONT)

VISIBILITY BUS (VBUS) SIGNALS
Bit

Bit

Print Set

Signal

Number

Number
(Hex)

Name

Page

@a
g1
82
@3
g4

a0
g1
@2
23
g4

UBI@3 FORCE TB PE L
UBI®3 FORCE CACHE PE L
CS HNEXT PAR H
UBI@3 RTUT DINH L
UBI®3 BUSF PAR H

UBI1S
UBI15
UBI15
UBI1S5
UBI15

12
13
14
15
16
17

MIC@P4 STATUS VALID H
MIC@S5 UB REQ H
MIC@7 CORR DATA INT L
MIC@7 WR BUS ERR INT L
Not used, always 0
Not used, always @
DPM17 INSTR FETCH H
DPM17 DO SRVC L
DPM16 IRD1 H

(Decimal)

g5
g6
a7
28
29
19
11
12
13
14
15
16
17

18
19
20
21
22
23
24
25
26
27
28

29
30
31
32
33

34
35
36
37
38
39

@5
26
a7
28
29
gA
@B
ac
@D
AE
gF
10
11

18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
25
26
27

INT PEND L
UB INT GRANT H
CON HALT L
VECTOR 3 H
VECTOR 2 H
VECTOR 1 H
VECTOR @ H
GEN DEST INH L
UTRAP L
LATCHED MBUS 15 L
PROC INIT L
MSRC XB H
MEM STALL H

UBI15
UBI15
UBT15
MICO4
MIC@4
MIC@4
MIC@4
MIC@4
MIC@4
MIC@A4
MIC@4
MIC@4
MIC@4

DPM14 UVCTR BRANCH H
DPM14 DISABLE HI NEXT H

DPM21
DPM21

UBI15
UBI1S5
UBI12
MICRO
MICRO
MICRO
MICRO
MIC@7
MIC@7
MIC@4
MIC@4
MIC@4
MIC@4

DPM2@
DPM14
DPM17
DPM19
DPM19

DPM18
DPM13
DPM19
DPM19
DPM11
UBI13

CS PARITY ERROR H
LD DSR L
PSL CM H
ISIZE § L
ISIZE 1 L

DST RMODE H
TIMER INT L
DSIZE @ H
DSIZE 1 H
MCS TMP L
MSEQ INIT L

150

MIC@4
MICQ4
MIC@4
MIC@4
MIC@4
MIC@4
DPM21
DPM21
DPM21

DPM21
DPM21
DPM21
DPM21
DPM21

DPM21
DPM21
DPM21
DPM21
DPM21
DPM21

CHAPTER 7

BLOCK DIAGRAMS

VAX-11/750 BASIC DIAGRAM

MOS

MOS
ARRAY

ARRAY
MEMORY

TERMINAL

J\ /[
usl

MBA*

i/ \i

UET

‘

mmmmmmmm __J

RDM

MBA

CONSOLE

Ind

—

DRIVE

CMI

CpPU <j}

CASSETTE L

CONTROL

MOS
ARRAY

MASS

BUS

UNIBUS

*SECOND UNIBUS INTERFACE IS OPTIONAL
TK-3871

163

ONILYOT4A_.”3L0W3Hwndo378VLIEM |%MW

r
.
I
.
l
n
.
_
1
.
L
[
X
oA911§l70Lv0dSDiLVdANwYYeIILtLNNWLIHZA301STds0wnHa1iInNQDfisH%do73vTiLlmOH1@INODE:mQRCONYJH‘OeYoXSNvEWSSYAW3Qo)]veaLSnNaEvSoaSyY|I£N|]TeYNYILNIWI1WSNEmwSan~rw/—D1|a!nuiwfi,%fiwWRUon137e0TfHWoLs
SO S—

3 SOM

| N ITTT

ee b

1anN3IFLlOOTNVV0I8AHOS5UdNIIOLLDINNII i WTdH0QI4qHvOL12VgvNIdQoSiDNLIEsS-ozWnoyvisga|syanaS{9-I1UmvJyS_OM—>~—J!ITWaYOLO1nNiHIvILWaNNwOODYoDIT|Ys1T07YI$2oNs1YO93D087QMY i@DDJAOHOLWNIOWD NT|oeTNARiT1BTM¢R17A1N’R|-SsTmSoI/TT1Iz.wfim3Ni GLn1A-=&=<T<| =i7NWd,%fiH1 _
130v ERTatele,] fe—IHOLS 3401S {NOILdO) 2wR
SRem

TJAIHd

]

154

CMC (MS750) BASIC DIAGRAM

3 VAX 11-750

AN
|
CMI DATA <31:00> H
i

< 1:0> L
CMI STATUS

I g
l

MEMORY

ARRAY

< INTERNAL BUS J>
v

:
i

|
i

CMIDCLOL

g
|

CONTROLLER

CMIBCLK L

|
'

CMI ACLO L

{
i

|
|

i
I

TK-4095

165

LNODONIT10HW3WDISIAD(ZHS)~%59&oRS

@GZ'g>< DNITIOHLINODWIWOAMD2D3I‘SN3O gYI0W0 Woy 9=1041NOD

oW 8v1 ON HOAD

HMZT8O9WN0D

1AIBHONIW3DWS/NI1NHAI4dHAOWIW SMvoLWONITOIDH

HD3H HNIVOW) WOH 4

v1ivQ

HS3Y43y . {ZHS) {§-£'O14) Z

”

7WILSvy

WRN
YbS

5| -

NOWD WIW 035 LX3N H

IoNDVLIVACLVE-T> 7880MONH ONNOYWDLINHIOLHSY)HTO{ZAWVDHAEdYQd )LNWSINWAVWAW73S<0:£>WOWD 0l &-¢
zWHO8Q7- JOWDILAEH<OE€>MSYW 01" HS){ZN3DHS){€ TOWDHM/QHNdDOWHD" PONITP
CMC (MS750) BLOCK DIAGRAM, PART 1

$s34¥QqQYv

156

= 1S3N03H 'N3ID
‘N3O

V31O NOILYZITVILING

vI1NvDd

HS){1

40WD

H<O'€> 31VIQIWHILNI

ONILYHINID

167

AG+

< :

YOWO

i
e
i,

WOHA

30WD5014|NOILVHINID
L H<0L>

‘N3O Ol wy 1L 8OWD
Syo/Svd

$S3HAAY | H<0:L>VH IL90WD

4315193y

{tHS)

WOod4d

LOLyAL

><1S8L00N°14EI
4W0OH4UVYIN4T0HWODLV7Y0T

CMC (MS750) BLOCK DIAGRAM, PART 2

LNgIvS

CMC (MS750) BLOCK DIAGRAM, PART 3

é/AES BITS

CHECK

STATUS
GENERATION

g:figgiyc
(FI1G. 3—23)

INT BUS DB
_RDL

(FIG. 3—19)

CMCT ERROR L

MEMORY
ERROR

CORRECTION

(FIG. 3—1)

“#|

CMI STATUS

CONTROLLING

<01:00>
L

MEMORY CYCLE

F’ SEQUENCE (SH 2)
CMCT SINGLE

{?283%Cfl3

CMI BUS

L
ERROR

32, T)YRD L _

[72]

2
=

CMCT ERROR L

DBBZ

GENERATION
(FIG. 3—20)

[E¥

<
CONTROL
STATUS
REGISTER
2

(CSR 2)

(FIG. 3—22)

CMI DBBZ L

INT BUS
ADD MEM

MEMORY

SEL<LT:0>

FROM
(F1G'"5 | CLOCK

DATA

GENERATION

FAST
CMCA
H
SPEED

2)
(SH.

CHECK BITS

TK4109

168

DPM BASIC DIAGRAM

W BUS

IRD 1

REG.
NUM

LITERAL
;

D SIZE

SCRATCH
sen

LONLIT

LONG

RSPA

R8BS

ANUM

LOGIC

SPA STATUS

TEMPS

oPR'S

‘

;

SCRATCH

BUT LOGIC

RsPA | PAD ADDR. fugpa
CONTROL

vl TEMPS

RBS

R BUS

M BUS

MUX

W BUS
FIRST LEVEL SHIFT

MUX & MASK

S BUS

)3
S BUS

ROTATOR

LOGIC
MUX

W MUX Z —j

l FIND FIRST I

[

PLATCH J

S BUS
SRK

STATUS -

SECOND
LEVEL

BUT LOGIC

R BUS

M BUS

SIGN/ZERO
EXT.

Q REG ———]

;

8 MUX

A MUX

ALP LOGIC

;

ALU

Q REG

W MUX
]

wBY

I D REG l
}

TO MEMORY

INTERFACE
{(MIC}

TO OTHER MODULES

(UBI & MIC)

TK-3076

159

olo

DPM BLOCK DIAGRAM, PART 1

RBUS

__MBUS

32 ) TEMPS | 32

OUT 7T

DPM

DATA PATH MODULE

35,
39

IPRS

OUT

SBUS

_,_,\\\\\
1

321

GPRS

IN
e

QUT >

MUX

[

FIND
FIRST

=
9

1ST

LEVEL o

MUX

QUTTE

8,
i

ROT

SHIFT fm
N

Fmeuxz

(“5

bfi;fH 71 LATCH

ROT

T
ROT

—

SPA m#—

RNUM

ROT

s
LATCH
| Mux

RSRC

MSRC

RBS

LATCH

ROT

IRD1

ROT

TK5798

160

DPM BLOCK DIAGRAM, PART 2

32
,‘{

0—- H

|
—

MEMORY
CONNECT

MUX

MODULE

301

> ALU

MUX

REG

/i/

ALP

cTL

*A/(

MiC

MUX

INTER-

cTL

TS >

ALU

MUX

UNIBUS
INTER-

SIGN
0 EXT

MBUS

ROT

,/( ‘""\

CONNECT

TM1

MUX

UBI

MUX

»«n/(

MODULE

REG

ALP

CTL

cTL

XB <15:0>

32,
rad

TK5797

161

DPM BLOCK DIAGRAM, PART 3

vd5S8v01S<<00°'11>>

| 1 1I

V1S

QWadO1

43IHLO

[eNeE ==

162

g4 Oys

S/°8L ZHW JS0

WILSAS ONINIL

99 aHd LSHMHSv TYAHILNI

06>

9MO1L HIWIL*3280H6d> SWOYXnW.Lng

NnyA“HwvSd<9°€1>0
|

¥S) <0:5>

CREIWR

GTIRGRaSD

163

RSSO

M1SOV <0'5>

GRS

L_/L

mHB-w

<9:El>

SNaM

M4y3av lHwvHwdO IoINOT 49> 3401S

TOYLNODFHOLSALIHVdHOHYI <0:6> ) SO0

gt]08 _LX3N% __
DPM BLOCK DIAGRAM, PART 4

3ITINGOW
Cweeeu

SLOSVT

| G

)
(A

MiIC BASIC DIAGRAM

WBUS

ADDRESS

CONTROL

CACHE

ADD

CACHE

PAD

MAD

BUS

‘

DATA BUS

MEMORY DATA
&
ROUTING
MDR

XB DECODE =

TK5778

164

MIC BLOCK DIAGRAM, PART 1

ADDRESS CHIP (ADD)

4 X 8 BIT SLICE

PC + SIZE

LATCH

(ADK)MKDGE—VAVAL—W}

(PRK) MIC 06 ENA PC L

MICO4 ENA PC BACKUP L

:{ bC BACKUP ]

INCREMENT

l R

c
>

MUX

‘1 , I

MUX

ASRC SEL SyH
MIC04
LATCH

{ADK) MIC0O6 BSRC SEL SyH TM1

i— MICO6 LATCH
MA L

(PRK)

\\v/’

B
D

ADDER

(PRK) MIC06 MA SELECT SyH
32
MAD <(31:00 >

Ty
TK-6925

165

AV'LE>60:GL<g 7'¢
SWvy(v) A Hvd
‘W
g

166
5

X935AN2I
L926G~

o—

61952Xv—0Ligwij
95¢ X ¥

<60:£2>0avd

4 ALigvd |*

MIC BLOCK DIAGRAM, PART 2

3
PART,
MIC BLOCK DIAGRAM

dvd

Aot

SWvd

£l

SWvY

“pg v LX3 ML e4l ZoMlHoOa 3 LX\ML
JHOVD

. 7

Q| TYA
i

167

XNIAW1381S H

(gaw)

—t

TM~

168

08X egpd

140

901N XNWY 138 HXS

LSODIWQ3IHDSYWOSW Hd()Q(OXVS)0E0IDWI8WX81X0O3d73H5XH sEx

Ho— xnw0. N HaW 10y

O] NYRAENRIINWLNEOEITY

1WO

(34v)

_V1{iMvHadS)OMR9I0L2N1ONYSCATERISRIDSARENNSCERSANOTDOucEmen)GHNENHETDURNSISeCHENIATDTSRERSITIEREREAERUEDCERNESENTECESESIDTRsngTaRENGARNISTNDRNM
Rt &

ML BIZBG

etQL IWD

MIC BLOCK DIAGRAM, PART 4

igl:Re]

aav O34

(MLO0HWSHV1DYNW)S H7%2031XS2W
(Mav)

(Aav)

[si%]

H1(39M043A7X1IY580W)S

8X01

TB FUNCTIONAL DIAGRAM

MAD<30:16>, PAD <8>

MAD <31,15:9>

TAG 1

TAGO

<30:16>

A=B

HITO

1
HIT

PAD <23:9,7:3>

MAD <31, 15:9>

PTE

GROUP O

PTE

GROUP 1

MUX Z
PAD <23:9>
TK-1872

169

CACHE FUNCTIONAL DIAGRAM

PaD <23:12

PAR

GEN

VALID

TAG

ADDR

PAD < 11:2>

1K X 14

QuUT

ouT
VALID

PAR

CHECK .

<23:12>

{

CA TAG

PAR ERR

A=B.

'————4» CA HIT
<11:2>

& ADDR

y
v

y,
/4

DATA

STORE
1K X 36

PAR
GEN

PAR

OouT

EN CACHE

CHK.

CA DATA PAR

DRIVERS

ERR

CACHE DATA
TK-3041

170

HOLY Hip10HLINODg
0138 1 L

13SL— H

S1X3INOSDG0V0}p——H30230———13§¥H 9:EL>H<7 T3S£He
anz

HO3S

HS13$

Hvd

W—Z138

TALSXIOH3Y~Nd

135 ——H

ASLIOHVE

bt— b

aHe HOHHI

S>S0O1Ga<avVZLl1—P————HHaofA)iH:V,LwINoE——E——1—138SR€$oav,AuOoolt.H TNM3S34I0H1ILYmeflw
1738 H

CCS BLOCK DIAGRAM

171

Q.05L,

HQsZa3lv HgsLaov

S$34HAO1Y9 H§-135

]

NI HO

WOy

.|agONIWILLC4|/b©

‘310N« 3SFSNdHHOiILLMdHDJ3N4INHQ0QVY34SO8A3NNT'HVISLNNVIIY1dWNdIv0OHSLAdAaHd

z89a

oL HOLV1]

/ B 3MNIQ 3MNI 3MNIQ

RE3E1v9%4H3300003300bVovfozSSYO3MIAIH4TIyoz
oz 0z 0z 0z

0Le1N823179907YNT / 0z /
\.

3L1YMm

HAD

172

1960Z-M

X -X X O XNW 1SOM

WCS (KU750) BLOCK DIAGRAM

0oz’

309230

KISR8GEAJSTIHNindslJdSHWiL0y{TLo471Y|ingS[JHsH11toFTHLOA{sne{
f ]

iRPfIlLdRItEiLBtdRebIi:dL&|E!LGbl|{HiL94ZHL%Y£€£Z[0L1{|i|IL981||}699[99SQ€1|{}:}Iif[XW[9%yni3lil09ZN=&n¥1sIH490B|AaP|G6U1Lt1GLI#+}}|i[[HN8GPOXG9DHOWIGDTG%W+|{ |||2 |iS€aBGZnoUTnTdyaSI1vySYdI06T+I1f{f|e6¥g0eSaPLMtlI1lO+H|i|}|i{8®US»9#&S83Y¥+]&€¥T1|iZ%aA4€61P[+iLIf%0€8¥Ed€LT€9HfE€sLiIrN€Ztd1AiI€EgBRlI+||EYoIE0RIi{ft+}§{1€JSI28W6OT8DY4ZLE0NZ6Td9vTd+§]{§bi}{ |I {1 |T€%T22T'1€0+{i||{L
|

o
—

b ++

fLiITONOT

fT6It8TLT€TiI|1uT9lIilTN6I}iT9>4T6PT0IB67I01B6A20B0Y0LOgl90<C=6O0%CTE€EZ061T0|

CCS/WCS MICROWORD

i]!riol

|}]i

173

xnw|i|XNW—.TOHLNODTOHLNOD|_
XNXNWTHLO|dYWNASI

HIND$S3IYAY/VLVA 8)‘A1DDX‘284"LIVM'QTOH($8SY3HAQYSNsHAHQ/SHADH|“

IHaNOILqVHLIyGHY/TOHINOD 4WNDgv=ivd oLvsYnig'vina
H
vB

18N QHOMOYDIN

ss3”AqAy

dVI

UBI BLOCK DIAGRAM

(NdO)

NJOHNL1S —_—e

SHLVd

174

gI4VvN/7Dd1

91 Gl

Qo _o o

L(3.S£MQH2IH'04O2.04)0

SNEgIN SY1V3aHdASYHVASDHXA=DXAJ=HAJH

et ce

e
t
¢
l
0
l
6
o—8 fLo 9o=G ¥[T|€aeofsf0¢ o
({vI(0NDNNv4D1)Ai0)4Svd(gWa()4)g41nV)0vd3y34sngnigSnNNEVng1ISvNVId3AdDVH14iLHNaHvVOOI3daI1vALSTTVVOOYISNHHLLIOINNgOOAdDYSD
(LNg) HONVHEH3AN 1531

r(LX3N) LX3NS§S3HAVwvroo~o~

H3IMOd. . dN30 D 4002’20d343d4 N8 IND
UBlI MICROWORD

8M.0LG

_
-

175

$S34Aqv

XINDSS34Aadv/viva 49)"M1N0'Zsg49—d"LIvm'A70H(s8NHgVINN
Haav

$HsA3¥DaXv

dVYW

vn%

NON

NOILVHLI18HV/TOHLNOD
TM|| aJJnHOsOYLISNOD _| 43DNINDISOYDIW
SUB (DW750) BLOCK DIAGRAM

0 'LD

TOYLNOD

SNv1gviaNnSH1Vd gj Ai

176

-DSW

gI4dvN/1dO10

N3}LS(1Y31dVYNI|j<.rm

SNEIN V.LVvA SHADX= AJYH

SNGIN SSZHAAVSHADX=AJH

T((v(I({00NLNvNLdD1AXin)A4)4Sg3vaS(d)a8NW())1d)}g4adn1V)0vd3d34SNngIgsnN1gVNHLaYXO4i1S30NNvNIn8Vd3NOHVDLHHYY1HALNJHOVVO3IHFddaVILWA3LSVTATJTVSVONOOOIYHSHNHY3YLLLLHO1IINONASNENOOAO3HOADDVD1VSSD 4AN glGl elZL 0l68L99v€Z 0

H_wooPofi;omoLo_o_o;oo_ooT
S [t e

ee c
SUB MICROWORD

177

UDP DATA FLOW BLOCK DIAGRAM

HOLVI
-

ii uve | XN

T!_—
|

dNOD

HAAY lea—

WO4Nnd | vivaiwo

*
%

HHYOY OLVTa2 L[ 3
T
b

4ag

<0an:§gLan>

e o o o

o o

e o oen

o o o

178

<aN‘—HOdIbNL)VLZ‘VID>~TdVN<I‘OL<VItNHIE‘:OL1H0EV>)'‘<0p7D0E?:£{L9I8N>IMOVS(HL0N1I8'A1aS0nEVEs3yav

m:m_z:vA._Om.rzoi@wVanN7v4i1v0a00'LtZ0_L+<zoici>vnoni|wawA
HAOXLIA@—Xs/yAD<8Y4godn:sian>
N)VgIniV(aV1va

43aav

VN 11O

e<=+“VN1iODv)IQL‘a0VDYHIL‘84IdSG‘NHvYVdHd‘LNNAOdSHNWOO(YNOAS
HADX — 4<NZ8OIVN:DL<VZ>O:L > 18N <ZO-: VN:LLVYN>
UBI INTERFACE TO FIRST UNIBUS LINES

6L8E-ML

Amr:mm_zo:,vq vAYivasngiNn

179

SUB INTERFACE TO SECOND UNIBUS LINES

IPEC

s DATA TRANSFER GROUP
(C1, CO, PB, PA, MSYN, SSYN)

<e—& ARBITRATION GROUP

UNIBUS CONTROL

(NPR, NPG, <BR7:BR4>, <BG7:BG4>, SACK, BBSY, INTR)

La— INITIALIZATION (ACLO, DCLO, INIT)

—

UNIBUS ADDRESS

<A17:A02> r

XCVRS le— BUF CMI <17:02>
a—s <AT:AD>

t— UACTRL 1,0

ADDER

INC UA <17:02>
UACTRL O

|
v

UB ADDRESS
UBI <UA17:UA02>

l
UNIBUS DATA

XCVRS e— UB DATA

<UD15:UD0OC>

t UB DATA 1,0

(RCV/XMIT UB DATA)

mmmmmm-flmm—mmmmm
TK-8017

180

MBA (RH750) BLOCK DIAGRAM, PART 1

BUS

/" "MBUS CTRL MXCVR }e
SILO DATA
N\X

[
*

sicom
wmsus

][

L —»-CMIBC
=1

BYTE

|+ MB BC =-1 (OR -2)

&
ADDR

ADD JMPR’S
WRITE
CHECK

comP
MDP

REG'STM

TM|

LATCHED ADD

ADD OK

.
& CMI FUN

IH——o—-o—-—
|]}—<>—<>—-

{

—
MBUSDATA

ADDR

R SEL

——& WCK DIF

PAR

SHARED

GEN

PARITY

PAR

TK-6410

181

MBA (RH750) BLOCK DIAGRAM, PART 2

1BUS

MSC

cNTR|

|sm

|cNTR|

MAINT

| REGBITS

STATUS
REG BITS

SILO/DATA
PARITY

PAR

DPA
DRVRS

CMI

DATA

<31:28>

TK-6413

MDC

LATCHED
]

VALIDITY

VAR <8:2>

DATA BUS

"l REG BITS
MAINT

256 X 17
§%

<8:2>

RUN

| EgL

BUS PARITY

—-CPA

CONTROL

STATUS

MAP PARITY

REGBITS|

|AND VALIDITY

VALIDITY

ADD

—e

CONTROL

[

PARITY

MAP

ROTATE

TK-6414

182

MBA (RH750) BLOCK DIAGRAM, PART 3

IBUS

MRC

| STATUS

REG BITS

|of MAINT

REG BITS
INT

—1

REG

CTRL
3

MCI

]

STATUS

CMD

REG BITS

DECODE

powera [T P¢LO

CONTROL

TIMECNTR

EXT

MAINT

REG

REG BITS

CTRL

INTERRUPT
ARB & CTRL

cmi

CMI FUN—

CONTROL

LATCHED ADD—
TRA

CTOD

» FAIL

SLAVE

REG BITS

ouT

& (NIT

INITIALIZE

M
e 1)

HOLD <

5 BR

DBBZ «—

STATUS <
CMI ARB <—

CMI DATA <27:25> <
WAIT =

MAINT REG
MB CTRL

BUFFER

MAINT REG
MB CTRL

R/O BUF

MASSBUS — CONTROL BUS &
DATA BUS CONTROL SIGNALS
TK-6415

183

<oLie> <0:G1>91aW

Mmav/and

<0:51>908D

<7:8>

7 <]1IN0<0:61>08 1A] g08<olile>

JLAH

—<0 :1£>80 8

/TNDH<00:LE>Y1I0V3Ayg . <00-:G1>.
§

w <00:LE>N\ [
MDP DATA FLOW BLOCK DIAGRAM

<0:LE>

184

HAD 234

<0 :Le>

(HD10gzI<-i=43N-e8—{90d1D4)J1L3<0N:D51>

FPA (FP750) BASIC DIAGRAM

BLL-AL
vivad 21907
T ———————

TOHLNOD

JOV4HI3LNI

*LNO0D4

ONINL TOHLINGD
O

L W

H{d!
ra—fib -

SOLVLS

B
|
|
I
E
B
|
|
i

M
vd

“gHomod

TOdLINOD
I401LS

h—j?-nj!: JL‘L—HJL [EEI— N e eY .nuL |more v s

mmmijbmhmmL

1
!

185

SOHLO<M0:G>TdTRmmflumorm
nmgAHLINgI—oPRm[E—AN03T790YHRNLINOHD1Hivd8D<—0'6L>NOILIAONODm1NISTHd

|rXfi1l0nlWnl.3i.Tm8lYNIKa—JOHLIoNO8DHmdLYHo1NviivlaJSHLvHOdLvHINID fimom JeRSISDfl.
Snivis e<0:1E> NOILDVH4 8y%1100ae=— 1dvd440S34

13108 H318VN33q0| Tdvyl

bML@1Z1S0O0m1WmH°N<w2SDO0wLF:R>6N0E3HEmq>15VaDvgYN40adCyHDEdR3HIEReNTOTye2HR1L9O1N0N1OIHDN1IILNODTTS!O0]2TCe.@IRUY—RALLESNO32IOROQN10NDdA9ADSS0€I7/3I32S0SDVVHHTddT|iOT0L7HH<1NHIL1NIyNO0OvDism|n2H31J9—07NHL—DII—DSoNIoNDSINS1OYeH1OSIN8WN—LE>L<SS8NNOL7H<lV0Y:-LH]m/Tf-B imuv—-|a3NSf<A0i1i0mv:iIo8S00>1X v1ivad@<Hv0d14md:IT6VO01U'5LS0I'N9O0D><LovVa417
|

1
I

| |i 907 H<00:50>H0VSD

FPA (FP750) BLOCK DIAGRAM

aflmqfi@.-‘_l

HLvd

TV1GS7IaNH-5AOE4L1NWYI<NOIXS |dNWTH-1I0vi1H3s8nVNT

ISrT.sESASLERL

186

3H18vN3

N[R:[T-

TU58 DRIVE/CARTRIDGE DIAGRAM

DRIVE PUCK

HEAD

2-MICRO-

SWITCHES

SWING-OUT

DRIVE ROLLER

HEAD GATE

PROTECT/J ]

WRITE

TAB

MAG.

""" TAPE

SUPPLY HUB

TAPE CARTRIDGE
ELASTOMER
BELT
TK-2040

TUS58 CASSETTE TAPE BLOCK LOCATIONS

GOT #2656 | #384 | #257 | #385 | #258 | #386 |#259 (#38? #510 | #383 | #5611 EOTS

bBOT #0 | #1281 #1 | #129 | #2 | #130 #35 Y#126 #254 | #127 |#255 EOT’
TK-2080

187

TU58 BLOCK DIAGRAM

1O=SH

9S63¢c1A8 ASL31A€ 1HvN

H40S30Hd

SLOE-ML

J9Y

avay

SOHINAIHYA

OS1/401d

vJAIHG

]

FAL-3IDAO-ITHI=AG os—~rf=i-fiJ M.HwOLOW“

123738

:-H3IAIHG|!gHOVLANV

311dM
35vH3 ONY319071
HITTOHLNOD
ENLEREEERY

|HOLROWbe mlvN WVd WOHY

Av3d
40103134

Ha30N0V3d

HIAIHC

188

— < ganl

| tEvn V0 T

SNdEDM

IAIHG

189

5808

HOLYW | HOLVI WvHS0 s34
—

HND

RDM BLOCK DIAGRAM

CMI, UNIBUS, AND MASSBUS

CMi PHYSICAL ADDRESS MAP

Efi?%??

8gg£g:

256 KB (1 MB) *

100000
1FFFFF

040000
O7FFFF

512 KB (2 MB)

080000
OBFFFF

768 KB (3 MB)

300000 ~ 0CO000
FFFFF
3FFFFF

1024 KB (4 MB)

200000
2FFFFF

400000
SO0
500000

100000
13FFFF

1280 KB (5 MB)

140000

1536 KB (6 MB)

SO0TEE

17FFFF

600000
6FFFFF

1BFFFF

7JFFFFF

1FFFFF

700000

1892< KB (7 MB)

180000

2048 KB (8 MB)

1C0000

FO0000

} 1 ARRAY BOARD

ARRAYS
MAXIMUM FULLY POPULATED

10 KB USER CONTROL STORE

F20004

MEMORY CONTROL/STATUS REG. 1

F20008

MEMORY CONTROL/STATUS REG. 2

‘

/0 SPACE

rsosnc | TST UNIBUSIDATA
PATH CONTROL & STATUS
FFC):’;((;:(F)([Z

1ST UNIBUS/MAP REGISTERS

F32000-C

2ND UNIBUS/DATA PATH CONTROL & STATUS

F3§§gg |

2ND UNIBUS/MAP REGISTERS

FBFFFF

*OND UNIBUS/MEMORY SPACE 131 KW

1ST UNIBUS/MEMORY SPACE 131 KW
TK-5814

* USING L0016 CONTROLLER

193

CMI ADDRESS AND DATA FORMAT

CMI ADDRESS FORMAT

28 27

020100

2524 23

N
BYTE MASK
FUNCTION

PHYSICAL LONGWORD

__J
ADDRESS

CODE
TK-3875

CMI BYTE MASK AND FUNCTION BITS
Vvalid

Byte Mask

Byte(s)

Bit <31>
Bit <38>
Bit <29>

Byte 3 valid
Byte 2 valid
Byte 1 valid

Bit

Bit <28>

for Transfer

Byte @ valid

Function Bit

CMI Operation

¢
g
Y
Y

o
Y
1

0
1
o

Read
Read lock
Read modify
(Undefined)

1
1
1
1

7
@
1
1

)
1
@
1

Write
Write unlock
Write vector
(Undefined)

CMI DATA FORMAT

BYTE 3

BYTE 1

BYTE 2

08107

16115

24123

BYTE O
TK-3876

194

CMI SIGNAL DESCRIPTION

Signal

Lines

Timing

Group

CLK

Description

B CLK L is generated by the CPU to synchronize

all

system

activities.

One B CLK cycle
. to the next.
the

Control/Address
CMI

and

is from one rising edge of B CLK
B CLK L is low for one-third of

cycle.

Group

Data

The CMI data lines are first asserted by a
device that has arbitrated for the CMI and

DATA

<31:00>

control

assumed

The

as master.

transmits control and address

slave

CMI address

the

new master

information to the

format,

and

asserts

Data is then transDBBZ for one B CLK cycle.
ferred on the lines in the CMI data format.

Bits <@1:00> of the CMI address are ignored
since four bytes (one longword) of data are

presented on the lines and the valid data 1is
selected

the

byte

re-

mask.

NOTE

1
CMI DATA signals are asserted on a logical
All other CMI
+3.5 V (high).
nominal
a
at
ground
nominal
a
at
asserted
signals are
(low)
.

Data Bus Busy
(DBBZ)

DBBZ is first asserted by the master for one B
CLK cycle while it places the CMI address of the

slave on the CMI data lines.

DBBZ

is then

asserted by the slave until the data transfer is

complete.
respond,

HOLD

If the slave

it may not

assert

immediately ready to

DBBZ.

HOLD is used to temporarily block all CMI arbit-

Cache, for example, requires extra B
ration.
(Cache
CLK cycles to perform an invalidation.

is not part of the DMA transaction and does not

assert
WAIT

DBBZ.)

WAIT is asserted by a CMI subsystem to initiate
It is held until the
a processor interrupt.
write vector operation

1956

is performed.

CMI SIGNAL DESCIRPTION (CONT)

Signal

Lines

Priority

Description

Arbitration Group

<ARB7:ARB1>

An ARB level is assigned to each subsystem and
If HOLD or
is used to gain control of the CMI.
a higher priority level is not asserted when a
subsystem asserts its own, the subsystem
assumes control of the CMI, asserting DBBZ and
CMI

the

address

subsystem.

slave

If HOLD or a higher priority level is asserted,
the subsystem asserts its own priority bit to

hold off subsystems of lower priority until it
Priority on the CMI is assigned
gains control.
as

follows:

ARB7

RDM - highest

ARB6

Reserved
Reserved

ARBS5
ARB4

UBI

ARB3

MBAQg

ARB2
ARB1

MBAl
MBA2

CPU

Status

STATUS
<l:8>

priority

S5SUB

(with SUB)
(with SUB)
priority (does

or MBA@
or MBAl
- lowest
assert

ARB

not

level)

Group

Status

is transmitted by a slave to

the condition under which it returns
Status bit combinations
the master.
encoded

Status

Bit

tried

NXM - The master
existent

UCE - Read

memory

data

the

ERR - The

196

access non-

space

returned

CRD - Corrected

read

data.

carried

data
are

follows:

write

]

indicate

the master

uncorrectable

read

data

error.

was

returned

errors.

master.

read

data

had

VAX-11/750 BACKPLANE

CMI SIGNAL PIN ASSIGNMENTS ON OPTION SLOTS

BLOCK

A6
A8

AlQ
+2.5

Al2

Al4

Al6
Al8
A20

A22

GND

A24

GND

A26
A28
A30

A32
A34
A36

A38

A4Q

SLOT

SEL

GND

A42

SLOT

A4
4

GND

SEL

Ad6
+2.5

A48
A5¢

A52

GND

SLOT

SEL

A54

SLOT

CMI

ARB

A56

[A]

A58

A6Q

ARB

[A]

A62

CMI

ARB

OUT

[A]

ARB

OUT

CMI

ARB

[A]

A6
4

+2.5

A6
6

CMI

BG4

[A]

A68

UBUS

BG4

[A+1]

UBUS

BGS

[A]

BGS5

[A+1]

UBUS

BG6

[A]

BG6

[A+1]

CMI

UBUS

ARB

A70@

UBUS

GND

A72

GND

A74

UBUS

A76

H
L

A78

UBUS

BG7

[A+1]

UBUS

BRS5

UBUS

BR7

BG7

[A]

UBUS

BR4

A82

+2.5

A84

CMI

ARB

CMI

ARB

AB86

CMI

ARB

CMI

ARB

A88

CMI

ARB

CMI

ARB

A90

CMI

ARB

-15

A92

CMI

HOLD

AS4

-5

UBUS

CMI

BR6

WAIT

197

L
L

ARB

GND

VAX-11/750 BACKPLANE (CONT)

CMI SIGNAL PIN ASSIGNMENTS ON OPTION SLOTS (CONT)
CMI DATA @ H
CMI DATA 1 H
CMI DATA 3 H
CMI DATA 5 H
CMI DATA 7 H

BLOCK B

CMI
CMI
CMI
CMI
CMI

DATA
DATA

Bl14
B16
B18

CMI
CMI
CMI

+5
CMI

DATA

B23

B24

GND

H
H

B25
B27

B26
B28

CMI
CMI

DATA
DATA

20
22

H
H

+2.5

B29

B30

CMI

DATA

DATA
DATA

27
29

B19
B21

19
21

H
H

B31
B33
B35
B37
B39
B41l

B12

B32
B34
B36
B38
B4Q
B42

CMI
CMI
CMI
+5
CMI
CMI

DATA 11 H
DATA 13 H
DATA 15 H

STATUS
DBBZ L

B43

B44

GND

B45

B46

+2.5

B47

B48

DW758

+2.5

B49

B50

GND

B51

B52

GND

B53

B54

CLK

AVAILABLE

B56

B57

B58

B59

B6
O

B61

B62

B63

B64

B65
B67

B66
B68

B69

B70

B71

B72

B73

B74

B75

B76

B77

B78

B79

B8@

B81

B8
2

B83

H
H
H
H

B29¢
B22

H
H

16
17

B55

BUS

2
4
6
8

DATA 9

GND

B13
B15
B17

DATA
DATA
DATA
DATA

CMI

CMI DATA 24
CMI DATA 26
CMI DATA 28
CMI DATA 390
CMI DATA 31
CMI STATUS 1
bDpM17

+12
CMI
CMI
CMI
CMI

Bl1l

GND

CMI
CMI

B2
B4
B6
B8
B1@

+2.5

DATA 10 H
DATA 12 H
DATA 14 H
DATA
DATA

Bl
B3
B5
B7
B9

B84

B85

B86

B87

B88

B89

B9
0O

B91

B9 2

GND

B9 3

B94

-5

198

H
H

VAX-11/750 BACKPLANE (CONT)

CMI SIGNAL PIN ASSIGNMENTS ON OPTION SLOTS (CONT)

BLOCK

DW750

Cé6

Cc9

Clo

Cll

Cl2

Cl3

Cl4

Cl5

+12

Cl6

Cl7

C18

Cl9

C20

Cc21

C22

C23

C24

C25

C26

c27

C28

C29

C30

C31

C32

C33

C34

C35

C36

C37

C38

C39

C4a

C41l
C43
C45
Cc47

C42
C44
C46
C48

+2.5

C49

C50

GND

C51
C53

C52

GND

C55

C56

GND

UNIBUS ACLO

+2.5

C58

C59

Coed

Cé62
ce4

C66
C68

C69

C70

C71

C72
C74

C73
C75

C76

C77
C79

Cc78
C89

C81

C82

C83

c84
C86

C85

UNIBUS DCLO L

C54

C57

Cé1l
C63
Cé65
ce7

c87
Cc89
C9a1

C93

GND
GND
+5
UNIBUS

Cc88

C90
C92

C94

199

GND

-5

INIT

VAX-11/750 BACKPLANE (CONT)

BUS GRANT CHAIN AND CONTINUITY JUMPERS
<BG7:BG4> ORIGINATE FROM
THE UBI ARBITRATOR
B

BG7

BG6

BGH

BG4

hmmm

SuB

‘

iSLQT 7
cri1

THIS SHOWS THE PRIORITY
IN WHICH A BUS GRANT MAY
BE CAPTURED BY THE SUB

OR PASSED TO THE REST OF
THE SYSTEM WHEN THE SUB

|ACLOI
& ACIE

IS INSTALLED IN SLOT 7.

CR1

BR7 | BR6 | BR5 | BR4

CR2

BR7

BR6

BR5

BR4

SECOND
UNIBUS

SLOT 8 [

<BR7:BR4>

SLOT 9 r

<BR7:BR4>

FIRST
UNIBUS
[

.
~
<BR7:BR4>

]
TK-8106

200

VAX-11/750 BACKPLANE (CONT)

BUS GRANT CHAIN AND CONTINUITY JUMPERS (CONT)
Each

the

arbitration
jumpers

must

All of the
empty slot.
or

MBA

three

backplane

SUB at

for

the

added.

option

slots

ARB3 when

level

hard-wired

installed

set

and

CMI

following continuity jumpers must be in place on an
They must all be removed from the slot when the SUB
installed.

Bus

Remove

Grant

Level

Jumpers

BG7
BG6

A77
A73
A69
A67

BG5
BG4

to
to
to
to

All

A7S8
AT74
A70
A68

CAUTION

for
unpacked
is
SUB
the
Before
DW780
the
to
refer
installation,
installation procedure that specifies
the use of a VELOSTAT* mat and ground
cord to prevent static discharge damage.
Grounding must
fastener
snap

first be made between a
the mat and a good
on

Connection is
ground on the system.
then made from a wrist strap worn by the
installer to an alligator clip that is
fastened

the mat.

The

box

placed

same

potential

the

CPU.

VELOSTAT

mat

The module is then removed
and opened.
from the box, the protective covering
removed, and the module laid flat on the
This brings it to the
VELOSTAT mat.
as

With the wrist strap still in place, the
LEP1l¢ module is plugged into slot 7 to
make cabling easier, and to place the
second UNIBUS at first priority in the
bus

*VELOSTAT is a

grant chain.

trademark of

the

3M Company.

201

VAX-11/750 BACKPLANE (CONT)

MBA INSTALLATION JUMPERS

MBA JUMPERS AT SECTION A OF
SLOTS 7,8, & 9- EXTENDED HEX

———a SLOW CMI EN H

TRANSFER RATE
DECREASES WHEN

JUMPER IS REMOVED

+52

e BOTH JUMPERS INSTALLED, SELECTS MBA 0. (ADDRESS F28000)

MBA SELECT 1 } e MBA SELECT 0 ONLY SELECTS MBA 1. (ADDRESS F2A000)

o MBASELECTO

® MBA SELECT 1 ONLY SELECTS MBA 2. (ADDRESS F2C000)

+
N

® JUMPERS INSTALLED FOR CMI ARBITRATION LEVEL 1

JUMPER INSTALLATION FOR

/ CMI ARBITRATION FOR LEVEL 2

+
62

| +| +
JUMPER INSTALLATION FOR o——

CMI ARBITRATION LEVEL 3

TK-6431

202

VAX-11/750 BACKPLANE (CONT)

MBA INSTALLATION JUMPERS (CONT)
MBA Select Jumpers

To Select MBA
As

Follows

Install These

Jumpers

A53 to AS51

MBA @

to AS2

A54

MBA 1

A53 to AS1

MBA 2

A54 to A5S2

(A54

(A53

SLOW CMI Jumper

(Gnd)

removed)

A45 to A43 (Gnd) normally in place.

Removing this jumper reduces the
rate at which the SILO is loaded
and unloaded on the CMI before RUN
is set and after it is cleared

MBA CMI Arbitration Jumpers
To Select

For

Install These

MBA

Jumpers

ARB 3

MBA @

A64 to AG2 (MBA ARB to CMI ARB <3>)

ARB 2

MBA 1

ARB 1

MBA 2

ARB

Level

A64 to A63 (MBA ARB to CMI ARB <2>)

A62 to A6@

(CMI ARB <3>

A64 to A66 (MBA ARB to CMI ARB <1>)

A63 to A61
A62 to A68

(CMI ARB <2> IN)
(CMI ARB <3> IN)

MBA Interrupt Priority Plug

To Set MBA at

Use Priority Plug

7
6

54-08782~-00
54-08780-00

54-08776-00

BR Priority Level

IN)

part Number

54-08778-00%

*standard BR level plug, supplied

203

VAX-11/750 BACKPLANE (CONT)

RESERVED ARBITRATION JUMPERS

OPTION SLOT JUMPERS, SECTION A OF
EXTENDED HEX SLOTS 7,8, &9

e JUMPER INSTALLED FOR CMI ARBITRATION LEVEL 5
+o|

tor

Yes

tse

+59

_ JUMPER INSTALLED FOR

6
" CM! ARBITRATION LEVEL

¢ REMOVING TlS JUMPER SELECTS BG4
¢ REMOVING THIS JUMPER SELECTS BGbH

¢ REMOVING THIS JUMPER SELECTS BG6

e REMOVING THIS JUMPER SELECTS BG7

TK-5762

204

VAX-11/750 BACKPLANE (CONT)

MODULE BLOCK LAYOUT

q0% = |P. Are

rEv Fond

BACKPLANE, REARVIEW

Ale

®AT

| 94pins

°B1

‘

a(Cl

B2e

C2e

D2 e

EZ2 e

e F1
® H1

2f3 45 6

23 456

SLOTS

789
al

89
192 34567
1A

15348

JTTTTTT

AT
T
A

rena

O
T

C
F

L Lo b

Geeee
e

?; e E% o

36 PINS

| G,1,0,QW,X,Y,Z NOT USED

% s § UK
@f’*?;u“ &

ROW—

NOT USED

UNIBUS

SLOTS

89101

36 PINS

G,I,0,QW,X,Y.2

HZ @

HEX

|/ EXTENDED HEX

|/ SLOTS

F2e

TK-4722

A | GO0 - lLep FHEE

i*‘”} v i5 fiffi’}

m% § g; - wfiT i Wfim ¢ fii#’?} |
%« y i; B mv
NI

T N
N

205

é"&\ ey »

5 1 N Sy ¥

VAX-11/750 BACKPLANE (CONT)

MODULE PIN BREAKOQUTS

A
B

E
®

z ©©©©© ®©® e

%ZaACcwSviED>

@
K

T L x Q.

e
89

® 90

e
91

@ 92

e
g3

® 94

v O o) T

) pd @

8]
[8

v @] ) T

EXTENDED HEX

PIN BREAKOUT

TK-3213

206

VAX-11/750 BACKPLANE (CONT)

CPU BACKPLANE FROM PIN SIDE

POWER REF

{ o

li i -

J3-

—J1

+15

—15 +5B

+12

GND -6B

EGNDGND+SB]
B

OPTION SLOT BUS GRANTS

REMOVE JUMPER

TO SELECT

PANEL

BG5S

A0DX
AOOX

67
69

BG 6

ADDX

BG 7

AOOX

BG 4

E;fi

CONTROL

X=SLOT 7.8.9

—50]
"I_'l

e|
TEST POINTS

[

o
1

BUS GRANT
JUMPERS

|—

:GOI

‘

BOI

—
TUL8

HARDWARE REV LEVEL

RDM ABSENT

S|t

—w]

RDM PRESENT

prad

TUb8

5
og

—

—4/
ROM ABSENT

RDM PRESENT——Z’

CONSOLE

ARDMMODEM

2 5V INPUT

o
==
B

]

B00454

—— 2]

1 /9]

[ [ ——"40]

VEDENEE D WSS b SRS

B00453
BO0450

800449

BO0448

800446

— ] 1

EER

C
!\25VSENSE

2
4

CONSOLE BAUD RATE

—1 1 /= 9]

——JCcl[do?}

{

—

~| F

te)

L—é

BO0455

—

CON BR

300

1200
2400
3600
4800

1
0
1
1

1
0
0
1

1
0
0
0

600

50'

9600

] 60}

38400

———"70]

RATE

19200

PIN #

1
1

D
0

0
0
1
1
1

1
1

CO0B45 | CO0646 | CO0649 | COO650

JUMPER | 00643 | CO0B44 | CO0651 | CO0652
TO GND

—— %]

BO0456

—— 1

PIN #

90]
"

—

SIGNAL

[

(SYS ID)
BIT

— ] 0]

C00681
C00673
C00675
B00205
A00273
B00209
B00210
AD0590

20|

POWER

E@,_

19
23
23
17
17
17
04
17

—)

—

RDM
RDM
RDM
DPM
DPM
DPM
MIC
DPM

OPTION SLOTS

321

Ja—

J5—
TK-4512

207

VAX-11/750 BACKPLANE (CONT)

BACKPLANE CONNECTOR HOUSING INSTALLATION DIAGRAM
VAX-11/750 BACKPLANE
80OR 9 PINS

SLOT 7,

Azsiil
S
I

BACKPLANE

g 51

HOUSING

CONNECTOR FOR

OPTION

CABLE

ASSEMBLY
(NOTE THE

(

NOTCH LOCATION)

.
-

”

|lillgats

03—

1\Ffi/2..

441
|
||
I
NeA

43 _
c

51T

Io |

93-+==94TK-9659

208

UBI AND SUB PHYSICAL ADDRESS SPACE

| CMI DATA LONGWORDI

UNUSED

"] F30004

F30008

CSR3

F3000C
F30010

UBI

(FIRST

{ F30000

CSR1

UNUSED

UNIBUS)

F307EC
F30800

MAP

F30FFC
F31000

UNUSED
UNUSED

F32000

CSR

F32004

CSR2

F32008

csra

F3200C
F32010

SUB

(SECOND =

F31FFC

UNUSED

UNIBUS)

F307FC

F32800

MAP

F32FFC
F33000

UNUSED

Fa3FEC

TK-8018

209

FIRST AND SECOND UNIBUS REGISTER SUMMARY

UBI

SUB

Address

Name

Description/Comments

F30004

F32004

CSR

for

BDP

F30008

F32008

CSR

F3¢80C

F3200C

CSR

CSR
CSR

for
for

BDP
BDP

2
3

F30800

F32800

MAP

)]

F30804

F32804

MAP

F30808

F32808

MAP

F30880C

F3286C

MAP

gcC

F30819

F32810

MAP

F39814

F32814

MAP

F30818

F32818

MAP

F3p81C

F3281C

MAP

F30820

F32820

MAP

[

Physical
The

512

address

base

MAP addresses

are

accessed in increments of
four through the range of
80@9~-FCC

.
(hex)

The desired MAP address may
be obtained by adding the
MAP register number to the
physical base address.

F30FFQ

F32FF0

MAP

7FQ

F30FF4

F32FF4

MAP

7F4

F30FF8

F32FF8

MAP

7F8

F30FFC

F32FFC

MAP

7FC

FCO000

F8O000

UNIBUS
®

Physical base address
UNIBUS I/0 devices.

for

The

a device

CMI address of

is obtained by converting
the octal device address to

hexadecimal
&

FFFFFC

FBFFFC

UNIBUS

FFF460

FBF460

UET/IPEC

FFF462

FBF462

FFF464

FBF464

FFF466

FBF466

the

physical

adding

base

address.

UB address register
UB data register
UET-CR,

UET/IPEC

and

IPEC-CRI

IPEC-CR2, UET PROM*
data register option

*UET UB address <11:009> are loaded with the PROM address.
Reading the PROM data register then returns PROM data <§7:08>.

210

FIXED DEVICE ADDRESS AND VECTOR ASSIGNMENTS

devices

may

(ACP

through

776770

ADF1l1

770460
770400

AFC11

772570

AR11

770400

BDV11-CSR

777520

BDvV11-LTC

777546

BDV11-ROM

773000

BM792~-YA

773000

BM792-YB

773160

BM792~-YC

773200

Vector

No.

Base

Size

Comments

140

1st unit
4 extra units
1 unit

BM792-YH

773300

BM873-YA

773000

128

BM873-YB/YC

773000

256

BMV11

772150

CD/CM/CR11

777160
764070

CMR11

ol
B

BXV1l

CSR11

764000

CSS/User

764000

UDA class
UDA class

C8S

device

CsS

device

260

777546
777560

DL11-W

776500

DM11-BB/BA

778500

DM11

775000

DN11-AA

775200

DN11-DA

775200

Y
e
AL S

console

S I o

776500

DLV11-J
DL11-W

1 16
31

4
260

775610
776500

1st

LTC

- console

> NN~ Rt~

775610

DLV11-E

760

16
16
16

[l S

777560

776580

DL11-C/D/E

DL11-W

230
170
270

DIP11

DLV11-F

154

777360
760000

DL/DLV11-A/B
DL/DLV11-A/B

134

774000

DC14-D

Diagnostics

Units/

400

114

CPU

DC1l1

130

ot b

AD@1

ADV11-A

Vector

776750
776400
770440

Address
Size

b b

(1)

addresses

vector

AAl1l
AAV11

assigned

1FC hexadecimal).

Base

Address

addresses

vector

b ot et ot bt bt pd pd et

UNIBUS

occupy

@BC hexadecimal).

octal

Device

AAll

normally

through

et -

UNIBUS
774

(028

Floating
through

devices

octal

UNIBUS
274

e T ¢ o]

through

Wi
w Wt LB UV IR e ¢ VLS (G 0 o Qi - QI S
BN
N
o)

Assigned

211

- control

FIXED DEVICE ADDRESS AND VECTOR ASSIGNMENTS (CONT)

UNIBUS

Address

Vector

Device

Base

Size

Base

Size

&
R

764120

DS11

775400

DT11

777420

DV11

775000

DX11

776200

Address

Floating

300
300

772000

IBV11

760150

ICR/ICS11

771800

IP11/1IP300

771000

KE1l1l

77730680

KG11

770700

KL11

776500

KL11

777560

KPV1l

777546

KT11

772200

KT11-SR3

772516

o
e

244

S R

GT49

420

St s S e o B
DI VO
o U
O O

Exception

234
234

069

iR ® A N aadi >
=N

772160

FP1ll

error

777540

764004

LP/LS/LV11
LP/LS/LV11
LP/LS/LV11

764014

LP/LS/LV11
LP/LS/LV11
LP/LS/LV11

764044

LP28

(1)

775400

LP20

(2)

764054

764064

200

170
174
270
274

200

210

770460
770400

[#))

LPS11

*Descending

764034

LPAl11-K

764024

200

assignments

212

777514
777514

LAV11/LPV11
LP/LS/LV11
LP/LS/LV11

104

440

772400
770420

KW11l-W

KWV11l-A

100

BRI DD NDN BN BN RO

772540

KW1l1l-P

(U5 TN

777546

449

KW11-A
KW1l1l-L

KU1l16-AA

o8]

124

Vectors

Floating

FPP/FIS

760010

124

760100

DZ11

_16*

= N o~ N

767750
772410

DRV11-J

) WS o J

DRV11-B

DRV11

._.32*

(2)

DR11-B

772410
772430

Units/

(o2 3o

(1)

L bt

DR11-B

Comments

767600

774400

DP11

DR11-A/C

No.

console

LTC

FIXED DEVICE ADDRESS AND VECTOR ASSIGNMENTS (CONT)

UNIBUS

Address

Vector

No.

Device

Base

Size

Base

Size

Comments

M792

773000

M7930

777510

4
256

M9301-XX

765000

M9301-XX

773000

256

ML11

776400
772100

MM11

773100

7730080

256

772100

NCV1l

772760

0OST

772500

PA611-R

772600

PA611-P

772700

4
4

(Fltng)
(Fltng)

PC11/PCV11
PCL11

777550
764200

4
16

@70
170

PDP-11

777570

Reserved

Errors

210

214

777200

Reserved

777526
777300

(1)
(2)

777000

7756086

Reserved

Reserved
Reserved

772550

Reserved

e I

772514

772154

Reserved

770440

Reserved

256
256

RF11

777460

RH70/RH11-Alt.

776300

RK611/RK711

777440

8
32
16

204
150
210

RK11/RKV11
RL11/RLV11

777400
774400

220

RLV12

774400

4
8

RM@2/063/04/05
RPQ4/05/06

776700

RP11

776700

22
22
16

RS@3/RS04

772040

160
160
254
254
254
204

776700

765000

213

l1t.

Reserved

210

RS/RP/RM/TJ

770100

Reserved

8
32

777550
777440

PR11
RC11

PIRQ

@34
240

Trap

NN DN

PDP-11

330

Trap

EMT

TRAP

g2
B24

1/0 Trap
Power Fail

PDP-11

REV11

- CSS device

Traps

PDP-11

REV11

rdrs/PA611-R)
puns/PA611-P)

(2
(2
1

PDP-11
PDP~-11

Q0@

Instructions
PDP~11 Breakpoint/
Trace

Reserved
CPU

PDP-11

RH70/RH11

MR11-DB

MS11/Msvl1l

PDP-11

Units/

MRV11-11

PDP-~11

RH706/RH11
RH7A/RH11

RH76/RH11

FIXED DEVICE ADDRESS AND VECTOR ASSIGNMENTS (CONT)

Units/

Address

Vector

No.

Base

Size

Base

Size

Comments

UNIBUS

Device

7771780

264

777170

264
144

Dump
RSTS/E Statistics
Pointer

234

System Software
Reserved

110

System Software
Reserved
TA1l1/DIP11-A

240

777340

TE16

772440

Testers

770000

TR79

772520
764000

TS11

772520

224

TU16/45/77

772449

224

TU58

776500

1
4

TU78

775400

UDA

772150
771774

154
234

units

UET

UNIBUS

Map

Unused

- RH78/RH11
- UDA device

771000

256

772140
770200

1
1

164

Reserved

DIGITAL

170
270

Reserved
Reserved

1=t

for

User/CSS
User/CSS

- RH70/RH11

1
1

UDC

RH78/RH11

260

UDC11

224

TM11/TMB11

260
214
224

777500

TC1ll1

RX11/211

RXV11/211
RSTS/E Crash

VSvll

772000

VT48

772000

VTV@a1

772600

XYll

777530

120

214

FLOATING ADDRESS UNIBUS DEVICES

Rank/

UNIBUS

Address

Order

Device

Size

DJ11

DH11

DQ11

DU/DUV11

DUP11

LK11lA

DMC11

DMR11

DZ/DZV11

DZ32

KMC11

LPP11

VMV 21

VMV 31

DWR70

RL/RLV11

LPAl11-K

4
8

KWll-C

Reserved

18
18

RX11
RX211

4
4

DR11-W

4
4

DR11-B

DMP11-AD

DPVI11

ISB11

DMV11-AD

4
8

UNA/QNA

26
27

UDA
DMF32

2
16

215

DP11
DM11-A

DN11

DM11-BB/BA
DH11 (ctrl)

W
Lo
B WN

WO
RN R R R R RO RN R R b
b b e b
e e
R OO0
O
d WNHERRWO
AU & WS

DR11-A

DRV11-B
DR11-C
DRV11

PA611-R/P
LPD11

DT11
DX11
DL11-C

DJ11

DH11
GT40

VSvV1ll
DQLl1
KW11-W

KWv1l
DU/DUV11
DUP11

DV11

(+ctrl)

LK11-A
DWUN

DMC11
DMR11
DZ11

Dz32/DZV11l
LPP11
VMV21

VMV31
VTVel
DWR70

RL/RLV11

DR11-W

DR11-B
DMP11-AD

DPV11

IsSB11
DMV11-AD

1P11/1IP300

UNA/QNA

UDA

DMF32

216

®©

fde

93!

LPAl11-K

KW1ll-C
RX11
RX211

B D

]

IS e B I RO N

DLV11/11-F

— R0 D

DLV11-J

DL11-B

DL11-A

TS11

N S

KL11

Device

TUS58

UNIBUS

Rank/
Order

DC1l1

Device

UNIBUS

E\)hfi&&bbbbs&-&bG\b:&bbbwmbfihbbbbm»&&&&M[\)M»fih&@ h

-JO UTds WM
N

Rank/

[

FLOATING VECTOR UNIBUS DEVICES

UNIBUS SIGNAL DESCRIPTION

Lines

Signal
Data
UB

Transfer

Address

<A17:A00>

Description
Lines

The address lines are asserted by the master
device to select a slave (a unique memory or
device

address).

<Al7:A¢1>

address

16-bit word; <A@@> specifies the upper
byte of the word on DATOB transfers.

lower

UB Data
<D15:D@@>

The data lines are enabled to transfer data
formation between the master and the slave.

Control

Two control signals are encoded by the master
device to control the slave in one of four data
transfer operations.
Transfer direction is
specified with respect to the master as follows:

<Cl:C@>

C@o

Data

(DATI)

transferred

)

In Pause

Data

by a

DATO or

Data

Out

master

DATOB

from

upper

the

(DATOB)

Data Out Byte

transferred

from

the

lower

from

- a DATI
the

- a word

(DATO)

transferred

The

word

the

(DATIP)

of data

- a

same

the

slave.

followed

location.

of data

master

in-

Iis

the

slave.

- a byte of data
master

byte

the

slave.

specified

slave

<A@>.

Parity

Two

parity signals

and

DATI transfer as

<PB:PA>

1
]
1

Master

Sync

(MSYN)

not

are

asserted

follows

by the

(PA is not currently used

defined):

Error

Parity Error
Reserved
Reserved

)
1
1

MSYN is asserted by the master to indicate to the
slave that valid address and control information
(along with data on a DATO/B) is present on the
UNIBUS.

Slave
(SSYN)

Sync

SSYN is asserted
from the master.

by the slave in response to MSYN
It indicates to the master that

DATO/B data has been clocked

data

is asserted

on,

217

from, or that DATI/P

the UB data

lines.

UNIBUS SIGNAL DESCRIPTION (CONT)

Signal Lines

Description

Priority Arbitration Lines

Request

for a DMA
NPR is asserted by an I/0 device (No
procesSor

Nonprocessor
Grant
(NPG)

NPG is the processor response to the NPR. Itthe
indicates to the I/0 device that it will be
next UNIBUS master when the current master has

Bus Request

<{BR7:BR4>

BRn is asserted by an I/0 device for a processor
interrupt. (Processor intervention is requested

Bus Grant
<BG7:BR4>

BGn is the processor response to a BRn. It indicates to the I/0 device that it will be the next
s

Nonprocessor

transfer directly with memory.
intervention is required.)

(NPR)

completed

for

its operation.

service.)

UNIBUS master.

Only the highest request receive

a bus grant at any one time.
NOTE

All UNIBUS signals are asserted at a nominal
except for the grant signals
(low)
ground
(<NPG,BR7:BR4>)

nominal +3.5 V

Select
Acknowledge
(SACK)

which

(high).

are

asserted

SACK is asserted by the NPR or BR requesting
device that has received a grant. This device
becomes the new bus master when the current

master completes its operation and releases BBSY.

Bus Busy

BBSY is asserted by the current master to indicate

Interrupt
(INTR)

INTR is asserted in place of MSYN by an interrupting device that has received a grant. It

(BBSY)

that the UNIBUS is in use.

informe the CPU that an interrupt vector address
(INTR is cleared
is present on the UB data lines.

the

receipt

SSYN.)

218

UNIBUS SIGNAL DESCRIPTION (CONT)

Signal

Line

Description

Initialization

Lines

Initialize

INIT is asserted by the UBI and is passed to the
SUB when DCLO is asserted on the first UNIBUS (on
It
a system power-up) or when CPU INIT is issued.
remains asserted for about 70 milliseconds after

(INIT)

the

negation

DCLO.

DCLO is available from each system power supply and
is asserted if an out-of-tolerance condition occurs.

Low

(DCLO)

DCLO on the
first

and

first UNIBUS asserts

second

UNIBUS.

INIT to both the

DCLO on the second UNIBUS returns NXM status on the
CMI if the CPU attempts to access a second UNIBUS
device.

Line

(ACLO)

Low

ACLO on
ACLO warns of an impending power failure.
the first UNIBUS initiates the power-fail trap
to
devices
peripheral
in
used
sequence and may be
terminate

operations

and

save

data.

ACLO on the second UNIBUS causes the SUB to interrupt the processor if the ACIE bit in CR1 of the
IPEC

enabled.

219

UNIBUS CABLE PIN ASSIGNMENTS

Signal

Name

AAL

INIT

AA2

BAl

BG6

BA2

5V
H

AB1

INTR

BB1

BG5

AB2

GROUND

BB2

GROUND
L

AC1

DAy

BC1

BR5

AC2

GROUND

BC2

GROUND

AD1

D@2

BD1

GROUND

AD?2

BD2

BR4

AE]

D@1
D@4

BE1

GROUND

AE?2

D@3

BE2

BG4

BH1

AQ1

D@7

ADD

AQ3

AM?2

BM2

AQS8

AN1

BN1

All

ANZ

BN?2

AlQ

BP1

Al3

AP2

BBSY

BpP2

Al2

AR1

GROUND

BR1

Al5

Al4

APl

G
S
S
i

AQS

AG6

BM1

AM1

AQ7

BL2

AL?2

Ad4

BK2
BL1

D14

D11

ALl

AQS

AK?2

AQ2

BK1

D12

BJ2

e B o

AK1

BJ1

D@9

D19

AJ2

AJl

BH?

D@8

AHI1

DCLO

D@5

ACLO

D@6

AF?2

ol S

BF1

S S

BF2

AF1

AH2

SACK

AS1

GROUND

BS1

Al7

GROUND

AR2

BR?2

NPR

AT1

GROUND

BT1

Al6

AS2

AT2

BR7

BT2

AUl

NPG

BU1

SSYN

AU2

BR6

BU?Z2

AV1

BG7

Bv1

MSYN

AV?2

GROUND

BvV2

GROUND

220

MBA PHYSICAL ADDRESS SPACE

CMI DATA LONGWORD

MBA #0 INT. REGISTERS

F28000

MBA #0 EXT. REGISTERS

F28400

MBA #0 MAP REGISTERS

F28800
F28C00

UNUSED

MBA #1 INT. REGISTERS

F29FFC

F2A000

MBA #1 EXT. REGISTERS

F2A400

MBA #1 MAP REGISTERS

F2A800

UNUSED

F2AC00
F2BFFC

MBA #2 INT. REGISTERS

F2C000

MBA #2 EXT. REGISTERS

F2C400

MBA #2 MAP REGISTERS

F2C800
F2CCO00

UNUSED

F2DFFC
TK-6406

221

MBA AND MASSBUS REGISTER SUMMARY

ocy
X

STHVINLYSILDXI3H 431SID3Y

s8]

S13S40

0 v8Z4

43 TOHANOD
4p

—
|33

TYNYILNI JINOWINIW H3I1SID3Y

810

¥3TTOHLINOD

¥00 800 200
3

IJQ"3LNVALIHTIOvYLdNAYM

TLALML

222

MBA REGISTER OFFSETS

MBA PHYSICAL BASE ADDRESSES
MBA

Physical

Base

Number

Address

(Hex)

Address

(Hex)

BR4

BR5*

BR6

BR7

194

1D@

Vector

MBA

F28000

MBA

F2A000

119
114

150

154

194

1D4

MBA

F2C000

118

158

198

1D8

*Standard

BR level

MBA INTERNAL REGISTER OFFSETS

Access

Internal

Add

- Configuration/Status

Control

Status

g4
g5
g6
g7

- Byte Count (BCR)
- Diagnostic (DR)
- Unused Register Address
- Command/Address (CAR)

@3 - Virtual

(CR)
(SR)

Address

(CSR)

goo

g4
g08
pacC

(VAR)

MBA

Read

Physical

(unused, reads
Read/Write
Read Only
Read/Write

g1C

Read/Write
Read/Write
Returns NXM
Read Only

MBA

Physical

2103

214

@18

Base

Address

Only

status

zeros)

CPU

MBA MAP REGISTER OFFSETS
To Access MAP Register
MAP

@90

MAP

041

Add

Base

Address

The 2 56 MAP register addresses
are accessed in increments of
four within the range of 800

through

223

BFC

(hex).

MBA REGISTER OFFSETS (CONT)

MBA EXTERNAL (MASSBUS) REGISTER OFFSETS
Drive

Drive
Register

Unit

Number

500

680

700

780

)

400

480

500

580

404

484

504

584

604

584

704

784

408

488

508

588

608

688

708

788

49C

48C

50C

58C

60C

68C

70C

78C

410

490

510

590

610

690

710

790

494
498

514

594
598

614
518

594
698

714

414
418

718

794
798

41C

49C

51C

59C

61C

69C

71C

79C

g8
B9

420

470

5A0

620

hAD

720

TAQ

424

4A4

520
524

5A4

624

6A4

724

TA4

428

4A8

528

5A8

628

6A8

728

7A8

42C

4AC

52C

5AC

62C

6AC

72C

7AC

gcC

430

4B
O

530

5B0

630

6B@

730

434

4B4

534

5B4

634

6B4

734

7B4

638

6B8

738

7B8
7BC

518

438

4B8

538

5B8

43C

4BC

53C

5BC

63C

6BC

73C

449

4CQ

549

5Co

640

6C0

740

7CHA

444

4C4

544

5C4

644

6C4

744

7C4

448

4C8

748

7C8

4CC

5C8
5CC

6C8

44C

548
54C

648

64C

6CC

74C

7CC

450

4D0@

550

5D0

650

750

754

7D4

758

7D8

15
16

454

4D4

554

458

4D8

558

5D4
5D8

654

658

6D4
6D8

45C

4DC

55C

5DC

65C

6DC

75C

7DC

460

4EQ

5E0

660

6E0Q

760

TER

464

AE4

560
564

5E4

664

6E4

764

7E4

468

4E8

568

5E8

668

HE8

768

7E8

46C

4EC

5EC

66C

6EC

76C

7EC

470

4FQ

56C
570

5F@

670

6F0

770

7FQ

474

4F
4

574

5F4

674

6F4

774

7F4

478
47C

4F8

578

5F8

678

AF8

778

7F8

4FC

57C

5FC

67C

5FC

77C

7FC

NOTE:

The offset value, when added to the MBA physical base
is transmitted as the drive unit and register select

address,

codes

the

MASSBUS control

bus.

224

MASSBUS SIGNAL DESCRIPTION

Signal

Line

Data

Bus

Section

Data

Bus

Data

<D15:D00>

Description

The parallel data path transfers DMA data
The MBA
between the MBA and the drives.
transfers 16 bits (2 bytes) at a time and

the active drive must have its "1l6-bit format”
Bits <D17:D16> are asserted
control bit set.
as zeros by the MBA for writes to drives that

perform parity checking.
Bus

Data

Parity
(DPA)

DPA is the odd-parity bit for data bus data.

It is asserted by the MBA on write to drive
It is asserted by the drive
(WTD) transfers.
from drive

on read

(RFD)

or write check

(WCK)

transfers.

When a data transfer command is written to a
drive's control register, the drive connects

RUN

to the data bus and asserts OCC.

RUN is then

RUN
asserted by the MBA to start transfers.
is clocked by the drive at the end of each

block or sector on the trailing edge of EBL.
1f RUN is still asserted, the function
If
continues to the next block or sector.
not,

Occupied
(0CC)

the operation terminates.

0CC is asserted by the drive that has received
a valid data transfer command and is connected
to the data bus is active).

not able

If the drive is

set OCC because of an error

condition, the MBA times out and MXF 1is set
O0OCC is negated on
in the MBA status register.
the trailing edge of the last EBL of the
operation.

End

Block

EBL is asserted by the drive for two microseconds after the final SCLK of each block
EBL may be asserted earlier on
or sector.
error conditions where

is necessary to

terminate the operation immediately.

Exception
(EXC)

EXC is asserted by the active drive when an

abnormal condition occurs during DMA transfers.
EXC is asserted at or before EBL and is negated
Also, on the
on the trailing edge of EBL.
assertion of EBL, MB EXC is set in the MBA
status

EXC distinguishes errors in the active drive
changes signaled by the ATTN line. An active

during DMA transfers from error or status
drive does not assert ATTN during data

rs (see ATTN description) until the

transfe
operation has been aborted or terminated and
the drive

is no longer active.

225

MASSBUS SIGNAL DESCRIPTION (CONT)

Line

Signal
Sync

Clock

(SCLK)

Description

to control
SCLK is generated by the activethedrive
MBA. On read
the data bus data clocking in
from drive (RFD) or write check (WCK) transfers,
the drive changes data on the assertion of SCLK.

The MBA then clocks data on the negation of SCLK.
Write

Clock

(WCLK)

the drive
The MBA receives SCLK and returns it to s.
The
as WCLK on write to drive (WTD) transfer

MBA changes data on the negation of WCLK. The
drive then clocks data on the assertion of WCLK.

Control

Bus

Control

Bus

Data

<C15:Cav>

Control
Parity

Bus

(CPA)

Section

The parallel data path transfers control and
status information between the MBA and the drive
on CPU reads or writes to a drive's

control/status

It is asserted by the MBA on a CPU write to a
It 1is
drive's control or status register.

asserted by the drive on a CPU read of a drive's

control
Control
Drive

(CTOD)

Drive

logic.

CPA is the odd-parity bit for control bus data.

Select

status

CTOD is asserted by the MBA when the transfer is

CTOD
a CPU write (from the MBA to the drive).
is negated by the MBA when the transfer is a CpPU
read

<DS2:DSP>

(from the drive to

the MBA).

The MBA asserts a three-bit code to select one

of eight possible drive units.

The MBA asserts a five-bit code to select a
register within the drive.

<RS4:RS¥>

Demand
(DEM)

DEM is asserted by the MBA to perform a control

It is asserted after
bus transfer with a drive.
the RS, DS, and CTOD lines are settled (and the
if the
settled
control bus data lines are

Transfer
(TRA)

CPU write).

transfer

TRA is asserted by the drive in response to DEM
It is asserted when the drive
from the MBA.
clocks control to drive data to the selected
It is asserted after
write.
CPU
a
on
register
drive to control data is asserted on the control
bus data

CPU read.
DEM

has

lines

been

from

the

selected

on a

is negated when the negation of

received

226

from

the

MBA.

MASSBUS SIGNAL DESCIRPTION (CONT)

Signal

Line

Attention
(ATTN)

Description

ATTN is asserted by any inactive drive as a
result of a change of status such as the comATTN
of a motion command or an error.

pletion

is also asserted by a previously active drive
when its GO bit is cleared after a transfer that
produces

error,

ATTN is a request for service by processor
The attention active (ATA) status
interrupt.

bit for each drive is read from the attention
summary register to determine the requesting
drive(s)
.

Initialize
(INIT)

INIT is asserted by the MBA to perform a system
on a system
It is asserted
reset of all drives.

power-up, or by writing a one to the INIT bit of
the MBA control

It must not be

written while RUN is set since the active drive
will abort execution of the current command and
perform drive clear command functions.
In a dual-port drive, the drive accepts the INIT
It
command only from the MBA that has control.
accepts the command from either control when in
the
FAIL

idle

state.

FAIL is asserted by the MBA to

indicate

that a

system power-fail condition exists or that the
MBA is in the maintenance mode. While FAIL is
asserted, all drives ignore assertion of the
INIT or DEM signals.

227

MASSBUS CABLE PIN ASSIGNMENTS

Cable A

MASS D@1

MASS D@3

MASS

D@2

MASS D@4

MASS D@5

MASS

C00

MASS Co1

u
\Y
W

17
18
19

+
+

MAGSS

Cg@2

MASS

C@3

Y
zZ
AA

21
22
23

MASS

C@4

MASS

C@g5

MASS

SCLK

MASS

RS3

MASS

ATTN

MASS

RS4

306

SSs

VvV
pin

Signal Name

MASS D@gg

*Alternate

Polarity

Pin¥*

I/0 Cable

MASS

CTOD

MASS

WCLK

MASS

RUN

Spare

Ground

GND

assignments
NOTE

MASSBUS

cables

are

installed

228

labeled.

MASSBUS CABLE PIN ASSIGNMENTS (CONT)

1/0 Cable
Cable

Pin*

Polarity

Signal Name
MASS

D@6

MASS

D@7

MASS

D@8

MASS

D@9

MASS

D19

MASS

D11

13
14

cCc
DD

25
26

29
30

MASS

EXC

MASS RSH
MASS

EBL

MASS

RS1

MASS RS2

MASS INIT

33
34

C1l¢

MASS C11

MAGSS

MASS C@9

MASS Cg@g8

MASS C@7

MASS C@6

MASS SP1

Spare

Ground

GND

*Alternate pin assignments
NOTE

MASSBUS cables are installed as labeled.

229

MASSBUS CABLE PIN ASSIGNMENTS (CONT)

I/0 Cable

pin*

Cable C

MASS D12

MASS D14

MASS D15

+
-

MASS D16

MASS D13

MASS D17
MASS DPA

MASS C12

MASS C13

MASS Cl4

\Y%

MASS

Cl15

MASS

CPA

MASS

OCC

MASS

DS@

MASS

TRA

Signal Name

*Alternate

Polarity

uu
VvV

39
4P

H (high)
GND

MASS

DS1

MASS

DS2

MASS

DEM

MASS

SP2

MASS FAIL
Ground

assignments
NOTE

MASSBUS cables

are

installed

230

labeled.

CHAPTER 9

TROUBLESHOOTING AIDS

SYSTEM TROUBLESHOOTING FLOW

HHOM1XS033LHONivOV83Y-3HNOA

GAZLT

S1Ins3y

,1S534N,D

WHO4d3d

v139d13H

¥Y1o 40 Nd4

-OVIAOHIIW
tLSON 3dVL
(1) 1834

WHO4H3d SA31VvYOIONI LANOLN8I"d

WHOd4d3d Tvd3IHdIY3d 1®S3134

8sN1L
1LOOYS3L VVAAI

FHOUHVH

‘31O0vWi3gY

HOSIAHILNS G8#3'dV0L#

d3LN3 a3I0w

ANV

N~YSIA

SHOHY3

13Nv450 TVH3IH4IH3d

SLOW0OA8

233

H03HO3Y HNOMA

ANV

3N18d1SOd ‘NOILON4TYW ONYOSJYIN

saAf

SNNHOILSTO3NAD3VTI€Q

1NOLNIYd

—
404d43

S"HOHY3

SOILSONDVIQ

ANY

JAHISE0
ANNOW

IOdNAYL

Nnd4

SHOH3

UNIBUS TROUBLESHOOTING WITH THE UET OR IPEC

First UNIBUS - The following sequence of console

commands

causes

memory.
the UET to execute a single NPR read (DATI transfer) from
1.

>>>D/I

Initialize

>>>D/W/P F30004 1

>>>D/L/P F30800 80200008
>>>D/L/P 1000 12345678
>>>D/W/P FFF460 0
>>>D/W/P FFF464 1
2.

Test

the

validity,

BDP 1,

PFN 1000

Load data to memory 100
Set UET bus address to #
Set UET NPR (GO) bit

Examine UET data register
(should

return 5678 as data)

Increment the bus address register:

Set UET bus address to 2
Set UET NPR (GO) bit

>>>D/W/P FFF460 2
>>>D/W/P FFF464 1
4.

Set up UBI MAP address @ for

results:

>>>E/W FFF462
3.

CPU

Purge UBI BDP 1

Test

the

results:

Examine UET data register

>>>E/W FFF462

(should

return 1234 as data)

Second UNIBUS - This sequence causes the IPEC to execute a single

NPR read

(DATI transfer)

from memory.

>>>D/1 37 1
>>>D/W/P F32004 1

>>>D/L/P F32800 80200008

>>>D/L/P 10060 12345678
>>>D/W/P FBF460 0
>>>D/W/P FBF464 1
2.

Test

the

Increment

the bus address

>>>D/W/P FBF460 2
>>>D/W/P FBF464 1
4,

Test

the

>>>E/W

Set up SUB MAP address @ for

validity,

BDP

PFN

1000

Load data to memory 1000
Set IPEC bus address to 0
Set IPEC NPR (GO) bit

results:

>>>E/W FBF462
3.

Initialize CPU
purge SUB BDP 1

Examine IPEC data register
(should

return

5678

data)

Set IPEC bus address to 2
Set IPEC NPR (GO) bit

results:

FBF462

Examine
(should

234

IPEC data register
return 1234 as data)

UNIBUS TROUBLESHOOTING WITH THE UET OR IPEC (CONT)

The following substitutions can be made in either program to
other data path and MAP address combinations.
MAP address:

UBI

SUB

F30800
F30804

F32800
F32804
.

F30FF8

F32FF8

F30@FFC

F32FFC

MAP data:

DDP

80000008

CSR data:

UBI

SUB

F30000

F32000

UET

IPEC

FFF460
FFF462

FBF460
FBF462

FFF466

FBF466

1
2
3

BDP
BDP
BDP

F30004
F30008
F3gaecC

Exerciser

address:

FFF464

test

MAP physical base address
(MAP locations are accessed

in increments of four)

(Direct data path)

80200008
80400008
80600008

F32004
F32008
F32006C

FBF464

Base (no CSR for the DDP)

CSR 1 for BDP 1
CSR 2 for BDP 2
CSR 3 for BDP 3

Bus address register
Bus data register
CR1*

IPEC CR2,

data

UET PROM

*Other operations can be performed using combinations of
the following control register bits:
(GO)

= NPR

CR<@>

bit

= <Cl:C@> from control bits
= <A17:Al16> bus address bits

CR<2:1>
CR<4:3>

<Cl>

<C@>

@
@
1
1

@
1
@
1

Function
DATI
DATIP
DATO
DATOB

program, load the bus data
To do a DATO or DATOB with either
the memory deposit with one word of data
register in place
(>>>D/W/P FFF462 or FBF462).

235

THE FILEX UTLHTY

may be used to copy files from TU58 to disk or from disk

FILEX
1t can be used to build new files or when existing files
TUS8.
the
have been corrupted. All programs must first be in place;

boot block is then added using the WRITEBOOT facility.

default

Disk to Tape - To copy from the

disk

drive

TU58

cassette, do the following (FILEX uses only 'ddu' and does not use
codes).

controller

RUN SYSS$SSYSTEM:SYSGEN
CONSOLE

SYSGEN>CONNECT
SYSGEN>EXIT

$
S

MOUNT

CS1:/FOREIGN

[SYSMAINT]

SET DEFAULT

MCR

FLX

(List tape directory - optional)
(Zero tape directory - optional)

FLX>CS1:/RT/LI
FLX>CS1:/RT/ZE

[device]filename.ext/RS

FLX>CS1:/RT/XX =
(to

(from device)

device)

Codes

XX Command

(EXE,

IM -~ Image mode

Tape to Disk
$

the

SML,

RS11
RT11

format
format

(when

(system)
(tape)

operation

complete)

- To copy from a TUS8 cassette

(RK@7)

following:

CONSOLE

SYSGEN>EXIT

MOUNT CS1:/FOREIGN
SET DEFAULT [SYSMAINT]
MCR FLX

FLX>DMO:/RS/CO =

FLX>TY

TSK)

RUN SYSSSYSTEM:SYSGEN

{to

OLB,

RS
RT

SYSGEN>CONNECT

$
$
S

SYS5,

- Delete specified file
- Formatted binary (OBJ, STB, BIN, LDA)
- Formatted ASCII (all other extensions)
- Contiguous file to disk (file coming from
disk to tape are always contiguous)

FLX>"Y

disk,

ULB,

DE
FB
FA
CO

device)

(when

CSl:filename.ext/RT
(from

device)

operation

complete)

236

to the

default

THE WRITEBOOT UTILITY

The WRITEBOOT utility may be used to write a
boot
block
on
any
bootable
disk.
A bootstrap operation is normally performed from
the the boot block that is block @ of the system disk.
If block #
is
bad,
the
system
can only be booted from the TU58.
When the
system is running again, the boot block
can
be
rewritten
using
WRITEBOOT.
NOTE

The
use
To

call
$

operator must have
LOG IO
the WRITEBOOT facility.

WRITEBOOT,

type

following

command.

SYSSSYSTEM:WRITEBOOT

RUN

The

program

then

Target

system

asks

three

DMAQ or
DMAQ:
device 'ddcu' as

block
boot
the
have
the device that will
boot file name if not VMB.EXE (for example:
filename.ext) .
Specify
the
for any other VAX/VMS device.

Device

Controller

Unit

An example:

number

'DMAQ'

Enter VBN of boot

target

system

type

questions.

device:

Enter the name of
the
and
written

the

privilege

designation

is RK@7 unit @ on RK611 controller A.

file code:

To rewrite the boot block, press RETURN (default is 1).
3.

Fnter load address of primary bootstrap in hex:

rewrite the boot block, press RETURN

(default is 200).

WRITEBOOT then writes the boot file specified on the first line to
the address specified

the

third

line.

237

THE WRITEBOOT UTILITY (CONT)

WRITEBOOT may also be used

write

cassette tape using these specifications:
Target system device:

(ddcu = CSAl:
Enter VBN of boot

(default

is 1

boot

block

TU58

filename.ext

ddcu:

for console TUS58, or ddcu of UNIBUS drive)
1 or 2

file code:

if RETURN is pressed)

Enter load address of primary bootstrap in hex:
(default

is 2¢¢ if RETURN is pressed)

Level 4 monitors and diagnostics are the only bootable programs
Four bootable programs are currently available and are
from TU58.

written to a TU58 cassette tape using

these parameters:

Filename.ext

VBN

Load Address

Description

EVKAA.EXE
ECKAL. EXE

2
2

200
200

Hardcore tests
TB and cache

Cooo

ECSAA.EXE

BOOTS58. EXE

Diagnostic supervisor

10000

BOOTS58 monitor

238

MACHINE CHECKS

The CMIERR bit of IPR 17, when set,

parity

These

errors,

requested

examined,

shutdown

indications

bugchecks

although there

indicates multiple TB or cache
also appear

may

system

the

when

the

is nothing wrong with

after

one of

Memory

@
e

the

system.

the

CMIERR is only valid when the system halts at

vector

following.

in operator

error

1log

machine

check

error

parity

error

Cache parity error
Control store parity error

LAg@3
the
of
registers
MEMSCR
CMIERR summarizes the pertinent
MEMSCR registers are D type latches that follow the
The
module.
the
when
input signal level and false indications sometime occur
Two forced machine
an MFPR from this register.
does
code
macro
checks are

included here

for

illustration.

TRANSLATION BUFFER OR BUS ERROR
This machine check was caused by mapping a nonexistent page with a
SCRMPSC system service and then accessing that page in user mode.
Exception

Error PSL

geoeae4sC

g3Co0000

Interrupt priority level = 0
Current

Summary code

gooooe00a2

VA last ref
PC at error
MDR

00000600
fO0BBASE
00000000

SMR

ge00000eB

mode

User

Translation buffer or bus error

CPU mode = User
Virtual
Read

RLTO
TBGPR
CAER
BER

00000000
go0enoee
goo0oea0
00000008

MCESR

po000008

Memory error

Operand reference
Bus

239

error

MACHINE CHECKS (CONT)

machine

VAX-11/75@8

the

(compared

logout

check

VAX-11/788), no translated address is pushed onto the stack. This
is because the physical address latch is contained within gate
arrays and there is no direct method of obtaining the physical
address.

The MCESR register may be read to determine what type of exception
The bits are defined as follows.

condition occurred.

<@ 3>

MEM

MCESR

If bit <3> is a

referencing

then be

read

one

memory

read

the

to determine

stack

the

<@1>

<@9>

FETCH

PARITY

ERR

for

<@2>

data.

occurred

error

logout,

The BER register logout may

of memory error.

type

Bit
occurred.
The BER register will indicate what type of error
a memory while bit <2> indicates an uncorrectable
indicates
<3>
(via
processor
the
interrupt
errors will
Correctable
error.
log the error while uncorrectable errors will cause
and
SCBB+54)
machine

checks.

<@3>

BER

<@2>

<@8>

<@1>

CORR
UNCORR | LOST
MEM
ERROR | ERROR
ERROR | ERROR

it
If the uncorrectable error bit is not set (as in this example)
be assumed that it was a reference to a nonexistent location.
can
one,
a
is
register
MCESR
the
in
<2>
bit
If the TB parity error
some

type of

TB parity error caused

the machine

check.

If machine

The TBGPR can be read to determine what the error was.

check was not caused by a memory error or TB parity error, a cache
The CGPR contains the
parity error is the only other possibility.

data

Several
a.

tag

parity

information.

other machine checks may occur
Summary parameter =

to 7

the VAX-11/7540.
the

This error occurs only

1if

instruction
accessed at

is not
The

decode ROM
IRD1 time.

mechanism only works if there is
no CS parity error and the NEXT
field in an IRD1 ROM state is
used

instead

the

IRD

ROM

output.

Summary parameter =

to 6

This

a microsequencing

error

that

occurs if the microcode
jumps to filler words in the
control store.
R6 contains the
error code or filler word
This only happens if
accessed.
there

240

parity

error.

MACHINE CHECKS (CONT)

The

following

description

illustrates

the

last

possible

occurrence

of
machine checks, the control store parity error.
Note that the
VAX-11/750 machine check logout does not have the micro
PC
where
information
This
stack.
the
on
pushed
occurred
machine check
the
cannot be
register

saved
1like

RDM

does not have
is
possible,

application

stop the

set

RDM> RET/D
>>>C

:
;

return to previous mode
continue running application

XXXXXXXX

>>>"D

stop on micro match at CS address

When the CS parity error occurs, the following message
at

the

using

follows.

°P

RDM>

a
UPC
save
however,
to

intermittent CS parity error machine checks by

troubleshoot
the

because the VAX-11/750
the
VAX-11/784.
It

@020

printed

console.

CLOCK

STOPPED

RDM> TR
CSAD

CSAD

(020

@F56

; the TRACE command will permit you to see a

trace of where

the micromachine has been

@0F56

0020

YYYY

;

parity error

;

64 microinstructions ago

XXXX

; XXXX is the microinstruction causing the CS

YYYY

YYYY
RDM>

Repeat this process to be certain that the error occurs in the
Swapping the L@@@5 module will usually prevent this
same place.
type of problem. The following is a description of the CS parity
error

machine

check.

241

MACHINE CHECKS (CONT)

CONTROL STORE PARITY ERROR
This machine check was forced
1in

stored

microinstruction

by
the

mathematics program was performed and

single

clearing
WCS.

bit

A G and H floating-point

the

when

microinstruction

with bad parity was executed, the machine check occurred.
PRBBEBIC

Exception

p3Cooo04

PSL

Error

Z-bit

Interrupt priority level =
mode

Summary

code

0ooooeol

VA last

ref

MDR

poopgaecC
0000 PBAS
FFFFFFFF

SMR

PooR000B

error

User

Current

mode

Control

store parity error

CrPU mode
Vvirtual

User

Read

Oon

RLTO

0oe00a00

TBGPR

0r000000

CAER

pRooooR1

BER

goRo0o00

MCESR

GOFDOOO0G

this

type

of machine
The

help.

not

does

check

Cache

hit

Operand Reference
Opcode mnemonic =
exception,

summary parameter

all

ESCD

stack

information

indicates that a control

store parity error occurred and there is no way to determine

what

happened.

All

that

These

can

bits

are

check.

that

the

in memory so

the

is
Note

opcode

machine

the

check

byte 2 contains
that
instruction
the
of

the

error

that

summary

letters

caused

'FD'.

the

VMS writes the opcode into the image of the MCESR
instruction
that SYE can determine the opcode of the

machine

saw

shown

(MCESR)
.

control

store

parity

error.

242

WRITING SPRS

GENERAL GUIDELINES

Software
problems

Performance Reports (SPRs) provide feedback to DIGITAL on
with
software
and
provide
help
to
customers
with
they are having.

difficulties

be
should
that
information
the
The following guidelines cover
this
problem,
the
on
Depending
SPRs.
all
with
provided
the
Remember that
information will vary in quantity and content.
pertinent the information included, the easier it will be to
more
resolve

the

problem.

Scenario

The user should supply a complete

wusually

scenario,

1in

the

form of a batch log or console listing, that will show exactly

how the problem

produced

the

was

produced.

Supplying

1is not enough.

problem

the

output

system

events,

only

The problem may be

various
between
interaction
an
by
caused
software packages, devices, SYSGEN parameters,

DCL symbols, or
the
by
Some or all of the displays generated
logical names.
following commands may be required for different problems:
$SHOW LOGICAL /ALL
$SHOW SYMBOL /ALL/GLOBAL

SRUN SYSS$SYSTEM:SYSGEN
USE

ACTIVE

SHOW /ALL
SHOW /SPECIAL

Limit

Problem

Scope

The user should (as much

possible)

eliminate

all

extra

elements from the scenario. For example, if the execution of
a very large program causes a problem, the user should shorten
the program to include only the code that causes th problem or
This
write a small program that demonstrates the problem.
first, the user may trap logic
action has two benefits:
errors, and second, the maintainer looking into the ©problem
does not have to understand unnecessary material.

243

WRITING SPRS (CONT)

Machine

Readable

Files

If possible, supply any software needed to reproduce the
This may include source programs, image files,
problem.
are
programs
source
If
sample data, or command procedures.
also include any libraries or require files
submitted,
referenced. These files must be provided in machine readable
format.

media

console

The

include

with

media

or an ANSI magtape are the best

SPR.

the

crash,

If the problem involves a system

the

include

system

dump.

an
or
The data should be written onto an 0ODS-2 format disk
For example, the following commands will copy
ANSI magtape.
system dump

the

MTAQ@:

SINIT

file

ANSI magtape:

DUMPS

SMOUNT MTA@:

$SCOPY SYSSSYSTEM:SYSDUMP.DMP MTAQ:

SDISMOUNT MTAQ:

To copy

files

use

medium,

console

the

following

commands:

SRUN

SYS$SYSTEM:SYSGEN

CONNECT

CONSOLE

(At this time, remove the console medium and
place a scratch volume in the console device.)
SPRDATA
SINIT CSAl:
SPRDATA
SMOUNT CSAl:
$SCREATE/DIRECTORY CSAl:[DUMP]

$COPY MYDTA.DAT,MYIMAGE.EXE CSAl:[DUMP]
SDISMOUNT CSAl:

the
When machine readable data is provided in another format,
user should include the exact commands that were used to write
the data

and

the

commands

used

read

cause problems and should not be used.
create
will
switch
without the /IM

completely
in

All

unusable,

because

Other

Iit.

formats

For example, using FLX
is
that
file
dump
a

FLX eliminates

all

bytes of

zero

will

file.

machine

returned

readable
the

media

submitted

customer.

244

with

SPRs

WRITING SPRS (CONT)

System

Environment

Every computer site runs a different type of
workload.
Some
problems
only
appear under certain conditions.
For example,
some sites give different
classes
of
wusers
different
base
priorities.
These sites may have problems that other sites do

not.,
This information can be very important in resolving
problem, especially for system hangs or crashes.

the

being
packages
The user should describe any special software
hardware devices or user written drivers
unusual
Any
used.
should

also

mentioned.

Software version numbers should be

included.

For example,

there is a problem with accessing local symbols during a DEBUG
all
and
DEBUG
of
numbers
version
the
session,
compilers/assemblers should be specified.

If any patches other than from maintenance

used,

User

they should

Analysis

be mentioned

the

updates

are

being

SPR.

(Optional)

problem.
the
Optionally, the user may include an analysis of
miscellaneous information should be included such
Any useful
be
not
couvld
problem
the
happening,
xyz's
"Without
as,
reproduced” or "On version Vx.y, this problem does not occur.”
Problem Specific

Information

Solving different types of

Include

problems

will

require

different

the
shows
table
following
The
information.
of
kinds
information typically needed for different types of problems.

245

WRITING SPRS (CONT)

Problem

System bugcheck/crash

Information to Include

A machine readable copy of the system

(Output
dump file MUST be included.*
from the SDA utility should NOT be
sent because

it usually does not

include enough information to resolve
problem.)

the

A copy of the error log at the time
of the error should also be included
because many system problems are
triggered by hardware errors.**

Machine check

Oon a machine check, include a copy of
error

the

log.**

A machine readable copy of the system
dump file should also be included.*

System hang

When a system appears "hung”
on

sponse

any terminals),

the

(no re-

system

should be manually crashed and the
system dump file included with the SPR.

When the system is shut down
way,

the

SPR.

console

important and

listing

should be

in this

is very

included with

On the VAX-11/78# console

terminal,

enter:

“p
HALT

@CRASH

the VAX-11/758 console

enter:

“p
E

E/I

E
E
E
E

D/G
D

FFFFFFF

1F@00@

246

terminal,

WRITING SPRS (CONT)

This will cause the system to bugcheck in what 1s recognized by VMS
developers as a forced crash.
the currently
should also be

A description of
running workload
included.

Executive

If the user suspects a problem with

executive code,
of

values

the

include the

system

active

parameters.

These can be obtained by invoking
SYSGEN and entering both the SHOW/ALL
and

SHOW/SPECIAL commands.

A machine readable copy of the source
program showing the problem plus

libraries, require files, and build
files should also be included, if

possible,

Include a copy of the error
the time of the problem.**

Devices

log

For any suspected device or device

driver error,
error

log

include a copy of the

the

time of the

problem.**

Files

If the problem appears to be with a

file, information (DIRECTORY/FULL) on
that file and its directory should be
If possible, include a
included.
machine readable copy of the file
itself.

Intermittent

For a problem that is intermittent

or that cannot be reproduced, include
a copy of the error log at the time
of

the

problem.**

247

WRITING SPRS (CONT)

information to Include

Problem

Command

language

interpreters

When submitting an SPR on a command

it is important

interpreter,

language

to show all symbols (SHOW SYMBOL/ALL/

GLOBAL) and logical names (SHOW
LOGICAL/ALL) defined on the system.
Job controller

If the job controller aborts, it will

print a message on the console and

write a file named SYSSSYSTEM:
The user should
SNAPSHOT.DAT.
include the console printout and
machine readable copy of the

SNAPSHOT.DAT file.

Librarian

1f the user encounters a problem with
the LIBRARIAN, include the following
information:

1.
2.
3,

A machine readable copy of the
itself

library

Machine readable copies of all
input

files

Information

the

library

Information

library

file

(LIBRARY/LIST/FULL)

library

the

(DIRECTORY/FULL)
contents

1f the problem can be duplicated at
will, include the scenario and any
command

Linker

files

If the user
the LINKER,

copies

libraries

a
DECnet

full

map

used.

encounters a problem with
include machine readable

the

used

object

in the

files

and

link along with

(LINK/MAP/FULL).

For a DECnet problem, supply configurations of the systems involved in
This information should
the problem.
include the version numbers of the
operating systems and DECnet, the
hardware on both systems, and the
patch level of the DECnet software on
the non-VMS system, if applicable.

248

WRITING SPRS (CONT)

Problem

Information

Terminals

the

Include

suspects

user

problem with

the terminal driver, provide
following information:

3.
4.
5.

terminal

A list

istics

(SHOW

The

type

the

character-

TERMINAL)

terminal

The type of modem (if any)
Any special front end equipment
Any unusual terminal configuration

If the problem involves remote
access, it is often useful for
maintainer

know

the

same

file
the
or a

similar operation can be performed
from a different account, or with
the source and destination nodes
reserved.

Compiler/assembler

If the user encounters a problem
with the assembler or a compiler,

include the source program that
(It is very
caused the problem.
important to include all require
files and libraries that are referenced by the source program, also.)

It is especially important to limit
the scope of the problem when sub-

mitting

SPRs on compilers.

Include the version number of the
compiler and the version number of
the

operating

system.

*The raw data file (SYSS$SSYSTEM:SYSDUMP.DMP), not the formatted
output from the SDA utility, should be included. Formatted to
output usually does not include all the information needed
solve

the

problem.

, not the
**The raw data file (SYSSSYSDISK:[SYSERR]ERRLOG,SYS)
formatted output from the SYE utility, should be included.
Formatted output often does not include all the information
needed to solve the problem.

249

WRITING SPRS (CONT)

priority

The following SPR

explanations

should

guideline for determining the priority of an SPR:
l‘

used

Functions/jobs that
Most production work cannot be run.
are not usable are a major use of system, system will not
boot, necessary peripherals cannot be used as intended.

work
production
Some
are not
jobs/functions

cannot
usable,

run.
be
performance

installation has insufficient excess capacity.

Certain
degraded,

user.
extra
installation has

all production work can be run with some impact on
required,
intervention
manual
Significant

procedures,
excess

performance

degraded

but

capacity.

All production work can be run with no significant impact
problem can be easily patched, simple bypass
user.

procedure

exists.

normal
No system modifications needed to return to
documentation
consultation,
Suggestion,
production.
error.

250

GENERAL NOTES

VAX-11/750 TROUBLESHOOTING TIPS

switch
When troubleshooting, place the console power-on action
If vyou do not, the CPU will try to
in the HALT position.
reason.
reboot if a CPU halt occurs for any

is turned on,
I1f the console prompt does not appear D.whenThepower
RDM prompt (RDM>)

insert

should

the

RDM

module

type

and

appear.

a carriage return
Stop the clock by typing 'STO' followed by
The address of the last control store location
(<RET>) .

is @, dc low is
accessed will be printed. If the address
asserted. If the address is X8XX, ac low 1s probably asserted
.

and the microcode is in a loop waiting for it to deassert
The memory
First ac low is asserted by the power supply.

until all memory locations have

then asserts
the RDM prompt prints
been cleared. Typing 'TRACE<RET>’ after
the 1last 64 control store addresses referenced.
of
a trace
in a loop.

controller

This is very useful if the CPU is hung

examine and
Turn off cache (>>>D/I 25 1<RET>), then try to
from the console
deposit locations in memory and on the UNIBUSRH758
1if one is
prompt (>>>). Also examine and deposit the
present.

type D
If memory cannot be examined from the console prompt,
This should
and see if it is accessible from the RDMareprompt.
working or not.
determine whether the CMI and memory be accesse
d from the RDM
Remember, UNIBUS locations cannot
prompt.

on the
(UET) is always present deposi
The UNIBUS exerciser terminator
t
or
e
examin
to
le
possib
be
should
it
so
,
UNIBUS
first
(The location is
FFF460.
the address register at locationmmable
exerciser control (IPEC)
FBF46¢ for the internal progra
default should be set to
on the second UNIBUS.) The consolemode
accessing to UNIBUS
physical addressing and word11XX KHXXwhen
XXXX XXXX" where
XXXX
"1111
is
which
space,
address
and
X makes up the 18-bit binary address. (See Chapter 2, UBI
SUB Registers.)

by typing 'PAR #' from
Run a parity test on the control store
control store parity ina
the RDM prompt. This ngchecks
with
with location 8. A halt
sequential locations startis other
than 17FD (hex) indicates a
parity error in any addres
problem in the control store.

251

GENERAL NOTES (CONT)

the
before
microdiagnostics
DPM
the
run
Always
(See Chapter 6, RDM Installation Tests.)
microdiagnostics.

Make sure that the system has the

latest

microcode

revision

This can be checked by an
the latest FCOs are installed.
and
The bit fields
examine of the SID register (>>>E/I 3E <RET>).
(The revision levels
as follows.
are
SID register
the
of
shown are current as of the date of this document.)

Bits <31:24> = Type code (the VAX-11/758 = 2)
Bits <15:88> = Microcode revision (currently = 5E)
Bits <@g7:00> = Hardware revision (currently = 3)

175,

Refer to Speed Bulletins 174,

and 287 for latest

FCOs

date.

revisions

The current
ECKAA

ECKAB
ECRKAC

Rev.

Rev.
Rev.

6.0
6.1
5.0

for microdiagnostics are:
Microdiagnostic

Monitor

(MICMON)

DPM
MIC

Micro
Micro

first
The
ECKAM does not test the first memory array module.
256-kilobyte array is tested by the MIC microdiagnostics.
or
Earlier versions of ECKAM may not report single bit errors
Check periodically to find
some dual addressing errors.
find

out
19.

when

Cache
occur

error.

the

updated

parity errors
location
at
Unlike

obtain

good

the

data

version

will

available.

in the VAX-11/750 cause
This can be
+4.
SCBB
VAX-11/78@,

the

from memory on

252

a machine check to
treated as a fatal

VAX-11/75@

cache

does

not

attempt

parity error.

GENERAL NOTES (CONT)

DW750 INSTALLATION
The DW750 is typically installed in slot 7
backplane
to
make
cable
routing easier
first priority in the bus grant chain.

of
and

the
extended
hex
to place the SUB at

CAUTION

procedure
installation
DW75@¢
the
Refer to
that specifies use of the VELOSTAT mat kit to
Also
discharge.
prevent damage from static
see figures and tables in Chapter 8 under the

headings
Jumpers

Bus

and

MBA

Grant

Chain

and

Continuity

Installation Jumpers.

they
place,
If one or more RH75@ MASSBUS adapters are already in
be moved down one slot and one CMI ARB level as shown in the
must
following

examples.

Example 1:

MBAs Before DW750 Installation
ARB

Address

CMI

Device

Base

Slot

7
8
9

MBA ¢
MBA 1
-

F28000
F2A000
(Spare)

ARB
ARB
ARB

3
2
1

Example 2:

Level

MBAs After DW75¢ Installation
ARB

Address

CMI

Device

Base

Slot
7
8
9

SUB
MBA 0@
MBA 1

F32000
F28000
F2AQ000

ARB
ARB
ARB

3
2
1

Level

UNIBUS EXERCISER (UBE) ON THE SECOND UNIBUS

The M7855 UBE module may be plugged into an SPC slot in the second
UNIBUS expander box to test cabling and connectors.

UBE Base CMI Address:
UBE

Vector:

FBF0@@0 (770000 octal)

510

253

CHAPTER 10

CHARTS AND MACROS

—Jo|okCuEDCHiERGUEED2OEDIR|GEED m:k<bw<mw4

mme meNm\‘
%Ium

vdSy

S84

257
G

TOHLNOD

Lng 219071
HOLWvHOS
avd
VdJSW

WNNY

o sng

y|O CRmn OEmD NS £R Ty Ry.

‘DO3N4

vdS

-l

S3d¥av

WSna

£L0E-ML

zeye w zef 434 )ze T T TT F

mTVHILN_WvySANAL vx W _
vy

emn | e | =
I

SYSTEM SCRATCHPAD LOGIC

SdW3L

;

RTEMP AND GPR FUNCTIONS

REG NO

RSRC

ASSIGNMENT/PURPOSE

0
1
2
3
4
5
6

00
01
02
03
04
05
06

DUAL PORT TEMP O
DUAL PORT TEMP 1
DUAL PORT TEMP 2
DUAL PORT TEMP 3
DUAL PORT TEMP 4
DUAL PORT TEMP 5
DUAL PORT TEMP 6

MEMORY MANAGEMENT TEMP 1

7
8
9
10
1
12
13
14

REG NO

ASSIGNMENT/PURPOSE

RSRC

10
11
12
13
14

5
6
7
8
9
10
11

15
16
17
18
19
1A
1B

0
1
2
3

DUAL PORT TEMP 7
R S-PAD TEMP 8
R S-PAD TEMP 9
R S-PAD TEMP 10
R S-PAD TEMP 11
R S-PAD TEMP 12
R S-PAD TEMP 13
MEMORY MANAGEMENT TEMP 5

07
08
09
OA
0B
0C
oD
OE

12
13

1C
1D

GPR O
GPR 1
GPR 2
GPR 3
GPR 4

GPR 5
GPR 6
GPR 7
GPR 8
GPR 9
GPR 10
GPR 11

GPR 12
GPR 13

STACK POINTER
MICRO CODE TEMPORARY

TK-3068

258

PRIVILEGED IPR AND MTEMP FUNCTIONS

REG NO

RSRC

ASSIGNMENT/PURPOSE

KERNEL STACK POINTER

EXECUTIVE STACK POINTER

SUPERVISOR STACK POINTER
USER STACK POINTER

INTERRUPT STACK POINTER

PROCESS CONTROL BLOCK BASE

MEMORY MANAGEMENT TEMP 2

MEMORY MANAGEMENT TEMP
3

PO BASE REGISTER

PO LENGTH REGISTER

P1 BASE REGISTER

P1 LENGTH REGISTER

SYSTEM BASE REGISTER

SYSTEM LENGTH REGISTER

NEXT INTERVAL REGISTER

4
MEMORY MANAGEMENT TEMP

REG NO

MSRC

ASSIGNMENT/PURPOSE

DUAL PORT TEMP
0O

DUAL PORT TEMP 1

DUAL PORT TEMP 2

DUAL PORT TEMP
3

DUAL PORT TEMP
4

DUAL PORT TEMP 5

DUAL PORT TEMP
6

DUAL PORT TEMP 7

M S-PAD TEMP 8

M S-PAD TEMP 9

M S-PAD TEMP 10

ERROR CODE, MEM FAULTS & ARITH TRAP

SYSTEM CONTROL BLOCK BASE

SOFTWARE INT SUMMARY REGISTER

FPD PACK ROUTINE OFFSET
MEMORY MANAGEMENT TEMPO

TK-3069

259

RSRC ASSIGNMENTS

RSRC <6:0 >

RAM-R

HEX

00-0D

TEMPO-TEMP13

MM.TEMP5

MM.TEMP1

10-1D

RO-R13

RTMPGPR

KSP

ESP

SSP

usp

ISP

PCBB

MM.TMP2

MM.TEMP3

POBR

POLR

P1BR

P1LR

SBR

SLR

SPNICR.SPICR

MM.TEMP4

OPERATION

TK-3060

260

RSRC ASSIGNMENTS (CONT)

RSRC <5:0>

RAM-R

HEX

TEMP.R

DST.R

IPR.R

CRP.R

OPERATION

(TEMPO)

(TEMP7)

LONLIT

(TEMPO)

ZERO

(TEMPO)

ZERO.CLRRBSP

TEMP.ROR1

DST.POR1

IPR.ROR1

GPR.ROR1

TEMP.R+1

DST.R+1

IPR.R+1

GPR.R+1

TK-3061

261

MSRC ASSIGNMENTS

MSRC<4:0>
HEX

RAM-M

DESCRIPTION

OPERATION

00-0A

TEM PO-TEMP10

MICROCODE TEMPORARIES

ERRCOD

ERROR CODE

F PDOFFSET

MM.TEMPO

MEMORY MANAGEMENT TEMP

SCBB

SYSTEM CONTROL BLOCK

SISR

SOFTWARE INT SUMMARY

TEMP.R

MTEMP INDEXED BY RNUM

TEMP.R +1

(TEMPO)”

MDR

MBUS < - - MDR

(TEMPO)*®

WDR

< - - WDR
MBUS

{TEMPO)

PSHSUB

WRITE - - TO RBS

(TEMPO)

PSHADD

WRITE + TO RBS

{(TEMPO)

WBUS RNUM

< - - RNUM
WBUS

(TEMPO)"

XB.PC PC+1

MBUS < - - XB, PC<-- PC+! SIZE

(TEMPO)TM

< - - MA
MBUS

FPD PACK ROUTINE OFFSET

BASE

MTEMP INDEXED BY RNUM~+1

PC BACK

MBUS < - - PC BACK

(TEMPO)”

MBUS < --PC

(TEMPO)"

MBUS <-- VA

(TEMPO)

READRBS

READ RBS

(TEMPO)

RNUM WBUS

< - - WBUS
RNUM

(TEMPO)

WB RBSP

< - - RBSP
WBUS

(TEMPO)*

MBUS < -- TB DATA
TK-3079

262

dOH*$60LRD
JIW°SLYYHD

DPYBUTUIRWMNO3IUYDINOHOTpueAJowaswTO0JI1UCHpu®sSniels*g£J123STHhe1

T1T4d UT eiep 103 ¥dI 4€

ZOM¥DIW (TOIWT !¢v9e6Cy%8=d3S=1DHJ061°02we‘J€UIEWWOl*ISHI®IHYHX‘MIUNsBOINATDOUNADYDION®‘H10°*63
°3 ‘1 73M0 0W *d ¥4
11nvye1Ins

CHARTS

Ag2H=UO1Q8TGIXTD

!L6%

U“wOATIS0TOASJYSHTH UIO5T3I8RWI1UBOWN0SIOD

1064

vos!

263

CHARTS (CONT)

TA139daTn7i32a0s7i0j32udg a1Lu83o107eQz1gd4

$97Z:52 U3dRnIlilNaDlul3DO¥Wowalg

-y

-t (N

Eali
A

]
Lt]

o
S
[ e I

s
o~

a—

gu.wm..m-nu-.onu-..-e.

ng-n»;-u‘gn.,--.u-.u.u.an.-nu.n.b-.b«n.-x.o;»-.a~n.wgs.o-.oun;‘na.m..Nu-mn.o

9¢6¢

264

201!|]||¢¢|i}04z€1%69L8KY€2g3oZB&9L8JaA4o0O07TT1t10Jdp¥Hp¥4gTSSaI4sa8dS7i8E1PdYH¥13EAys0TSaaI3IA2sBli4d3xYSSWDyIlaxsWe3aDTssa3eayAddy37Pbb! |I|i1(|1|000tt}§}4MKN£!I|+¢i|{1|3I73HdL0(WITeSAHI3ILTF3w4OUUFIdTTaWS)0YYv30O0ADAnInSMNLHdJA3SSHdIYLME¥0sNNITHADILSavOYUM3I3O¥IdNDDONAHN03nIYTFNEXSSEH3OiTINI¥HTIF0YSIY1O3OMOIL}ENMLJ¥YYIDV4A¥NSNSOMHY3A0OIHLTNTYIOA0LHOUVSLMDLAHYSHD0ISINSO3IHLLAIYSLOS0ITOOINNAIYALWLHNOddIENNLTASETYIA@I0OYLAWA7dLTNOYLISTLKIIANUANS€eSVYOIDYAAu/dOH3NAiWdYTLDS0sIYNMuYESIYyNINGVYIL¥HDQOI1VYAA0ILLsSSLTIaION0WFIOYY1Dg4i|¢||||}$«,Z019sL8€6WgDLa3od4€®S98D30JEOI%7TezZ274¢ESgz€ffdJI@7HgSq$p4paPPApdO¥8oa9s3O3JFeSWieHRaCd¥1Av0dsEaEaAIgXxI0DIOlJLitIlLyi¥dOLz38Wes3aTsYsseW5@aa®s3aeydy4ydARbi b{ P|(1oI1|t|{|j0O0OYldtM1uKKi|§|{!Ii|{3FNIKXI2|OHNTMHZOaI0I0O0NOLHTS¥WS3OVI3VIDKNdAHHRWIYSSOIHKVHIDOpIgWLTIYJI1OINVZHRW3IMLNOE/OFEITAII1L¥HYELBIWW0ZTH3SIYISAEDANODSNBH4MVEVYENBAOaYHNIS14IYNLSIYO3WNLNHIViEODYSITNIWEYV/AIQYQLOMVMIYQOIETXLUYHYSAEIALN/VY4SSTNTIW/IHOATONDAMHOEI8EMNY9YIG3NtD¥GLHDSIISDIDYAY{S |{S !¥ {H ]H }{I |H {}¢if|B {{]|]
CHARTS (CONT)

gs6¢ g6 ¢

265

Sn &n Pn R Sa Gn Oa
o6 Gm Bn fn Tm Bm Sm Ba Bo Gn 0n On By fu fm Bu fm Am 86 0m Bn 5% 9N A Oa On On Pm Om Ge fm O Pn Bm fa Sh &R Sn fm 3x %o Sa

CHARTS (CONT)

G oo

e
e
o
(o =]
— -

e Wi

G s

Gl G

- o

e s

————

—Y

———

[

olo vis

m
[$4

[]

B16101T1Z1E1¥1SI91L181I61011T
tirtrzizizizizizizizizielele

— —

—

3P€4E111I9YE10S99T=QbHeBe‘i7eIllWqDAKAJ33AT=l7Ptii1OeeTiWdded==1100e)110=33t1=e3me=|4

e an

—

HAISIOIY AUYWWNS d0¥H3E MIOFHD ANTHOVNW

1Ae401a7i19le3gd

HS3OH

)

FRREE

Z8H

sa ba Gn Gn dm Sa Sa Bm 6n Ga Ta Sa 6h Dm On Sw Du Fw %m Sn Pu Gn Sn Bo Pa du Ow bm Ge

266

Bu On 4N On Du bh Su Pu fu Sa Sn ba du

CHARTS (CONT)

——

—

o0
x

ws.so-'xl\‘\.\l\-ntn

”05'\0»'5#\.0.Isl\.s’~n.\l-&Qs‘-'\onn'\!\!hleqts.;nso-!n

267

CHARTS (CONT)

Dd18

° 3

449461
HSAOH

8Z000 X0000 X0000 X0000 X0000 X0000
05714 43¥D 434

154

y1+(ds) 81+(ds)

(ds)

o
o
@

169¢

Gu Be S&

B& S

Sw Ja

Sun be

ToLd zoLd poL? 90Ld

soLf

268

pTAelnIoiydllsiy3DaU130dI1oa3u1zs3iIadsis=y‘1=A%0IPTOoWOIsB85AUdIa@I2Ue@die=s3e0y=I |A4o4bl|
|

Ba,

Foborod

= t 1 =o lostazadng + +

+b|01i|0TIe0aOHCYWL088OS70664%TC200OT70I9LOT2LWS0TICLTST3I2$GnCTO0E9HTI%LUT0daI83v8I3TIAT66yWYDS00IIMTNT1OId0TDAZTI89LCWI3ELZ0NIHCOTWAZSWCYI€YEZTL€3ZVILE€SHT%ZI»I0ZDL1Z3S0TYI1CEDTZZEUY88ZZ66E]Z9LL19E6Z%¢«66%EdX0.S¢€0){H®2230TS8Y010T1.6bA80f+0l1o%I(
P+-b|0TlpaCIddAO4t6e3o0SdOtObde0bLDCeBTda@bTP9aOItWSbTot“ZIa<EdT0b:IPa11t>eI§cTnb1QIe0o06tOaH==TiOIn¥JTLtYd8AnBT3xUtL3IatsIH9oyIZtLaSoICZtOZEnD€tIEcYZ¥tvZabZ0oI7tZTatZoC8tE6baEt!eLdt&6a9t0b0a€t0do%tS0o)t09ZaZ6Tt¥eTaotal{&|00t+I(
CHARTS (CONT)

dwm

Mm@

269

P1e2I02i18ie03Q)

CHARTS (CONT)

<0:1>S1lIg=£¢1T®H1058325014

U§0OdZ<T¢31D=e:13>lKS01Td

¥OLD3A

$d4+940¢%

AWHD
SHHD

snatun

J%+4d8D¢ ?5+84808 8+d490S 06+498DS 0¥+d90% bv+4d0s 8y+d0s ye+da4ads 02+808 04+860S RA+8HDS

01+980¢ ¥14+8490¢ 81+4940¢9 21+d4d08% 0Z+49408% 8§Z+4d90%

0484908

AWHD

¥8+34808

I0323A

MH D

86=N1L

U80>7e3l1]d1ad0e8l3]q

Tay573Uyl del

3AT3D3Y

p1a0sNn

Sa
Sw [pa 6o e su Sw P S su Su

Ba Bn Su Sn Gu Su b en Sl

270

O¥OVYH QdDYHW
Sa

ba Yu

CHARTS (CONT)

@SNOSERPUR8NQIUN1030974«UO+TI9IXaUa=9dULV¥EW$83IDP®Jsdwnf‘uoioeres

°AP1paI0OXOC3GT¥H=T7pT0¥yT2nToT0TsTZCZClgEud37ZZC1ZsLZTECECE]

¥0J1Y=XEgRF

Fwm

Sa, Go

T08¢ go8! s08¢ 08¢ 8081 oved 1 8!

SYN0ULION3A

§Y8¢

[ A

Mn, fu

gis¢ 618¢

—

A4 vze!

1zs!

OL® ,D OIDEW TeA37 §3J0yD

271

agoy 4 0V T2y I#YQay £4 qy Za ay £4 a v

€14a y yda y £Ra0Y

THSY

272

3284

§68¢ 968¢

gud

SAd
2711YD
§171Y¥D
38YD
13590

TdLAD

o54

01034

g4984d
mgsd

¥d0d

EMTINK

drnu

Hd4lH
UMK

43604

$0d

bang

idd
MHg

AdwWD

$5dg

£EmSId gal1d

24514

pddwD
)LEL
AZAWD
adLAD
49LAD
HELAD
9dLAD
MALAD
MALAD
8T1LAD

4dHO Tdwd

1L1g
miig
s4d14d
no3ng
£81d
nssnig
DEnNg
no3anNg

T4HO9SNI asve DLHDIaYHELTsgY Le]El8 AD9IA2NK T8YA¢OW Ay0sH SOaAOdHW TcAlQeH

2i4AgTQ

sgd

avD26d93 M£LE7Idr1ADICqQ3g%43 TGT1ASI4Od0¥AWSONNTW
CATINH ECTINKH £47INK 1INy £TINW ZRINY

150494

n¥xro54d £€d018 210148 £101d

GOdHD
adHd

RE-R
Ky

Ra23484g dM1TdILLAADD 193z GTONIT
6o¥3adLL STLdgd4ASMLL4YAALDDAD 86£00t XAANDNSINT TRZAQOH
1a(1X66z4 A4K1R0L3A4D Lé aAoSN0I1
SaL03tE Z£Z£Od44a3nAAai1Ia4Qq 89 d dw
g%B60 ZTd1RAIqIQ Lz gYAOH rIGS0YHd
89¥9L9 2AJI4dQ1o3x343 gvL HOYAODH
99S4 aAdLsX33
39 Z1X3
ANOWIY

s6d4d

4HSY
DHSY

SHHD

FH D MWHD NWHD g3810 ay¥no 4 710 DY1D d ud £24HWO

£MDIdE
£ds1d
z1e1d
£7181d
BSdSTd
ZrsSIig

MSdD1q
ZRD1d9

RIASYD

MYZADH

03740Y
$8790Y

Z1aay
9d44aay

"doy

24014

s ®

4154

saTgelpue$3I824d UOT62IONIJSUTTRIAWLBANDsaL2AAL443>[dp2@P0DIBXA7WiD1OH1N%A2NTH4NaW1
13y

PiIABsR®Il
CHARTS (CONT)

PIASaI TL0Y

TyYHSNd dHSENd 13¥ THOWHEY ILOW3N PIASDI

4609W3 T8A%RI L3A0483 460%83 0ch4d

g4LAD T4LAD a1iAd ATLAD

Bun

204

6 84 198¢ 98¢

1034 5354 noIoeg

pPIlAaSgEaSaIl
plagal

CHARTS (CONT)

PpbbDliiIaaaAgsgEsa2®elzI]l
ppplIliaaagggasazalx;l

Piagel blAagsl pdagsl PIASRI plagses Piasax piagal plagel PIAgDI PpIAagal

ZHENS

HLSL

sadooml)epol@1Agdos2poo«(X04

plagal piagaz plagal

8pla3gag gpla3gel 0biIAgalg §piA0asQal 8piag0sel

IPIAS®I

¥PIagal 3PIAa6sel

PIAgRI

@ goed UOT1IONI SUT sweN

piasal PIAS®RI PIASI plasaz Pisgal PIAS®I Pisgel

pppPIIIAAASSSaa3llX
pilASal DPIASI PIAS3I pIAS I pIASI PIAS&I PIASaI PIASBI PIASI pIASI piasal pIASI piASal piASal pIsal PIAS3I

HALAD
HALAD
8§9LAD
A9LAD
HDLAD
TOLAD
KOLAD
GHLAD
GRLAD
AHLAD
THLAD
HHLAD
HTLAD
THYELAD
GERLAD
HMLAD

HYTD
HAHD

HAQOW3
HYAQOW

HAOW

£504y

HET0d

DOANK HOBNH
HEDVY

piasl

pPiasSal DIASRI

pPIAS®I piasa pPIAgal piIasail

560V

p§S12ui7eqYdl

6PIA8SI apis8z

0DIAS8@I

6DIASG3I spiaag

0¥1o SdWD

SHIAD 9TLAD TOYLAD

£ORTIQ EHAIQ 3Q0WE

fa B
B e Om 0t @ S S On 8o Bn Sn fm &n O Sm On G5 8n Gm Om Pm oo On Fam P &% @n en fn e 8w Ga Fn 3a 2n

273

MHEdD1dedslid

Sdd

A0 W3

LB
4181
MONI
v
s4

6Y Yy av

plAasal PIAS®I IHOSNI THOW3Y

43svYd

ZaAlLd £EGAIQ 49518 £€ds1d £4014d
ZgAla 801AD

£SdtWD 2841¢03 J#HOIEVYW Jadf¥gS M3YA¢DM M4YHSNd
SA8

s 14d n 3g

S04

nopaose

Qg MdOvY
0314

nyLog

ANOWIN g4s4d qdd DANG noang

asr
dW{

J4D

1038
11034
4154

SdILAD

D359

d43808d
"I4904dd
INDSNI

g9y

dSLAD
XAANT

Ld4a
X10da1

z£Z2Z ¥ddns
&7 94€ns
d10n
dON

amMIAD

£Sd10PuW

Y2 INYDS
ai SOdHD
o¢1¢ masg
Z€tt%€ mygTRIAD
dMLAD
dAOW
Lt YddwWd

L%AELAZD d9lL2AD LdAZId £8DAZ0W J4NY2dS SDIO2AOW I3DNLA2QOHW

DAOH DYAOW DYHSNd ¢a ay

PplIAAaSsS?aIl
Q4LAD

444D
4IS1

MALAD

saTQPR] pue $313IPyd

TALAD 49LAD AMLAD 4 2Y

MDENH
m3SYD
MAOH
MdHD
AWOONR
4114

CHAIQ

g40v

THSY NW3 ATId3

(Al

£aATId
MALAD
adlLAad

aqou3
axniod
44IAD

agoy
GdWdD

GAOM a93INH

46 oy

TLOSNI

¥6

L6 86 66

ad1d
0¥1D

4IN]

¥6

441D
96
423a

MALAD

MEZAOH

dHENd

adud gl1d
16

s81d

sed4

s4¢

AdHD

CHARTS (CONT)

204

ns nig 94qQay

Pu bam Gk Sa Bm Sa & Ve Bu Bu Bm Bm #n Sa Ga bL B dm Sn fa Sm Sn P

#a B4 D6 Su Lu Su Pa Su Ba du Sun 3w Su Su O

274

CHARTS (CONT)

AHLAD

piagel piAgal pPIASI piagal piagal piasaz plasaz PilAgRl piasal pilAgal PiIAg®l

I9dLAD S8LAD SMLAD

piagaz pPIAS®I piasel PIAEBRI piasal
L4:]

(A1 td

6Y vy av

PIAS®I piasail piasal piasal pis al DIASRl pPIAS®I piasail pisgax pIasai

HETD

HOLAD piasSal piasai pIasal PIAS3I pIAS I

S §s 96

131 v

as 36 46

HO3NK HAOKW3 HA10d pIagal piasal
]BRI

HAWD
v¥

¥y

piasal pIABRI pisgal HALAD pIAgal piASl PIASI piasal PIASBI piIASal pIAgal pirgal piasail pPIASI piasail

66 ¥s

¥o S9

GHIAD BHIAD

HRLAD

pis al pIABRI piagal plasal piagal pIAas®l

€6 ¥6 S6 §6 Lée

pIasal pasgax

PIASed pIAgal PIAERI dHLAD

-F7T¥% pIASel

pIAgal

pIASaI PIAS®I1 pIasal pIasal pIASRI pIASal JOLAD piasal pIAasal pIAS®I PIASaI piasal

€OATIQA HOLAD

PIAS I
ppPiiInAAssSaa®lIx

pIasal

piAasal pPIASI pIiASal pPIASI piasal piASal PIAS@I pIASEI piAgsal PIAS I PIAS®I PIAS®I piIAS3I piAgSal pIAS®l piasal piasal pIAS®I piasai PiASal pIASaI pPIASaI DIAS®I pIAS®I PIASaI piasal pIASal piasal PIAS®I pIASRI piasal
-l

-t

-\ CRLLY

.;m.-qmcmn.w-;onn-.omo~9~.ml~b~.-nuwnoguosmm-.-qou.o-.-uo~~.u--.

86 ¢

275

CHARTS (CONT)

& on tu O

Sm Bu Bu D

85 be 06 O

Sn Bn Gn Sa bu ba Cn Ya Da Sk Sun Ye Sn Sa du bk Su Ba Sn Gw S

276

Sa Pu

om Gm

3 2 3

Zin

CHARTS (CONT)

Xxn xn e

]

DT D D D D D D D D On

DT T 000 00O

W D D Dy D D Dep D D D D D

Dh D D D DM DN

D Dee D Dn D Dv DM D

Mk D D D De Dee D

v M DD

o eS

Wd D D Dee D D D D DmoOn oD D

e
o iR

DDy D D DD Om

O M

Dm0 D

D
I

PRI

]

ssaippe.le

ssaippe#s

¥ZT8 + UOTITIsCd 37 pPlai3 pue)

&«

pe=sl

EOF

0
o

juswaseTdsIpP

@
4

aintosae

£¥
g

wme

L
Ll

H i

Hé

H 4

H £

e£

B I

MNP N OO0
O
BB
T« IV B
V.
V- 3V
COO0OTCOOOOOCOCO

ot et vt ot wd vt vl el et et
LIS

H£

-4 &

Hé

e ‘

4£

&£

&é

2X30H 8 &]
° é

H &

= bn

S 8 &6 1“ [2A L3A Sit

¥3l
H£

° £

e F

a F

= 0
= d
- I
= I
=

° 4

®4

a £

H &

& &

[ Jw]

hail

-t

277

H I}

'y
i=

H #

®4

jood

CHARTS (CONT)

(2N

{sT301bgI03eyU4T0)9Dd

@01A93( Isidepy

4d1
449

[<KISIT=-d3I4ITYN0>]<dS>]0DIP[<¥43>

9T®2BTD¢JIAST1A 2$3S429IpPY

ZPSIToSm T§e83D1TDSpPApUY4 1au5ld

Dd «> S$823IPY

[(K<ISIT=HMITAINTYNOD>] <d8S>]<S[€S3dIAB3HdZsAYIe>SnY><SudToS<T¥>b33ue>U»s<O0YT1IVd>€4D>

<«Yd+I4vd8¥Sa>dQ>

<¥I><d4D>

<d43>3

{

o 8% Sm Bk Ta S

807171

By,

D O = N
€3

wd e

vmd

Ba Ba Ga Bk Sa &5 G

D D
v o

d el ved

Oem

<SdIHDSA>Y
)

S& 64 08 D Su bm Su Su Gu fa Yn Sn On Au Om Gm Su Du m n Fh Fn Pn Ew sn om Su Pa Bu bk Ja Su A Sn Bw b

o vt o vl e e et
v ot e el ol el vl e od
Ga

pp > n

<¥O>

5217

wed o

e
et

M
oy

(o]

Dum

278

ij£¥6¢12IDsUmBoYdDden2TpqopauwezZUiOPuTIbOoDOsNaIi1unS9U3I510pBgawITn*Id@e3xT1a3As5RDUBuOtT1idnp0JI3P0IU9Tsu%I38I3n9oIgns i]

§i][|}!i|.i ¥¥SL3(87e%1I1T0ds18IDm2HoI39d4A3UlOdoUIn$STBI1ITT1podTQng2uOIrBIl‘3s€2U1eSO=,uY<yuH0eJi:dOPT1Ne13>0pnUPuoTsl3SIas‘OTxYHe®yHAd‘‘9pgdI1®T‘U3RJ1S0Id210P4034g10%UT1L0IULVOH0l/NEuLsE*eYp@Iu1SRdAWYoOD |i§b|{i]}
#1Jam0ddnpue‘Bujloog3IngpRA20gWOYIOOUWOH¥ |
CHARTS (CONT)

{ ITYH/L8YES3d121Sd4@sTelbeli1JdelswieapuednIsmodZ71

[‘§HSp“U{IO1BA@eTaU3DT¥N0OyIElYLWN4mP1U‘BI¢§°i0IrTHSLX4ROegdsTo f0Ua=JPp@iObT30Ip1uOUI0NowODCLByIHWSX)AUTS>y 3iWp€I§,AdSYUoluMbI1COewnGs9dbuw uL19|2Iod3At5rTmY7i4®etonHsudo

Pam

279

wd e

LN
A

O L] s]
oo
OO < <

vt wd O

[

]

Ead

-t

CHARTS (CONT)

{

JoHMdd XIT¥vd €1 0 4n0o¥d 13D 0L Q3ITIVd o181

WONY ONIQYIH/ONIAYOT ¥0¥¥3 | Z2%7 |

% 38 Dd ONTLNZWIUONT HO¥d3 | LTT |

0d4dl ONTISSIHQAY HOYHE t T¥0 |

{

| SENO HLIM dW3ly ONINTIJ ¥o¥¥d | TS50 |

280

CHARTS (CONT)

spuiodtnuidlaeojxuily $‘%s1T3se1bdIatpjbuoyinl 1wIO2b30os3$5uA3lS0IegBW134y 2Ips3AutpT1e3Ioi1EaW3dNsp 12iInpsed0Did

OIDTHW AIT1I3A

vLzt

281

1TP3

SZITETITUT

tBeuwtisieqs b1utrTieogld

161I3U0D

Tsaen

Iabpuoewyd

OIDTWapoluot31drTIosad

ASalNToOauIewTUsiBwITRpjIuIaOywSbTauWbeeaunew379PT3T4

T2«OB3JepXIq[0DIe2TI)4wd

a2nany

CHARTS (CONT)

DO
F D D
i (4
e o
Ry e
B
wd e el wed o=l [ Rs Ba K
[t B aa Bad B ae at] o T Wat B Mo Bt Bac B B it Mt
Bn

o O O
O~

et e

emd wed el wed o
Swm

vl et ol el e

¥n

282

101313 95 9% 3ng

210 SNEINN PaUBITBUN

10137
DuSW s ALOW
10113 sng€1 dX9% DHSHW

e on fa B b Pm B4 Sm 6w Sk 8n Sa 8n O ba ba dn Gn Su e ba ¥ Yu bu en eu Ow B Ga
W

€% Bk Dn bw On Sm Da Dh Ba Ve Y& Om Fu Pe

CHARTS (CONT)

e mem

TR
e

=IdFH %o8UD ST 30U ¥0

¥Io=Fey0Yud

2 owe O

dr o

mom o Ay

e oo e wen e wm

wn swm aem e oo

Mooo

T
e T
.

of e

o oo g

wmn cam dfn

cem ome omn omm
(

s oe

(

4g¥d/Ksnd

<pn——-—wm-~—4y_-——-m—q’mm..q

oman ol v

oo mm mm com o omm wnm offe

Wp=¢uasban

7
3T

O ol 04 M

T¥=d

.s.b\m;u-.ls.hsl\'\'\nmbu.nsn.nllse\w&lm%fl'mlhDQDM.».G;lmegnnlmumusfl\imlm

283

(¢JA0q43yDlHUT¥IoRwOdTF*33U1TTINenZ0xpuURPAIRSIPURILC‘s3TnN®I£95YTd87p2TITIpOW

“sstw g3

<0:L>13540d4)1TIA29*(paiasaid

J0L° 42 OJIOTW T=A37 $32Uy)
CHARTS (CONT)

nn-\-§.\t~o-..bm,olusgo‘om.luusIn..um-\.nnu-nuhfiutg-\enhnluuuaniub\bu.h‘-.n-unnb%nno~nfi&\ttlhmbn!\.h&‘%onnt%

284

CHARTS (CONT)

&¢

285

CHARTS (CONT)

)
i 1 | 0 i 0 | 0°03°YM | NOTS | (M14gn’amiILAD |

§TO1o0dAIe02yT)W

ukh«.lflumflubhlh

ac....tneu'nn\u\fin.!u.Iht..D\Dnnh.-..tn.nh.eubq.bu..0htmfl~.!\fisb-.uu&lmvulsbh';anl;!mflntnin

wed

[ [4

[ag]

Mo MRTo " o]

[Tl

My
e
oy

[«

U Yy N

13 " @ Uy QO M~ w L= e

<o
i

e Nl

uy O~
[o Mo o |

ed ot

Sh 9n Ga B6 e P G Om UR Pu fe On Su On

286

o < &)
b A L
¥y ['e] [FalTa BToIR) gl Uy Wy
-t wd
el el e et el
on

&
om

uy
uy
ou

CHARTS (CONT)

(8]

'sh';b\mann.n

nn.fi;'\.sD\MO\D\&O\.l-%'nl\os.m'shnhInml-hIsont\&'nhwh.mDs‘mn“.gl\'m&»iul\
O e 09 0
La= Qe J0 o i oo

TLETE yLS1!

B6.

287

w3
<o

CHARTS (CONT)

4 + + + + + + + + + +¢
3i¢LON

288

HBUlsSRIpPDPYLYouwlg

CHARTS (CONT)

A Aa Sn An An On oo Bu
Oo B Om Gh 6@ Sa Ba Bm 06 Pn B3 Sa Gnm On On Gn Bn Om fn Gam fa An Gm &a Sm On SA e

=
<

O
oM

OO
DD P
ot

od ol

289

Ll
Am

60L1Y

CHARTS (CONT)

|193130+++DUTS31IpPY2DOWi

en o bh bhoBe e Ba be bm
om bm Gm Ga 6% 46 Sa 8w 0k bh ba Su On Ba 0n Sa Su Ba S On Su su Pu Sa e G S Sum Sn fu bu dh

290

CHARTS (CONT)

LSATI LyHI FAIMA Snge

Ny 4nc¥s

3
SR
T, =T
.

T12417Y

o]
b
UG

THE

18420 vdd
S

a a

B @ Ga, A& Sm Bm B Bm An On
ou 6m 8 Bm Gm Sm 8 Ga Sn Da An On Sa On B Om G On O D On @m Am Fe Om 6n Sn S An dm Sa Sa 6n Sn an

8sL1!

faa)

=
W VR

TM~

RV Y
0 VRV
[l

TM~

g g

vl v
Gn

291

CHARTS (CONT)

dOSHIAN

1¥4

(s2) (32)

(4g) (0 3 0zl

(0¢€)

(v8)

i¥ge

YEYATYA

(8g) (vel

(sg)

NgaTHan HITMHAH gRTYATHDIHETOD INY¥D
(azs

1 @

h\'b.stmisfih

l\'tt;l&l\a\mog.uDmt\n\ogfln&q,an-nonon.wmfln'hfl\.uh\.\h;%fih&sm.tNauo;

o O

et {4 N @ Wy Dot
ed

el et
et e

< o

v W@

D an O

et b

wed

292

CHARTS (CONT)

(v0) (80}

(vi) {(a1)

(312

(303

0IDTw

LINIOT LNYHD

avid

b .

]

oo Bm Bh Bm o 56 Sn Sw fa G O Om On On Sa Fn Gn Om An S Rn fu m e An Sn 0n On e Bm Bm

Ba Sn An R 06 S fa 6n P Aa Om Su fu

o0
N D
NM
@O
®m oo
Do
~ e~
oD Do wWmoaomaoMmEdD @@
IR I o B B
A
IR A
I
e e IR I
P
=1

293

CHARTS (CONT)

GR=HaM AN

(92) (L2

(623

(8>

(€2)

(0€)

(4¢)

(¥vg)

(s¢)

(s2)

a =ndl 4d1

H s

H Fd

v
W WO

BRORHOO

et wed wf vt ol e

2 []

e
Sa

1 4

- Fi

[aa]

(=4

<
o

onf

L1061

»4

H Fd

3é

H 4

»4

H 4

1261

H Il

H F

Né

@ D DD -t oTM ~y
e m [ag] 7y lad]
R N

TR OO O O Oh o o Lead

g wd ed wed wd oed wed o vl Su
oa ba Sa Sw Bu
Se
bx
B & Hu Bbn Ba bn 0n b Bu da Sh Su fu DL Pa Ga Sn On Su Su

294

i|}W31||SALd4NNS9I0I¥TIMS=¥=>aY>dwddH"EI2ED0°T°N¥OEDSIdNYN=I=->>DSaOmTY||S<<HI00AHWt:LeI)>>=gS>TmOITIYHMXO3IZ=I¥>A=IH>NSNA0SOHTd)N(0ST3,I.0(H0O04€=||i¥¢<0i¥S>0sa0(r{yg=3||+¥1<vo0u>3gsn0I7S1YI||

¥0d4 €=¥ ¥O ((g=3+v¥

CHARTS (CONT)

4{1|0siA§NDIS=>473gND°1|}0§2Ai¥4JNDISe=3S>dd7°140 bdw0|L{iSuIvSdg}O=L>gdN2D |a<(gS}N2I0=Y18f>2)H>i83.D8>°02SAnNqS=9n)f>8vyY1S <I|SJNOT0EY>¥=E>H8S2=0n°291>dr3=Y>D20"I<|Sg§24AOMio0=S>YTE=ks>En¥M1=EaS>DTydS]<S|w€NIg0¥:Y>G=kT84>SnE0xMN7°=>u1=Hv>E4Yd5

HOJHONYHESNOTIJDNYESNI<0>d€D0STI3S413FHIHONVHENOILIANOD§I3NdL

|o}|GNDIS=>480°"1Sd=>gH|<0:TE>AMIGd=>I§8170|1930i
«¥€3@92158/LUnD9

HS41N<AID>T3LYInD8TSvN

¢a:od

An Sa Bm Sk Sa On
o Bm Ta Bw Sa S6 0w 34 8u De Om om Se So B On On On Ba Sn Am Do Sh fn Sn Su O @m fn Ba Sun 8% On 0a An 0w

1L67

295

CHARTS (CONT)

asgd~gn |
10

o°pacdsad |

L*®3 WONY | SHIHLID 117 |

0%
11
01
00

296

-..-gm.n.useua.-.nu.asuun;ou.

-.-~n.o-..u..-;-.a.‘n.n.n~--.-\su-;n-m;p..--...sm-ucgn~.e—uo~umn~n.-u-x.o~ag-unu

{
00
|
1 aaENIIIANN |
] QANIAAQNN )
i GENIAAQNN

o
o

CHARTS (CONT)

]basmonnedQUesod b

|€m==17yjmamnm}]C=ph|Cm

AQB|=Ye=swa>=|b4m=oesm

obSem

[frme B=> ge=>|
}

{beo |=€moeufsy

}
|

J0L°

niy

D|{a1ejlomo=d7>m=a bib

{

}

b
|

}

55;.,3'..§s§egu;.\lulmnstmuunnn-om!mbuc;-\O\nnn;t\tqnuo‘-gn--mu..nano-‘;l;in'\‘b‘h‘h'\“"

£E0T¢

297

}

{

CHARTS (CONT)

]

}

{

}

]

nay

= o)
|

= }

j&m= | nny

}

[

}

]

{

]

nay

e Sm ba Bh bn Gm on Gn b Hu S on S& Ba O Ya Su Bu Gm bu Ph Sa Bn Sn On Sk ba bu

298

}

]

Ba, Sa b Sk Bu b Pam Su Fm da bu Sun Ba Su

CHARTS (CONT)

ANYWHOD) 3 (SNIVIS
G

—o

3 JFMEVL Z - @TOSUO0DH @0®3I83UT

[

0=4vd (vival

48D

o Om Om Om Gu fm Ba, Sa 8n Su Ba ¥n G Gu Fa fm Sn o5 o em S G On A Em Sa An

299

dIOR |

i ¥y¥OaYId/T
]

4ngx

i dvdEDAYOT/THION |

#®

HYHD =3 <BZIGZ>SNEM

<TL ET>SNGR => ¥YHD

T=¥VUD

f{ LIYH=Z | IEYNT INI=Z | ANEYND INI=Z | (03 INTI ¥IAIZDAE |

}
18-)22

S es fn Be Bn = Onm Om b

CHARTS (CONT)

. o
J S

1234N9 B18D I3A91D3Y 2 4ngd

—

300

EIN

301

LIS

1400=17FF

32259

}

2BIN

67
66

0CO0=0FFF

®
=

BUS

5
8

5
7

2411
019 8

1
7

114

112

113

114

115

116

inverted

117

118

119

120

121

122

2 212 2 2
5 413 2 1

08U0=0BFF

3 2 212 2
0 9 817 6

3 313
3 211

ot
=t ot

]

wCTKRL

0400=07FF

3
4

note

U000=03FF

3 313
7 615

616 6 6 615
413 21 019

listing

123

124

125

126

127

128

6
6

]

111

1T C

616
817

}

RSRC

LITRL

129

135

141

1400=-17FF

130

136

142

1000=13FF

131

137

0CO0=0FFF

133
132

134

7 6
0 9

138

139

7471
241

144

T 7
4 3

145

0800=0BFF

AT
615

140

T
7

146

0400=07FF

12111

}

MUX

ALU

5
0

store®

ALPCTL

control

1DR1}

BUT

491
615

141
211

4 0
0 9

| ¥

8¢9

386

010 00 010 0 O 0O}
817 & 5% 413 2 1 0

. g

prom pattern

to acutal

100

101

102

103

104

4 414 4 4 414 4 & 4}
9 817 6 5 413 2 1 0}

inverted
A&

£l

11
4 3

FCIJdY

with respect

105%

106

107

108

109

110

5i5
211

5
3

515 5
615 4

oo
e
e
e

1000=-413FF

for

b
5

ROT

map

MSRC

layout

;2258

|5Pwi

ROM

4w
=

MISC

PATAILITI

Charts

iPIPI

Level

}

Micro

0000=03FF

. TOC

6
o
e B

72216

22205

CHARTS (CONT)

MACROS

«0°88 NDISIAZYs 201° 919¢¢

¥H60OIKWD
on

D
i
n

302

MACROS (CONT)

€d4020

430 0dW3IW ¥3I€E€01D

14030

303

141

w4LI.0A9SC/9ITSHI4°aYL"3T5/A0S

L3S A

139 (19¥14)3LT8HM

Hw0D¥T4°
DwINIONWW
«1D¥TA°
801M8xIm9VDV,SSTA1LL"3SS1///3S/DSTHu
TIw0OYTA
OwL«wI0ISdNIAIN°O1IONWW
/L1A3S8//D0SDN8LTS3WI3SIHHWS/®Huu/0Lu"%Iw1wTS4IEI/xDNwDeYT1STO0IAVNnWdsH
wDw«EOVT4
S1T«1I3SI0DSIH¥YL/WsTT3DO4ALLSd°I/II°LVS0SHL3/S/A3ATSSwa//ZL0DAONSSVIIT°Tv4O4uaNWH
DwEOYT4°
/DLDSSADATILS*SLS/I13IATDSS3HSH//SsNE/"DDwISl1*NYWAaOLLNEsWSS/DSIWI
1L338S ((1€o55¥¥T144)34€3nAsN 1IIDI#Lw1w##OANGwVSDN0DYT4°
Tw18IEOVTI
/D3YdXTLA°'L1A/3S2/ZD18SAw

L1L3d¢Ss (90Y1759Tv57¥41341)01z00a€40y(INIONW
113388 (Zoy¥D1¥4Yd14)1¥07T49
LL113338SS L((Z€N1D5I9YO¥¥7N7T3®4AW)I70T14I3NWH240W
1L1d333%SS (({(IZ1¥9D559v¥v¥¥11174441))0)3108a7I¥3¥dN9A34I30dDZ4dI4Y0
113388¢ (MO0PY9OL¥I1TS4AID¥N1D4IdS NYS

H/¥yw(AJ¥HSA/
uINTDHNd 2/a8HNEENxG sl

#
B
N
S
H
S
d
/
D
Y
S
H
a
FNYHH¥0NLLSIEAHYYQON¥4Y3IM$L08dI3G8IT4HI4NVTdSSINNSTOgI VFANTIDLXSDHQ ./ww»wHdILNOBDINN/Q/L®TNXJLHEI1LANHL1E¥A0/ENM1NSNLLdIXsYYI/NL/ONGD. STH

HSNd +894=88%
$83D0¥d LINI
wynL3y {1
L3S138 019%74Dv¥7T4
1381Las £D¥14
L3S ¥(adsO0o5¥14)v¥d

HSNd

304

wHO/ONY B /X AR DHAZ/DHSE GRTMHAR/THLOM FLTIHM /SN
wHOX /0 TO W/ XMW T8/DdSH GR~daM/THIDOM L THR /S8,

d¥YMION®QV3d

305

MACROS (CONT)

WIN®TOLIHNM/STN. Sw«DANS°I"ILTIY,KR/

[ON1°OLTO*NILOWTNIYd"xUODN°OHDOM®T[°IL1TW [DTF1OLOING4WNHY*

HLIds KHd

DOJ0LNTOYMT dIYLOMTN1IDdOTMNLYdTVNHLIO aNOALDI3YIMS MON+°I0L1TUWA DIT°L¥0N°Y{IAW
306

MACROS (CONT)

W [TBIW=EGH ILTHRNOD /THL DM

307

MACROS (CONT)

(g¥)1X38TM¢ 140d4~D04

0((1°8¥¥XT03M°a1[1X143°dZ¥T-8M(°q1¥~q T+2d"0d

([$Z2°74°
114W¥TTMMQa d901°°¥(¥19X

[1Z13171Z2°480X°Q"0A "[19TW1ITZM°AQNY {I{w91W°8T¥7M0°a [10LITZ+ATHNYTA ZIS®XNDO+([1¥TMQ T={14"q IA1Y=(={3d70 [1W={1¥7C T(8+X2)1dITXM3s2TdMd ([1W)1X3zZTMa AQ[IU19YPZHELTITUIZW7C
o7d ave

{1WTMdQ 408

ocEgnx°a~a [1WTMa [10LITZ+[I%TMQ (1¥={14WTMd [101I1Z2={1KTMq[Jd[4I°RaTNMYQ" [1dn°T4M0a° (I1w°8TM°a 1="07a 0T0"a (1KWD¥T0MXT°Mq

308

MACROS (CONT)

sHO/NMTY S Y/ XNK OHTZ/L0d ZB/DUSH ONOTH/ HdS TR/ DHSH BRTMHAW/THLDH.

0=[18"6r"¥dd (IW~Vdd

O0=({18"gr"Yd

309

MACROS (CONT)

[D1TWUTOMDW

LXI(AZ¥"SH0A)HK

T="HDSHINW

310

T+HARTOdHILN

SW«D,8%dO3«48ONTH8O/THAO/HNdDSgZTYOR/N/DORETESHSRH°/"OTIYd+3I/dZXNT/YMLIDNOdDM+DETXH+NSEKIWTS8Y/V/XNS/WINW/HWTYOAH/TEVNI/NYRELNI0O/IYSDH/SNBI/E+YIO+
BLAG/3dALA1/32I8A wOHIZ/WENTY

KT(gHdHAAIEHTGTII0rLdIXWNTIELS(TN~0IW°0Ed1(CWL8LAI°L0DLHI"NDZ"4H+OHYAXWI18T° .eM...sKSOswwEDKdRRO¥RKeNMH8#R3dddTNAEd#dOO/SSTeSSSSdDSHTDZT.OTIOONS8HWOOOORHNNR5/NN/NTN///DOOOKBD8OO‘IRTTOTOTdT/OTTAHHNHNHHS8HNHS///D//wO//OOSINHHDHDH//HDOT3TEOOUOAUDDOAN8SWSY/WSRONUHWR/8HHH//NSS///Y0DDTHHDMMDKDO8RYEUAEEAEHdAHS0/WSSS/S1S"H3/HH8HHRHD80A31/TTDRXT0DT4X4‘HU//X8H01G8SNESL/IX10AdRLS’IHKN4LHZATZI8HW0WTTITETM0d//N8ST/M0WD4ATB38SL/TH/d"Yd/UUI/AI8LAHHSL2WTIXTTUX8HOD//INE/NUWTXTI0HKDD/E/NZT/S8/IUXHLTDDHWISDMTOHNIL/HTST+0HKIYISHEHSI8A8LT/L/HNTI8HTIMH8‘MHTOT+T0"YVTVET8410//XTNFY4+8¥NdI1YRT/+EGRWNT/cDI3I4ZKMOdY+pOTWdYT0NIOSGIL«M/MY6dLTYT+ISD0/°=YZII/dLTdYNSYNg/TOSETZ/3GII0KNRN/A0=XZ//ZL88T¥N«//RTLNI/0/SWTHLYH0LTY0L80LOYWINY8°0XMXNT/TDMNTYLARH3OYHWTIZNdY//WSOH2IX//XYWIANRN/KdSI/RWHSKHN/OS9SS0=N/0SIIDNY8V«wTF¥IMOB8s/TGDFLIQODB4IYY0NZ/R0YO4YR2N//+/GIYTNNE0NTSYLII4I/0ZYVY3H/ZLAesSI[ZI/S/TAIT/0I#TOHT‘NIYOTT0I//38M2dE0RILLICwZNQ1°0T/881/08
DWHKIDTKW.HH..uBHSSSD/DHD0D0SHS..Y84HST1T1TH8888/.///MKRSDOdDRMHAIOdIdNNSS*NSS“ODOTTMOOOOTWIHHNNNNH/R/AODOOO/HKRTTOTKTMAIHdENHANHHAOSS/O//IDEGD3ZJDTN+DdUU4I8RLY0S4SSGVI//8H+H4HDITNG+83HL22D2TY4L8S8I+C0/¢//Y8HN/8N+IN2TYT2UL/IN8Y/+0EHDI0V/U+T¥LHQUT2IIZOGSSO0+8/DEB/Q¥/48EMR/R"OY+4HANRHRH/NY//LX8XTWZ/NOINYR"X4HR/BS6NKT8I4Q5XSG0SDTT+RNT8IsTH/YSFHLXRTAZLASNN/AXHAHOTIBKIENZSDWYWL/NTdN/WWOMNZXTD//ASSYYYETTHLTKSIOTZAeS HMYEH/4NEOAITe3QsN/VHY0TIISRD/YA/3N/OD0T2UIID8NYISDDEBCYVNS+Z0ATa/EwY+Id8HZT/BH8SsD//SOQIHDVOR/wIBTVIT12OON/IH20EN8BIETTAOS3ZWIVAR/YsTRLIOM/NQ0OZTIH/N/VSETNZY/OL«0T/««3BMOZdTNRSSOI//0CABeO dAE
DHJD0DaUHd18SS8UHH5,..wTTTR88H//#OBZOORANN8NAOOSD/DTDTTWHRRHH///S¥KMHOOKdAdNNdSOSWSD/'O XD"T2HILXD08WSDA/=EHd/d0"T=2Y¥SB8O/HMS4/3RXSHY¥TDEY/MSK“=Y"ATTWI8LE/OTT=L8NHY0//TWI/LBSNU0A0dT/8XMA¥ZNLHI1SASIWASYT8/eH1*USPd/ONTJKXdw«/OHMCWH/BIOST/DPOL0D=/TdD8g3TVSE=NBdYI¥RDSVD3NUN0SI°V'H¥08Nw°CIAZEV/22O0=IOYGNI=O«YNC/IKHV/EKZ/EN8IS20IeNOTIVYYIONATYNOT/BdALOsO

HO0HTO0dWILKM0 (1

T
/
3
2
I
S
#
A
O
I
N
T
I
O
S
T
O
/
=
E
3
Z
d
I
R
S
T
L
/
G
H
E
L
I
S
T
0OAD%wTHN8d/0OWYSUNHw/V JTIL/DOHe8NdHMROAXS0TN8Y.R/SKHTEDOsHTR&N8O/AXDHNE/HT4MSKYAHST0HDKwANEeW8RYOA/RSTDOLU/HdSTYHOTKI2WXADd=B¥NR=E/TOSY/IHYEDdeE8SH YTOu«HKIATN=/E0IOX=DTYHNSE/0WT/Y «ST2DH/OAYRTL08SNRH0I"/OTV eOSNT2DW1HASOR/0A8ETIU/YDRAT/Y

(HO1K8T1M014W2I9L0H {18=0d70dWALK [¥(JOHwTMWO0<dWTIDLH (1X$0IZd¥E°W8IdE4TLMTD°N4S8T0dNILW $[14+{+(82X)3I4XIS7TO0SHdALK 1[84{(29XJ4LX7EST0M4KILN G$Y+T3O4W7E2LdRCLIWILXBZTOAWELK G(SHuI0"AE(1H(Sg{*W1dIw8M7 (HGIo1+8E"IT (TUI8e+EgAH)STIH(TH[+98HWI°[1H "1(d=-7{KdR1)I(A=1{U2d=aM8uK3Y}"{HT0S(1¥7=<[0>¥O0=EYWI{(TIO1%7T<YO=S[>Adk=T8WY)I [T(1oHIrTgd(ICN

d+edwITM{IH1 TS I=CO>07Y
(OuY+

EBwHlITT{IIKH (Z{Y1(4L18yd
({1 8+aW)I"8 T
[({18=gWl
1HK" e
A[W1I8T)7M0[IIHH58(U8w(P SEOaN°®E

(8GWYIXTIILYRZ 7(014MYWALFNryd1434734

MACROS (CONT)

{1 NTd+dHTM
WZB/THLI T NLIN/LIT0LITZ/ 108 STYR/TED4TY’ SNTTY=UEDD°gM TM00/ TSdDID ONOTH/ MdS 18/ DUSH.

160%¢

312

(T+1dWw~ L]WD+

{(ZIANCO~{IHL{FIAWNDTMXHOZDTIMSIHW

(I HOLdATM

MACROS (CONT)

(OIS
1IN H+8RTMI

5wDDKWUD.T./I03,N48UHHNHD84//SSHDDS5SDHDS4IDlHSH,Bw.H«H5u48eBTSTST11TTT88d888T8//u/83Z///ZHAKROHOMIRdOH#AS4TAESNdNIdN3TS?SSDSOOIOTTO“OOO‘OTTNRHHNNRNN2SZW0///ODOO/DOO8MTTOO#TOTTddHNHHdNNHTHIAWWISSD/S//DO/Y/YOLH"ALSDHLdNU/OG‘WTSHOT=O0ND0NLDMSY/AN/YCTXIENAAHNNOXMQTABEN20JNAT/Y/I8Y/OYRTTY/I/N'/"LHD1N0ON'LWXIXRXEOA4dHONMNTTNA/Z0WHWTKYYYX/TNZNWWWDATRLNKWXHH/K//IOTAT/I/SewKY/XXHHXd¥SSZSYGNE2BNT1KDKTWM/SLWHXd1I/8H3IO0NH"N0TS/Z8EDOSSO/0IIN2ZEDLDYWBI/08/Z0IILNS0LZLTAZLZT8ADNO//0N00LLSL4ZM3E/Z8dIII¥LQHH3/0ANNIEE/d°SY28LZONZ2ZO1SBT00D/0R4ZZdE/08L/II1/AS03BSTHLdL8d8TLEITDZTdLLHWMNIMI/IRGCY/ETTSLI//XILHNAIEONIIH33IZLKNIs248A/NXCMI/0/LNSU#BCIDL1WL/A0HTI0BTMZCNHO/LSE8IHLNT«/wLC2IGZH2s/@IR8L/L8HT3N°S/YI//O8sM/T/lI€ZEENNIwRTB8ILMGS«ss0Y/IYECASNON8'sL M3NRLO/RTE/Ed3/EdLwA1e

fIGLINZ+ERWTM(IN T=8K"[1H 1{d=KGuTM 8[{TI41XROD°C"WONY

GHTM[1H 40
[I9TLITZ

1Aad°Td°GW)H(NO°F7P[1E[GAS1WZT1HW"MCI°RP[“81AHK04"D0H°Ed"RT[MI1H(9(T)ST

SHIOTDNA/M=d2EOIGI8XMTN=/ZWIBYNT0/LKEI4NZ/LdT«0H8Y RA0aTLQ/DSO.HlNBXT/8MI0NEY/LTKI/AW MLS/DeWXOT.ECNIOHBN/I8T0/HQW9LIYHANIEMYO/XLON/0LDeYWMTKSZOBNA/IR08T,/NHIZNWHT/Y XLOL2DNTOHS"O/N8BWT1YuIHK/05AN8W/TY OM10NHSsWdTSO8UY/GTSdLOH/AMTY wS‘TDM=EOXZNSHd8/TOD/LT,SOH04ET/YH#/OHTD1sBNSd4EAO2RU/TI80CELH3A/,dYZONA3I0K@DZHULS"O4TNwAOOI/d8TX3NT/E01°CH3ZKIYA D«2TKMHS/OH8dXNH0SDY/TRW NOTDLZ0WwMPSNHI8TVHK/LIZMTAR

[T1HSY
aGNZUTITEWT
RT d
"GH)HN"GWTM[1H°TH (8

MACROS (CONT)

Ma[G(8°RTHO°T1HM)HOG(WTITYMN[O1D¥WH(OZGIRTYMN[Q1D¥ [NQKTRM[GdIuOWLOTIM[T1ZH[1ZITLIZ2°80k°GeTM

313

MACROS (CONT)

gTM 17 1B
1WWId°ERT
NPrUUTERT
(1

nI+E+Y/NIY S H/YNH TSONIN/LOY 28/ 08SH ONOIW/ MdS 18/ DUSHa

(dE81NTOwT [9187{01W

Da7=o1
¢S61Yv

161%¢

10Z%!¢

SBI%:

18EHRwET

Gu={1970(3n D={31d4" {1I3O8N47" 91{°4i*¥7wY

(1w (18" TS

MACROS (CONT)

1SHIAYRGNLT L(EHILXIZT
3156

MACROS (CONT)

1489718704

1=[1W=0724d

562%¢ 86293 40 E%

316

070TATIWTM1d"O{1+WTgM"H1d [14=D"4d

D+EdTM131YTM14d

(T1=[417W0T4M (Z1IX8NOS7=[0IW4TM 2a7{1T4Mo0d ([IWILX3E8~Dd {O1WI+XIZTMDd

[I(11{W+I)5H+dDI427I40XTdEM0S4a+dxDT4(dT1uM°D7d8°
18724T=-g47
162%°

0724

n=1d

Dd({1T01°M71242803°d4 ([IW1ILX°AS)I7+"Dd8TM3d

[D1°WHT0M2Xd* a={1WTM2d 1g4X274d0H4 Zg+X24T7g04Wd a+2d735d 04054704 1+{(8X3ILX3IS+54704d

£071735430N42

MACROS (CONT)

(0(d13°¥)¥1TMu40 (T40+1y4370

24070

317

H=f{IWTM0O

[dI°WITSMY0 d°d°[1eTM0 [H9IWTAO

MACROS (CONT)

LI+ 4Y/NTY S M/ XNW GHOM/3dA10 T/3ZISAZIS XNDD /108’ 18/ DS ONOTI/MAS SNEATHANY/ DU K.

S56EF

1[42=497%X0"40 ({1W31X3270 {J0LI727D
318

T4+A707NY T=07A"WNY 1+07aT0THANYwW1N4070Y7 T=0"DTWNY

H="DT0dWIALY

MACROS (CONT)

s STB YA/ TLOEIY ZIS W HE/L0E 28/ DUSKH AZISH/ K4S 18/045d.

319

MACROS (CONT)

SAA=G/ 180 ONDT/ 34107 T/321I5A° NHm YNOD/ZLON S Y /UNW ID+84+9/0NTY ONDOTE/AAS T8/ 0884

e MY/ TIONTIY Y I0494Y/NIY TH O/ XNW ONOTY/MdS 18/ 048

i1y oTgT avo

(Z)XNDTM1H (TIXNOD+QTM(3Y (¥PIXNO+0TM[3Y {qy1+ay= 0g¥T°I¥0y° 1(+01+070Q7 {T1={4"4a"

([IW)IX3IZTM0TM13Y([1¥)3X3dTM

T=98707114

(1)XNODTM(3d

g¥31=[14 d°H°{[1W

S4[(I1°W)THMg[]M1Hd¥

320

MACROS (CONT)

sfiu¢m§«\:a«bm.xxxmx%mwmm\mmwam.fi\WMHm>~NHm,mzouxamm\ma\ummxthQJM\xmmhfi@\ummxs

GLSY

G9sb!

321

MACROS (CONT)

1{13XN047D7 01TY4094T+

1ZXNOID4+aSdTM
322

d*nygu=(liyd

04308"CO=-E>{IWT

MACROS (CONT)

323

(14°740831°8 (10172704318 07dSOL

{I0LITZ+07YA

[+0749+07¥4A

[Q1v¥gTvMdDld3LF¢1id¥*vHd¥°

[1I°W¥T9M80°T{M3D1d937L0STM01d738L5s

MACROS (CONT)

324

DdT0AWILNTYA

[1d)(=8-°[I¥H"°YA{IANOD+[IWTYA

MACROS (CONT)

DTVA

!8z8¥ ¢1e8%

325

SERE:

MACROS (CONT)

(PIXND+IWTIETMYA T+EAT[IHUTYA (PIANOD+GETMT[1HTMYA

CLIWITIXAZTYA
326

A"([MIN1H0)LTITYdAZ 1°MS°(n+[1d)7an

"uX/sTsT$QwNNVTHVI/L«ZwVLN/HEINAIXTD/AHXLNIX=TTIDHLNE+TY/A=RINEYIT+¥X/Y/YDI1K/N+TT8HTXA2‘/LO0N/8YIRTXPHN‘A/TZSHT/18LI1L/0SZ SIH4NX090TNLL0UYI/8LTDNZIZ/TLNL/SZD//0U1TN890YLST8ZIIT/0S1THa8L/H7LT8XNTII/N4TTBWL/Z/SLIITTSS#ETALO/IMD«NTO=Tw8ITNd@3i=@/L«TY/¥TOA8N/RHGwT/NYL/wTI33YT¥d8«/KeLA
V
,
8
0
/
0
L
I
N
Z
/
1
0
°
H
L
N
«
T
8
Y
L
I
O
H
A
S
9
T
I
N
Z
/
I
0
8
T
H
I
N
/
L
I
N
E
L
H
%
O
X
I
T
Y
w
°
Q
/
X
N
W
1
0
I
N
T
T
w
T
8
/
H
.
T
8
/
D
U
S
H
1
0
8
‘
d
X
I
A
D
/
T
Y
L
4
X
M
/
R
X
T
M
0
«
O
H
I
Z
/
W
X
A
T
Y
1
8
/
D
S
H
u
O
¥
I
Z
/
D
U
S
H
W
/
X
N
K
T
H
4
0
/
0
T
Y
«
S
H
T
I
d
/
2
0
8
I
D
+
G
+
Y
/
N
T
V
X
N
H
K
/
S
D
H
S
H
I
8
/
Y
N
O
D
/
L
O
Y
A
L
A
E
3
d
L
A
Z
I
S
/
3
Z
I
S
A
e
V
.
T
0
4
5
W
N
S
O
U
F
A
Z
/
X
M
W
W
/
N
I
V
/
a
4
y
I
D
4
+
S
I
O
N
T
I
V
w
2
X
N
H
u
W
/
I
O
D
H
S
H
T
R
/
N
I
V
I
D
4
E
+
Y
/
#
e
T
8
/
D
8
S
X
N
W
W
/
I
O
I
D
+
G
4
+
Y
/
N
T
Y
J
T
S
d
/
I
D
N
T
Y
s
[([IZMEGYHa+H*M[Z(HIElHHddTM+M))= Ta={H1{I1MW°Y=gE+eH uNu/TIW=43«dN(8/V=/D1ATN«V¥«=NXIQdNIuTNT1T+8YDDVER/+/=+Ye4N8g¥!v"+L=/YID¥0HXHT/I/NSNHKXX8LINNWKS/HRWI°IAHNT'SW '/STHSNJTDXIDN8U/HHSDISKWHT/0TTV88D//8SL/U1ZNT0IXTZ8EV/SLIW0DHUA8+ESNZK/H‘YZM/YD08//w/2I Z8w1/lS0B90/0HE84SYswCB/THdL NT
HJTISd+
3N([I1MHSYFTd=M=[A[1IRI8HA=TXN[MIGYHHNTMOEHD uN1w1DwwXx«udN48/AOXHu/SI/N1KuITH01iYNWe80XW8//S/ST0WNH/T=eTI«Yg8WHO*=TXAOX13'TNHTD/N1gYI8K8XI¢B/NW/ZWXZDD0HN=L/d8UKDSSHSNITWYSH/OTNDHUIDS/YZS0XHSN=D¢/W1NUTA8S=W2’L/HY‘/8T/ZTB0NX8T/MBNIU¢8YDOL/=DZ1Nd/00D8E=YO80HO/YML=NVSINZ/wVTIH0¥ZSI/8/LQd0TE/3He0TALdMYIT/TdS3/d"IL/SIRILAT00N0°IsN TLV«VC«#BI1/0A3T=Z8H20=L’YI8/NA
[[[III11HHWWRTTT=MMMgGAgGHHNsmHNO[[[°1T1AZPO9NTZLYTLI°LITITNZZ“A°QNANYNY°Y seHWTwN&,wHANuY/5TYH80X8/NSIT/NW/"/A00DITN8448IYYTSS8THXTXW/H/NHNDKRLIKXTLHINIWWSHT///H2LSTLI8TTIPOHN@/LTDTU8dwDWSZIHAT/H8DS8N/XK/HHYTTNS/8!HITHS0/L/TI/T‘SY1/2IIL0TTawL8N9C0YBBTZ8/2/L2/DIT8HNIWLSTZZ/H/T0XLZLIIT0HNHLOZ0TILIHTT/N/EH8OZLX/INNTH/«STSCHMwssBTLOZlO/HNII8@NLYVT/YIU/T/wNLHNAwILNI8TIYY/T/

[101 I1Z2+0TMdR NDwewwsTuHIBuD//XIAN=IDXIS8AHDNT=S//YU¥/=IN/O,TTN"NHQHdTAMMIV/KYZ¥0X=T“/HNS1DIK0d8L’Z¥/TSV/II1HDZ0MH0/80S8I°YIHOSTN°NwAEIYH//VOXI/‘NI«N1DT0IDH¢0TaGY°H+QY/O/XNWNTY
Q{T1M80RLIT Z°IONQNY wwNHTSSYDTB/28SH
8
0
X
/
X
N
A
/
T
H
([I{HITWM)EdMX3E~BdWgTmMTd(ASWHI XIZ=0 essH¥Gd/AUN"TTSY8/NHAH1/R0RX/8N¥Kd/dXISMLIODYT/IZI/L0D8Gw1T8/JYHSH

(INTY+A"dHN
TIN OD=0"dHn
[19TLIZ+QTM€ER
{Q[I9CZLITZ
1"a1~T09dM1TanLH7IA1[T2NIZ=Y0°-AL0NI"YIG*NZa°TQMNdYHn
da[f{[~H1119g8Q0TPn°M1¥LE0ILX7T°IaZT~°4dZ0¥sX0°HaX~O°gXy

HOLYTMEHM a=gs

(J1H1TIMXENHSO[Dd+[+INDTM+GHN

Td=0"dH B=0"gHM [1¥=0~dg#x

[JHTMEHM JMSd=0e

J71Sd+[1RTMgH

Yd4=agH

327

[10LTIZ+[1HTMgn T=[1H"EHN Td=[In=a# O={IH"EHx [l1d=(1KTMgn [J0LINTZ=[1KTMdHM {18LI1Z~-[16TMgHn

[[1IKHRWZIXNOD
(1IXNOI
TTMMEg9HnHA[O1N8RY4*°ANY°

MACROS (CONT)

[IO[LIHT=ZEANHY° [I[1WP1IHTZ"°QNQY°HG[NIBWLTYIMGT°HZ

MACROS (CONT)

ANYION/NTV .
DUSH
D H/XNW
wIB/
.fi\mwmm>tHua«-m\:qq‘x.zx\x:zuommm\xx:g<~Mw\umwth+um|uQ.mx\ummzz

18/04SH,
deg/
NIV 0 H/XNW’
wIDe
H
U/ XN U0/ NTYw
WwOHBOZ/OUS
Z/.
S H/XOW HOX/NTY
RLIIN
108 T8/ DUSH
WZ@/T8LT T THITT/LIT/
08’
S W/ XNW HOX/NT¥w
LITZ/1
18/DUSH’
W28/ TULTIT TELTIN/LIT/0

$+0d=0d dX=(1%"g#

6~dH

I°H0°%{1°1S°H1ITM0 D HOX [1WTMdA

328

~ZT.I1.h.88wmff+//\Nlli3J0um\\d4UNemum=SSuHanLNxH3muHMHm..d>mNI°~>H>NZH~a..mQBVumHHzXN/’aau\uD/om»IaxmUDTxomDmmSau«sa=E\Sm\a°mxY/H:xH=wqa:»8XHLa<gqmfN//mamiW<aXaX..wNIWAnmNmmKXoW.xH.\/*TmxWm1\x\./8Y:axm\x/0qaxSa3O:cz.:4Hxm\Lmz‘SIfo.fHZium\Hi/oI"Mau\RmmTNo-mY\\mmTANxx@sTm\IwaYzZOsp:.\>x=aqz::§8wmqngq/o=l.‘.x<<mYdmfx,.M/=LifaMNNBxix@\I=®,\U0VY\uMum/xm@mw0s:8‘\mMzTmummV‘/xm.Hf§FTwmufiHlZ+m+iwmLIuuu:DISmHamzTZAa+;uwHuwuuza1gmmm\8.s.,a/mummoxmXxmx\.\\,.umuuHxmm+m\muxUzzmz,mcxNammuxmg.,uazmxx\\xu:mz.zo;=muu\xx:aqmma\saqg
zX"Gm4M0N~\/Hq4A0MONKq"/uTTDaYHLmaIe0/qH\ZL/HmXAqN0uWXvNmO‘qHu¥0N/Nw’ToYmSYu/wSwZxITuS8m/04~SmEaz«\0xH:FxZ/“L0o8\:q«.mz lm\quUfiz

(X{NO1D4T9M)X1H0m4NZTIMSYaHu

[IW=(]0LINZ"an

([IW)LXAZTMaN

H[([TSNNI
O(lT1g1dIXd¥=H°=}=-)({Ig(IE(LX{XXTdJMI)XWgZIISnILTL~LXMXgX3d$IHFIn4S+sZH~"3—"gOdaan4XNnH7Y0dT1+S(0IN48TIMW0d12+035dTMD0d WDHSDHTI8/ XNDKUWX28/ 3OS««s43XNA30Z3DZHK2Z0TI2TI/ZWISY3/SALdAT"0RMTR81BAMB°0ZIINZSIH«2IV03I//ZWSNWIHYIXTSI/YSOAWTHTAAI#LZZOSIHISI«®IQZ*N//Y3HH/LEXAINTGSIIV/Y
[[([d1(IXd1W)=¥IL()YLg=8XOX{3U)(ANZLG~XXa3)=AnaIYmZXa~=IKd1Zg=4(Mng0[H4Y7T1£(H0+SZ34TLd°4TI¥7MTM3Z°d°HOZ°+#0d70d /A«3¥L4OAZ1M8I//0I3Sdd0RL"L1A30Zw«dI3ZSZIISS/AC=WTIMYZILIZISSI1T/°IH/qYWLuESIDIS®‘T
MACROS (CONT)

329

MACROS (CONT)

330

(POYTAIVOTLD i<Z>81

HIHLO 4SdYdLO

MACROS (CONT)

i4sa3Iyoay

331

MACROS (CONT)

4SD041372
332

EEM3DEI003I1603L0N3D8 {[33I0031003)

[clief1etlelltolayyr (101

43¥O0K"°
43d50N°

a/h/«.AN‘m1d1I9A.4TF0O71Am8mAE1TTH00nSk/07T1wI3mh9uT3°°J5;nHH0>>.wATn0IA3N//AsIL°onH°"09NmANSHnmH>TLTDuDII8>/@TN’wWA0Y//\mADTAuId16a~H.8A4Nm85T<AxAeI0T‘vmAs0/4°B‘/wzm093F/\vDa34>8L><“au3z8D>/X‘<<[xacA¥[[Omz<nNSZL0C0zOO«vH>0O[v0.VxLT‘DBuLB0v\AEEE>"qO8Bxnu>NB‘‘OuDEzzY/C<N3.<Em°'«.Z€ITd[v'x<.IBSMAA[Lw<.«vZmB/Od0/4hw4ZMATI°LLzmaBH/Y°2Ywuf/LXO<X8A‘mi.LeXCE<I/NwaoYAIZA2>O.mLaNADNSITLvuAz/>S0AxmuNLDIIN°IpafD.>XAAYTM\imAAINN>8fNNmQmYY/ElS.D,NW1wAaI*mfYVS\mA‘hlA0an>>N/<<‘R.ax.>Y.<€T[{[AmYM[I<O{LmHzTT0®OO~v®BIL4\00\DuN/N3BmBaEoDhID8E0Exz\’XDhF‘‘maI°<<mFH<.zoAsPHS.AHZvNhIzBRBAAxDPuEBHQCE//mWTBa/.L/LAm/z<LIAXaLNNQ<ImX~YX,AV.INAoIN\vAnN>mDDa<NUSx%ND>>Iwzm>IuADIAm<<ImOIANnEE.LmAmNANY.ABB<,NYY"A//m4mY>NLLTmnaNY.I*‘mAhxBEfs#wN.ma>h<N<iN<#DoA[lxhPD€[w\fluII/0zalzAAWumxAvNN.xmBNuYYwqzEmc>x®/vz'C‘w\u¢<lz€mo.EIvozBAvR“/mfqulLLoinhzAvuX¢TwAI,axNHvmwSDx>e.uImvA.xRmNVc,Y\mf«lfo.oC«smfml<Hlf[{d.ia4mLm\@m\omzoMg

3340°
agaaon”

9W34050°33W4 {{11 3[1 ((11}
3aoosa°

2189 13 03 3 03 01 {3

Jqosre

£2 6¢ NIG®

JQa04L°101"(101 pig pue ILZ3TSS(Q4dWnOYH04w80dI40I8ABIWN 4383
MACROS (CONT)

333

°3 40

R
Kitv ADD

sMwm&QWEW&

~ (D
E.
SVAC

ab
.

mmmmm

i
24

Sus

SRy

d5Es 2oV D

JNEBULA

u § AdD Y
d
E — Umnods
~ CEFEFoo
FCco
UGG v en fé“‘*w

BooT,

Yo CouVen %fi”"ffi?il;fifii?@;g

if}fii‘i‘? f "y - flj&,fi«g lfi‘ (;@fl?
g

flj& g};{“

PATA

Uaviy

b LA

3 .

FT UG e~y

( Conrras MY

LEVELS
B.2.

%, §a,

SeT

LevelS

fi}
AnE
335

L CIC

‘W ATTEG

I o L N CDe

4,,,,,,,,,-

L Te

S22 Wi

Y
j gii

I3/. A E “‘g gfi g:“%" e
w'"m'“.m\}

PC =

i~
g

]

Lo 1c)

L l"\)i"\S
L4567

’A/j;

NOTES

bip

N W3 BCE

NOTE

Lh Bers

)

T ByTe

[OVSTAMCTIoNS FCTCen

oo
Lo
- QUuADLLew

BSoumvorues ANE
ExcouTen On BYTE

L Qo3 ¢, L) OGUD

Lo D72

g OUNODAGL &A ,4,

1 G {m«%yfl p

CACRE

l“‘““"""’”""

- e

520 DIT o 25ce |

J} & o g

(D&asir
75

>o) L (/ < o )

)

p—

| i in Rec

Witk

EoATM ol

O SV

W TV

/ éfg & Ly fi%& V&

;@?{ i }w

BYyre 00D

> Bu Du AQ
17

€

GOES T4

- O 0w 5 O

RIZeISnV RS

336

L /O

*”'“"g/{

NOTES

AVaiLalie

DiparnoSTcs

DeC, Tre, Emucex EVM
ERroer
VETT,
Fizom Je€ciSTeny

LirnvD &7

€ESSaa

DS >

NUVEaUy

®B/ie

Forwmarre,

j%Agi/&f}f;{;(a
fim®®/G§
Jeim

¥ C

Nfi O ¢f}
ffi%w?;/g

@VSKQM~%MWWSQQR
DS
>

EVSRA
Hew”

LisTs
D=

DEv

VAR

AvAicallce

—T€s5g

¢ g

%efu

£vun

337

5%1

Loc

NOTES

i\«-\ i

JITCHES

LEmNCTEY

WY Chiv
o

;I' ’71

e
o

FERRRDRRRGER

[r—

Ves

338

Affeers

NOTES

339

340

VAX MAINTENANCE HANDBOOK: VAX-11/750

Reader's Comments

VWO

Your comments and suggestions will help us in our continuous effort to improve the quality and
usefulness of our publications.

What is your general reaction to this manual? In your judgment is it complete, accurate, well organized, well
written, etc? Is it easy to use?

What features are most useful?

What faults or errors have you found in the manual?

Does this manual satisfy the need you think it was intended to satisty?
Does it satisfy your needs?

Why?

Please send me the current copy of the Documentation Products Directory, which contains information

on the remainder of DIGITAL's technical documentation.

Name
Title
Company
Department

Street
City
State/Country
Zip

Additional copies of this document are avaitable from:
Digital Equipment Corporation
Accessories and Supplies Group
P.O. Box C52008

Nashua, New Hampshire 03061

Attention: Documentation Products
Telephone: 1-800-258-1710

Order No

EK-VAXV3-HB

SoeO0e

No Postage

Necessary

if Mailed in the

United States

BUSINESS REPLY MAIL
FIRST CLASS

PERMIT NO 33

MAYNARD MA

POSTAGE WILL BE PAID BY ADDRESSEE

Digital Equipment Corporation
Educational Services/Quality Assurance
12 Crosby Drive, BU/EO8
Bedford, MA 01730