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EK-TR79F-MM-001

2000

74 pages

Original

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Document:	TR79-FA DECmagtape (1600 cpi) Maintenance Manual
Order Number:	EK-TR79F-MM
Revision:	001
Pages:	74
Original Filename:

OCR Text

TR79-FA
DECmagtape (1600 cpi)
maintenanc.e manual'

EK-TR79F-MM-001

digital equipment corporation • maynard, massachusetts

CONTENTS

Page
CHAPTER I

INTRODUCTION

1.1

1.4

INTRODUCTION . . . . . . . . . . . • • " , .. , . , ' .. , . " . , . , .. " . . .
GENERAL DESCRIPTION " . , . . , . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONS . . . . . . . '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Transport Control Unit
................................
Magnetic Tape Transport . . . . . . . . . . . . . . . . . . . . . . . . . . ,l.t·. . ..
....................................•... :
OPERATION

CHAPTER 2

INSTALLA TION

2.1
2.2
2.2.1
2.2.2
2.4
2.4.1
2.4.1.1
2.4.1.2
2.4.1.3
2.4.1.4
2.4.1.5
2.5

SITE CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . , . . . . . . . . . ,.
Unibus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TCU!MTT Cable . . . . . . . . . . . . . . . . . " . . . . . . . . . . . . . . . . .
GROUNDING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.................................. .
INITIAL OPERATION
Acceptance Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test 2
......... , ................ , .......... .
Test 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test 4
Test 5
..................................... .
RELATED LITERATURE . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . .

CHAPTER 3

OPERA TION AND PROGRAMMING

3.1

3.4

GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
REGISTER FORMATS ' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Register (764000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Register (764002) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PROGRAMMING TECHNIQUES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CHAPTER 4

THEORY OF OPERATION

4.1

GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STATUS REGISTER (SR) . . . . . . . • . . . . . • • • . • . . . . . , . . . . . . . . ..
CONTROL REGISTER (CR)
..................... ,..........
RECORDING FORMAT . . . . , . . . . . . . . . . . . . . . • , . . . . . . . . . . . ..
Fonnat Architecture . . . . . . . , . . . . . . . . , . . . . . . . . . . . . . . . . .
I>efinitions . , . . , . . . . , . . " , . . . . . . . . . . . . . . . . . . . . . . . .
, Track Identification . . . . . . • , . , . . , . . " " , . . . . . . . . . . . . . .
Parity
............ " ........ ,..................
Iden tification Burst (IDB) . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . .
Preamble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Postamble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Record . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . .
Tape Mark (TM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inter·Block Gap (lBG) . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . .
GAP COMPOSlT lONS . . . , . . . . . . . . . . . . , . . . . . . . . . . . , . . . . . . .

1.2
1.3
1.3.1

1.3.2

2.3

3.2
3.2.1
3.2.2

3.3

4.2
4.3
4.4

4.4.1
4.4.2

4.4.3
4.4.4

4.4.5
4.4.6

4.4.7
4.4.8
4.4.9
4.4.10
4.5

iii

1·1
1·1
1·3
1·3
1·4
1·5

2·1
2-2
2·2
2-2
2·2
2·2
2·2

2·3
2·3
2-3
2·3
2·3
2·3

3-1
3-1
3-1
3-1
3-6
3-6

4-1
4-1
4-1
4-1
4·1
4-3
4-6
4-6
4-6
4·6
4·6
4·9
4-9
4·9
4·9

CONTENTS (Cont)
Page

4.8

Gap Shutdown . . . . . . . . . . . . . . . . . . . . . . . • . • . . . • . • . . • • • 4·9
Write Shut-Down . . . . . • . . . • . . . . . . • . . . . . • • . . • . • • . . • 4-9
Read Forward Shut-Down . . . • • . . . • • • • . . . . . • • • • . • . • • . . . 4·10
Identification Burst Shut·Down . . . . . . . . . . . • . . . . . . . . . . . • . 4·11
Gap Start~Up . . . . . .
. • • • • • . . . . . • . . . . . • • • • . • . • • • . • 4-11
WriteStart-Up • . . . . • • . • • . . . . . . . . . • • • • • • . . • • tt.... 4-11
Read Start· Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
Tape Mark Gap . . . . . . . • . • . . . • • . . • • . • . • • • . . . • . • • • • • . • 4-12
Tape Mark Shut-Down . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . 4·12
Tape Mark Start· Up
. . . . . . . . . . . . . . . . . . . . . . . . . . • . . 4·12
Erase Gap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . 4·12
Erase Shut-Down . .
. . . . . . . . . . . . . . . • • . • • . . . • . . 4-14
Erase Start-Up . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . • . 4·14
Read Reverse Gap . . . . . • . . . . • . . . . • . • • • • • • . . • . • . • . • • • . 4·14
l\.tTT COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . • . . • . 4·14
FWD . . . . . . . . . . . . . . . . . . . . . . . . . • . • . . . . . . . . . . . . • . 4·14
REV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • 4-15
FAST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4·15
RWND . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . • • • . . 4-15
LOCAL
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4·15
WT ENB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4·15
WSWC . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4·15
WID . . . . . . . . . . . . . . . . . . . . . . '• • . • • • • • . • • . .' ••••••.• 4-16
EOFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . 4-16
WPAMB . . . . . . . . . . . . . . . . . . . . • . . . . . • .
. . • • • . . • . 4-16
EODAT
. . . . . . . . . . . . . . . . . . . . . . . . . . 4·16
WRITE
. . . . . . . . . . . . . . • . . . • . • . . • . • • . . . . . . . 4-18
READ
. . . . . . . . . . . . . . . . • . • . • . . . . . • . . . . • . . 4·19
ERASE
. . . . . . . . . . . . . . . . . . . . . . . • . . . . . • • . . • 4-21
SP REV
. . . . . '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
TCU AND MTT TROUBLESHOOTING
. . . . . . . . . . . . . . . . . . 4-21
LIST OF MNEMONICS . . . . . . . . . . . . . . . . . . . . ~ . . . . . . . . . . . . . . 4-23

CHAPTER 5

MAINTENANCE

S.l
5.2

5.3

SPECIAL TEST EQUIPMENT . . . . • • • • • • . • • • • • • • • . • • • • • . . . . • • . 5·1
PREVENTIVE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
TR79·FA Magtape Controller Monthly Field Service Preventive Maintenance . . . . . 5-1
TR79·FA Magtape Controller Quarterly Field Service Preventive Maintenance
5-1
TR79·FA Magtape Controller Annual Field Service Preventive Maintenance . . . . .. 5-2
HP7970E Magtape Drive Quarterly Field Service Preventive Maintenance . . • . . . . 5-3
HP7970E Magtape Drive Semiannual Field Service Preventive Maintenance . . . . . . 5-5
HP7970E Magtape Drive Annual Field Service Preventive Maintenance . . . . . . . . 5-9
HP7970E Magtape Drive Two-Year Field Service Preventive Maintenance . . • . . . . 5-10
CORRECTIVE MAINTENANCE TECHNIQUES . . . . . . . . . • . . . . . . . . • . . . 5-10

CHAPTER 6

SPARE PARTS

6.1

MODULES . . . . . . . ' . . . . . . . • • . . . • . . . . . . • • • • • • . . • . . . . . ..

4.5.1
4.5.1.1
4.5.1.2
4.5.1.3
4.5.2
4.5.2.1
4.5.2.:2

4.5.3
4.5.3.1
4.5.3.:2
4.5.4

4.5.4.1
4.5.4.2
4.5.5

4.6
4.6.1

4.6.:2
4.6.3
4.6.4
4.6.5

4.6.6
4.6.7

4.6.8
4.6.9

4.6.10
4.6.11

4.6.12
4.6.13

4.6.14
4.6.15
4.7

5.2.1
5.2.2
5.2.3

5.2.4
5.2.5

5.2.6
5.2.7

6-1

CONTENTS (Cont)
Page

APPENDIX A

TR79-F A TEST PROGRAM DESCRIPTION

A.1

A.4.1
A.S
A.6
A.6.1
A.6.2
A.6.3
A.6.4
A.6.S
A.6.6
A.7

ABSTRACT TR79-FA TEST (MAINDEC-II-DZTRA) ••••
0 •••• 0 • 0 0 0 A-I
REQUIREMENTS •.•• 0 0 0 • ~ • 0 0 • 0 0 • 0 0 0 0 , 0 0 0 0 0 0 0 0 • 0 0 • • 0 0 • 0 A-I
LOADING PROCEDURE 0.. 0 • • 0 • • • • 0 • 0 • • • • 0 • • • • • • • • 0 • • • • • • A-I
STARTING PROCEDURE 0 0 • 0 0 • 0 • 0 • • • • • • • • .'. • • 0 0 • 0 0 0 0 0' i 0 0 0 0 A-I
Test Selection •.. 0 0 0 0 0 • • 0 0 0 • • • • 0 • • • • • • 0 • • • • • • 0 o~~ 0 : A-2
OPERA TING PROCEDURE 0 0 0 0 0 • • • 0 • • • 0 • • • • • • 0 • • 0 • • 0 0 0 0 0 0 • 0 A-2
TEST ABSTRACT .• 0 • • 0 0 • 0 0 0 • • • • • • 0 • 0 • • • 0 • 0 • 0 0 0 0 0 0 0 0 0 0 . A-2
PRETST: Pretest
A-2
Test 1 . . . . . . . . 0 •..••.••• 0 ••••••..•.••• 0 • • • • . . . . A-2
Test 2 ••••••••••••••••• 0 •• 0 0 0 0 0 ,0 • 0 •• 0 •• 0 0 •••• 0 • A-2
Test 3 • 0 •••• 0 0 0 •• 0 0 • 0 ••• 0 0 0 0 0 0 0 0 • 0 •• 0 • 0 ••• 0 0 ••• A-3
Test 4
0000000000• 0• • • •
00• • • • • 00
0• 00• 0
0 A-3
Test S ••• 0 •• 0 • 0 0 0 ••••••• 0 0 ••• 0 •••• 0 0 0 • 0 0 0 0 •• 0 0 • A-3
ERRORS 0 ••.. 0 0 0 0 0 • 0 0 0 0 0 0 0 0 • 0 0 0 0 0 0 0 0 • 0 0 • 0 0 0 0 0 0 0 0 0 0 0 A-3

APPENDIX B

SHIPPING LIST

B.1

EQUIPMENT FURNISHED

A.~

-'\.3
A.4

•

••

0000000000

o·

•

0 0 ••• 0 0 0 • 0 0 0 0 0 0 0 0 •• 0 B-1

ILLUSTRATIONS
Figure No.

1-1
2·1
2-2
3-1
3-2
4·1
4-2
4-3
4-4

4-5
4·6
4-7

4·8
5-1
5-2
5·3

Title

Page

System Block Diagram
••••• 0 0 0 •. 0 0 0 0 0 • 0 • • . • • • • • • . . . • .• 1-2
Cabinet Arrangement
. . . . • • . • • • • • . • • • • • • • . • . . • • . . • • . • • • . . 2-1
Cable Connections . . . . • . • . • • • • • • • • 0 0 0 0 • 0 0 • • • 0 • • • 0 • 0 0 • 0 •. 2-2
Control Register Format o. 0 0 0 0 0 0 • • 0 • • • 0 • • 0 0 0 • • 0 • • • • . 0 • 0 • 0 .• 3-5
Status Register Format • . . 0 . . . • 0 • • 0 • • . 0 0 • • 0 • • . . . • • • • • 0 • . 0 •. 3-6
9-Track PH· Encoded Format . 0 •••••••• 0 • • • • • • • • . • • • • • • • . • . . .• 4·7
Phase-Encoded Write Waveforms •• • • 0 • • 0 • • • • • • • • • • • • • • • • • • • • • .• 4-8
Write Gap Tinling .•.• 0 • 0 •••••••••• 0 •• 0 •••••••••. 0 ••••.• 4-10
Identification Burst Positioning •••• 0 • 0 • • 0 0 • 0 0 • 0 0 0 0 0 0 0 • • • • 0 • • 0 • 4-11
Head Positioning • 0 • • • • • 0 • 0 0 0 • 0 • 0 • • • 0 • • • 0 • 0 0 0 0 0 • 0 0 0 0 0 0 0 0 4-12
Write Tape Mark Timing . . . . • • • • . • • • 0 • 0 ••• 0 •••• 0 0 0 0 0 •••• 0 •• 4-13
WriteTiming ••.•••••• 0 ••• 00 • . • • • • • • • • . . . . . • . • . . . . . . . 04-17
Read Timing •••.••• 0 • • • • • • 0 • • 0 • 0 • • • • • • 0 0 0 0 0 • • • • 0 • 0 0 0 • 4-20
Reel Motor Assembly •••••••••• 0 0 0 0 0 ••••••••..••••••• 0 • •• 5-3
Load Point Bulb Assembly o. 0 0 ••••••••••••••••••• 0 •• 0 0 ••• 0 • 0 5-9
Tension Arm Sensor 0 0 0 •• 0 0 0 •• 0 ••• 0 0 0 0 •• 0 0 0 0 0 ••• 0 0 0 . 0 . . •. 5-9

TABLES
Table No.
3·1
3-2
4-1
4-2

. 4·3
4-4,
4-S
4-6

6-1
A·I

Title

Control Register . . . . . . . . . . . • • . . . . • . . . • . • . • . • . . . . . . . . . . . 3·2
Status Register . . . . . . . ' . . . . . . . . . . . . . . . . . . . . . . . . . . ~ . . • . .. 34
Status Register Bit Assignments . . . • . • • . • . • . . . '. • . . . . . . . . . . . . . .• 4·2
Control Register Bit Assignments • . • • . . . . . • . . • . . . • . . . . . . . . . • . • . 4-4
Command Function Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4·8
Transport Selection Decoding . . • . . . . . . . . • . . . . . . . . . • . . . . tt. . . .. 4-8
TCU to MTT Commands . . • • • • . • . • . • . . • . • • . • • • . • . • . • . . • . . ,.. 4-14
TCU to MTT Signal Cross Reference . . . . . . . . . . . . . . . . • . . . . . . . . . . . . 4-22
TR79-FA Module Complement . • . . . . • • . . . . . • . . . • • • • . . . . . . . . . . 6·2
Switch Options . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . .• A·2

CHAPTER 1
INTRQPUCTION

1.1 I~TRODUcrION
The TR 79-FA Tape Control Unit, designed and manufactured by DIGITAL, interfaces the PDP-ll family of
central processors to the Hewlett Packard 7970-E, 9-track, 1600-character-per-inch (cpi), phase-encoded Magnetic Tape Transport. The protocol between the Tape Control Unit (TCU) and the Magnetic Tape Transport
(MTI) conforms to ANSI standard x 3.2.1/400, REV x 3.2.1/375. The TR79-FA writes and reads industrycompatible formats. This document provides the user with the information necessary for operating and maintaining the TR 79-FA. Theory of operation discussions and logic diagrams to provide an understanding ofTR 79FA operation are included.

1.2 GE~ERAL DESCRIPTION
The TR79-FA provides the interface logic for communication between the PDP-ll Central Processor Unit
(CPU) and the Magnetic Tape Transport (MTT) and operates on a Direct Memory Access, Non-Processor
Request (DMA-NPR) channel. The Tape Control Unit (TCU) consists of the following functional sections
(Figure 1-1):
I.
2.
3.
4.
5.
6.
7.
8.
9.
10.
I I.
12.

Address Selection
16-Bit Status Register
16-Bit Control Register
Bus Address and Word Count Registers
Function Decoder
GAP Timing and Motion Control
MTT Commands Register
2-Stage Read/Write Buffer
Buffer and NPR Control Logic
Bus M aster and Interrupt Control
Read/Write Parity Check
Drivers and Receivers

The TR 79-FA is a magnetic tape storage system capable of driving from one to four HP 7970-E transports (one
master and three slaves). The TeU writes or reads digital data, in parallel, on or from magnetic tape in 9channel. industry-compatible format. This TCU is designed to operate at transfer rates of 40,000 characters per
second. but can be modified to operate at higher speeds. The TeU contains all motion and gap timing logic and
generates all required MTT commands. One double-stage buffer is used for both write and read functions. Status
and control registers are provided to permit communication between operator and machine.

1-1

UNIBUS

D0'-I~

OR~~~RS

~_______~

r--------------------------I

I
I
I I 1'--___
I
./
I
I
I- ~
J ------- ----

'--_---',_Tl_6.J' "f

n
All!

I MOTOR CONTROL

BUS INTERFACE

tHiS
RECEIVERS
A28

~:----~S~L~P----~
SAW

SET
SR
SFP

(TlO'

MOTION
CONTROL

ADDRESS
DECODE

A.H,-15

IT'9'

A0~

W.C. REG
AB'3

CBUS
GATE

FUNCTION 8
UNIT SELECT
DECODE

ITM'

....

B.A. REG
ABe3

!--

CBUS
GATE

ITI41

CONTAOL
REG

ITe41

FUNCTION
CONTROL

CBUS
GATE
B0S.6

ITl6.

I
i
I

lNTERRUPT 8
OMA CONTROL
C03
1T14,

Figure 1·1

System Block Diagram
1·2

I
I
I

REC!~~ERS

8C1~TI3J

.r----.

' ....

WAITE DATA

FORMATTER

ROY

1-_____--1

ITlOI

-----.,.

...-oJ-oJ-_ _- - ' - - - ' - - . ,

WRITE BUFFER

11I6,CI6
BUFFER
INPUT
GATE CI4

0"-08

WID

t--_ _-"'2.;;..OF_ _ _---113"'-A WAITE

BUS

PARITY
CHECKER

EOO
WTM

'--__(T_'_11J-------~

IT.21

BUS
DRIVERS
B29, B30

UNIBUS
RECEIVERS
A.4

EN
WPA

....

I
I

(AI41

~____~T~._B_

C'4.~

ITI~I

wsw

(T'1) f - -

L....---"_........

CF
CR
CH

TIMING

A DATA CIRCUITS

'--!'I CBUS GATE

BUS
DRIVERS
B30

_t>..

r--/,\

'--_____I~T_._61.J

~~r_______A_0_0_-_'~1____~

t---------'~

.1....
,,,

IT.2'

CONTROL
AND
STATUS

CS
CRW

.,.

ITl21

RO CLK

READ BUFFER
BI6, CIS
'--_____~--~IT~I_21...

OAT STRBl

","

BUS
~------------------I
RECEIVERS
0'GI-\J7,P
A27
t-------~

(TID'

PARITY
CHECKER
AI8, AI 7, BIT

r- - -,------:::- -- -

I
I
IL _ _ _ _ _ _ _ _ JI
'Tl31

~~___AO~t~-_1~'_P___~

------5016

READ
DATA

MTE

fi--

,~
~

BUS
RECEIvERS
A28

I-______~

STE
lOB
E08

ITIOI

IAU-431

tI·_

The ~1TT (H P 7970-E) features a 1600-cpi read-after-write, phase-encoded data capability at speed ranges of 10
to -'5 ips. The MTT is available in master/slave unit combinations that are connected in a "daisy-chain" configuration when more than one transport is used. The master unit contains the following phase-encoded read
functions:

.,1.
3.
4~

5.
6.

Identification Burst (lOB) Detection
Detect and Strip Preamble and Postamble
Tape Mark Detection
Read Deskewing
Multiple Track Error (MTE) Detection
Single Track Error (STE) Detection
End of Block Detection.

Both master and slave units contain the same write and command-and-status electronics. Phase-encoded data
electronics is contained only in the master unit. Slave unit read capability is accomplished through the master for
multi~unit operation.
.
Formatting of the write data is accomplished within the Write-Formatter P.C. card (HP 13195A). This card
generates the identification burst (lOB), Preamble and Postamble, and Tape Mark. The Formatter also generates
the clock synchronization signal with which data is written. One Write-Formatter card is sufficient for one
master and three slave tape units.
1.3 SPECIFICATIONS
The following are presented here for reference purposes only and are subject to change without notice.
1.3.1

Transport Control Unit

!\t echanical
Logic Panels
Type
Quantity
Dimensions
Weight
Cabinet
Type
Dimensions
Weight

Electrical
Power Control Type
Power Supply
Input Power
Line Current
TCU
Fans
Power Dissipation
Logic Potentials
Module Series

H91l
Two
10-3/S in. h, 19 in. w, 6-3/4 in. d
20 lb approx
H961-A
72 in. h, 22 in. w, 30 in. d
300 lb

HS61-C
H720-E
115 Vae 10%, 60 Hz ::!:: 3 Hz
SA

2A
600 W approx
+5V,-15V,OV
M and G series

}·3

Operational
Data
Speed
Transfer Rate
Character Rate
Transfer Mode
Inter-Record Gap
Write-Write
Write-Rev-Read-Write
lOB Gap
TM Gap
Data Checking
Write

2S ips
40,000 nine-bit char/sec
2S ~s
DMA (NPR)
0.662 in. approx
0.612 in. approx
2.6 in
0.662 in~
Write parity, read after write parity, Single Track Error
(STE), MUltiple Track Error (MTE)

Read

Read Parity, Single Track Error, Multiple Track Error

Programmable Commands

Write, Read Forward, Read Reverse, Erase, Rewind,
Fast Forward, Write 10 Burst Write Tape Mark

Register Addresses
Control (CR) .
Status (SR)
Word Count (WC)
Bus Address (BA)
Interrupt
Priority Level
Vector Address
Enfironmental
Temperature
Humidity (relative)

764000
764002
764004
764006
BR4
170

40 0 to 95 0 F
20% to 95% (no condensation)

1.3.2 Magnetic Tape Transport
The following are presented for reference only. For current specifications, consult a Hewlett Packard
representative.
Operational
Model
Recording Mode
Tape
Width
Thickness
Tape Tension
Reel Diameter
Tape Speed
Inst. Speed Variation
Rewind Speed
Fast Forward (or Fast Reverse)
Fast Forward Start/Stop
Characteristics (at 160 ips)
Distance

Hewlett Packard 7970-E
Phase Encoded (ANSI/IBM compatible)
Computer Grade
O.S in.
1.5 mils
8.5 OZ, nominal
Up to 10.5 in.
25 ips (10 to 45 ips available)
3%
160 ips
160 ips

Start 40 in., nominal
Stop 40 in., nominal

Opcr'ational (Cont)
Time
Start/Stop Times (25 ips)
Start/Stop Tape Travel
R/W Head Separation
Distance
Time (25 ips)
Character Spacing
No. of Characters Between Heads
Reel Motor Breaking
BOT and EOT Reflective Strip Detection
Local Transport Control

Electrical
Input Power

Current
Dissipation '

:\lechanical
Dimensions
Weight
Operating En~ironment
Magnetic Tape Transport
Ambient Temperature
Relative Humidity
Altitude
Magnetic Tape
Storage Temperature
Humidity
Cables
CPU to TCU
TCU to MTT

0.700 sec (max)
15 ms.
0.187 in. ± 0.020 in.
150 mils ± 5%
6 ms
0.625 X 10-3
240 ± 5%
Dynamic
Photo-electric (IBM compatible)
Power On/Off, Reset, Rewind, On-Line, Load

115 or 230 V (± 10%),48 to 66 Hz, single phase, (U.L.
recognized)
5 A (high line)
500 W max.

24 in. h, 19 in. Wi 15-3/4 in. d.
130lb

32° to 131° F
20% to 80% (no condensation)
10,000 ft
60° to 80° F
60%

Two, BCll-A-08
Two, 18 round T/P #91-7700 with M912 connectors for
the TCU; cinch connectors for the MTT

1.4 OPERATION
Before attempting system operation ensure that:

I.
2.
3.

Correct power is available to the MTT
The 0 N-LINE switch is depressed
The Write-Enable Ring is in position (if a write operation is desired).

Commence operation as follows:

Set the Word Count Register (WCR) to the 2's complement of the number of characters to be written
on tape. (Do not load the WCR with zero for the write or read modes).

Set up the Bus Address Register to start at the desired location in memory.

1-5

13.

Load the Control Register (CR) with the appropriate code for selecting the MTT to be used (bits 08
and 09).

Inspect the Status Register (SR). This reflects the status of both the TCU and MTT.

Clear the INHIBIT bit (Bit 00 in the SR).

Load the appropriate function into the Control Register, i.e., bits 00 through 04 and bit 06 (do not
change the contents of bits 08 and 09 which selected the MTT).

The desired function (if legal) will execute automatically.
NOTE
The GO pulse should be asserted for every command by
loading CR bit 00 with a 1.

1-6

CHAPTER 2
INSTALLATION

2.1 SITE CO!'4SIDERATIONS
The cable between the TeU and the MTT should be maintained at the minimum possible length because of speed
and noise considerations; therefore, the TCU must be mounted directly below the MTT (see Figure 2-1).
The H720-E power supply for the TCU mounts at the bottom, front-end of the cabinet. This arrangement
ensures short dc power cables. For MTT installation, tape reel mounting, and tape threading, refer to Chapter 3
of the H P Operating and Service Manual. TCU and MTT operating temperatures are as specified in Paragraphs
1.2 and 1.3. Tape storage temperature should be in the range 60 0 to 80 0 F (relative humidity of 60%). Tape reels
should be stored on edge in the original boxes. Damaged or warped reels should not be used.

o
MAGNETIC
TAPE TRANSPORT

POP-It
CENTRAL
PROCESSOR

TCU LOGIC

H720

POWER
f-I-------4-I'~;L£..£~LJ:..L~'"'4 SUPPLY

cs-oa:so

Figure 2-1

Cabinet Arrangement

2-1

2.2 CABLES
The following paragraphs describe the system cables.
2.2.1 U nibus .~
The Unibus connects to the TCU at slots ABOl (IN) and AB02 (OUT). Slot AB02 is used to house the M:930
Unibus terminator if the TCU is the last device on the Unibus. One, 8-ft, Unibus cable BCII-OS is supplied with
the TCU (see Figure 2-2).
UNI BUS

UNIBUS
(8ft. CABLE)

TO OTHER OPTIONS OR
M930 BUS TERM IN ATOR

+5V
PDP-tt
CPU

GND

TCU

-t5V

MASTER
READ-DATA
(6ft.)

CONTROL
AND
STATUS

MTT

H720-E
POWER
SUPPLY

WRITE-DATA

t15Voc
60Hz

(6ft.)

J - - - - - - - C " ' } tt5Voc
60 Hz
CS-OIZ7

Figure 2-2

Cable Connections

2.2.2 TCU /MTT Cable
The TCU interfaces to the MTT by means of two cables. These are 6 ft long, and are round with twisted pair
conductors. This is a standard telephone cable (DEC part number 91-7700). Type M912 connectors plug into the
TCU at AB3} for the Master Read-Data cable and AB32 for the Write-Data and Control and Status cables.
The MIT ends of the cables connect to 48-pin cinch connectors (HP part number 1251-0335). Three of these
connectors are used and are located at J3, 11 0, and 115.
2.3 GROUNDING
The grounds of the TeU power supply and the MIT should be connected together. This is achieved by bolting
the two devices to the cabinet rails. A copper braid must connect the MTT cabinet with the PDP-ll system to
which it is connected.
.
2.4 INITIAL OPERATION
The following paragraphs discuss the checkout and acceptance procedures performed in-house prior to shipment. These tests can also be used as an initial on-site turn-on procedure.
The heads and all tape paths should be cleaned before beginning the tests procedures and every 8 hours thereafter. A fresh reel of tape should be used.
2.4.1 Acceptance Procedure
To perform the acceptance procedure, load the diagnostic, MAINDEC-ll-DZTRA, and run the following five
tests:
NOTE
Manual Operation test should be run first. Refer to
MAIND EC listinl for instructions.

2.4.1.1. Test 1 - Run this test for ten passes. No errors are permitted. This test checks the control logic with
minimum tape motion.
2.4.1.2 Test 2 - Run this test for ten passes. No errors are permitted. This test checks the ability of the logic to
write the lOB from the load point and verifies that some illegal commands cannot be executed at the load point.
2.4.1.3
,I.
2.

Test 3 - Run this test for a complete reel of tape. Allowable errors are as follows:
4 MTE
10 STE

This is a reliability test with continuous tape motion over the entire reeL
2.4.1.4 Test 4 - Run this test for one pass over a complete reel of tape. Allowable errors are as follows:
. I.
2.

4 MTE
10 STE

This is a read compatibility test which reads tapes written by Test 3.
2.4.1.5 Test 5 - Run this test once. No errors are acceptable. This is a manual operation test for the Teu logic
where the operator responds to commands from the program via the teletypewriter.

2.5 RELATED LITERA TIJRE
The following documents contain information that supplements the material in this option description:

DEC Publications
a.
b.

Logic Handbook
PO P-l1 Peripherals Handbook

Hewlett Packard Publications
a.
b.

7970-E t Operating and Service Manual
13195 At Write Formatter Accessory Kit for the 7970-E.

2·3

CHAPTER 3
OPERATION AND PROGRAMMING

3.1 GENERAL
This chapter presents the TR 79-FA transfer functions and codes. Included are detailed descriptions of the Status
and Control Registers. Illegal commands, interrupts, and some programming limitations are also discussed.
3.2 REGISTER FORMATS
The TR 79-FA registers are described below. Bus addresses associated with these registers are determined by
jumpers on the M 105 Address Module.
Register
Control (CR)
Status (SR)
Word Count (WCR)
Bus Address (BAR)

Address

764000
764002
764004
764006

The functional symbols used in Tables 3-1 and 3-2 have the following meanings:
W = Write (can be set by writing a 1 and cleared by writing a 0)
R = Read
S = Set by the Status
P = Cleared by PWR CLR or INIT
T = Cleared by INIT only
G = Cleared by GOP (GO pulse)
C = Clears itself after a delay
Z = Cleared by GOP, PWR CLR, or INIT
E = Sets the ERROR bit, CRI5
I = Causes an interrupt
3.2.1 Control Register (764000)
The Control Register (CR) provides the means by which the PDP-II issues control functions and commands to
the magnetic tape transport and its formatter. The CR is organized as shown in Figure 3-1. The function of each
bit is explained in Table 3-1.
3.2.2 Status Register (764002)
The Status Register (S R) provides the means by which the TCU and MTT can be monitored by the program. The
SR is organized as shown in Figure 3-2. The function of each bit is explained in Table 3-2.

3·1

Table 3-1
Control Register"
Bit

Mnemonic

•

GO BIT

W;L

01
02
03

FNBOO

W,R

01
02
03

Function
Produces GOP which causes the function to be executed intI
command.

1Y.
Function Bits. Contain the code of the command to ~ exe~,uted at
GOP time. The codes are as follows:
Code
00

01
02
03
04
05
06
07
10
11
12
13
14
15
16
17

Function
megal
Write
Read Forward
Illegal
Space Reverse
illegal
illegal
Erase
Rewind
me gal
Illegal
Fast Forward
illegal
Write lOB
Write Tape Mark
Offline

BUSY

R,P

Setwith GOP when a legal function is executed into a conunand.
Reset when the command and gap are done.

INT ENB

W,R,T

Interrupt Enable. Must be set to permit interrupts. Not cleaIed by
PWRCLR.

CURDY

R,G

Control Unit Ready. Set when any of the following occurs:

End-of-Operation
MTT is put ON-LINE
PWR CLR is cleared (if ON-LINE)

2.
3.

Reset with any of the following:

1..
2.

GOP is issued
PWR CLR is issued
OFF-UNE command is issued.

3..

3·2

Table 3-1 (Cont) .
Control Register
Bit

Mnemonic

S Bit 8
S Bit 9

*
RY

Function
MIT Select Bits. Select one of four transports as follows:

08
0

0
0

2
3

1
1

MTT
0

1 t.

•

1
1

In some applications, all four select lines are OR'ed together to one
transport.
10

MTRDY

S,R

READY Status of the selected MTT.

PWRCLR

W,R

POWER CLEAR. Oears the interface except INT ENB. Oears itself
after 900 ros.

12
13

XBA16
XBA17

W,R,S,P

Extended Memory Address Bits. Allow addressing of memory banks
over 32K as follows:
Memory Range
0-32K
32K-64K
64K-96K
96K-128K

ILCMD

RY,I

Bit
(XBA17)
0
0
1
1

Bit
(XBA16)
0
1
0

Set for any of the following illegal commands or functions:
1.
2.

megal functions 00,03,05,06, 11, 12, 14.
If a command is issued while INHBT is set.
3. If a command is issued while CURDY is reset.
4 .. If a command is issued while MTT is not READY.
5. If WRITE data when Write Enable Ring is OFF.
6. If Write lOB command at other than load point.
7. If WRITE data from load point.
8. If Write TAPE MARK at load point.
9. If REVERSE from load point.
10. If REWIND from load point.

3·3

Table 3-1 (Cont)
Control Register

Bit

Mnemonic

ERR

•
R,S,Z

Function
Error Bit. Set when-any of the following error conditions oc cur:

ABORT

2. ILLEGAL
3. BUS GRANT LATE
4. READCNT
5. WT PARITY ERR
6. RD PARITY ERR
7. NON EXISTENT MEMORY
8. STE
9. MTE
10.

MTT GOING OFF-UNE

RESET by GOP or RESET.
·See Puagraph 3.2 for a description of the symbols used in this column.

Table 3-2
Status Register

Bit

Mnemonic

•

INHBT

W,R

,Function

Inhibit Bit. Inhibits GOP. Must be cleared before a new command is
issued.
Set: At End-of-Operation
Cleared: By wri ting a zero.

RWDS

R,S

Rewind Status. The selected MTT is rewinding.

FPTS

R,S

File Protect Status. Asserted when Write Enable is missing.

EOFF

W,R,S~

Tape Mark Status. Asserted when writing or reading a tape mark at
EOB time.

IDBF

W,R,S~

Identification Burst Status. Asserted when writing or reading IDB at
EOB time.

LOPS

R,S

Load Point Status. The selected MTT is at load point.

NXMF

R,S,Z,E

Non-Existent Memory Status. The TeU attempted to access a nonexistent memory location.

EOTS

R,SJ>

End·of-Tape Status. The selected MTT is at end of tape. Cleared also
by REWIND or RD REV.

Table 3-2 (Cont)
Status Register

Bit

Mnemonic

TMOUT

RDCNT

•

Function

W,R,S,l,
E,I

TIME OUT. Set when an ABORT condition occurs in either of the
following:

When any write operation is issued and the write status
is not received back from the MTT 40 Pi·later .

When any write or read operation is issued and no EOB
is received back from the MTT 1.5 sec later.

•

Read Count. Dur'ing a READ operation, the length of the record was

R,S,Z,E

longer or shorter than the value in the WCR.

ONLNS

R,S,I

ON-LINE Status. The selected MIT is ON-LINE.

BGL

W,R,S,Z

Bus Grant Late. In the read mode, a new character has arrived from
the MTT before the previous character was accepted by the bus.
In the write mode, a new character was not received from the bus by
the time the Formatter indicated its acceptance of the previous
character.

STEF

SINGLE TRACK ERROR Flag. Set at EOB time when a single track
I..,
error status is received from the MTT.

R,S,Z,E

MTEF

R,S,Z,E

MULTIPLE TRACK ERROR Flag. Set at EOB time when a multiple
track error status is received from the MTT. Indicates that an uncorrectable error has occurred and that the record must be rewritten on
a new section of tape.

WPEF

R,S,Z,E

WRITE PARITY ERROrag. Set by the first write parity error in
a record. {fOD pffl.l r~

RPEF

R,S,Z,E

READ PARITY ERROR Flag. Set by the first read or read-afterwrite par.ity error in a record.

·See Paragraph 3.2 for a description of the symbols used in this column.

PWR CLR

FNB03
BUSY
INT ENB

MTRDY

581T9
SBITS

CURDY

cs-oe31

Figure 3-1

Control Register Format

3-5

RPEF
WPEF
MTEF
STEF

INHBT

RWOS
FPTS
EOFF

BGL
ONLNS
RoeNT
TMOUT

Figure 3-2

IOBF

LOPS
NXMF

EOTS

CI-OU8

Status Register Format

3.3 I~TERRUPTS
The TR 79·FA interrupts the CPU on BR level 4 and causes it to trap to vector location 170 if INT ENB is set and!

anyone of the following conditions occur:
I.
2.
3.
4.
5.
6.

ABORT
ILLEGAL
ON·LINE Status is asserted
ON ·LINE Status is negated
\Vhen P\V R CLR function ends
At the completion of any legal operation.

PROGRA:\I:\IING TECHNIQUES
The following are guides for programming the TR 79-FA controller. After a power-up, the following must be
accomplished in all instances:

3.4

Load the Control Register with all zeros; this selects the MTT.

Check the Status and Control Registers and verify that the following flags are set: MT ROY;
ONLNS; CURDY; and LOPS (if starting from BOT).

Clear the INHBT bit in the Status Register.

To JVr;te the IDB or TAPE MARK:
1.

Load the Control Register with the code for lOB or WTM and set a one in the GO BIT.

Check if IDBF (or EOFF) is set when done. Also, keep testing CURDY for a set status. When this
occurs, inspect BUSY. If BUSY is reset, the operation is complete.
NOTE
IDB may be written at load point only.

To JVrite. REA D or ERASE:
I.

Load Word Count Register and Bus Address Register with desired values.

Specify the desired function and set the GO BIT to a 1.

Keep testing CURDY for a set status. When CURDY sets and BUSY is reset, the operation is
complete.

I nspect the ER ROR Flag (CR bit 15). If bit I S is set, investigate the appropriate error flag in the
Status and Control Registers.
3·6

CHAPTER 4
THEORY OF OPE.RATION

4.1 GENERAL
This chapter must be read in conjunction with the MIT documentation: HP Interface Guide. HP 13195A Write
Formatter Accessory Kit Manual, and the HP Operating and Service Manual. All three documents relate to the
HP 7970-E phase-encoded Magnetic Tape Transport.
4.2 STATUS REGISTER (SR)
The Status Register is shown on Engineering Drawing TR 79-T03. The SR is loaded from the bus by LDSR and
read back into the bus by SR TO BUS. These two pulses are produced from the address selection logic on
Drawing T02. Table 4-1 lists the SR bits with the significance of each. The content of the various Status Register
lists is described in Chapter 3.
4.3 CONTROL REGISTER (CR)
The Control Register logic is shown on Drawing TR 79-T04. This register is loaded from the bus by LD CR and
its contents are placed on the bus by CR TO BUS. Table 4-2 lists the CR bits with the significance of each.
4.4 RECORDING FORMAT
The recording format (Figure 4-1) is ANSI/IBM compatible and is described briefly in the following paragraphs.
4.4.1 Format Architecture
The recording format for a phase-encoded 9-track magnetic tape contains the following:

1.
2.
3.
4.
5.
6.
7.
8.

Identification Burst (lOB)
Preamble
Data Record
Postamble
Tape Mark (TM)
Inter-Record Gaps (IBG)
Beginning-of-Tape Marker (BOT)
End-of-Tape (EOT)

4·1

Table 4-1
Status Register Bit Assignments
SR Bit

Significance

INHBT: Inhibit. Sets at completion of any valid operation an~ resets only under program control by
writing a zero into the register bit. This bit must be cleared before loading the CR and issuing the
GOP pulse. End of operation conditions that set INHBT include: STOP and RWDS.

RWDS: Rewind Status. This status is true so long as the MTT is rewinding and bec6tnes false when
the MTT is at load point.

FPTS: File Protect Status. This status is true when Write Enable Ring is not in use and becomes false
when the Write Enable Ring is mounted on the reel.

EOFF: Tape Mark Status. Sets when EOFS and EOS coincide. Cleared by GOP or RESET.

IDBF: Identification Burst. Set at EOB time when the ID burst has just been written.

LOPS: Load Point Status from MTT. This status is true as long as the MTT is at load point and
becomes false when no longer at load point.

NXMF: Non·Existent Memory Flag. Set when the NXM flip-flop on the M796 sets. Produc1es a SO ns
pulse through an M606 Pulse Generator to clear NXM.

EOTF: End-Of-Tape Status. Set when End-Of-Tape Status (EOTS) is asserted while in forward
motion at normal or high speed. EOTS is asserted or negated when the leading edge of the EOT
marker is detected by the photosense head assembly. This bit (EOTF) is reset under any of the
following conditions:

If the tape leaves the reel in the forward direction.

When EOTS is negated during a rewind or RD reverse, if FAST FWD is not asse:rted.

If RESET is issued and EOTS is false.

When tape motion finally ceases during a FAST FWD command, the photosense head
assembly stops about 0.187 in. before the leading edge of the EOT marker. EOTS
becomes negated under these conditions but EOTF remains set. The bit, therefore, is
cleared in this case if a rewind or RD reverse command is issued.

TMOUT: Timeout. Set when an ABORT condition occurs. The ABORT signal is produced for either
of the following conditions:

When any write function (ANY WT) is executed into a command at GOP time and the
write status level WRTS is not received back from the MTT after 40 J.,lS delay.

If the MTT does not respond with an EOB within 1.5 sec after any of the following commands is issued:
WRITE
READ
SPREV

WID
EOFC

4-2

Table 4-1 (Cont)
Status Register Bit Assignments
SR Bit

Significance

RDCNT: Read Count. Represents record length discrepancy as compared with word count when in
read mode. Tllis bit sets for a short record (actual record shorter than word count), or long record
(actual record longer than word count).

ONLNS: On-Line Status. The selected MTT is on·line.

BGL: Bus Grant Late. In write mode, BGL sets whenever the Input Buffer Flag (IBFLG) remains
reset (new character not received from the bus), when Data Accepted (DAT ACPT) is received from
the MTT (for the previous character) if the WCR did not overflow.
In read mode, BGL sets when REQ BUS remains set and a new RD CLK pulse is received from the
MIT.

STEF: Single Track Error Flag. Sets at EOB time when a single track error is received from the MIT.
This also causes the ERROR bit in the Control Register to set.

MTEF: Multiple Track Error Flag. Sets at EOB time when a multiple track error is received from the
MIT. This also causes the ERROR bit in the CR to set. MTE specifies that an uncorrectable error has
occurred and the block must be re-written on a new section of tape (or re-read). The control for this
operation is not included in the hardware and must therefore be accomplished by the software.

WPEF: Write Parity Error Flag. Sets when a write parity error is received from the parity check logic.
Write parity is generated and checked while data is being transferred from the first to the second
buffer stage. This bit is set only by the first error detected in a record. Setting this bit causes the
ERROR bit in the CB to set.

RPEF: Read Parity Error Flag. Sets when a read parity error is detected. Read parity is generated and
checked for read-after-write and read-only modes. Only the first read parity error in a record is
reported.

4.4.2 Definitions
Before data is written on tape, the tape is erased to a specified magnetic flux polarity. Erasure is achieved by
passing the tape across a dc erase head before writing. .
1.

Erase: The erase function magnetizes the entire width of tape so that the physical beginning of tape
(rim end near the BOT) becomes a north-seeking pole. Tape is fully saturated in the erased direction
in the initial gap and interblock gap area.

When writing phase-encoded tape, magnetic flux reversals are written for both I and 0 bits. A 1 data
bit is defined as a flux reversal to the polarity of the inter-block gap (IDG), when reading in the
forward direction. The IBG itself is a dc erased section of tape.

A 0 data bit is defined as a flux reversal to the polarity opposite that of the IBG, when reading in the
forward direction.

A flux reversal is written at the nominal midpoint between successive 1 bits or 0 bits, to establish
proper polarity. This is known as phase flux reversal. See Figure 4-2.

The recording density is 1600 characters per inch (cpi). The nominal character spacing exclusive of phase flux
reversals, is 0.625 X 10-3 in. It is important to note that density statements in cpi are always exclusive of phase
flux reversals.

4·3

Table 4-2
Control Register Bit Assignments
Significance

Bit
00

GO BIT: Must be issued with each command. When a command is issued with GO BIT set, a
1 JJS waiting period elapses before the GO Pulse (GOP) is generated. GOP (T06) causes tht' command, if legal, to be executed in the TCU. Commands are investigated for validity during the
1 JJS period. When an illegal command is detected, the following occurs:

The command is not executed.

The Illegal Command bit (ILCMD) in the CR sets.

INTF flag sets causing an interrupt to be generated.

01.02,03,04

FUNCTION BITS: These bits derme the command functions. These bits are changed only by
writing Is or Os. Of the 16 possible combinations, only 9 are valid; all others are illegal. See
Table 4-3.

BUSY: The TCU BUSY flag sets when one of the nine valid commands listed in Table 4-3 is
issued. This flag is reset as a result of any of the following terminal conditions: SET SOE,
STOP, RWOS, CLR OFL, and RESET.

INT ENB: Interrupt Enable. This bit must be set or interrupts are inhibited.

CU ROY: Control Unit Ready. This flag, when set, specifies that the TCU is ready to rel:eive a
command. When a legal command is issued, the CU ROY flip-flop resets specifying that the
TCU is busy (executing a command). Illegal commands do not reset CU ROY as GOP is not
generated. This flag is set by any of the following conditions:
1.

When EOPF is set at the end of an operation, if the MIT is ON-LINE and the TCU
is not in a PWR CLR mode.

When the MTT is switched ON-LINE by depressing the pushbutton switch all the
front of the MIT housing.

When the PWR CLR flip-flop is reset (900 ms after being set) provided the MIT is
ON·LINE.

The CU ROY flag is reset (TCU busy) under the following conditions:

08,09

When the OFLIN command is issued (the MIT is turned off-line).

When the PWR CLR flip·flop is set (Le., the TCU is in PWR CLR mode).

When a legal command is issued (GOP is produced),

S BITS: Select Bits. These bits select one of four tape transports as listed in Table 4-4. In
certain applications all four decodes are OR'ed to address the same transport. In such configurations it is not necessary to load bits 08 and 09.

Table 4-2 (Cant)
Control Register Bit Assignments

Bit

Significance

MTRDY: Magnetic Tape Ready. This bit reflects the MIT Ready Status. It is set whenever the
MIT is in the ready condition.

PWR CLR: This is the power clear bit used to clear the TCU. When this bit is~.t under program control, it performs the following:
po

Produces a 20 ms pulse which is OR'ed with BUS INIT to produce RESET.

Reset the CY RDY flag in the Control Register signifying that the TCU is busy
while PWR CLR flip-flop is set.

It triggers a 900 ms delay at the end of which PWR CLR is cleared and CU RDY is
set.

12. l3

EXTENDED BUS ADDRESS BITS: These are the extended bus address bits that provide
A (17-16) for extended memory transfers. When BAOVFL (Bus Address Overflow) becomes
true, the fIrst 32K memory block is full and A16 sets allowing transfers to memory in the
32K-64K range. The next BAOVFL resets XBA16 and set XBAI7, to permit access to locations between 64K and 96K. When both XBA17 and XBA16 are set, access is allowed between
96K-128K. To summarize:
Memory Range
0-32K
32K-64K
64K-96K
96K-128K

XBAI7

o
o

XBA16

o
I

o
1

ILCMD: Illegal Command. This bit (TOS) sets when an illegal command is issued as defined in
Table 3-1, bit 14.

ERR: Error. lhis bit sets when any of the following error conditions occur:
1.

BGL; Bus Grant Late for either write or read NPR's.

RD CNT; during a READ operation when the record length is shorter than the word
count or longer than the word count.

WPEF; when the WRITE PARITY ERROR flag is set.

RPEF; when the READ PARITY ERROR flag is set.

4-5

Table 4-2 (Cont)
Control Register Bit Assignments
Significance

Bit

15 (Cont)

STE; when a Single Track Error is detected~ .

MTE; when a Multiple Track Error is detected, (this includes errors in the Parity
Channel).

OFLNP; when the MTT is commanded to go Off-Line or goes Off-Line accidently"

ABORT

ILP; Illegal Pulse produced when ILLEGAL is asserted.

4.4.3 Track Identification
The A NSI and IBM tracks are configured in Figure 4-1· as follows:
ANSI Track
IBM Track
Binary Weight
ASCII Bits

22
b3

2°
bl

3
3

P
P
P

24
bs

5
2

6
1

.p - Parity bit (odd). Z - Zero bit.
bl-b, correspond to the bit assignments in the ASCII code.

4.4.4 Parity
Only character parity is used in phase encoded recording. Character parity is odd.
4.4.5 Identification Burst (IDB)
The phase-encoded recording is identified by a burst of recording at the BOT marker. This burst consists of 5600
bits of alternate 1 bits and 0 bits in track P; all other tracks are erased. The IDB begins a minimum of 1.7 in.
before the trailing edge of the BOT marker, but ends at 0.5 in. before the first block. For the TR 79·F A, the lOB
begins 2A25 in., nominal, before the trailing edge of the BOT, and ends 2.6 in., nominal, before the first data
block. The IDB is written automatically by the Formatter upon command from the TCU. No lOB data is
transferred from or to the TCU when the WID (Write IDB) command is issued to the MTT.
4.4.6 Preamble
Preceding data in each block isa preamble consisting of 41 characters. Forty of these characters contain 0 bits in
all tracks followed by a single character containing 1 bits in all tracks (see Figure 4-1).
The Preamble synchronizes the detection logic so that Is and Os are identified correctly when reading the data
bytes that follow. The Preamble is written automatically by the MTT upon receipt of the WPA command from
the TCU. No data is exchanged between the TCU and the MTT when writing or reading the Preamble.
4.4.7

PO"itamble

A Postamble follows the data in each block. The Postamble consists of 41 characters, the first of which cCintains 1
bits in all tracks followed by 40 characters containing 0 bits in all tracks. The Postamble, therefore, is ;1 mirror
image of the Preamble (Figure 4·1). The Postamble is provided for accomplishing electronic synchronization and
is written automatically by the MTT upon receipt of the EOD (End-of-Data) command from the TCU. No data
is exchanged bet ween the TeV and MTT during writing or reading of the Postamble.
4-6

9-TRACK PH ENCODED FORMAT

PHYSICAL
BEGINNING
OF TAPE

DATA RECORD OR BLOCK_

40 CHAR
I CHAR
ZEROS
ONES
'I CHAR ~
~40
CHAR
ONES
ZEROS
IBM
PREDATA
POSTTRK
AMBLE _
AMBLE

4
6

loENTBURST.~600BIT9

o
~

•• 4 • • • • ' . . . , . , . . . . . . . . . . . . . . . . . . . . . . .

g==g:g=====g:g==g
~ g==g: g=====g: g==g
-1 ~_ ~:~:~~~M
3

rBoT1

0--0 10-----010--0
0--010-----010--0
0--010-----0 I 0--0

0--010-----010--0
0 - - 0 1 0 - - - - - 0 10--0

I -1'~':~~
f--tOtI. _ ~~OT";~=-I

PREAMBLE

REC~~~Tc:.A~~OCKj
L
I

DATA

POSTI J AMBLE

0--010-----010--0
0--0 I 0 - - - - - 0 1 0 - - 0
0--0 I 0 - - - - - 0 1 0 - - 0
0--0 l o - ! - - - - o l 0 - - 0
0--010-----010--0
0--0 I 0 - - - - - 0 1 0 - - 0
0--0 10 - - - - - 0 1 0 - - 0
0--0 10 - - - - - 0 I 0 - - 0
0--0 1 0 - - - - - 0 I 0 - - 0

I-

ED~~~~i~

PHYS ICAL
TAPE
<:11END
__

.THIS IS THE WRITE GAP,
THE WRITE-REV-READ GAP IS 0.61"

Figure 4-1

9-Track PH-Encoded Format

4-7

¢:J DIR~CTlON OF FORWARD TAPE MOTION
:~~~~~~;G

IBIT c;ELLIBIT CELL1BIT CELL1BIT CELL1BIT CELL BIT CELL BIT CELL IBIT CELL BIT CELL
BIT PATTERN"
0
•.• 0
•.•
0
·1"
t
....
0
t
•

1 •.• 1 .... 1 ·1"

·1"

OF TAPE

T-/
IBG FLUX POLARITY

t BIT
SHIFT TIME

OBIT
SHIFT TIME

PHASE BIT
SHIFT TIME
CS-0828

Figure 4-2

Phase-Encoded Write Waveforms

Table 4-3
Command Function Decoding
Command

Octal Code

D04

D03

D02

DOl

ILC 00
WRT
RDFWD
ILC03
SPREV
ILC 05
ILC06
ERSEN
RWDEN
ILC 11
ILC 12
FAST FWD
ILC 14
WID B
WEOF
OFlIN

00
01
02
03
04
05
06
07
10

L
L
L
L
L
L
L
L
H
H

L
L
L
L
H
H

L
L

H
H

12
13
14
15
16
17

H
H
H
H
H

H
L
L
L
L
H
H
H
H

H
H
L
L

L
L
H
H
L
L
H
H

Table 4-4
Transport Selection Decoding

MIT

Octal Code

D09

008

0
1

00
01
02
03

L
L
H
H

L
H
L

4-8

L
L
H
L

H
L

H
L
H
L

H
L
H
L
H

4.4.8 Data Record
Information is recorded on tape between the Preamble and Postamble. The combination of Preamble-DataPostamble makes up the data block. The ANSI specifications for phase-encoded tapes stipulates that the data
portion of a block shall contain a minimum of 18 characters and a maximum of 2048 characters.
4.4.9 Tape l'flark (TM)
A Tape f\fark is a special control block consisting of at least 40 zero bits written in tracks 1, 2, 4, 5, 7, and 8
(ANSI). Tracks 3, 6, and 9 are dc erased. The TM is preceded by a normal IBG (of 0.66 in.).
4.4.10 Inter-Block Gap (IBG)
The ANSI specification stipulates the following measurements for the IBG:
Minimum
Nominal
Maximum

0.5 in.
0.6 in.
25 ft

In the TR79-FA, the IBG for WRITE-WRITE is about 0.66 in. while for WRITE-BACK SPACE-READ the
IBG is about 0.61 in.
The gap between the last bit in the lOB and the first recorded character is 2.6 in. nominal for the TR 79-FA.
I BG generation and checking logic is shown on Drawing TR 79-T08 and T09. The basis of the operation is a twostage counter that is started and stopped when a time measurement is required.

4.5 GAP COMPOSITIONS
Normally, the gap between two blocks comprises two sections. The first section is generated at completion (the
shut-down stage) of the block just completed; the second section is generated while starting-up to write a new
block or record. The size of the gap obtained during the write operation depends on whether a block that has just
been written is followed by another written block or the written block is followed by a Space Reverse-Read
Forward operation. The IBG corresponding to the latter is slightly shorter than the IBG produced in the former
case. The reason for this is as follows: If the record just written is to be read, a SPACE REV function must be
produced. Issuing this command causes the write current to be turned off in the Write-and-Erase Heads, thus
producing a footprint of unwanted information on tape; this is commonly referred to as CIG or glitch. When
SPACE REV and READ FWD are completed, the Read-Write Heads are brought to a halt slightly before the
previous stopping position of the heads. This new positioning allows the Write-and-Erase Heads to go over the
footprint and erase it before the new block is written, thereby producing a clean gap that is slightly shorter than
the gap obtained normally. See Paragraphs 4.5.2.1 and 4.5.2.2.
4.5.1 Gap Shutdown
When in the start/stop mode of operation, the tape st~ps after writing the last character in the block. The
position of the Read Head determines the size of the Write or Read Shut-Down portion of the gap, Figure 4-3.
The position of the Read Head can be determined as described in the following paragraphs.
4.5.1.1 Write Shut-Down - When the last character and the Postamble ofa particular block are written on tape,
the MTT responds with EOB which produces BLK END (T09). This signal (BLK END) causes the COUNT
ENS flip-flop to set, allowing the 2-stage gap timing counter (Sheet T08) to start counting. The first stage of the
counter is a divide by 40 and is driven by clock pulse 2DF, (2DF clock is produced in the MTT and runs
continuously). The output pin of gate B13 (T08) issues a pulse every 0.5 ms; therefore, the desired delay, in half
milliseconds, can be obtained by decoding counter stage TCO through TC7. Signal BLK END also generates
SET SDE (Sheet T09) which sets SHOWN ENB (T08). This flip-flop enables WGOLY to be generated 3 ms
following BLK END. Signal WGOLY causes SHOWN to be produced.
\

4·9

REAO HEAD'
STOP.

O.Ot2~·
rt0.075M-t-0.t87~""""'"t--"
~ _O.I'O~
O.~ma
3ma

RECORD N

.I I
I

WRITE
SHUT-DOWN
DELAY

-:-:8-----t--D

Ii 1
I
I

SPEED PROFILE

15ma

. '\
II
i·1
RAMP-:DOWN
PERIOD

WRIT[ HEAD
STOP

WRITE-READ HEAD
SEPARATION

'RAMP-UP
PERIOD

WRITE i-!
STUApRTRECORD (N+t)
•
, DELAY
W_S_T_UPI

p,
. ._ _ _

,~,

I~SHUT-DOWN

, ' I I --~
I
! _.I. __. .
I

fL..~_O.1875~O.05._'
15ma
2ma:9'1

_ _ _....

6ma

FW()
SPEED hOFILi,
I

(

PORTION_kHEAO SEPARATIO"
0 FIB G (X)
Z)

START-UP PORTIONJ
0 F I BG (Y)

DELAY LI ST
COMMAND

START -UP
DEl.:IW
(ma)

SHUT-DOWN
DELAY
(ma)

WRITE

READ

RD REV

WIDB

WTM

ERASE

TOTAL GAP LENGTH· X+ Y+Z
CS-0831

Figure 4-3

Write Gap Timing

Signal S H DWN performs the following:
1.

Clears the SHOWN ENB flip-flop, thus terminating the Write Shut-Down Delay WGDLY.

Clears the Command Register which includes the clearing of FWD, thus causing the MTT Capstan
Motors to ramp-down.

Sets BUSY once more during the current block to imply that the TeU is still busy while shut-down is
in process.

Further. the clearing of FWD qualifies pin fl of gate A23 (T09). This gate asserts 17 ms after FWD is cleared,
thereby clearing the MOTION flip-flop and producing STOP. This short pulse is used to:

Clear the COUNT ENB flip-flop, thus stopping the 2-stage counter.

Clear BUSY, thus signaling the completion of the current block and its associated portion of the gap.'

The Read and Write Heads are now at a standstill near the middle of the gap (Figure 4-3).
4.5.1.1 Read Forward Shut-Down - The Read Gap Delay pulse RGDL Y (T08) is produced in much the same
manner as described in Paragraph 4.5.1.1 except that the delay is only I ms rather than 3 ms. The purpose of this
arrangement allows the CIG (or footprint) left on tape during a Write-Back Space-Read to be erased if a new
block is being written; see Paragraph 4.5 for more detail.

4-10

4.5.1.3 Identification Burst Shut-Down - An EOB is transmitted from the MTT to signify writing of the ID
BURST. Signal BLK END is generated from EOB and is used to initiate the proper IDB gap to be followed by
the shut-down sequence (Figure 4-4).

-t+....---2 .• 20·

FIRST
BLOCK
I I I II I I I I I I
I I I II I I I I I I
11111111111
11111111111
11111111111
11111111111
11111111111
11111111111
11111111111

NOM~

[}~~~~KR-=-j

I I II I I I I I I I I I I I I I I I I I II I I I
I OENTI FICATION BURST
(5600 ALTERNATE ONES S ZEROS)

CS-0834

Figure 4-4

Identification Burst Positioning

Signal BLK END sets COUNT ENB which starts the counter. Gate E09-Nl (Sheet T08) qualifies when TC6 and
TC7 and WIDB EN are true. This occurs 96 ms following EOB and corresponds to 2.4 in. of tape (at 25 ips).
Signal LDP GAP is also produced and performs the following:
I.
2.
3.

Generates CLR TC (T09) which clears the counter momentarily and allows it to restart.
Generates SET SDE which sets the SHDWIN ENB flip-flop.
Clears the BUSY flip-flop.

With the counter starting a new count cycle and SHDWN ENB set, Gate A13-P2 (Sheet T08) qualifies when TCI
and TC2 are true, i.e., after a 2 ms delay at which time WGDL Y is produced.
Signal WGDLY produces SHDWN (because BUSY is reset). Once SHOWN is produced, tf1e sequence of events
that follows is exactly the same as described in Paragraph 4.5.2.1.
No attempt is made to produce a standard start-up procedure when the WIDB command is issued from load
point because no gap is required before the IDB.
4.5.2 Gap Start-Up
When in the Start/Stop mode of operation, tape motion start-up from the middle of a gap. ramp-up, and start-up
delays are determined as a function of Read Head and Write Head positions (Figure 4-5).
4.5.2.1 Write Start-Up - When the write command is asserted, FWD, WSWC, and WT ENB are also produced.
FWD causes the MOTION flip-flop to be set, and this in turn enables the 2-stage counter. Also. GOP, which was
used to clock the MTT Command Register., causes COUNT ENB to set allowing a count cycle to occur. Gate
B 13 pin P2 (T08) is qualified when a count of 34 has been achieved. This represents 17 ms; therefore. WSTUP is
asserted 17 ms after the WRITE command is selected and, as a result, WSTUP produces GAP END which clears
COUNT ENB. This causes the counter to stop which signals the end of the ramp-up period and start-up delays
and is. therefore, the end of the gap (Figure 4-3). WSTUP is also used to cause the Preamble to be written on tape
by setting the WPAM B flip-flop (TIl). The start-up portion of the gap is determined from the stop position of
the Write Head, the Write Head (W Head) being 0.150 in. ahead of the Read Head (R Head).

4-11

-------~--

-I

DATA OR

L- LOAD
LEADING EDGE OF
POINT

WRITE HEAO
GAP

REFLECTIVE STRIP
_

PHYSICAL BEGINNfNG
OF TAPE

FORWARD MOTION .....

cs-oan

Figure 4-5

Head Positioning

The total size of the IBG when writing is the sum of three quantities:
SHUT-DOWN Portion = 0.2750 in.
Write- Read Head Separation = 0.1500 in.
START-UP Portion = 0.2375 in.
Write IBG = 0.6625 in.

4.5.2.2

Read Start-Up - When a READ FWD command is issued, the sequence of events that follows is much
the same as that for a WRITE except that RSTUP is produced in place ofWSTUP, and the Read Start-Up delay
is 12 ms. Therefore, for a READ FWD operation, the TCU starts looking for data while the Read Head is still in
the gap. However. if it desired to read a block immediately after it is written, i.e., if the operation is WRITEBACK SPACE-READ, then the size of the IBG is calculated as follows (see Figure 4-3).
SHUT-DOWN Portion = 0.2250 in.
\Vrite-Read Head Separation = 0.1500 in.
STAR T
Portion = 0.2375 in.
Read IBG = 0.6125 in.

-up

4.5.3 Tape :\Iark Gap
Operations for Tape Mark Shut-Down and Start-Up are shown in Figure 4-6 and described in the following
paragraphs.
4.5.3.1 Tape Mark Shut-Down - When TAPE MARK is written by the Formatter, the MTT issues EOB signifying that TAPE MARK has been completed. Signal EOB produces BLK END which is used on drawings
TR 79-T08 and T09 to produce gap shut-down in exactly the same manner as described for Write Shut··Down in
Paragraph 4.5.1.1. Refer also to the timing diagram, Figure 4-3.

4.5.3.2 Tape l\lark Start-Up - When the command WEOF to write TAPE MARK is issued, WEOF EN and
COUNT EN B are both set. The latter allows the counter to start a time cycle and the former allows Gate B13-P2
to qualify when TCI and TC5 are true, thus producing WSTUP. The sequence of events that follow is exactly the
same as described for Write Start-Up. See Paragraph 4.5.2.1 and Figure 4-3.
4.5.4

Erase Gap
Operations for Erase Gap Shut-Down and Start-Up are discussed in the following paragraphs.

4·12

WEOF

r-- -t __________________________________________________________________
1 S
1'

GOP H ____________~n~
I

FWD H _ _ _ _ _ _""1
I

WSWC H

I
_____________________________________ _____________________
---'Hh
I~

-=-_......

WRTS H _ _ _ _ _ _

IIII
WEOF EN H _________

/III

SPEED PROFILE

~--------

I
I

I
COUNT ENB H _ _ _ _ _ _ _ _..,.j

I
I

WSTUP H _______________________

~fl~

______________~____~!----_________________
I

EOFC H ___________________________

/I
II

I
I
I

~I- - - - - - - - - - - - - - - - - - - - - -

BLK END H _________________________________________-'jl L
_____,;....._ _ _ _ _ _ _ _ _ _ __
II

MOTION H _ _ _ _ _ _ _..,.j

I
I

I ______________

STOP H _________________________________________________ I

r'---'7mS -----.I.

~.----~.

SHDWNENB H _________________________________________________

-'r----i~----------------I

SHOWN L

CS-08n

Figure 4-6

Write Tape Mark Timing

4-13

".5.4.1 Erase Shut-Down - When an ERASE command is completed, it is necessary to produce an orde:rIy shutdown. The MTT does not produce an EOB in this case; therefore, BLK END (T09) was forced at end of the erase
operation by ClR ERS (produced on Drawing TR79F-T07 when WCR overflows). Once BlK END is produced. the shut-down sequence follows the same sequence as the Write Shut-Down. See Paragraph 4.5.1.1 and
Figure 4-3.
".5.4.2 Erase Start-Up - No attempt is made to obtain a standard start-up when erasing. In fact the erase
. operation starts in the middle of the gap as soon as motion starts.
4.S.S Read Re\'erse Gap
Both SP SHUT-DO\VN and SP REV START-UP are accomplished exactly the same way as for th.: READ
F\VD case; see Paragraphs 4.5.1.2 and 4.5.2.2 respectively.

4.6 :\tTT CO:\t:\IANDS
The commands issued to the MTT are shown on sheets T07 and Ttl and are listed in Table 4-5. All commands
are transmitted to the MTT via TTL drivers (TI7) over a twisted pair cable (T20).

Table 4-5
TeU to MTT Commands
lCU Command

Command Destination
Formatter

Function

MIT
FWD
REV
FAST
RWND
LOCAL
WTENB
WSWC
WID
EOFC
WPAMB
EODAT

CF
CR
CH
CRW
CL
EN
WSW
WIDB
WTM

WPA
EOD

Forward Motion
Reverse Motion
High Speed Forward
Rewind
Off-Line Command
Write Enable
Write Command
Write IDB
Write Tape Mark
Write Preamble
Generates Write Postamble

Another set of commands are produced for lise in the TeU onlr and are not issued to the MTT. These include:
WRITE
READ
SP REV
ERASE.

4.6.1 F\\,O
This command is produced when any of the following control functions is issued:
\VRT
WEOF
\VIDB EN
ERS E~
RD F\\'D
FAST F\VO.

4·14

The above six functions are OR 'ed at gate BI3-FI to produce FWD EN which enables the FWD flip-flop and
causes it to be set at GOP time. Signal GOP is produced 1 J.l.S after the assertion of any function. The FWD
command causes the MTT to move forward at 25 ips. The FWD command is cleared under the following
conditions:

CLR CMD. This is produced from any of the following:
SHOWN
SET BACK
CLR ERS
RESET

4.6.2

ABORT. This is produced either when any write or any read command is issued and no EOB is
produced 1.5 sec later, or when ANY WT is issued and WRTS (Write Status) is not received from the
formatter 40 J.l.S later.

REV

This command is produced when the SP REV function is issued. The REV flip-flop is set at GOP time. The REV
command is transmitted to the MTT and causes it to move in reverse at 25 ips. The REV command is cleared
under the same conditions as the FWD command described in Paragraph 4.6.1.

FAST
This command is produced at GOP time when the program issues the function FAST FWD. It causes the
transport to move forward at 160 ips. This command is cleared when the End-of-Tape Status (EOTS) is asserted.

4.6.3

4.6.4

RWND

This command is produced at GOP time when the program issues the function RWD EN. The command causes
the transport to rewind back to the load point at 160 ips.

4.6.5

LOCAL
This command is produced at GOP time when the program issues the function OFLIN. It causes the transport to
go off-line. The LOCAL command is also unconditionally produced whenever the PWR CLR signal is generated
by the program while the MTT is rewinding. This also causes the transport to go off-line. The LOCAL command
is cleared by the assertion of the ONLNS status when the MTT is placed on-line by manually depressing the ONLINE button at the MTT front panel.

4.6.6 \IT E~B
This command is asserted at GOP time whtn the ANY WT signal is true. Signal ANY WT is produced as an OR
function of WRT, WEOF, WIDB EN, or ERS EN.
The WT ENB command is produced and used in the TCU for all write and erase operations. It is transmitted to
the Formatter card in the MTT for all write operations, i.e., Write, WTM, WPA, and EOD together with the
WSW command. WT ENB is inhibited from being transmitted to the Formatter during an erase operation.

4.6.7

\VS\\'C
This is the SET WRITE command produced at GOP time when WSW EN is asserted. This command is used to
produce the \VS\V signal to the formatter when the Write Enable Ring is in position. Signal WSW must be
asserted for all write and erase operations. The WSWC command is reset when the Write Status (WRTS) level is
received back from the Formatter 20 J.l.S after assertion of WSWC.

4·15

4.6.8 \\'ID
This \.:ommand is issued when the lOB is to be written while the tape is positioned at load point. The program
produces the function WIDB EN which performs the following:
I.
.,

Places a true signal on the D-input of the WID flip-flop
Causes F\VD EN to be produced.

\\'hen GOP is issued. the FWD command is generated causing the tape to move forward from load point. When
the data edge of the load point (Figure 4-S) clears the Photosense Head asembly, the WID flip-flop is triggered
with the negation of the Load Point Status (LOPS) signal and writing the lOB commences. Th, JJimens;ions of
I DB and its associated gap are shown in Figure 4-4. The WID command is cleared by BLK
which is
produced 20 bit times after completion of the IDB.

&No

4.6.9 EOFC
This command is produced when it is desired that the Tape Mark be written anywhere on tape except load point.
Refer to Figure 4-6 for timing. The program produces the function WEOF which performs the following:

I.
2.

Produces FWD EN
Places a true signal at the D-input of the EOFC flip-flop.

When GOP is generated (GOP appears 1 J.l.S after WEOF is issued), the FWD command is asserted a:nd tape
motion begins, the Gap Start-Up sequence is initiated; when WSTUP is produced, the EOFC command is
asserted. and the \Vrite TAPE MARK operation begins. (See Paragraph 4.S.4.) When the Tape Mark is written,
EOB is produced by the MTT 20 bit times later and is used to produce Gap Shut-Down.

4.6.10

\\'PA:\lB

\Vhen it is desired that a record be written and the WRITE command is issued by the program, the TCU
hardware generates WPAMB which causes the Formatter to write the Preamble at the start of every record.
Forty characters (all Os) followed by one character (all Is) are written automatically by the Formatter when its
WPA input is asserted. The WPAMB command is produced when both WRITE and WRTS are true. This places
a high level at the D-input of the WPAMB flip-flop. When the start-up portion of the gap is completed, the pulse
WSTUP is generated. This pulse performs the following:
1.

Sets the \VPAM B flip-flop, thus causing the formatter to start writing the preamble. which lasts for
about 1 ms

Generates a 100 J,LS delay at the expiration of which a pulse, FRST WREQ, is produced. This pulse
generates the first NPR request for writing data on tape.

Approximately two formatter clock pulses following assertion of WPA, the FRDY signal is negated. The change
in level of FRDY triggers a pulse generator (BI9-R2) which clears WPAMB.

4.6.11

EODA T

This command (EODA T) is issued by the TCU to the Formatter during a WRITE operation. The command is
issued \\ hen the last character has been taken by the Formatter from the output buffer and causes the Postamble
to be written. See Figure 4-7.
The conditions for producing this command are as follows:
1.

When gate B2S-VI qualifies. it places a high at the D-input of the EODAT flip-flop.

The last character received by the Formatter produces a DAT ACPT pulse which is delayed 18.S /olS
and clocks the EO OAT nip-flop to the set state. This causes the Formatter to first start wr:lting the
Postamble and to then produce a final OAT ACPT pulse that clears the EOOAT flip-flop. Flip-flop
EODAT can also be unconditionally set when in the WRITE mode if either NXM or BGJL occur.
Either of these two C nibus errors termintes the writing of a record and causes an orderly shut-do\\'n.

I!LKII

LD~HJn~::::::::::+=::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::~-------_
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eHAII

WltlTING ~""'L[ 'I"",

f"AA

L :_ _ _ _ _ _

~~~L-________

Figure 4· 7 Write Timing
4·17

".6.'12 \\'RITE
This command is produced when the function WRT is issued by the program and GOP becomes asserted. The
command is used internally in the TCU and is not transmitted directly to the MTT. When this command is
generated. the following signals are produced: ANY WT. FWD EN. WSW EN. and WT ENB. In addition. this
command is used throughout the TCU to perform such tasks as write gap generation, enable for NPR requests,
and buffer control.
\Vhen the \VRITE command is asserted, the write operation is carried out as described in the following paragraphs. Refer to the write timing diagram, Figure 4-7.
I.

First Character: When the start-up phase of the Write Gap is completed, pulse WTStJP is produced
to generate the WPAMB command and. after a 100 f,LS delay, FRST WREQ. FRST WREQ is OR'ed
with \Vrite NPR request and Read NPR request (TIl) to produce SET REQ which sets REQ BUS
and thus produces the first NPR request (T14). When NPG is produced, the DMA cycle that follows
results in generation of OAT STRB and END CYCLE. END CYCLE increments the WCR and
BAR registers and terminates the DMA cycle. (See the PDP-II Interface Manual for further iIrlformation on the DMA cycle.) The OAT STRB pulse performs two tasks: (I) it direct sets the nin'e bitS of
the input buffer with the first character from the Unibus, and (2) the~ailing edge of OAT STRB
produces a 50 ns pulse which 3ets the Input Buffer flag. IBFLq: Because the Output Buffer is empt~,
OBFLG is in a set state, (in this case this flag was set by the GOP of the WRITE command). With
both IBFLG and OBFLG in a set state, gate AII-V2 (Til) is qualified and the M304 single-shot
(B IS-K I) produces the I J.l.S pulse ScT OBF, which performs the following:
a.

Transfers the character from the input buffer to the output buffer (at the trailing edge of the
pulse).

Causes the OBFLG to be reset, indicating that the output buffer is full.

Causes the IBFLG to be reset indicating that the input buffer is empty.

Produces SET REQ which results in a Write NPR request for a new character.

Second and Subsequent Characters: The first character is now held in the output buffer waiting for the
Formatter to accept it. Step d above produces a new NPR cycle resulting in generation of END
CYCLE AND OAT STRB which performs the same functions as described in Step 1 above with the
following exception: OAT STRB loads the input buffer and sets the IBFLG. If the output buffer is
still loaded with the previous character, OBFLG remains reset, thus inhibiting qualification of gate
A 11-V2. The following conditions are true at this time:
a.

The output buffer is still loaded with the previous character and OBFLG is still reset.

The input buffer is now loaded with a new character and IBLFG is set. When the Formatter
finally accepts the first character, it issues DA (OAT ACPT) back to the TCU. Signal OAT
ACPT performs a number of functions in the TCU, but in the case of buffer control it sets
OBFLG indicating that the output buffer is waiting for a new character. The change in level of
OBFLG enables gate AII-V2 and causes the M304 (BlS-KI) to again produce SET OBF. which
performs the same tasks as described in Step I, above. This sequence of events continues until
the WCR overflows at which time the last character is written and EODAT is generated. See
Paragraph 4.6.12 for details.

If either NXMF or BGL are asserted during the WRITE operation, NPR requests are inhibited.
EODAT is produced, and the ERR is set.

4-18

4.6.13 READ
This command is produced when the function RD FWD is issued by the program and GOP become asserted.
The command is used internally in the TCU and is not transmitted directly to the MTT. When READ is asserted,
the following functions are initiated:
I.
2.
3.
4.

Forward Motion
Read-Gap Generation
NPR Requests
Buffer Control.

\Vhen the READ command is issued, the read operation is carried out as described in the followirtg paragraph.
Refer to the read timing diagram, Figure 4-8. As the MTT starts in motion and the Read Head is just about to
leave the gap and commence going over data characters, the buffer is in the following state:
I.
·2.

The IBFlG flag is reset (empty).
The OBFlG flag is set (empty).

The first Read Clock Pulse (RD ClK) received from the MTT (indicating that the Read Head has just passed
over the first character) causes the IBFlG to set and the input buffer to become loaded. Gate A 11-V2 (Sheet
Til) qualifies and causes the M304 one-shot multivibrator (B 18-KI) to produce SET OBF. This pulse performs
the following tasks:
I.
2.
3.

Shifts the character from the input buffer to the output buffer.
Resets OBFlG, indicating that the output buffer is full.
Resets IBFlG, indicating that the input buffer is empty~

As OBFLG is reset. the M606 pulse generator in location A20~D2 (TIl) produces a SO ns pulse that generates
SET REQ and then REQ BUS (if WCOF is not set). This causes a Read NPR request to be generated. A DMA
cycle follows when NPG is asserted by the bus. At the trailing edge ofNPG, OAT TO BUS is produced to strobe
the data from the output buffer onto the Unibus (TIS). END CYCLE is then produced and used to:
I.
2.
3.

Clear the 0 ~1A Cycle
Set the OBFlG Flag (output buffer is empty)
Increment the WCR and BAR.

As the Read-Head goes over the next character, a new RD ClK pulse is produced and transmitted to the Teu in
the manner described in the foregoing. This sequence continues until WCOF is set, at which time the last character should have been read. In instances where the value in the Word Count Register (WCR) and the record length
are not the same, the error logic in the TCU will function as follows:
1.

If the record length is greater than the value in the WCR, when WCOF is set, no more data will be
taken into memory but the tape will continue moving forward until all surplus data characters have
passed under the heads (but not input to memory). Finally, when EOB appears, a normal stop will
take place in the gap.

If the record is shorter than the value of the WCR, RD CLK pulses will ease and therefore no further
NPR requests will be generated. \Vhen EOB arrives, the TCU will cause the MTT to stop in the gap
as normal, but the WCR will still be non-zero.

Steps I and 2 above are also described under R D CNT in Table 4-1, bit 09. If either NMF or BGl is asserted
during the READ operation, NPR requests are inhibited, and the ERR bit is set.

4-19

Lo CR H-1l~__________________________~._____________________________________________
I
I

READ

H~
I:

FWD H

I~------------------------------------------------------------------~'--_ _ _ __

BLK END H

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j
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SET SoE H . . . . . : - I - ' - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - = : J - - - J

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' _______________________________________________________ ______________,

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COUNT ENB

H~~----------~----~------------------~I~~~.I~.~~\~~~
"ms
,

RSTUP L
(GAP ENOl

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STOP Il..
MOTION

'i',

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:
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EOB H ------------------~---,-s-t-----2-nd------3-r-d------4--tn--------------------------~l L ______________

2"s

RD eLK H

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ROO H ___________________

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IBFLG H ________________________

--------------u:-'
:

OBFLG H

OBFO H

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q LJ i 1--------------------

IBF 0 H _____________..11: L - ,

SET OBF L

500" s -\ ----~.:

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h
h
h
h
h
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f'- '
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n h h h h
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I

REO BUS H - - - - - - - - - -......
NPR L

NPG H _____________________~I~~~~~--------------------_----,
I

OAT TO BUS H

•

END CYCLE H _ _ _ _ _ _ _ _ _ _ _ _...

cs-ons

Figure 4-8

Read Timing

4-20

4.6.14 ERASE
This command is produced when the function ERS EN is issued by the program and GOP becomes asserted. The
command is used internally in the TCU and is not transmitted directly to the MTT. When the ERASE command
is issued the following functions are initiated: FWD EN, WSW EN, and WT ENB. The latter signal, WT ENB is
inhibited from being issued to the Formatter in this instance. The parameters required for erasing tape are:
l.
2.

The write current should be flowing in the Write and Erase Heads (WSW is true)
WT ENB to the Formatter should be disabled.

f ~.

\Vhcn erasure is required, the length of tape to be erased is determined by loading a suitable numberip the )VCR
and then incrementing WCR until it overflows. The WCR is incremented by means of a 6-stage, divide-by-32,
Erase Counter (TIO). \Vhen the ERASE command is issued, the Erase Counter increments the WCR at 800 p.s
intervals. producing a taPe movement of 0.02 in. (at 25 ips, the tape travels 0.025 in. each millisecond). The length
of erased section of tape is, therefore, the product of the number loaded in the WCR and 0.02. The Erase Counter
is driven by 2DF clock. When the counter times out, it triggers a pair of one-shot multivibrators (C08-D2 and
B18-M I) which produces INC WC. This pulse increments the WCR (T14) and the sequence is repeated until
\VCR overflows and WCOF is set, causing CLR ERS to be produced (T07). Signal CLR ERS performs the
following:
I.

Clears the ERASE command thus disabling the Erase Counter
Causes CL R CM D to be generated which clears FWD and WT ENB.

When stopping from an Erase operation, the MTT goes through the Write Shut-Down sequence. This is achieved
by producing a pseudo BLK-END pulse from CLR ERS (T09). For a full description of Write Shut-Down, refer
to Paragraph 4.5.2.

4.6.15 SP REV
This command is produced by the program and is used to cause tape motion in the reverse direction one block at
a time.
No N PR requests are generated for SP REV and no data transaction to memory takes place. Data is reaching the
buffer. however, and parity is being generated and checked.
4.7 TCU A~D :\'1TT TROUBLESHOOTING
The signals listed in Table 4-6 are provided to aid in troubleshooting between the TeU and MTT.

4·21

Table 4-6
TCU to MTT Signal Cross Reference
Function

Controller to Drive
Sel UNT 1 L
RWNDL
Local L
FWDL
REVL
FASTL
WSWCL
WTENB L
WPAMB
WID
(WRT-EOFC)
EODAT L
WDATO L
WDATIL
WDAT2L
WDAT3 L
WDAT4 L
WDATSL
WDAT6 L
WDATI L
WDATP L

Command Select
Command Rewind
Command Local
Command Forward
Command Reverse
Command High Speed
Set Write
Write Forward Enable
Write Preamble
Write ID Burst
Write Tape Mark
End of Data (Start Postamble)
Write Bit 0
Write Bit 1
Write Bit 2
Write Bit 3
Write Bit 4
Write Bit 5
Write Bit 6
Write Bit 7
Write Parity Bit

CSL
CRWL
CLL
CFL
CRL
CHL
WSWL
EN
WPA
WID
WTM
EODL
WDOL
WDIL
WD2L
WD3L
WD4L
WDSL
WD6L
WD7L
WDPL

Function

Drive to Controller
SLL
SRL
SLPL
SRWL
SFP L
SETL
SD16 L
EOBL
TML
IDBL
MTEL
STE L
RDYL
2DFL
SWL
DAL
RCL
RDPL
RDO-7 L

Selected Drive ON-LINE
Ready Status
Load Point Status (BOT)
Rewind Status
File Protect Status
End of Tape Status
Density=1600 bpi (PE) .
End of Block
Tape Mark Detected
ID Burst Detected
Multiple Tracks in Error
Single Track Error
Ready (Write Done)
2X Data Frequency (Clock)
Write Status
Data Word Accepted
Read Clock
Read Parity Bit
Read Bit 0 Through 7

ONLNS H
MTRDYH
LDPSH
RWDSH
FPTSH
EOTSH
SD16 H
EOBH
EOFSH
IDBS H
MTEH
STEH
FRDYH
2DFH
WRTSH
DAT AePT H
RDCLKH
RDPH
RDO-7 H

4-22

4.8 LIST OF l\INEI\10NICS
The following is a list of the mnemonic signal indicators and terms used in this manual.
Definition

l\'lnemonic

2DF

80 kHz clock from the formatter card of the MTT. This clock is equal
to Twice Data Frequency (2DF).

ABO~T

Clears FWD or REV motion flip-flops if the MTT diq. 9.ot respond to
a legal command. Causes SR bit 08 to set. See Table 4~, bit.08.

ADDR TO BUS

Produced by the M796 Master Control Module. Gates the address of
the slave onto BUS A < 17:00>.

ANYWT

Any Write. An OR function of WRT, WEOF, WI DB EN, or ERS
EN.

BA CARRY OUT

Bus Address Carry: produced when the first four bits of the BA
counter overflow.

BACK

This flip-flop sets when the EOTS status is asserted while the tape is
moving forward at high speed and is reset when the EOT is reversed
back to the photosense head assembly.

BAOVFL

Bus Address Overflow occurs when the contents of the BAR counter
become all ones.

BA TO BUS

Gating strobe gates BAR to the Unibus by program.

BAR

Bus Address Register.

BGOUT

Bus Grant Line outlet from the TCU.

BGIN

Bus Grant Line into the TCU.

BG 4, S, 6, 7 IN

Bus Grant level x in.

BG 4, S. 6, 7 0 UT

Bus Grant level x out.

BlK END

BLOCK END. Produced from EOB during a WRITE, WEOF,
WIDB, or READ. Appears 20 character times after the last character
has been read or check-read.

8 OUT lO

OUT LO gates with SSYN INH to limit the width of the pulse. Gates

the SELECT lines to the TCU.
8 SSYN

BUS SSYN inverted for use in the TCU.

BUS AOO through BUS AI7

Bus Address lines AOO through A 17

BUS AC LO

This pulse is asserted when ac power is failing. When this occurs, power is available for 2 ms at full load.

4·23

Mnemonic

Definition

BUS B BSY

Unibus Busy. Asserted when the device becomes bus master.

BUS BR 4. 5. 6, and 7

Bus Request levels 4 through 7.

BUS CO, BUS CI

Bus Control Lines. Coded by the master device to control the slave in
one of four possible data transfer operations. See the Unibus Interface
Manual.

BUS DOO through BUS DIS

Sixteen data lines used to transfer data between maste' and !ilave.

BUS DC LO

Asserted when ac or dc power is failing. When this occurs, a fc~w more
milliseconds of full load dc power are available.

BUS INIT

Used to clear or initialize the CPU and peripheral devices on the bus.
Asserted when (1) the START key on the console is depressed, (2)
when a RESET instruction is executed, and (3) when power fail
sequence occurs.

BUS INTR

This signal is asserted by the bus master to initiate a program interrupt
in the CPU.

BUS MSYN

Master Synchronization signal, used by the master to indicate to the
slave that address and control information is present.

BUS NPG OUT, BUS NPG IN

Non-Processor Grant outlet and inlet lines from and to the TCU,
respectively.

BUS NPR

Non-Processor Request. A bus request signal from a peripheral device
to the CPU. Asserted when a DMA cycle is required.

BUS SACK

Sel<~ction Acknowledge. Asserted by a bus requesting device when it
has received a bus grant.

BUS SSYN

Slave Synchronization signal. The slave's response to the master
(MSYN).

BUSY

The: TCU Busy status. Asserted when a legal command is being executed. Reset when the gap is completed.

C BUS 00 through C BUS 15

Common data bits 00 through 15. These bits are inverted through a
bus driver to produce BUS DOO through BUS D 15.

Forward command; an MTT signal. Connects with FWD in the TCU.

High Speed command; an MTT signal. Connects with FAST in the
TCU.

Off·Line command; an MTT signal. Connects with LOCAL in the
TCU.

4-24

Definition

:\lnemonic

CLR FLG

Clear Flag. Sets the OBFLG under the following conditions:
GOP or Reset
END CYCLE when Reading
DAT. ACPT when Writing

CLR ~ACK

Clears the BACK flip-flop when the EOT has been repositioned under
the photosense head assembly after a reverse from t~a· High Speed
Forward overshoot.
•

CLR CMO

Clear command. Clears MTT commands just before the gap shutdown sequence starts.

CLR ERS

Clear Erase. Clears the ERASE command when the WCR overflows.

CLR FF

Clear flip-flop. Clears WID and EOFC when FRDY is negated, i.e.,
when the command is accepted by the Formatter.

CLR GO

Clear GO. Clears the GOBIT flip-flop.

CLR MF

Clear Motion Forward. Clears MOTION flip-flop.

CLR NEX

Clear Non-Existent Memory. Clears the NXM flip-flop in M796 Master Control Module.

CLR OFL

Clear Ofr Line. Clears the LOCAL flip-flop.

CLR SOE

Clear Shut Down Enable. Used to clear SHDWN ENB and to produce CLR TC.

CLR TC

Clear Time Count. Momentarily clears the 2-stage Gap Counter, causing it to start a new count cycle.

COUNT ENB

Count Enable. When set permits the 2-stage Gap Counter to start a
count cycle. When reset, stops the counter.

Reverse comm~nd, an MTT signal. Links with REV in the TCU.

CR TO BUS

Control Register TO BUS. Strobes the contents of CR to the Unibus
with Address 764000.

CRW

Rewind command; an MTT signal. Links with R WND in the TCU.

Select Unit command; an MTT signal. Links with SEL UNIT 1 in the
TCU.

CU ROY

Control Unit Ready. Set when the TCU is ready to receive a new
command. Reset when GOP is issued, PWR CLR is set or when the
MTT goes off-line.

4·25 .

Definition

Mnemonic'
DA

Data Accepted; a Formatter signal. Links with DAT ACF'I' in the
TeU. Asserted when the Formatter has accepted the data from the
TCU buffer.

DAT ACPT

Data Accepted; a TCU signal. Derived from DA.

DATA TO BUS

Strobes the Read data from the output buffer to the Unibus. This
signal is produced by the M796 Master Control J.todule during a
DATO cycle.

OAT WAIT

A delay produced during a DATI cycle before OAT STRB is asserted.

DATSTRB

DATA STROBE. Strobes data from the bus to the buffer during a
DATI cycle. Produced by the M796 Master Control Module.

DIVOO through DIVOS

Divide stages of the first stage of the Gap Counter.

DOO through DIS

Data lines after inversion through bus receivers in the TCU.

ECO

Erase Counter stage zero (MSB stage).

END COUNT

One of the pulses that clears COUNT END.

END CYCLE

Pulse produced by the M796 Master Control and used to terminate the
DMA cycle.

EOB

End-Or-Block; an MTT signal. Produced during a WRITE, WEOF,
WI DB, or READ. Appears 20 bit times after the last character has
been read or check read.

EOD

End-of-Data; a Formatter signal. When received by the Formatter,
ca.uses it to write the Postamble.

EODAT

End-of-Data: produced by the TCU when the last characteJr is issued
to the Formatter and causes latter to write the Postamble. Links with
EOD.

EOFC

End-of-File command. Produced by the TCU and links with WTM in
the Formatter causing it to write TAPE MARK.

EOFF

End-or-File Flag. Status Register bit 04. Sets when Tape Mark is being
written or read.

EOFS

End-of-File Status. Links with TM in the MTT. Asserte<;l when Tape
Mark is being written or read.

EOP

End-of-Operation Pulse. Produced when the tape stops in the gap on
the completion of a legal command or on the completion elf rewind.

EOTF

End-or-Tape Flag. Status Register bit 07. Set when EOT marker is
detected.

4·26

Definition

:\Inemonic
EOTS

End-of-Tape Status. Links with SET in the MTT. Set when the tape is
at EOT marker.

EOXFER

End-of-Transfer. Pulse produced when the last DAT ACPT is received
from the Formatter. Used to clear EO DAT.

ERASE

Erase command.

ERR

ERROR. Bit 15 of the Control Register. Sets when one of a group of
errors occurs. See Table 3-1, bit 15.

ERS EN

ERASE ENABLE. A function issued by the program. Enables the
ERASE command to be set at GOP time.

FAST

FAST FORWARD command. When issued, the tape moves forward
at 160 ips to the EOT.

FAST F\VD

FAST FORWARD function. Issued· by the program. Enables the
FAST command to be set at GOP time.

FN BOO through FN B03

FUNCTION BITS 00, 01, 02, and 03. The combination of these bits
determines the function being issued by ihe program.

FPTS

File Protect Status. This status is true if the Write Enable Ring is
absent.

FRDY

Formatter Ready. When true, indicates that the Formatter is ready to
accept a command. When false, the Formatter is busy.

FRST \VREQ

First Write Request. Generated 100 J.lS after the WPAMB command is
issued.

FWD

FOR WARD command. When issued, the tape moves forward at
standard speed.

FWD EN

FORWARD ENABLE. A function issued by the program. Enables
the FWD command to be set at GOP time.

FWD + REV

Forward or Reverse. This signal is asserted when either FWD or REV
is asserted.

FWEN

Formatter Write Enable (EN). This is a Formatter signal. Must be
asserted externally when a Write operation is required. Disabled when
erasing. Links with WT EN in the TCU.

GAP END

Produced at completion of gap during start-up.

GO BIT

Bit 00 of the Control Register. Set every time a command is issued.

GOP

GO PULSE. Derived from GO BIT with 1 J.lS delay. Clocks the legal
commands into the Command Register.

4·27

Definition

l\lnemonic
GOP + RESET

GOP or RESET. Signal used for clearing the TCU.

GOPF

GO PULSE flip-flop. Used to generate GOP.

IBF 0 through 7

Input Buffer Bits 0 through 7.

IBFLG

Input Buffer Flag. Set when input stage of buffer is F¥~L, reset when
input buffer is EMPTY.
..

IBF P

Input Buffer Parity bit (bit 9)

IDB

Identification Burst; an MTT signal. links with lOBS in the TCU.

lOB BE

EOB produced at end of writing or reading of lOB.

IDBF

Identification Burst Flag in the Status Register. Set at EOB time when
the IDB status (IDBS) is true.

lOBS

Identification Burst Status; a TCU signal. links with lOB in the
MTT.

ILCOO
IlC03
IlCOS
ILC06
ILCII
ILC12
ILCI4

Illeg;al functions. If issued by the program, CR bits 14 and IS are set
and an interrupt is produced. GOP is not generated.

ILCMD

Bit 14 of the Control Register. Set when an illegal command is issued.
See Table 3-1 t bits 01 through 04 for illegal commands.

ILLEGAL

A pulse produced when an illegal command is issued.

ILP

A 100 ns pulse produced from the leading edge of ILLEGAL.

A strobe produced by the MIOS Address Module. Used for gating
ont.o the bus in the program mode.

INC WC

Inc:rement Word Count. 50 ns pulse (average) used for incrementing
WCR and BAR.

INHBT

INHIBIT. Bit 00 of Status Register. Sets at end of operation. Must be
cleared by program before new command is executed. Inhibits GOP if
not cleared.

INT ENS

Interrupt Enable. CR bit 06. Must be set to allow interrupts. This bit is
not cleared when PWR CLR is issued.

4·28

Definition

:\Inemonic
INTF

Interrupt Flag. Sets when a hardware interrupt condition is produced.

INTR DONE

A pulse produced by the M7821 interrupt module when the interupt is
serviced on B R level 4.

LD BA

Load Bus Address. Address 764006 J used to load the BAR from the
bus.

LD CR

Load Control Register. Address 764000~ used to load the·Control Register from the bus.

LDP GAP

LOAD POINT GAP. This pulse is produced when the 2.4 in. gap
following the IDB is completed.

LOPS

Load Point Status. Asserted while the tape is stationary at load point.
Links with SLP in the MTT.

LD SR

Load Status Register. Address 764002, used to load the Status Register from the bus.

LDWC

Load Word Count Register. Address 764004, used to load the WCR
from the bus.

LOCAL

This command is issued by the TCU and causes the MTT to go offline. This command links with CL in the MTT.

LONG

Indicates that the record being read now is longer than the value in the
WCR. Causes RD CNT flag to be set (an error condition).

MASRA

MASTER A. Generated by the M7821 interrupt module when the
TCU becomes bus master during NPR transactions.

MASR B

MASTER B. Generated by the M7821 interrupt module when the
TCU becomes bus master during an interrupt routine.

MOTION

Motion flip-flop. Set when FWD or REV commands are asserted.
Remains set un~il all motion ceases including ramp-down.

MSYN WAIT

Delay before MSYN is asserted. Generated by M796 Master Control
Module.

MTE

Multiple Track Error; an MTT signal. Causes MTEF to be set. Also
known as hard or permanent error.

MTEF

Multiple Track Error Flag. Set at EOB time when MTE is asserted.

MTRDY

Magnetic Tape Ready. Links with SR in the MTT. Set when the MTT
is ON-LINE and not REWINDING.

MTT

Magnetic Tape Transport.

4·29

Definition

i\lncmonic

NXM

NOIn-Existent Memory flip-flop (in the M796 Master Contre)1 Module). Set when the master issues MSYN and the slave does not respond
with SSYN within 20 J.l.S.

NX~IF

Non-Existent Memory Flag. SR bit 06. Set when NXM is usserted.
When set, causes NXM to be cleared.

OBFLG

Output Buffer Flag. Set when output buffer is EM~Y, reset when
output buffer is FULL.
..

OFLIN

OFF LINE command. Causes the MTT to go off-line.

OFLNP

OFF LINE PULSE. Produced when the ONLNS is negated"

ONLNS

ON-LINE STATUS. Received from the MTT where it is referred to as
SL.

OUT HI, OUT LO

Byt.e Gating Control signals generated in the M 105 Address Module.

PCLR

Power Clear Pulse, 20 ms pulse generated when PWR CLR is set.
Causes CURDY to be reset.

lPCOFF

Power Clear Off. 50 ns pulse produced after 900 ms delay, used to
clear PWR CLij. and to produce SET ROY.

lPWR CLR

POWER CLEAR. Bit 11 of the Control Register. When set by the
program, produces a 20 ms initialize pulse that clears the TCU (exct:pt
INT ENB). Clears itself after a 900 ms delay and sets CURDY.

READ CLOCK. A 2 J.l.S MTT pulse. Indicates that a character has
bee:n read and is present and settled on the Read Data Linc:s of the
MlrT.

RD 0 through RD 7

Read Data Lines of the MTT. These lines are settled when Read Clock
(RC) pulse is issued and remain settled until! J.l.S before the next RC.

Read Block En~. The EOB pulse produced during a READ operation.

RDCLK

Read Clock. A TCU signal derived from RC.

RDCNT

READ COUNT. Bit 09 of the SR. Set when the length of the record
being read is longer or shorter than the Word Count.

RDFWD

Read Forward function. Issued by the program when a READ operation is required.

RD P

Read Data Line 8 or Parity. An MTTsignal. See RD 0 through RD 7.

READ

Read Command in the TCU. Produced from RD FWD at GOP time.

4-30

:\Inemonic

Definition

READY

A Formatter status. Set when the Formatter can accept a command.
Links with FRDY in the TCU.

REQ BUS

Request Bus flip-flop in the M796 Master Control Module. Set when
an NPR has been made.

RESET

This is an OR of BUS INIT or PWR CLR. Clears the11CU.

REV

REVERSE command in the TeU. Causes the MTT to move in the
reverse direction. Links with CR in the MTT.

REV EN

Reverse Enable function. When issued by the program causes REV to
be produced.

RDGLY

Read Gap Delay. A pulse produced at the end of the Read Shut-Down
delay (of 1 ms).

RPEF

Read Parity Error Flag. Bit 15 of SR. Sets when the first Read or
Read-after-Write parity error appears in a block.

RPODD

Read Parity Odd. Asserted when the Read or Read-after-Write character parity is odd.

RSTUP

Read Start-Up. This pulse is produced at the completion of Read
Start-Up portion of the IBG.

R\VD EN

Rewind Enable function. When issued by the program causes RWND
command to be produced.

R\VDS

Rewind Status. Bit 01 of SR. Asserted while MTT is rewinding. Links
with SR W in the MTT.

RWND

REWIND command issued by,the TCU. Causes the MIT to rewind.
Links with CR W in the MTT.

S BIT 8 and 9

Select Bits 08 and 09 in the Control Register. Coded to select one of
four transport.

SO 16

Select Density 1600 bpi. Assertion signifies that the selected MIT is
on-line and can operate on 1600 bpi phase encoded. This is an MTT
signal.

SELECT 0, 2, 4, and 6

Select Address lines from the M 105 module.

SELT 0, 1.2, and 3

Select MTT units 0, 1,2, or 3. These TCU signals link with CSO, CSt,
CS2, CS3 in the MTT, respectively.

SEL UNT I

The OR-function of SELT 0, I, 2, and 3. Any combination of SBIT8
and SBIT9 will select the same MTT (optional signal).

4·31

Definition

l\lnemonic
SET

End-of-Tape Status. An MTT signal. Links with EOTS in the: TeU.

SET BACK

A 50 ns pulse produced when EOTS is asserted when moving at high
speed forward. Causes BACK flip-flop to be set.

SET GO

A I J,LS pulse produced when the GO BIT is set. Used to set the GOPF
flip-flop and hence produce GOP.

SET OBF

SET OUTPUT BUFFER FLAG. A 1 J,LS pulse produceJ as a i~esult of
a transition in the states of IBFLG and OBFLG. Resets both IBFLG
and OBLFG.

SET RDY

SET READY. Produced at EOP, or when ONLNS is asserted,or
PWR CLR flip-flop is reset. Used to set CU ROY.

SET REQ

SET REQUEST. Causes the BUS REQ flip-flop to be set when a
W rite or Read NPR is required.

SET REV

SET REVERSE. Causes the REV command to be set at the end of 900
ms delay following a stop from high speed forward.

SET SDE

SET SHUT-DOWN ENABLE. Causes the SHDWN ENB flip-flop'to
become set during the shut-down stage of the IBG.

SFP

Fil(: Protect Status. This is an MTT signal. Links with FPTS in the
TCU.

SHDWN

SHUT-DOWN. A TeU pulse produced at the end of WRITE- or
READ Shut-Down delay just before ramp-down begins.

SHDWN ENB

SHUT-DOWN ENABLE. This flip-flop enables WRITE- and READ
Shut-Down delays to be produced, WODLY, and RGDLY.

SHORT

Indicates that the record being read now is shorter than the number of
words in the WCR. Causes RD CNT flag to be set (an error
condition).

ON-LINE STATUS. This is an MTT signal linking with ONLNS in
the: TCU. Asserted as long as the MTT is ON-LINE.

SLP

LOAD POINT STATUS. This is an MTT signal linking with LOPS in
the: TCU. Asserted while the MTT is at the load point.

SP F\VD

SPACE FOR WARD function. Causes the tape to move forward one
block at a time (optional).

SP REV

Space Reverse function. Issued by the program to the TCU. Causes
tape motion to reverse direction one block at a time.

4-32

Definition

:\Inemonic
SR

READY STATUS. This is an MTT signal linking with MTRDY in
the TCU. Asserted as long as the MTT is selected, on-line and not
rewinding.

SR TO BUS

Status Regi"ster To Bus. Loads the contents of the SR to the bus with
address 764002.

SR\V

REWIND STATUS. This is an MTT signal linking with aWDS in the
TCU. Asserted while the MTT is rewinding.

STE

Single Track Error. This is an MTT signal. Used to set the STEF flag
at EOB time.

STEF

Single Track Error Flag. Set at EO B time if STE is asserted (an error
condition).

STOP

The pulse appears at the end of the shut-down stage in a WRITE or
READ operation when tape motion has ceased.

S\V

WRITE STATUS. This is a Formatter signal linking with WRTS in
the TCU. Asserted 20 J.LS after issuing the WSWC command in the
TCU. Clears WSWC.

Teo through TC7

Time Count stages 0 through 7 in the Gap Counter. The binary weight
value of each stage represents the number of half milliseconds of delay.

Teu

Tape Control Unit, TR79-FA.

Tape Mark Status. This is an MTT signal linking with EOFS in the
TCU. Asserted while the MTT is reading, or check-reading a Tape
Mark. Causes SR bit 03 to set at EOB time.

TMOUT

TIME OUT. SR bit 08. Set when an ABORT condition occurs.

weOF

Word Count Overflow Flag. Set when WCR overflows.

weOVFL

Word Count Overflow pulse from the M795 W IC module.

weR

Word Count Register.

we TO BUS

Word Count To Bus. Loads the contents of the WCR to the bus with
address 764004.

WDO through WD7

Write Data lines from the TCU to the MTT. Link with WDATO
through WDAT7 in the TCU.

WDP

Write Data line 8 or Parity to the MTT. Links with WDATP in the
TCU.

WDATO through WDAT7

Write Data 0 through 7. Write data bits from the output buffer for
writing on tape. Link with WOO through WD7 in the MTT.

4-33

Definition

Mnemonic
WDATP

Write Data 8 or Parity. Write data bit from the output buffer. Links
with WOP in the MTT.

WEOF

Writ.e End-of-File funetion. Issued by the program when an EOFC
(WTM) command is required.

WGDlY

Write Gap Delay. A pulse produced at the end of WUte Shut.-Down
just before ramp-down starts.

WID

Write Identification Burst command. Set at the trailing edge: of the
LOPS status if WIDB EN was selected by the program.

WIDB EN

Write Identification Burst function. Issued by the program when the
WID command is required.

WPA

Write Preamble. This is a Formatter command linking with WPAMB
in the TCU. Causes the Formatter to write the Preamble.

WPAMB

Write Preamble. This command is produced by the TCU hardware
whe:n the WRITE command is issued causing the Preamble to be written by the Formatter before issuing write data from the TClJ. Links
with WPA in the Formatter.

WPEF

Write Parity Error Flag. Bit 14 of SR. Sets when the first write parity
error appears in a block.

WPODD

Write Parity Odd. Asserted when the write character parity is odd.

WRITE

Write command in the TCU. Produced from WRT at GOP time.

WRT

Write function. Issued by the program when a WRITE operation is
required.

WRTS

Write Status. Links with SW in the Formatter. Asserts 20 J,LS after
isslJing the WSWC command in the TCU. Clears WSWC.

WSTRB

Write Strobe. Produced from an AND condition of Write parameters
and used to gate the WDAT lines to the cable leading to the: MTT.

WSTUP

Write Start-Up. This pulse is produced at the completion of the Write
Start-Up portion of the IBG.

wsw

Set Write Command. This is an MTT signal, linking with VlSWC in
th.: TCU. Assertion of this signal enables the setting of the MTT's
write condition. Turns the current on in the Write and Erase heads.

WSWC

Set Write Command. links with WSW in the MTT. Required for
writing and erasing. This command is asserted at GOP time when the
program selects any write (ANY WT) operation, including erase.

4·34

:\tnemonic

Definition

WS\V EN

Set Write Enable function. Produced when the program selects any
write function, e.g., WRT, WEOF, WIDB EN, ERS EN.

\VT ENB

Write Enable. This is a TeU command produced at GOP time when
ANY WT is asserted. Required for all Write commands except erase.
Links with EN in the Formatter.

XBA 16 and XBA 17

Extended bus address bits 16 and 17. Allow addressing of memory
banks above 32K. See Table 3-1.

4·35

CHAPTER 5

MAINTENANCE

5.1 SPECIAL TEST EQUIPMENT
The following special equipment is required for performing maintenance:
I.
2.
3.
4.
5.
6.

Dual beam oscilloscope
M ultimeter
Fresh reel of tape
Special fluid for developing written tape
Isopropyl alcohol (91 % pure)
Cotton swabs.

5.1 PREVENTIVE MAINTENANCE
All general preventive maintenance procedures specified for the PDP-ll processor also apply to the TR79-FA.
The proper sequence for powering up this system is to turn on the processor first and then the TR 79-F A. The
reverse of this procedure is followed when powering down. The transport maintenance procedures as specified in
Section 3 of the HP Operating and Service Manual should be observed.
5.2.1

TR79-FA Magtape Controller Monthly Field Service Prel'entive Maintenance
I.

Check that the fan in the H720E power supply is not obstructed and that it turns freely when power is
applied.

5.2.2 TR79-FA Magtape Controller Quarterly Field Service Preventive Maintenance
1.

Review the ECO status of the TR 79-FA Magtape Controller, and plan the installation of appropriate
F-coded ECOs.

With power OFF, ensure that all ofthe mounting screws securing the TR 79-FA backplane are tight.
NOTE
Power should remain OFF for steps 3 through 7, below.

Ensure that each module is securely seated in its connector.

Visually inspect the backplane for broken wires, worn insulation, and bent pins. Repair or replace
any defective items.

Inspect all wiring and cables for cuts, breaks, frays, deterioration, kinks, strain. and mechanical
security. Repair or replace defective wiring or cables.

Inspect all connectors for mechanical security and defects. Repair or replace connectors as required.

5-)

Check that all crimp lugs are secure, and that all lugs are properly inserted in their mating connectors.

Turn power ON; check the +5 V device logic voltage.
Reference Point = A5A2
Nominal Value = +5 Vdc
Max Peak-to-Peak Ripple = 0.2 V
Adjust R38 in the associated H720E power supply. If the power supply cannot be adj':lsted to meet
specifications. repair or replace it.

S.2.3

Load the TR79 Subsystem Diagnostic MAINDEC-ll-DZTRA with~.
a.

Specify and run tests 1. 2, and 3 with tape loaded and drive on-line.

If any errors are observed, correct the problem and rerun the failing test.

j vJ \0

TR79-F A Magtape Controller Annual. Field Service Preventive Maintenance

While running the diagnostic specified in step 9 of the quarterly PM procedure, check the one-shot
outputs shown in the table below. Compare the observed value of each with that shown in the following table to discover any major discrepancies. Repair or replace defective circuitry.
Location/Module

Input

Output

Time

C6
M302

H2
M2

F2
T2

20ms
900ms

CIO

H2
M2

F2
T2

200J.Ls
40J.Ls

Rl
01
SI

PI
HI
MI

1 J.LS
100 J.LS
I J.LS
I J.LS

A16
M302

H2
M2

F2
T2

17 ms
18 J.LS

013

75ms

A22
M302

M2
H2

T2
F2

900ms
100 JJS

A25
M302

1.5 sec

M302
Bl8
M304

M302

NOTE
The drawings in this PM procedure are reprinted with the
permission of Hewlett-Packard Company.

5-2

5.2.4

HP7970E Magtape Drive Quarterly Field Service Preventive Maintenance
1.

Check all indicator lamps (LOAD, RESET, REWIND, ON LINE, EOT/BOT SENSOR, and
WRITE ENABLE); replace any that are burned out.

Inspect the tape path, including the areas listed below, for wear; scratches, and mechanical security.
Repair or replace defective items as required.
•
•
•
•

Roller guides
Tape guides
Capstan
Write lock assembly

Using a wipe moistened with, trichlorethylene,
clean the capstan wheel.
.

. 4.

Verify that the reel hold-down assembly correctly secures the reel to the hub. If not, adjust according
to the following procedure:
a.

Release the locking lever (item 1 in Figure 5-1).

Figure 5-1

Reel Motor Assembly

Loosen the lock screw (item 2).

Tighten the reel knob (item 3) one-eighth turn.

Tighten the lock screw, and check for slippage.

5-3

Repeat steps a through d until the tape reel mounts smoothly and without slipping.

NOTE
As the rubber rinl~ (item 4) ages, adjustment may become
impossible; in that case, the ring should be replaced.
5.

Clean (using a clean, dry cloth) or vacuum the drive cabinet and logic racks.

Ensure that all logic modules and connectors are mounted securely.

Turn power ON; check the +5 Vdc logic voltage at the power regulator board.
Reference Point = + 5 V test point on regulator
Nominal Value = +5 Vdc ± 0.05 V
Using a precision DVM, adjust R4 on the power regulator board to obtain the correct voltage.

Check + 12 Vdc and -12 Vdc supplies.
Reference Point = + 12 V dc and -12 V dc test points, respectively
Nominal Value = + 12 Vdc ± 0.36 V and -12 Vdc ± 0.36 V
+5 V is used as a reference voltage. No adjustment is possible. If voltage values are significantly out
of tolerance, repair or replace the regulator.

NOTE
If an annual PM is scheduled, proceed to step 1 of that
PM; if not, continue with step 9, below.
9.

Check tape positioning according to the following procedure:
a.

Using the high-speed forward (+ 160) switch on the capstan servo amplifier, space the tape
forward several feet.

I nitiate a rewind function.

Observe that the tension arms position themselves approximately in the middle of theiir travel,
and that no limit switches are contacted during start-up or shut-down.

Ensure that the tape stops and spaces forward to the load point when the rewind is complete.

If step c discloses positioning problems, adjust as follows:
(I)

Mount a scratch tape on the drive.

(2)

Rotate RI06 (upper potentiometer on the reel servo control board, 62173) fully
counterclockwise.

(3)

Initiate forward motion, using the FWD switch on the capstan servo board (62172).

(4)

Adjust RI06 clockwise to allow the upper servo control arm to deflect over the t()P of the
first upper drilled alignment mark while tape is moving.

5-4

(5)

Reset FWD switch in step 3, above, and set REV switch on same module.

_ (6)

Visually verify that the tension arm deflects the same distance in the opposite direction. If
not, adjust asymmetry (due to nonlinearity of the tension arm transducer) by turning the
tension arm mask so that deflection is symmetrical. R 106 should be readjusted for proper
deflecton.
NOTE
The tension arm may not be centered when there is no tape
motion; this is not relevant, as long as the swing is
symmetrical.

(7)

Repeat the above procedure for the lower tension arm; using R 104 for the adjustment.
NOTE
If a 2-year PM is scheduled for this device, proceed to step
1 of that PM at this time; if not, continue with step 1 of
the semiannual PM procedure for this device.

S.2.S

HP7970E Magtape Drive Semiannual Field Service Preventive Maintenance
1.

Check the capstan offset current by either of the methods described below. (An incorrect setting will
result in the capstan motor creeping when tape motion is supposed to be stopped.)

Method A
a.

Connect a precision voltmeter across the large 3-ohm resistors (R21, R22) located on the capstan servo heat sink (62172).
CAUTION
Do not connect the common side of the resistors to
ground, as this will cause damage to the tachometer; the
meter should have its ground isolated.

With a tape loaded and stopped, measure the voltage across the resistors. (The voltage should
be 0 V ± 0.05 V.)

Method B

Scope the preamp test point on the capstan servo board (62172).

With a tape loaded and stopped, check the voltage at the test point. (The voltage should be 0 V
± 0.7 V.)

If adjustment is necessary, use the OFFSET (OjS) potentiometer on the capstan servo board.
2.

Check the capstan servo drive speed adjustment before performing capstan servo ramp time, read
preamp gain, and write skew delay adjustments.
NOTE
Because the required test equipment (frequency meter,
speed tape, etc.) is not generally available to Field Sen ice
personnel, this portion of the semiannual PM procedure
should be scheduled in conjunction with a representative of
Hewlett Packard.

5·5

Check the capstan servo ramp time according to the following procedure:

NOTE
This procedure rE~quires that the control and status tester
module (13191) be installed.
a.

Load a scratch tape on the drive.

Connect an oscilloscope to the FWD/REV test point on the capstan servo board (62171); sync
on the forward drive command test point (TP9) on the control and status mbtlule (62062) .

Set the control and status t(~st board to provide alternate Forward/Stop commands:

•

( I)

Program mode

(2)

Forward command (CF)

(3)

Maximum rep rate (PCF control fully counterclockwise)

Observe the waveform, and compare it with the following:

~--'OO%

- - --90%

CP-1I51

In this figure, 90% of the waveform should be set at 12.6 ms for a drive tape speed of25 in./sec.
e.

Adjust the ramp potentiomc!ter on the capstan servo board to obtain the correct timing.

Verify the setting according to the following procedure:
(I)

Connect the Channel A probe of the oscilloscope to the tachometer output on the capstan
servo board; connect the Channel B probe to any preamp output test point on thc~ preamp
board (62034).

(2)

Mount a tape that has previously been recorded with all Is.

(3)

Trigger the oscilloscope on a forward drive command, and use the control and status test
module to produce alternating Forward/Stop commands:
Program mode
Forward command (CF)
Maximum rep rate (PCF control fully counterclockwise)

(4)

When reading the all-Is tape, the oscilloscope should display a waveform like the one in
the following figure.

5-6

e Channel B = Preamp Output 0.1 V/cm
Channel A = Tachometer Output 0.2 V /cm
5 ms/cm
.

+-\~t-t:-'-t~~~t'tr:;~*","A

CP-I852

Tachometer and Data Envelope

Check the read preamp gain according to the following procedure:
a.

Install the control and status test board (13191) and write formatter test board (13196).

Clean the read/write head.

Load a scratch tape.

Connect the oscilloscope to the DIFF test point on the parity channel of the preamp module
(62034).

Perform a continuous write of alternating Is, using the two test boards set up as follows:
(I)

Control and status test board
OFF
ON
OFF
ON
MAN
SETCRW

CH
WSW
CR
CF
PROG/MAN
CRW /OFF/SETCRW
(2)

Write Formatter test board
DATA SELECT
ENDOFBLOCK
WRITE

1600 FRPI
OFF
DATA BLOCKS (This should be the last switch set.)

Measure the average peak-to-peak amplitude of the signal. If the signal is not within the specified range (4.5 V ± 0.3 V), adjust the associated gain potentiometer on the preamp module
(62034) to obtain a peak-to-peak amplitude of 4.5 V ± 0.1 V.

Repeat this procedure for each of the remaining eight channels.

Check the write skew delay according to the following procedure:
a.

I nstall the control and status tester (13191) and write formatter tester (13196).

Load master skew tape.

5-'

Set the control and status tester to perform a read function.
CF
PROG/MAN
CR
WSW

CH
CRW /OFF /SET CR\\'
d.

ON
MAN
OFF
OFF
OFF
OFF

!i
Connect Channel A of the oscilloscope to OAT test point on the read decoder tv0dul~ (62041)
of the reference track (track 5, Channel 2).

Set the oscilloscope controls. to ALT mode,S f.l.S sweep, and connect Channel B to DAT test
point of the other eight read decoder modules.

Observe and record the time displacement of the positive-going edge of each track with respect
to the reference track. Displacements of more than 12 f.l.S (at 25 in./sec) from the reference track
may be caused by head wear or electronic failure of the preamp or decoder. No adjustment is
possible; repair or replace dc!fective items.

Remove the skew tape, and load a blank reel of scratch tape.

I nitiate a write operation, using the test modules set as follows:
(1)

Control and status tester

OFF
ON
OFF
ON
MAN
SETCRW

WSW
CR
CF
PROG/MAN
CRW/OFF/SETCRW
(2)

Write formatter tester
DATA SELECT
ENDOFBLOCK
WRITE

1600 FRPI
OFF
DATA BLOCK (This should be the last switch set.)

Measure the skew delay at the OAT test point of each decoder module and compare thc~ time of
each with the reference track. If all tracks are within 50 ms of the reference track, no adjustment
is necessary. If not, set the write skew according to the following procedure:
(I)

Set all of the skew delay variable resistors (the exposed resistors on the write data modules
62049 and 62050) for minimum delay (fully counterclockwise).

(2)

Adjust the delay resistor for Channel 2 clockwise to ensure that the trailing edge of that
channel will occur slightly later than the trailing edge of the remaining channels.

(3)

Adjust each delay resis,tor for no delay with respect to the reference channel.

Replace the load point bulb (part no. 29-10204); refer to Figure 5-2.

5·8

CP·1838

Figure 5 2
m

5.1.6

Load Point Bulb Assembly

HP7970E I\-lagtape Drive Annual Field Service Preventive Maintenance
I.

Replace both tension arm sensors; refer to Figure 5-3.

NOTE
Return to step 9 of the quarterly PM procedures at this
time.

./.

~ .. --@-t)-e@

~
,." ~r
~d.

__ - -

_~ ~@- ~0<1

TENSION ARM
SENSOR ASSEMBLY

.. " ....

, ~
~

/
CP·1839

Figure 5-3

Tension Arm Sensor

5-9

S.2.7 HP7970E Magtape Drive Two-Year Held Service Preventive Maintenance
I.

Replace the capstan wheel. Ensure that the wheel is positioned correctly by verifying that the tape is
centered on the wheel while tape is in motion.

Replace the four tape roller guidt:s.
NOTE
Return to step 1 of the semiannual PM procedure at this
time.

S.3 CORRECTIVE MAINTENANCE TECHNIQUES
'(f a failure occurs, running the special diagnostic program, Test 6, should aid in isolating the problem. Should the
diagnostic fail to run completely, the propel' approach is to load suitable subroutines as outlined in Paragraph
.3.5. Tests in this case should follow a systl:matic sequence, investigating some of the basic functions in the
rollowing order:
I.
2.
3.
4.
5.
6.

Control Register (T04)
GO BIT and GOP logic (T06)
Function Decoder (T06)
MTT commands (T07)
Gap Timing (T08)
Buffer Control (TIl)

If the foregoing sections are operational, it s.hould be possible to run the special diagnostic and investiigate any
remaining problems. Test 6 of the diagnostic: program contains some useful subsets that can be used for solving
most problems.

5·10

CHAPTER 6
SPARE PARTS

6.1 :\10DULES
Table 6-1 lists the module complement of the TR79-FA by type, quantity, and function. For maximum maintainability, it is suggested that a spare level of at least one of each module type be maintained at all times. Refer
to the Module Utilization sheet (TR 79-F-TOl) in the TR 79-FA Engineering Drawing Set for module slot
locations.

6·1

Table 6-1
TR79-F A Module Complement
Module

Description

Quantity

MIOS
Mill
MI12
MIl3
MIlS
MIl7
M119
Ml21
M149
M162
M163
M203
M204
M20S
M206
M207
M302
M304
M306
M606
M617
M622
M783
M784
M79S
M796
M798
M906
M912
1\1930
MII03
M1307
M7821
G736

Address Selector
Inverter
2-Input NOR
2-Input NAND
3-Input NAND
4-Input NAND
8-Input ;~AND
AND-NOR GATE
9X2 NAND WIRED OR
Parity Circuit
Binary to Decimal Decoder
RIS Flip-Flop
11K Flip-Flop (Gates)
D-Type Flip-Flop
D-Type Flip-Flop (Common CLEAR)
11K Flip-Flop
Delay Multivibrator (3 input)
Delay Multivibrator (2 input)
Integrating One Shot
Pulse Generator
4-Input Power NAND
2-Input Bus Driver
Unibus Driver
Unibus Receiver
Word Count-Bus Address Registers
Master Control
Unibus Driver
Cable TI~rminator
Cable Connector
Bus Terminator
2-Input AND
4-Input AND
Interrupt Control
Jumper Card

1
S
4
8
3
3
2
I
2
3
1
2
1
8
9
I
S
I
2
5
I
3
2
2
I
I
I
2
2
I
2
1
I
1

6 ·2

APPENDIX A
TR79-FA TEST PROGRAM DESCRIPTION

A.I

ABSTRACT TR79-FA TEST (MAINDEC-ll-DZTRA)
I.

Test One - Logic test having minimum tape motion.

Test Two - Logic test with tape motion near load point.

Test Three - Reliability test with continuous tape motion over the entire tape.

Test Four - Read portion of the Compatibility Test which reads tapes written by test three.

Test Five - Maintenance test which allows the operator to select any sub test and execute these in any
desired order. Also manual operations test.

A.2 REQUIREMENTS
Minimum requirements for running this program follow:
l.
2.
3.
4.
S.

PDP-II Computer
Magnetic tape transport control interface
12K words of memory
Console teleprinter
Paper tape reader

A.3 LOADING PROCEDURE
The program is in Absolute Binary Format and is loaded using the Absolute Loader.
A.4

STARTING PROCEDURE

; STARTING PROCEDURE
; LOAD PROGRAM
; LOAD ADDRESS 000200
; PRESS START
; PROGRAM WILL TYPE "MAINDEC-II-DZTRAA /<377>/TR79F CHECKOUT TESTS"
; PROGRAM WILL TYPE "RUNNING" TO INDICATE THAT TESTING HAS STARTED
; AT TilE END OF A PASS, PROGRAM WILL TYPE PASS COMPLETE MESSAGE
; AND TIlEN RESUME TESTING

A·I

:\ .... 1 Test Selection
\\'hen the "SELECT TEST NUMBER "," typeout occurs, the operator selects the desired test by typing the test
number foll~\\,ed by a carriage return.

NOTE
Switches are in the normal position (clear) when down.
The switch options in. Table A-I are available to the
operator.
Table A-I
Switch Options

; SWITCH REGISTER OPTIONS

,----------------t

SWI5=lOOOOO
SW14=40000
SW13=20000
SW12=10000
SW11=4000
SWI0=2000
SW09=lOOO
SW08=400
SW07=200
SW06=100 .SW05=40
SW04=20
SW03=10
SW02=4
SWOl=2
SWOO=1

; =1, HALT ON ERROR
; =1, LOOP ON CURRENT TEST GROUP
; =1, INHIBIT ERROR TYPEOUT
; =1, DELETE TYPEOUT/BELL ON ERROR,
; =1, INHIBIT ITERATIONS

; =1, ESCAPE TO NEXT TEST ON ERROR
;=1, LOOP WITH CURRENT DATA
; =1, LOOP ON ERROR

/.vfil/Jlr /1"(/10

51&-~

; =1, LOCK ON TEST SELECT
; =1, RESTART PROGRAM AT SELECTED TEST
; =1, SELECT DEVICE ADDRESS, VECTOR, ETC.

A.S OPERATING PROCEDURE
Upon loading. the teleprinter prints information concerning the operation of the program and the tests available.
After the heading is printed, the operating parameters are displayed and checked by the operator. If it is desired
ito change a parameter, type the desired value: followed by a Carriage Return. If no change is needed, a Carriage
Return will retain the present value as the operating parameter .

.4.6

TEST ABSTRACT

A.6.1 PRETST: Pretest
This test checks the reset function. It is performed each time a test is selected.
A.6.2 Test 1
Test I is a logic test which checks the interface logic.
A.6.J Test 2
Test 2 is a logic test which tests the transport response to all types of commands.

A·2

A.6.4 Test 3
Test 3 is a reliability test which checks the ability of the transport and the interface to operate without error over
an extended period of time.
A.6.S Test 4
Test 4 is the read part of a compatibility test. This test reads tapes written by Test 3.
A.6.6 . TestS
f .
Test 5' is a maintenance aid. This routine allows the operator to loop on any subtest by enteri'n\ the starting
address at the teleprinter. The loop control maintains the selected test running. If loop is not selected, the ~st will
execute once and another starting address must be entered. Test 5 also validates that the TR 79-FA can be placed
off-line by the program. Operator intervention is required and the operator is instructed by TTY commands. An
EOT reflective strip should be installed about 50 ft from End of Tape. This is for diagnostic purposes only.
NOTE
If errors detected in both Tests 3 and 4 hal'e identical pass
numbers, a defectil'e tape should be the first consideration.
A.7 ERRORS
Two basic error typeouts occur. The first contains the following information:

PASS XXX
SUBTEST
XXX XXX

xxx XXX

PASS
SUBTEST

=
=

PC
STATUS

=
=

CORRECT =
ACTUAL

LOCATION =
COMMENT =

STATUS
XXXXXX

CORRECT
XXXXXX

ACTUAL
XXXXXX

LOCATION
XXX XXX

(THIS IS THE CURRENT PASS NUMBER)
(THIS IS THE STARTING ADDRESS OF THE CURRENT SUBTEST
BEING EXECUTED)
(THIS IS THE PC FROM WHICH ERROR WAS CALLED)
(THIS IS THE CONTENTS OF THE PROCESSOR STATUS REG ISTER AT
THE TIME OF THE ERROR)
(THIS IS WHAT SHOULD HAVE BEEN IN THE REGISTER OR LOCATION BEING TESTED)
(THIS IS WHAT WAS IN THE REGISTER OR LOCATION AT THE TIME
IT WAS EXAMINED)
(THIS IS THE LOCATION THAT WAS IN ERROR)
(OPTIONAL)

The remaining typeout provides the pass, PC, and SR. When this short error printout is typed, the message which
follows provides ample information concerning the erro,r.

A·3