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Document:	RL01/RL02 User Guide
Order Number:	EK-RL012-UG
Revision:	004
Pages:	106
Original Filename:

OCR Text

RLO1/RL0O2 DISK

SUBSYSTEM
USER’'S GUIDE

digital equipment corporation ¢ colorado springs, colorado

Ist Edition. December 1978

2nd Printing (Rev). September 1979
3rd Printing (Rev). June 1980
4th Printing (Rev). October 1980

The material in this manual 1s for informational purposes and 1s subject to change
without notice.

Digital Equipment Corporation assumes no

responsibility for any errors which may appear in this manual.

. A.
Printed in U.S

The following are trademarks of Digital
Equipment Corporation, Maynard, Massachusetts:

DEC

DECUS

DECnet

DECsystem-10
DIBOL
IAS
OMNIBUS
Q-BUS
UNIBUS

DECSYSTEM-20
Digital Logo
LSI-11
PDP
RSTS
VAX

EduSystem
MASSBUS
PDT
RSX

DECwriter

VMX

TABLE OF CONTENTS
INTRODUCTION
PURPOSE AND SCOPE ... ... e
REFERENCE DOCUMENTS

.. ... . e

SUBSYSTEM CONFIGURATIONS .. ... ..

RLOI/RLO2 Disk Drive .. ...... ... e
...

—

.. ...

RLI11 Controller Description . . ......... ...

RL Controllers

RLV11 Controller Description

. ......... ... . .. . ...

RN ERE R R RN R ISR I SR
'ui»'wg\)g\)g\)t\)——

CHAPTER 1

RL8A Controller Description

. ...........
.. ... . . . ...,

Sector Format . . . . .. ..

.............
...
..

. ...... ...

. .. .. .. .. 1-4

Interchangeability

RLOIK/RLO2K Disk Cartridge

INSTALLATION
SITE PREPARATION AND PLANNING

— = 00NN
B W —

Environmental Considerations

CHAPTER 2

oooooooooooooooooooooooooooooooooo

oooooooooooooooooooooooooooooooooooooooooooo

Cleanliness . ... ...
Space Requirements . .. ...
Floor Loading . . . ... ...

...

.. .

. .. .

Heat Dissipation . . ................ e

ACOUSHICS

. o

Temperature ... ... ...

Relative Humidity
Altitude

ooooooooooooooooooooooooooooooooooooooooooooo

oooooooooooooooooooooooooooooooooooooooooooooooooooooo

Power and Safety Precautions . ..........
... ... ... ... ... ... .. ... ..

Radiated Emissions

oooooooooooooooooooooooooooooooooooooooooooo

oooooooooooooooooooooooooooooooooooooo

OPtIONS . .
[\)-—A

AC Power Requirements . ......... ...

Standard Applications
Optional Applications
Installation Constraints

oooooooooooooooooooooooooooooooooooooooooooooo

Grounding Requirements

. i

oooooooooooooooooooooooooooooooooooooooooo

AC CABLING

oooooooooooooooooooooooooooooooooooooooooooo

ooooooooooooooooooooooooooooooooooooooooooooooooooooooooo

B W N —

NIV

ooooooooooooooooooooooooooooooooo

oooooooooooooooooooooooooooooooooooooooooooooo

ooooooooooooooooooooooooooooooooooooooooooooooooo

TABLE OF CONTENTS (CONT)

w N -

1919 19 19 19 1D 19 19 10 19 19 19 19 19
©20 0 XX INNIINITO

RL8-A CONTROLLER INSTALLATION ... .. ... .. . . . .. 2-20
Introduction . . .. ... .. . e 2-20

Module Slot Location .. ...

...

Module Installation . ... ...

.. . . . . . .

2-20

S LW

RLO1/RLO2 DISK DRIVE INSTALLATION ...... ... ... ... ... .. . .
Unpacking and Inspection

......... .. .. . .

RLOI/RLO2 Disk Drive Unit Mounting
Drive Prestart InSpection

. . .

... 2-22
2-22

. ................. .o, .. 2-23

.. ... ... .. 2-27

Drive Startup Operation Check . ...

... ..

. i, 2-30

N
-

CONFIDENCE TESTING . ... . e
e 2-30
.. ... ... ..
e 2-31
RLVI11-Based Diagnostics ... ... 2-33

RL8A-Based DiagnostiCs . .. ...ttt
e 2-33
USE OF THE M9312 BOOTSTRAP WITH AN RLII SYSTEM .............. 2-35
OPERATOR’S GUIDE

INTRODUCTION . ..
e
e
e 3-1
CONTROLS AND INDICATORS . . ..
e 3-1
Power On/Off Circuit Breaker . .. ... ... .. e 3-2
RUN/STOP Switch with Load Indicator . . .............................. 3-2
UNIT SELECT Switch with READY Indicator ................
... ... ... 3-3
FAULT Indicator . ...... ... .. e 3-3
WRITE PROTECT Switch and Indicator .. .........
... ... ... . ... ... 3-3
OPERATING PROCEDURES . ... . .
3-3
Cartridge Loading and Drive Startup Procedure . ......................... 3-3
Cartridge Unloading Procedure ....................... e 3-4

CHAPTER 4

RL11/RLV11 PROGRAMMING INFORMATION

Lo
—
H
N
o
S LW
—

LY LI LI LI LI LI WY 1L

LI LI LI LI LI L

MR RRRRLOLLDNDNDD
=

CHAPTER 3

RL11-Based Diagnostics

OPERATOR MAINTENANCE ... ..., 3-7
INtrodUuction . . . . .. L. 34T
Professional Cartridge Cleaning . . . ...........
... ... . .
... 3-7
User Cartridge Cleaning . . ...
...
e 3-7
Spindle Assembly Cleaning . .......... ... . i 3-7
3-7
CARTRIDGE CARE SUMMARY .. ...

4-1
GENERAL DESCRIPTION . . ... .
RL11 Controller Description . ...... ... e 4-1
RLVI11 Controller Description . . . ... 4-1

4-1
ADDRESSABLE REGISTERS .. ... .
4-1
Control Status Register . .. .. ...
Bus Address Register .. ... 4-4
Disk Address Register ... ... ... 4-5
... ... ... .... 4-5
DA Register During a Seek Command .. ..............
DA Register During Read or Write Data Command .................. 4-5
DA Register During a Get Status Command . ....................... 4-6
4-7
Multipurpose Register . ...... ...

TABLE OF CONTENTS (CONT)

4.2.4.1
4.2.4.2
4.2.4.3
4.2.5

4.3

4.3.1
4.3.2
4.3.3
4.3.4

MP Register After a Get Status Command ......................... 4-7
MP Register After a Read Header Command ....................... 4-8
MP Register During Read/Write Data Command ..................
.. 4-9
Register SUMMAry . ... ...t
e
e 4-9

CONTROLLER COMMANDS ... . e 4-12
No-Op (RL11) or Maintenance (RLV] 1)- Function Code O .............. 4-12
Write Check- Function Code 1.....
. .. . ... .. 4-13
Get Status - Function Code 2 ... ... ... .. . .
4-13
Seek - Function Code 3 .. ... .
4-13

4.3.5

Read Heading - Function Code 4

4.3.6
4.3.7

Write Data - Function Code 5 ...
... . .
4-14
Read Data - Function Code 6 . ...........
... . . .. .
.. 4-14

4.3.8
4.4
4.4.1

.. ..... ...

.. .. .. . . . . .

. .

. .. ... 4-14

Read Data Without Header Check - Function Code 7 .................... 4-14
4-14
IntermUpt . o
4-14

OPERATIONAL CONSIDERATIONS . ... ... .

4.4.2

Seek Operation . .. .. ... 4-15

4.4.3

Overlapped Seeks . ...

4.4.4

Data Transfer

4.4.5

Recovery of Data With Bad Headers

4.4.6

...

4-15

... ... ... .

4-15
...............
... ... ... .. ....... 4-15

Non-interchangeability of RLO1/RLO2 Disk Cartridges . .................. 4-15

4.5

ERROR RECOVERY .. ... e 4-16

4.6
4.6.1

DIFFERENCE SUMMARY (RKO05 AND RLOI/RLO2) ....................... 4-17
Spiral Read/Write or Mid-Transfer Seeks .. ..........
... ... ... ........ 4-17

4.6.2

Implicit Seeks Versus Explicit Seeks

4.6.3

Recalibrate

. .............
... ... .. ... .. ... .. 4-17

4.6.4

Bad Sector File . .. ...

4.6.5

Reformatting . .. ...

4.6.6

Seek Interrupt . . ... e 4-18

. ..... ... ... . .

4-17
4-18

... . e 4-18

CHAPTER 5

RL8-A PROGRAMMING INFORMATION

5.1

GENERAL DESCRIPTION . ... .. e 5-1

5.2

ADDRESSABLE REGISTERS

5.2.1
5.2.1.1
5.2.1.2

. ...

... .

Command Register A ... ........ . . . .

5-2

Command Register A During a Seek Command ..................
... 5-2
Command Register A During a Read or Write Data Command ......... 5-3

5.2.2

Command Register B .. ...

5.2.3

Break Memory Address Register . ..............
... .. ... ... ... ... ...
.. 5-5

... .. . .

5.2.4

Word Count Register .. ...

5.2.5

Sector Address Register . ......... ... . . . . .

5-5

5.2.6

Error Register ... ...

5-6

5.2.7

Silo Data Buffer ...... ..

5.2.7.1

5.2.7.2
5.2.8
5.3
5.3.1

. .

5-4

.
. .

5-5

5-7

Silo Register After a Get Status Command ......................... 5-7

Silo Data Buffer During a Read Header Command . . ................. 5-9
Register Summary

. ........ . . . . . .

CONTROLLER COMMANDS
Maintenance Command

5-9

. ... . i, 5-14

. .............
... . . ... .. ... 5-14

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<~
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—

TABLE OF CONTENTS (CONT)

APPENDIX A

Reset Command .. ........ .. .. . . . e 5-14

Get Status Command . ......... ... . . e 5-14
Seek Command . .. ....... . . .

5-15

Read Header Command .. ...... ... ... . ... . . . . . . . i, 5-15
Write Data Command . . ...

...

. .

Read Data Command . ......... ... ..

5-15

5-16

Read Data Without Header Check Command . ..........
... ... ... ..
.. 5-16
Maintenance Bit ... ... ... . 5-16
OPERATIONAL CONSIDERATIONS .. ..
5-18
8-Bit Mode Versus 12-Bit Mode . ......... ... ..
..
5-18

INterTupt . .. 5-18

Seek Operation . ... ... ...ttt e 5-18
Overlapped Seeks ... ... .
5-18
Recovery of Data with Bad Headers ..........
... ... ... ... .. ... ... 5-18
Non-interchangeability of Disk Cartridges ...........
... ... ... ... .
.. 5-19
RLOIK/RLO2K .. 5-19

RL8-A/RLII/RLVIL .. e 5-19
Use of Two RL8-A Controllers .. ... ...
. ... . . . .
.. 5-19
ERROR RECOVERY ... e
ee e
e 5-19

DIFFERENCE SUMMARY (RKO5 and RLOI/RLO2) .........
... ... .. ....... 5-20
Spiral Read/Write or Mid-Transfer Seeks .. ....... .. .. ... ... .. ... .... 5-20
Implicit Seeks Versus Explicit Seeks ...........
... ... ... ... ..........5-20
Recalibrate .. .. ... .. . .
5-20

Bad Sector File . .. ... .
5-20
Reformatting . . ... .. ... . e 5-20
Seek INtErrupt . . .. ..o
e 5-20

RL11 CONFIGURATION AND INSTALLATION CONSIDERATIONS
SPC CONSIDERATIONS ... A-1
CONFIGURATION CONSIDERATIONS . ... .. .
A-1

FIGURES

—ON N

WY —

Figure No.

Title

Page

Typical RLO1/RLO2 Mass Storage Subsystem Configuration....................
RLOI/RLO2 Disk Drive . ... ...
e e e e
o,
.
....
... .. . ... ...
RLO1K/RLO2K Disk Cartridge Format ......
o
.
.
.....
...
... ...
Access Method for Sequential Transfers ......
Sector ReloCation . . ... o
Bad Sector File Format . .. ... ... ..

RLO1/RLO2 Disk Drive-Rear VIEW ... ..ttt
... ..o
.....
... ...
Approved Electrical Plugs and Receptacles . .....
..
... ... .. ..
.. .....
...
...
Power Panel Grounded to Building Frame ........
...
..
...
.
.
....
.
..
...
...
......
..
Power Panel Grounded to Metal Plate

b
o
b
b
DN

_—— = \ O
o
— O

OO~

ON N KWW~

AR e iyA

X
UANBEWNL

it ol it e ot ol ol ¥ ol ol ol SN
N
S
R
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R
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m RN
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EON—~S
00 ddUnh W —O

FIGURES (CONT)

Typical 60 Hz Power System .. ... .. ... ... ... ... ... ... ..., [T 2-9
Typical 50 Hz Power System .. ...
... .
2-10
Split Phase (2-Phase) Power System ......... .. ... ... . ... ... .
L 2-10
Three Phase Y Power System ... ... .. .
2-10
RL11 Component Layout . ......... .. . . . .
2-11
RLI11 Base and Vector Address Jumper Configuration........................ 2-13
RL11 Priority Jumper Assembly Connections . ...........
... .. ... ... ... . 2-14
RLI11 Controller Installation . .. ....... .. . . . . . . . e 2-15
RLVI1 Bus Interface Module (M8014) (Component Side) .................... 2-17

RLVI11 Base Address Switch Settings ... ...... ... ... 2-17
RLVI11 Vector Address Switch Settings ..............
.. ... ... ... ... ....... 2-18
RLVI11 Drive Module (M8BO13) . ...

o e, 2-19

H9273 Backplane Grant Priority Structure

..........
... .. . . .
... 2-19

RLB-A JUMPETS . . .o

H950 Shipping Package

2-21

.. ..... ...

.. . .

2-23

RLOI/RLO2 Cabinet Installation . ......... ... . ... . . . . . . .
., 2-25
RLOI/RLO2 - Covers Removed . ......... .. ... . .. . . i, 2-26
RLOI/RLO2 Disk Drive - Rear View .. ......... ... . i, 2-27
RLOI/RLO2 Disk Drive - Front View . ...... ... .. .. .. ... ... ... ..
... 2-28
RLO1/RLO2 Disk Drive - Exposed Drive Logic Module ...................... 2-29
RLOI/RLO2 Disk Drive - Front View .. ........ . ... .. . ., 3-1
RLO1/RLO2 Disk Drive - Rear View ............P 3-2
Cartridge Loading Procedure

.......... . . . . .

. .

3-5

CS Register ........ S 4-2
BA RegISIEr . .

4-4

DAR - Seek Command . . ....... .. ... . e 4-5

DAR - Read/Write Data Command . ...............
.. ... .. ..., 4-6
DAR - Get Status Command .. ........... . .. .. e 4-6
MPR - Status Word . . .. ...

4-7

MPR - Three Header Words . . . ...

. e 4-8

MPR - Used as a Word Counter

...........
.. ..
.. 4-9

. e 4-10

Command Register A During a Seek Command .............................. 5-3

Command Register A During A Read/Write Data Command
Command Register B

... ...

. . .

................... 5-3
5-4

Break Memory Address Register . ........ ... .. ... . . .. .., 5-5
Word Count Register.

. ...

.. .

Sector Address Register ... ...
Error Register

5-5
. . .

5-6

... ...

Silo Buftfer for Status Word 1

5-6

. ...

... . .

. . . . . 5-7

... . .., 5-8

Silo Buffer for Status Word 2

. ...

Silo Buffer for Header Words

. .......... . .. .. . . . . . .

5-10

. .

5-11

Maintenance Mode Bit .. ...

... .., 5-17

Vil

TABLES

Title

Table No.

Reference Documents . ... ... .. . . . .

Page
[-1

RLO1/RLO2 Disk Drive Physical and Environmental Specifications ............. -9
RLO1/RLO2 Disk Drive Operational Specifications. .. ........................ [-11
RLOIK/RLO2K Disk Cartridge Specifications . ..........
... .. .. .. .. ........ [-12
Saleable RLOI/RLO2 Subsystem OptionS . . ...ttt
.. 2-3
Saleable Cabinet Options

. ... ... ...t

e 2-4

Diagnostic Catalogs and Indexes . ... ... . . . i 2-31

RLI1-Based Diagnostics .. .. ..ottt
e e
e 2-31
RLI11 Diagnostic Kit Numbers . ......... ... .
i
2-31
RLIT Diagnostic COMPONENLS . . ...ttt
et et
e e 2-31
User DOCUMENtS .. ... 2-33
RLV11 Diagnostic Kit Designations .............
... ..
... 2-33
RLS8/RLOI Diagnostic Kits . ... ... . e 2-33

5-3

RLS8/RLOI Diagnostic COMPONENES . . ...\t ut it e e 2-34
RL8/RLO2 Diagnostic Kits .. ... ... 2-34
RL8/RLO2 Diagnostic COMPONENLS . ..o vvti ittt ettt
e ee e 2-35
Controller Addressable RegiIsters .. ... ..., 4-2
RLIT/RLVII Controller Commands .. ..........c.iuiuinenninneneeanan.. 4-12
Errors
4-16
RLE-A InStruction Set . . ... ..ottt
e e 5-1
RL&-A Controller Commands . . ... i 5-2
EITOrS . o
5-19

Viii

CHAPTER 1
INTRODUCTION

1.1
PURPOSE AND SCOPE
This manual provides information on the capabilities, installation, operation, and programming of the

RLO1/RLO2 Disk Subsystem. The basic subsystem comprises one RL11, RLV11 ar RL8A controller and up to
four RLO1 or RLO2 Disk Drives.
This manual is intended primarily for operating and programming personnel. Service should be performed only

by qualified Digital field engineering and maintenance personnel. A prerequisite for understanding this manual
1s a basic knowledge of PDP-8 and PDP-11 processors and peripherals.

1.2

REFERENCE DOCUMENTS

Table 1-1 lists the documents that will be available to provide the information necessary for a complete

understanding of the function, theory and maintenance of the RLO1/RL02 Disk Drives and the RLV11/RLS8-A
Controllers. The Unibus and LSI-11 Bus are described inthe PDP1 ] Bus Handbook (EB-17525). The Omnibus
is described in the PDP8/A Miniprocessor User’s Manual (EK-8A002-MM).

Table 1-1

Reference Documents

Title

Document No.

RLO1/RLO2 Disk Drive Technical Manual

EK-RLO12-TM

RLO1 Disk Drive Illustrated Parts Breakdown

EP-00016-IP

RLO2 Disk Drive Illustrated Parts Breakdown

EP-00016-IP

RLO1/RLO2 Disk Subsystem Preventive

EP-00008-PM

Maintenance Manual *

RILO1/RLO2 Disk Drive Pocket Service Guide

EK-RLOI12-PG

RL11 Controller Technical Description Manual

EK-ORLI11-TD

RLV11 Controller Technical Description Manual

EK-RLVII-TD

RL8A OMNIBUS Controller Technical Manual

EK-ORL8A-TM

* NOTE - This document is only available to Digital Equipment Corporation Service personnel.

1.3

SUBSYSTEM DESCRIPTION

The RLO1/RL0O2 mass storage subsystem is based on the RLO1K/RLO02K disk cartridges, the RLO1/RL02 drive
unit(s), and an appropriate controller such as the RL11 (PDP-11), RLVI11 (LSI-11), or RL8A (PDP-8). The
basic subsystem is illustrated in Figure 1-1.

1-1

CONTROL

UNIT

CU/DRIVE INTERFACE

RL11

RL8A

READ DATA

STATUS

SECTOR PULSES

UNIBUS

GET STATUS

Q-BUS

e«

WRITE DATA

t———’—"; (DRIVE 1)

(DRIVE 2)

—
CZ-1007

Figure 1-1

Typical RLO1/RL0O2 Mass Storage Subsystem
Configuration

1.3.1 RLO01/RL02 Disk Drive
The RLO1/RLO2 drive unit is built into a chassis that slides out of the cabinet to allow the operator access to the
top cover for loading and unloading of the disk cartridge. If the stops on the slide are manually released the
chassis can be pulled farther out so that the rear top cover can be removed for servicing. The front panel contains
operator controls and indicators.

The chassis contains a spindle, two read/write heads mounted on a positioner, logic modules, a power supply
with an ac power cord and circuit breaker, a closed-loop clean air system, a cooling air system, appropriate

safety interlocks, and connectors for the I/O cable(s).
The drive unit 1s shown in Figure 1-2.

The RLO2 drive unit has a label reading ‘‘RLO0O2"" on the front panel. The RLO1 drive currently does not have a

label identifying it as an RLOI.

1.3.2

RL Controllers

There are three controllers available for the RLO1/RLO2 subsystem. All can handle up to four drives and all
feature Direct Memory Access (DMA) operation.

1.3.2.1 RL11 Controller Description — The RL11 Controller consists of a single, hex-height Small
Peripheral Controller (SPC) module designated M7762. It is used to interface the drive with the PDP-11
Unibus. The data is formatted in 16-bit words. This controller can handle any combination of up to four RLO1
and/or RLO2 Drives.

1-2

1.3.2.2 RLV11 Controller Description — The RLV 11 Controller consists of two quad-height modules
designated M8013 and M8014. This controller interfaces the drive with the LSI-11 Bus. The data is formatted

in 16-bit words. This controller can handle any combination of up to four RLOI and/or RLO2 Drives.
1.3.2.3

RLS8A Controller Description — The RL8A Controller consists of a single, hex-height module

designated M8433. It is used to interface the drive with the PDP-8 Omnibus. The data can be formatted in either

8-bit bytes or 12-bit words. This controller has a jumper-determined choice of handling RLO1 or RLO2 Drives.

However, in the RLO2-jumpered configuration, it can handle any combination of up to four RLO1 and/or RL02
Drives.

1.3.3

RLO1K/RLO2K Disk Cartridge

The RLOIK or RLO2K is a removable, top-loading 5440-type disk cartridge that is formatted in a manner

unique to the RLOI/RLO2 subsystem. Both cartridges contain a single platter. The RLOIK cartridge has a
capacity of 5.2 megabytes of user data, and the RLO2K cartridge will hold 10.4 megabytes of data. Both sides
of the platter are used for data. There are 256 tracks on each RLO1K platter surface and 512 tracks on each
RLO2K platter surface. Each track is divided into 40 sectors. Each sector contains 256 bytes of data. The last

track of the last surface is reserved for the cartridge serial number and bad sector information. Head positioning
servo Information and header information are prerecorded at the factory and cannot be reformatted in the field.

This information, along with the data, is read by the read/write heads but the internal logic of the drive unit

protects the servo and header information from being overwritten.

MA.0592

Figure 1-2

RLO1/RLO2 Disk Drive

1.3.3.1

Interchangeability — The RLOIK and RLO2K Disk Cartridges are not functionally interchangeable

although they are physically interchangeable. It is possible to mount an RLO1K cartridge on an RL0O2 drive, for
example, but proper operation will not occur. An RLO1K cartridge written on an RLO1 unit can be read on any
other RLOI unit even if that unit is controlled by a different type of controller. The only limitation to this

interchangeability 1s that if an RL8A controller is used to write data and the cartridge is to be used on a drive
controlled by an RL11 or an RLV1I controller, the RL8A must use an 8-bit byte mode of operation.
An RLO2K cartridge written on an RLO2 unit can be read on any other RL02 unit (assuming the same conditions
mentioned above).

1.3.3.2
*

Sector Format — As shown in Figure 1-3, each sector contains:
Servo information for head positioning

Header (address) information
Data — 128 words of 16 bits each, or

256 bytes of 8 bits each, or
170 words of 12 bits each

Only the data portion of a sector can be written by the user. The servo and header information is protected by the
drive logic and controller to ensure disk integrity and cannot be written in the field.
Each sector starts with a sector pulse that is produced by a sector transducer mounted on the drive unit. It senses
the sector notches that are machined into the hub of the disk cartridge.

During

the time that sector notch passes by the sector transducer, the heads detect two servo pulse bursts (S1 and

S2) that are prerecorded on the platter. These servo bursts are used by the drive logic for head positioning.
Following the servo pulse bursts 1s the header. It consists of:
*

A preamble of three words — 47 “*0"" bits and one *“1’" bit

A word that contains the address — sector, head, and cylinder
A word of all zeroes

A word containing information created by the Cyclic Redundancy Check (CRC) logic

A one-word postamble of all zeroes

Following the header is the user writable data area. It consists of:
«

A preamble of three words — 47 “*0’" bits and one **1°" bit

«
«
*

Data (128 words of 16 bits or 256 bytes of 8 bits or 170 words of 12 bits)
A word containing CRC-generated information
A one-word postamble of all zero bits

Following each sector is a period of idle time that is simply a wait for the next sector pulse.
In addition to the data tracks, there are tracks both inside and outside of the data area that contain unique servo

signals that define those areas as guard bands. If the read/write heads attempt to enter a guard band, the drive
logic causes the positioner to retreat from the guard band and return to the data area.

The disk has a nominal rotational speed of 2400 rev/min. Therefore, the time for one revolution is 25
milliseconds. Since the revolution is divided into 40 sectors, the duration of each sector is 625 microseconds.
This 625 microsecond period is divided into non-data (sector pulse, header, idle time) time and data time. The
data time period is 500 microseconds. Thus, the data is transferred in 500 microsecond bursts that occur every
625 microseconds.

625us

be—62.5u5-21

|
SECTOR
PULSE

[

il
>0 —> re—
-

SERVO | HEADER
7~

DATA
T

SERVO | HEADER

—

PREAMBLE

[

47 ZERO BITS

1|1
_

]

—

ADDRESS | ZEROES

CRC

POSTAMBLEI

PREAMBLE

16BITS

16 BITS

|16 ZERO BITSI

47 ZERO BITS

=_
| SECTOR | HEAD
rSIX BITS OB'|\'TE
LSB

DATA

|16ZEROBITS|
N ~

AN
CYLINDER I
NINE BITS I

‘

16 BITWORD [ WORD 0
MODE
| 16 BITS

—

WORD 1
16 BITS

DATA

—f—

2048 BITS
N
¢

ff
m

—f§
)

}

R 2

CRC

POSTAMBLE l

16 BITS

16 ZERO BITS I

—
WORD 127 ]
16 BITS J

WORD 126

MSB

BYTE| BYTE|

8 BITBYTE|

MODE

|8 BITS|8 BITS
|

-| BYTE | BYTE

R
R

Y O AN
LA

254

255

8 BITS| 8 BITfl
|

12 BIT/WORD rv;ormo WORD 1
MODE I 12 BITS | 12 BITS
|

‘

{

)

—f

WORD 168 | WORD 169 ULSJEN[;1
12BITS | 12BITS |8 BITEJ

MSB

LSB

CZ-2027

Figure 1-3

RLOIK/RLO2K Disk Cartridge Format

For 16 bit word mode there are 128 words of data in a sector so the peak transfer rate is 3.9 microseconds per

word and the average transfer rate is 4.9 microseconds per word.

For 8 bit bytes (256 bytes per sector), the peak transfer rate is 1.9 microseconds per byte and the average transfer
rate 1s 2.4 microseconds per byte.

For 12 bit word mode (170 words per sector), the peak transfer rate i1s 2.9 microseconds per word and the
average transfer rate 1s 3.7 microseconds per word.

1.4 SECTOR LOCATION
The RLOIK/RLO2K Disk Cartridges do not have a physical index notch (occuring once per revolution)
machined into the hub as some cartridges do. The controller determines the rotational position of the disk

cartridge by reading, from the header, the sector address as well as the head (surface) and cylinder (track)

addresses. Thus, the cartridge does not need a physical index. The sectors are relocated to optimize the data
transfer rate when it becomes necessary to perform a seek during a data transfer.

A head switch to the other surface is considered a seek because the RLO1/RLO2 subsystem uses servo
information that is recorded on each track. The newly selected head will position itself over the center of the

track. There is no hardware-controlled implicit seek on the RLO1/RLO02 subsystem. All seeks, including spiral
(mid-transfer) seeks, must be programmed into the software. The correct head must be selected and positioned
over the correct track by a seek operation before the software can initiate a data transfer.
When the end of a track is reached, and the data transfer has not been completed, the software must do one of
two things. It must switch to the head that is over the corresponding track on the other surface (6.5 milliseconds

average, 8 milliseconds maximum) or the software must issue a seek to the next cylinder (15 milliseconds). If
the head is to be switched also, the seek and the head switching are normally combined. Once the unit has
completed the seek operation, the software can continue the data transfer.
To reduce the rotational latency following a head switch seek, surface one is offset by 17 sectors from surface
zero. The eight milliseconds head switch corresponds to 13 sectors of this offset and the additional four sectors

allow for software overhead.
To reduce the rotational latency following a one cylinder seek (with head switch), surface zero of a cylinder is
offset by 29 sectors from surface one of the previous cylinder. The 15 millisecond seek time takes 24 sectors of

this offset and five more sector times are allowed for software overhead.
These two offset patterns are illustrated in Figures 1-4 and 1-5.
1.5

BAD SECTOR FILE

The Bad Sector File is a list of all bad sectors found on an RLO1K/RLO02K Disk Cartridge. It also contains the
cartridge serial number. The operating system uses this information to avoid allocating bad sectors to a user’s
files.

If there is an error in a header, or if there are 16 consecutive read/write errors within one sector, that sector is
defined as a bad sector.

This file is recorded on surface 1, track 255 (decimal) of an RLOI1K cartridge, and surface 1, track 511 (decimal)
of an RLO2K cartridge. The file consists of 40 sectors of 128 words each. Figure 1-6 shows the format of the
Bad Sector File.

There is room in the file for 128 entries written by the factory and for 128 entries that can be written in the field if
bad sectors develop during field use.

—

BAD SECTOR FILE
SEC

2oR

CONTENTS

FACTORY WRITTEN BAD SECTOR INFO

ALL ONES

| DUPLICATE OF SECTORS 0, 1

A ones

DUPLICATE OF SECTORS 0, 1

ALL ONES

DUPLICATE OF SECTORS 0, 1

MSB

TWO

} SECTORS

LAST

SURFACE

5 MOST SIGNIFICANT OCTAL DIGITS OF CARTRIDGE SERIAL NUMBER

FIRST BAD

ZEROES

ZERQOES

ZEROES

SECTOR

ENTRY

BAD

ENTRY

SECTOR

.10

CYLINDER ADDRESS

HEAD

ZEROES

SECTOR ADDRESS

SAME FORMAT AS FIRST BAD SECTOR ENTRY

-’

”

ALL ONES
125th BAD

SECTOR

ALLONES

252

ENTRY

SAME FORMAT AS FIRST BAD SECTOR ENTRY

253
254

ALL ONES

255

ALL ONES

DUPLICATE OF SECTORS 20, 21
|

ALLONES

NOTE: UNUSED BAD SECTOR ENTRIES ARE ALL ONES

DUPLICATE OF SECTORS 20, 21

3673
|

ZERO

ENTRIES

DUPLICATE OF SECTORS 20, 21

gg
32

ALLONEs

DUPLICATE OF SECTORS 20, 21

gg
30

5 LEAST SIGNIFICANT OCTAL DIGITS OF CARTRIDGE SERIAL NUMBER

FIELD WRITTEN BAD SECTOR INFO

3‘;
26

ZERO

WORDS

LAST
CYLINDER

SECOND

DUPLICATE OF SECTORS 0, 1

LSB

256 16 BIT (

} ‘75

16 BIT WORD

W BIT
o)

Figure 1-6

ALoneEs

Bad Sector File Format

CZ-2028

1.6 RLO1/RL02 SPECIFICATIONS
The following tables list the specifications of the RLO1/RLO2 drives and the RLOIK/RLO2K cartridges.
Table 1-2
Table 1-3

Table 1-4

RLOI/RLO2 Disk Drive Physical and Environmental Specifications
RLOI/RLO2 Disk Drive Operational Specitications
RLOIK/RLO2K Disk Cartridge Specitications
Table 1-2

RLO1/RL02 Disk Drive

Physical and Environmental Specifications

Characteristics

Width

Specifications

| Compatible with 19 inch RETMA rack

Depth

63.5 cm (25 1n) behind bezel

Height

26.52 ¢cm (10.44 1n)

Weight

34 kg (75 1b)

Mounting

The drive mounts on chassis slides

Power Source

90-127 Vac (47.5-63 Hz)
180-256 Vac (47.5-63 Hz)
(Manually selectable)

Input Power

160 W max at 115 Vac, 60 Hz

Power Factor

Greater than 0.85

Starting Current

3.5A (rms) max @ 90 Vac/47.5-63 Hz
5.0A (rms) max @ 127 Vac/47.5-63 Hz
1.75A (rms) max @ 180 Vac/47.5-63 Hz
2.5A (rms) max @ 254 Vac/47.5-63 Hz

Heat Dissipation

546 Btu/hr max

Power Cord and Connector

A molded line cord compatible with the drive operating voltage and the 861
power control for 120 Vac is attached to the drive. The power cord is 2.74 m

(9 ft) long and the plug is NEMA 5-15P.
The 230 Vac plug to be attached to high voltage drives is NEMA 6-15P.

Safety
Interlocks

The RLO1/RLO2 Disk Drive is UL listed and CSA certified.
Interlocks are used where potential exists for damage to drive, media,
operators, or service personnel.

Table 1-2 RL0O1/RL02 Disk Drive
Physical and Environmental Specifications (Cont)
Characteristics

Specifications

Temperature/Humidity

Operating:
Temperature:

10° C (50° F) to 40° C (104° F)

Derate temperature at 1.8° C/1000 meters (1° F/1000 feet)
Relative Humidity: 10 to 90 percent with maximum wet bulb temperature 28°
C (82° F) and minimum dew point 2° C (36° F)
Nonoperating:

Temperature: —40° C (—40° F) to 66° C (151° F)
Relative Humidity:
Altitude

Operating:

2440 m (8,000 ft) max

Nonoperating:
Shock

10 to 95 percent, noncondensing

9144 m (30,000 ft) max

Operating:
Half §ine.shock pulse of 10 gravity peak of 10 = 3 ms duration applied
once in either direction of three orthagonal axes (3 pulses total)
Nonoperating:

Half sin.e shock pulses of 40 gravity peak of 30 £ 10 ms duration
perpendicular to each of six package surfaces.

Vibration

Operating:

Sinusoidal vibration (sweep rate 1 octave/min)
5-50 Hz, 0.002 in displacement amplitude
50-500 Hz, 0.25 gravity peak
500-50 Hz, 0.25 gravity peak

50-5 Hz, 0.002 in displacement amplitude
Nonoperating:

Vertical Axis Excitation — 1.40 gravity (rms) overall from 10 to 300 Hz;

power spectral density of 0.029 g2/Hz from 10 to 50 Hz, with 8 dB/octave
rolloff from 50 to 300 Hz

Longitudinal and Lateral Axis Excitation —0.68 gravity (rms) overall from 10
to 200 Hz; power spectral density of 0.007 g?/Hz from 10 to 50 Hz, with 8
dB/octave rolloff from 50 to 200 Hz

EMI
Dust

Meets DEC Standard 102, Section 7.

The drive will operate in an ambient atmosphere of less than 5 million
particles 0.5 microns or larger per cubic foot of air. The drive is intended to
run in a light industry or cleaner environment.

Attitude

Maximum pitch: = 15 degrees
Maximum roll: = 15 degrees

1-10

Table 1-3

RLO01/RL02 Disk Drive Operational Specifications

Characteristics

Specifications

General

Linear bit density: 147 bits/mm (3725 bits/in) at innermost track
16 bit words per sector:

128

Number of sectors per track: 40

Track density: 4.9/mm (125/in) for RLOIK, 9.8/mm (250/in) for RLO2K
Number of tracks per surface: 256 for RLO1K, 512 for RLO2K
Number of surfaces: 2
Formatted capacity (megabytes): 5.2 for RLOIK, 10.4 for RLO2K

Encoding method: Modified Frequency Modulation (MFM)
Transfer Rate

(Unbuffered Values)

Bit rate: 4.1 megabits/second = 1 percent
Bit cell width: 244 ns = [ percent

Word transfer rate (16 bit words): 256 kilowords/second = 1 percent
Latency

Rotational frequency: 2400 rev/min = 0.25%
Average latency:

12.5 ms =

0.25%

Maximum latency: 25.0 ms += 0.25%

Seek Time

Average seek time: 55 ms max (85 tracks for RLOI, 170 tracks for RL02)

One cylinder/track seek time: 15 ms max
Maximum seek time: 100 ms max (256 tracks for RLO1, 512 tracks for RL02)

Start/Stop Time

Start time: 45 seconds
Stop time: 30 seconds

Data Format

Refter to Figure 1-3

Table 1-4

RLO1K/RLO2K Disk Cartridge Specifications

Characteristics

Specifications

Operating Environment

The cartridge will operate over a temperature range of 4° C to 48° C (40° F to

120°F), at arelative humidity of 8 to 80 percent. The wet bulb reading must be
less than 25° C (78° F). Before a cartridge is placed in operation, it should be
conditioned within its cover for a minimum of 2 hours in the same environment as that in which the disk drive is operating. (The above specified ranges
do not necessarily apply to the disk drive).

Storage Environment

The cartridge should be stored at a temperature between —40° C to 65° C

(—40° F to 150° F), with a wet bulb reading not exceeding 29° C (85° F). For
wet bulb temperatures between 0.56° C and 29° C (33° F and 85° F) the disk
cartridge will withstand a relative humidity of 8 to 80 percent. The stray
magnetic field intensity shall not exceed 50 Oe.

Dimensions (Cartridge)

The external diameter of the top cover is 38.35 cm (15.1 in).
The external diameter of the protection cover is 37.03 cm (14.58 in).
The external height of the cartridge is 6.19 cm (2.44 in).

Maximum Speed

The rotating parts of the disk cartridge are capable of withstanding the effect

of stress created while rotating at 2,500 rev/min.
Track Geometry

There are 256 discrete concentric tracks per data surface for the RLO1K, 512
tracks per data surface for the RLO2K.

Identification of

Data Location

Data Track Identification — Data tracks are numbered by consecutive decimal
numbers (000-255, RLO1K; 000-511, RLO2K) starting at the outermost data

track of each data surface.
Data Surface Identification — The upper data surface is numbered O and the
lower surface 1s numbered 1, to correspond with the head numbers.

Cylinder Address — A cylinder i1s defined as both data tracks (on either

surface) with a common data track identification.
Data Track Address — A 16-bit word defines the data track address. Bits 0-5
define the sector, bit 6 defines the surface, and bits 7-15 define the cylinder

address. This information i1s in word 1 of each sector’s header.

[-12

CHAPTER 2
INSTALLATION

2.1

SITE PREPARATION AND PLANNING

This chapter describes power, space, environmental, cabling and safety requirements that must be considered

before installation of the RLO1/RL02 Disk Subsystem.
2.1.1

Environmental Considerations
The RLO1/RL0O2 Disk Subsystem is designed to operate in a business or light industry environment. Although

cleanliness 1s an important consideration in the installation of any computer system, it 1s particularly crucial for
proper operation of a disk drive. The RLOI1K-RLO2K Disk Cartridge 1s not sealed while being loaded and is
therefore vulnerable to dust or smoke particles suspended in the air, as well as fingerprints, hair, lint, etc. These

minute obstructions can cause head crashes, resulting in severe damage to the read/write heads and disk
surfaces.

2.1.1.1

Cleanliness — The RLO1/RL02 Disk Drives can operate in an ambient with less than one million

particles per cubic foot of air which are 0.5 micron or larger in diameter. The drive contains a filter system
which, under these conditions, maintains the particle count within the cartridge below 100 particles per cubic

foot.

2.1.1.2

Space Requirements — Provision should be made for service clearances of I m (36 in) at the front and

rear of the rack or cabinet in which the drive is mounted and 1 m (36 in) at either side.

Storage space for the RLO1K/RLO2K cartridges should also be made available. Each cartridge has a diameter of
approximately 38 cm (15 in) and a height of approximately 6 cm (2.5 in).

CAUTION
RLO1K/RLO2K Disk Cartridges must never be
stacked on top of each other. A designated shelf area

or specially designed disk cartridge storage unit is
recommended (see the DIGITAL Supplies ant Ac-

cessories Catalog).
2.1.1.3

Floor Loading — The weight of the RLOI/RL02 Disk Drive alone is 34 kg (75 1b), which will not

place undue stress on most floors. However, the added weight of the rack or cabinet as well as the number of
drives to be installed should be considered in relation to the weight of existing computer systems. Possible

future expansion should also be a consideration.
2.1.1.4

Heat Dissipation — The heat dissipation of each RLO1/RL02 Disk Drive is 546 Btu/hour maximum.

The approximate cooling requirements for the entire system can be calculated by multiplying this figure by the
number of drives, adding the result to the total heat dissipation of the other system components, and then

adjusting the total figure to compensate for personnel, cooling system efficiency, etc. It is advisable to allow a

safety margin of at least 25 percent above the maximum estimated requirements.

2-1

2.1.1.5

Acoustics — Most computer sites require at least some degree of acoustical treatment. However, the
RLO1/RLO2 Disk Subsystem should not contribute unduly to the overall system noise level. Ensure that
acoustical materials used do not produce or harbor dust.

2.1.1.6 Temperature - The RLO1/RLO2 Disk Subsystem will operate over a temperature range of 10° C (50°
F) to 40° C (104° F). The maximum temperature gradient is 16.6° C (30° F) per hour. The nonoperating
temperature range is from -40° C (-40° F) to 66° C (151° F).
2.1.1.7 Relative Humidity — Humidity control is important for proper operation of any computer system
since static electricity may cause memory errors or even permanent damage to logic components. The
RLO1/RLO2 Disk Subsystem is designed to operate within a relative humidity range of 10 to 90 percent, with a
maximum wet bulb temperature of 28° C (82° F) and a minimum dew point of 2° C (36° F). The nonoperating

relative humidity range is from 10 to 95 percent, with a maximum wet bulb temperature of 46° C (115° F).
2.1.1.8 Altitude — Computer systems operating at high altitudes may have heat dissipation problems.
Altitude also affects the flying height of read/write heads in disk drives. The maximum altitude specified for
operating the RLOI/RL0O2 Disk Subsystem is 2440 M (8000 ft). Also, the maximum allowable operating
temperature is reduced by a factor of 1.8° C per 1000m (1° F per 1000 ft) above sea level. Thus, the maximum
allowable operating temperature at 2440 m (8000 ft) would be reduced to 36°C (96° F).

2.1.1.9 Power and Safety Precautions — The RLO1/RL02 Disk Subsystem presents no unusual fire or safety
hazards to an existing computer system. AC power wiring should be checked carefully, however, to ensure that
its capacity is adequate for the added load as well as for any possible expansion. The RLO1/RLO2 Disk Drive is
UL listed and CSA certified.

2.1.1.10 Radiated Emissions — Any source of electromagnetic interference (EMI) that 1s near the computer
system may affect the operation of the processor and its related peripheral equipment. Common EMI sources
that are known causes of failures include:
e

Thunderstorms

Broadcast stations

Radar

«
«

Mobile communications
High-voltage power lines
Power tools
Arc welders
Vehicle ignition systems
*

Static electricity

The effect of radiated EMI emissions on a computer system is unpredictable. Thus, grounding plays an
important role in protecting the circuits used in disk drive subsystems.

To help reduce the effects of known high-intensity EMI emissions perform the following actions:
«

Ground window screens and other large metal surfaces.

Ensure that the overall computer system is grounded properly (refer to Paragraph 2.1.5, Grounding
Requirements).

Provide proper storage (metal cabinets with doors) for disk cartridges.

2-2

2.1.1.11

Attitude/Mechanical Shock — Performance of the RLO1/RLO02 Disk Subsystem will not be affected

by an attitude where maximum pitch and roll do not exceed 15 degrees.
The subsystem is designed to operate while a half-sine shock pulse of 10 gravity peak and 10 = 3 ms duration is
applied once in either direction of three orthagonal axes (three pulses total).
2.1.2 Options
The RLO1/RL02 Disk Drive can be shipped with various controllers (for Unibus, Omnibus and LSI-11 Bus
computer systems), and can be configured for 115 Vac or 230 Vac operation.

Table 2-1 shows saleable RLO1/RLO2 subsystem options. Table 2-2 shows RLO1/RLO02 cabinet options.
Table 2-1

Saleable RL0O1/RL02 Subsystem Options

Option
Number

Description

RLOIA

RLO1 unit, BC20J 1/O cable, chassis slide and mounting hardware

RLO2A

RLO2 unit, BC20J I/O cable, chassis slide and mounting hardware

RLOI-AK

RLO1-A (drive), RLOIK-DC (cartridge)

RLO2-AK

RLO2-A (drive), RLO2K-DC (cartridge)

RLOIK-DC

RLOI Data Cartridge

RLO2K-DC

RLO2 Data Cartridge

RL11-AK

RLOI-AK, RLI1 Controller, BCO6R, terminator

RL211-AK

RLO2-AK, RLI1 Controller, BCO6R, terminator

RLVI1I1-AK

RLO1-AK, RLVI11 Controller, BCO6R, terminator

RLV21-AK

RLO2-AK, RLV11 Controller, BCO6R, terminator

RL8A-AK

RLO1-AK, RL8-A Controller, BC80J, terminator

RL28A-AK

RLO2-AK, RL8-A Controller, BC80J, terminator

2-3

SOURCE

PLUG

RECEPTACLE

USED ON
ALL 120V TABLE-TOP

COMPUTERS. STANDARD

120V
15A

1-PHASE

HUBBEL

120V LOW-CURRENT

mfi:‘:s -

DISTRIBUTION. 120V

’;512“

DEC # 90-08938

TU10 UNITS. MOST

12-06351
w

120/208V

3.PHASE Y

ALL 120V STANDARD

HUBBEL

CABINET MOUNTED EOPT

#2611

L5-30R

or
120/208V
20A

3-PHASE Y

HUBBEL
#2411

L14-20R

G
Y

120V PDP-11/45 PROCESSOR CABINET ONLY.
w

;gglzosv

3PRASE Y

POWER
CONTROLLER
861-A

12-11046

DEC # 12-11046

#2410

NEMA # L14-20P

861-C

2-PHASE

POWER

CONTROLLER

12-11194

DEC # 12-11193

120/208-240V

#2610

NEMA # L6-30P

20A

861-F

120V TERMINAL DEVICES.

30A

POWER
CONTROLLER

60 Hz RM 10 DRUM

HUBBEL

#2611

NEMA # L21-20P
DEC # 12-11209

60 Hz RP0O2/RP03/

2510

RPO4, RPOG, RPO6

W | L21-20R

12-11210

4
DG

ALL 240V TABLE-TOP
COMPUTERS.

240V
16A
1-PHASE

C—

STANDARD LOW-CURRENT
240V DISTRIBUTION.
MOST 240V TERMINAL

DEC # 90-08863

12-11204

240V

20A
1-PHASE

HUBBEL

#2321
v
NEMA # L6-20P
DEC # 12-11192

#2320
L6-20R
12-11191

Y %

¢ Y

NEMA
# -- NOTNEMA

DEC # 12-09010

NEMA
L21-30P

DEC 12-12314

NOT NEMA

12-112869

50 Hz RPO2/RP03/

RPO4

50 Hz RM10 DRUM

// =

HUBBEL
42811

CONTROLLER
861-8

3 @w

20A

30A
1-PHASE

POWER

CABINET MOUNTED

240/416V

120V

ALL 240V STANDARD
EQUIPMENT.

3-PHASE Y

|
@ o ()
O

#2810
L21-30R

12-12316

Jy|

PDP11/70
PROCESSOR

PDP 11/70 MEM.
vax-11/780

POWER
CONTROLLER
861-D

PROCESSOR

CP-1968

Figure 2-2

Approved Electrical Plugs and Receptacles

2-6

2.1.4 Installation Constraints
The route from the receiving area to the installation site that the equipment will travel should be studied in
advance to ensure problem-free delivery. Among the considerations are:
«
«
«

Size, capacity, and availability of elevators
Number and size of aisles and doors en route

Height and location of loading doors

Bends or obstructions in hallways.

2.1.5 Grounding Requirements
Each cabinet of a DIGITAL computer system is equipped with ground lug terminals that should be
connected to a low-impedance earth ground by No. 4 AWG (5 mm/0.20 in) copper wire or stranded

No. 4 AWG welding cable. A Burndy QA4C-B solderless lug (or equivalent) is recommended for termi-

nating the cable. DIGITAL supplies a standard grounding conductor with each I/O and memory cabinet.

When two cabinets are bolted together, DIGITAL bonds them electrically with a No. 4 AWG conductor (5 mm/0.20 in) or by several copper mesh straps connected between the cabinet frames. Use the
green/yellow conductor in the power cord for safety ground connection.
The green/yellow grounding wire in the power cable must be returned to ground at the system power
distribution panel. Note that the green/yellow wire is a non-current carrying conductor, not a neutral
conductor.
For information about system grounding considerations, see the DIGITAL Site Preparation Guide (EK-

OCORP-S0O-003).

BUILDING

STEEL

<+— POWER PANEL

e
08-0717
Figure 2-3

Power Panel Grounded To Building Frame

2-7

Where neither scheme is possible, a metal area (comprising the power panel, the conduit, and a metal plate) of

at least 1 m* (10 ft*) that is in contact with masonry must be connected to the green ground wire (Figure 2-4).
The connecting wire must not exceed 1.5 m (5 ft) in length and should be at least a No. 12 AWG (2mm).
When two cabinets are bolted together, DIGITAL bonds them electrically with a No. 4 AWG conductor (5

mm/0.20 in) or by several copper mesh straps connected between the cabinet frames.

After the grounding system is installed, it is advisable to take a voltage reading between the cabinet frame and
the nearest grounded object. NBFU No. 70 (published by the National Bureau of Underwriters) provides
further details regarding preferred grounding procedures.

<+— POWER PANEL

CONCRETE

FLOOR
PLATE

08-0718

Figure 2-4

2.2

Power Panel Grounded To Metal Plate

AC CABLING

Computer equipment requires a power source with a minimum number of voltage and frequency disturbances.
Line voltage disturbances greater than 1/4 cycle (measured at the receptacle during system operation) are
undesirable.

DIGITAL power wiring conforms to Underwriters Laboratories, Inc., Handbook UL No. 478, National
Electrical Code standards, and the type Il requirements of the National Fire Protection Association (NFPA 70).
This means that in the United States the wire used as equipment ground is green, or green with a yellow stripe; it
carries no load current (except in emergency), but does carry leakage current. No equipment is permitted to
leave DIGITAL that does not have a grounding connection to its frame.

The grounded conductor is light grey or white. It must not be used to ground equipment. Its purpose is to
conduct current.

2-8

Lines 1, 2, and 3 in a typical 60 Hz power system (Figure 2-5) are represented by black, red, and blue wires,
respectively, and phase rotation is in that order.
CAUTION
Where no grounded wire can be guaranteed, it must
not be assumed. There are some 115 V/60 Hz systems within the United States where neither side of
the line is grounded (115 V 3-phase delta).

MAIN CIRCUIT
BREAKER OR
CUT-OFF CONTACTOR

PHASE A

208V

120V
PHASE B

MAIN SUPPLY

TRANSFORMER

—

(ONLY SECONDARY SHOWN)
208V

208v

120V

PHASE C

120V
}

NEUTRAL

FRAME GROUND

SRIPDIDIREE
——?

NOTES:

A THE NEUTRAL CONDUCTOR SHOULD BE GROUNDED AT THE MAINS

TO SINGLE PH‘RSE LOADS

SUPPLY TRANSFORMER
AND IF REQUIRED BY LOCAL AUTHORITIES AT THE DISTRIBUTION

(TYPICAL)

TO THREE

PHASE LOADS
(TYPICAL)

PANEL AND ELSEWHERE.
B

THE FRAME GROUND CONDUCTOR MAY CONSIST OF ELECTRICAL
METALLIC CONDUIT OR

RACEWAY IF APPROVED BY LOCAL AUTHORITIES.

Figure 2-5

Man1es

Typical 60 Hz Power System

Figure 2-6 shows a typical 50 Hz power system.

Two types of power systems can be used to provide power to the NEMA type L14-20R receptacle. The type

shown in Figure 2-7 is referred to as split-phase (or 2-phase 180 displaced) 120/240 Vac. It comprises a
center-tapped transformer with 120 Vac between the center tap and either of the two legs. 240 Vac exists
between the two outside legs.

The second type (Figure 2-8) is referred to as 3-phase Y (120 displaced) 120/280 Vac. The 120 Vac exists
between neutral and any of the three other legs (X, Y, or Z), and 208 Vac exists between any two of the outer
legs (i.e., between X and Y, X and Z, or Y and Z). Although Figure 2-8 shows the X and Y connections as the
two phases used for the receptacle, any two of the three phases shown can be used.
The ground terminal on the L14-ZOR receptacle will normally have a green screw, the neutral terminal will be

white or silver, and the ‘‘hot’’ terminal will be brass covered.

2-9

PHASE A

MAIN CIRCUIT
BREAKER OR
CUT-OFF CONTACTOR

I
|
|

220/240V

380/416V

PHASE B /+\

MAIN SUPPLY
TRANSFORMER

|
|

(ONLY SECONDARY SHOWN)

280/

416V

220/240V

PHASEC 1
|

‘

220/240V

NEUTRAL

SAFETY EARTH GROUND

THE NEUTRAL CONDUCTOR SHOULD BE CONNECTED TO EARTH
GROUND AT THE MAINS SUPPLY

TRANSFORMER.IF REQUIRED BY LOCAL AUTHORITIES IT MAY ALSO BE
EARTHED AT THE

Typical 50 Hz Power System

TRANSFORMER

g N
Y

_LG

4
=

WHITE

| 120V 240V ] OR GRAY G

2.3

| \l/
;|\

120V

WHITE

X GREY
G
4

GREEN

(A) 120/240V SPLIT-PHASE (TWO PHASE)
Figure 2-7

| POWER LINE

I TRANSFORMER

TO THREE
PHASE LOADS
(TYPICAL)

ELECTRICAL METALLIC CONDUIT OR
RACEWAY IF APPROVED BY LOCAL AUTHORITIES.

| POWER LINE

THE SAFETY EARTH GROUND CONDUCTOR MAY CONSIST OF

Figure 2-6

)

TO SINGLE PHASE LOADS
(TYPICAL)

DISTRIBUTION PANEL(S) AND ELSEWHERE.

IR R

| GREEN

— e

(B) 120/208V THREE PHASE

Split Phase (2-phase) Power System

Figure 2-8

11-2294

Three Phase Y Power System

INSTALLATION - GENERAL

The controller should be installed first, followed by the drive(s). Next, the diagnostics should be run to

demonstrate that the subsystem is functioning properly or to diagnose any problems. Paragraph 2.4 explains the
installation of the RL11 Controller, Paragraph 2.5 deals with the RLV11 and Paragraph 2.6 describes RL8A
installation.

Paragraph 2.7 contains instructions to install the unit and Paragraph 2.8 explains acceptance testing and
contains separate paragraphs for each of the three controllers. Paragraph 2.9 describes the use of the M9312
bootstrap module that may be used on RL11-based systems.

2.4 RL11 CONTROLLER INSTALLATION
The RLI11 Controller (M7762) is a single hex-height module that is installed in a hex-height SPC slot.
Connector J1 connects the controller to the drive bus (Figure 2-9).

2-10

FLL
MA-0561

OLDER

Figure 2-9

VERSION

RLI11 Component Layout (Sheet | of 2)

W16

W10

W15

W11

W14

W13

W12

i
ITEM NO. 1
MA-1465

NEWER VERSION

Figure 2-9

RLI11 Component Layout (Sheet 2 of 2)

2-12

Of the 21 jumpers on the RL11 Controller, five are used for factory test purposes. The remaining 16 are for
address selection:
WI1-W6

VECTOR ADDRESS (160)

W7-W16

BASE ADDRESS (774400)

NOTE
A logical one is represented by the presence of a
jumper wire.

The Unibus priority plug sets the priority for bus requests. For the RL11 subsystem, bus requests are at priority

level 5 (BR5/BGS). (See Figures 2-10 and 2-11.)
NOTE

Adjustments on the RL11 are preset at the factory
and are not to be changed in the field.

VECTOR ADDRESS SCHEME

: I'
.

;

0 l

217 216215:214 213 212| 211 210 29 | 28 2 26 I 25 24 23 I 22 21 20
0

0 l

FOR VECTOR ADDRESS

23| 22

0y0

| X
11 Wio Wyzyp

160 - W3, W4 Ws JUMPERS IN
Wi, W2 We JUMPERS OUT
BASE ADDRESS SCHEME

218| 217 216 215 214 213 212| 211 210 20| 28

| X
X

|11
I

26| 25

|
X
W12| Wi Wis W14| W; Wsg W
1

1]1

2
O

FOR BASE ADDRESS 774400 - W,,, W,s, W; JUMPERS IN

W,, Wg, W10, Wi1, Wy3, Wis, Wys, JUMPERS OUT
NOTE:

X'S DENOTE DON'T CARE (NOT SELECTABLE)
1'S DENOTE JUMPER IN

O'S DENOTE JUMPER OUT
Figure 2-10

CZ-2004
RL11 Base And Vector Address Jumper Configuration

2-13

——b

——

—

——

-—

—

29§

-—t

—

0/ o))

PRIORITY JUMPER PLUG FOR

BUS REQUEST LEVEL FIVE (5)

PLUG PIN NUMBER

SIGNAL NAME

UNIBUS PIN

BG IN

BG OUT

UB BG 4

DT2

UBBG4IN

DS2

UBBGDS

DR2

UBBGS5IN

DP2

UBBG 6

DN2

UBBG 6 IN

DM2

UBBG 7

DL2

UBBG 7 IN

DK2

UBBR 4

DD2

UBBRS

DE2

UBBR 6

DF2

UB BR 7

DH2
MA-0560

Figure 2-11

RLI11 Priority Jumper Assembly Connections

To install the controller:

Remove the M7762 module from its shipping container and examine it for any physical damage.

If a priority level other than 5 is required, obtain an appropriate priority jumper assembly or set up
the priority jumper assembly (item 1, Figure 2-9) using Figure 2-11 as a guide. The vector and base
address jumpers W1-W16 are for 160 and 774400, respectively. If the subsystem configuration
requires other than standard addresses, set the jumpers up as shown in Figure 2-10. Physical location
of these jumpers 1s shown on Figure 2-9.

Install the ribbon cable (BCO6R-XX) with the red indicator stripe to the right and the smooth side
facing the viewer when viewing the component side of the controller as shown in Figure 2-12. Dress
the cable as necessary.

2-14

CAB UPRIGHT (REF)

SEE NOTE 2

(SEENOTE 1)

SMOOTH SIDE

NOTES:

WHEN INSTALLED IN BA11K OR BA11L
RED REF.

EXPANSION BOX, BCO6R CABLE (ITEM #3)

STRIPE

SHOULD BE FOLDED 90° AND ROUTED UP
OUT OF THE BOX AS SHOWN.
WHEN ALTERNATE MOUNTING POSITION

IS USED CONNECTOR IN TRANSITION

CABLE FROM

BRACKET MUST BE INVERTED SO THAT

DRIVE (REF)

/0 CABLE FROM DRIVE WILL HANG
IN

A DOWNWARD POSITION AS SHOWN.

ITEM #3 THRU ITEM #8 ARE NOT

RED REF. STRIPE

ASSEMBLED AT THIS POINT BUT ARE
SHIPPED WITH UNIT FOR ASSEMBLY

AT INSTALLATION TIME.

CABLE FROM

DRIVE (REF)

PRIORITY JUMPER ASSY (ITEM #1) TO
BE PLUGGED INTO M7762 AT FINAL ASSY.

THE RL11 MODULE (M7762) WILL

OCCUPY ONE HEX SPC SLOT.

RED REF. STRIPE

JUMPER WIRE FROM CA1 TO CB1 ON
M7762

THE SPC BACKPLANE MUST BE

n0
SMOOTH SIDE

REMOVED AT INSTALLATION.

DESCRIPTION

SEE NOTE 5 & 6

DWG PART NO.

ITEM NO.

2 SCREW, PHLTRS HD. #10-32 X .50 LG

9006073-03

2 NUT, SPRING #10-32

9007786-00

1 SCREW, TAP-TLTE, #8 X .38 LG

9006418-01

1 CLAMP, CABLE

9007083-00

1 TRANSITION BRACKET ASSY

C-AD-7012415-0-0

1 CABLE ASSY

D-UA-BCO6R-06

1 RL11 CONTROLLER

D-UA-M7762-0-0

1 PRIORITY JUMPER ASSY

5408778

CZ-2005

Figure 2-12

RL11 Controller Installation

Insert the controller into its appropriate slot in the SPC backplane as shown in Figure 2-12 after
ensuring that the slot does not contain a grant continuity medule in row D. Do not chatfe the ribbon
cable. Route the cable up and out to the rear of the cabinet, allowing for cable strain relief.
NOTE

See Appendix A for configuration rules and SPC slot
selection considerations.
5.
6.

Remove the jumper between CA1l and CB1, (NPR Grant) on the backplane, if the jumper exists.
Install the transition bracket at the rear of the cabinet shown in Figure 2-12. Assemble and install
transition connector.

Connect the other end ofthe ribbon cable (BCO6R-XX) with the red indicator stripe on the top. Use
Figure 2-12 as a guide.

Apply system power and, using a suitable measuring device (i.e., digital voltmeter or equivalent),
verify the voltages are within the ranges specified below.

VOLTAGE

RANGE

TEST POINT

GROUND

AC2

+5 VDC

+4.75 TO

+5.25 VDC

AA?2

BACKPLANE

+15 VDC

+14.25 TO +15.75 VDC

CVl

LOCATION

—15 VDC

—15.75 TO —14.25 VDC

CB2

Measure all voltages between the ground test point and the appropriate voltage test point. If any
adjustments to the power supply are necessary, refer to the appropriate manual.

2.5

RVLI11 CONTROLLER INSTALLATION

An RLVI11 Controller is comprised of a bus interface module (M8014) and the drive bus module (M8013).
Each module has switches, jumpers, trimpots, and connectors that are explained in the following paragraphs.

2.5.1

Bus Interface Module

The bus interface module (M8014) contains the logic circuits that perform the following major functions:
«

LSI-11 bus interface functions

Programmable registers

Silo data storage and control circuits

An illustration of the component side of M8014 1s shown in Figure 2-13. The location of the bus address
switches, the vector address switches, and the connector finger assignments are shown in this figure.

The bus address switch 1s used to set up the device base address. It is normally factory preset to 7440. This
means the device CS register has an address of 174400 and the MP register has an address of 174406. The
switches have the ON and OFF positions labeled. The ON position is the logical 1 or true state (Figure 2-14).

The vector address switch is used to select the address of the vector for this device when it interrupts. It is
factory preset for an address of 160 (Figure 2-15).

2-16

RLV11 BUS INTERFACE MODULE (M8014)

COMPONENT SIDE 1

MSB
BUS ADDRESS SWITCH

LSB | b
MSB

VECTOR SWITCH
LSB

P
A
CZ-2006

Figure 2-13

RLV11 Bus Interface Module

(M8014) (Component Side)

E23%

1
_

HARDWIRED——————l 2

7
1 214

213

LOGIC ELEMENT

4
212 | 211

910

2102

100

4
99

2272

O
26

100

[«———BASE ADDRESS

594

2224 2
O

0 0O

l«—————BINARY VALUE

10/987 | 654|321

SWITCH NUMBER

MSB

LSB

FOR EACH “O” SET THE CORRESPONDING SWITCH “OFF”
FOR EACH “1” SET THE CORRESPONDING SWITCH “ON"”

USE THIS SCHEME TO SELECT THE APPROPRIATE BASE
ADDRESS IF A DIFFERENT BASE ADDRESS
IS REQUIRED
CZ-2034

Figure 2-14

RLVI1I Base Address Switch Settings

2-17

E22e-

20 | 25

2423

BINARY VALUE
SWITCH NUMBER

VECTOR ADDRESS—=!

LOGIC ELEMENT

1|1

10|

| 21

0o | oo

=HARDWIRED

LSB

MSB

FOR EACH “O” SET THE CORRESPONDING SWITCH “OFF”

FOR EACH “1” SET THE CORRESPONDING SWITCH “ON"
USE THIS SCHEME TO SELECT THE APPROPRIATE
VECTOR ADDRESS IF A DIFFERENT VECTOR
ADDRESS IS REQUIRED
Figure 2-15

2.5.2

CZ-2007
RLVI1 Vector Address Switch Settings

Drive Module

The drive module (M8013) contains the circuitry that performs the following major functions:
Data formatting and error detecting circuits

Control microsequencer and timing circuits
Drive bus interface

An 1llustration of the component side of M8013 is shown in Figure 2-16.

NOTE
Adjustments to the RLV11 are preset at the factory

and are not to be adjusted in the field.

2.5.3

Module Slot Location

Modules M8013 and M8014 must be inserted into the H9273 backplane (Figure 2-17) such that the M8013
module 1s in the slot closest to the processor. Outside of this one restriction, the two modules can be inserted in
any two unused slots. The controller priority level is based solely on its electrical distance from the

microprocessor module in slot 1.

2.5.4

Module Installation
L.

Using the normal configuration rules, select two adjacent slots in the backplane for the two
controller modules.
Insert the ribbon cable (BCO6R-XX) into J1 on the M8013 with the red stripe edge toward the top
(Row A) of the module.
Insert the M8013 module into the selected slot that is closest to the processor.

Examine the M8014 to insure that the base address switches and the vector address switches are set

correctly. Check jumpers W1 thru W4 for correctness. See Figures 2-14, 2-15 and 2-16.

2-18

/ |

R
4|

W2¢

vcorot

CABLE CONNECTOR TO DRIVE

RLV11 DRIVE MODULE (M8013)
COMPONENT SIDE 1
JUMPERS W2 AND W4 IN PLACE FOR EPROM USE (PART #058B7)
JUMPERS W1 AND W3 IN PLACE FOR MASKED ROM USE (PART #23017E2)
W1

E49M

ROM

[:l

W4 W3

OR
EPROM

NOTE:

CZ-2008

JUMPERS ARE ZERO OHM COMPOSITION RESISTORS
Figure 2-16

RLVI1 Drive Module (M8013)

—

PROCESSOR MODULE

>
-—fi;—. ——-———-L—-——-fi&-———q—-—*

HIGHEST PRIORITY

LOWEST PRIORITY
1

(MODULE SIDE VIEW OF 9 SLOT BACKPLANE)
MA-0566

Figure 2-17

H9273 Backplane Grant Priority Structure

2-19

Insert the M8014 module next to the M8013.

Install the transition bracket at the rear of the cabinet as shown in Figure 2-12. Assemble and install

the transition connector.
7.

Connect the other end of the ribbon cable with the red stripe up.

Apply system power and, using a suitable measuring device (i.e., digital voltmeter or equivalent),

verify that the voltages are within the ranges specified below.

VOLTAGE

RANGE

TEST POINT

Ground

AC?2

+5 Vdc

+4.75 Vdc to +5.25 Vdc

AA2

+12 Vdc

+11.5 Vdc to +12.5 Vdc

AD?2

—5 Vdc

—5.25 Vdc to —4.75 Vdc

ALT (M8013 only)

NOTE
The —5 Vdc is generated on the M8013 module. It is
not adjustable but must be within specifications for
proper operation. Module replacement is the only

corrective procedure.
Measure all voltages between the ground test point and the appropriate voltage test point. If any
adjustments to the power supply are necessary, refer to the appropriate manual.

2.6

RL8-A CONTROLLER INSTALLATION

2.6.1

Introduction

The RL8-A Omnibus controller module (M8433) contains the following logic functions:

Interface logic

Programmable registers

Silo data storage and control

Data formatting and error detection

Control microsequencer and timing logic

Drive bus interface logic
NOTE

Adjustments on the RL8-A are preset at the factory

and are not to be changed in the field.

2.6.2

Module Slot Location

The module can be inserted into any unused Omnibus hex-height slot between the CPU and the first memory

element. The controller 1s connected to the first drive via a BC80J-20 interface cable. Connections between
drives are made using a BC20J-XX (70-12122-10) cable.

2.6.3

Module Installation
I.

Remove the M8433 module (see Figure 2-18) and interface cable (BC80J-20) from the shipping

container and inspect them for physical damage.

2-20

,fl¥
1T

—

W10

o—e3

w11 [ _ROM
M8433
RL8A

DISK CONTROLLER
W6
*—e

P—

W7
W8
W9

e ]
CZ-2030

Figure 2-18

2-21

RL8-A Jumpers

Verify the proper jumper configuration for device codes and priority (Figure 2-18).

Device Code

Wil

60,61

OuT

62,63

Break Priority

OuUT

OUT

NOTE

RL8-A is shipped from the factory with a priority of 0.
Device Type

RLOI

OUT

RLO2

OuUT

ROM Type (E133)

W10

Wil

012E2

OUT

8708 or 2708

OUT

OuT

OuUT

Position the BC80J-20 interface-to-drive cable in the PDP-8 chassis and connect the Berg connector
to the M8344 module.
Install the M8344 module into selected slot in the Omnibus backplane.
5.

2.7

Route the cable out to where the first drive will be installed.

RLO1/RLO2 DISK DRIVE INSTALLATION

2.7.1

Unpacking and Inspection
l.

When delivered, each drive and its associated cabinetry are enclosed by a heavy cardboard carton

and attached to a shipping skid (Figure 2-19). Remove the plastic straps that secure the shipping
carton to the skid.
Remove the lid from the top of the carton.

Remove the staples that fasten the wooden crating slats and carton flanges to the skid.
Remove the shipping carton.
Inspect the cabinet and drive for signs of damage. Retain all packing material and receipts in the

event that any claims for shipping damage must be filed. All claims should be filed promptly with
the transportation company.

2-22

FULL TELESCOPE CAP

(9905446)

5-PANEL FOLDER

(9905975)

CRATING SLAT

(7606858)

CUSHIONED

/TR

SHIPPING SKID

STAPLES

114979

Figure 2-19

2.7.2

H950 Shipping Package

RLO1/RLO2 Disk Drive Unit Mounting
NOTE

If the RLO1/RLO02 is to be mounted in an H950
cabinet, the shipping brackets must be retained and
refitted after installation. This is the only way to
prevent the drive from sliding while repositioning or
moving the H950 cabinet.
The drive may be shipped in a rack or cabinet as an integral part of a system or may be shipped in a separate
container for addition to an existing system.

If the drive is to be installed in an existing rack or cabinet, install the chassis slides first as described in Steps 1
through 6 below (Figure 2-20). The procedure for installing the drive itself begins with Step 7.
L.

Install cabinet stabilizers before mounting the drive.

Remove the slides from the disk drive. (Retain the hardware for reassembly.)

Install slides into the rack or cabinet using enclosed hardware. Be sure the slides are at the correct

height to permit installation of pop panels (dress panels) upon completion of installation. Also verify
that the slides do not bind on any hardware used to mount the slide.
Extend slides to lock position.

Slide drive onto chassis slides and reinstall security mounting hardware.

Ensure that the disk drive moves easily on the slides, that there 1s no binding in the cabinet, and that
the proper height has been maintained for dress panels.

Open the drive access cover.
NOTE

There is a safety interlock in the RL0O1 and RL02
Disk Drives that locks the drive access cover when
the drive has no power. The manual release to
bypass this interlock is located on the right side of
the drive under a small access cover (Figure 2-21).
Remove the cover to reach the solenoid. Pull down
on the solenoid and operate the top release
mechanism at the same time to open the drive access
cover. After the drive access cover is open, replace
the solenoid cover.

Loosen the head restraining bracket screw located on the positioner. Turn the bracket 90 degrees and

retighten the screw (Figure 2-21).

On newer drives there are two shipping screws on the bottom of the unit that secure the spindle/
blower motor. Remove the screws.
10.

11.

If the drive is being installed in a dual-drive cabinet that has an interlock system to prevent more than
one drive being extended at a time, ensure that it is connected.

Inspect the terminal block covers at the rear of the drive. Ensure that they are configured properly for
the input power available (Figure 2-22).

CAUTION

Connection to the wrong power source will result in

serious damage to the disk drive.
12.

If there is only one disk drive in the system, or if this is the last drive of the daisy chain, install a
terminator assembly (DIGITAL part no. 70-12293) in the ‘‘cable out’” location at the rear of the
drive (Figure 2-22).

13.

If this is an RL11- or an RLV11-based system, route the I/O cable BC20J-XX (DIGITAL part no.
70-12122-10) between the first drive and the transition connector. If this is an RL8-A-based system,

route the BC80J-20 cable from the RL8A to the first drive.
224

LOCKING LATCH

\7.000Q00\

\@200Qaa0

Juoooooogi\
[OOOOOOOOOh)

SEE
DETAIL

ACCESS SLOT

SLIDE EXTENSION
RELEASE CATCH

MA-1581

Figure 2-20

RLOI/RLO2 Cabinet Installation

2-25

POSITIONER
FRONT VIEW:

o P

POSITIONER

RESTRAINING
BRACKET

« . .,/

LATCH

SOLENOID
ACCESS COVER

CZ-2003

Figure 2-21

RLOI/RLO2 - Covers Removed

2-26

170 CABLE

("CABLE IN")

TERMINATOR

NORMAL/LOW
LINE VOLTAGE
TERMINAL BLOCK
COVER

CABLE "OUT"

110/220 VOLTS
TERMINAL

BLOCK COVER

AC LINECORD
CIRCUIT BREAKER
CZ-1056

Figure 2-22

14.

RLOI/RL0O2 Disk Drive-Rear View

If this is a multidrive installation, connect an 1/O cable from ‘*cable in"" ofthis drive to the **cable
out’’ connector of the previous drive. Repeat for each drive.
NOTE

The total length of cable from controller to the last

drive must not exceed 30 m (100 ft).
15.
2.7.3

Install the proper unit select plug at the front of the drive (Figure 2-23).

Drive Prestartup Inspection

To begin the inspection procedure, remove the top cover by loosening the captive screws and lifting the cover
straight up. Rest the cover on the rear of the drive (Figure 2-24). With the drive power off and controller power
on, follow these steps.
NOTE

If a problem occurs, consult the RLOI/RL0O2 Technical Manual.

Ensure that the positioner restraining bracket is not interfering with the positioner (Figure 2-21).

Ensure that the positioner 1s home.

Ensure that the read/write head gimbels are not bent or dirty. (If they are dirty, clean with a solution
of 91 percent alcohol and 9 percent water and a lint-free wiper.

2-27

Ensure that the spindle rotates freely and its top surfaces are not dirty. (Clean as described above).

Ensure that the brush assembly 1s home (not exposed).

Ensure that the logic modules and connectors are seated firmly.

Turn CB1 ON.

Ensure that the spindle rotates slowly counterclockwise for approximately 15 seconds and stops. At
this time, the LOAD light will come on.

Ensure that the FAULT light 1s not on.

Ensure that the fan at the rear of the drive is operating.

LOAD SWITCH

‘

AND INDICATOR

UNIT SELECT PLUG

AND READY INDICATOR

FAULT
INDICATOR

WRITE PROTECT SWITCH
AND INDICATOR
CZ-1005

Figure 2-23

RLOI/RLO0O2 Disk Drive-Front View

2-28

DRIVE LOGIC

A.C.

SERVO MODULE

R/W

MODULE

D.C.SERVO MODULE
AND TEMPLATE

Figure 2-24

MA-0564

RLOI/RLO2 Disk Drive-Exposed Drive Logic Module

Using a suitable measuring device (i.e., digital voltmeter or equivalent), ensure the following drive
voltages are within the specified tolerances.

Voltage

Range

Test Point

+ 15UNREG

(+15.0 to +18.0 Vdc)

+ VUNREG

—15UNREG

(—15.0 to —18.0 Vdc)

—VUNREG

+5REG

(+4.85 to +5.35 Vdc)

TPS8

+8REG

(+7.7 to +8.3 Vdc)

TP4

—8REG

(—=7.7 to —8.3 Vdc)

TP5

See Figure 2-24 for dc servo module location. Test points are located on the mask covering the dc
servo module.

2-29

Verify that the WRITE PROTect switch cycles in and out and the indicator lights up when the switch
1s pressed.

Verity that the LOAD switch cyclesinand out when the switch is pressed. Return switch to the
“out” position.

Turn off CBI.

Reinstall the top cover and secure with the captive screws.
Ensure that the drive access cover cannot be opened.

Turn CB1 on and ensure the drive access cover will open.

2.7.4

Drive Startup Operation Check
.

With the drive power ON, install a scratch cartridge as described in Paragraph 3.3.

Close the cover, press the LOAD switch and note that:
«

The LOAD light goes out

When the cartridge reaches nominal speed (after approximately 30 seconds), a brush cycle

commences. When the brushes have returned home, the read/write heads will load and approach
cylinder 0. When the heads have locked onto cylinder O, the READY light will illuminate. The
total time for this process is approximately 45 seconds.

Press the LOAD switch again. The READY light should go off and the read/write heads should
retract to their home position. The spindle should slow down and then come to a complete stop after
about 30 seconds. The LOAD light should illuminate when the spindle has stopped.
If the drive startup operation check detailed above 1s successtully completed (1.e., the READY
indicator illuminates), run the subsystem confidence tests described in Paragraph 2.8. If there 1s a
problem, consult the RLO//RLO2 Technical Manual.
2.8

CONFIDENCE TESTING

Confidence testing consists of running the diagnostic programs. Each diagnostic has a listing that contains
operating instructions. Each listing explains system hardware requirements, software environment, which
features are tested and how they are tested, program options and how to select them, how to interpret printouts,
error handling, device information tables, dialogue with the Diagnostic Supervisor, and complete operating
instructions. The listings are available as hard copy printouts or on microfiche.
The binary form of the diagnostic programs are available on various media. Itis always advisable to keep a copy
of the RLO1/RLO02 diagnostics on a media other than the RLOIK or RLO2K cartridge so that the diagnostics can
be loaded through another device if the RL subsystem is down.

2-30

When ordering diagnostic media, listings, manuals, or microfiche, check the current catalog or index for the

latest revision level. The applicable catalogs and indexes are listed in Table 2-3. Unless otherwise specified
when ordering, the latest revision will be shipped.

Table 2-3

Diagnostic Catalogs and Indexes

NAME

PART NUMBER

PDP-11

Diagnostic Software Components CatalogueTM

AV-BO21E-TC

PDP- 8

Software Components Catalogue*

AV-0872B-TA

PDP-11

MAINDEC Index (microfiche)

AH-9026P-MC

PDP- 8

MAINDEC Index (microfiche)

AH-6572G-MA

* Note—Both of these catalogs are available on microfiche (EP-08/11DC-02).

2.8.1

RLI11-Based Diagnostics
The diagnostic package used for an RL11/RLOI subsystem before the release of the RL0O2 consisted of the six
free-standing programs listed in Table 2-4. There were two revisions, Revision A and Revision B. These
programs handled only RLOI drives (not RLO2 units).

Table 2-4

RL11-Based Diagnostics

PART NUMBER

DESCRIPTION

CZRLAAO

Controller Test Part 1

CZRLBAO

Controller Test Part 2

CZRLCAO

Drive Test Part 1

CZRLDAO
CZRLEAO
CZRLFAO

Drive Test Part 2
Performance Exerciser
Drive Compatibility Test

These diagnostics can be run free-standing, under the Diagnostic Supervisor, manually under XXDP,

chainable under XXDP (except CZRLFAO which requires manual intervention), or under manufacturing
checkout environments such as SLIDE or ACT-11.
A new diagnostic package is available to test either an RLO1 or an RLO2 unit. The kit numbers are listed in Table

2-5 and the contents of the tests are shown in Table 2-6.
There 1s a new program added to the package named CZRLMADO. It is used to read the Bad Sector File and can

be used to write entries into the field writable portion of the Bad Sector File. This program is not a diagnostic
and should not be used as one. It assumes that the system is functioning properly.

Table 2-S

RL11 Diagnostic Kit Numbers

PART NUMBER

DESCRIPTION

Z7J283-RB

Documentation and Paper Tape

ZJ283-RZ

Documentation Only

/7J283-PB
ZJ283-FR

Microfiche Only

Paper Tape Only

Table 2-6

RL11 Diagnostic Components

PART NUMBER

NAME

ITEM

AC-FI1TA-MC

CZRLGAO CONTROLLER TEST #1

DOCUMENTATION

AH-F110A-MC

FICHE

AK-FI108A-MC

PAPER TAPE #1

AK-F109A-MC

PAPER TAPE #2

AF-F111A-MO

DECO

AC-FI15A-MC

CZRLHAO CONTROLLER TEST #2

DOCUMENTATION

AH-F114A-MC

FICHE

AK-F112A-MC

PAPER TAPE #1

AK-F113A-MC
AF-FI115A-M0O

PAPER TAPE #2
DECO

AC-F119A-MC

CZRLIAO DRIVE TEST #1

AH-FI18A-MC

DOCUMENTATION
FICHE
PAPER TAPE #1
PAPER TAPE #2
DECO

AK-FI116A-MC
AK-F117A-MC
AF-FI119A-MO

AC-F123A-MC
AH-F122A-MC
AK-F120A-MC
AK-FI21A-MC
AF-F123A-MO

CZRLJAO DRIVE TEST #2

DOCUMENTATION
FICHE
PAPER TAPE #1
PAPER TAPE #2
DECO

AC-F127A-MC
AH-FI126A-MC
AK-F124A-MC
AK-FI125A-MC
AF-F127A-MO

CZRLKAO PERFORMANCE EXERCISER

DOCUMENTATION
FICHE
PAPER TAPE #1
PAPER TAPE #2
DECO

AC-F131A-MC
AH-FI130A-MC
AK-F128A-MC
AK-F129A-MC

CZRLLAO DRIVE COMPATIBILITY TEST

DOCUMENTATION
FICHE
PAPER TAPE #1
PAPER TAPE #2

AC-F135A-MC
AH-FI134A-MC
AK-FI32A-MC
AK-FI133A-MC
AF-F135A-MO

CZRLMAO BAD SECTOR FILE UTILITY

AF-F131A-MO

DECO

DOCUMENTATION
FICHE
PAPER TAPE#1
PAPER TAPE #2
DECO

In addition to the free-standing diagnostics, there is a DECX11 module for use with the DECX11 System
Exerciser. The current revision is designated RLAA and is in DECX11 Option Library #5 DXQLQ. Revision
A (RLAA) will operate an RLOI drive only. Revision B (RLAB) will operate either an RLO1 or an RLO2.

There is also an RL subsystem driver for the Maintenance Program Generator (MPG).

2-32

The binary form of the diagnostics is included as part of XXDP. This makes them available on media for the
RKO5, RK06, RK0O7, RLOI, RX01, DECtape, magnetic tape, and DECassette.
The use of XXDP, DECX11, and MPG is explained in the manuals listed in Table 2-7.
Table 2-7

User Documents

PART NUMBER

HARD COPY

MICROFICHE

NAME

AC-90931-MC

EP-DZQXA-J-D

CZQXAIO XXDP USER GUIDE

AC-8240Z-MC

AH-82427-MC

CXQBAZ0O DECX11 USER DOCUMENT

AC-816JC-MC

EP-DTUMA-C-D

CTUMACO M.P.G. USER MANUAL

2.8.2

RLYVI11-Based Diagnostics

The RLVI1I Controller-based subsystem is tested with the same set of diagnostics as the RL11 Controller
subsystem with the following exception. The RLV 11 has an internal maintenance feature that is not tested by

the RL11 diagnostics so there is one additional diagnostic program called the CRVLAAO Diskless Test. It
should be run first.

The diagnostic kit includes the same items as the RL11 diagnostic kit plus the CVRLAAO test. The RLV11 kit

designations are shown in Table 2-8.
Table 2-8

RLV11 Diagnostic Kit Designations

DESIGNATION

CONTENTS

ZJ285-RB

Documentation and Paper Tape

Z7J285-R7Z

Documentation Only

/7J285-PB

Paper Tape Only

ZJ285-FR

Microfiche Only

The DECX 11 module is the same one used for the RLI1.

2.8.3

RLS8A-Based Diagnostics

There are six free-standing diagnostic programs for the RL8/RLO1 system. There is also a DECX8 module for
use with the DECXS8 system exerciser. These diagnostics are available in a kit (see Table 2-9) or as individual
components (see Table 2-10) and are for use with RLOI only.

Table 2-9

RLS8/RL01 Diagnostic Kits

PART NUMBER

CONTENTS

ZB233-RB

Documentation and Paper Tape

/ZB233-RZ

Documentation Only

/B233-PB

Paper Tape Only

/ZB233-FR

Microfiche

2-33

Table 2-10

RLS8/RL01 Diagnostic Components

PART NUMBER

DESIGNATION

AC-CO656A-MA

AJRLAAOQO, RL8A DISKLESS CONTROL TEST (DOC)

AH-C657A-MA

AJRLAAO, RL8A DISKLESS CONTROL TEST (FICHE)

AK-C658A-MA

AJRLAAO, RL8A DISKLESS CONTROL TEST (P. TAPE)

AL-C659A-NA

AJRLAAO, RL8A DISKLESS CONTROL TEST (DECTAPE)

AC-C660A-MA

AH-C665A-MA

AJRLBAO, RL8A/RLOI
AJRLBAO, RL8A/RLO1
AJRLBAO, RL8A/RLOI
AJRLBAO, RL8A/RLOI
AJRLCAO, RL8A/RLOI
AJRLCAO, RL8A/RLOI

AK-C666A-MA

AJRLCAO, RLSA/RLOI DRIVE TEST 2 (P. TAPE)

AL-C667A-NA

AC-C676A-MA

AJRLCAO, RL8A/RLOI DRIVE TEST 2 (DECTAPE)
AJRLDAO, RLSA/RLOI COMPAT. VERIFY (DOCUMENT)
AJRLDAO, RLSA/RLOI COMPAT. VERIFY (FICHE)
AJRLDAO, RL8A/RLOI COMPAT. VERIFY (P. TAPE)
AJRLDAO, RLSA/RLOI COMPAT. VERIFY (DECTAPE)
AJRLEAO, RL8A/RLOI PERF. EXER. (DOCUMENT)
AJRLEAO, RL8A/RLO1 PERF. EXER. (FICHE)
AJRLEAO, RLSA/RLOI PERF. EXER. (P. TAPE)
AJRLEAO, RL8A/RLOI PERF. EXER. (DECTAPE)
AXRLAAO, RL8A DECX8 MODULE (DOCUMENT)

AH-C677A-MA

AXRLAAO, RL8SA DECX8 MODULE (FICHE)

AK-C678A-MA

AXRLAAO, RL8A DECX8 MODULE (P. TAPE)

AC-C682A-MA

AJRLGAO, RLSA/RLOI
AJRLGAO, RLSA/RLOI
AJRLGAO, RLS8A/RLO!I
AJRLGAO, RLS8A/RLOI

AH-C661A-MA

AK-C662A-MA
AL-C663A-NA

AC-C664A-MA

AC-C668A-MA
AH-C669A-MA
AK-C670A-MA

AL-C671A-NA
AC-C672A-MA
AH-C673A-MA

AK-C674A-MA
AL-C675A-NA

AH-C683A-MA
AK-C684A-MA
AL-C685A-NA

DRIVE TEST 1 (DOCUMENT)
DRIVE TEST 1 (FICHE)
DRIVE TEST 1 (P. TAPE)
DRIVE TEST | (DECTAPE)
DRIVE TEST 2 (DOCUMENT)
DRIVE TEST 2 (FICHE)

PACK VERIFY (DOCUMENT)
PACK VERIFY (FICHE)
PACK VERIFY (P. TAPE)
PACK VERIFY (DECTAPE)

There are six free-standing diagnostic programs for the RL8/RL02 subsystem, plus a module for use with the
DECXS8 System Exerciser. They are available in kit form (Table 2-11) or as individual components (Table
2-12). The Diskless Controller Test AJRLACO is simply Revision C of the RLO1 test and can test a subsystem
with either RLO1 or RLO2 units. The other diagnostics test RLO2-based systems only.
Table 2-11
PART NUMBER

RLS8/RL02 Diagnostic Kits
CONTENTS

ZF241-R7Z

DOCUMENTATION

ZF241-RB

DOCUMENTATION AND PAPER TAPE

/ZF241-PB

PAPER TAPE

ZF241-FR

FICHE

/ZF241-PH

RLO2

ZF241-RH

R1LO2 AND DOCUMENTATION

2-34

Table 2-12

RLS8/RL02 Diagnostic Components

PART NUMBER

NAME

ITEM

AC-C656C-MA
AH-C657C-MA

AJRLACO RL8A DISKLESS CONTROL TEST

DOCUMENTATION
FICHE

AK-C658C-MA

PAPER TAPE

AL-C659C-NA

AC-F362A-MA

DEC TAPE

AJRLHAO RL8/RL0O2 SEEK/FUNCTION

DOCUMENTATION

AK-F363A-MA

PAPER TAPE

AH-F364A-MA

FICHE

AL-F365A-MA

DEC TAPE

AF-F362A-M0
AC-F366A-MA

AJRLIAO RL8/RL0O2 READ/WRITE

DECO/DEPO
DOCUMENTATION

AK-F367A-MA

PAPER TAPE

AH-F368A-MA

FICHE

AL-F369A-MA

DEC TAPE

AF-F366A-MO
AC-F370A-MA

AJRLJAO RL8/RL0O2 DRIVE COMPAT

AK-F371A-MA

DECO/DEPO
DOCUMENTATION
PAPER TAPE

AH-F372A-MA

FICHE

AL-F373A-MA

DEC TAPE

AF-F370A-M0O
AC-F374A-MA

|
AJRLKAO RL8/RL0O2 PERF. EXER.

DECO/DEPO
DOCUMENTATION

AK-F375A-MA

PAPER TAPE

AH-F376 A-MA

FICHE

AL-F377A-MA

DEC TAPE

AF-F374A-M0O

AC-F378A-MA

DEPO/DECO

AJRLLAO RL8/RL0O2 PACK VERIFY

DOCUMENTATION

AK-F379A-MA

PAPER TAPE

AH-F380A-MA

FICHE

AL-F381A-MA

DEC TAPE

AF-F378A-M0O
AC-F382A-MA

AXRLBAO DEC/X8 MOD RL8&/RL02

DECO/DEPO
DOCUMENTATION

AK-F383A-MA

PAPER TAPE

AH-F384A-MA

FICHE

AF-F382A-MO

DECO/DEPO

2.9

USE OF THE M9312 BOOTSTRAP WITH AN RL11 SUBSYSTEM

The M9312 module is used on many PDP-11 Unibus systems to provide bootstrap capability as well as other

functions. The module has tive IC sockets for ROM chips, four of which are reserved for peripheral bootstrap
programs. There are several ROM chips available for the different peripheral devices, and an M9312 is

configured by selecting the appropriate chips for the particular system on which it is used.
The RL subsystem bootstrap program is contained in ROM chip number 23-751A9. This chip can be ordered
individually and is also available in kit MR11-EA, which consists of an M9312 module plus all the available

ROM chips.
An RL system disk can be booted by a command to the console emulator (a program that is a feature of the

M9312). The device mnemonic for the RLI1 is DL or DLn, where n is the unit number (0 through 3).

More information on the M9312 is available in the M93/2 Technical Manual. It is available in printed form
(EK-M9312-TM) or on microfiche (EP-M9312-TM).

2-35

CHAPTER 3

OPERATOR’S GUIDE

3.1
INTRODUCTION
This chapter describes the function of all external controls available to the user of the RLOI1/RLO2 Disk Drive
and explains how to operate the subsystem.

3.2 CONTROLS AND INDICATORS
Figures 3-1 and 3-2 show all the drive controls and indicators.

LOAD SWITCH

‘

AND INDICATOR

]

UNIT SELECT PLUG

AND READY INDICATOR

FAULT
INDICATOR

WRITE PROTECT SWITCH
AND INDICATOR
CZ-1005

Figure 3-1

RLOI1/RLO2 Disk Drive — Front View

3-1

170 CABLE

(“CABLE IN")

TERMINATOR

NORMAL/LOW

LINE VOLTAGE
TERMINAL BLOCK

COVER

CABLE "OUT"

1107220 VOLTS
TERMINAL

BLOCK COVER

AC LINECORD
CIRCUIT BREAKER
CZ-1056

Figure 3-2

3.2.1

RLOI/RLO2 Disk Drive — Rear View

Power ON/OFF Circuit Breaker

When the power plug is inserted into the proper ac outlet, ac power is applied to the rear panel circuit breaker on

the drive. When the circuit breaker 1s switched ON, ac power is applied to the drive and the fan is energized.

3.2.2 Run/Stop Switch with LOAD Indicator
This push on/push off switch, when pressed in, energizes the spindle motor providing the following conditions
have been met.

The RLOIK/RLO2K cartridge has been installed.

The cartridge protective cover is in place and the cartridge access door is closed.

All ac and dc voltages are within specifications.

The read/write heads are home (retracted).

The brushes are home.

When this switch is released, the spindle drive motor is deenergized if the read/write heads are not loaded. If the
heads are loaded, they are immediately retracted and the spindle drive motor is then deenergized. In the event of

a main power interrupt and subsequent power restoration, the drive will cycle up if the switch 1s ON since 1t
contains mechanical memory.

3-2

The LOAD indicator 1s illuminated whenever:
«

The spindle is stopped

The read/write heads are home

The brushes are home

The spindle drive motor is not energized.

3.2.3 UNIT SELECT Switch with READY Indicator
The UNIT SELECT switch 1s a cam-operated switch that 1s actuated by inserting a numbered, cammed button.
The switch contacts are binary encoded so the drive interface logic recognizes the UNIT SELECT number (0, I,
2 or 3).

The UNIT SELECT indicator, when lit, indicates a drive READY condition. This condition exists when:

The read/write heads are loaded

The heads are detented on a specific track.

3.2.4

FAULT Indicator

The FAULT indicator 1s lit whenever the following fault or error conditions develop in the disk drive:
*

Drive Select Error

Seek Time Out Error

Write Current in Heads During Sector Time Error

Loss of System Clock (this condition is not latched and not represented in status word)

Write Protect Error

Write Data Error

Spin Error
NOTE
Volume Check does not light the

FAULT Indicator

but does cause DRIVE ERROR.
3.2.5

WRITE PROTECT Switch and Indicator

This push on/push off switch is used to set the WRITE PROTECT condition if it had been reset or to reset the
WRITE PROTECT condition if it had set. The switch unit contains a light that is on when the WRITE

PROTECT condition is set.

3.3

OPERATING PROCEDURES

This paragraph explains how to load a cartridge into a disk drive and how to cycle up the drive to put the
subsystem on-line. The cycle-up procedure assumes that ac power is available, the drive ac circuit breaker is on
(muffin fan is energized), system power is on and the LOAD indicator on the drive control panel is on.

3.3.1

Cartridge Loading and Drive Startup Procedure
I.

Raise the drive access cover.

Prepare a cartridge (Figure 3-3) for loading as follows:
a.

Lift the cartridge by grasping the top cover handle with the right hand.

Support the cartridge with the left hand holding the protection cover.

Lower the top cover handle and push the handle slide to the left with the thumb of the right
hand. Again, raise the handle to its full upright position to release the protection cover.

3-3

Lift the cartridge from the protection cover and carefully seat the cartridge on the spindle with
the top cover handle recess facing the rear of the machine.

Caretully rotate the top cover handle back and forth to ensure that the spindle locating arms are
seated properly within the cartridge housing detent slots.

CAUTION
Use care when seating the cartridge on the drive
spindle. Rough handling of the cartridge may cause

damage to the spindie/cartridge interface which, in
turn, can cause excessive cartridge runout and pos-

itioning errors.
f.

Gently lower the top cover handle to a horizontal position to engage the cartridge on the drive
spindle.

Place the protection cover on top of the cartridge.

Close the drive access cover.

Start the drive as follows.

a.
b.

Press the run/stop switch (LOAD indicator).
When the drive has completed the drive startup sequence and the read/write heads are detented
on cylinder O, the READY indicator on the numbered UNIT SELECT switch will be
illuminated.

3.3.2

If write protection is desired, press the WRITE PROTECT switch.

Cartridge Unloading Procedure
1.

Power down the drive as follows.

Press the run/stop switch and wait approximately 30 seconds for the LOAD indicator to
illuminate.

b.
2.

Raise the drive access cover.

Remove the cartridge as tfollows.

Remove the cartridge protection cover and hold the cover in the left hand.

Push the top cover handle slide to the left with the thumb before raising the handle.

Raise the top cover handle to a full upright position to release the cartridge from the drive
spindle.

Carefully lift the cartridge up and out of the drive and place it in the protection cover.

Lower the top cover handle to the horizontal position to lock the protection cover in place.

3-4

f'\\

—
TO READY DRIVE:

DRIVE INDICATORS:

TO LOAD CARTRIDGE:

LOAD:

RAISE CARTRIDGE ACCESS DOOR

LOAD CARTRIDGE

CLOSE ACCESS DOOR

DEPRESS RUN/STOP SWITCH (LOAD INDICATOR)

AFTER 30 SECONDS, UNIT SELECT INDICATOR
SHOULD LIGHT INDICATING DRIVE IS READY
TO READ OR WRITE

IF WRITE PROTECTION IS DESIRED, DEPRESS
WRITE PROTECT SWITCH (PROTECT INDICATOR)

LIGHTS TO INDICATE THAT CARTRIDGE

SUPPORT CARTRIDGE "A” WITH LEFT HAND

MAY BE LOADED OR THAT SPINDLE IS

HOLDING PROTECTION COVER "B".

STOPPED.
UNIT

SELECT:
INDICATES LOGICAL DRIVE ADDRESS.
WHEN LIT, INDICATES DRIVE IS

READY TO READ, WRITE OR RECEIVE

CONTROLLER COMMANDS.
FAULT:

WHEN LIT, INDICATES A DRIVE

ERROR CONDITION. IF THIS
CONDITION PERSISTS, SEEK
ASSISTANCE.

PUSH HANDLE SLIDE “C” TO LEFT WITH
THUMB OF RIGHT HAND.

RAISE COVER HANDLE “D” TO FULL UPRIGHT
POSITION, RELEASING PROTECTION COVER "“B".
LIFT CARTRIDGE “A” FROM PROTECTION COVER
"B AND CAREFULLY SEAT IT ON DRIVE SPINDLE
WITH HANDLE RECESS FACING REAR OF DRIVE.
CAREFULLY ROTATE TOP COVER HANDLE D"
A FEW DEGREES CLOCKWISE AND COUNTER-

CLOCKWISE TO ENSURE FIRM SEATING.

WRITE
PROTECT:

GENTLY LOWER TOP COVER HANDLE “D"” TO

WHEN LIT, INDICATES THAT

HORIZONTAL POSITION TO ENGAGE CARTRIDGE

CARTRIDGE CURRENTLY MOUNTED

ON DRIVE SPINDLE.

IS WRITE PROTECTED.
PLACE PROTECTION COVER “B” ON TOP OF

CARTRIDGE.

CZ-2032

Figure 3-3

Cartridge Loading Procedure

3-6

3.4

OPERATOR MAINTENANCE

3.4.1

Introduction

User maintenance procedures are limited to the care and cleaning (external) of the disk cartridge, and the
cleaning of the drive spindle assemblies.

3.4.2

Professional Cartridge Cleaning

Cartridges should be professionally cleaned every six months, or whenever practical. Complete cartridge

cleaning procedures must be performed by either qualified DIGITAL Field Service personnel or by a
professional cleaning service. Application of cleaning procedures to the recording surfaces by unqualified
personnel may void not only the warranty on the serviced cartridge, but the warranty for any drive on which the
cartridge is operated.

3.4.3

User Cartridge Cleaning
The user should clean the outer sides of a completely assembled cartridge by using a lint-free wiper, dampened
with a solution of 9 percent water and 91 percent isopropyl alcohol. However, the cartridge must not be
saturated and all excess solvent must be removed with a dry wiper. This procedure is necessary to prevent
solvent from entering the seams of the assembly and contaminating the platter.

CAUTION
For cleaning purposes, use only a solution of 9 percent water with 91 percent isopropyl alcohol.
Water, trichloroethylene, or other solvents are not
permitted.

3.4.4

Spindle Asssembly Cleaning

Using a lint-free wiper, dampened with the 1sopropyl alcohol solution, clean the spindle cone prior to loading
the cartridge. However, do not saturate the assembly; remove all excess solvent with a dry wiper. This
procedure is necessary to prevent solvent from entering a loaded cartridge and contaminating the platter. In

addition, ensure that the shroud is as free of lint and dust as possible before loading a cartridge. Dry lint and dust
may be blown from the spindle area using filtered, dry air. However, do not use plant air that may contain water

or oil; canned air 1s an acceptable substitute.

3.5
CARTRIDGE CARE SUMMARY
The following listing summarizes care and cleaning considerations for the RLOIK/RLO2K Disk Cartridge.
*

Keep cartridges clean.

Use cartridges at computer room temperature only.

Manipulate cartridges by the top cover handle only.

When the protection cover is removed (for loading), do not touch disk surfaces, hub center cone, or
surfaces.

When the protection cover is removed (for loading), interior metal hub surfaces must be clean.

3-7

When the protection cover is removed (for loading), ensure that the disks are not moved or rotated,

since improper disk motion may generate plastic particles which can result in disk damage.

When loading or unloading a drive, insert and remove cartridges gently. In addition, do not use
excessive force when manipulating the top cover handle.

If, during operation, a cartridge makes rumbling or continuous tinging sounds, discontinue use of the
cartridge. Use of a damaged cartridge on other drives may damage the drives, resulting in additional
damage to all other cartridges used in those drives.

Each cartridge should be cleaned professionally every six months and/or whenever a specific cartridge
1S not operating properly

Cartridges are factory-repairable only. Disassembly in the field 1s not permitted, and such action may
void the warranty on a cartridge, as well as any drive on which the cartridge may be operated.

CHAPTER 4

RL11/RLV11 PROGRAMMING INFORMATION

4.1

GENERAL DESCRIPTION

This chapter describes the RL11 and RLVI1 Controllers and points out any differences.
4.1.1

RLI11 Controller Description

The RLI1 Controller consists of
a single hex-height M7762 module. It can be installed in any hex-height

small peripheral controller (SPC) slot. This controller provides a programmable interface between the

PDP-11 UNIBUS and the RLO1/RLO02 Disk Drive(s). The controller has four addressable registers that
are detailed in Paragraph 4.2. The controller can give any one of seven commands to the drive. These
controller commands are explained in detail in Paragraph 4.3.
page 4-2

In addition to the registers and control logic, the RL11 Controller contains a sixteen word silo I/O buffer.
Although the buffer is invisible to the programmer, its capacity is one of the differences between the RL11 and

RLVI1I1. The RLVI11 has a 256 RAM I/O buffer.
4.1.2
The

RLV11 Controller Description
RLV 11 Controller consists of 2 quad-height modules designated M8013 and M8014. This controller

provides a programmable interface between the LSI-11 Q-Bus and the drive(s). Like the RL11, the RLV11

has

four addressable registers that are explained in detail in Paragraph 4.2. The RLV11 can give any one of eight
commands to the drive. The RLV 11 has one command (maintenance command) that the RL11 does not have.

These commands are explained in Paragraph 4.3. The RLV11 has a 256 word RAM first in, first out (FIFO) I/O
buffer while the RL11 has a 16 word silo.

4.2

ADDRESSABLE REGISTERS

There are four addressable registers in the controller that are used to control and monitor the operation within

the controller itself and within the disk drive unit(s). These are described briefly in Table 4-1 and described in
detail in the following text.

4.2.1

Control Status Register

The Control Status (CS) register (Figure 4-1) is a 16-bit register with an address of 774400. Bits 1 through 9 can
be read or written; the other bits can only be read.

When the controller is initialized, bits 1-6 and &-13 are cleared and bit 7 is set. Bit O 1s set whenever the selected
drive 1s in the ready condition; otherwise, the bit is cleared. Bit 14 is set whenever there is a drive error; it is

cleared when the drive error is corrected or the drive error is cleared by a Get Status command. Bit 15 is set
when there 1s a drive or controller error (indicated in bits 10-14).

4-1

Table 4-1

Address|

Type

Controller Addressable Registers

(octal) | (read/write)

| Name/Mnemonic

774400 | R/W

Basic Function

Control Status (CS)

Indicates drive ready condition; decodes drive commands and provides overall control functions and error

indications.

774402 | R/IW

Bus Address (BA)

Indicates memory location involved in data transfer
during a normal read or write operation.

774404 | R/W

Disk Address (DA)

Stores information for: (1) seeking to desired track; or
(2) selecting sectors to be transferred during read/write
operations; or (3) used when requesting a drive status
message.

774406 | R/W

Multipurpose (MP)

(1) Functions as word counter when transferring
read
/ write data between UNIBUS and drives; or (2)

acts as storage buffer when reading drive status; or
(3) stores header information from controller silo
when executing a read header command.

;

CONTROL STATUS REGISTER (CSR)

ERR

DE | NXM | E2

DS1 | DSO |CRDY| |E |BA17|BA16| F2

FO DRDY]

N—

—~—

READ ONLY

——

N~/

READ/WRITE

READ
ONLY
CZ-2009

Figure 4-1

Bit(s)
0

Name

CS Register

Function

Drive Ready

When set, this bit indicates that the selected drive is ready to receive a

(DRDY)

command. The bit is cleared when a seek operation is initiated and set when
the seek operation 1s completed.

1-3

Function Code

These bits are set by software to indicate the command to be executed.
Command execution requires that bit 7 (controller ready) be cleared by

software. A zero bit being transferred into bit 7 of the CSR can be considered
as a Go bit.

4-2

Bit(s)
1-3

Name

Function

Function Code

(Cont)

Octal

Command

Code

No Op (RL11) or

Maint. (RLV11)

0
0
0

0
]
l

]

Write Check
Get Status
Seek

§)

1
]
1

0
]
l

Read Header

Write Data
Read Data
Read Data Without

5
6
7

]
3

Header Check

4-5

Bus Address

The two most significant bus address bits. Read and written as data bits 4 and

Extension Bits

5 of the CS register but considered as address bits 16 and 17 of the bus address

(BA16, BA17)

Interrupt

When this bit is set by software, the controller is allowed to interrupt the

Enable (IE)

processor at the normal command or error termination.

Controller Ready

When cleared by software, this bit indicates that the command in bits 1-3 is to

(CRDY)

be executed. When set, this bit indicates the controller is ready to accept
another command.

8-9

Drive Select

These bits determine which drive will communicate with the controller via the

(DSO, DS1)

drive bus.

Operation

When set, this bit indicates that the current command was not completed

Incomplete (OPI)

within 200 ms.

Data CRC (DCRC)

If OPI (bit 10) is cleared and this bit 1s set, a CRC error has occurred when

or Header CRC

reading the data (DCRC).

(HCRC) or Write

Check (WCE)

If OPI (b1t 10) is set and bit 11 1s also set, the CRC error has occurred on the

header (HCRC).
If OPI (b1t 10) is cleared and bit 11 1s set and the function command was a
write check, a write check error (WCE) has occurred.

NOTE

Cyclic redundancy checking is performed on the first and second header
words, even though the second header word always contains zeros.
Data Late (DLT)

This bit is set during a write when the silo is empty but the word count has not

or Header Not

yet reached zero (meaning that the bus request was ignored for too long). The

Found (HNF)

OPI bit will not be set.
This bit will be set during a read when the silo is full (meaning that the word
being read could not enter the silo and the bus request has been ignored for too
long). The OPI bit will not be set.

4-3

Bit(s)

Function

Name
Data Late (DLT)

When this bit and OPI are both set, a 200 ms timeout occurred while the

or Header Not

controller was searching for the correct sector to read or write (no header

Found (HNF)

compare — HNF).

(Cont)

ERROR SUMMARY
Bits

Error Name

OPI

10
1

Read Data CRC

Write Check

]

Header CRC

Data Late

Header Not Found

Non-Existent

This bit 1s set when the addressed memory does not respond within 10 to 20

Memory (NXM)

microseconds of the beginning of a direct memory access (DMA) data
transfer.

This bit is tied directly to the DE interface line. When set, it indicates that the

Drive Error (DE)

selected drive has flagged an error. (The source of the error can be determined
by executing a Get Status command.)

DE can be cleared by executing a Get Status command with bit 3 of the DA
register set.
15

Composite Error

When set, this bit indicates that one or more ofthe error bits (bits 10-14) 1s set.

(ERR)

If the IE bit (bit 6 of CS) is set and an error occurs (which sets bit 7), an
interrupt will be initiated.

4.2.2

Bus Address Register

The Bus Address (BA) register (Figure 4-2) is a 16-bit register with an address of 774402. Bits 1 through 15 can
be read or written; bit 0 is always zero. Bus address bits 16 and 17 are contained in bits 4 and 5 of the CS register
(see Paragraph 4.2.1).

The BA register indicates the memory location involved in the data transfer during a normal read or write
operation. The contents of the BA register are automatically incremented by two as each word 1s transterred

between the bus and the I/O buffer. This register overflows into CS register bits 4 and 5.
The BA register is cleared by initializing the drive or by loading the register with zeros.
BUS ADDRESS REGISTER (BAR)

BA15|BA14| BA13|BA12|BA11|BA10| BA9 | BA8 | BA7 | BA6 | BA5 | BA4 | BA3 | BA2 | BA1
\_

READ/WRITE
Figure 4-2

BA Register

4-4

01
J

CZ-2035

Bit(s)

Name

Function

0-15

BAQ thru BAIS

These bits point to the UNIBUS address that data 1s to be transferred

to/from (normally a memory address). BAl6 and BA17 arein CSR bits 4
and 9.

4.2.3

Disk Address Register

The Disk Address (DA) register is a 16-bit register with an address of 774404. Its contents can have one ofthree
meanings, depending on the function being performed. This register is cleared by initializing the device or
loading the register with zeros. All 16 bits can be read or written by the processor.

4.2.3.1

DA Register During a Seek Command — To perform a Seek function, it is necessary to provide

cylinder address difference, head select, and head directional information to the selected drive as indicated
(Figure 4-3).

DAR DURING SEEK COMMAND
15

DF8 | DF7 | DF6 DF5 | DF4 | DF3 | DF2 | DF1 DFO

DIR

CZ-2010

Figure 4-3

DAR - Seck Command

Bit(s)

Name

Function

Must be a 1.

Must be a 0.

Direction (DIR)

This bit indicates the direction in which a seek 1s to take place. When the bit 1s
set, the heads move toward the spindle (to a higher cylinder address). When
the bit 1s cleared, the heads move away from the spindle (to a lower cylinder

address). The actual distance moved depends on the cylinder address differ-

ence (bits 7-15).
3

Head Select (HS)

Must be a O.

Indicates which head (disk surface) is selected. A one indicates the lower
head; a zero, the upper head.

5-6

Reserved.

7-15

Cylinder Address
Difterence

Indicates the number of cylinders the heads are to move on a seek.

DF 08:00

4.2.3.2

DA Register During Read or Write Data Command - For a read or write operation, the DA

register is loaded with the address of the first sector to be transferred. As each successive sector is transferred,
the DA register is automatically incremented (Figure 4-4).

4-5

DAR DURING READING OR WRITING DATA COMMANDS
15

CA8 | CA7| CA6 | CA5 | CA4 | cA3 | cA2 | CA1 | CAO

HS | SA5 | SA4 | SA3 | SA2 | SA1 SAO]
CZ-2011

Figure 4-4

Bit(s)
0-5

Read/Write Data Command

Name

Function

Sector Address

Address of one of the 40 sectors on a track.

SA 05:00
6

Head Select (HS)

Indicates which head (disk surface) 1s to be selected. A one indicates the lower
head; a zero, the upper head.

7-15

Cylinder Address

~ Address of the cylinders being accessed. (Range is O through 777, octal)

CA 08:00

4.2.3.3

DA Register During a Get Status Command - For a Get Status command, the DA register bits must

be programmed as follows (Figure 4-5):

DAR DURING GET STATUS COMMAND
15

RST

1 ]
CZ-2037

Figure 4-5

Bit(s)

Name

Function

Must be a 1.

Get Status (GS)

DAR - Get Status Command

Must be a I, indicating to the drive that the status word is being requested. At
the completion of the Get Status command, the drive status word is read into
the controller Multipurpose (MP) register (see Paragraph 4.2.4). With this bit
set, the drive ignores bits 8-15.

Must be a 0.

Reset (RST)

When this bit is set, the drive clears its error register before sending a status
word to the controller.

4-7

Must be a O.

8-15

Not used during a Get Status.

4-6

4.2.4

Multipurpose Register

The multipurpose (MP) register is a 16 bit register with an address of 744406. This register has several different
bit meanings, as explained below.

4.2.4.1 MP Register After a Get Status Command — When a Get Status command (Figure 4-6) is executed
the status word is returned to the controller and transferred to the MP register. The contents of the MP register
are defined as follows.

MPR AFTER GET STATUS COMMAND

15 | 14

fwo&

) 1

wL | sktol spe |wWGe| vc | bse| DT | Hs | co | HO | BH | STC | STB STA]
CZ-2012

Figure 4-6

MPR - Status Word

Bit(s)

Name

Function

0-2

State C:A

These bits define the state of the drive.

ST C:A

Load Cartridge

Spin Up

Brush Cycle

Load Heads

Seek

Lock On

Unload Heads

Spin Down

Brush Home (BH)

Set when the brushes are home.

Heads Out (HO)

Set when the heads are over the disk.

Cover Open (CO)

Set when the drive access cover is open or the dust cover is not in place.

Head Select (HS)

Indicates the currently selected head. A zero indicates the upper head; a one,
the lower head.

7
8

Drive Type (DT)

A zero indicates an RLO1; a one, an RLO2.

Drive Select Error

Set when a multiple drive selection is detected.

(DSE)

Volume Check

(VC)

Set when a cartridge is mounted and spun up. Cleared by execution of a Get

Status command with Bit 3 asserted.

4-7

Bit(s)

Name

Function

Write Gate Error

Set during Write Gate if one or more of the following conditions occur.

(WGE)

Drive is not ‘‘ready to read/write’”

Drive is write protected

Sector pulse is occurring

Drive has another error

Set when spindle has not reached speed in the required time during spin-up or

Spin Error (SPE)

when spindle speed is too high.

Set when the heads do not come on track in the required time during a Seek

Seek Time Out

command or when *‘ready to read/write’’ is lost while the drive is in position

(SKTO)

(lock-on) mode.
Write Lock (WL)

Set when the drive 1s write protected.

Current Head Error

Set if write current is detected in the heads when Write Gate 1s not asserted.

(CHE)

4.2.4.2

Write Data Error

Set if Write Gate is asserted but no transitions are being detected on the Write

(WDE)

Data line.

MP Register After a Read Header Command — When a Read Header command is executed, the

next header will be read and its three words will be stored in the data buffer and transferred to the MP register.
The first word will contain sector address, head select, and cylinder address information. The second word will

contain all zeros. The third word will contain the header CRC information. All three words can be read
sequentially by the program (Figure 4-7).

MPR AFTER READ HEADER COMMAND

CA8 | CA7| CA6 | CA5 | CA4 | CA3 | CA2 | CA1 | CAO| HS | SAB | SA4 | SA3 | SA2 | SA1 SAO]
15

ZEROES

CRC

CZ-2013

Figure 4-7

MPR - Three Header Words

4-8

Bit(s)

Name

Function

0-5

Sector Address

Head Select

7-15

Cylinder Address

4.2.4.3 MP Register During Read/Write Data Commands — Before the reading or writing data, the
program should load the word count into the MP register in two’s complement form. The counter is
incremented as each word is transferred. Usually, the reading or writing operation is terminated when the word
counter reaches zero (overflows). The word counter can keep track of any number of data words, from one to
the full 40-sector count of 5120 data words (decimal) (Figure 4-8).

MPR DURING READ/WRITE COMMANDS FOR WORD COUNT
|

[ 1

WC12|WC11|WC10{ wC9| wcCs | WC7 | WC6 | WC5 | WC4| WC3| WC2 | WC1 WCEI
CZ-2036

Figure 4-8

MPR - Used as a Word Counter

Bit(s)

Name

Function

0-12

Word Count

Contains the two's complement of total number of words to be transferred.

WC 12:00

Must be ones.

13-15

MP Register Programming Note — The RLO1/RL02
Disk Drive will not do spiral read/writes. If data is to
be transferred past the end of the last sector of a
track, it is necessary to break up the operation into
the following steps.

Program the data transfer to terminate at the
1.
end of the last sector of the track.

Program a seek to the next track. This can be

either a head switch to the other surface but same
cylinder or a head switch and move to the next
cylinder.

3.
Program the data transfer to continue at the
start of the first sector at the next track.
4.2.5

Figure 4-9 is a bit and function summary of the CS, BA, DA, and MP registers.

4-9

CONTROL STATUS REGISTER (CSR)
15

ERR | DE |NXM| E2 | E1 | E0 | DS1| pDso|croY| (e |BA17|BA16| F2 | F1 | FO DRD\j
__

——
READ ONLY

N
READ

READ/WRITE

ONLY

CZ-2009

BUS ADDRESS REGISTER (BAR)

BA15|BA14|

BA13|BA12|BA11|BA10|

READ/WRITE

CZ-2035

DAR DURING SEEK COMMAND

o09

o | Hs|

o | or]| o

CZ-2010

DAR DURING READING OR WRITING DATA COMMANDS
5

cas | ca7l cas | cas | caa | caz | caz | ca1 | cao | Hs | SA5 | sA4 | SA3 | SA2 | SA1 SAO]
CZ-2011

Figure 4-9

4-10

DAR DURING GET STATUS COMMAND
15

X | x [ x|

|[RT|

o | 1

1 l

CZ-2037

MPR AFTER GET STATUS COMMAND

[WDE CHE| wL |SKTO| SPE |WGE| vC | DSE| DT | HS | cO | HO | BH | STC | STB ST:]
CZ-2012

MPR AFTER READ HEADER COMMAND

CA8 | CA7 | CA6 | CA5 | CA4 | CA3 | CA2 | CA1|

CAO | HS | SA5 | SA4 | sA3 | SA2 | SA1 | SAO

[
15

ZEROES
14

[

CRC
CZ-2013

MPR DURING READ/WRITE COMMANDS FOR WORD COUNT
15

[wc12|wc11wcio| wee | wes [ we7 [ wee | wes | wea | wea | wez | wel wcgl
CZ-2036

Figure 4-9

4.3

CONTROLLER COMMANDS

The RLI1 Controller can give one of seven commands to the drive, while the RLV11 can issue one of eight

commands. Table 4-2 lists the commands. Each command is explained in the following paragraphs.

Table 4-2

RL11/RLV11 Controller Commands

Function Code

4.3.1

Command

No Op (RLI11) or Maint. (RLVI1)

Write Check

Get Status

Seek

Read Header

Write Data

Read Data

Read Data Without Header Check

No-Op (RL11) or Maintenance (RLV11) — Function Code 0

The RL11 performs no operation aside from clearing errors (except DE), setting CRDY and interrupting if IE is
set.

The RLV 11 maintenance command is used during a diskless diagnostic routine to detect controller malfunc-

tions or to establish a level of confidence in controller operation. Prior to issuing the maintenance command, a
buffer area in memory must be set aside for writing and reading of test patterns. The controller registers must be
loaded by program with the following information.
BAR with address of first memory buffer location
*

WC register with a count of 511 (177001 octal)

DAR with test word
(CSR with a function code 0, reset bit 7

When the RLV11 issues the maintenance command and clears the CRDY bit, the OPI timer 1s started. The
microsequencer decodes the command and starts a maintenance routine. Two internal tests are performed and
the DAR is incremented after each. Then, by enabling a DMA transfer to take place between memory and the
controller FIFO, 256 words are transferred from the memory write test buffer into the FIFO. Once the FIFO 1s
full, 255 words are transferred into the memory read test buffer previously prepared. The DAR is now
incremented a third time. Throughout MAINT, checks are made and if an error occurs, the function stops with
ERR set. The DAR is incremented as the test proceeds. This incrementing serves as a trace to determine the
failing internal test.

Next, the test word + 3 that was initially loaded into the DAR is channeled through the data source selector and
into the CRC circuit. A CRC word is generated from this test word and sent through the data source selector
again. This CRC of the test word then passes through the write precompensation circuit and the data separator

circuit to eventually end up in the FIFO.

The contents of the DAR is then incremented and becomes test word +4. This new test word follows the same
path as the preceeding test word and ends up as the second word in the FIFO. At this point, the FIFO holds:
WORD

FIFO

| st
2nd

3
CRC of test word+
CRC of test word +4

4-12

The contents of the DAR 1s now incremented once again and becomes test word +35.
Next, the second word in the FIFO (CRC of test word +4) 1s removed from the FIFO and serialized. It is sent
through the data source selector, the CRC, and data source selector again, and so on. It follows the same data
path as the two previous words and ends up back in the FIFO as the new second FIFO word. At this point, the
FIFO holds:

WORD

FIFO

I st

CRC of test word +3

2nd

CRC of CRC of test word +4

The contents of the DAR is then incremented for the sixth time to become test word + 6. The controller ready bit

i1s then set and the CPU receives an interrupt request. This completes the maintenance command operation.
As a result of this maintenance test, the following circuits are tested: the FIFO, the registers, the data source
selector, the CRC circuit, the match circuit, the write precompensation circuit, the data separator circuit and the
FIFO input and output serializer. Also, many of the microsequencer functions are exercised.

4.3.2

Write Check — Function Code 1

The write check command is used to verify that data was written on the disk correctly. It is used after writing a

block of data onto the disk by the write command function. The write check command reads this same block of

data from the disk and compares it with the contents of its source data buffer area in main memory. Because this
comparison 1s performed in the controller, this source data must be transferred out of memory and into the

controller silo.

Prior to issuing this command, the BA register must be loaded with the address of the first location of the data
block in the main memory. The word counter register must be loaded with the data block length. The DA
register is then loaded with the starting disk address location. At this point, the write check command can be
loaded into the CS register.

Once a header match 1s found, and the header CRC validates the match, the 128 words of data are read from the
disk. The disk data is then compared serially with the serial data coming out of the silo (SER DATA OUT).

Either a compare error or a data CRC error will set bit 11 in the CS register.

4.3.3

Get Status — Function Code 2

The Get Status command causes the status word from a drive to be transferred to the controller where the
software can access it through the MPR. The software should first verify that the controller is ready to perform
an operation (the drive does not have to be ready). Then, the software should load the DAR with ones in bits 01

and 00, a reset bit at 03 and zeroes in the other locations. Next, the software should load the CSR with drive
select bits, a negative GO bit, IE bit (if desired) and a code of 2 in the function bits. The controller will now
command the selected drive to transfer its status word to the MPR in the controller. If the ‘‘reset’’ bit was set,

the drive would reset its status register first.

4.3.4

Seek — Function Code 3

The Seek operation causes the positioner to move (either forward or reverse) some number of cylinders. The

software should first verify that the drive is ready to accept a command, then load the DAR with the difference
word (difference between the present position and desired position). This word contains the number of
cylinders to move (bits 15 through 07), the head select bit (04) and the direction bit (bit 02, 1=forward,

O=reverse). Bits 06, 05 and 01 must be reset and bit 00 must be set. After the DAR is loaded, the software
should load the CSR with the command word. This word should contain the drive select bits, the negative GO

bit, IE bit if desired and a code of 3 in the function bits. The controller sends the Seek command to the selected

drive, causing the drive to start its Seek operation. At this time, the controller goes ready and interrupts if IE is

set. The controller is now ready to accept another command to perform another operation on another drive while

the Seek is occurring.

4-13

If the difference word is large enough that the heads attempt to move past the innermost or outermost limits, the
head will stop at the guard band and retreat to the first even-numbered data track.
4.3.5

Read Header — Function Code 4

When a Read Header function is decoded, the controller will read the first header encountered on the selected

drive and place the three header words in the silo. They pass through the silo and stop with the first word in the

MP register. The software can then access the first word to determine the current sector, head, and cylinder
address. When the software extracts the first word from the MP register, the second word automatically moves
in to the MP register. If the software extracts the second word, the third word automatically moves in the MP.
This is the CRC word. The software can now access it for checking purposes.

4.3.6

Write Data — Function Code 5
When this function is decoded with CRDY cleared, the controller starts reading successive header words and
comparing them to the DA register. When a match is found, the header CRC 1is checked and, if correct, that
sector is written with the words from memory designated by the BA register. The BA and MP registers (word
count in two’s complement form) are incremented for each word transferred. For partial sector writes, the

remaining sector area is filled with zeros. At the end of the sector, the sector portion of the DA register 1s
incremented. The next sector is written if all the words have not been written. At the end of the transfer, CRDY
is set and an interrupt made if IE is set.
4.3.7

Read Data — Function Code 6

When this function is decoded, the controller begins reading successive header words and comparing them to
the contents of the DA register. When a match is found, the header CRC is checked and, if correct, that sector 1s
read and the words are placed in the memory location designated by the BA register. Both the BA and MP
registers (word count in two’s complement form) are incremented for each word transferred. This operation
continues until the contents of the MP register is all zeros. Data CRC is checked and the DA register 1s
incremented at the end of each sector. If the word count has not overflowed, the next sector is read. Otherwise,
CRDY is set and an interrupt is made if IE is set.
4.3.8

Read Data Without Header Check — Function Code 7

When this function is decoded, the data portion of the sector following the next sector pulse is read and the
words requested are placed in the memory locations designated by the BA register. The BA and MP registers
(word count in two’s complement form) are incremented for each word transferred. The header is neither
compared nor checked for CRC errors. Data CRC is checked at the end of a sector. If the word count has not

overflowed, the next sector is read. Otherwise, CRDY is set and an interrupt is made if IE 1s set.
NOTE

The DA register is not incremented during
multisector transfer.
4.4
4.4.1

OPERATIONAL CONSIDERATIONS
Interrupt

The controller will request an interrupt if the IE bit and the CRDY bit are both set in the CS register. The IE bit 1s
set or reset by the software and reset with the initialize condition. The CRDY bit is set by the hardware upon
completion of a function or upon the setting of an error flag. It is also set by the initialize condition. It is reset by
the software to cause the controller to start a function (negative GO bit). The interrupt vector address is 160. The

normal priority level for the RL11 is BUS REQUEST 5. The RLVI11 Controller uses the one priority level
provided by the LSI-11 processor.

4-14

4.4.2

Seek Operation

The following sequence is an example of performing a seek function.
Issue read header function to drive and wait for interrupt or wait for CRDY.
Check error flag.

NNk

Read the header word from the MP register.
Calculate difference and direction for the seek.
Move difference word to the DA register.

Issue seek function to drive and wait for seek to be completed as indicated by drive ready bit.
Check error flag.

A software system that optimizes positional latency (see Paragraph 1.4) would keep current cylinder and head

select information in core so that Steps I, 2 and 3 would be unnecessary. Also, note that reading the header
gives rotational position as well, so that some rotational optimization is possible.
4.4.3

Overlapped Seeks

Since the controller comes ready and interrupts as soon as a seek is issued, it is possible to issue seeks to
additional drives while the first is seeking. However, no interrupt occurs when the seeks are completed, so the
transfer command should be issued to the drive requiring the shortest seek as soon as all seeks are issued. In this
way, the drive completing its seek first will immediately perform its transfer and interrupt when done.

4.4.4

Data Transfer

Data transfer 1s via DMA facility. Sixteen words of FIFO (silo) buffering are provided for data by the RLI11.
The RLVI11 provides 256 words of FIFO (RAM) buffering and will not start transferring a sector unless the

FIFO has enough space to hold the entire sector.
To do a data transfer, the software should perform the following steps:
*

Load BA register with address of first memory location to be transferred

Load DA register with address of first disk location to be transferred
*

Load WC register with two’s complement of number of words to be transferred

Issue read data or write data and wait for interrupt or test for ready
Check error flag.

Other drives could do seeks or data transfers between the issuing of seek and the issuing of the data transfers.

4.4.5

Recovery of Data with Bad Headers

Function 7, read data without header check, is provided to allow the recovery of data should headers become

unreadable. If constant HNF or HCRC errors are encountered on a particular sector so that the data is not
recoverable by the standard read command, proceed as follows. Perform successive read header commands
until the sector preceding the bad sector is found. Then, within 300 microseconds issue a read data without
header check. The data portion of the next sector will be read without either header compare or header CRC

check. Data CRC errors will be reported.

4.4.6

Non-interchangeability of RLO1K/RL02K Disk Cartridges

These two types of cartridges are not functionally interchangeable but a cartridge will physically fit into the
“‘wrong’’ type of drive. If a cartridge is loaded into the wrong drive, no damage will occur to the drive, media,
or data but the software will not run normally. If such symptoms are exhibited, the operator should check for the

proper cartridge type.

4-15

4.5

ERROR RECOVERY

There are several errors that can be detected and flagged in the RLO1/RLO2 subsystem. Some of them can be
considered recoverable in the sense that if the operation is retried it is possible that the error will not recur and
successful use of the subsystem can continue. Some of the errors are considered fatal because retries could
damage the data, media, or equipment. The errors are listed with the recommended reaction in Table 4-3.
The nature of these errors should be considered when determining how many times to retry the operation before
declaring that retrying has reached a practical limit. For instance, a DLT error could be caused by a hardware

system failure but it could also be the result of bus activity due to other I/O devices exceeding the throughput
capability for a short duration. In this latter care, it is likely that the operation would be successful on the first
retry. The rate of occurrences is a good indicator of overall system performance and an error logging routine
should count that. A general increase in the rate of DLT errors could indicate hardware system failures or it
could indicate that the usage of the system is approaching its throughput capacity in its present configuration.
Another example of applying practical reaction to an error is the handling of a HNF error. It should be retried

once and if it recurs then possibly the head is not positioned over the correct track. If a read header operation 1s
performed and the address from the media is examined, the current cylinder and head can be determined to see if
it is a position problem. If not, then possibly there is a bad spot on the media and another area should be tried. If
there is a bad header, that sector address should be entered into the Bad Sector File and the software should
avoid using the original sector.

As an additional example, consider an NXM error. It indicates that a memory unit is not responding to a DMA
request for data transfer to/from that memory unit. It is unlikely that the media or disk unit is failing and only
slightly more likely that the controller is failing (hardware problem). It is possible that the program is trying to
access a non-existant memory unit (software problem). A retry may be worthwhile for one time but more than
likely it will recur. The most important piece of information needed for diagnosis is the contents of the BA
register.

Each of the errors should be given the same type of practical thought when programming error recovery
routines. Whenever an error occurs, the program should log it along with the symptoms such as the contents of
the registers, the status of the unit, and whether or not a retry was successful. The more complete the error log,
the more quickly and accurately the cause can be diagnosed.
Table 4-3

CONTROLLER

Errors

BIT IN C.S.| RECOMMENDED REACTION

ERROR

OPI

DCRC/HCRC/WCE

DLT/HNF

Retry. If HNF, perform a read header, and verify cylinder.

NXM

Retry once. Be sure to record the contents of the BA register.

Perform a Get Status and check bits listed below.

DRIVE ERROR

Retry some practical number of times.

Retry some practical number of times. Be sure to record contents of the

DA register.

4-16

Table 4-3

BIT IN STATUS

DRIVE
ERROR

Errors (Cont)

RECOMMENDED REACTION

WORD

DSE

Retry once before notifying operator to verify UNIT SELECT plug.

WGE

Retry.

SKTO

Retry. Wait for 1.5 sec after Reset.

CHE

Fatal. Do not retry.

WDE

Fatal. Do not retry.

SPE

4.6 DIFFERENCE SUMMARY (RKO05 and RL0O1/RL02)
This section may be helpful to users who have formerly used DIGITAL’s RKO5 disk cartridge subsystem. It

points out the differences between programming an RKO5 subsystem and programming an RLOI/RLO2
subsystem.

In general, the RKO5 subsystem had a lot of its functionality built into the hardware while the RLO1/RL02
subsystem requires that the software provide some of the functionality. The major differences are explained

below.

4.6.1
Spiral Read/Write or Mid-Transfer Seeks
A spiral read/write is a transfer of data that continues past the end of a track. The RKO05 subsystem provides
hardware support for this by using the hardware to detect the end of track condition and the hardware will cause

a mid-transfer seek to the next track and then restart the read/write operation at sector O of the next track. Note
that this seek is either a head switch from the upper surface to the lower surface of the same cylinder with no
head positioner movement, or a switch from lower surface to upper surface with a positioner movement to the

next cylinder. The RLO1/RLO2 subsystem hardware cannot handle this. If a read/write operation continues past
the 40th sector, the sector counter in the DAR advances to 50 (octal) which is illegal and the OPI error flag is set.
[t is necessary for the software to 1) prevent this from occurring by calculating the remaining area left versus the
amount of data left before the operation or 2) to detect that it has occurred. The software must initiate a separate

seek function and as well as a continuance of the read/write function. Note that a head switch from upper to
lower surface without a positioner movement to the next cylinder is considered a seek in the RLOI/RL02
subsystem. After a head switch, the positioner will seek the center of the new track.

4.6.2

Implicit Seeks Versus Explicit Seeks

The RKO5 subsystem can perform either implicit or explicit seeks. An explicit seek is a software-directed seek

operation. An implicit seek is a seek initiated by the hardware at the beginning of a read/write operation if the
desired cylinder address or head address does not coincide with the present position. The RLOI/RL02
subsystem hardware does not have this capability. The software must ensure that the positioner is over the

desired cylinder and the desired head is selected before starting a read/write operation.
4.6.3

Recalibrate

The RKOS subsystem has a return to zero or recalibrate function which causes the positioner to move to cylinder

0. There is no similar function in the RLO1/RL02 subsystem. An explicit seek to cylinder zero must be
performed. If the current cylinder address is not known and the drive is commanded to seek beyond the outer
guard band, this guard band will be detected and the head will retreat to cylinder zero.

4-17

4.6.4

Bad Sector File

There is a bad sector file feature on each RLO1/RL0O2 Disk Cartridge. Its use is explained in Paragraph 1.6.
There is no standard Bad Sector File used with the RKOS.
4.6.5

Reformatting

The RKOS5 cartridge can be reformatted in the field while the RLO1/RLO2K cartridges cannot. The imbedded
servo information and Bad Sector File greatly reduce the need to reformat the cartridge in the field.
4.6.6 Seek Interrupt

The RKOS will provide two interrupts as the result of a seek operation. The first interrupt occurs as soon as the

controller has caused the drive to start its movement, indicating that the controller is free to handle another

function. The second interrupt occurs when the drive finishes the seek movement. The RLO1/RLO2 subsystem
does not provide the second interrupt. Thus, the software must perform the proper monitoring of the drive to
determine when the seek has been completed.

4-18

CHAPTER 5

RLS8-A PROGRAMMING INFORMATION

5.1

GENERAL DESCRIPTION

The RL8-A Controller consists of a single hex-height M8433 module. It interfaces the PDP-8
OMNIBUS with the RLO1/RL02 Disk Drive bus and contains the control, monitor, and data handling

logic for disk operation. The RL8-A can handle up to four drives via a daisy-chained I/ O cable. A PDP-8
can handle two RL8-A Controllers, providing control for up to eight drives.
The RL8&-A has six addressable registers that are detailed in Section 5.2. The PDP-8 computer

communicates with the controller by accessing these registers using Input Output Transfer (107T)
instructions which have a format of 6XXX. The device codes X60X and X61X are assigned to the first
controller. If there is a second controller it uses device codes X62X and X63X. The specific instructions
that cause a response in a controller are shown in Table 5-1. The instructions are used to monitor and
control the controller and are not used to transfer data. Data is transferred using Direct Memory Access

(DMA) operation via data break cycles onthe OMNIBUS. The result is an exchange of data between the
controller and memory directly, one 12-bit word at a time. The controller has a silo which can buffer up

to 16 words. The controller can transfer 12-bit words to the disk as 12-bit words or can transform them

into 8-bit bytes by dropping the high order four bits in each word. The controller can transfer data

coming from the disk onto the OMNIBUS as 12-bit words or it can group the data as 8-bit bytes and fill
in the remaining four bits as zeros. The advantages and disadvantages of both the 8-bit and 12-bit mode
are covered in Paragraph 5.4.

Table 5-1

RLS-A Instruction Set

OCTAL CODE *

MNEMONIC

FUNCTION

6600

RLDC

Clear controller, all registers,. AC and flags. (Do not use to

6601

RLSD

Skip on function done. Then clear if set to a one.

6602

RLMA

Load break MA register from AC 0:11

6603

RLCA

Load command register A from AC 0:11

6604

RLCB

Load command register B from AC 0:11, execute command

6605

RLSA

Load sector address register from AC 0:5

6607

RLWC

Load word count register from AC 0:11

6610

RRER

Read error register into AC O, 1, 2, 10, 11

terminate a disk function.)

5-1

5.2.2

Command Register B

Command Register B 1s a 12-bit register that contains the mode, drive number, extended memory address bits,
interrupt enable, and the function code. The RLCB command (6604) is used to load the register and the RRCB
command (6613) reads the register. The RLCB command also executes the function (Figure 5-3).
09

LRES MAIN |MODE| IE MSB | LSB |EMAO | EMA1| EMA2| FC

FA ]

DRIVE SELECT
CZ-2018

Figure 5-3

Command Register B

Bit

Name

Function

ACO

Reserved

ACI

Maintenance

The contents of the Disk Address (DA) register are looped back to the
silo for maintenance purposes. Bit 2 of command register B must also be
set for this function to work correctly. See Paragraph 5.3.9.

AC2

Mode

When set, this bit indicates that the data field will be 256 8-bit words per
sector. When zero, the data field will be truncated to 170 12-bit words
per sector. This bit must be set when a Maintenance, a Get Status or a
Read Header command is to be executed.

AC3

Interrupt Enable
(IE)

When this bit is set, the controller is allowed to interrupt the processor at
the conclusion of a normal command or error termination.

AC4:5

Drive Select

These bits determine which drive will communicate with the controller

(DSO, DS1)

via the drive bus.

AC6:8

Extended Memory
Addressed (EMA)

These three bits define the memory field location. This allows up to 32K
memory locations to be addressed on processors having more than 4K of
memory.
'

AC9:11

Function Code

These bits indicate the command to be executed by the controller/disk
subsystem.

Bit 9

Bit 10

Bit 11

Command

§)
§)

0
0

0
]

Reset

Get Status

0
]
]
1
]

]
0
§)
]
]

]
§)

Seek
Read Header
Write Data
Read Data
Read Data Without

]
0
]

Maintenance

Header Check

5-4

5.2.3

Break Memory Address Register

The Break Memory Address (BRK MA) register is a 12-bit register that points to a memory location. It 1s loaded
by the RLMA command (6602). The contents of the BRK MA register are automatically incremented as each
word 1s transferred between memory and controller.
The register is cleared by initializing the controller or by loading the register with zeros (Figure 5-4).

[BMOO BMO01|BMO02|BM03|{BM04 |BMO05 |BM 06 |[BM 07 |[BMO08 |[BM 09 |[BM 10 BM1T]
CZ-2019

Figure 5-4

5.2.4

Break Memory Address Register

Word Count Register

The Word Count (WC) register is a 12-bit register loaded by the RLWC command (6607) and read by the
RRWC command (6611). Betore reading or writing data, the word counter is loaded with the two’s comple-

ment of the number of words to be transferred. As each Direct Memory Address (DMA) transfer takes place,
the word counter is incremented and terminates the command on overflow. It can count from 1 to 4096 data
words. This corresponds to 24 sectors while in 12-bit word mode. In the 8-bit byte mode the transfer is limited

to one sector (170 bytes) (Figure 5-5).

WC Register Programming Note — this disk drive
will not do spiral Read/Writes. The program must
break up a data transfer if track-to-track Read/
Writes are to be done. Between two such data
transfers, a seek to the next track or surface must be
made.

WC 00| WC 01| WC 02{WC 03| WC 04|WC 05|WC 06{WC 07| WC 08{WC 09| WC 10 WC11]
CZ-2020

Figure 5-5

5.2.5

Word Count Register

Sector Address Register

The Sector Address (SA) register is a 6-bit register loaded by an RLSA command (6605) and read by an RRSA
command (6614). Before executing a Read or Write operation, the sector address is loaded into the SA register
(Figure 5-6).

5-5

[;xoo SA01|SA02{SA03|SA04|SA05
CZ-2021

Figure 5-6

5.2.6

Sector Address Register

Error Register

The Error register is a 5-bit register that is read by the RRER command (6610). Bits 0:2 are cleared by initialize

or when Command Register B is loaded (Figure 5-7).

DCRC| OFPI DLT
HCRC
b

NOT DEFINED

DE DRDY]

HNF

————

See———

CZ-2022

Figure 5-7

Bit

Name

ACO

Data CRC (DRCR)

Function
If OPI is cleared and this bit 1s set, the CRC error occurred in the data

(DCRC). If OPI is set and this bit is also set, the CRC error occurred on

ACI

Error Register

Header CRC (HCRC)

the header (HCRC).

Operation

When set, this bit indicates that the current command was not completed

Incomplete (OPI)

within 200 ms. It is also used in conjunction with bits O and 2 of this
register.

AC2

Data

Late

(DLT)

Header Not Found (HNF)

This bit 1s set during a write if the silo 1s empty and the word count is not

yet zero (meaning that no word was available for writing). OPI will not
be set.

This bit is set during a read 1f the silo is full and the word count is not yet

zero (meaning that the word being read could not enter the silo). OPI will
not be set.

When this bit and OPI are both set, then a 200 ms timeout occurred while

the controller was searching for the correct sector to read or write (no
header compare — HNF).

5-6

Bit

Name

Function

ACO:2

Error Code

Summary
Error

ACI0

Drive Error (DE)

Bits
01

DLT

OPI

HNF

DCRC

HCRC

This bit is tied directly to the Drive Error interface line. When set, it

indicates that the selected drive has flagged an error. The source of the
error can be determined by a Get Status.

The DE bit is cleared with a Reset command to the drive.

ACI11

Drive Ready (DRDY)

When set, this bit indicates that the selected drive is ready to receive a
command. The bit is cleared when a Seek operation is initiated and set
again when the Seek operation is completed.

5.2.7 Silo Data Buffer
The RRSI command (6615) is used to transfer the contents of the silo data buffer to the AC. The silo does the
following:

Stores the result of the Get Status command from the drive (drive errors and status bits)

Stores the header words when a Read Header command is executed

Stores the result of a Maintenance command

Stores the contents of the DA register if the maintenance bit was set in Command Register B

5.2.7.1

Silo Register After a Get Status Command — When a Get Status command is executed and a status

word is returned to the controller, the contents of the silo register appear as shown in Figures 5-8 and 5-9.

NOT DEFINED

HS | CO

HO | BH | STC | STB STA]

WORD 1
CZ-2023

Figure 5-8

Silo Buffer for Status Word 1

5-7

WORD 1
Bit

Name

Function

ACO:3

Undefined

AC4

Drive Type

ACS

Head Select (HS)

A zero indicates an RLO1; a one, an RLO2.

Indicates currently selected head. A zero indicates the upper head; a one,

the lower head.
AC6

Cover Open (CO)

AC7

Heads Out (HO)

Set when the drive access cover is open or the dust cover is not in place.
A one indicates that the heads are over the disk; a zero indicates that the
heads are home.

ACS

Brush Home (BH)

Set when the brushes are home.

ACO:11

State Bits

These bits define the state of the disk drive.

State Bit Definitions

- 00

NOT DEFINED

Bit C

Bit B

Bit A

Definition
Load State

Spin-up

Brush Cycle
Load Heads

]

Seek (Track Counting)

Lock-on (keeping on track)

Unload Heads

]

Spin-down

WDE| CHE | WL | STO | SPE |WGE| VC DSEJ

WORD 2
CZ-2024

Figure 5-9

Silo Buffer for Status Word 2

WORD 2
Bit(s)

Name

ACO:3

Undefined

AC4

Write Data Error (WDE)

Function

This bit is set when the write gate 1s on but no transitions were detected

on the write data line.

5-8

Bit(s)

Name

Function

ACS

Current Head Error

This bit is set when write current is detected in the heads but the write

(CHE)

gate was not asserted.

Write Lock (WL)

Set when the drive 1s write protected.

Seek Time Out Error

Set when the heads did not come on track in the required time during a

AC6
AC7

(SKTO)

seek operation, or when the heads drifted off track and did not return
within 1.5 seconds.

ACS

Spin Error (SPE)

Set when the spindle does not come up to speed within 40 seconds or
when the spindle speed is too high.

AC9

Write Gate Error (WGE)

Set if write gate is asserted and one or more of the following conditions is

true.

Drive is not ‘‘Ready to Read/Write”’
Drive 1s write-protected
Drive is in the midst of sector time

Drive has another error asserted

ACI0

Volume Check (VC)

ACI11

Drive Select Error (DSE) Set when one or more drives have the same number (unit select plug) or

Set when a new cartridge has been loaded or when the power has been
cycled down, then up. This bit is reset by a Reset command.

have responded to the same number.

5.2.7.2

Silo Data Buffer During a Read Header Command — When a Read Header command is executed,
six 8-bit bytes are stored in the silo as six 12-bit words. The first two header words contain sector address, head

select, and cylinder address information. The second two words contain all zeros. The last two words contain
the header CRC information. All six words are readable by the RRSI command (6615) (Figure 5-10).

5.2.8

Figure 5-11 is a bit and function summary of the addressable registers.

5-9

NOT DEFINED

WORD 2

CYLINDER
ADDRESS

LSB | HS | MSB

WORD 1

SECTOR ADDRESS

MSB

J
CYLINDER ADDRESS

NOT DEFINED

0 J

WORD 3

NOT DEFINED
WORD 4

NOT DEFINED
WORD 5

LSB J
_

)
HEADER CRC

NOT DEFINED
WORD 6

MSB
—o

—

)

HEADER CRC
CZ-2025

Figure 5-10

Silo Buffer for Header Words

5-10

[DIR

MSB

1:]___

LSB]

CYLINDER DIFFERENCE
CZ-2016

MSB

LSB]

CYLINDER ADDRESS
Cz-2017

leS MAIN |MODE IE MSB LSB |EMAO| EMA1{ EMA2| FC

FA J

DRIVE SELECT
CZ-2018

EAOO BMO01|BMO02 |BM03|BMO04 |BMO05 |[BM 06 |[BM 07 |[BM08 |BM 09 |BM 10 BM11]
CZ-2019

EVC 00| WCO1]WC02|{WC 03|WC04|WC 05|WC 06{WC 07| WC 08|WC 09| WC 10|WC 11]
CZ-2020

Figure 5-11

(Sheet 1 of 3)

[SAOO SA01|SA02|SA03|SA04 SAOS]
CZ-2021

DCRC| OPI DLT

NOT DEFINED

HCRC

HNF

oy esennsse

DE DRDYJ

CZ-2022

NOT DEFINED

CcO

BH | STC | STB STA]

WORD 1

|
CZ-2023

- 00

[

NOT DEFINED

WDE| CHE | WL | STO | SPE |WGE| VC DSE]
WORD 2
CZ-2024

Figure 5-11

5-12

- 00

[

NOT DEFINED

WORD 1

l—— NOT DEFINED
WORD 2

\/./

LSB

LSB | HS | MSB
—

CYLINDER
ADDRESS

SECTOR ADDRESS

MSB
J

—
CYLINDER ADDRESS

[—

NOT DEFINED

WORD 3

NOT DEFINED
WORD 4

NOT DEFINED
WORD 5

LSB
\—

—

HEADER CRC

NOT DEFINED

MSB

WORD 6

—

)

HEADER CRC
CZ-2025

Figure 5-11

5-13

5.3

CONTROLLER COMMANDS

The RL8-A Controller is capable of performing eight operations by responding to the function code in the low
order three bits of Command Register B. In many cases it is necessary to load other registers prior to loading the
function code into Command Register B. No registers should be loaded unless the controller is ready. This
condition can be checked by using an appropriate IOT instruction that checks the function done status or by

using the interrupt mode.

5.3.1

Maintenance Command

This command tests the controller by causing it to perform the following tasks.
*

The controller requests a data word from memory via the OMNIBUS using the Break
Memory Address (BRK MA) register as an

address. When the controller receives this

word, the BRK MA and the Word Count (WC) register are both incremented.
*

The data word 1s bubbled through the silo, serialized and transferred (in 8-bit mode)

through the CRC-generating logic where two more 8-bit bytes are appended. This 24-bit

data stream goes through the write data precompensation logic and then is looped back
and brought in as if it were read data from the drive. The data passes through the
phase-locked loop and data separator logic and into the silo where it is converted back to

parallel, eight bits per word, and bubbles up through the silo to be available to the
OMNIBUS.

The controller requests three memory accesses and transfers the three words back to memory using the
BRK MA register as a pointer. The BRK MA register and WC register are incremented for each

transfer. The words are now available for the program to check for diagnostic purposes.

The above processes repeat and the cycle continues until the WC register equals zero.

Prior to starting this command it is necessary to set up some registers as shown below.

The BRK MA register should be loaded with the address ofthe first word of data to be transferred to the
controller. The next three words of memory will receive three words of data from the controller.

The WC register should be loaded with the desired count (in two's complement form). A complete
cycle takes four counts.

The Command Register B should be loaded with 10X0 or 14X0. This sets the mode bit to indicate 8-bit

mode. The maintenance bit is a zero. The function code is 000. The remaining bits are irrelevant.
5.3.2

Reset Command

This command is used to reset all of the error bits in the selected drive unit. It does not reset any conditions in the
controller nor does it cause any head movement in the drive. Prior to executing this command, the Sector
Address Register and Command Register

5.3.3

A must be cleared by using appropriate 10T instructions.

Get Status Command

The Get Status command reads the 16-bit status word from the selected drive and transfers it into two 8-bit bytes
In two consecutive words in the silo. The computer can then extract them with two IOT RRSI instructions. The

format of the bits are shown in Paragraph 5.2.7.1 Prior to performing a Get Status command it is necessary to

clear both the Sector Address Register and Command Register A. When Command Register B 1s loaded with

the function code the appropriate drive select bits should be set, the interrupt enable bit should be set if desired,
and the mode bit must be set for 8-bit mode. The controller should be ready before performing any ofthese load
register operations but the drive does not have to be ready.

5-14

5.3.4

Seek Command

The Seek command 1s used to move the heads (on the selected drive) or to select the other head. Prior to
executing the seek command the Sector Address Register should be cleared and Command Register A should be
loaded with a direction bit, a head select bit, and cylinder difference word. Command Register B is then loaded
with the drive select bits and the seek function code. The controller will send a command to the selected drive to

cause 1t to start a seek operation. The controller will become ready and can then perform another command even
though the drive is still seeking.
If the drive attempts to move the head past the innermost or outermost tracks, the head will retreat from the

guard band and stop at the first even-numbered track it encounters.

5.3.5

Read Header Command

The Read Header command will read the first header encountered on the selected drive and load the header into

six consecutive word locations in the silo, one 8-bit byte per word. The computer can then extract this
information with IOT RRSI instructions. The format ofthe information is shown in Paragraph 5.2.7.2. A check
1s performed on the header that is read.

5.3.6

Write Data Command

The Write Data command requests data from memory, one word at a time, via the Omnibus using the DMA
mode. It then transfers the data through the controller silo buffer to the selected drive. The data is written at the

specified sector data area. This operation continues, incrementing both the Break Memory Address register and
the Word Count register once for each Omnibus transfer, until the Word Count register reaches zero.
Prior to starting this command it 1s necessary to position the head over the desired track using a Seek command.
Then the registers should be loaded as follows.
*

Loadthe Break Memory Address register with the address ofthe first memory word to be transferred.

Load the Sector Address register with the address of the first sector to be written.

Load the Word Counter register with the two’s complement ot the number of words to be transterred.

Load the Command Register A with the head select bit and the cylinder address word.

Load the Command Register B with a mode bit (8-bit or 12-bit mode), interrupt enable bit (optional),
drive select bits, extended memory address bits, and the Write Data function code.

The Write Data command will then read headers and perform header checks until the desired header is located.

After the header 1s checked, the data is transferred. The header check includes a header CRC check. There is no
implicit seek performed so if the selected head is not positioned over the desired track, the desired header will

not be found and an OP1 error will occur. If only a partial sector is written, the remainder of the sector is written
with all zeros.

A CRC word (16 bits) is generated and written for each sector automatically. Since the word

count 1s limited to 4096 this means that the maximum amount of data that can be written with one Write Data
command 1s 16 sectors in 8-bit mode. If 12 bit mode is used, a maximum of 170 words (one sector) can be

transferred. The hardware will not perform a spiral (mid-transfer) seek. Therefore, if data must be written that
would overflow to the next track, it is necessary to write the data to the end of the track, seek to the next track
and then continue to write the remainder of the data.

5-15

- 5.3.7

Read Data Command
The Read Data Command will cause the controller to read data from the selected drive. It will read from the
track that is currently under the selected head, starting at the specified sector. The data is transferred through the
controller silo buffer. The controller requests DMA transfers to memory via the Omnibus. The Break Memory

Address register is incremented once for each 12-bit word transferred over the Omnibus and the Word Count
register is counted up. When the Word Count register reaches zero the Read Data command is terminated. Prior

to starting the Read Data command, the head should be positioned over the desired track with a Seek command.
Load the registers as follows.

Load the Break Memory Address register with the address of the first location in memory to which the
data is to be transferred.

Load the Sector Address register with the address of the first sector from which the data is to be read.

Load the Word Counter register with the two’s complement of the number of words of data to be read.

Load the Command Register A with a head select bit and a cylinder address word.

Load the Command Register B with a mode bit and interrupt enable bit (optional) drive select bits,
extended memory address bits, and the function code for Read Data.

The Read Data command then reads headers, comparing them to the desired disk address. The data transfer
begins when the desired header is found. The header checks include header CRC checks. There is no implicit
seek so if the selected head is not over the desired track, the desired header will not be found and an OPI error
will occur.

The RLS8-A cannot perform a spiral (mid-transfer) seek. If a block of data to be read passes the end of a track and
continues on the other surface or on the next cylinder, it is necessary to program a Read Data just to the end of
the track. The drive must then Seek to the next track and then continue reading data.

A CRC check is performed on each sector during a Read Data operation.
5.3.8

Read Data Without Header Check Command

This command is the same as a Read Data command except that no header check is performed. The next header
read is considered a match so that sector is the first sector read. Since no header check takes place, the header
CRC is not performed.

5.3.9

Maintenance Bit

The maintenance bit in Command Register B enables a path for the serial information leaving the DA register.
When this bit is set, the data that is going out to the drive is looped back and shifted into the silo. The data
bubbles through the silo and becomes accessible (as two 8-bit bytes) to IOT RRSI instructions. The program
can then monitor the operation of the DA register, which is not a directly addressable register. This feature must
be used only with Reset, Get Status, and Seek commands. Because the DA register is a 16-bit register, the 8-bit
mode bit should be set. This insures that the contents of the DA register fit into two 8-bit bytes. The contents of
the DA register and the two silo words are illustrated in Figure 5-12. During the loading of DA register (which
occurs on every command) there is more than one input to some of the bit positions. These inputs are ORed
together. Normally, the Sector Address Register is cleared before any Reset, Get Status, or Seek command and
Control Register A is cleared before any Reset or Get Status command. It is possible to test all the bits in the DA
register by using selected patterns in Control Register A and the Sector Address Register.

5-16

LOADING
OF DAR

RESET
GET STATUS

£~ MARKER
OR)

SEEK

GET STATUS

SEEK

AND

DIRECTION

RESET

SEEK

HEAD SELECT

AND

)

456

910

1112 13
!

14 15| DAR

o 1

2 3 4

5]sAR

|01234567891011CAR

TRANSFER OF DAR TO SILO

SILO 2ND WORD

01234567891
11]

SILO 1ST WORD

[0123

1234567

4567389

10011]

1011121314 15|DAR
CZ-2026

Figure 5-12

Maintenance Mode Bit

5-17

5.4

OPERATIONAL CONSIDERATIONS

5.4.1

8-Bit Mode Versus 12-Bit Mode

The disk cartridge is formatted in 8-bit bytes. For instance, the header contains a 16-bit word address, another
16-bit word, then a 16-bit header. The data area i1s 256 8-bit bytes and the data area CRC is 16 bits. None of
these areas are evenly divisible by 12, which is the PDP-8 word length. Therefore, the RL8-A Controller has the

capability of operating in either 8-bit mode or 12-bit mode.
When reading in 8-bit mode, the serial data from the disk is broken into 8-bit bytes and put into the silo with
eight bits per word. Since the silo is 12 bits wide, the data goes into the eight low order bit positions and zeros

are put into the remaining four high order bit positions. That is the format used when the computer transfers a
12-bit word from the silo to the CPU accumulator or to memory. The 8-bit mode is necessary when performing
a Read Header, Get Status, or Maintenance command where 16 bits of data are read. Otherwise, information
would be lost.

The 8-bit mode can be used for data on the disk. In such a case, 256 8-bit bytes are read from each sector and

transferred to memory as 8-bit words. In some cases, this may be an advantage. For example, if 8-bit ASCII

data is being handled the 8-bit mode is preferable to 12-bit mode. In most cases, however, the 8-bit mode wastes
33% of the memory space. Because the 12-bit mode uses 12-bit words it uses less memory. In the 12-bit mode
each sector contains 170 words with only 8 wasted bits at the end of each sector.
In the 12-bit mode, the RL&-A Controller hardware blocks data into 170 words per sector. The operating system

for the PDP-8 uses only 128 words per sector, so that while memory is used more efficiently, some disk space is
wasted.

5.4.2 Interrupt
The RL8-A will interrupt the processor if the Interrupt Enable bit is set and the controller 1s done. If an error
occurs during an operation the done condition is set.

5.4.3 Seek Operation
If the program does not keep track of the current position of the head (cylinder and surface), and it is desired to
read or write from a particular area from the disk, it is necessary to:

«
«
5.4.4

Read Header to obtain the current position of the head
Calculate the difference (if any) from the desired position
Issue a Seek with the proper difference, direction and head select information.

Overlapped Seeks

Since a Seek operation does not involve data transfer, it is possible to have one drive seeking while another is
transferring data. Only one drive at a time can transfer data but up to four drives can be seeking simultaneously.
5.4.5 Recovery of Data with Bad Headers
Function 7, Read Data Without Header Check, allows the recovery of data with unreadable headers. If HNF or
HCRC errors are repeatedly encountered on a particular sector, and the data is not recoverable by the standard

read command, proceed as follows. Read successive headers until the sector preceding the bad sector is found.
Then, within 300 microseconds, issue a Read Data Without Header Check. The data portion of the next sector
will be read without either header compare or header CRC check. Data CRC errors will be reported.

5-18

5.4.6

Non-interchangeability of Disk Cartridges

5.4.6.1

RLO1K/RLO2K - These two types of cartridges are physically interchangeable but not functionally

interchangeable. If a cartridge is installed on the incorrect type of drive, no physical damage will take place and

data will not be destroyed. However, the unit will not operate in a normal manner. The symptoms exhibited
depend upon the program running at the time. If the system is exhibiting abnormal characteristics the operator
should ensure each drive contains the correct type of cartridge.

5.4.6.2

RLS8-A/RL11/RLV11 - RLOIK cartridges are interchangeable with other RLOIK cartridges as-

suming that the RL8-A has written the cartridges in 8-bit mode. RLO2K cartridges are interchangeable with

other RLO2K cartridges under the same condition.

5.4.7 Use of Two RL8-A Controllers
A PDP-8 system can be configured with two RL8-A Controllers to increase the capacity of the system up to
eight drives. However, if both controllers are trying to perform data transfers at the same time, the throughput
capacity of the Omnibus may be exceeded. In this case, conflicts (DLT’s) will occur.

5.5

ERROR RECOVERY

There are several errors that can be detected and flagged in the RLOI/RLO2 subsystem. Some of them are
considered recoverable. In this case, if the operation is retried it 1s possible that the error will not recur and use
of the subsystem can continue. Some of the errors are considered fatal, however, because retries may cause

damage to the data, media, or equipment. The errors are listed with the recommend reaction in Table 5-3.
Table 5-3

Errors

Controller Errors

Recommended Reaction

OPI

Retry some practical number of times.

DCRC/HCRC
DLT/HNF

Retry. Be sure to record the contents of the DA register.
Retry. If an NHF error, perform a Read Header and verify cylinder.

Drive Error

Perform a Get Status and check the bits listed below.

Drive Errors

Recommended Reaction

DSE

Retry once before notifying operator to verify UNIT SELECT plug.

WGE

Retry.

SPE

Retry.

SKTO

Retry.Wait for 1.5 sec after Reset.

CHE

Fatal. Do not retry.

WDE

Fatal. Do not retry.

The nature of these errors should be considered when determining how many times to retry the operation. For

instance, a DLT error could be a hardware system failure but it could also be the result of bus activity due to

other I/O devices exceeding the throughput capability. In the latter case, it is likely that the operation would be
successtul on the first retry. The rate of occurrences is a good indicator of overall system performance and an
error logging routine should count the rate at which errors occur. A general increase in the rate of DLT errors

could indicate that system usage is approaching its throughput capacity in its present configuration.

Another example of applying practical reaction to an error is the handling of an HNF error. It should be retried
once. It 1t recurs, then the head may not be positioned over the correct track. If a Read Header operation is

performed and the address from the media is examined, the current cylinder and head can be determined to see if

it s a position problem. If not, then possibly there is a bad spot on the media. If there is a bad header, that sector
address should be entered into the Bad Sector File and the software should avoid using the original sector.
5-19

Whenever an error occurs, the program should log it along with the contents of the registers, the status of the
unit, and whether or not a retry was successful. The more complete the error log, the easier it is to diagnose the

cause of errors.

5.6

DIFFERENCE SUMMARY (RK05 AND RL01/RL02)

This section may be helpful to users who have used DIGITAL’s RKOS5 disk cartridge subsystem. It points out

the differences between programming the RK05 subsystem and programming the RLOI/RL02 subsystem.
In general, the RKOS subsystem provides more hardware support of functions while the RLO1/RLO02 subsystem
requires that the software provide some of the functionality. The major differences are explained below.

5.6.1 Spiral Read/Write or Mid-Transfer Seeks
A spiral read/write is a transfer of data that continues past the end of a track. The RK05 subsystem provides
hardware support for this by using the hardware to detect the end of track condition. The hardware will cause a

mid-transfer seek to the next track and then restart the read/write operation at sector O of the next track. Note that
this seek 1s either a head switch from the upper surface to the lower surface on the same cylinder with no head
positioner movement, or a switch from lower surface to upper surface with a positioner movement to the next

cylinder. The RLO1/RLO2 subsystem hardware cannot handle this. If a read/write operation continues past the
40th sector, the sector counter in the DA register advances to 50 (octal) which is illegal and therefore sets the

OPI error flag. It is necessary for the software to 1) prevent this from occurring by calculating the remaining
area left versus the amount of data left before the operation or 2) to detect that it has occurred. The software must

initiate a separate seek function and initiate a continuance of the read/write function. A head switch from the
upper to the lower surface without a positioner movement is considered a seek in the RLO1/RLO2 subsystem.
After a head switch, the positioner will seek the center of the new track.

5.6.2

Implicit Seeks Versus Explicit Seeks

The RKO05 subsystem can perform either implicit or explicit seeks. An explicit seek 1s a software directed seek

operation. An implicit seek is a seek initiated by the hardware at the beginning of a read/write operation if the
desired position is different from the present position. The RLO1/RL02 subsystem cannot do an implicit seek.
The software must ensure that the positioner is over the desired cylinder and that the desired head is selected
before starting a read/write operation.
5.6.3 Recalibrate
The RKOS5 subsystem has a return to zero or recalibrate function which causes the positioner to move to cylinder

0. There is no similar function in the RLOI/RLO2 subsystem. An explicit seek to cylinder zero must be
performed. If the current cylinder address 1s not known and the drive 1s commanded to seek beyond the outer

guard band, this guard band will be detected and the head will retreat to cylinder zero.

5.6.4

Bad Sector File

There is a bad sector file feature on each RLO1/RLO2 disk cartridge. Its use is explained in Paragraph 1.6. There
is no standard Bad Sector File used with the RKO0S.

5.6.5

Reformatting

5.6.6

Seek Interrupt

The RKO5 cartridge can be reformatted in the field while the RLO1K/RLO2K cartridges cannot. The imbedded
servo information and Bad Sector File features greatly reduce the need to reformat in the field.

The RKO5 will provide two interrupts as the result of a seek operation. The first interrupt occurs as soon as the
controller has caused the drive to start its movement, indicating that the controller is free to handle another

function. The second interrupt occurs when the drive finishes the seek movement. The RLO1/RL0O2 subsystem

does not provide the second interrupt. Thus, the software must perform the proper monitoring of the drive to
determine when the seek has been completed.

5-20

APPENDIX A

RL11 CONFIGURATION AND INSTALLATION CONSIDERATIONS
A.1

SPC CONSIDERATIONS

The RL111sasmall peripheral controller (SPC) but does not unconditionally fit into any SPC slot. Early

SPCs were always quad height modules or combinations of smaller (single or dual) modules that
involved only four rows. Thus, the standard pin assignments appolied only to rows C, D, Eand Fona
hex-height backplane. Many new options, such as the RLI11, are hex-height modules and therefore
require that rows A and B be vacant since some SPC slots use rows A and Bfor UNIBUS cables or power
connectors. Some hex-height options require standard UNIBUS pinning on rows A and B and some

require modified UNIBUS device (MUD) pinning. In the case of the RL 11, the only connections used on
rows A and B are the + 5v and ground. Thus, these rows can be either standard UNIBUS or MUD
pinning.

The early SPCs did not utilize Direct Memory Access (DMA) data transfers to/from memory and therefore
those signals were not part of the original SPC pin assignments. Some of the newer options, such as the RL11,
do utilize DMA transfers. There is a new pin assignment called SPC PRIME that includes these signals. If the

RL11 isto be used in an older (non SPC-PRIME) slot then it is necessary to ensure that the following signals are
wired on the backpane.
Pin CA1 — NPG In

Pin CB1 — NPG Out
Pin FJ1 — NPR
Pin CV1 — AC LO

Pin CUIl — +15v
If the slot has SPC PRIME pinning then another precaution must be taken. NPG continuity is maintained across
an empty SPC PRIME slot by a backplane jumper from pin CAl to pin CB1. This jumper must be removed
whenever a DMA-type option is installed, such as an RL11, and the jumper must be added if the module is

removed. This consideration is in addition to the normal Bus Grant Continuity card used in row D of all empty

SPC slots.
A.2

SPC CONSIDERATIONS

When configuring a UNIBUS system for the best priority assignments, two characteristics of a peri-

pheral option must be taken into consideration. These are the peak word transfer rate and the T1 time
(T1 time 1s a function of the peak transfer rate and the silo size). The RL11 has a peak transfer rate of 256
kHz (3.9 microseconds/word) and a T1 time of 62.4 microseconds. This dictates its position in the

priority scheme. The recommended priority scheme is listed below.

CPU
Memory

RK11/RK05
TMI11/TU10

TC11/TU56

RL11/RLO1-RLO2
RJSO4

RMO02
RJPO4

RK611/RK06-RKO07
RP11C/RPO3
RJSO3
TJU16

RF11/RS11
DBI11

A-1

Other general configuration rules are:

On a PDP-11 UNIBUS, a combination of two disk subsystems and a tape or floppy disk

subsystem 1s considered maximum.
Ona PDP-11/70 system, one UNIBUS disk subsystem is considered maximum if there are

A disk subsystem should not be installed beyond a bus expander.

MASSBUS disks.

A-2

RLOI/RL0O2 DISK SUBSYSTEM

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