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EK-RL012-TM-PRE
2000
314 pages
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Document:
RL01/RL02 Disk Drive Technical Manual
Order Number:
EK-RL012-TM
Revision:
PRE
Pages:
314
Original Filename:
OCR Text
RLO1 / RL0O2 Technical DISK DRIVE Manual dlilgliltlall EK-RL@12-TM-PRE (PRELIMINARY) RLO1/RLB2 DISK DRIVE TECHNICAL MANUAL DIGITAL EQUIPMENT COLORADO CORPORATION SPRINGS, CO 89919 Preliminary Edition, | September (Revision) August (2nd Revision) March (3rd Revision) December 'Copyright The (:) 1978, 1979 by Digital Equipment Corporation information purposes and 1is in Digital FEquipment for errors any this manual subject to Corporatlon which may document was set on DEC informational notice. reuponsxbllzty manual. U.S.A. Word Processing Digital Equipment | following Corporation, in no this DIGITAL'S WPS-8 System. The for assumes appear in Printed This 1is changevwithout are trademarks Maynard, | of Massachusetts: DECUS DECnet DECSYSTEM-2¢ DECwriter DIBOL Digital IAS LSI-11 EduSystem MASSBUS DECsystem-1¢ - Logo OMNIBUS PDP PDT Q-BUS RSTS RS X UNIBUS | VA X | VT - | VMS 1978 1978 1979 1979 OF CONTENTS TABLE S o S ol el e e o o L [ ® ceeceicecesocoasssasccsas ! e e b | ! [4 @ [] [} -4 Brush Drive ASSembly [ K] ® Flow SYStem ..ceceeccsccccacsosccascoscssses Fllter .ceeeecocosassescscassscssscsscsossscnse Read/Write HeadS .ecoevesecoscccscocscsssscocnsccss Read/Write Board .c..ccecocccecsescscssscoscssncs Power Panel ...cceeocscessscosssscessossccscss Control Panel ..ccecoveccaccccosasccssncccsccs Drive Electronics Partitioning ceecececseseces e W S N - ® o ..ceeceossccssssesssoss PartitionNinNg POSitionefhssembly © ® 8 @ 86 6 02 & & 5 8 8 ¢ T S O O G S 60O 0P Spindle Assembly cccoccccoccccosccccccooncsanss o e Air Alr ...cceececeeccscossosocccsnsssses Medium ..ceceecesccovcsescscccsccn Module Logic Drive $ @ e Storage | @ i Pt l I I DWW W W " INTRODUCTION Mechanical ® o e e Sl ® g S e [ e e ® e [] o |J e [ e @ ® 14 [] R [} o S ¢ TECHNICAL DESCRIPTION GENERAL DESCRIPTION (cccccoeeccscoscocscsncsocscnseoos Servo-In—-Data Concept .cceceessscceccsscccocccsnsse DC Servo Module .c.cccececcocscssscscsccsoscscnsa "AC Servo Module .cceesscoeccoccssnscscnssoncocscss Read/Write Module ...cecceececscsccscscccccscss Documentation .c.eececcoscsccsssssscscocsassnsosns SUBSYSTEM SPECIFICATIONS chseesessesnssssssee s . N R bt bt bt pd fd o bt et ot e e et d e ped e et et b CHAPTER I ] SECTION .cecececccecccsn = W B . w W W CHAPTER N D 2 2 @ CHAPTER Data Format .ccececceccesccscsscsccsscsncccscssccscs Servo DAata@ ccececeecssccccssscssosccssssscsccasccsco Introduction .ccececcccccssccccsesssoccscncnnn of Operation .eccseececccceccsccsscosscass Modes of Servo Signals .c.cccccccccencas Generation Velocity Mode Operation .eceecceccsccsccoccss MFM Encoding Bad Sector and File Precompensation ® v & ¢ & & & ¢ O O @ 6 6 & O .....ecceccesce 0 L .-. ® 9 @ & o 5 & & 0 ¢ INTERFACE - LEVEL DESCRIPTION 'CONTROLLER/DRIVE INTERFACE LINE DESCRIPTIONS .... DRIVE COMMAND FUNCTIONAL WORD'.OOQDOOOOOOOQOQQ0.0.0_.0000..0. DESCRIPTION DEVICE OPERATIONS INTERNAL MACHINE 00.0.000...OO".....O.....OOQOQ.. CYCLES iii .OO..‘O0.0‘I..DQOOO.....QO 9 POSj.tiOn Mo»de.QOQ..0.0........00._‘0......0...0" Guard Band © ® © © 0 & % @ 5 & & & € 5 @ & & O ¢ 6 © 6 ©0 & 0 O & @ ¢ © © > % O o W ..ccccceccoccsosccsnccsrconc OW i i (S S DS SUBSYSTEM P NRESEXHCENE ST CECE CH SN STORAGE FORMAT bt N AY U b @ & ¢ 9o & O @ e e ° e 2 W NN RLA1/RLA2 MASS DISK CARTRIDGE Q ¢ o & NN NN N - e o e ® SYSTEM - LEVEL DESCRIPTION - RN NN NMNDNODNNRNDN NN CHAPTER W) Read ? [ Data 5 st bt W N [] b= bt ] b N & 0 6 & 5 ® & ® @ 06 & @ ® @ © @ ®» ®» O ® 6 @& o & & & © o v B @ 0 O @ O e L 9 O OV & &~ 5 6 © O VO & © ® » © © ® ¢ 5 6 © O ® ¢ ® © © @ ooooooo ® © ¢ » © O ® B @ ® © o 6 ¢ ©6 &6 ¢ ¢ © 9 6 © @ e ® © & & & © 6 & & @ & o o o & & @ 06 & ¢ B & & % © & ©6 0 o © ® 0 O o o o & & o .... ® & anoco'oooeo 6 ® & 2 ® © e © o 8 & o @ e © 9 e LOGIC 2 @ O © © B @ & 6 0 O ¢ ® & .3 O ® s ¢ o -oe"oecoa’o-oaocaoa-'oo State State ® ROM Decoder W @ © ®© © ® 3 B & @ ® o & O 6.0 @ ® s 0 & » v e Brush Cycle Latch ¢ ¢ 90 & © ¢ O B O O P S Latch 2.8 & & 6 0 3 & 5 O Status v 6 O & & © &5 Data ¥ © Shift/Load Gate Latch 5-6 Logic .O.‘0.00...CCOQOOO. Register Clock & ¥ & v & O & 2 © D O B & ¥ O ¢ & O O 8 O d Gate © & 6 0 O 0 O ¥ © 0 e o o ® 2 © & &6 O @ ¢ & & & 5 ¢ O o @ Track Difference Counter .. Track Difference Counter Load Bit " Track Count = Reset Error Latches Count Control Gate Get El 5-1 5-1 & ....... ® Registers Status 5-1 G'O..OOOC0.0.0....O..O‘.. Flip- Flop Latch . 5-2 Marker Velocity F © Command/Status Head Select/Sign = b b ® Device Status W N O and O OPERATION 5--2 ROM Command OF (DLl) © Control Load = = O 0 ~J AU 6 Seek Clear N S Logic ROM Marker - MODULE THEORY Control ROM - Count Logic A 2 & Holding Latch Register Gate & (DL3) ©® 9 © Gate 8 .. o e & 0 OOD'QGQQO.‘OD ROM Held Flip-Flop U & Ez Held Flip"'FlOp ®© 4 © 8 o 6 v © o Velo Levelcity Detectors .. Disable Count Disk Speed Sector 2 Latch Control Logic Detection Timer Disk On Speed Latch Sector Time Latch 593 Microsecond Latch (WD YU e e ® L ® o . o o & o ® e ® e @ e |] @ e ® 0 UNIT - LEVEL DESCRIPTION Velocity ] 8 ©# © ® Data . State mbb.&b.&bbuwwwwwl\)www!\)!\)MNNNNNNN [ ® Status Write et © DRIVE FUNCTIONS Seek b @ - Control Timer Error Speed-up and Latch Logic (DL5) Gate Reset ®» iv © @ 8 5 (DL4) -oo_o.oeoooo ® a & 9 &6 o o > ©®© ¢ & & & & & © & © o e o & ® & & & » o 2 ®@ © @ ¢ & & & & 5 &6 & » &6 5 O & O O O VO O B Flip-FlOP O * s 0 & & 5 & O © » 6 3 _..0.0.0 ceeveocccsoo &6 0 & & & & O 0.6 O O © @ N om” . e o s 9 Jh Ut e o ® e Get [ 9 b pd ft b B bt b et bt bt b i Pt & ' EXTERNAL oot et e et et o ped bt et et e et b b el ped b et b e e [} o o o 6 e DRIVE o @ @ o e [ e & o (DL2) LRGN EEG RGOS, NGRGEGES RGN, NG R RS R EG RS NGRS RGRGEL RS RGLEG RS, @ e CHAPTER NG EGEGES, KNS, Up Load Cartridge Cycle Spin-Up Cycle Brush Cycle Load Heads Cycle ooooooo ® ®© © 6 0 » & ¢ O e 6 © © 6 @ é-ooSeek Cycle ® e R EEEEEEEEEES ° Lock On (Device Ready) ooooo e o 8 o @ 8 & ® ® o © o & & o Unload Heads ..c..... s e o s e e ® o ® © © 3 ¢ 2 ® &8 5 © & @ © © ° Spin-Down Cycle W OO o | W WWWRNNRDNONNDNNNN T e T o U o Y e v YN © N & N ® SO NG G NG Power Disk Stopped TIiMEIr .cceeeeceocsosasecssoassascs Disk Spinup Timer and Error Latch .......... Write Protect Detection and Error Latch .... 5.1.5.1 5.1.5.2 5.1.5.3 5.1.5.4 - - 5.1.5.5 5.1.6 ‘Clock Error DeteCtOr ..cececessoessossccasccs Write Gate 5.1.6.1 Sector 5.1.7.1 ~ 5.1.6.2 5.1.7 | cceccoccoccceccacs .cceeceveccsoanscss coceoscocsocssssscsccss DeteCLtOr Enable/Disable Interface Controls ....ccocv Integrator Logic (DL4) c.ceeccecscscccnscncses E1 and E2 Servo Sample Generation and Integration cescesscccoccssccsacsscocsscnsas Positioner Signal and Ready to Read/Write Logic ’ o.e.oooeeaasea;{eeeeoeeeegeeee..o-o..oo'. DC SERVO AND POWER MODULE .:icvceessoccoscccseans R RGO RS R RS RS RS BT Voltage RequlatorsS .eeocesoccccescsscaasocsscsos Overvoltage Crowbar .cescecescssscsosccsocsnsss +5 Volt Disable and Emergency Retract ........ Undervoltage DetecCtOr .ceccecsceccsccscscssnsseo Invert/Noninvert Selection Control ....ccccese 2.1 2.2 e2.3 .2.4 e2e5 .2.6 r Selection Switches .. Mode Velocity/Positione Tachometer Amplifier ~ 2.7 o3 ~ RGO EG R . 3.1 e 3.2 ..cecovecssscsoscasccscccsnss READ/WRITE MODULE +cceceocecccosoccscconssscsnscsscs Head Selection and Steering Circuits ....ce... Write Current Source and DriversS ..sceeecsccscscs Write Write @ e3.3 3.4 Data Flip-FlOpP Error DetecCtOr ccccccocseccsccsococcanse .cosccccooccsasssessnssscs Current in Heads DeteCtor .eceesesscssccesscss ..eceececcccsccsssonss ..eeesccsssccsscsnssscs Read Amplifier CircultsS Zero Crossing DeteCtOrS .3.6 «3.7 - .3.8 Amplitude .cceccescsoccsscconsossoccsassoca SeNSOr 4.2 Brush R .4 AC SERVO MODULE ...vecocecseasoosnasaossoassnsos Cartridge Access Door Solenoid ....eeeeececcns S RLEL LR 4.1 Drive Motor Spindle .4.3 c4.3.1 .4.3.3 Spin-down State Controlled Speed State ....ccocceseccccensscccs ....ccccccertiscrcscetccccccsoens (cccecccecessccccaccsscsce 1.1 MAINTAINABILITY FEATURES l1.1.2 1.1.3 l1.1.4 1.2 1.2.1 1.2.2 Additional Documentation ..cceccececccccccccscas Field Replacable UnitS ..ceesececoccococnsonse Recommended Spare Parts List ..cccocscoccccns SOFTWARE RESOURCES ..vecececsocsasocssccseascasoes DiagnOStiCS cevecececocnssnsossscascsssonanas Diagnostic SUpPErvisSor .....ceceecocscccscoscs 1.1.1 l1.2.2.1 Hardware Maintenance Plan ..ccesssscccscsosses. Hardcore QuUestionNS v ..ccoceccscssoscossscsss e MAINTENANCE bW = LTt 1 ...ccceccecccoccccnn - SERVICING PROCEDURES II SECTION CHAPTER Control e ...cceereccsvcecenocssocscsccans Spin-up State .4.3.2 ....ceccseceeesossccscs Control Drive Motor W wwww Ww .3.5 T Sy e Y ) .2 Pulse (DL6 and DL8) B 5¢1.7.2 Flip-Flop Error Interface Logic ® S WN [] [} N W N ] Sy L J ww © ¢ & 6 © & 6 & 5 & O 9 ©6 & o 9 & o Board Slide Rails O_O0.0....00.0...‘5...0.. o ACCESS Field BRUSH N ¢ "MODULES ¢ Access & & & Drive O & © o O » O & ¢ © COVEr Cover e & & & D O ¥ O & & O S © P & 06 © ¢ @ & 6 © & & 0 8 O o O & & ¢ » 6 O 0 0 0 ¢ e.eeeess ¢ ©0 6 > & o & 0 ® ¢ VO & @ VOO s P O 8 O o @ o o GO-...-vfl.Oi.O.......C.0.0.. .0.0..Q‘....O0.0.....OOQOQOQQ‘OOC Servo MOdUIe...0....,0.9..000‘000. DC Servo Module LogiC © o & MOdUle 6 9 0 0 &6 0 ¢ & 9 0 O 0 0 O 8 ..toaoooooo'ooooot' ® & 6 5 6 5 8 & 660 O b IS e 9 B W N Belt from Spindle Pulley ....ceeee. Spindle Ground Button ...eccecoceces Spindle | | Sector Transducer - AREA Positioner N o ¢ ¢ Read/Write Module SPINDLE AREA +vveveeecnnooeonoonnnnnsses - REAR PANEL AREA | Ul WN ® e ® Access AC Dfive ~ e ® Brush Tips BHWN - ° o ® @ s AREA Brush ] o e o Service POSITIONER e .... Cartridge N ° e - COVERS .O.O"OOOIO.'...O.‘. WTM= o ® 0 ® e o .GQO.B.'0.0.0-0........0‘..0 Filter Panel e o 'ootoo'oo.oo"o o'ooooio 9.'5000' .,‘.'.,...........°...'. Front e e PROCEDURES VORI AREA Bezel o Front Prefilter " CHAPTER 3 e and Indicator CL T RN N il ad i R L | _ , FRONT BEZEL Absolute Powersupply Spindle Power Supply Circuit Spindle CHECKS, 'v....'Q..‘...'.‘......... Drive Belt Fan e & ¢ & o o & o & ¢ & ¢ O ¢ 0 @ ..c.eececcecccescens Breaker ....ceeceecccccscees MOtOr .vieevecceccane Drive ¢ © 06 0 o ADJUSTMENTS AND ALIGNMENTS INTRODUCTION 4 vseevsncnsennnensnnnnens VOLTAGE CHECKS ® % SECTOR TRANSDUCER SEC'I‘OR PUIJSE & O & & & & & | OUTPUT TIMING & 9 S & 0 © 6 O & v S S O e o0 CHECK CHECK'o»’.ooooooeutno‘oooouoo-'o W e ‘ REPLACEMENT ¢ o AND | Switch INTRODUCTION eooooooooooo‘ooooooo.oooolooo ® NN NONNNNDONNNNNNNNNODOONONNNDONNNRONRODNDNONNNONNDDD NN ) e 2 e @ o o e o6 8 e ® ¢ s e o o o [] REMOVAL PROTect W b [] WRITE Breaker ....c.cccececocoe Assembly .ccceccecccoces LOAD Indicator ....c... Switch with READY 096..'. ..... ‘O..OOOO...O....OO.CQ.QI FAULT Indicator 'CHAPTER 2 Www cecoeecoecocscescsosccscocss Power ON/OFF Circult Power Terminal Block RUN/STOP Switch with Indicator B WD) ConNtrolsS Hardware QuestionsS ....c.cse.. cecsesasnons | Software QUEStioN .ccececeecscssoscossoosscses MAINTENANCE CONTROLS AND INDICATORS ..cvceececocsen BN - ® @ e e o o [] et @ [] WWWWWNN N b= b bt bt Console vi @ [ @ 3=20 3-22 TACHOMETER AC NOISE PICK-UP CHECK .eeecseeseeess 3-25 3=27 VELOCITY PROFILE CHECK +eececevscconsocosanncass 3-29 SERVO DRIVE MOTOR CURRENT CHECK .eeeeooacecccosss ACCESS TIME CHECK .ceveosecoccscsssasasssanasans 3-31 SPINDLE RUNOUT CHECK ceceececcosoncssssosaassoss POSITION SIGNAL GAIN CHECK .oceeceesccnsecesaoses b= b = WO TN L} O ] U WWWWwWwwww POSITIONER RADIAL ALIGNMENT ...ceeeeccecensocsoes 36 HEAD ALIGNMENT ..eeeeeeocccconscaosoossensssanses 3-11 READ SIGNAL AMPLITUDE CHECK ...ceeecsevososssoss 3-18 "APPENDIX A REGISTER DESCRIPTIONS .1 1.1 e1l.2 .1.3 .1.3.1 | A.1.3.2 'RL11/RLV11 ADDRESSABLE REGISTERS .,.......;.,.,;.' A~ Control Status Register ....ceececococccsocsse ABus Address Register ..cccceeccccooccscsassss A~ . Disk Address Register | o A.1.3.3 - | A.1l.4 A.l.4.1 | | .1.4.3 A.2 | -~ Register During a Get Status Multipurpose Register During a Command ~ Read REGISTERS ...coceossceccscsocss A=11l ...ceccosesccccosoccsessscoccse Register A Command Register A During a Seek ComManNd .useecoosoncscscssscncscscscscocaa Command Register A During a Read or Write ..cceccooescosconscsosse A=12 A=13 Count Register .c.ccceceesccosscscscsces A=1D Word «2.6 " Error 2.7 Silo Register Sector Address Register «2.5 20701 ~ . ) Register A=15 ...ceeseecccccscsase .cc..cececcoccscccccsscsonsssss A—lD .ccecsoccccsocasscasccssnossssssscess A—17 Command scecseeccecococenssciocnscsoasssss Silo Data Buffer During a Read Header A—1lT o BUEfEr Silo Register C()mmand After a Get Status ooooooooooooooaooooooceaoooooooo'A"“'lg APPENDIX B SUBSYSTEM INSTALLATION PROCEDURES B.1l B.l.1 ' SITE PREPARATION AND PLANNING .« v ceecooocccoaconoses B.1.1.4 A-12 Break Memory Address Register ....ccescecece A-1ld 2.3 B.1.1.1 | ...cccceoscoccsoncsancnos 2.4 Command A—12 B Command Data | A—O .e.ccoccsscvocsccascccocssse A—10 Write Command ~ BB BB BB B e eeeeseeereeeecensacecesannsee A=T ADDRESSABLE 0242 B.l.1.2 B.l.1.3 A= Header Command ..ccsecessosvscecscscsocsccscs Multipurpose Register During a Read or e2.1.2 ; e2.7.2 A=T ..ccecececscscccscocsscocs Multipurpose Command A.2.1.1 ceeveesoecocacscssossocssosncoscssoce Multlpurpoqe Register RL8-A A.2.1 B | COMMANA | A.l.4.2 > | .....ceceeececcoscscsss A- Disk Address Register During a Seek COmMMANT +oeveeeocscscsccccsssssanssssssse A=5 Disk Address Register During a Read or Write Data Command .cc.ceeceeecoosssccsases A-D 3 - Disk Address Register During a Get Status Environmental Considerations CleanlinesSS ..ccececescooeess .ceeoccosccoccssccsssssssssses Space RequirementsS .c.cscececocssscsscsccsse Floor Loading ...ccecoeoscccssssscnssssse Heat Dissipation .0'00050‘00.60.00'9.000.vOQOOO ' vii B-1 B=-l B—l Bl B—1l B-2 ® & © & & & & © & 6 © & & S 0 ¢ ® o ®» © & 6 6 ® 0 6 O ® 2 0 o O ® ® ¥ 3 & O Relative Humidity I % 5 86 0 0 & 0 0 @ & ® @ O & & s Bcccesses B— ceeseass Altitude 1.3 el.3.1 11.3.2 Installation AC CABLING .2 e 3 ® & & INSTALLATION - o I cessees B- s cesaveeBB ceoeesce s B-— ceseses Constraints ..... ceeeses B-1 cesses B-1 @ 6 e 0 06 0 0 B"] ceeeses B=2 cevesse B=2 INSTALLATION Interface Module O " Drive Module Module Slot Location Module Installation 5.2 » TOWOU OO .5.3 .5.4 . 6 "RL8-A 6.1 CONTROLLER €@ 0 8 & 8 & .... b I\ Bus .5.1 oooo,o'oooo 0 8 ¢ O 6 v B S & O ® ® ®» 0 & ¢ & & & INSTALLATION cveeses B=27 ceesese B=27 ceeeses B=27 ...s... B*29_' v oo Introduction -..oo-’ocooooocoo.boo Module Slot Location Module Installation .6.2 6.3 .7 RLA1/RLG2 DISK “Unpacking RLA1/RLA2 7.1 e 1.2 and Prestart Inspection 7.4 Drive Start-up Operation Check TP Drive CONF IDENCE TESTING - .8.1 RL1l-Based .9 USE OF THE M9312 .. o Ne K® AN APPENDIX C B-29 ceeeess . .e.. B=31 B=31 cressss B=33 ceesses B-38 - B-40 Cevee.. BOOTSTRAP B-42 . B-45 .0....‘0...0. WITH AN RL1l ceeseoss B-48 'TOGGLE IN PROGRAMS o1 2 HEAD SELECTION PROGRAM FOR RLll/RLVll Y o4 | HEAD SELECTION ceeenees C—2 e 3 GET STATUS PROGRAM FOR RL8-A (WITH OR WITHOUT RESET) RL11/RLV11 SUBSYSTEM .4 GET STATUS ON AN RL8-A GUBSYSTE ) .6 OSCILLATING SEEK FOR RL8 A OSCILLATING SEEK ~ APPENDIX D.1 ‘D.2 D | ceeesss B=43 ceossees B—=45 SYSTEM ~ B529 B-29 s 0s cessees Diagnostics ~ RLV1l-Based Diagnostics RL8A-Based Diagnostics .8.3 seo Inspection Drive Unit Mountlng e 7.3 .8 e o s v o e DRIVE INQTALLATION Disk B=1 ceeaesse o GENERAL RLV11 CONTROLLER DB— ceevesss s DB-— ceceses RL1]1 CONTROLLER INSTALLATION ..... .4 .5 B- cessssee I el.2 1.4 1.5 Bcecesesss . Attltude/Mechanlcal Shock Options AC Power.Requirements ~ Standard Applications .... OCptional Applications ..... Grounding Requirements 1.1.11 B-—- ceessesese Power and Safety Precautions Radiated Emissions 1.1.19 cesesses B- | Temperature WWWWIIDIHIINAITWWWNNNON0N Acbustiés_' D00l oW D0 wW O W oo w .1.1.5 .1.1.6 l.1.7 .1.1.8 .1.1.9 FOR ON AN .. RL11/RLV11 C=ceesaes @ ¢ & & © & & 0 & ¢ & ©6 & 0 9 ceeeecns C# © © O (- ceces Cf ...0.00..'.OC.C...O...‘O" © RL11 CONFIGURATION_AND INSTALLATION CONSIDERATIONS 'SPC CONSIDERATIONS .. ..OOQ..O..OQDO&O.QQC..I..v CONFIGURATION CONSIDERATIONS - oviii ...D.O....QQG...O...' D“l D2 ' FIGURES | Title Figure No. I/1-1 I/1-2 1/1-3 - 1/1-4 1/1-5 1/1-6 1/1-7 1/1-8 1/1-9 1/1-10 1/2-1 1/2-2 1/2-3 I1/2-4 p— 1/2-5 1/2-6 1/2~7 1/2-8 1/4-3 1/4-4 1/4-5 1/4-6 - 1/4-7 I1/4-8 - 1/4-9 1/4-10 1/4-12 I1/4-13 1/4-14 I/4-15 I/4-16 1/4-17 1/4-18 1/4-19 1/4-20 - 1/4-21 - Typlcal RLBA1/RLOA2 Maqs Storage Subsystem'......,I/zAz RLA1K/RLA2K Disk Cartridge Characteristics .... 1/4-22 " 1/4-23 I/2-3 1/2-6 Servo Sample Generation .....ceeseeecscsesassos 1/2=7 Servo Data WaveformsS ..eeeeeseescoscsccsasncsss Generation of E1 and E2 .ceeesecesccsscscasnoses 1/2-8 Servo Data Pattern ..eeeeccecscsesscsesascnsses 1/2-10 MFM ENcodinNg .ceeecececocoscsasasossssscssossnaes L/2-11 -13 MFM Precompensatlon’..o........................I/2 ..e.cevsoccscsscasancensacssss Control Unit/Drive 1/4-2 .Page'No. Control Panel ...eeeeeceeossssssossscncssssssas 1/1-12 l5B LOq ic MOd UIeS ® O & 6 Q e ® & ® O » O @ .. .. ® & & & o & ® . [ ] .... ® & & © o ©® I /l 2? I/l ..UOO;Q QO..'..O. Data Format '09.0‘5..O"'COOC.G I/3-1 1/4-1 | Rear Panel AsSembly ceeocescccscssoscssscoscnas I/l-lfi"' Bad Sector File 1/3-4 | _ | Typlcal DiSk DLIVE «vvececceansscsoansnsnasennase 1/1=2 Major Subassemblies and Air Flow .cceeeececsce. 1/1-4 POSltloner Assembly .oao:.oooooooeoeoo.oooooooaoo.I./l-s Spindle ASSembly ooo000600000'0090.6600'.'6ueoa:sooe I/l"? Brush ASSEmMbBlY e.eveecoccosscssssescssosssssssoss 1/1-8 Read/Write HeadsS .ccescecscccoscsscscscccscoscns 1/1-9 1/2-9 I/3-2 I/3°3 - Interface Lines .cseeeceeeees Drive Command Word Configuration ........ce.c... 1/2-14 1/3-2 I/3-8 | S Relationship Between System Clock and Drive Command Word BitS ..ccccessssssceeess L/3-9 Drive-%tatus Word ..;5....°a.;.;....‘....;;...»I/3-lfl' Disk Drive Detalled Block Dlagram Ceeressseeass 1/84-3 Device Device DeViCE Device Device Startup Startup Startup“" Startup Startup - Load Cartridge Cycle .eeeeeso. I/4-5 Load Cartridge Timing ,.,;...;'1/4—6 I I 1/4‘8 Spin"up CYCle R R EEEE Spin-up Cycle Timing ......... I/4-9 1/4-11 Brush Cycle ...esveecescccses Device Startup - Brush Cycle Timing .......... I/4-12 Device Startup - Load Heads Cycle ..oieeeecsss 1/4-13 p Cycle Timing ..... I/4-14 Load Heads Device Sta-rtu Device Startup - Seek CyCle ..cececovecscoasess I/4-16 ‘ DeViCE‘StartUp - SQEk Tlmlng ,o-v'o:‘ooeooo-ooé-‘-o;ooo 1/4—17 on Track @ ....cvesecees I/4-19 Device Startup - Lock Device Startup - Lock on Track @ Timing ...... I/4-20 Device Startup — Unload HeadS ...ccosceccecsoes 1/4-22 Device Startup -~ Unload Heads Timing ......... I/4-23 - Spin- Down-,.....,..........,. I1/4-24 ~ Device Startup DeViCE Startup"'spln"'mwn Tlmlng s 2 066 Cc 6060066 1/4-25 ‘Get Status - Functional Block Diagram ........ 1/4-27 Drive Command Word During Get Status ......... 1/4-28" Seek Functional Block Diagram ..e.ecesecoccesceess 1/4-30 Drive Command Word During Seek ....cecceveceees I1/4-31 Read Data - Functlonal Block Diagram ...eee... I1/4-34 Write Data - Functional Block Diagram ........ I/4-36 ix 1/5-1 - I/5-2 I1/5-3 I1/5-4 I1/5-5 I1/5-6 1/5-7 1/5-8 State Control State ROM Decoding ...iecececccccens Scheme ..c..ceeeeeee Velocity Commands 1 and 2 Decoding Scheme .... Seek Control ROM AddressSing ..cceeeececsscccceces Drive Command and Status Control Timing ....... Velocity ROM and Velocity Command Generation . Count ROM LOQIC st ceecesvascscosscosscosanscssnss Sector Detection and Speed Control Timing .... Servo I/5-19 1/5-11 50% and 75% Duty Cycle IntegrationN .eeeeeeeees Integrator Logic Waveforms ....ccceccecscecscces Ready to Read/Write Generation .....ciceecec.. I1/1-1 Disk Data I11/1-2 I11/2-1 I11/2-2 11/2-3 I11/2-4 and Drive (Front Integrate Controls Panel) and Enable Waveforms .... Indicators @ 6 0 €606 000 5000060600009 006006600 e 0O s Removal and Replacement Sequence Flow Chart .. 11/2-2 Front Bezel Absolute Absolute Front ....cccceeccecccns teoessessesencene Filter Filter DC Slide Ralls Field Service Board ....ceeeee.. II/2-8 11/2-9 II/2-11 Se rvo " Exposed Brush COVer .eeeeecaes cessscens L2 J 0. O. ®» o @ Q 8 & & 6 2 0 & 5 & © ©0 O o & ¢ © 6 MOd u1e Servo Circuit Access .‘.v Gv ‘ .‘Q:.-. ® & © & 0 & ¢ o ¢ © . ® ®© 8 6 e 0 060 00 8 @ 11/2-10 AC I1/2-5 ..ieeveceoecas ceececescoscesocans e e Location Drive Module ASSembly c..veeeoccoccses ......vieeeesccses ceseesssecas I1/2-13 Read/Write I11/2-14 Read/Write Module Box Disassembly .veveseoeonss Spindle AccCeSS COVEr tieeocececoccsonsnncncss 11/2-18 I11/2-19 I1/2-20 I11/2-21 Sector Rear Vlew Rear Panel Drive Drive 0f I R TT IR AP S S ....ccececceccosncccccnnnsne MOUNtinNg ceeeeeeeeoecenosncococees Loglc MOAULE LAYOUL I1/3-3 Sector Technlque Output ceesecscssc s wuvvosecnnonennenns. ..ccieeeneeccecsnnse Pulse TiMING cceeeeocecsooccescsnsccncse Positioner and Read/Write Module Box | ASSEMDlY 4ttt eeeeeeeecsonosseooncosossooceses Servo Bursts Positioner and Bursts and Outer Guard Band Position Sector Assembly Servo Signal I1/2-19 I1/2-22 II/2-23 I1/2-25 11/2-30 I1/2-32 R Drlve'O..O.O......C.AO.O.O..OO.OO Transducer I1/2-16 I1/2-17 ..cvieececccconcccsconcncncsces Assembly Drlve I1/2-12 I1/2-15 11/2-26 11/2-27 Motor Sector 11/2-6h ..c.cceevscocoscsss Assembly Motor .ueeueoeseococosesceesss Mounting Drlve II/3-1 11/3-7 I1/3-8 I1/3-9 HeadS ..eeeeeosceoscens Belt TenNSIiON .ceeeeocecccccccssoscsccsss Circult BreaKker ..c.eceeeceocssesceccosccscess.se I1/3-2 I1/3-5 - II/3-6 BUtLON Transducer Read/Write I1/2-22 I1/3-4 (UpPright) Positioner Assembly II1/2-23 I11/2-24 IT/2-25 Module Spindle Ground I11/2-3 ACCESS .tivvecceceosnconnnnenes ....eceeeevocccccccses ce s e e oo Panel Printed I1/2-9 I11/2-16 I1/2-17 11/1-10 IT/1-11 MOdU]-e II/2-15 1/4-7 I/4-9 Disk Drive Controls and Indicators (Rear Panel) QOOO...Q.....'GOO......;..;‘...O.. II1/2-5 I11/2-6 I11/2-7 11/2-8 II/2-11 I1/2-12 - Addressing I1/5-9 1/5-12 - ROM Command PulsSe .ccececeococaeoeo cessessssssesesessseesans Position Servo Signal Data ....ececesee. essessesesesses s ....eieeiveescoocccconcccncoas X 11/2-35 I11/2-36 11/2-37 I11/2-39 I11/2-41 11/2-42 11/3-2 11/3-5 11/3-7 II1/3-8 I1/3-140 II/3-12 I1/3-15 II/3-16 II/3-21 Position Signal Cain Check Waveforms ....e.... I1I1/3-24 1I/3-1¢@ Summing Amplifier Output ...cccceececcescssees Tachometer Output Velocity Signal .......cc.. Positioner Motor Current Check ...e.cecoecesses. Access Time Check (One Track Seek) .eceeeeees Access Time Check (85 Track Seek) .cececeeess Access Time Check (255 Track Seek) .ceecceeees 1I1/3-11 II/3-12 1I1/3-13 I11/3-14 11/3-15 I1/3-16 | mtnUJmt?u:wrnaJw - RLO1/RLPA2 Disk Drive — Rear View ..ce.ceceeseeeses WK & JdJYTWU RLll RL1]1 CC)mpOHENt Base B-22 B-23 B-24 8—17 | Installation | B—Zfi .ceceeececocscossossssse B—22 RLV1l Bus Interface Module (M8014) (Component Side) ..eecvesecccosccansssscasccccass B—24 RLV11 Base Address Switch Settingss .....¢ccee.. B=25 RLV11l Vector Address Switch Settings ..c¢eeceeee B=26 RLV11 Drive Module (M8813) .ccocecscosossccccccese B—28 B-17 B-21 Jumper 00000.0.0.00.0000.0..000..0.'000000 RL11 Controller B-18 B-20 ocoooooooooooooooo_oo‘cooooo Address B-14 B-15 B=16 "RL11 Priority Jumper Assembly Connections ...... B-21._ B-16 B-19 LBYOUt and Vector COI)flgUIatlon W N { Dww e OO0 Typical 50 Hz Power SYSteM .eeeceesscecccccsssss Split Phase (2-Phase) Power SysSteém ....e.ees.c... Three Phase Y Power SYSteM ....cococescesccsassecs B-15 >. B B- Approved Electrical Plugs and Receptacles ....... Power Panel Grounded to Building Frame ....c.oeee B Power Panel Grounded to Metal Plate ....cco0c00e. B Typical 6@ Hz Power SyStem ...cceecoececcccessocss B— B-14 “~ I1I/3-26 II/3-28 II/3-30 II/3-32 II/3-34 II/3-35 | ‘'H9273 Backplane Grant Priority Structure ....... RLB"’A Jumpefs oooooooeoooooooocoooooooooouooooac H95fl Shlpplng PaCkage 60090606006 0065060060066060066se s B-28 8—36 RLfll/Rng Cabinet 8_34 RLgl/Rng - COVerS RLA1/RLP2 Disk InStallatiOn Revaed Qoooo;ooooooo-eeooocou. Drive - Rear View RLO1/RLA2 Disk Drive RLO1/RLA2 Disk Drive - Module ® 6 o 00 ®® 6908 50 00 0 00 - Front B"'32 8“36 ....eccceeooees B=37 View .c.eeseecscseas B=39 Exposed Drive Logic o .c.coceeceeccsccoccsccccocossccsssosssscsssncss B—4l ) o xi TABLES Table No . Title - | Page No. I/1-1 RLO1/RL@A2 Subsystem Documentation ceeseneseess I/1-16 I/1-2 RLA1/RLP2 Disk Drive Physical and Environmental Specifications ........ cecsseess 1/1-18 I1/1-3 I1/1-4 RL@1/RLO2 Disk Drive Operat10nal | | SpecificatlionNsS ..ceceeccecosccsocacs cseenesesveces RL@lK/RL@ZK Disk Cartrldge Spec1f1cat10ns cees I/3-1 Drive Bus Drlve Status I1/5-1 1/5-2 velOCity ROM Addressj-ng OO>........QQ...;.‘.‘OQOO I/S-ls Track Count vs. Servo Samples and Direction .. Distance and Velocity Thresholds ..c.ceecceeees I/5-18 I/5-19 COunt ROM word Map Lines I/1-23 I1/3-2 I1/5-3 I1/5-4 Interface o 1/1-21 ..;....a.a..........; ooooooooocooooooooooeooooo‘oooooo‘I/Sflg II1/1-1 I11/1-2 I1/1-3 I1/1-4 II/1-5 e FRU Part Numbers and Interchangeability ...... Recommended Spare Parts List .(.c.cceescccesses Diagnostic Supervisor CommandsS ..cceecocseoees Command parameters ..0....00QO‘.GO‘O..O.QO»0.0QO " II/3-1 II1/3-2 Method RLQI/RL@Z DOcumentatiOn "oe 2 6 e 0000060006000 00c0e II/1—2 II/1-3 I1I/1-4 II/1-6 II/l-7 Service Jumpers for Drive Logic Module ....... II/3-1 for Selecting Heads ceecetsseseasessess 1I/3-3 Controller Addressable'Registers ......;......... A-1 A-1 A-2 InStrLICtion Set o2 00000 o'o.oo.oooooooo»ooooo A"’ll Saleable RLGl/RL@Z Subsystem Options ............‘8—4 Saleable Cabinet Options cesecccctsesesssesasssses B=5 Diagnostic Catalogs and IndexeS ...cececeesesass B-42 RL11-Based DiagnoStiCS .vecececcccccsscssnoscecs B—43 Diagnostic Kit Numbers ...ececeececccescsse Diagnostic ComponentsS ..ceceeececcccscocssesass B—=43 B—44 User DocumentsS B—45 RLV11l N PO WO RL11 RL11 H | JOU D W+ RLB-A OO wWwmwWwww I/3-3 Q..C...O..D'..'...O.".‘...."I./B;ll‘ ..ccccececosonsosccsocsscccssncsscasse Diagnostic .eceecececccccscsoscees B—46 Diagnostic Diagnostic ComponentS ..ceccoececcsvesceas KitS .eeieevecsoscccccccesse B—46 B—46 RL8/RLA2 Diagnostic KitS ..c.eeececeocccscancaese B-47 RL8/RLA2 Diagnostic Components B=47 RL8/RLA1 RLB/RLA]1 ComponentsS Xxil ....eceeesececsees : //, SECTION 1 TECHNICAL DESCRIPTION CHAPTER 1 INTRODUCTION 1.1 GENERAL DESCRIPTION Drive 1is a random accessS mass storage device. RL82 Disk ‘The RLO1/ Both drives utilize a removable, single platter top-loading disk The RL@1lK cartridge provides five million bytes of cartridge. ~ storage, and the RL@2K cartridge will hold ten million bytes. Up ‘to four RLO1 or RL@G2 Disk Drives may be used per controller to provide up to 4¢ million bytes of storage for PDP8 PDP-11, and_ fggLSI 11 computer system app11cat1ons. The RL@1/RLO2 Disk Drive (Flgure 1- 1) is mounted on slides and is - 26, 6 cm (16.5 in) high, 63.5 cm. (25 in) deep (compatible in w1dth to a 19 1nch RETMA rack) and welghs 34 kg (75 l1bs) . .-Operat1ng controls and 1nd1cators plus a removable air filter are Access to the cartridge is located at the front of the drive. provided by a lift-up cover 1ncorporat1ng a safety 1nterlock | All-‘ front or" "':_—’--serv1c1ng ‘can be achieved from the top of the drlve or from RLfll/RLB? Dlsk Drlves are shlpped Hertz Field wunits. -accomp11shed | - - rear of the corporate cablnet change to 2390 of by reversing ~either factory as the or vac/5@8 two 68 115 Vac/60 ) 1is Hertz block, covers terminal ~located externally at the rear of the dr1ve.. The line cord plug may be cut and replaced with an applicable 238 Vac. 11ne plug. The ‘,RLfll/RLGZ Disk Drive is UL llsted and CSA certlfled | -Interlocks‘are prov1ded where the potentlal ex1sts for damage to; | the dr1ve, medla, operators, or serv1ce personnel ,tThe RLfll/RLflZ DlSk Dr1ve prov1des high .~ maintainability. The drive is designed performance and,. f1eld for easy and removal S L _replacement of 1091C and electromechan1ca1 subassemblies to result g in an -average replacement not more than 15 time of minutes. »Spec1al tools and alignment packs or fixtures are not required for ; -on—s1te"ma1ntenance.p" Oonly two adjustments are requ1red under All logic modules are placed so that - normal service conditions. . ».-they may be accessed w1thout the ‘use . of extenders. | _[- 1.1.1,~ Servo-In-Data Concept ”.'_ . Key to the performance of the RLGl/RLG2 o is - - o the servo-in-data The concept allows the derivation of head p051tlon1ng | ',"'_-‘ConCept ~ ~and track countlng information from pulses Each read/write head seeking ‘data track. imbedded within the to a desired track * becomes its own servo transducer. Data tracks could conceivably " be located within a band anywhere on. the recordable disk surface - as long asthe positioner does not run out of travel limits. Since - the heads seek ‘and center on data tracks, environmental problems ; ~related to ‘nonex1stent mechanical drift and tolerances become practically "Precise head allgnment requlrlng the use of special - flxtures 1s unnecessary.r,_' o . | | ~ Figure 1-1 Typical Disk Drive 1.1.2 Storage Medium The RLO1IK or RLA2K Disk Cartridge is a modified 5440 type removable, top-loading, single platter cartridge with 256 discrete data tracks on each of the two recording surfaces. The cartridge armature track. track the plate Servo contains 40 1information determinations factory and information is RLA1K RLA2K and are cannot sector slots, defining 40 sectors (servo-in-data) from which sector made 1s be prerecorded reformatted contalned on the last cartridges are in data on the the cartridge field. Bad at sector track 1ntended as a means of data one the RLO1 same is true for any two RL#2 drives, provided that both drives been properly maintained and that the computer systems have interchange between computer systems. Data written Disk Drive will be readable on any other RLAl drive, on and and controllers are compatible with respect to word length. however, that an RLO1K cartridge cannot be used on an RL02 Note, drive nor can an RL@2K cartridge cartridge will physically either using color flow be used fit the drlve l1.1.3.1 Air to maximum achieve Flow an RLO1 drive. While either drive, the results of unpredictable., The cartrldge are prevent 1ncorrect Mechanlcal Partltioning 1-2 shows location of the through on into the wrong cartridge are keyed and labeled to help 1.1.3 Figure use, | major | drlve | subassemblles chassis. and air - System - The protection of RLfll/RLflZ the contaminated - per and Disk Drive is de51gne head/disk interface even in a separated supply. environment. The air flow system (Figure 1-2) is into a reczrculatlng clean air supply and a cooling air The cooling air 1is drawn in through the bezel and is exhausted out the recirculating impeller clean rear of the air is moved attached to the spindle drive by through drive a the nuffin duct motor. fan. system Before The by the an clean alr is recirculated to the disk cartridge, the duct system routes it through a high efficiency filter and a heat exchanger. The .heat exchanger is cocled by the coollng air supply. 1.1.3.2 Air Filter - The_absolute air throwaway unit. the absolute filter is a self-contained Because of the two air systems, replacement is only required on a yearly basis. fllter of 1.1.3.3 P051t10ner Assembly - The p051t10ner assembly consists of a carriage, servo motor with capstan and tension cable, linear tachometer, head 1load cam, and home switch, The magnetic read/write heads illustrates the The positioner access on the principle components of subplate can radially to are mounted be moved the disk. carriage,. 1laterally | 1/1-3 Figure the positioner to | 1-3 assembly., align head . | AT PN HTI3MINOVJd NMHV3I-OV1D 1/1-4 ' THESE 2 SCREWS ARE NEAREST THE MOTOR " SHAFT AND ARE THE LONGEST ~ OF THE SIX MOUNTING - SCREWS. | N ' HEADS HOME SWITCH 'ADJUSTING SCREW g POSITIONER ADJUSTING . SLoT ‘ - POSITIONER ADJUSTING SLOT —/ ~CZ-1079 3 Figure 1-3 Positioner Assembly I/1-5 1.1.3.4 Spindle Assembly ‘housing, the rotating button, and the drive Assembly. The The - Assembly comprises hub, Figure 1-4 shows the Spindle S aligns S IR 1itself on I the spindle | "The disk Cartridge interfaces the spindle via a cone located the center of the spindle, a ‘hub, and a hold-down magnet a the spindle ground | transducer mounts and housing. Spindle interface belt, S sector - cartridge 14 0 cm (5.5 in) diameter . | in stabilizing | | 1.1.3.5 ‘Brush Drive Assembly, - The RLO1/RL@2 Disk Drive has " motor-driven cleaning brushes (refer to Figure 1-5) which automatically sweep across the disk surfaces each time the spindle drive motor is started. The brush cycle must be completed and the brushes retracted before the heads will load. 1In order to prevent ~damage to the read/write heads and cartridge, the cartridge access ~cover remains interlocked so that the cartridge cannot be removed ~ in the event that ‘,p051tlon. The brush 1.1.3.6 a - the brushes holder fail assembly to return is a field core structure mounted in a ceramic slider pad supported on an arm. Each head is also provided .~ cable that terminates with connector. When loaded and positioned with the disk rotating at head is supported by a boundary layer ~ microinches thick. data head - 1n The "up" head is of air used for and is with a flexible both heads are 246@¢ | 2% rpm, approximately reading and 59 writing on the bottom surface (surface 1) of the disk and the "down" is used for reading and writing data on the top surface (surface the home Read/erte Heads -’Each head (Flgure 16) is made up of magnetic each to their replaceable unit. @) rotating the of the disk. Each head is disk by the force of a cam head arm. | . : loaded and unloaded agalnst the 30 - from degree ramp - iThe heads Operate'eni 4.1 megaflux-reversals per second maximum using the Modified ‘Frequency Modulation - or decodlng data. bits per This corresponds 1nch on the 1nner -l 13.7 Read/Write Board 1.1.3.8 Power Panel (MFM) method a maximum track (track 255 for encoding den51ty of 3’725 decimal). The read/wrlte board.is“contained a subcha551s to prov1de shleldlng ]- to The for the loglc removable rear | - | panel of the in drive contains a muffin type fan, 1/0 connectors, an ac circuit breaker, an RFI filter, the spindle motor capacitor, the- assembly block and the ac servo module 1-7. ~drive The ac circuit breaker prov1des and is normally left in the ON 1/1-6 chassis. power ON/OFF p051t10n. ac Refer terminal to control Figure . for the SCREW i e | oz PLACES LOCKWASHER . '3PLACES )P} ———SPINDLEASSY Figure 1-4 Spindle Assembly 1 /1-7 C2-1002 'i_Figure 1~5: Brush?ASSembly 1/1-8 - ‘ o . CARRIAGE ASSEMBLY . FiQUre 1-6 Read/wtite Headé 1/1-9 €z-1003 'Figure 1-7 ‘Rear Panel Assembly |« REAR POWER PANEL ASSEMBLY SCREWS (6) MOUNTING CZ-0015 A Control Panel - The operator's control panel 1s located 1.1.3.9 at the front of the drive. The following push on/push off alternating action switches and indicators are located on the drive control panel (Figure 1-8): | ® Run/Load switch with LOAD indicator @ Unit Select switch with READY indicator e FAULT indicator ® ',VWrite,Protect switch withwRITE PROTect indicator Run/Load Switch with LOAD Indicator This push on/push off alternating action switch, when depressed, energizes the spindle motor prov1d1ng the follow1ng condltlons have been met: | . - e The disk cartrldge has been installed @ The cartridge protection cover is in place and the ® All ac and dc VQltages'aréVWithin specifications ® ’The”read/write*heads are home ® The cartridge access cover brushes is closed and latched are'home When this switch is released (depressed a second time), the spindle drive motor is deenergized if the read/write heads are they are retracted If the heads are loaded, not loaded. before the spindle drive motor is deenergized._'ln the event of a main power interrupt and subsequent power restoration, the drive will cycle up again if the switch is depressed 51nce it qontalns mechanical memory. The LOAD enable indicator is illuminated whenever: @ The spindle is stopped ® The read/write heads are home @ The ® The spindle drive motor is at rest brushes are home I/1-11 S o LOAD SWITCH AND INDICATOR ~ 1N UNIT SELECT PLUG NG y AND READY INDICATOR ~ FAULT INDICATOR WRITE PROTECT SWITCH AND INDICATOR Figure 1-8 Control Panel CI/1-12 CZ-1006 Unit Select a is select switch unit - The 1, 2, 3) Switch with READY Indicator (@, operated switch cam is which actuated by inserting a numbered, selectively cammed button. The switch contacts are binary encoded so the drive interface recognizes logic address code and or the the correspondlng condition. @ indicator, This The generated unit select number (@, drive 1, 2 | 3). The numbered controller matching when 1lit, indicates a drive READY condition exists when: spindle to speed up is s héme | o The brusheare ‘ 9 The read/write heads are loaded °® The heads afe:detented on a specific track - | . FAULT'Indicator " The FAULT indicator error conditions 1is 1it whenever develop 1n @ Drive Select Error e _Seek Time Out Error @ erte ® LoSS of System Clock ¢ Write Protect Error e Write Data Error Current the the disk drive: in Heads Durlng followmg Sector Tlme fault or | Error @ "Spin-Error WRITE PROTect Switch and Indicator This alternating action push on/push off SWitCh; When de- pressed, sets the drive in write protect mode whether or not the Write Gate 1line 1is asserted (refer to interface 1line descriptions). If the Write Gate line is asserted when WRITE PROTect 1is on, the drive will generate a Write Gate error (which will immediately 1light removed FAULT). The write upon release of the I/1-13 protect sw1tch mode w111 be 1.1.4 Drive A percentage large drive Electronics Partitioning of logic module. the drive Additional o The dc servo module @ The ac ) The read/write This design concept servo » electronics electronics is S contained are on these . on the modules: module module enhances the module-swap maintenance ‘philosophy. The of - drive logic module, mounted inside the rear cover at the top drive, is a single hex-sized board. The rear cover can be the detached and positioned -plate. Refer Openlng the rear servo module. be placed on assembly, ac cover Both their module servo module Figure vertically Figure 1-9, - to to and Drive drive the with ° module allow easy test points. located on and edge dc to Interface to the controller connector flat ribbon loglc the base | and via cable a 1fl&e'dt module Figure 4¢ ) State'controllogic can the p051tloner 1-9. Refer mcdule prov1des Interface enablihg and control circuits pin The to the PC-mounted L (load/run sequencing) Seek control and track couhting logic ® beVice command/status register @ Positioner e Disk drive metot speed cOhtrol velocitycommandgeneration ® Error detectlon e Servo data detection logic | '1..l.4.2' positioner and status data generatlon | DC Servo Module- The dc se,rve- module cehtaihs t'he regulators into the ‘mechanical system of servo to ® @ - module access Refer Logic Module - The drlve follow1ng functions: and rear . the removable power panel. 1-9, 1.1.4.1 the - the read/write read/write sides chips is exposes the on from servo amplifier and dc voltage regulators. The voltage' are mounted on a U-shaped heat sink which faces down cooling alr‘chamber. This module also serves a function the in clean that air it seals a system, I/1~l4 portlon of the coollng air I/1-15 MODULE R/W SERVO MODULE NS AND TEMPLATE o Logic Modules " D.C.SERVO MOBULE Figure 1-9 MODULE DRIVE LOGIC . CZ-0011 1.1.4.3. AC Servo M»odule ~ following functions: The servo module provides the ac | ® Control ® Control circuits for the spindle,drive motor o® Cover soleneid driVe~circuit 1.1.4.4 read/write circuits for | the brush motor | Read)Write Module - The functions provided' by the module are: - | | & - Servo and read-data preamplifier, filters, differentiater e Head selection ® Write drivers and write current sensing ° Write errer sensing and 1.1.5 limiter » - | Documentatlon Table 1-1 1lists the documents the RLGI/RLBZ Subsystem. that Hard .consisting .copy user documentation w1ll be avallable of the (which contains operatlon Subsystem User's Guide information) will ship with each subsystem to descrlbe RLO1/RLE2 Disk ana"lnstéTlatlon RLGl/RL@Z Subsystem Documentation Table 1- l Microfiche ,Hard Copy- Number Number Title RLV11 Controller Technical Description Manual EP-RLV11-TD RL11 Controller Technica1 ~ EK-RLV11-TD Description Manual EP-GRL11-TD EK-9RL11-TD RL8A Omnibus Controller Technical Manual ) EP-JRLBA-TM EK-JRLBA-RM RLA1/RLO2 Preventive Ma1ntenance~ EP-80008-PM Procedures | EK—RLBlZ-PM RLA1 Illustrated Parts Breakdown EP-08016-1P EK-QGRLOL1-1P RLO2 Illustrated Parts Breakdown EP-@00316-1p EXK-CRLA2-IP RLA1/RLO2 Disk Subsys*em User's Guide RLA1/RLO2 Pocket Service Guide N/A - EK-RLB12-UG N/A "EK-RL@12-PG I/1-16 3 1.2 This and SUBSYSTEM SPECIFICATIONS section provides RL@2 Disk the fbllow1wg the RLA1 Physical and spec1f1cata10n for Subsystem: Table 1-2: Disk RLAL/RLE2 Disk Environmental Specifications 1-3: Table Specifications Table 1-4: RLO1K/RLA2K ~. ! Specifications Drive RLGl/RLBZ 1/1-17 Disk Drive Operational : Cartridge Operational Table 1-2 RLO1 Disk Drive Physical and Environmental f Specifications Width Compatlble Depth' 63.5 cm (25 1in) behlnd bezel Height 26.5 Weight 34 Moehtinq The Power w1th 19 1nch RETMA rack cm (10.5 1in) kg (75 1bs) drlve mounts on cha551s slldes. 90-127 Vae (47.5-63 Hz) Sources 180-254 Vac (47.5-63 Hz) (Manually Input Power 200 Power Factor Greater Starting Current selectable) watts maximum at than 115 Vac, 60 Hz 0.85 3.5 amps RMS maximum @ 90 Vac/47.5-63 Hz 5.8 amps RMS maximum @ 127 vac/47.5-63 Hz 1.75 @ 180 2.5 @ Power Cord and Connector: amps Interlocks RMS Hz maximum Vac/47.5-63 Hz A molded line cord compatible drive operating voltage and with Power Control to drive. the The power and the plug The 230 voltage Safety maximum vac/47.5-63 amps 254 RMS for cord Vac 1is is RLO1/RLG2 and CSA to is 1is attached m (9 ft) long 5-15P. be NEMA Disk the 861 Vac 2.74 NEMA plug drives The 128 the attached to high 6-15P,. Drive is UL listed certified. Interlocks are exists damage to service personnel, for operators I/1-18 or used where potential drive, media, Temperature/Humidity Operating: to 4¢° ¢ TemperatUre: 160 (3*(5fl°'EW (104° 7). Derate Temperature 5.9° Cc/1000 m (1.8O | c/1000 ft) 10% Relative Humidity: 90% to ~ maximum wet bulb gBO C O(8.2o F) minimum dew point 2~ F). C (36~ with and Non-Operating: Temperaturei-ééfio c (-48° F) to 66° C (1517 F) Relative Humidity: 10% to 95% | Operating: 2440 m (8;696 f) maximum. Altitude 9.1 Non-Operating: | *’afl/‘/ maximum, - (306,000 km | - | f) Operating: Half sine shock pulse of 10 Shbck " Gpk and 1@ +3 msec duration applied of three once in either direction axes (3 pulses total). orthagonal Half sine shock pulses - Non-Operating: Gpk of 40 perpendicular and to 3¢ +10 each of ms six duration package ‘surfaces. vibration Operating: Sinusoidal vibration (sweep ' 5-5¢ Hz 0.002" DA octave/min) | 1 rate #.25 Gpk 58-500 Hz .25 Gpk 500-50 Hz DA p9.002" 50-5 Hz Non-Operating: Vertical -~ Excitation Axis 1.48 Grms PowerHz. overall from 10 to 308 to 10 from g/Hz spectral density 0.0629 from 50 Hz with 8 dB/octave rolloff 50-300 Hz. I/1-19 | - - | o Longitudinal Excitation to 200 ¥.007 The and @.68 Hz. g/Hz dB/octave Dust - Power from 16 rolloff drive will atmosphere of Latefal Grms from 190 spectral density - with from 50 50 operate less Axis Overall to Hz 200 8 Hz. in an ambient than 5 million particles @#.5 microns cubic foot of air. or larger The drive per 1s intended to run in a light industry (or cleaner) Attitude Maximum pitch:'iS degrees Maximum Heat Dissipation environment. roll: +5 degrees 546 BTU/hour maximum I/1-20 ) Table 1-3 RLO1/RLB2 DiSk Drive Operational Specifications Linear bit density: 147 _'bits/mm (3725 General at bits/in) innermost track 128 sector: 16 bit words per Number of sectors: 49/ track for (125/in) 4.9/mm density: 9.8/mm (2508/in) for RLO2K Track RLO1K, Number of recording tracks: 256/surface - for RLB1K, 512/surface for RLO2ZK of A ——e Number 2 surfaces: Formatted capacity (megabytes): 5.2 for 10.4 RLO1K, | RLO2K for Encoding method: MFM .Transfer Rate Bit Rate: (unbuffered values). Latency 4.1 megabits/sec +1% Bit Cell Width: 244 nse¢ il% WQrds'{IS bit): 256 kilowotds/sec +1% RotationalAFrequenCy: 2400 rpm +0.25% Average latency: 12.5 mseciG.QS% Maximum 1atehcy 25.0 msec +0.25% Seek Time 55 Average seek time max msec for tracks 126 tracks | | "RLO2) One cylinder seek track 5 msec max time 180 time Maximum seek | - Head switch time Stért time: Stop time: Data Format max tracks RLB1, 512 RLO2) 8 msec 45 seconds V | Refer to Figure 1-10 I1/1-21 msec (256 for Start/Stop Time (85 RLO1, for 30 seconds for tracks 1/1-22 =5A315s04|i7704HIANITADS1|1o_S§.H.0O.M91G1'ZV9S.S0H3I|AVIHJHO| Nvyivasel01:S¥aHSoAOHMOM|v1iva OAH3S V1va 2inb1ig PI-1 eied jewliod 0 ZLYd95H8 d I| TR INAS||1 8— | Lud SQHOME 900L-20 —4oSl31S8|WVuL]SOHdOLD3S3,SINdS=)S€5Q2H9O‘(MS A|| ,, | | |.H1V|AoiadvHa £6121| |o4O HAS|L4d||HAQH 1O0LdD|3SZHNdGZ9)(sviva . Z0d AS|Lud|[HAHHO1L0Dd3S|NZi+d|(s71629)viva 20d 7=) Table 1-4 Operating Environment RLO1K/RLB2K Disk'Cartridge'SpecificationS' The cartridge will operate in air yhose tem- c (48° F perature lies between 406° Cc to 48° to 128° F) at a relative humidity of 8 to. The wet bulb reading shall not exceed 83%. 25°% ¢ (78° F). Before a cartridge is placed into operation, it shall be conditioned for its cover within hours two of a minimum in the same environment as that in which the disk drive disk drive. is speci- above The operating. the toly fied range does not necessarily app Storage The cartridge must be stored o’at 486~ ture Environment between - C a tempera- to 65 C The wet bulb reading (-46° F to 158° F). For wet bulb F). (85° ¢ 29° g exceedin not temperatures between 8.56° C and 29° ¢ (33° to able withstand condensing) a | 50 | The external diameter of the top cover o1is | cm (15.1 in). 38.35 The external of diameter The external height (2.44 (14.58 is 37.03 cm resting Geometry exceed not External Diameter_ cover Track be (non- The stray magnetic of 8 to 80%. oersteds. Maximum Speed shall humidity relative 1intensity shall field Dimensions (Cartridge) cartridge the disk F and 85° F) on in). its of bottom in). the the protection cartridge surface | is when 6.19 cm The rotating parts of the disk cartridge are capable of withstanding the effect of stress at the speed of 2,500 Number of concentric RLA1K, 512 Tracks tracks tracks I/1-23 rev/min. There per per data data are 256 surface discrete for surface for the the Data Track Identification of Data Identification - Data track iden- tification Tracks is a three digit decimal number (668 - 255, RLO1K, 0868 - 511, RLO2K) that numbers data tracks consecutlvely starting at the outermost surface. data track of each data Data Surface Identlflcatlon - The data sflr« faces are uppermost _head numbered @ and 1 surface and with the correspondlng with starting the numbers. Cylinder Address - A cylinder is defined as the data tracks on the data surface common data track identification. with a Data Tr"‘ac‘kx Address - A 16-bit word, where bits 6 - 5 define a binary sector number, bit 6 defines surface, and bits 7 15 define a binary cylinder address. This information 1s in word 1 of each sector's - header. 1/1-24 - CHAPTER 2 SYSTEM-LEVEL DESCRIPTION RLO1RLA2 MASS STORAGE SUBSYSTEM 2.1 to four drives The RL@1/RL@2 Mass Storage Subsystem consists of up(RL11l, or in a daisy-chain configuration, and a controller itate RLV11l second a Additional drives, if required, necess RL8A). Figure 2-1 illustrates a typical subsystem. controller. DISK CARTRIDGE 2.2 FORMAT Figure 2-2 shows servo, header, sector and data. formatting for. the RLGlK/RL@ZK Disk cartridge. at the Servo and header 1nformatlon for each sector 1s prerecorded field. the in ten rewrit or ed modifi be factory and cannot 1is Accidental overwriting or destruction of the servo information prevented by logic within the drlve., Each RLOlK disk recording surface has a total of 256 data rracks (numbered @ to 255) and each RLO2K surface has 512 tracks (numbered 8 to 511). Thus, there are 256 cylinders on an RLO1K cartridge and 512 clinders on an RL@2K. ‘Data Format 2.2.1 "Each track on the recording surface is divided into 40 equal-length sectors which are further subdivided into fields. of 16 The six flelds in each sector contain a total of 140 wordscontai n words One hundred twenty elght of the 14@ bits each. | , data. Header Preamble (PR1l) - These three words precede the header information and contain 47 "@" bits followed by a marker "1" (Sync Bit) to indicate the start of valid 1nformat10n. The - This field contains three words of 16 bits each Header the lower), or (upper surface disk the ies first word identif sector the and RLA2), 512, of 1 RLOl; 256, of cylinder address (1 ‘address (1 of 48). " The second headervword 1s all @s. CRC word. The third word is the header This check word is prerecorded on the track, as are the_ Durlng a read operation, the header is other two header words. checked for errors. If one is detected, an error flag is raised. Header Postamble (PO1) - This field contains 16 "8" bits. separates the "tolerances header between and data fields to allow for It mechanical drives. by Data Preamble (PR2)- This field contalns 47 “9" bits followed field a marker "1°" and (Sync Bit) to indicate the start of the data is written in conjunction with the data. 1/2-1 {\ 1 CONTROL | UNIT ' <:::::> RLV11 RLI1 | cuU/DRIVE INTERFACE <: E ~ (DRIV0) RLBA e @ . STATUS ommsSus 0Q-'BUBUS ~ } ) SECTOR PULSES oe SGEEETKSTATUS + WRITEDATA (.DRIVEA 1) DRIVE2) | (DRIVE 3) Figure 2-1 TYPical'RLfll/RLGZ Mass St0r5g9'5ubsystem.“ | MI/ZfZ e , CZ-1007 LyOY3ZSilg—|1susorou3zet]Ttm9LsSuSoy3Z9yT:m LOY3ZS188v0ZS1891Si1891OH3ZS118 3OA5bI3Nsd|43AvaHVV¥HOI1Ii3AWiAA|avYVvVPJva3aN33aSIIwS3HHo1uS7l8831I8EWd15SWaVG3748VAssNWIWIYVVSN3|1|dOISdY|0gdaduva1oZ241AJm4u00SQI4|dddHNO'WYSIIUNOBWNvIgG- TiNsIvIAw-aH£D€€NL|IaSSSQOuQAQyNOHYYo3oOOOmTMMM- em—Z|_LaDHL3JOI|S0M0LUYWEoSMLG§"._]alPQE—isyIuouV3sOSssu:MuwgRlg|oEo1s—0fTtl|muV4NeQZ3:TsL|aHLVSO|3RMgIs8Hyu.|og-Q m—B+o.L4lb—) vi|s1vo’)a|rQHiqOu9sMLoism88u991gz_1LQ|7zUi|OsAMi(jg8|zso6tru9<a|ssy8ues3oa-|1smNSs~8ngugs)|! |-3 WOLD3S ] 1/2-3 __ , |S1SHNg-_ | 318WV1SOd|e|g3.8S1SHUNg | L4 YIy} . _ .OWVISOd 0 | 7 v a z | s e z viva — 8v0ZS18 o _ r— 4 92anb1g Z-Z ACBTY/MTBTHd ysiq 8bprajie) SOI3STI83deieYD \ . u a . . / , :X- A!i s75Z9 -[|1 \ — — 8SW 1VV ‘Data - This field accommodates a tdockxof 128 16-bit data words When writing (2048 bits) followed by a 16-bit data CRC word. and appended r controlle data, a data CRC word is generated by the to the 128-word data block. - The contents of the data block. with the the drive, the block data and 'CRC Detection of a data controller. L 'CRC flag. | of contents When word word vary the CRC reading are reading error - the data from the 1in checked in a results | ; data Data Postamble (POZ)V— Thls fleld con51sts oE 16 "@" blts. ‘Write - current is turned off at the end of information will not be destroyed. | 2.2.2 thls field so that data CRC | Servo Data of the servo-in-data Introductlon - One of the features 2.2.2.1 "design approach for track counting and carriage positioning is the This 1is fact that it shares read/write heads and circuitry. different from IBM 3338 technology which, in general, requlresta'» servo dedicated servo and head 3330- type servo While track. information is monitored cont1nuously as the disk is splnnlng, the "RLO1 or RLO2 only takes servo samples (much llke snapshots) during “each sector pulse. : The Servo data bursts are- prerecorded on the dlSk surface durlng a The sector pulse is certain time perlod within the sector pulse. generated by a separate magnetic transducer mounted on the spindle which senses each of the 4@ sector slots in the cartr1dge armature | , plate. ' Since the cartridge disk spins at 2400 rpm andothere are 49 sector_ drive takes servo samples slots, the 'countlng every 625 m1croseconds.; 2.2.2.2 for positioning Modes of Operation - While the drive operates in either of two modes = . heads are o Velocity (seek and track 00unting)hmode; or e Position (ttack'f0110Wing) mode and track S flylng, the In velocity mode,'the dr1ve logic counts track crossings by u51ng-‘ servo information recorded on the disk surface and converting thls information into binary format. This information is used conjunction with carriage velocity (sensed by the-tachometer) to decrement a track difference counter and'ultimately to control the velocity of the p051tloner. Thls process is descrlbed 1n Paragraph | 2.2.2.4. The drlve does not enter p051t10n mode unt11 ‘the track dlfference counter has been decremented (while the drive is in velocity mode) to zero. In positioning mode, the drive locks on to the required track. Position mode operation is described in Paragraph 2.2.2.5. 1/2-4 ~—— 2.2.2.3 Generation of Servo Signals servo data that are prerecorded on sector pulse. They are identified as are approximately 15 microseconds made up of two square S1; S2 and S2). inches or half a If length. Figure read/write head head. is centered See Figure the S2 samples samples, a 2-4A., If are 180 (from wave (from S2) as the head See 2-4A. Figure Sl) is Mg 1is the integration data from as part 1ntegrat10n of the composite S and in 2-5., shown graphically centerline, The integral wave shown the of S2 it will be called E2. the - this, Sl a 51gna1 signal With the will jagged of the not be llne a S not a perfect samples E1 sawtooth, and is @ or 1. The the 51gnals El determined. These sawtooth, a to the it flip-flop same Held will the be still a perfect perfect shown Count is in converted to a becomes a sets resets or El ROM, Held, E2 Another and bit E2 of Held) the the data sine wave, wave. on 2-5. This If El of if it is logic first whether El values become a new E2 are are ROM 1is the sawtooth The depending is perfect El, digital @0; E2. These two a new El and The head a on Figure digital 1. thing happens to and E2 Held as four signals (El, address it servo signal. When - The conversion of El and E2 to binary format is simple. a perfect and 52 the control called head - 52 signal is not therefore, Sl an The first part of this pro- Fiqure S1 below it. integral is the the with alternating Sl binary format centerline, 'signal phase to is wave. is is output slightly off alternate converted track - sawtoothed E2 is centerline of Velocity Mode Operation - As stated before, information and its Rather, of will detects process for the positioner velocity. track sample (i.e., S1 and (50% duty cycle) degrees out wave 0 2.2.2.4 sine of than a 50% duty cycle results vice- versa) ‘I‘his is shown in sine samples. a servo the head is moved perfect ~imperfect on bursts 2- 4B Because ~cess Each and S directly over the center, a wave shape with greater (i.e., more S than § is sensed or Figure two 2-3). the S and S components a pure sine wave the are These components are offset radially by .004 data track. They are also 180 degrees out of (see from There wave components, S phase the in - the disk surface during a servo samples S1 and S2 and part address of an comes from a signal 1indicating the direction of head motion (sign forward) and the remaining three bits come from the velocity signal from the transducer (after conversion to digital form). The output of this ROM goes to the Count ROM Decoder, which is ~used to decrement the track difference 1,/2-5 counter. SNOIAIYdV1VAQY0234 Ry@vfi<¢H~”# )g21nb1o>um.TmlmHOc1o0f3lSum3u5wNcmdu_m|fi¢msm: 60 L-2D hun) 2HVQ3iayvo3aHd3d . T N — 14 zg| ey T 1/2-6 I1/2-7 ILLLEm_..lui.EpnimnanBaslsl _.Al,mBISRIS)_.m._.lv_uékfiglrnro.rnTty 2X:R1 -| | -- JIHIONWI)HI'LSNNIVDHLS(*(<2S1SS(OA/Y3\S:LS\HN<ES,V\G3<0H(0J/34\3Yld\NO/M\SI0rQL0L)-2J| I4AN0OI4N1IvTH IMLONVTHDL 34IN0OI4N7IVTHY3MLONVIHDL ~ 1S'S31ISOdWO0D 2Inb1gp-g oalaseledswiojaAeM 1S'SOAYH|IS1SHNETSV@30H0I343YdNOASIA“''SS''SS3311ISOSdOW4O0DD‘SS3LISOdWODNOVLvaMOVvHlINITE31INID S01T0A 1/2-8 :owym»wcw.m1N.¢u=mMm~~mwo.Nmncm. 1 0L-Z2 0 - --cImNbM}Y_IoLflNzT-_DO-SLTOA2I2L§ISN\OdW0DNOV~\1va2M3|OQVN3HLLVIHNOIITLAYN3ILNID ‘1NSO'SV3i1vIaSMOdVNHOLD 2.2.2.5 Position Mode - The drive enters this mode of operation when the count in the track difference counter is zero, indicating that the head is over the centerline of the desired data track. At this point, the S1 - S1 composite signal will be a perfect sine wave, and its integral, El, will be the sawtooth wave shown 1in Figure 2-5. The average of the El signal will be zero, and the logic will send positioner, a zero indicating signal that the (positioner signal) positioner should not to the move. If the head drifts off the centerline, the signal E1l1 will no longer be a sawtooth wave and will no longer average out to zero. Thus, positioner signal error (the amount head returns When positioner in the positioner, (12¢%), to READY be and the this signal TO an analog is away value signal will move is the R/W nominally head will be has zero locked asserted, represents the track centerline) the positioner so for 6.5 Guard Band The Servo on so write. 2.,2.2.6 that from the data the centerline. indicating signal or will the head ‘the that | | bursts are milliseconds centerline, the drive can read the - not only used for locating data tracks. A special format at the far outer and far inner formatter tracks 1is used to identify "inner" and “"outer" guardbands. An absence of S, bursts and the recording of contiguous tracks of S, bursts identifies the "outer guard band" ~or the portion of the recording surface closest to the edge of the disk. An absence tracks of S, Figure 2-6,. 2.2.3 MFM portion of The disk of S1 bursts %he bursts recording surface ~ Encoding drive and the identifies the and recording "inner closest | of guard to contiguous band" or - | | Precompensation utilizes a Modified the the spindle. See | Frequency Modulation (MFM) encoding surfaces technique to magnetically record digital data on the disk (Figure 2-7). With this technique, each 1logical one produces a successive flux reversal logical zeros containing a logical recording has the on use the disk for recovery zero two 1loop system. of the disk the phenomenon reversals cause problems tend to appear bit peak a cells, logical repel pattern—-sensitive to one bit in one. least a cell. a in disk wherein it another. recovery I/2-9 a of to data constant - recording 1is reversals a written on This can this, they were wrltten. problems. reversal feasible speed.. Because Two cell method of flux self-clocking magnetic flux bit This one loop circuitry maintains from where data at form associated with displaced its thereby making variations shift, of flux reversal following Phase-locked called center a techniques bit density despite minor One the advantage of putting every phase-locked in produce the flux 3INOZ V1VA/OAY3S T - @yvno ~avaH (sisunaGsavNevg) 43LN0 b b I ‘ ~ dNvs ‘1/2-16 ] L 3LIEUMCINJHND SUB'EHZTVYNI NON)18(QOIH3d LML BR el (-7 2imbia 1/2-11 ! putpooug (WJIW) uoijeinpow Aousnbeig parjIpoW 3WiZUd3Na3oL1OILdHINMH3MIYvV2i.0iv1va2ad— T £101-20 To offset the deleterious effect of peak shift, precompensation logic is included in the controller. This logic displaces certain encoded data pulses by 15 ns in one direction or the other before they are written on the disk so that the peak shift phenomenon displaces the flux reversals written on the disk to the desired positions. To determine if an encoded data pulse is to be displaced from its "nominal position, the preshifted only if: 1. It is than 2. It rule ‘may be used: bounded on one side by a pulse 1 bit is cell bounded greater than cells away). 1 away; A pulse will | that_is not be more and on the bit cell other side away (for by a pulse example, o that 1.5 or 2 1is bit The direction of and zeros that The controller the preshift depends on precede and/or follow precompensation the combination the bit to algorithm is be of ones ~., // | following preshifted. only concerned with the four conditions illustrated in Figure 2-8,. Any other combination of serial data bits does not require preshifting. The ~algorithm consists of continuously examining a 4-bit pattern (the bit to be written in the current interval; the bit to be written next; and the two pattern, either position or immediately leaving advancing Thus, for the must be preshifted compensate bit for a or the delaying pattern 15 peak preceding pulse 1000 to the bits) be and, written pulse by 15 shown in Figure 2-8, to the right to the left. For its on that nominal nanoseconds. nanoseconds shift based in the third bit (delayed) to the hit pattern PPA1, the third bit must be preshifted 15 nanoseconds to the left (advanced) to compensate for a peak shift to the right, and so forth, | 2.2.4 Bad Sector The Bad Sector or RLO2K Disk serial to number. avoid | File File is a list of Cartridge. The This allocating all bad sectors found on an RL@1K file also stores the cartridge information user data to is a used bad by the operating system sector. The criteria for determining that a Séctor is'bad are as follows: Inability to‘tead a sector header ® 16 consecutiveread/write ertorSVWithin one Sector.' file cylinder. contents of 1is This the recorded on ‘surfacé‘ "1" track contains 40 sectors file in Figure are shown 1/2-12 of of 2-9, the 128 last words (1nnermo$t) each. The Nz This ® PRECEDING BITS | DISPLACEMENT BY | : PRECOMPENSATION DELAY ! NEXT o 0 BIT meTETEN o | BITTO PS<—1—=PRE (WRITE LATE) | Q | 0 0 PRE<@—t—s PS | ADVANCE 0 - — (WRITE EARLY) 1 1 0 o . [ (WRITELATE) 1 l | * - 0 T y — T TIME — NOTES: | - (1) PS e DIRECTION OF PEAK SHIFT. PRE ¢ DIRECTION OF PRESHIFT TO COMPENSATE FOR PEAK SHIFT. (2) SHADED AREA = DON'T CARE C2-1014 5 "Figure 2-8 MFM Precompensation I/2-13 ¥2anbtg6—-2HO10D32S3-_ 3_NVSLVWHO4SV+—1SHI4Q-vHO1-23SAHLN3 1SHiH4LNa3ve4YA 1 3043Z ,S :L HIA,NITADS3IHAY aNOJ3S -9 | (174 1VS3INO peg10303S3[T1djewiNod GH3Sa1OIv8SH0V1INeION3S S£3043Z SHO103S o OML A 235 @ S‘4tH0:O3L1L0DvI3dSNAa O O wlev mje - v ~o |2 - N (M = - < 0 - 0~ oo Nl - - e - QO ON N N NN <t jYe] QO ~ s ol =2} ~N | 1/2-14 (3] NN NN L ;N A & TM! TMM TMMTM TM’ m Mmm - N M < W~ | CHAPTER INTERFACE-LEVEL 3.1 The Controller/Drive Interface Line Descriptions Control Unit/Drive Interface Bus comprises twelve 3 DESCRIPTION differential signal 1lines and one single ended power fail line. Figure 3-1 shows the Control Unit/Drive Interface Lines. A maximum of four RLA1 and/or RLO2 Disk Drives may be daisy-chained to the controller via this bus, | Drives are selected by means The selected by asserting ‘When the drive the drive Drive 1s commands can ‘to controller as the Status ~Read be indicates two it Ready line. ready, Seek, a data is serial encoded o - binary encoded is ready to select receive lines. commands o Head Select and transmitted serially, Command. or write of that | word Read Status Drive status 1is transmitted when requested by the Get in serial MFM format. During the absence of any command and whenever the disk drive is - selected and ready, it is transmitting serial read data to controller.,. Table 3-1 describes the Drive Bus Ihte:face Lines in détail;. I/3fl the 382H(1OSLN3D1dS) I/3-2 Table Signal Name Drive Function t Selec@, Drive Select 1 (DR SEL 6, DR SEL Drive Bus Interface'Lines 3-1 1) These two lines select one of four disk drives. The drive must be selected 500 ns +10% before a Write Gate or Serial Drive command word is sent to the drive. One drive 1is always selected even though the <controller 1is selected drive idle, Only the asserts ~the drive-to~-controller these 1lines after the drive drive will partial while Write Gate (WR GATE) its to be has been and nanoseconds selected. if it is asserted. pulse enables lines, 508 transmission pulse sector selected at the precede interface valid inhibit sector This line the are is of It must be 1in asserted- start of Preamble PR2, and the first bit of write data 250 nanoseconds. asserted during a a selected the write circuits drive. A must by 0 Write Gate must not sector pulse; other- e "wise, a Write Gate Error will be asserted by the drive (bit 18 of status word) and ~operation removed 250 This (RW Ssystem Clock (SYS CLK) the end line contains coded in Modified (MFM) pulse form, on the disk. | to the drive and servo. the serial Frequency that Gate (B 1is to is to data, en- Modulation be written | This line is also ~Clock Megablts/second (DR CMD) Write Postamble P02 "This clock shifts the Drive Commahd word motor Drive Command of nancseconds) Write Data DATA) terminated. at operates frequency the disk is 4.1 +fl 1%, used to transfer control and cylinder address difference information serially to the drive, It is enabled during Seek, Get Status or commands. I/3-3 Power (PWR This Fail signal is all times, selected. FAIL) powered - received by all drives at regardless of which drive 1is When the subsystem is first up, Power Fail is negated high. If AC power 1n the controller 1is subsequently lost or out of tolerance, Power Fail is asserted low, in which case ~the drives unload heads and cycle down. Return cycle ‘Drive Ready' of up power and causes load heads the over drives track to 8. When asserted high, this signal indicates that the selected head is centered on the track, and the a command. after drive is The the last bit difference word of has selected drive; select 1is transfered though the address and (3) (2) when Drive ready low: a will receive cylinder been to a the 1is and the to go low are the new head drive, even an is zero; address no head drive. There (1) address shifted when there occurs. to this. has been to goes difference difference of zero change 1is shifted to error ready signal when two select a drive exceptions The first is when an attempt made to write on a write protected drive. drive error will In that case, only asserted high. The second exception 1is that whenever the heads are loaded, for whatever reason, the volume check bit will be set and drive Status Clock (STATUS CLK) - error will be be asserted high. This clock 1is the System Clock delayed through drive logic and returned to the ~controller when a requested. The clock sync word new ‘the with the and remains Drive first 1input to the or 1s bit in Command register, status sync marker of the on 1is in status until: (1) a is received at drive (2) word turned the command drive shift is de-selected. Pulse This 625 high (SEC microsecond pulse is asserted PLS) and occurs every 625 microsecond +1%, 40 times per disk revolution. When a drive 1s initially must wait wuntil the next pulse is detected before sending the sector pulse to the controller. | selected, it full sector I1/3-4 N Sector the by received ©pulse sector The controller is generated by a magnetic The leading edge of reluctance sensor. the sector pulse has a tolerance of +13 Data (RD DATA) - the sector pulse. This line transfers MFM encoded data from drive the troller. read circuits During - command and whenever to the conof any Read | Data absence the is selected a drive and Drive Ready 1is asserted, appears on this line. \'\M/' recorded the This tolerance is required for alignment ©positioner and gap relative to Read to relative microsecond ~data. head the of amplitude the senses The drive over Data Read sends and preamble header the Read Data line 2.5 +#.5 microsecond For the where from downstream actually starts. reading headers, the VFO preamble | | loop phaselocked with the arrival of Read after the end of the sector pulse.' is Data For the data'preamble, the VFO 1ocks 32 read pulses after the header CRC to avoid transmitting erroneous sync pulses to the the transition between the clock at data header and the pre-recorded of the preamble the VFO has had Detection preamble. marker commences after time to Drive Error (DR ERR) phase lock. on certain This signal is asserted high Any attempt to write on a drive errors. write protected drive also causes this Asserting signal to be asserted high. Drive Error causes bits 14 and 15 of the CS register to be set, The partlcular error involved initiating reading the a can then Get bits 1@, status I/3-5 word. be determined Status 11, 12, by command and 14, and 15 of The Drive Error 1. Manual disk power down/power up 2. DRIVE COMMAND WORD Figure 3-2 shows the command .'I‘he drlve drive command line. 3 of be reset Removing the Write lock condition via the drive Command word is sent the the by: bit Drive After can Setting serial Drive of the Disk Address a Get Status command) (bit 3 Command register during 3. 3.2 latch front panel. Word conflguratlon. to drive over the command word serially the drive has received a (16 bits) without the Get Status bit set, the cylinder difference address is loaded into a cyllnder difference counter and the head The drive select bit is latched in a separate register. immediately drops Drive Ready for a minimum of 6.5 milliseconds. This delay allows the selected head to reposition in case the cylinder dlfference address was zero and only a new head select other than zero count difference cylinder Any sent. was bit ‘causes the head to'moVe to a different track location indicated by the count and the sign bit (bit 2). As soon as the selected head reaches the new cyllnder location, the 6.5 milliseconds timeout is again initiated. The selected head must stay positioned within a "tolerance the 6.5 high. band durlng ‘the milliseconds A Seek the selected seconds. Marker the When (Sync) the fails Marker shift and Drive Ready again lock back on track within (bit to 12 word. at the to 1s is requesting the at the be will Marker end of the Get Status bit drive drive recelved the drive to end bit, send its occur to if 1.5 do enables command. command the full it knows status. It will then shift the drive status word to the controller. 15: 04 of the command are 1gnored durlng this operatlon. Sign - The - will move. of asserted commanded the the drlve has - When thedrive receives controller the receive to the | word) a the drive the drlve, register bit has shifted | of status by whlch - When recelved command Get Status that head Only then, will register, 1t 1nd1cates that command ~ Timeout error This is the method drive shift timeout. period, Bits | Slgn b1t 1nd1cates the dlrectlon in which the heads A one in the sign position moves the heads toward the spindle (i.e., to a higher heads away from the splndle. cyllnder I1/3-6 address); a zero | moves the Reset - When asserted, the Reset bit clears all error sense bits in the drive, If the error condition that set the error sense bits has been removed, the error sense bits will remain cleared. However, if the error condition persists, the error sense bits will remain set after the appropriate timeout. | Head Select - When this bit is ‘clfleared, the head on the upper When this bit is set, surface of the disk is selected (head 8). the head on the lower surface of the disk is selected (head 1l). Cylinder Address Difference - The cylinder address difference is ~ the magnitude of the programmed seek (i.e., the number of tracks Transmission of zero difference and no the heads are to move). change in head selection should be avoided, since a 6. 5 msec The timeout will occur before the drive again becomes ready. relatlonshlp between the System Clock and the Drive Command bits is shown in Figure 3-3. If the Reset bit (bit 3) 1s asserted together with the Get Status bit, (bit 1) the drive will first reset all drive error latches and then send status back to the controller. | 3.3 GET STATUS COMMAND AND RESPONSE In response to a Get Status command, the Clock and sends the status word (Flgure 3-4) drive enables Status to the controller via Ready or the Status line. - | of is not present the status word Multi-Purpose This function can be performed even though Drive (1i. ee,'durlng power are as Register up a seek). listed in Table 3-2 and placed (MPR) of the I/3f7. controller. Contents into the | 15 14 13 12 11 10 94’ 8 | ol128l64[32{16] 8 [4 | 7 6 5 4 3 A2 10 2] 1|00 [ns|rsT[sn]Gs| m ] CYLINDER ADDRESS - - T DIFFERENCE (25 = 256) 'HEAD SELECT (0 = UPPER, 1 = LOWER) RESET - | SIGN | (1 = MOVE HEADS TOWARD SPINDLE 0 = MOVE HEADS AWAY FROM SPINDLE) GET STATUS - MARKER (SYNC) _ CZ-1038 ~ Figure 3-2 Drive Command wOrd‘Confighration I/3-8 ____.__;__f_ IF DRIVE COMMAND IS NOT | "GET STATUS", THIS TIME MUST BE 0 TO 4 uSEC. SECTOR __| | PULSE | | DRIVE : COMMAND : ' BIT 1 | l BIT 2 e — ‘ | | CLOCK | | | — ) , BITO | | | c2-1018 Figure 3-3 Relationship Between System Clock and Drive Command Word Bits I/3-9 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 [WDE CHE |WLS T SPE |WGE| VC |DSE| 0 | HS | CO | HO | BH |STC STBSTA] SKTO DRIVE ERRORS STATUS CLOCK ~ —— 4 | | ' ' R : DRIVESTATUS LJ STATUS WORD o n o) - 2 DRIVESTATE L | | BIT | BIT I BIT J BIT | - | 3/ et BIT | 15 Cz-1019 - Figqure 3+4 DrivéfS;atUSPWQrd,; ’ 1/3f1G ?°t | [0 Table 3-2 Drive Status Word Function Bit(s) " Bits 0-2 These bits define STC STB STA Y 2 Load Cartridge State ) 1 Spin Up B ' 1 # g 1l -'lv g 1 @ Load Heads | Seek-Track Countlng. 1 0 1l 'SeekLlnear Mode (Lock On) 1 1 .” 0 - 1l 1l 1-. ‘Spin Dde Brush Home (BH). Asserted G' | g Bit 3 not over "Bit 4 the ' Heads Out the state Brush ~ Unload Heads Bit 8 9 ‘\\W - brushes are | | - Asserted high when the heads are over Cover is open | Open the (CO). dust Asserted cover is Head Selected (HS). head. This bit is hlgh in when | the place. cover | home | . Identlfles the currently seleCted zero to indicate the upper head Asserted high by drive that Must be a zero. Drive Select Error senses Volume Check have not | 0), Reserved. first Bit high when the to (head Bit 7 | disk. (HO). drive: the disk, and low when positioner is retracted or Bit 6 the Cycle' position. Bit 5 of been a (DSE). multiple (VC). unloaded select. When high it indicates the heads 51nce I/3-11 the last drive dlalogue. Bit 10 Indicates that the drive Write Gate Error (WGE). sensed a Write Gate when the Sector Pulse was asserted. Asserted high if the Write Gate remains asserted at the ~arrival of the next after or pulse, sector 625 micro- an error seconds have elapsed since the previous sector pulse. If Write Gate is asserted during the Sector Pulse, the Bit 11 negate the Spin Error (SPE). Indicates the spindle did not reach speed in 40 seconds seconds per 625 Bit 12 overspeedlmg 1s or mlcroseconds gone off track or have ‘Bit 13 __Drlve erte Locked (no seek) (protected Drive Error ‘Drive Ready error, the via front line .to will write protected a panel switch) asserted get not drop controller may for at that instant. From fact, the dr1ve was Write Locked. high. the Since particular this Lock a subsequent Get | Indlcates write current was heads even though Write jasserted Data causes in the diagnostic may verlfy that, hHead Current Error (HCE) ferte drive report a Write Error Status command, Gate was not Gate was « Data ‘asserted . (WLS) is 1in erte Lock Status 2 An attempt to ‘write on 1in the 1.5 for This iS'interpreted in two ways: '»selected drlve detected | A Indlcates to the system user that the 1. ‘Status b1t - - o | Seconds.“' Bit 15 micro- by +15 sector. Indicates the heads did not come ‘Seek T1me Out (SKTO)‘ time during a Seek Command (15 required the in on track seconds) Bit 14 set and Gate, Write will drive but Error no (WDE) ~ Indicates Write tran51tlons were detected on 11ne. 1/3-12 the Write N DEVICE OPERATIONS 4.1 can | into two functionally divided internal and external functions (or responses to controller internal machine cycles are llsted below. Load a '_ - be internal functions (or areas: different Drive Disk The RLO1/RLO2 CHAPTER 4 | FUNCTIONAL DESCRIPTION cycles) machine ‘"The | | commands) Cartrldge | Spin Up Brush Heads Load Seek | Lock On Unload Heads ~Spin Down The four external functions or controller commands that the drive functionally reacts to are Get Status, Seek, Read Data and Write The other controller commands are 1invisible to the Disk Data. | in the controller. functionally handled Drive and are | o INTERNAL MACHINE CYCLES 4.2 The RL@1l/RL@2 Disk Drive, once power is applied, will be in one and only one of the eight machines states listed above at any time. This is accomplished by the State Control Logic, and internal This device monitors state ROM. the primarily by conditions and external The state ROM as protecting error controls of each and to control sequencing the drive during conditions description inputs the drive the through state the error conditions. of the The are explained - | o Functional block diagrams? and timing diagrams are well responses failures cycle. drive. states as 1in to the presented' to show what happens in each cycle and during the transition into and ~ out of each cycle. Each function block is treated as a "black box". Control signals and data paths are emphasized to show their timing diagrams relationshlp to the device operations. Details of the "black The functional block diagrams and 'boxes" are found in Chapter 5. Set use signal mnemonics and Fleld Malntenance Print references. Figure 4-1 is a block diagram of the RLEl/RL@Z Di sk Drive. The detailed logic has been broken down ‘into functional blocks and 1is keyed to the structure of the RLAl and RL@2 Print Sets. The Drive which represents most of the drive electronics, Logic Module, compriseS'the areas in the blockd1agram that are listed below. State Control Loglc (DLl) Velocity Command Status Data Control Count Logic (DL3) Disk Speed Controleoglc Error Logic (DL5) (DL4) 1/4-1 Loglc (DL2) ® ° InterfacevLogic (bL6 and DL8) " Integrator Logic | (DL7) The remaining drive electronics are contained on the separate modules listed below. ~ DC Servo and Power Supply Module "AC Servo Module Read/Write Board Front Panel Board | | = L hwENU#fanva_.NEUB3_A e (Ns|et’H)—|410318a¥0vO13i158Id3¢v5$(i1v30v84|dIiaNd35173.JN”Ad1I10H{OUH0)AI1N¥3ODSD3BHODY1TH33)(151)2)3§.7dMOLI2S{631S0}N4-®(11)a{)HM)-L/w6i%edm»3.awS.3p.1lOwlV_h1B.v_S.U»3o5a(5H)s|1907%ADLOIVDaH¥OvLOT31IgDAN3vGSOI1NJv3DaS0I9L3(N1H5da)7}l{N4dI'7N{)HO)HHOL14I3MISMO(41WNN_OMMV1.3_.534YAk0‘2—aoI13oHV0sna(o(1N1vM(o0M1Y3}S_TI£30MjOYA,B3ISIt€8lHASe3NSWHOE)HM[TSw{1o}LDvg|dvGd!. A . o T o |t oo [e|E] or 1% o 1wMTgrBwmP1e,mHSVMl,|j—fk:eme=MTMH((GoTol]Ei.M3W32N)]))mR015~OLVf9v>I03HZlY7uL—a.I3E(mLiu8INmN7CIJI0_)l-|.RT11V/-LI213t¥P:Mp.17L3132%E5vY330F1991fMT0SMaN3B¥S3n%lE0N9A/nl8sL1§O_M1~T20QA18dVvvnd—0VV130iuY3a.i8n1Ia30e8LHv1«—{(o90YtYoFw0VHdi1VolVL)124O)Vd(Q—s(C01v,L(11,Li¥)(a13{(.vHK)€51M(O=(11gH"/)d)}1N68.qdZ().-sv9()111n)v)3)aL8iP35vI7HAsi13a.TvI1isHB9aH:xMG13O)m5sSW3H1¥iY/0O923aHU01:0YO1H13L3O|Yv—TIT{iSHLHL3IB8U.N)VT,iGHW.EIOEIId—N1AMML1SV}1D0.(3i¥5.V3MOG12vO)IX8LV3RaUv0SO3HDBWDTUTt,38:7I33TLNG1({{(H9MvH0[M)(01}H),U0)1I¥)L14SNNIS—H/3¥L1OINN0H8S3=WdDOV<10NASONDsY3V040YHOoDN17L3DA3u9M3S3H0.N0yIN41OOS{17833v5W3L€Q1V0d11OIdYia6(1MHN13S)2((T{H'18f(:))H8H1V]}'A))Vm1A5W)w3%GfNSS5Hil0dmalaO0S7f{n1Lol1dF7aH1M71INTm3S(Y:N'M))aO1081(f0H'l%)9dwPArLVLSgTOUINO.IU-O%1L23Dy1 03oS1.a._N,3ILwIO:NIRI1HLYW(M1NA3OL5I(13SDnN8L0o\AQN1X)(OQY33OgNYT_A16V.OM3q_—¢EB2QD,wH1N1aWHB9IoO0GODI,03LL3H|NN72ZI0DYM{4i.3SH(N5D(%lHSIA1DO)2]dNVTI0{%NOBQ%3aWN¥75H25NIO3(nHO2MYG0)1LINYHvDd10OLOztBYu123JIHM7Be1).3L(3I-)_O)(OESI(M_3H)L1IDS)7eIBdA0OOLI3dIW1ALLEL3UEMII2BG7MWEDV,Y11MO0A1I94VLvLWTO0331VYII01L7Q(VDHA1I1VOQO{18NO(TVI1VtOBYIL(1NDOAgNO34Y3)DI{MT5HS3)v43Y7NH8W.S1(OHY3O)AV14NdVY0Ja33T1WSVSN3—Yd3NvN/3S-NO15I7V(SHNQ)d42m0oL0i[€8:!Y7 L¢|z4"]rr®o2-1090011eAeztsvz€:rr0i{}rillY¥B<I£OzO1Nd5LiLgl4C.OLOOIVWLWIJISN|AO+4Id47LSC1OT0WN¥Y1O4OL_|_|_SI3IS|¥aI¥.ON|iL)E NOdA0X ieo1-23 ey ¥O13S a — - v ——_— HHHSISANN0EuD8BNI331WJDO0AHI{HH(}1D11IMS(17 2|OVjOAu3S2L| ! 3LidMm ‘viva 3LIBM O W31SAS %2070 ONYWWOD HO¥Y3 35INd 3AINQ IAIHG 1/4-3 01-0v JAING 3AIMG 133138 : .» 49 : , S7d TH) . 1 NNY 7 {1 40d X901 (570 (1 80d 219G - IAING AQVv3Y | N340 H3A Yiva \ v K- 1 1 1SOd AvW%507VI(3HL95O1I¥VHN_O1Md3 W1J_BOAVLI)NOSAW 354M10V03E45 The electromechanical assemblies ’vand subassemblies listed below are represented by the detailed ' e PositionerASsembly ' | 'g o achometer Slgnal e Read/erte block diagram. Heads 'o 9051t10ner Drlve Motor ‘,oA'Splndle Assembly . e e Splndle Drlve Motor e DrlveaMotor-Capacltor | e 1Sector'Transducer;' ;_Brush Motor ® Cartr1dge Access Cover Locklng Solen01d 51gnals, data - All drlve control - are deflned 4 2l connector and paths by the detalled block dlagram.‘ PowerUp . 4 ‘ | numbers p1n | | - Power Up is not con51dered here as a. machlne State, but is treated ~as a special situation, as well as a convenient entry into the -machlne cycle. descrlptlons._,l When power is applled to the drive the signal Power On Reset ls-generated ~ This signal resets_» internal functions and therefore goes to much of the circuitry. At this time the machlne is forced to a spec1a1 case of the "Spin . Down" state.(See Figure 4-16 of Spin Down.) While in this state the spindle is energlzed but in brake mode (turnlng_slowly) and waltlng for the disk stopped timer light is not yet energized times out . to time out. (by LOAD CART EN (H)). (after approximately Load Cartrldge cycle should 15 showing the A deta11ed . LOAD When the timer seconds), transition happen. Load Cartrldge 1s found in Paragraph 4. 2 2. ,4 2 2 Notice into explalnatlon v the of o Load Cartrldge Cycle - Flgure 4-2 is a functlonal dlagram‘ control signals and data paths which are enabled | ‘the Load Cartridge cycle of Device Startup. Figure - timing diagram which shows the sequence of events whlch 'vend thlS cycle.~ durlng 4-3 is a start and 071-9v 1 WN3ILSAS. 2anbrgz-§8s1A9Qdniels-peo8bpriajie)®T124AD~ a8—2H1I9A0.7OiS—3+1.Q)n)as|nuvisrJL¥Sia)Qv34:s 3AING-3HBLSVLNSY(S¢LI}IN[6O%H'(VMB)XSIQ1)'o0Yy34GC1§—SL3iVIS2(1T9O09H1:INOD Qv33N¥O9o3HGk2108HD.OHiLONI8LM3IVSMdI.SO3T{P1-THY}8.:AOoYLLN9IVf31aDHrat9YOHl0OT)II1LANIoVP10Ht IDVIUILNG 10V4i¥INI . |a HSNaESHN0HJ1IMS{1} 180D 21901 OVGND ry W\r er I1/4-5 4 ¥oLI3s ¥3ionax = = | OAW3IS2a INOH MS (1} or £r £ YOHINGDV3INVH ¥IAOD N3O H) . w O Y u 3 3 L V 1 S { 1 S t : i 0 1 19 21901{813): 130i TOML.INOD=_ - -¥NSO1Q93_MC_{d113345C3H4OLOW z 2r, : 1 N 3 N J v QYOWY1iH) QV.O?3DCIBLEVI31042-31V1S00 or zr M Y A 0 t : : Sruvis901 : :IWOHuHoOwLyI3M,eS21(9)01 3wi1no" -21901(na) Zifr SNOLsoNNBI3OGHdYNUOOHD3M32OA1NOVI1DS-SNVGINYOWVI.ONTOID:DQHLYVDI QI3XLI»VoNDNNVI:dIYASBS)dN SLdSir " ® i€1a YNy o 1% Y< R GION3T0S " H¥B¥SSHIiI3AQaQ3HD@LO3VNdL134SOd0WOQLWS4(DH()01)(1()1)-za€-l1SGer0 \ NNYiLdYSL(dN)ND'0-0A(DH)(1)gL-gLir.L_..NSZOI,OQHL.:IT3HYHVNVIDII..S1LNNNOVo8D8Yv3_10.ND4dn0_N4;i:UOO_.._l._J.3L<1v§VOi1FsSD<_SZ_3OO1mmV.I.3S_.::S;.:T%IHO3SNNVSHYHA(I37(L130V7A22A3ANDVIWILGNYSIAIHA1INVYAHOM %HSSiNaHENODA@D3HdOSL(Y1)T(H)$11G0 IQ12vNV3OHSlSE1134(a1V)3(1)N3{H) G91-1G@gr N/ ! NQJIVWdOOS1HN1HMHOOVLQIIM("S1D)A’(D13)A(D1) .m{17-11sd@, AVOT3OQIYLHYD [ NIdSdn NIdS: NMOQ \ L(HMW1S-HG)NFug 1/4-6 720L-20 sG=z9 , / [ " These are the preconditions for the Load Cartridge cycle. - If @ The Cartrldqe Access Cover ® The ® .The Read/erte K3 No sectors_ are cover 1is open and brushes are 1n these ~Control conditions home p051t10n are being have will.be Panel the heads stopped) . home detected been met, for Device depre551ng the Start RUN up is (i.e., the spindle - the illuminated. wWhen the cartr 1dge is loaded ‘and cycle Solenoid has sensed that the the RUN switch has not been depressed | LOAD the cover "spin-up". indicator on the . | 1is closed, 'the This cycle pushbutton. » is SR heXt. is started by o : | It is possible that the controller may be requestlngvstatus_during: this cycle. would 51gn1fy 4,2.3 In this @g or case, "load Spinup Cycle - the drive state b1ts (A, B, cartrldge" and C) | Flgure 4-4 is a functional diagram show1ng- ~ control signals and data paths which are enabled during the Spinup cycle of Device Startup. Figure .4-5 is a timing diagram whlch shows the sequence of events which start and end this cycle. "These are e " the precond1t1ons for the-spln-up cycle. The cartrldge must be loaded w1th dust cover in place andv the cover closed o The brushes must be in.thehomeposition’ e The heads must be in the'hOme pQSition' e The disk must be stcpped‘ o The drive muSt,be selected If these conditions have been,m‘et', when the RUN switch (L) will be Motor - and it is . the At asserted. Power be applied will to begin rotate the sector slots located on the the State Control Logic (DL1l). the this spinup- cycle will begln' depressed. will time, Start Drive to spindle. cartridge the As the disk 1/4-7 51gnal armature Motor Spindle Drive plate turns, be sensed by the sector transducer. As each sector slot is sensed, the Sector Detected (L) signal will be asserted. As soon as the time between sector pulses is between 594 and 624 microseconds,’_' the disk speed control logic (DL4) will send Disk On Speed (L) B ThlS o will beglns Brush Cycle. --’ 2D EcCL ; 1 404035 1 21901 13534X3vdlWINOD A b4 21 o i 02OAHQ3IS € 14 .A 1 48 ir ALID0TN3IA {81Q) 21901 {971Q)21901 1/4-8 Lo eSAV3H3WNOH 0N3»QdS NNYo , -i woe . } '(1¥01391380 NN 1) ., OW.NOD 3L¥1S . 1579) HI7ONLOIMHS ‘Q3ALV8D 10HLNOI1INV (€3} d'{3N1I%J0d4ASD1 yZ0L-20 | | / 1/4-9 “ ' . | | #-6C (1)4 0 HOLOW MSIa (1)QWD31V.1SH3 'd{JiNI1ANJa)DS o~ 4.2.4 Brush control Cycle signals - and Cycle of Device shows the sequence of brush cycle 'is The - detects the Brush cycle, é'. The that next is up the following which 4-7 when to 1is the exist. to Brush which this cycle. speed the | control drive speed is (Control in (DL4) the Circuit is energized (brushes sweeping out over o Brush end disk conditions . showing during the timing diagram a When - diagram enabled speed. | cycle is provided to allow the may be out on the disk surface after functional are is spinhinq- up the disk). cycle a events which start and d,- -The bruSh drive - is Figure entered spindle active) | 4-6 paths Startup. ThiSf.disk ~ Figure data Cycle brushes to clean any debris prior to loading heads - The . is Load Heads and the transition occurs when the brushes return to the home position. The signal Brush Home SW (L) resets the Brush latch forcing the state ROM change. S | - 4.2.5 Load Heads Cycle - Figure 4-8 showing control Load Heads signals Cycle diagram showing cycle. of and data device startup. | | the sequence | paths of events | These are the preconditions for the The cover The heads ~ No drive ‘The disk As soon as the Heads Cycle. - a are Figure which - = 4-9 diagram' during is the a timing brush cycle and end this must errors must are be have completed sensed on cycle is The State Control ‘ - completed, the Logic - I/4-10 | a | speed brush S active start drive (DL1) velocity command (l18) to the DC Servo Logic initiates a six 1ips velocity command to the motor. functional Load Heads cycle. be closed must be home The brushes must be home and . is which begins sends which, the Load a binary in turn, positioner drive | :% -3anbYtOUiLSNIgvO3HoDNSuON1yN3I9ENH23OV0L0-I7HME|Kp01O'IAYN80IM0IL1AW80|dnb-3jaeasg-ysnag3HDAOM?TDOL2£M14A08ADII2VVV11GN0NWND—r:I¢HETNRNE¥!_3oNax ¢||—I2v19V0I1uI19A1M0}3ANGSenO%aS3v0i3sd@)|3S4-NTdwOhO0auL()LSNTOD._v 3¥ASNI0G,N3oO1VG,13S,$42$|1(81)1T2'.M8'Vv)ISNOWIavig]|rowso 1NCO58HH-S0SN1NuUeD|DSWAON)HOLW|ASY(O01LUVIWNSGUDN -Ti_ohr“l eeAo r_€d _| e (219701) 1/4-11 NSNSTIJAD-RAVLSO |guas o o] Ol - i 7]. = | 0%35-140$ L z t ———— A0 27 : ol 21901 1870)e |——— .¥3A0DN340(M1 o orMDCTzr1H ||. . ! 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AYOYSAVY3IH31340-10 z ir 20 OAN3S L W O V | KSNUEIWOHHOLIMAS ) T1 INON H3LIA S (1) ALIDOT3A TOUANOD _ | | | JOMINGD 1INV 108INOD . wou 35607 |%5v1Oy0lM0N33L4OvI10SW1Q5L)(1 3LVLST0MLMGCD AL1I3D5O3T83AXIGVNHYLILRNWODOJT{{1H)) v e r | ALIDOT13A91)Se1 2inbrg8-pmufl>madn-3ie3g-peoqspesam9T10AD (OBNHVA)ES {€a) |eGr ANNQD 219017 Zd | FO2Iy1V9Y0Ic1HomU(Is§L1NQGe) 21907 i£1a) S MY 219071 P or zr @ e o gYVND ONVE %3 5 (J3LVOe SA‘VAv83H JNOH dBOSNIS a _£ ,_ T R¥iSal1eClQ345 Y%SIaNOG34S{7) 9 _..IL o*»e NOHSNNE¥SOVIHS3IAHQ33dSQSN)Ua3NCHFIDADE35I¥0S1O0H 3.AIBQSNiv1S SNLYLS21907 IAING31V4SS18(2'8'V) QIHIoNQDUIVYNSONOOLNVIEONOIY ¥O4VO'SAYIH AX3N*31VAS © | | {202l d e ¥X@Syi3q3NL3OV14SQSD(1)—{610{SIHvL3L3VISaWOHINVfOl/LNdNILINvd1HOIT L] - 3AL1 AW H)-{ Ts .d.:.cv_mwmAm.du\ru aw : “ h | - (oD (HZ°HHS1I1S3N03NNA3HA0sYDE8Q)(YW"N(10D3JADOA(HIH3)(HO10A)LzHVO-L(OHt)Wa¢911-71sr1aaG~1—1 — I m304ILVLS'SIONVHDOSTVJAIHQ LNOIWILQWD(1) § S 1 E|A(NH(HvOS1)ION)LOH10DLE3AISHNd(AID¥1QVM)33H3GH1LMs0(dA12)(1')DEARD2aEL1€1--n1@¢G00FbFtg6—V3w109wA>m2nHSdNnu-g3j1e|3g-pro7]sasvpaeHaaHvo3l[2AD1butwi]N33s TVNOIS g < -0 (G3§%14Sd)I01aS 1/4-14 A / D . a 820L-Z0 The State below. Control Logic also Direction Forward (L) which move the ° Velocity Mode (L) which instructs the DC Servo Loglc to & Reset Track'Count ? Load Heads the accept heads toward and out 4.2.6 (L) (L) 1s heads ,~dur1ng a showing the this sent driven head off cycle Band Seek Cycle Seek cycle Bank to the the track which (H) loading seek | control clears Error diagram showing the the head - Figure of device data sequence of | that - o to the loading ramp at sux‘ soon. as the and . Logic '(DLS) | portion of as signals to counter signifies been changed the Guard timing are the | which Check Volume over Guard ~diagram instructs the pm31tloner splndle a velocity command read/write ~end 1lsted | The drive enters home position. is control 31gnals @ produce ips the | cartridge may have "The produces the disk heads surface. leave thelr, 4-10 is a functional paths which are active startup. events Figure 4-11 whlch start and cycle. - - These are the preconditions for the Guard Band Seek-Cycle; The cover must The brushes The heads The disk be closed must be home must be loaded and mov1ng No drive errors are being sensed must be up to | speed As soon as the heads leave their home position,'thefdrive enters seek mode. normal or a However, gquard band it must determine if it 1is performing a seek. As the read/write heads move across the head loading zone of the disk and into the outer guard band, the preformatted servo data is sensed. This produces simply acknowledges Data 1, Servo Data the 51gna1 Integrator Logic (DL7) where they servo sample signals El1 and E2. The Integrator band zones burst is format Loglc Amplitude Sensor (H) which that some form of data is being read. Servo 2 and Amplitude Sensor (H) are sent to the determines being crossed (refer to Paragraph are that due to processed and decoded into . | - only one of the spec1al 2.2. 3) and I1/4-15 two guard prerecorded the servo. produces Guard Band 1/4-16 ainbigqu>wQ;Halvdn-jieas-3959104D QEYNDANVE¥3 S319AD 0 t ov Joau3s ‘1 X90 - _ M| 21907 ( € 1 Q . .. | | :. #J¥INODM : _ { t 1 a r — S : : : 3ovauim -L |10WINOD - :o HSNuEIWOHHOLIMS(1) ; ¥0133S NOG3dS S - - _ 21907{£10) — TS i e:—o(],99i3o10I0mVv0—114it.2Hu-I1e|L—9a]N0erI71-:)::_3-A.-1:S4:.QQS3-NHLoI©eoVN¥S.H1Q“D-IOS.N¥3:v:WHV|YiYSNLsS3ND1¥MNK$:3uAOBa|11v-N0L:0eVi3-Is0IOWoE3SSODO23-N4H9O=d0_SD©0.134-_d.LoH'OJR:o_QoUVLNDOo.NI_XYSN.CiSMy0Go'NRu1¥OL3sv4i3.5S.S:-4=-S0:SL1I£Q8}|A(Y-V-'eXI»H2D8:MS.u¥0IvdIOR1‘XVsCeAH1I5.ILNoNN.LOINL:.O.J—.-3_0_1v=oi..sS|21J5Io0u1in,o.do.:3.-.:.-:_.oA.1L1XL3IJ5DJvO30QHST47_¥LI3|IHYA.l,INTGO—NDNNO,YUDOOI:NDW3VI—1WE=-N9O0iD1o-H1.Ai|Z0L\IN(i.HOD:)HO:LToDLI3AFH3I|G...O(1W-.)|(1-S)H2SO1C1LL- 09ANV0uD1Ni0_ONKIM0L.2DINAlS13Ad,iOT|NQAVYWSiDSvZN€.Va3|)1So{v-rSQu(dsHOi)lb0lo€—¢e1lr]aqa,S|uo.oz._.mo‘|.f_io.el11r9¢.r|¢l.%.:T.JHs_I.,v1;[m1:—|_|_e _.o.«'*i_ - 10uiNOD13INVd : . 1NJ3o)INelDIFVe . rl._fi:¥32nax —1 SOd3AOW(1) @2anbtaIT1-vm:iumum,muH>un-Mo°8butwil] [ L @ G 1/4-17 D 3 axp G § a0 ale Q(WHOYHN4VD)E (13A31OA)W (NOILISOd) [Aale 2a 1@ /i 1353y 41 IND (1) 1Na avol SAv3iH ./ G L L-¥(C S0 0€0L-20 crossing the outer Guard Band. At this time, the Velocity Command changes to a binary #1. Velocity Control velocity command 4.2,7 Lock on diagram showing active during 4-13 1is a start and Logic of six ips (Device the the to three Ready) On - the previous Figure signals showing The Load Heads ips. and 4-12 is data paths Track @ cycle of Device diagram this reduces control Lock timing end (DL2) the a functional which Startup. sequence of are Figure events which cycle. These.are’the preoonditions for the Lock On Track @ cycle. ej - The cover must be closed ® The brushes must be home ® The heads gquard o must be loaded ~and travellng across the outer band No driVe errors are being sensed . - The disk must be on speedi Whlle the p051tloner the read/write is travellng heads are only across the outer Guardband detecting 'servo bursts, zone, due to - the guard band servo format. As soon as §' bursts are detected, the intergrator logic (DL7) determines that the positioner is no longer within the guardband and causes the 51gnal Guardband (H) to go low. This, in turn, causes Track Count @ (H) to be enabled which allows the State Control Loglc (DL1) to change from Velocity Mode to P051t10n Mode._ The signal Position Mode (L ) accepting Logic and '~_51gnal At the incremental to lock on same time, instructs the DC Servo Loglc to begin positioning signals from to ‘the negative slope of a ready to read/write the Integrator the positioner timeout is set which ~allows 6.5 milliseconds for the positioner to settle into place on data track 0. After the 6.5 mllllsecond timeout, the signal Ready to Read/Write Lamp - on the (L) is Control the controller. The _drlvev'isv now commands. enabled. Panel This signal and sends to receive Drive . - ready - I1/4-18 illuminates Ready | and the Read controller write | - Ready Data | and to seek S //( Again, due to the special servo format, the signal El1 Held 1is produced. This signal, in conjunction with Guard Band (H), allows the State Control ' Logic to determine that the positioner 1is AQV3Y A21901(§10):SNLV2YISiDnObrgZI-p@o1QYa3IH2OL@ILINAdVOVnINj(3)(iM)eis-%0704 5S040T _”q_! ¢ T 30VIW3ILNI 04LNOD © NNY _ 3WOe1YVH13SI JAING 82a190)1 1/4-19 10¥INOD 1INV , Q) IV SNIS (H) My121907 —1 Zd NN | r |e =~— i 40uY321907 Ini1N0(1 ¥OALLVIUDO0I1L3NAI vivy 2 £ »tury3%309I—tVV0I:I7uU—(II9LL1N.0N).3AMO'SALoYL%S¥IS1H0S%NNSOYiE)aQI03W34O5H4EIAEG31V1oSS1€(|3'9T'V)ReUMILWIS_:3.iov.as|(J1oa)uiN:od1OL@Q0N3ALO%IDOVITNL31NA¥LONNIN0DOVD2N1=GL900D1{H|)(HI]See] 73I|Y29A11V090u0u1I11LNI@(O£N1D0).oOVGNDJo"eSc.:tt|oSAiu530s1dae..|osr|fWdHHIVSLUC(1)AH|||i-T| O3W»NXDO3WYHSL34N1ONLODION0= OI¥O4%01MO{AGY3Y) ONINOILISOd30 W(1) — —1AI—ND—Ye —Bs et ir er |vOiAvSd ] b ] (Z1H3)AOaLwIdN(DHM)HL zZ11aa XI2W0O1HNMOS"D(1A)D(7) 6-1v1rQ SiHL 1v1S 13A3A0OW(1) wLu-v:rmm.E1-vaoiAaqQdniels-307ujoeilgPutwi] NAH3VTOSI31(NVL1ISSAAQVWIDH('1D)AD1(1)51017a4 CEOL-ZD L.NS30Q) (3HVYD XadSSO4idvan{No1O)O3@N03V8W4S(H()1~)SRa-alvlere 201NO _dvOl1NNSAv3iH || ~ ((NAOLIILDIOS1O3dA)) 1/4-20 1(M2L3yN15lD)3H0 | Unload Heads 4,.2.8 ng control signals and Figure 4-14 is a functional diagram showi cycle and the data paths which are active during the Unload Heads | emergency retract function. which Shows the sequence of events Figure 4-15 is a timing diagrame opera | tions. which occur during these devic These are the preconditions for the Unload Heads éycle; e The cover‘must be closed o The brushes must be home ® The disk must be on speed ® The positioner is to travel toward the home«positioh.v depressing the RUN switch The Unload Heads cycle is initiated by on track, no errors etc.). on a drive that was ready (up to speedy, force s a state ROM change. iatel Depressing the RUN switch immed nd of 11 to The State Control Logic sends a binary velocity comma a 15 ips velocity command to the DC Servo Logic which initiates home position and tell it 1is drive the positioner towards the the When the positioner reaches completely off the disk surface. | home position, transition into Spin Down cycle occurs. the positioner to unload the The error conditions below will ofcause the State Control Logic (DL1l) as read/write heads under control described above. @ The drive o The Gate and Sector : Pulse | | senses Write simultaneously (Status Word, Bit 18) drive Gate Current without Write senses Write asserted (Status Word, Bit 14), or posit| ion <threshold | | during write gate e | | - | Data Line but No transitions are detected on the Write15). Write Gate is asserted (Status Word, Bit will failure, the positioner cito In the event df an ac’ power heads r capa a by discharging immediately unload the read/write Spin Down ! o | | - into the DC Servo Motor control circuitry. | | | | showing control signals and Figure 4-16 is a functional diagram the Down Cycle. Figure data paths which are enabled during the Spin sequence of events which 4-17 is a timing diagram which shows I start and end this cycle. 4.2.9 I/4-21 _ . ! | _ 1) MS WH Ed L ) 1)30 WNOILISOd-. - - E , : , ; _ : T0WiINOD 1381D0V}HMILON0I - : . i 30v4d3LNI . ; (HNY : aNO IV -v : ; , 130 WALIDOT3IA v GWDLNO3‘NIL 21501 HOLVHOILN! -: : ‘ i —p 1/4-22 |..Q.12.91Y.39Q:0):1 } veOL-ZD | ! v(@NMa31SlOi)4saS} 1/4-23 o2anbrg294147Q31—ViSWYHOVaIQd-NIidSANMaOQdFIDAIdnjie3g-urtdsumog \¥O123S MvH401235357Nd | WH WS 17 | | || 2¥1O5W0u73 TOHLINOD 13NVd Q340181) . 31ViS TOMINOD || |]£4_ |_ €10 ! LOH OV 21901 1410) - 24 i| | |13OAHlO8L&OaW i 1/4-24 L L) | o : 3AIMGSL631vLSJ8'v () | @ i JOHINQD 2I1N90O1D wr (z1a) pe— @S3NALIVMLSO N(1OW ] | i } | _ | . ) ] TAVO1IN SAVV3YINHDIDSA(1) 17a AvolIN SAv3iH | i ‘! | I1/4-25 _ |A.v:HM-OHSs1iIOraW These are the preconditidns for the Spin Down cycle. @ Brushes must be home @ Cover must be closed ® Run @ Heads must be home. switch must not be depressed ' The transition into Spin Down cycle is made when the positioner reaches home position. The State Control Logic then disables the velocity command to the DC Servo Logic and enables the brake signal to the AC Servo Logic. The speed detection circuits of the Disk Speed initiates tran51t10n - Control a 15 Logic second detect timeout. in Load Cartridge EXTERNAL DRIVE FUNCTIONS the spindle When the state occurs has stopped timer and times dlsables and out the the brake signal. 4.3 To completely understand the functionality of the drive requires a knowledge of the responses to the commands from the controller. The four responses or functions the drive perform are Get Status, Seek, Read Data and Data Without Header read data. controller. Functional "The block Write Check Data. The three commands NO-0OP, Read and Write Check do nothing more than functional differences are performed 1in the = B o - diagrams and flow charts relationship of control signals operations. They utilize signal Print Set References. 4.3.1 Get Status Figure 4-18 1is a functional and data mnemonics diagram are used to paths to and Field show the the device Maintenance showing control from controller signals and data paths which are active when the drive receives a Get Status Command from the Controller and returns a Drive Status Word. The drive in Figure receives To perform a Get Status both the Marker 4-19. the command word the as shown - be set in the Drive Command Word. When set it causes all drive error The and Get Status bits must Reset bit 1s optional. latches to be reset register. The signal Reset before loading the drive status Latches (L) from DL2 performs this function. When reset, not reset the drive error latches. When the Get Status ~bits are decoded the remaining bits 15:04 are ignored. 1/4-26 and once, Error it does Marker 13534HONH3HOLVY) B_ H3ANO"a)_BaERCH.INOHHOLIMS(1] -|a010:4RL) .: 0I4(1}:-nGC|¥8210I03n4sbrg.gITOH-IANpOD13N.I vd38uDSN3IeIS—wT_eU.OeT.IOiU.NI.bYanooH.0Me7SMgrq ¥32naX| R BE EDE N 4() e ! I: _ . : | Wu3VIVOIUM i | IIVININ w7 | wov | ” €10} . Wu3‘O'L/%3I3S . (1)Owd TMM.|anvnod : , WH“ : ¢ : : . _nr -o. (97Q)219072forov I 1/4-27 HSNYa 2 S1A3LV9LS o] 150 [32: 15 14 13 12.»11 1_6 9 8 7 0 [128]64]32]16] 8 [4 | 2] 1] CYLINDER ADDRESS DIFFERENCE (25 = 256) | 6 5 4 0] 3 2 10 0 [ns|rsT[sn]GS| m | T HEAD SELECT (0 = UPPER, 1 = LOWER) RESET SIGN _ ‘ (1 = MOVE HEADS TOWARD SPINDLE 0 = MOVE HEADS AWAY FROM SPINDLE) / S ~{ GET STATUS MARKER (SYNC) CZ-1038 Figqure 4-19 ‘Drive Command Word I/4-28 The Command Word and System clock are first received Interface Logic (DL6é) and then sent to the Status Logic (DL2). The command is then decoded, and since Status Command, errors, (DLl1), Logic the status including transmitted gate A, B, and controller in sync returned are to clock bits status the the to 1s C enabled. from Logic Interface with the the Any State where Status by the and Control it is a Cet drive Control they are Clock. Note that this function can be performed even if the drive is not | ready. Status Seek 4-20 Figure for a detailed | | definition of Drive the contents. Word 4.3.2 3.3 Paragraph Refer to | a is functional - control signals showing diagram and data paths which are active when the drive receives a Seek Command the from 4 controller. Figure 4-21 shows the Drive Command word during a seek as it 1s Interface Logic received by the (DL6). Note that the absence of the Get Status bit denotes that the command is indeed a seek. The serial command word is sent to Status and Control Logic As soon as has the entire the following The Marker 16 bit bit is sensed, this logic realizes preconditions be must met 'before ® The brushes are in the Home positidn. ® The heads ® The drive is in RUN mode, i.e., ® e the loaded are ~The drive is selected The interface Power is drive ® No ® The disk that 1t seek 1is word. ‘initiated. ° (DL2). 1s enabled OK errors is .up e are to being detected speed I1/4-29 WILSAS %307 JAMQ ala B ONYANWOS IeuoIjounygxvofimweibe1q (31{MOW0HI2)O:L8S /I[$N7HD4) 2Q OAH3S 9 O1W3A L] 0AQvO3ily (MHY) 1HO9u0Y13 L 1] AQV3IM I/4-30 3938 [ £ H) W 21901 z '2C1 w03amg a)vi)o NOWISOd 30 W (1 Im ALID0T3AIGONW7) T0HINOD 378vN3 z 2] 3AINQ SOd oo Tel Lt EV t 103138 (OAMQVH7YL3I)]H 1SN9i0Y17S TOHLINGD 3LViS{11q)TOHLINQD YOLVHOILNI i©a) , ALIDCTIIA1NO3WILTYNOIS (H) vr £r WO(AQMYLV)IY qma— IANQ 12313S 0 }’\.\I-L TOHINOD13NVd 110} .g)103kS {g d(SNWHIV}S £ (v10) z INNOD NDO0T Rl-wofv 3AIG —— Z1a) OAM3Sviva > z 1901 1£310) _ 1 ®04-72D _ _ QION3IT0S 1] — S o L 10G3H8) AL1073A PN [wLmw/ A0 O 15 14 1312 11 10 9 8 7 6 5 4 3 2 1 0 | o |128]64]32]16] '8_[4 2] 1]0] 0 |Hs|rsT|sN|GS| TM | T CYLINDER ADDRESS DIFFERENCE (25 = 256) 'HEAD SELECT (0 = UPPER, 1 = LOWER) . RESET SIGN [ '\ (1 = MOVE HEADS TOWARD SPINDLE 0 = MOVE HEADS AWAY FROM SPINDLE) 'GET STATUS (NOT SET = SEEK) MARKER (SYNC) / | | Figure 4-21 | | | CZ-1040 Drive Command Word During Seek I1/4-31 As soon as have been the Marker, decoded by Sign the initial velocity command (direction) and Track Difference bits Track Difference Counter (DL2), an is sent to the DC Servo Logic. The State (or Position) Mode. Servo samples for velocity feedback from the Positioner Control Logic is in Seek the Read/Write Logic and Tachometer are used by the Count Track Difference Counter. As track difference counter has decreases, the Track Count = velocity command @ (H) is Logic the down | The signal Position Mode (L) accept incremental positioning to decrement also decreases. counted enabled. (DL3) distance to to | the target As scon =zero, the | the track as the signal instructs the DC Servo Logic to signals from the Integrator Logic (DL7) and to 1lock on the negative or positive slope (depending upon the direction of the seek) of the positioner signal. At the same time, a Ready to Read/Write timeout 1is set which allows 6.5 milliseconds for the positioner to settle into place on the designated track. After the 6.5 millisecond timeout, the signal Ready to Read/Write (L) 1s enabled. This signal illuminates the READY lamp on the Control Panel and sends Drive Ready 4.3.3 and Figure data The Read Data Read Data 4-22 paths 1is ® controller. | | functional are preconditions ® the | a which to | d1agram>show1ng active during for reading Read valid signals and Data. data arelisted below. The drive has been selected by the contfoller Heads are locked immediately number on a following specified) a data Guard during a No drive errors are being sensed ® The spindle The 6.5 been ° e e is on After the word has When a last new though the When seek in a head Ready which been (either or track the 0 track seek | speed millisecond completed, track Band Seek, previous ® e o control to bit of a shifted to read/write timeout cycle has has been for address occurred. 1/4-32 address difference selected drive address difference has cylinder the head difference selection Read/Write occurs: is selected, a seek zero is and even zero no change When these Modulation preconditions (MFM) transferred from interface line. some - form conditions encoded have been read data met, Modified (see Paragraph Frequency 2.2.3) of information on this are met will legltlmate 1line. data Only when the above be transferred to the controller. The Sector | Pulse is transmitted to the signify the beginning of a sector. corresponds with the sensing pulse cartridge pulse is the drive to the controller via the Read Data Note that whenever a drive is selected there is armature signifies by the the end of sector servo controller The of the drive to beginning of the sector sector slot on the the transducer. The data; After detectlon of the servo information read data goes to the controller. by end of sector header - preamble, | and the - In order to read headers, the controllér VFO loop is phase-locked with read data after the end of the " I/4-33 drive sector pulse. |.19383WILWOAU3IS|YAYag1elf¢_ I12l {IgD1D0VV)4IHH31II9LI0NN1II g2anbtrZ7-%pRIHeIRQ-~[eUOIOUNgYdO0Tdweiberqg 21967 ANNOD . %2012 , /c1zb Er vr ur 110 tv10Q)_ el r9012r _ R —1 ; v | | M i128,190401 ] f d - tir avay eNy I/4-34 190L-20 QION330S 4.3.4 Figure Write Data 4-23 is a functional data paths These are which the are active during precondltlons @ The drive e Heads are number e o selected by on to a data following a Guard been locked errors during are a the controller track Band (either Seek, or track @ the track previous Seek sensed being timeout cycle has been ® When a ® When though shifted to new Read/Write the difference the selected head has'been address for a. seek dlfference address head selection has occurred a is selected Seek zero 1s and zero no ® A Header Compare,has been detected by the-controller o The Header CRC checks When these "been asserted, conditions ~Data (see Paragraph the drive via zeros and the been met, Frequency 2.2.3) the Write The write data word, have Modified 1is Data the data postamble and Write Gate (MFM) encoded transferred interface stream contalns the and the Modulation Marker Bit), word the be i.e., at the written start of will the occur after the Header Data 16 128 data preamble data words, bits Preamble bit periods Postamble. has Write controller of to the words data (47 CRC zeros). .The Write Gate enables write circuits in the drive. asserted line line. three (16 from even change The end of the drive Sector Pulse has been detected of has drive @ bits and After the last bit of a cylinder address difference word in to signals Data. The 6.5 millisecond Read to Read/Write been completed, which occurs ® \“\.,n,../’ control Data. for erte specified) No drive ® Write required has immediately | showing diagram (PR2). The after the . It must be actual data Header CRC; The control unlt transmits write pulses which are compensated to reduce peak-shift introduced by the recording process (refer to Paragraph 2.2.3 on MFM Encoding and Precompensation). I/4-35 03138]3Afl“:.fil »Bomw|e1Nl1@rJ tele|@ vM||lw231mf90.71(l197@0}m1 :wa‘¥OuH321907 :21907 . AL9I1D900713A- 000A-N3Sd—| z3SINdNir} :‘ LMV1vQ351Nad(r,)L - . Falel] 9}A907Tr ! 3AING :2a:nbrig¢z-p93ITIMvejeqg-Teuorloungjo[gweiberq , 5 e].(3Lk_1MV!).OM- ”%]!iavauY} D.lo1o3Js_‘. 0, |BiEtHOLVUdD3iNNG%1010 | ; v £ ¥32Nax ||. ¥O123S (W 04T I I1/4-36 2{1€910Q1) { ett CHAPTER 5 DESCRIPTION UNIT-LEVEL 5.1 DRIVE LOGIC MODULE THEORY OF OPERATION This section describes in detail the operation Drive Module Loglc of the Drlve Loglc Module. "For simplicity, the the functional areas & listed has been broken down into below. State Control Logic (Sheet DL1 of the Field Maintéhahce " Print Set) » | e Velocity Command and Status Data Control Logic (DLZ) @ Count Logic (DL3) @ Disk Spéed Control Logic @ Error Logic (DLS) ? ‘Interface ® Logic . (DL6, (DL4) DLB8) Integratof Logic (DL7). 5.1.1 State Control Logic (DL1) - The State Control Logic Maintenance Print Set) 1is (shown on the portion Memories ROM which both monitors and controls Spinup, Brush Cycle, Load Heads, (ROMs), Counter, the the Brush driver. State Cycle Latch, 5.1.1.1 State ROM - The Read-Only Memory. encoded (BCD) Its word State ROM Status Bit A @ Status Bit B ® Status'Bit C ) | Time Out Command Seek the is to denotes drive logic within for other decisionmaklng listed belowa ) is Field Module Start Up functions such as It comprises two Read-Only the and purpose which drive etc. and o Sheet DL1 of the of the Drive Logic a Control ROM, control panel 256 X 4 Bit generate a four status the and drive. a State LOAD lamp Programmable bit binary provides control 1Its outputs are | The status bits A, B, and C are sent to the Status Cdntrol ngiC' - (DL2) where resulting used as they are used from a controller inputs to the Seek to Get make up Status Control 1/5-1 the Drive Command. ROM and the State Status ‘Word They ROM are also Decoder. The Time Out Command signal is sent to the Error Logic (DL5) it is used to start the Seek Error Timer for moving functions (i.e., Load Heads, Seek, and Unload Heads). - where positioner The address inputs to the State ROM are derived from eight signals which sense drive conditions bits comprise the follow1ng @ Brush o“ Heads Home Gate ® The any given time. These address | Switch Run - ® Home at - Error State Command @ Disk On ® Disk Stopped .o Track Count = 0 o Brush Cycle Latch. State Speed Control ROM is preprogrammed (burned-in) at the factory so that specific address combinations yield specific output words. Figure 5-1 shows the addressing scheme for the State Control ROM. The value "1" denotes a "true" input or output. The value "@" denotes a "false" input or output. The value "X" denotes a "don't care” situation. 5.1.1.2 State | ROM | Decoder - The State ROM Decoder is an BCD-to-Decimal Decoder. It decodes the State ROM output bits A, B, and C) and provides an output correspondlng drive state. Figure 5-2 shows the decoding scheme. 5.1.1.3 Seek Control Programmable Velocity ROM Read-Only - The Control purpose Control Logic (DL2) with location and drive status. ° Direction ® Velocity Commands ¢ Reset Track Count. Veloctly Commands Control Logic (DL2) ROM. Its Command to positioner below. Mode. 2. | Seek Memory. These 5-3 1s is to a to the 256 X 4 Bit provide information Its outputs the pertaining are listed Forward 1 and where 2 1 and 2 are sent to they used address commands Figure ROM SN7442 (status the Velocity bits for Command the and Velocity apply only when the Positioner is in Velocity shows the decodlng for Velocity Commands 1 and I/5-2 | STAfE ROMINPUTS I OUTPUT | ~|l=lolo|=|=|o]o > x| x|x|of-=x|x x|xlolo|olo]—|x olof=|~=|=|-]|-|o = IO|O|O| | ~2]—2]-— FUNCTION LOAD CARTRIDGE | SPINUP BRUSH CYCLE LOAD HEADS SEEK LOCKON UNLOAD SPIN DOWN CZ-1043 ~Figure 5-1 State Control 1/5-3 ROM Addressing CZ-1044 'Figure 5-2 State ROM Command Decoding Scheme I1/5-4 <R - AN <O Q,\’OQ% " & L 3 o OFF 0 0 0 1 0 31.P.S. | GUARD BAND 0 1 61.PS. | HEADLOAD 1 1 151.P.S.| HEAD UNLOAD CZ-1045 Figure 5-3 Velocity Commands 1 & 2 Decoding'Scheme 1/5-5 The address input to the Seek Control ROM are derived from signals which sense drive and positioner conditions at any time. These address bits consists of the signals below. ® Status ® Guard Band ® El ® E2 Held (Previous EZ Servo Data Sample) @ Sign & Seek Timeout Error (Disables a Seek) Seek 5-4 shows Held A, B, and ‘ (Previous Forward Control C El Servo Data (Direction) ROM 1is preprogrammed at a the "1" addressing denotes "false" a scheme for Seek The value the "true" input or output. input or output. Brush Cycle the factory so yield specific output words. specific address combinations value Sample) "X" Control The value denotes a that Figure ROM, The "don't care” "8" denotes situation. 5.1.1.4 Latch controls the Brush Drive input the State Control to - The Brush Assembly. It Cycle Latch also provides monitors an address and Control ROM starts ROM. Input: Set = Power Load the ‘Reset = On Reset (L) Cartridge or State State Control Brush (L) from ROM Home Switch (L). Output: Brush Cycle Latch (H). the Brush Cycle Latch When is set, the Brush Cycle. This produces energizes the brush drive motor. disk, the until the brushes, latch. The Signal The State combination Cycle Latch Heads State. Brush of reset Home Control signals causes the (L) remains goes in return Brush state I1/5-6 State Signal Brush Cycle (L) which the brushes move out over the Switch ROM driven by a cam, the the the As high, resetting their home position. (L) and the to Brush Home Switch ROM to advance Cycle to the the State Brush Load e’ The Bits eight given I SEEK CONTROLROMINPUTS [ OUTPUTS FUNCTION ol x|=Ix]xIx|xix|Xx x| o |x|=fx{x|xIx]|x XX IXIXIXIX|=I1O|X OO |0|OIX X=X ~|o|~lo|o|-|olo]|x ojololol=|=lololx olo|olo|jolololo]l- ILLEGAL SERVO OFF INNER GUARD BAND OUTER GUARD BAND| LOAD HEADS UNLOAD HEADS SEEK FWD LOCK ON NEG. SLOPE SEEK REV LOCK ON POS. S LOPE CZ-1046 Figure 5-4 Seek Control ROM Addressing I1/5-7 Direction for seek purposes, and command to drive the positioner. " If the Command Word is Word, which Stdtus Clock 1is Status the This logic @ ® decoded comprises the Get to circuitry Command/Status Gates | Status the listed necessary Command, to make up controller in information transmltted Device Shift/Load, Register, this logic the Drive sync with Clear and ~ . | Track Difference Cdnnter and Load Latch ® Head Select/Sign Bit Holding Registef ® e Load Registers Gate GetStétus Latch | @ Reset Latches Gate o Track Count = 8 Gate e Enable Timeout Gate Error Velocity ROM Device Command/Status Command/Status Register load mode after operated in two only modes, it controller. Otherwise, drive to command the is a has decoded shift ripple 1t Register sixteen or load. a operates through bit This Get in under - The Device register that may be from the register Status Shift operates Command Mode, control of allowing the system in the clock Marker flip-flop. Normally, the Marker bit there is no Get third transition other pulses the velocity below. ® 5.1.2.1 as a the - Marker Flip-Flop and Latch 8 and as error and status drive collects develops \ in command is Status bit, not followed the Command of the the Drive Command shifted through is system clock. are by a Get This is done Register Status not mlstaken to If the ensure that as marker bits Figure 5—5 shows Drive Command and Status Control Timing. I/5-8 bit. is cleared on N’ 5.1.2 Velocity Command and Status Data Control Logic (DL2) The Velocity Command and Status Data Control Logic is the portion of the Drive Logic Module which receives the Drive Command Word from the <controller, decodes the Track Difference Count and S2M1o4rOYlOL-EE€(31)vHHIINLUSVI|IONI-YHAONLVVINIaAVOiHNVLnI3WbINOrIDYgHIILF1IS-AIDHIGIHL'NHNVO3D1@DGcOvNOmI7G_IvOHcmEOUm>wun_NLVmLS:%f2l01aDw3Lhv9_DA(HO)Nucouflmfli_lu.m“u.l_m._'l,._n._u--7—-Iill.IHl. 1(AJNSAV3NYIL9WHVO)LADS L39 SNLVLS HOLV1 (H) v1-2093 .Iv.OumOZ.OJOID,qOJ Z106-813 139 SNLVLS (H) HVY3ID d074-d1 4 (1) (S1NL31VL9)S 1SNQWDLVIS9V314VQ(aH)LNdNI ‘aN3DI n a 1 L z a HalIsN)KH{VSINVxH4OLYT(B1) IPRPRS 2101S-923 , A Y L | S N L V I X 0 1 ( H ) $ 0 6 3 9 7 . — S N L V L S V 1 v a ( H ) i z a z i a |T 21001813 139 SN1vis §- - Z8-1vZa3 £2'97-81€3G Flip—?lop bit; - the The first Marker bit in When set, it 51gn1f1es that the entire in the Drive Command/Status Register. 16 flip-flop a device bit is used command command is to word. present Input: Data Serial Command Word from Drlve Command/Status Register System Clock Clock (H), Load Track Difference Counter. Qutput: Marker Bit Marker Latch 5.1.2.3 the Marker flip-flop has command word is (H) to Marker When set, sensed available for the the Latch. Marker marker Latch bit and signifies that the that device decoding. Input: Set Marker Flip- Flop (H), Clock (negative-goinc edge) Reset Next Clock Transition. Output: If Get Status, set Clear Flip-Flop, load holding registers If Get Status, 5.1.2.4 Clear all in bits not appear the set Shift/Load Gate. Latch - The Device as Marker purpose of Command/Status the Clear register Latch so is that Bits. Input: Data Markér Latch Clock 3rd half of (L) System Output: Clear (L). I/5-10 Clock Cycle going to they 1low. clear will ] ’// Marker Marker N 5.1.2.2 detect the 5.1, 2. 5 Load Reglsters Gate - During a normal command (i. e.; Get Status), the Load Reglsters Gate allows the and Holding register the Head Select/Sign Bit - with data from the Device Command/Status register. Marker when the is Latch ‘Data is loaded set. o | Input: to be loaded Track Difference Counter | Get Status, MarkerLatch(L); | ) Output: . Load Registers(H). 5 .1.2.6 | S’hlft/l.oad 'Gate' - Duri’nig' a .'normal command (i‘.e.',- Get Status), the output from the Shift/Load Gate is high, which allows " the Drive Command Word to shift through the Device Command/Status reglster. Input; Get Status ~Latch (L). (L), Q - output of L Command Register, | Marker - Output: Shift/Load (L)~to Command"register and Get Status Latch. 5. 1'2'7'. Get Status Latch’ _The"Get'Status latCh is set when a ~ Get Status Command is detected and It also enables ,Load, the Ehlft/Load Gate the Status Clock Gate. requests Input: Set ‘Shift/LOad (L)al ,Reset Next Dr iVe Command‘ - Output: " Enable Status Clock Gate (H); 5. 1 2.8 is sent Status Clock Gate - The output of the Status Clock Gate to the Interface Loglc (DL6) to enable the Status Clock for transm1551on of the Drlve Status erd to the controller. '5.1.2.9 ~ Track Difference , Counter el Durlng a dev1ce command (e g., Get ‘Status), the Track Infference Counter 1is 1loaded wuth the Track leference value de51gnated by the controller. Outputs from the counter are used as address input to the Veloc1ty" ROM whlch determlnes the p051t10ner veloc1ty '1/5—11. The counter is Count Logic Load decremented one count (DL3). Enable 1is track) at a - proVided time by the - by the Track La tCh ° ' 5.1.2.18 (or Difference | Counter Load ' Track Difference Counter Load Latch - This latch allows the Track Difference Counter to be loaded address derived from the Device Command WOrd with Loadlng of the Track Difference is contents are not equal to wlnformatlon into the zero. Counter Counter This while is difference disabled prevents a seek the loading if its new seek being performed Input:- | Set - Load Reglster Enable (H), Syétem Clcck goihg high Reset Output: | | = Bortow (L) . ‘ Load Track Differénce,C0unter (L), Enable Time Out Gate Enable Device Command/Status Register Clock. 5.1.2.11 Head Select/Sign Bit Holding Register - This register holds Head Select and Positioner direction data from the Command Word. Loading is enabled by the Load Register Gate same time that cartrldge state. ~is cleared by the Track Difference Counter Power On Reset or when the Load Device at the Latch is set. drive is in the It load - Input: Data = He'.ad 0 ‘ (L’) | Sign Forward (H) . ~ Clock = Load Registérs (H). ‘.Output: | | 'Daté = Head Select 8 (L) Sign 5.1.2.12 Count been = Track Count 0 (H)] decremented track specified from attempting Forward = @ (H). Gate - The output from this gate [Track indicates that the Track Difference Counter has to zero and that the positioner should be on the by a previous seek. This prevents the Count Logic to decrement the leference I/5-12 Counter any further. 5.1.2.13 Reset Error Latches Gate - When the Reset bit 1is sensed during a Get Status decode of the Drive Command Word or a Power On Reset is received from the controller, the output from this gate is sent to the Interface Logic (DL8) and the Error Logic (DL5) to reset Drive Error Latches. - Inputs: Reset Bit (H) Command or Marker Word) . (L) and Po_wet‘ On Rest | (L) (Drive | Output: Reset 5.1.2.14 Error Latches Velocity ROM (L). - The Velocity ROM is a 256 X by the 4 Bit Programmable Read-Only Memory. Its purpose is to generate binary encoded current levels to drive the positioner servo. The combination of ROM output (current 1levels) 1is a square root function of difference the track difference bits address as counter value presented and F through A In addition, the binary equivalent of Load Heads, Unload, Guardband and Off the velocity as generated ROM and (DL1l) Figure 5-6 are entered is a as address bits G simplified logic diagram showing Any flow output, when Combinatorial track difference added, velocity high, inputs. determining command. allows selection of The total The current the ROM binary drive series to outputs encoded current diodes ME2. commands for by the State the generation of the ROM track and H. the servo velocity command. Tablé 5-1 shows scheme and resulting binary encoded outputs. D5. ME1l and reduce ROM addressing through diode is derived from outputs the are then corresponding leakage current, allowing accurate low velocity command levels. Current output from D5 1is fed directly to the 1input of the servo summing amplifier (DC Servo Logic Module). 5.1.3 Count Logic (DL3) - The Count Logic comprises the El and E2 Servo Sample Holding flip-flops, Tachometer Feedback Velocity Level Detectors 5.1.3.1 and Count ROM Read-Only Memory. Difference Counter a simplified associated the - Count ROM and The Count Its purpose (DL2) by ROM values 1logic: diagram its is a associated 256 is to of @, 1, showing logic. the X logic. 4 Bit Programmable decrement the 2 or 3. Figure count ROM | 1/5-13 Track 5-7 is and its | ainbtrgg-¢AJTOT9AWOHpueA3ID0T3Apueuwo)uoyrlelisausn 1 o Z QWD 13A 'INOD 31V1S st NT YWY — v" Lv LQWD13A !; W.OudN O 89zl I/5-14 8p0L-20 20 1 Table 5-1 Zeros mean a low logic VEL CMD Velocity ROM Addressing level, . 2 TRK BIT A7 TRK CNT TRK 1 CNT A6 A5 ) g 0 1 0 N ) CNT 2 TRK 16 CNT TRK 4 A3 0 9 ") X ) X ) X g X ") Y X g CNT 1IPS @84 0 9 1 X @ X ) ) ) 1 X X g 1 ) X Y ) X 1 g ) Y g 0 1 1 1 ) 0 1 1 ) 1 4 A2 Al 12 1 AG 3 "don't care" TRK 8 A4 2 1 15 E43 PIN NO: - CNT 32 VEL CMD ones mean high and Xs mean 7 6 9 0. 5 12 6 3 1IPS IPS IPS 63 82 @l 19 11 12 4) ) ) Y g ) ) 1 1 0 %) 0 1 1 1 4] o) 1 0 1 ) g g 9 COMMAND g IPS (TRK @) ) 2 AND GUARD BAND) ) 0 3 IPS 6 ~ IPS (TRK 1, (TRK 3, 4 AND LOAD HEADS) 9 IPS (TRK 5 12 AND IPS 6) 8 AND (TRK 9) ) g ) Y ) Y ) ) 7, ) - ) ) D %) ) g 0 ) @ ) ") ") 18 ) ) ) ) g ) Y Y Y 0 0 g UNLD HEADS) IPS (TRKS 13 TO 17) L R 24 27 IPS (TRKS 18 TO 22) IPS (TRKS IPS (TRKS (TRKS 255) X ) g ) ) g ) 1 1 @ 1 1 X ) Y 1 1 g ) Y X @ 1 1 ) 6 1 X ) 1 1 1 1 1 1 11 ) g Y 1 8 X ? 1 1 g g 0 ) g 1 1 1 1 Y g 1 1 1 1 9 ) ) 0 ) ) 8 X X 0 g 1 1 ) 1 0 1 1 ) 0 1 1. 1 1 1 7] 1 0 g 1 X g 1 X X X X X 1 1 1 1 1 1 1 1 1 1 1 1 0 ) 1 1 g 1 0 0 ) ) 1 I 9 g ) 4 P 1 1 1 1 o 9 g 7 g 1 1 1 1/5-15 X 1 X 0 1 1 1 '/ g ) 1 1 1 1 1 11 1 ) 1 1 g 1 ") ) ) 1 @ g ) 1 1 9 1 1 ) X 1 1 g 1 1 X 1 1 X Y] X 0 g 1 g 1 X ) 1 @ ) 1. [ Y ) TO 0 ) 0 0 ) IPS g 1 1 4 @ g 42 1 1 1 1 ") 28 TO IPS (TRKS TO 41) X ) 0 ) ) ') 34) X 3 0 2 0 35 33 1 23 TO 27) | 38 1 @ 0 0 @ ) g g /. 15 IPS (TRK 10, 11, 12 AND 21 - 0 X X X X X 1 1 1 1 1 3 1 1 1 P '3v_W| AN=g|LNNODS1d(H) 0L3ON3¥34d10 (119HL)Yam4 ry . ] vavon 31dNVS di1vd 1i9 (ASW)Z | ALIDOT3AISN3S 3ISNN13OdSIN3AYIHSYdJHivdt32/3'/313 13A3T I1/5-16 0501-20 £4 (qL|t)i(3vtljo(o@)]ftt 1oND| {tcJo]|ovjo10l1o}|oz0o L L1=W1N38OL-(S%AS2S001XD(01)71|0osNyy91)O(JZ|HWW*oAOAH—Qi,OQ:Woa|s+9l_|(||ga54,—z{3IJNpODZLIBIHNIWO\Hd|"AINDTWHLIBO9TV431NNO|D HOLD3S IWIL (1) 'y The eightk address bits 'through A7) /provide address-word g, (B—Blfl). information which determlne %1nary outputs @ kthrough isas follows: ‘Information contained in the bits Ag through ‘@ e Velocity Range (Ay, A;, A,) - Previous and present servo samples Eq and Ez (A3; A4,'A5, AG) ® | Direction | (A5) The Count ROM Address bits and the count algorithm are defined Note Figure 5-7. burned in at the The' Count the LS197 ROM factory and is not output chip counts (fil word up until through significant bit) 04) provides Q output 5.1.3.2 El Held Flip-Flop - This the or decrement fleld programmable. the Track Difference Counter (Q goes outer 'guard that The the count pulses thCh (DL2). flip—flop stores the El servo sample.' When the drive is in velocity mode, fllp—flop is used to determine whether the p051t10ner inner so low). programmed is overflow occurs (least in is permanently the Count ROM microcecding that band. previous the El Held is crossing - Input: Data = El sample from DL7 Clock = Sector time (L) from DL4. o Output: Q = Address Bit6 (A6) of the CSunt.ROM_ Q | Address Bit 2 (A,) of the ‘Seek Control ROM Table 5-2 is a truth table which defines Count ROM addréés bits A through Ac. These bit values are derived from combinations of present and previous servo samples all possible (El-and Ez). Table 5-3 is a truth table which'defines count ROM address bits A through A,. tachometer These velocity bit values are derived thresholds during from 625 microsecond distance per iods. servo | Table 5-4 is the complete Count ROM map and algorithm. 1/5-17 an sample FORWARD 0 0 ¢ 0 1 24-32 g-8 0 16-24 0 1 1 4-12 1 20-28 W 4-12 1 - 20-28 g-8 a-4 1 16-24 4-12 1 20-28 8-16 2 - 24-32 8-16 4-12 2 24-32 g-4 1 @ 12-20 p-8 1 4-12 1 0-8 0 24-32 0 g 1 8-16 3-4 1 @ 0 1 1 0 4-12 1 0 1 1 1 @-8 Y 16-24 1 ") 0 Y g-8 0 1 4-12 1 16-24 20-28 10 1 ] 1 d g-4 2 12-20 11 1 0 1 1 8-16 1 24-32 - 20-28 O 0 g 0 g 12-20 20-28 12 1 1 7 0 4-12 1 13 1 1 0 1 8-16 24-32 14 1 1 1 0 0-8 2 1 15 1 1 1 1 g-4 0 12-29 Table 5-3 Distance i X 1 8 4 o (MILS) (2Q's) 16-24 Distance N W N 2 1 3 24-32 8-16 1 2 12-20 1 0 ) Index 0 8-16 1 0 1 0-4 W 15-24 MILS W N W 0 12-20 1 CNT WD W g Y g -8 MILS N 1) g -4 CNT 12-20 and Velocity Thresholds Y ) B! 1 1 (ips) 12.8 25,6 20 (5Q's) 32.0 16-24 @ v (4Q's) 20-28 g-4 Level Al 16 16-24 24-32 A2 19.2 - 1 Velocity (3Q's) 20-28 8-16 Velocity 12 12-20 @ I/5-18 Detectors AQ CNT N LN g 0 MILS W ) BACKWARD CNT LN W MILS B E2 W E1 N E2 Direction W El and W W DEC W~ PRESENT Samples N PREVIOUS Track Cdunt VS. Sérvo W Table 5-2 Count ROM Map Table 5-4 DIR SERVO SAMPLES FWD PREVIOUS PRESENT A7 VELOCITY SENSE LEVELS (1) THRESH Ey By Ey Ejp A A6 AS A4 A3 B0 flfl} p10 7 100 191 110 g 0 g 0 gool, 1101, 1101, 1101, 1101, 1101, 1101, 1111, 1111, 3001, 1111, 1111, 1111, 1111, 1111, goa1, 1191, 1101, 1101, 1101, 1111, 1111, 1111, 1111, < - 9801, >V (2) >V (2) (2)1(4) (2) g 1 1 1 1101, 1 0 g 0 1101, 1101, 1101, 1101, 1101, 1161, 1111, 1111, 1101, 0001 1111, 1111, 1111, 1111, 1111, 1101, 1101, 1011, 1111, 1101, 1011, 1011, 1011, 1111 1101, 1101, 1101, 1111, deol, 1111, 1111, 0001, a001, 1101, 1111, 1111, 1111, 1111, 1111, 1101, 1111, 1101, 1101, 1101, 1 1 0oa1, 1101, ) 0 g 0 J A 1101, 1 0 g 0 1 NOTES: 1 (1) (2) V. 1 These Vg4 Vv, 1111 V4(3) 1181 Vv, 1101, 1101, 1101, 1181 1011, 1101, 1111, 1011, 1611 vV, 0001, 1111, 1101, 1111, 1111, 1111, 1111, po01, 0801, 0001, 1101, 1101, 1101, 0001, goa1l, 00a1, 11081, 1101, 1111, 1111, 1111, 1111, 1101, 1101, 1111, 1111, 1111, 1111, 1111, 1111, 1111, 1101, 1111, 1101, 1111, 1101, 1111, 1101, 1191, 1111, 1111, 1101, 1191, 1811, 1111, 1411, 1101, 1111, 1101, 1101, 1101, 1101, 1101, 1101, V2 19.2 ips; Vy combinations should 001, 611, 111. \' Vs Vs = 32 ips is level V 38.4 ips) . quadrants not ips; Vv, 1181 v, 1111 v, (3) 1811 V4 1101 v, (3) Vy Address 110 interpreted as 11l (Majority Logic). 1611 v, 32 ips 1191 vy = Velocity for moves (4) 1/5-19 1181 V4(3) 1811 Vg 1911, occur. important Vo 1101, 1101, 1011, 25.6 1011 1111, 1111, V4(3) V3 1181 v, 1101, 1101, 1011, = v, 1011, 1101, 1011, v, 1101 1011 1111 1181 1101, 1101, 1111, ~ 1011 1191 1611, Detection six vy 1101, (3) of 1181 1611, 1111, 1111, 1101, 1101, 1911, 1111 L v, 1101, 1101, increment 1811 1111 1111, address Vv, 1811 V5 1111, 1101, 1111, = 12.8 ips; ‘levels 1101, 1101, 0o0o1, 1911 1181 V4 1611, 1111, 11081, Vv, 1191 v, (3) 1111 V3 1101, 1101, 1111, 1101 1811 V3(4) 1101, 1111, 1111, 1111, vy 11681 V,(3) 1111, 1111, 1 1111, 1181 1111 V4(3) 1911, 1111, 6eol, 1 1101, 11 1191, 1111, 1101, 1191, 1111, 1111, 1111, 1101, 11 1111, 1011, 1101, 1011, 1101, 1111, 1111, 1101, 1101, 1111, 1 1 1101, 1011, 1101, 0001, 1 g 1011, 1101, 1111, 1161, 1111, 1111, - 1111, 1141, 1111, >V 1111, 1111, 1111, 1101, 1111, 1101, 1111, BWD VEL in sense excess 5.1.3.3 E2 servo E2 Held F11p~Flop - This f11p~flop stores the previous sample. When the drive is in positioner, or "Lock On" B mode, the E2 Held flip-flop is used to determine rhe slopb of the Lock On bit (A of the Seek Control ROM - DL1). »Input: - Data " Clock | = E2 sample from DL7 = Sector time'(L) (from DL4) or Borrow (M) (from DLZ2, indicating a new dlfference counter) in the track 'Sét ‘-= Inner Guard Band [Guard Band (L) = El1 Held] | Reset = Outef Guard Bénd [Guard Band . (H) = E1 Held (H)]. Outpdt: - Q Q 5.1.3.4 used address = AddresS’Bit 5 (As)of thg Count ROM | = Address Bit-fl (Ag) of the Seek Control ROM (DL1). Velocity LeveIIDetectOrs - These three compatators are to convert the velocity feedback signal from the tachometer to <three blnary encoded address 1inputs to positioner the Count ROM, The velocity rectifier and input then signal Input: Refer to Table 5-3. Output: Refer to 5.1.3.5 Table Disable prevents 1is distributed extraneous first to the Count 2 Latch noise and before it - 5.1.4 Disk Speed Control Logic (DL4) - This portion functional of the elements: Drive has Logic © Sector Detection Timer @ Disk ¢ Sector Time Latch On The Disable glitches to "2" by detectors. a full-wave 5-3. counter count rectified level Speed counted Module Latch e Disk Overspeed Latch e Control e Timer and Latch Reset FlipéFlop Spinup Gate 1/5-20 from Count causing 2 the latch LS197 "1. contains | the | following Figure speed 5-8 a is diagram timing spindle detection and sector for control. 5.1.4.1 Sector Detection Timer - After the Sector Pulse has been Sector the detected, Timer Detection counts pulses to provide timing reference for the spindle It is reset by the Timer and Latch Reset One-Shot. 5.1.4.2 clock System down speed latches. Disk On Speed Latch - If the time between Sector Pulses Its that is between 594 and 639 microseconds, this 1latch 1is set. output 1is sent to the State Control Loglc (DL1) to 1indicate the disk is on 5.1.4.3 speed. Sector Time Latch - This latch is set by the Sector Latch Reset 1Its output, Sector Pulse and remains set for 62.5 microseconds. Time (L) is sent to the Count Logic (DL3), the Error Logic (DL5), an the Integrator Logic (DL7) to indicate that a sector has been detected. One-Shot. This '5.1.4.4 593 Microsecond Latch - When this 1latch ofitputs ‘the signal 593 latch is LT microseconds reset by the Timer a sector pulse, (on DLS), as well as true during (L) as and a disk over-speed indication is produced, i.e. the time between This sector pulses was less than or equal to 593 microseconds. condition sets the Spin Error in the Drive Status Word. 5.1.4.5 is fllp—flop a Control Speed Up Gate - The signal Control Spéedup generated when the time between sector pulses 1s longer bit (L) than '~ 625 microseconds, indicating that the speed of the Spindle Drive This gate is disabled by Disk on Speed or the Motor is too slow. Spin Down command from the State Control Logic (DL1). Control Speed up is sent to the AC Servo Module where it provides more ac power to the Drlve Motor. 5.1.4.6 Timer and Latch Reset essentially a one-shot producing resets the Sector Detection Flip-Flop a one clock Timer and Speed This flip-flop is cycle pulse which Latches. It is set (from the 2zero crossing of the Raw Sector Pulse when the Sector Transducer) is detected as the signal Sector Detected (L) goes hlgh | | 1/5-21 - #¥OLD3S(1)@310313Q_-J.—— | | K R 1/5-22 p1a L-¥3 9148-83(6-vir) " pN-O2S3tIva10@33d4S (1) B L1Q-v3¥ ¥10 ‘8dl G/~ 23S 3INOXD01D3T2AD©3AIM HXp¥SiO0IQL1Q8O)0-33(8SS5G3330I3JW4V1I)SL2H3(O7I1A)A3HO03S(11)(0£-G'r6-€13 0¥9-¥6S23STM»%S1QNOQ33dS 1601-2D S€TNHH6oOIVO5H.WH1LIDDI_HL33-NSOSfAOTLiMDNJ3V3H'1NSO0HILd33OY|S1S1|L3d1V(N0N11)(d(131))S3Y42(Hi)an|bt_.rg_lgl—.JGAOI@NI:dmN‘I:M0LwIEuoHOwLIq3IuS-.SM3SO)1HNdUl<0m¥9.Js@omv_\mmm.IHLo>us7n16oz—9ur]lNPU\TWTQOIY3d=€765slL. R S ._ j 5.1.5 module Error Logic contains (DL5) @ Disk Stopped Timer e Disk Spinup Timer ahd Error Latch @ Write Protect Détection and Error Latch logic Error - The error logic portion of the drive the logic elements ® Clock ® Write Gate Error Flip-Flop listed below. Detector 5.1.5.1 Disk Stopped Timer - If the drive is not in spinup state (from the State Control ROM), the Disk Stopped Timer will timeout 15 ) seconds signal after Disk Module to the last Sector Stopped (L). This disable the Spindle Disk Spinup 5,1.5.2 Pulse is signal detected, is sent Drive Motor. Timer and Error Latch - generating the to the | The AC Disk Servo Spinup ‘Timer is started by the Spinup command from the State Control ROM (DL1). If the Spinup Command is not removed (i.e., disk 1s not up to speed) within 39 seconds, the Spinup Error Latch and Spin Error flip~-flop will be set. | ) 5.1.5.3 Protect control Write condition panel the Write Controller signal is Write 5.1.5.4 is Protect Protect Detection and Error Latch - A Write is sensed when the Write Protect switch on the depressed. Error detected, Protect Latch 1If the Error this condition is enabled. Error Latch (L). exists, one If Write Gate is set, leg of from the producing the | Clock Error Detector - Continuous System Clock pulses keep capacitors C,, or C,, of the Clock Error Detector discharged. If the Clock pulses should stop, one or both of these capacitors will charge up and cause a high level at the 1nverter. produce the signal Clock Error (L). This will o Write Gate Error Fli’p—-Flop'-— If Write Gate from the 5.1.5.5 controller is enabled during Sector Time, the Write Gate Error Flip-Flop is set. This produces the signal Write Gate Error (L), which prevents overwriting of prerecorded I1/5-23 servo and header data. ‘5.1;6e. '“InterfaCel Logic (DL6 and DL8) - The portion of the Drive .’Logic Module ~contains Interface the logic Logio» elements lieted'below.,' ~-0'*InterfaceLineReceivers ° lnterfaceLineDriQers ':ol LlneReceivefP0wer48upply - el | MultipleDriVe Selection Error Detector e btivelselect Logic '@_ »_Interface Enable/Dlsable Loglc"' J;;o'_l FAULT Lamp Drlver Ml'o READY Lamp Dr1ver | 5.1.6.1 Sector Pulse Deteetot.ngThe>fraw-'sect0r pUIse; orlglnatlng from the Sector -Detector, is an analog signal. The - Sector Pulse Detector shapes the analog signal into a square wavenp or logic puloe producing Figure 5-8. ,tlmeout for the signal Sector Detected This signal is used to generate the Speed Control Loglc(DI4) the (L). 625 Refer to microsecond v5.l.6,2. ‘Enable/Dlsable Interface Controls_— Power_On<Reset.(L) is a -8 wvolt signal from the controller which performs the functlons l1sted below. S T R | Keeps the_drlve deselected from the interface bus if pc| is not within tolerances ‘power ie’a "When'dC'Péwer comeS“uP_toptolétanCér,the olgnal ensuresp”" that all drive latches, flip-flops, and counters »been'clearedvprior-to device startup have If the signal'AC LO'(L) from the controller is enabled the‘drive ,~finterfaceflbusgls d1sabled ~244. ;_1/5 < ~ P o o | | | - | | Integrator Logic (DL7) 5.1.7 Integrator Logic portion of the Drive Logic Module produces The the E1 and E2 Servo Sample signals, and Positioner signal, and the Ready to Read/Write signal. these signals logic elements used to The produce - are listed below. El and E2 Servo Sample Generation and Integration Loglic e¢ e Servo Data Latch ® Intégrate Circuit Enable/Disable Latches ® Servo Data Cycle Counter ° Integrate Enable Flip-Flop '6 El/E2<Integrator,Selector ® El and E2 Integrators and Polarity Detectors ® Guard Band Detector | Positioner Signal'and Ready to Read/Write Signal_Logic ® s Sample one-shot and Driver e Position Signal Sample and Hold Circuit ® Position Null Detector‘ e Retrigger Disable Latch R/W Timeout. Ready to ® E1 and E2 Servo‘Sample_ Generation and Integration‘ - 5.1.7.1 @ Servo Data, generated by the Read/Write Logic as Servo Data 1 and 2, is distributed to the Integrator Logic by the Servo Data Latch. Integration Circuit Enable/Disable Latches - These two latches are used to disable enable the have been the integration integration 1logic during logic after two sector integrations time and to (E1l and E2) performed. The second latch must be set before the first latch is set. The first latch must be reset before the second latch is set again. Sensor (L) and Amplitude As soon as data is sensed, Amplitude Sensor (L) 1is enabled. two integrations and The second latch is set by Sector Time (H), which means no data has been sensed as yet by the Read Logic. allows integrations to be performed. resets. The second latch further integrations until the next sector time. ' I1/5-25 This The first latch then counts will disallow any - Servo Data Cycle Start FIip—Flop - This Integration Counter to Circuit 1is enabled and flip-flop is set when the allows the Servo Data be loaded. Cycle | Servo Data CYcle Counter - This counter is used to count the ten ~and S, servo data pulses the El or E2 Integrators. Integrate sensed by thCh are to be integrated counting the pulses, the Integrate the E1/E2 Enable This enables either the El or E2 Integrators, which has been selected flip-flop. ~Figure 5-9 is sensed by the the Integrate a set of | by SR output from fllp-—flop and the the Servo resulting detected, the E1/E2 Integrator output of - | pulsesof is held Sample E1 or E2 and 75% shows an Generator and 1f 1ntegrated by sample signals, duty cycles, respectlvely.< depending | entire operatlon cycle of the El Integratlon loglc. Guard Band Detector Flip-Flop - If the Guard detects that reset integrator was selected by the E1/E2 Integrator Sservo on performed integrations shows Figure 5-18 50% Figure 5- 11 either the flip-flop toggles,'selectlng elther El and E2 Integrators - Ten servo data pulses are produce Data as Data Latch, or S, servo sample bursts are the El or E2 Integrator circuits. ThlS f11p~flop Sector Time is not being sensed. logic to is upon Selector the Servo | E1/E2 Integrator Selector - As s, upon which Selector. flip-flop depending Integrator scope waveforms showing Read Logic, the Enable o 1ntegrator. this either Enable Plip-Flop - As soon as Servo Data pulses are the Servo Data Latch and the Servo Data Cycle Counter has started set. by and E2 Servo Band’ flip-flop only one integration has been performed because only one set of servo samples was detected this flip-flop is set. The spec1al servo format for ‘the Guard band zones on the disk surface comprises contlguous S, bursts and an absence of S, bursts for the outer Guardband or contlguou5‘ 82_ bursts and an” bursts for the Inner Guardband. If only one integration only one of the S e absence of S - | is performed during'sector Time (i.e., or S%:sample bursts 1s detected) Detector fllp-flop is s fllp—flop 1s reset S the Guardband If two 1ntegratlons are performed ‘the 1nd1cat1ng Guardband | | '5 1'7 2 ; P051t10ner Slgnal and Ready to R/w Slgnal Loglc - Sample One Shot and Drlver - The Sample OneShot 1s set durlng El time by the El/E2 Integrator Selector. sample timing pulses to The Sample Driver provided the' Position circuit. 1/5-26 Signal Sample and Hold | INTH)__ INTEGRATE (H) | ' — | ‘ | — E46-5 | SERVO — SERVO DATA LATCH WWMW DATA ~ E46-6 LATCH. | ‘\_‘,_.m_/ —— SERVO DATA CZ-1052 Figure 5-9 ‘Seer Data and Integrate Enable Waveforms 1/5-27 INTEGRATE (H) , DT - SERVO DATA | ’ == [ A ~ N 1C _ INTEGRATOR | OUTPUT 7] A CZ-1053 Figure 5-10 50% and 75% Duty Cycle Integration 1/5-28 g8, SECTOR TIME (L) SECTOR PULSE (L) E1. E2, HEADER DATA AMPLITUDE SENSOR (H) INTEGRATE ENABLE (H) E1 TIME (L) | E2 INTEGRATOR e E1 INTEGRATOR 10 us/DIV CZ-1054 Figure 5-11 Integrator Logic Waveforms I1/5-29 ‘Position Signal produced - sample by Sample and Hold combining the sample signal one-shot Servo driver and Circuit - The the amplitude Signal. of of the to -0.6 Latch. Dlsable Position volts, Signal. an enable When a the Signal is from the Integrated E1 | 6.5 mllllsecond timeout it 51gnal _Ready to Read/write Timer - When the set, pulses | Position Null Detector - The Positioner Null amplitude from +8.6 Position timing occurs. Detector senses reaches 1s sent a level to the ranging the Retrlgger; Fmtrlgger Dlsable Latch The 1atch is set by 1s' the enable signal from the Position Null Detector and the Signal Enable Timeout (L) from the Velocity Control Loglc (DL2). Figure 5-12 is a set of scope waveforms showxng the generatlon of the Ready to 5.2 DC SERVO The DC Read/erte AND POWER Servo and the drive and 51gna1 Power servo MODULEA Module | | prov1des regulated dc voltages for ampllfler control for the. p051t10ner.; tr'% ;The power portlon of the module contalns the follow1ngelements:a' ', o"' +8 volt -8 volt - and +5 volt DC Regulators e +5 volt Reference Source | e" Undervoltage Detector 719,' +5 volt disable and Emergehcy RetractvContr01, o-;. Overvoltage Crowbar | o R Invert/Non Invert Sensors The Servo Ampllfler elements- e portion of the ‘Module contalns the follow1ng e Velocity/?ositioner Mode Seiection Switches . ihvert/Non—inVert Selection Control o summihg Amplifier o Power Amplifier ) ) Tachometer Ampllfler - Motor Current Sen51ng Re51stor 1/5-30 — — E25-10 READY TO R/W E25-5 __ POSITIONER SIGNAL {1 TRACK SEEK) CZ-1055 Figure 5-12 Ready to Read/Write Generation 1/5-31 5.2.1 Inputs Voltage Regqulators to the +8, -8, and +5 volt +11.5 volt power supply which is The pico fuse the 5 amp the +5 within short protects regulator. volt regulators drive provided logic in power the by the panel. event of a - | Overvoltage Crowbar 5.2.2 1s located on the drive If the 5 volt regulator fails (5 volt level increases to 6.5 provides current limiting Crowbar volts), the Overvoltage - ST | - | protectlon. 5.2.3 +5 Volt Disable and Emergency Retract o results in at 5.2, 4 Undervoltage Detector a 5 volt undervoltage If the read/write heads are loaded and condition is detected, the signal Home Drive 1is enabled. This and Amplifier Summing Servo DC the to directly fed signal is 'of 15 ips. an emergency retraction of the - - | R positioner . a R veloc1ty | | If this circuit detects a +5 volt undervoltage condition, the Power On (L) and DC Low (H) are generated. signals Power On Reset is used to clear all dev1ce registers and logic in | event of a momentary power failure or durlng dev1ce startup Invert/Non—lnvert Selectlon Control 5.2.5 from the State Control Logic (DL1l) The Direction signal 'by the Invert/Non-invert detectors positioner allows the (Sheet 1). The forward to be driven ‘Invert (L) 5.2.6 Veloc1ty/P051t10ner Mode Selectlon Sw1tches spindle). The signal Invert (L) allows backward (away from the splndle) The positioner the State data is Velocity head Velocity Control ROM ROM state, 1ncrements when 1t 5.2.7 The to p051t10ner The drive = feedback when it Velocity is locked Mode p051t10ner in one-half (L) predetermined data the Ve1001ty' The seeks, enables track ngnal a from from the the Mode on (L) during signal. the positioner to be drive | o positioner produces Non (toward the is locked on a velocity signal signal Positioner drive Amplifier except is sensed signal enables the Velocity Command Tachometer Amplifier Tachometer Mode Mode). (DLl1) 6(DL2) to etc. Positioner Signal The in track (Positioner the » the load the track from | the Tachometer Velocity signal is sent to the Count Logic (DL3) where it is decoded into three velocity levels for address inputs to the Count ROM. I/5-32 e Reset (L) 5.3 "The READ/WRITE MODULE Read/Write Module contalns the loglc elements ry Head Selection and Steering Logic . Write Enahlevflip—flop ° Write Data e Write Current‘Source and Switch e Write Current DriVers" llsted | below. | flip-flop de - Write Data Error Detector e | Current in Heads Detector ’e | ReadAmplifier - — ° - ZeroCrossingDetectors e Servo and Read Data Pulse Detectors -' Amplitude?SensorLevelDetectors. o Fall-Time Detector o Pick—Time Detector 5.3, l » - Head Selection and Steering C1rcu1t '~ The signal Head ~disables Head 1 Select Zero (L) by pulling its - enables the Head Select fl Gate and center tap to ground. This allows Read Data sensed by Head @ to be sent to. the Read ,(sheet 2) via steerlng diodes D11 and DlB'h Preamp11f1er If Head Select‘Zero is hlgh the center tap of Head @ is grounded and Read Data from steering diodes D;, head 1 is ‘sent and D,,. " During a write Operatlon, to the Read Preampllfler | | the combination of Write Gate (L) via and Head Select Zero is used to enable the Write Head Zero Gate or the Write Head 1 Gate. If head@ is selected, transistors Qé and Q¢ ~are turned turned on. on. If head I 1 is selected, transistors QS and Q, are S | The steeting network for head @ comprises'diodes D, During a write operation, write current is 8’ 11,'and fed to "head 0 " 'j'f}gmthe Current Drivers (Q, and Q) via 'steerlng diodes D, and 1/5-33 The D, steering network ,. During frmn the for head 1 comprises diodes D a write operation, write current Current Drivers (Q, and Q3) via Dyse and 1s fe to head 1 steering diodes Dy and lfl' 5.3.2 Write Source and write current source the Write Current Drivers. Write Current switches 5.3.3 The Switch. the Write Write Data Write Flip-Flop fllp-flop until sensed 1in con]unctlon with 5.3.4 Write signal (L) is The (DL5) is flip-flop the enabled first Data and no Current where detected, it 1is Pulse in flowing A e Current In selected is read in head from the Crossing Enable' controller is Sensor and when Write Gate back the heads | to the Write and Gate. no If Write is generated. Read/Wr1te Error Logic Module there Gate is comprlses the to and C,) pulsed read pulses. Detectors are raw output which converts raw , and C ) whlch removes I | the flltered then from the waveforms . shaped by | read pulses R/C networks | into Cl7’ o Sensor | | Level Detectors the , Pick-time Detector, and generate the data pulse envelope signal (H). the the This Header signal identifies Data. | | the.Sl and S, Servo | N Amplitude Pulses generated whlch ampllfles (Ly 51gnals The Amplitude Sensor Fall-time Detector Amplitude byvrthe IWrite the signal A flltervnetwork (L,, Lo, L,, C Zero flip-flop | Heads;Error separate pulse trains whlch ng and C39, R51. | Data Data detected The Zero Crossing Detectors separate 5.3.8 Write the feset (L) is with differentiator’ nolse 5.3.7 the below. analog s enables (L) 1is. sent Read Preamplifier A for (H) Detector Heads current the current Gate Write Gate. Data compared llsted ® of Write data pulse from the 5.3.6 Read Amplifier Circuits The Read Amplifier portion of the elements mllllamperes from held write Error is a data Write Current in Heads write 90 signal Error Detector Write signal The Current;DriversvQz,and-QB. Data The Drivers generates Write 5.3.5 - Current The 1/5-34 5.4 AC SERVO MODULE The AC Servo e Module Control - of prevents o provides the the cartridge opening rotating the door listed Access until o Door the - below. Solenoid disk has o ® Brush drive motor control e Spindle drive motor control 5.4.1 | functions which stopped » | Cartridge Access Door Solenoid: | ~ State Control Logic (DL1l) is in the Load Cartridge Sate, the signal Load Cartridge Enable (H) is generated. This signal turns off transistor Q. which, in turn, produces the signal ‘Solenoid Drive (H). TheTM access door may be opened at this time. - When the RUN pushbutton is depressed, Load Cartridge Enable goes low, energizing the solenoid and locking the access door. When the 5.4.2 Brush Drive Motor Control | | o | State Control Logic (DL1) is in the Brush Cycle State, the signal Brush Cycle (L) is generated. This signal energizes the Brush Motor Relay Kl which applieac s hot to the Brush Motor. When the Brush Motor has made one complete revolution, sweeping the cam-driven brushes across the disk surface, the Brush Home Switch is again closed. The State Control Logic disaables Brush Cycle (L) which deenergizes the Brush Motor Relay. | When the 5.4.3 The Spindle Drive’Motor Control Spindle ~during the ® states is of controlled by the State Control | the ROM AC Servo Module listed below. been loaded, the switch has been Contr911EG-Speed (RUN'mOde) Spin down. 5.4.3.1 cartridge depressed, ~the three Motor Spinup e a e Drive disk o Spinup State access door the turns, State the - After has the cartridge has been closed, Control sector ROM slots and the goes into located on are RUN the Spinup State. As the cartridge armature sensed by the sector transducer. The disk speed is checked by count theing number of Clock Pulses between sector pulses. If the disk speed control logic determin that es the spindle speed is too low (more than 640 microseconds between sector pulses) the , signal Control Speed Up (L) enables the photo coupler E2 which switches an R/L network into the SCR drive circuit. This provides 60% of the available ac power to the spindle motor. - As- soon as the spindle speed reaches the point where the time between sector pulses is 639 microseconds, the Disk Speed Control Logic (DL4) ~generates the signal Disk On Speed (L). I1/5-35 | - - 5.4.3.2 Controlled controlled speed 640 "When ,the to time Control Speed be switched available ac ,5.4,3.3._ Spin Down energizes State ‘between. Up is into power Spln sector to Down the State This drive drive - If it generates Relay K, and brake Servo 625 another and is in sector pulses reaches allows Module the ranges microseconds, R/L network provides 2@% to of the into the motor. State the enables signal AC between circuit the State, half-wave dynamic The pulses disabled. the SCR - time Control signal ROM Brake photocoupler to the motor. goes (L). El1 to - Brake (L) provide | a | o from Speed state when the 593 mlcroseconds. I/5-36 SECTION II SERVICING PROCEDURES CHAPTER 1 INTRODUCTION This chapter defines the maintenance philosophy and acqualnts the It reader with the structure of this portion of the manual. defines the required resources available to correctly maintain the The maintenance controls and 1ndlcatorsSubsystem. Disk RLP2 'RLA1/ are also discussed here,. MAINTAINABILITY FEATURES 1.1 The following paragraphs summarize the RL@G1/RL@2 Hardware The manual organization is outlined and an Maintenance Plan. overview of the various troubleshooting techniques is discussed. A listing of Field Replaceable Units (FRUs) is also giveng 1.1.1 Hardware Maintenance Plan Serviceability has been a major consideration in the design of the A large portion of the drive RLA1/RLP2 Disk Subsystem, electronics has been incorporated on one logic module, the drive The remaining electronics exist on the read/write logic board. module, dc servo module, ac servo module and the front panel. subassemblles and loglc modules can be electromechanlcal All This replacement replaced in an average time of twenty minutes. capability is accomplished without the aid of special alignment These designed-in features readily permit a fixtures or tools. Theremaintenance philosophy of module or subassembly swap-out. troubleshootlng strategy fore, the 1.1.2 Additional Documentation module or Table 1-1 to support subassembly and lists the the replace it. 1is to hardware documentation RLA1/02 Disk Subsystem. I11/1-1 1solate the failing | that will be available 1-1 RL@A1/82 Documentation M1crof1cheH :. Number ‘Name _RLll1Controller¢Technical,l Description RLV11l EP-GRL11-TD Manual Controller Technlcal RL8A Omnlbus Controller Technlcal Manual Disk Parts RLfl2 Drive EP-GRL8A-TM Illustrated Breakdown; Dlsk Drlve Illustrated , o Parts Breakdown RLfll/RL@Z Prevent1ve ‘EKfQRLflA;TM‘ EK-@RLO1-IP EP-08016-1P EK-0RLO2-IP [RLfll/RLez-Pocket Service Guide User's EK-@RL11-TD | EP-00016-1P EP-@@008-PM Maintenance Procedures RL@l/RL@Z Number EP-RLVII-TD Mdnual RL@1 Hard Copy D1sk Subsystem | , Gulde EK-RLP@12-PM EK-RLO12-PG " EK-RL@12-UG II/le \\M/ 5 Table l1.1.3 Field Replaceable Units Table 1-2 is a list of RLA1/RL@2 Field Replaceable Units (FRU's). Some of the FRU's contain components that are easily checked and replaced. In these cases, an FRU may be repaired instead of replaced. For example, a lamp may be replaced on the front panel or a pico fuse replaced on the DC Servo module. The decision to replace or repair an FRU should be based on such 1local considerations as part availability, etc. Some of the FRUs are interchangeable between the R1f#1 and RL@A2 and some are not. The interchangeability Table 1-2 is indicated in can be used on either drive with just spindle can be used on either drive. - FRU o Module (DLM) fuse RL@A2 are the same 54-13536 54-13534 74-20826 for both ' (DC Servo) 54-13531 (early) 54-14025 (later) 70-15116 drives. RLA1/82 Part Number 12-05747-00 AC Servo Module Front Panel - 54-11848 54-11846 Front Panel Lamp (GE Sector Transducer 73) 12-12716-01 70-12137 Positioner Brush Drive ~ 70-12117 78-12112 Brush Assembly Assembly Spindle/Blower 70-16726 Motor 70-12114 Spindle Drive Belt Spindle Ground Brush Coarse Filter | Absolute Filter I/0 Terminator 12-13369 74-15294 74-15297 12-13097-03 70-12293-00 ITI/1-3 RL@2 Part 54-11844 70-12120 FRUs modules The | Number | following amp Part RL@#2 change. 54-11850 74-18588 FRU 5 jumper 54-12175 Spindle The RL@l a Number Read/Write Module DC Servo Module ‘Template for DC Servo Logic 1-2. FRU Part Numbers and Interchangeability ‘The following FRUs are downward- cOmpatible only. ‘The Drive Table Table 1-2 RLP1/@2 Part Number FRU 70-12130 Block (voltage selection) 74-16852-B1A Line Filter - 12-12877-00 12-14360-02 e Circuit Breaker @ e e ® e e 11-10651-00 Rectifier 16-13897-00 10-1353-00 | transformer Vunreg' + for Cap, 66,000 uF Cap, 20,000 uF for - Vunreg Cap, for spindle motor Muffin fan 10-13531-00 10-13102-00 12-09403-01 -The'following FRUs aré not,interchangéablé between an RLO1 and an FRU - - ~ Upper Head Lower Head 1.1.4 | | - A RLOA2. RLE1 Part Number RLO2 Part Number 74-17178-81 74-17178-00 70-15637-01 W 70-15637-00 o Recommended Spare Parts List Table 1-3 shows the Recommended Spare Parts List. Table 1-3 Recommended Spate Parts List Branch Stocked | Part Number o o fDescription | 70-12130 54-11844 54-12526 54-11846 Power Panel | | Y Y - Read/Write Module (RL@1 only) - Read/Write Module (RL@1, RL@#2) Y Y Front Panel Board 54-11848 54-11850 54-13534 54-12175 54-14025 70-121087 70-12108 70-121089 'AC Servo Module DC Servo Module (RLO1 only) Y Y DC Servo Module (RL@1, RLO2) Y Y Drive Logic Module (RL@l only) Drive Logic Module (RLfll, RL@Z) Y ' 76-12119 Front .Panel Cable Harness Power Panel Line Cable Muffin Fan Cable N ‘N Y N - 786-12114 Disk Motor Assembly Y 70-12119 Rear 70-12112 70-12117 70-12120 - 70-15116 Y Brush Drive Assembly Positioner Assembly Cover | Spindle Assembly (RL@1 only) Spindle Assembly (RL@1, RL@2) II/1*4' = Spares Kit N Y Y Y Y Y Y Y Y N N N N Y N Y N Y Y N N N N % @ o Terminator N Power Panel e FRU Part Numbers and_Interchangeability" Recommended Spare«Parts Listi(Cont.) Table 1-2 - S Part Number Description 78-12123 Cable Logic 70-12139-02 AC Servo 70-121447 DC Power 76-12126 78-16852-01A 70-12136 70-12137 76-12139-01 N Head "A" 74-17178-¢1 70-15637 - 70-15638 RLA1K-DC - Cable N N Harness N | Y N Y Y Y Y Head Head "A" Down (RL@l) "A" Up (RL@2) Y Y Head "A" Down (RL@2) Y Y Y N RLA2K-DC Cartridge (RL@2) 70-12293 Terminator DC Servo Cable Gasket, Blower 12-694063-01 12-1436fl-62 Fan | N N Y N Up (RLOl) (RLOl) @ N N Y Y Cartridge 70~-12139-pD 74-15231 N N N N Y Absolute Filter 74-17178-68 Kit "N Y N Y N Power Harness Drive Belt Prefilter | 12-13097-03 ~ - Stocked = Brush/Door Harness | Terminal Block Assembly Positioner Harness Transducer Assembly Read/Write Cable 78-12142 12-13369 74-15297 ‘Spares Branch Y N Y N N Y N N < Circuit Y N N N Breaker SOFTWARE RESOURCES 1.2 l.2.1 Diagnostics T | | B The various diagnostics available for RLB—A RL11 and RLV1l-based subsystems are described in Appendix B, Paragraph_B.8, FConfidence- Testing" 1.2.2 Diagnostic Supervisor | | e All of the diagnostics run under the Dlagnostic Supervisor. When one of the dlagnostics is called up, the Supervisor asks a series of questions that enable the operator to set various parameters governing the specific diagnostic. The various commands the Supervisor will accept are summarized in the following paragraphs. (Questions whose answers are self-evident are not explained here ) 1.2.2.1 Hardcore Questions - Several Supervisor will ask do not have simple include the questions explained below., ‘The Supervisor SECONDS APART" will when of the yes or questions no | display the statement'”TYPE no clock is on the system. ~then subdivide the spacing for use as a clock. 1nterval should be as accurate as poss1ble. I1/1-5 that answers. | TWO CHARACTER The the These system | FOUR_ will The four second S | : requestlng 1is The prompt' "DS C>" ohe in Table 1-4. llsted "commands", which are of eleven ‘supervisor 'Table 1—4..Diagnostic Supervisor Commands DESCRIPTION ~commanp o STAA - | - “STArt:'diagnostiC’“and‘ then precduce | | ~ o RES o B for diagnostic tables). parameter ‘REStart the of generation questions tables ("P" o o dlagnostlc at ‘the point follow1ng the hardware questions. The "P" tables set up by the STA | coNn o o | D CONtinue the diagnostlc, at the beginning of the subroutine that was being executed when the diagnostic - was halted by an error or control "C"' PRO - PR_Oceed o at pIs the o | . | test’ing' with.the starting subroutine following caused the error report ‘all d‘j.;.{‘?~_-."'vDROp e - ~ the drlves under the of the one test, the yde51red un1ts that | from tested. "UNITS", in this The command being case, refers to the "P"’table units, not .necessarlly the device unit numbers. DIS will give the operator the drive unit number._ a0 | B . "ADD units back sequence after into the they had been by the DRO command. PRI - - stid7,' - testlng dropped . | | _,'PRInt any performance or statlst1ca1 tables accumulated dlagnostlc. I11/1-6 ~ diagnostic address DISplay the hardware "P“»tablesffor L - DRO | | - , command w111 be used by the S . Table 1-4 Diagnostic Supervisor Commands (Cont) COMMAND DESCRIPTION FLA FLAgs command - The current setting set up under printed out of all the flags STA command are ~inspection. Zero ZFL flags | CCI FLags set current - Aall are STA command Create Core 1Image command - This command enables a BIC file to be | Parameter parameters listed created on under ‘run Changes - 1in Type 1-5 to these diagnostics the " XXDP media. directions.) be (See | of any combination in Table 1-5 to affect the Table the indicated commands. Command Parameters - PARAMETER COMMAND STA the | cleared by this command. listing for Program command by the for DS-C>STA/TESTS: (insert test numbers desired from the test lists in the individual diagnostic listings; e.g. l:2 means tests means tests 1 through 10.) 1 and 2, number ~should take 1-5:8-140 5 and 8 - DS-C>STA/TESTS:6/PASS: of or through the passes (insert the diagnostic before halting) DS-C>STA/TESTS:6/PASS:2/FLAGS: (insert any of representing a these mnemonic(s) program flag(s)): HOE - Halt On Error LOE - IER Loop On Error - Inhibit Error IBE IXE - Inhibit Report Error Basic reporting | Inhibit eXtended reporting | | Error on line PRI - PRInt messages ~ printer | PNT - PriNt Test numbers as they are being executed 11/1-7 Table 1-5 Command Parameters COMMAND (Cont) PARAMETER BOE UAM - Bell On EBrror Bypass manual intervention tests - ISR - Inhibit Statistical Reports IDR - DRopping of DS-C>STA/TESTS:6/PASS:2/FLAGS: IER: PNT:BOE:IDR/EOP: equalling which the the (insert pass End Of e.dg. For example, command etc.) wutilizing parameter would at Pass message will every other pass, be printed; every third pass, possible a number intervals all changes, look like the the STA this: DS-C>STA/TESTS:6/PASS: 2/FLAGS:IER: PNT:BOE:IDR/EQOP: 3 RES Use to TESTS, be - /UNITS:1 on the PASS, tested; e'.g. (this device FLAGS will run specified 1) CON Use PASS " PRO Use FLAGS only DRO Use UNITS only DIS Use UNITS only " ADD ‘Use UNITS only or FLAGS PRI No variations FLA No variations ZFL No variations CCI Use TESTS, ITI/1-8 PASS or and/or UNITS DS-C>RES/TESTS:6 only FLAGS only in "P" test 6 table g STA (cont) Inhibit units Console Controls - There are three console controls that 1.2.2.2 They are all typed by to affect a running diagnostic. used can be specific letter. the typing while key "CONTROL" the down holding ' : (DS"'C>)0 return to the a Control "C" causes festing to cease and start | Control "Z" causes default values to be taken in any of the three operator dialogues. a supression of typeouts for the remainder of Control "O" causes the diagnostic or until another control "O" is typed. Hardware Questions - It is during the hardware'quéstion 1.2.2.3 portion of the Supervisor that the "P" (parameter) tables are built. There is one "P" table for every unit to be tested. Also, "UNITS" pertains to the "P" table number, not the device unit number . assigned If to supply the there which is doubt necessary as to DIS the drive, which command unit number Table (see information. has 1-12) been will . - 1.2.2.4 Software Question - The question "CHANGE SW(L)?" asks if any of the software parameters are to be changed. A "Y" will cause the program to ask various questions. For more detail refer v to the 1.3 individual program document. MAINTENANCE CONTROLS AND INDICATORS Figures 1-1 and 1- 2 show all RLEI/RLQZ D1sk Drive controls and indicators. l1.3.1 Power ON/OFF Circuit Breaker When the ac power plug is inserted into a 115/236 Vac, 52/68 outlet, ac power is applied to the rear panel circuit breaker the drive. When the circuit breaker is turned on, ac power applied to the drive and the blower motor is energized. Power Terminal Block Assembly 1.3.2 The RL@1/RL@A2 Disk Drive operates ranges at either 50 or 60 Hz: “~ ~ within two ac line | Hz on is voltage 9¢ - 132 Vac 1890 - 264 Vac These voltage ranges may mbe manually selected by changing the position of the terminal of the drive., Refer to block Figure assembly covers 1-2. I1/1-9 located at the rear 'LOAD SWITCH ~ AND INDICATOR ECT PLUG UNIT SEL DY INDICATOR AND REA N 1N FAULT INDICATOR WRITE PROTECT SWITCH AND INDICATOR S CZ-1Q05 Figure 1-1 RL@#1/RL@2 Disk Drive Controls (Front Panel) II1/1-10 and Indicators I1/1-11 HIAOD 2 | MIVOTIVINHON YNIWHIL M2078 aeay) (Toueg 0%2ZT0V/1N08I1WHY3SI3ALL01D0A LIN|JHID|HINVIHE 3INITJO2V1LiTnObAiaZ-TZOTH/THTHASTAIATIQSTO1I0UO3DPEUB0TPUI 9501-29 (.o/NI373718Vv28V..) '1.3.3 This Run/Stop Switch with push spindle on/push motor off LOAD Indicator switch, prov1d1ng all of when the depressed, following energizes the conditlons have been met: ® The disk cartridge has been installed ® The cartridge protective cover cartridge access door is closed 1is ® All ac within specifications ® The read/write the position © The brushes are in the brush home position When the and run/stop deenergized if dc voltages are heads are in switch is released, the read/write heads home the are 1in place and spindle not (retracted) drive loaded. the If motor the is heads are loaded, they are immediately retracted motor is then deenergized. 1In the event of and the spindle drive a main power interrupt and will subsequent switch 1is power in the depressed memory. The restoration, | LOAD enable conditions have The The The The state drive since it | indicator been the recycle contains up if the mechanical | is illuminated whenever all of these met: spindle is stopped read/write heads are home brushes are home spindle drlve motor is not energized 1.3.4 Unit Select (9, 1, 2, 3) Switch with READY Indicator The unit select switch is a cam operated switch which is actuated by inserting a numbered, cammed button. The switch contacts are binary encoded so the drive interface 1logic recognizes the matching controller generated drive address code and the corresponding ‘The unit numbered indicator, ‘condition. This have been met: o @ select number condition when (2, 1, 1lit, exists 2, heads are detented on a I1/1-12 3). indicates when 'The read/write heads are loaded The or all specific of a drive these track READY conditions 1.3.5 FAULT Indicator The FAULT indicator is 1lit whenever any of the error conditions develop in the disk drlveDrive Seek "Write Select Time Out Current following fault or Error Error in | Heads during Sector Time Error Loss of System Clock Write Protect Error Write Data Error Spin Error 1.3.6 WRITE PROTect Switch and Indicator When this switch is pushed in, it will lock position and the drive will be write protected. in the depressed If the drive is ~writing as the switch is pushed in, FAULT will light. switch is pushed again, releasing it from the depressed drive w111 no longer be write protected. I1/1-13 When state, the the | - CHAPTER 2 REMOVAL AND REPLACEMENT PROCEDURES 2.1 INTRODUCTION This chapter describes the removal and Disk chart the various Drives. sequence of Field FRU The Replaceable flow removal. ‘The number describes in each oval the removal and Units (FRUs) For Cartridge Access Cover must Field Service Access Cover, from the spindle pulley. reverse order of removal. | replacement procedures for in in Figure 2-1 example, the RL@#1 and RL@#2 1illustrates the to remove the spindle, the are generally | replaced 1in be removed. This is followed by the the Spindle Access Cover and the belt The FRUs of Figure 2-1 replacement for is the that paragraph particular Most of the removal and replacement procedures contain references to earlier paragraphs. This FRU. that in this chapter drive 1is simple enough that the FE should not have to refer back to these other paragraphs once he has had some experience on the drive. The flow chart can serve as a quick reminder, if necessary. o ) 2.2 FRONT BEZEL AREA R 2.2.1 Front Bezel To remove the front bezel: 1. 2. Turn CBl (rear panel) off and extend drive from cabinet. Locate and remove the Ph1111ps head screws as shown in Figure 2-2. | | CAUTION When remov'ing the last screw, hold the front bezel so that the bezel will strain the front panel switch cable. 3. - To Disconnect the orientation replace l. 2. | 3. - 4. the of front front panel the colored board stripe on not cable. the cable. Note the bezel: Connect:the front panel board cable. Locate ‘align the'txfib mounting holes them with thetop (Figure 2-2). Secure the finger-tight front bezel only,, Slide the drive bezel for mountlng correct mto in the front holes with the in the Phillips the cabinet and side-to-side clearance. I11/2-1 bezel drive head and frame’ screws, align the | front . s8¢ 9anbigT-Z[erACWAYpueJjusweoeTdaymu:msowMOTJd3aeyD vze I11/2-2 t've cve IHASINHYAQ iee L1'9¢ A[AN: I11/2-3 Y9inbigz-zjuoagI9zag3171434d 0801-20 Ve ONILNNOW 13INVd L1N3O23H8d 5. Extend the drive from the cabinet Phillips head screws securely. 6. Slide 2.2.2 To remove the replace the cabinet. the drive the prefilter (Figure located on the right front side of 2-2). prefilter: Install the prefilter in the recess located on the right front side of the drive, directly over the four air - chamber tubes (Figure 2-2). Replace the front bezel'(Paragraph 2.2.1). 2. To into prefilter: Remove the 2.2.3 back the Remove the’front bezel (Paragraph 2.2.1). 2. 1. drive tighten Prefilter l‘ To the and Absolute remove the Filter absolute filter: Remove the front bezel Locate latches Lift the two as shown one spring, of Remove plenum Repeat for the plenum' springs in Figure 2-3. the squeeze (Paragraph 2.2.1). plenum the and latches. latch and remove two plenum cover While holding plenum latch from bracket. spring. other plenum latch and spring. The plenum cover may now be removed by pulling the cover forward. This allows access to the filter (Figure 2-4). Use a screwdriver the left side of the right rocking it (or the one of filter side. The from side to the out plenum springs) slightly before filter can then be removed side until it slides free. NOTE Never reinstall a to pry moving used IT/2-4 absolute filter. by I11/2-5 ~ Ss8doy 123714 @3Infosqv €-g 2Inbrg HOLV1 //\ . II/2-6 A8SLI3AISLNOONISNOHATNO L 310N IT1ANVH 31NT0S8V 431736501-2D WN.I°Tadnbigp-Z 9In{oSqQY123714 I1LN10Sav 43114 To replace 1. filter: the absolute Insert a new filter is air duct its gasket. It into filter absolute the located on the left front side of the drive. agamst seated firmly cavity Be sure the may into use a plenum spring to pry the fllter necessary to be place. Place clear plastic plenum cover over the absolute filter 2. such 3. that the cover Install a plenum spring by inserting its bottom tang into the slot provided and rotating the spring such that it fits 4. inside the plenum spring While pressing latch and plenum cover, plenum the insert placing latch bracket. .\w/ seats on the gasket. spring the plenum Figure 2-3. the See latch bracket latch into (Figure firmly latch by the holes 2-3). the against squeezing the of the plenum | 5. Push the plenum latch into the "locked"'position° 6. Repeat the process 7. Replace the front bezel for the other plenum spring and latch. (Paragraph 2.2.1). 2.2.4 ’Ftont Panel Board To To the remove board: front panel 1. Remove the front bezel 2. Locate the screws holding the front panel board to the ) front replace the bezel (Figure front panel (Paragraph 2.2.1). 2-5) and remove them. board: 1. Secure the front panel board to the front bezel (Figure 2. Replace the front bezel (Paragraph 2. 2. 1), 2-5). | 2.2. 5 ‘Slide Rails To remove the slide rails: 1. Turn CBl1 off '(rear panel) and extend the drive to 'itfs_ second set of stops by releasing release catches on both slides. the I/0 cables and unplug the ac 2. the slide See Figure line cord. extension 2-6. Remove . Locate and remove the two screws securing the drive to each slide as shown in Figure 11/2-7 2-6 (detail). 11/2-8 N TP ainbtgG-gZ3juolg[auedpajurid3INDIT)pileog 8000-29 ' W/ 90000t R T J.-ooo”oom SLIDES RAILS M ° 0 ot 18 | § 9 IR | SEE : Jup DETAIL ACCESS SLOT LOCKING LATCH | SLIDE EXTENSION RELEASE CATCH cz-0009 Figure 2-6 Slide Rails 11/2-9 (See Figure Locate the locklng ‘latch on each drive rail. from the away latch each pulling Actuate them by 2-6.) drive the remove to time same the at drive and lifting . | slides. the from To Use 1b). The dr1ve weighs 34 kg (75 ~care. when lifting the drlve. 4. | . WARNING The slide raills may now be removed easily by remov1ng the four screws on e1ther 51de that hold the rails in place. replace the slide ra115° 1. Secure the slide ralls to the 51de of the drive, using 2. Extend both (F1gure 6) 2- four screws on each ra11..- slides. the dr1ve place slldes fully ~and onto the_ Ensure the locklng latch engages on each s1de- Secure the front sllde' screws first, ‘then adjust the',. slide pos1t1on to galn the rear screws. - See access to Flgure 2—6. 4. »Push the dr1ve 1nto the cablnet and reconnect the ac line cord and I/0 cables._ Turn CBl back on.. ACCESS COVERS 2. 3 2 3.1 Field Service Access Cover To open the Fleld 1. Turn CBl off (rear-panel) and extend the dr1ve from the‘ the cover as cabinet. Locate vshown 3. Serv1ce Access Cover- and ‘remove in the Flgure 2 7. capt1ve screwsrin Lift the cover up sllghtly and rotate backward. fRestthe cover on the 'rear flange' of the 'holdlng bracket (Flgure‘ 7) baseplate, using the To'remove the F1eld-Serv1ce‘Access Cover° lO Remove all cables connected to the Drive -Logic Module (Figure 2-8) noting the orientation of the colored ‘stripe on each cable. Lift cover off the holding‘bracket and set aside. 11/2-18 ‘\W—/< 3. CARTRIDGE ACCESS COVER FIELD SERVICE ACCESS COVER o - £ S. COVER TN AR "N HOLDING - BRACKET o | / |~ N cam”’ CARTRIDGE C°V< LATC LATCH MECHANISM SOLENOID COVER Eigure_2-7 ‘Fie1d Sétvice AcCéss_Cdvet»‘ I1/2-11 DRIVE LOGIC MODULE SERVO MODULE - R/W- MODULE D.C.SERVO MODULE AND TEMPLATE CZ-0011 Figure 2-8 Module 11/2-12 Location replace To the Field Service Access the cover Place (Figure baseplate of the flange the rear on 2-7). Cover: Reconnect all cables to the Drive Logic Module. Lift the place by into Cover. The rotate Cartridge edge the front o of Field the it place and it forward Access Cover 1is Service held 1in Access Tighten the captive screws. 4. Turn CBl on and slide the drive back into the cabinet. 5. 2.3.2 slightly, cover position. Cartridge Access Cover To remove the Cartridge Access Cover: Open the Field Service Access Cover (Paragraph 2.3.1). rear the Lift approximately two of part inches. the Cartridge push backwards on the cover latch mechanism. 4. will pop up in front. Lift cover straight The cover - up off the Cover Access » baseplate. The spring- loaded cover arms will snap to the rearward p051t10n To replace the Cartrldge Access Cover: 1. Pull the are forward the cover arms 3. Position the cover over the drive baseplate casting. front | edge until drive it they so that cover. Guide | in the engages baseplate. rollers provided on‘ the the | latch at and the - lower top the front 40' Lower rear edge to the baseplate. 5. Close the Field Service Access Cover (Paragraph 2 3. l) BRUSH AREA 2.4.1 To the 2. lip of the 2.4 to arms cover spring-loaded parallel Brush Drive remove l. the brush drive: Remove the Field Service Access Cover I1/2-13 (Paragraph 2.3.1). | (Paragraph 2. 3. 2) o Remove the'Cartridge'Access CoVer Locate the DC Servo Module (see Figure 2- 8 for locatlon) Remove the four screws securlng module to the baseplate° ~ the | Lift place 1t slots the module stralght up (F1gure 2 9) and plastlc template and | in the baseplate . Locate the brush motor assembly (see Flgure 2-10) an‘d remove the Phillips head screws located at the three corners of the assembly. '_Detach 7. replace 1. keyed cable connector (F1gure 2-9) . L1ft the brush motor assembly stralght up° o 8. To the the brush.drlve: Place the brush motor assembly over its mountlng sur face - and plug in the keyed cable connector, | . '.,'Insert the brush motor assembly 1nto,cavity and secure '-w1th three Ph1111ps Replace the DC head screws. , « " Servo Module., .lReplace the Cartrldge Access Cover (Paragraph\2,3.2)o Replace the‘FlelduServlce~Access_Cover (Paragraph 2.3;1)9 o 2.4.2 Brush T1ps | The brush t1ps ‘and brush holder arms are replaced as one unlt.‘-To remove the arms (and t1ps) | Remove.the ‘brush drlve.assembly»(Paragraph 2. 4.2). Invert brush motor ‘Remove - assembly and place on' work surfacee‘ retalnlng r1ng and flatwasher (Frgure 211) Carefully 1lift on brush drive llnk‘ assembly at end ‘connecting brush holder assembly, then pivot 1link assembly out of theowayag | | | | | CAUTION Too much force may break locating dowels. the plastlc | Slide brush'holder.off»mounting'Shaft; o I1/2-14 BRUSH MOTOR DRIVE CABLE CONNECTOR | ) NOTE: LOCATION OF CONNECDETORR IS IN THE CAVITY UN THE D.C. SERVO MODULE. | __——DC SERVO MODULE ) DCHOLDSEINRVGO || SLOT ~~ DCSERVO\ <} ,— HOLDING SLOT ’ CZ-1063 - Figure 2-9 DC Servo MOduie | - II/2-15 ~ BRUSH MOTOR ASSEMBLY CzZ-0012 Figuré 2—10VZExposed Drive'Baseplate o 11/2-16 FLATWASHER i~ SRUSH HOLDER ASSY/= 2 PLACES "8y N | BRUSH TIPS RETAINING RING | FLAT WASHER~__ — i B | RE';’?,'\,N(;NG FLAT 2 é 6 g = SY AS M AR BRUSH WASHEé '} ' BRUSH DRIVE LINK ASSEMBLY CZ-0013 Figure 2-11 Exposed Brush Drive Assembly I11/2-17 To replace the brush Slide lo new arms (and brush tips): holder arms onto mounting shaft (Figure 2-11) . 2. Install flatwasher and reta1n1ng ring as shown in Figure S 2-11. 3. Replace as shown in drive Figure link assembly 2-11. onto brush holder dowel - Replace the brush drive (Paragraph 2.4.1). 4. 2.5 brush MODULES 2.5.1 AC Servo Module To remove the AC Servo Module: 1. Unplug 2. Open the Field Service Access Cover 3. the ac Locate the cover (Figure power AC cord. Servo 2-12) Module and (Patagraph 2.3.1). (Figure disconnect all 2-8), the Remove the cables. NOTE The cover holddown tabs may have to be bent out of the way in order to lift the module 4. Unplug all cover. the' cables and 1lift the module out of the drlve. To replace the AC Servo Module: ‘Slide the module into place. Connect all the cables and replace the cover. Réplace the Field Service Access Cerr (Paragraph 2.3.1). Replace the ac power cord. DC Servo Module To remove the DC 1. Unplug 2. Open 3. Locate Servo the the ac Field the Module: power cord. Service DC Servo Access Module Cover (Figure I1/2-18 (Paragraph 2-8). 2.3.1). 4. 5. Remove the module to Lift four the screws securing the baseplate. the module and plastic template and . dis¢onnect all the cables. To replace the DC Servo Module: 1. Connect all cables to the module. 2. Place 3. Lay the the module module back plastic and into the template secure it with baseplate. 1into the positon four on top of the screws. NOTE If the DC Servo Module being replaced is the "o0ld®TM module (Part No. 54-11858), use the %o0ldTM template (Part No. 74-18588). If the module being replaced is a "new®TM module (Part No. 54-13536), it must be covered with a different template (Part No. 76-29826). 4. Replace the Field Service Access Cover 5. Replace 2.5.3 Drive the Logic ac power (Paragraph 2.3.1). cord. Module To remove the Drive Logic Module: 1. Open the Field Service Access Cover (Paragraph 2.3.1). 2. Remove all cables (Figure 2-8). Be 3. To 1. - on Remove cover, the and Ph1111ps lift out Drive Loglc the the the head screws holding the module. | 3. Close 1. the Replace the module inside the Field Service and secure the module with the Phillips head the Field Module of the module to the Module: Reconnect the cables to the module. Service Access Read/Write Module remove Drive Logic orientation cable. 2. 2.5.4 To stripe replace each connected to sure to note Cover Access Cover screws. (Paragraph ‘ thevRead/Write Module: Remove the disk cartridge (if one is‘in piace). 11/2-20 2.3.1). NOTE The the - be should ordered RL#2), the assembly will it. Part 54-11844 No. Part by is or If the replaced. module (RLAl) with not come | or (RLAl1 54-13536 No. parts Only the module “surrounding the module. itself several Module and Read/Write of consists "Assembly®TM Read/Write | - Remove the Field Serviée Access Cover (Paragraph 2.3.1) (Paragraph Remove the Cartridge Access Cover 2.3.2). Locate the Read/Write Module assembly (Figure 2-8). the Lift Module and rest rotate up, assembly it ‘toward it on the baseplate | | . 2-13) Servo the DC locating pins (Flgure Di sconnect the R/W head cables from the assembly. Remove the carefully top prying cover back lifting the cover. one tab at a time corner. of the the assembly (Figure four plastic locking 2-14) by tabs and sllghtly at each This is easily accomplished by prying and lifting the cover | 8. Remove the front piece of the assembly'(Figure 2-14). 9. Remove the module cable. 10. Slide the module out of the pan (Figure 2-14). To replace the Read/Write Module: Slide the module into the~pan (Figure;zslé). Reconnect the cable to the Read/Write Module. Replace the front piece of the assembly. Replace the the cover top cover of the assembly by pushing down on until the four plastic tabs secure the cover. 5. Reconnect the cables to the assembly (FigUIe 2=-13). 6. Place the assembly back into the baseplate. 7 e Replace the Cartridge Access 8. Replace the Field Cover (Paragraph Service Access Cover 11/2-21 2.3. 2). (Paragraph 2. 3. 1) A18W3SY\ \\..ql./, o@2anbra €1-¢ 23T1IM/peay oINpPoW (3ybradn) _ ) gt[tW\41 707 \RQ:1 , 7 ¥S02-20 TN “ (',',(, ””llmmmua_(um(““-““m“ I11/2-22 ‘"(‘u era > ot g | | # I \-TOP COVER : | , ! | | | o N ~ FRONT l- e LOCKING TM PIECE .LOCKING - TAB -READ/WRITE MODULE | — JUMPERS MODULE SLIDES ouT | LOCKING > | | | TAB €2-2085 ] Figure 2-14 Read/Write Module'Box'Disassembly‘ 11/2-23 2.6 SPINDLE AREA 2.6.1 Belt - From Spindle Pulley To remove the belt from'the spindle pulley: 1. Remove the Spindle Access Cover (see Figure 2-15). 2. Slip belt off the spindle pulley. | To replace the belt oh the spindlepolley: 1. Slide the drive belt on the pulley and rotate the spindle so 2. 2.6.2 that the pulley will drag the belt onto itself. Replace the Spindle Access Cover. Spindle Ground Button To remove the spindle ground button: 1. Remove 2, the Splndle Using Figure brush strap Access 2-16 as enough a Cover (see gu1de, to allow the Figure pull down ground To replace the spindle ground button: 1. 2. Pull down insert the To on brush the to | ground drop. | on the ground brush spring ground brush (Figure 216) Jjust | enough ) to Rotate the spindle several times to ensur e flrm seating - and to 3. 2.6.3 2-15). check that the spindle does not blnd Replace the Splndle Access Cover (see Flgure 2-15) Spindle remove the ’ | ' spindle: 1. Remove the Field Service'Access Cover (Paragraph 2.3.1). 2. Remove the Cartridge Access Cover (Paragraph 2.3.2). 3. R‘emo've the belt 4. Remove the two screws . 2.6.1) . the > spindle from (Figure | the spindle holding the pulley A (Paragraph sector transducer to 2-17). 5. Remove the cable clamp (one screw) holding the sector transducer cable to the splndle (Figure 2-17). - 6.' Lift the spindle straight up out of the,baseplate. ITI/2-24 | ) OF DRIVE \— BOTTOM _— SPINDLE ACCESS_COVER - ~cz-1060 - Figure 2-15 Spindle Access Cover | I11/2-25 LOCKWASHER SCREW ~ f BAP SPINDLE GROUND y BRUSHSTRAP VIEW FROM ACCESS HOLE CZ-2029 "Figure 2-16 Spindlé Ground Button " II1/2-26 .N i/l =7 11/2-27 To replace the spindle:; Insert l. the spindle the head To that spindle Secure 2.6.4 spindle so into the the locating assembly. the splndle to the 'Replace the Cartrldge Replace the belt on fits Position the into the recess in » the baseplate screws. Replace baseplateu pin the pulley three Phllllps_ (Paragraph 2. 6 l) Access Cover Fleld Serv1ce w1th | Access (Paragraph 2. 3 2) Cover (Paragraph 2.3.1). Sector'Transducer, remove the sector transducer: - Remove the Field Service Access Cover (Paragraph 2 2. l) Remove,the.Cartridge.Access-Cover (Paragraph 2 3.2). Remove the two spindle (Figure Remove the the screw splndle Remove screws -Remove ‘transducer ) the transducer 2-17) . holding baseplate. the | holdlng (Flgure the screw ,holding 2-17) . | the the three cable transducer | ground | other cable clamp the clamp to . | to | screws.j' lug to the _ : ‘Unplug the cable from the Drive Logic Module, notlng the orlentatlon of the strlpe on the cable.. Remove the transducer routlng. "To replace l. 20 | cable, | . notlng the path of cable | the sector transducer: Route the transducer path of removal. Replace the three reinstall the Replace the the screw baseplate Replace the into screws irxdthe baseplate. hold1ng the drive | o the followi’ng the o | cable . transducer clamps (Figure holdlng the 217) I1/2-28 transducer and”' , ground lug (Flgure 2 17) the screw spindle cable in | R cable clamp , to to,' the holding screws transducer to the Replace 6. Replace the Cartridge Access Cover 7. Replace the Field Service Access Cover (Paragraph 2.3.1). (Figure spindle 2-17). v (Paragraph 2.3.2). POSITIONER AREA 2.7 | 2.7.1_ To two the 5. Postioner‘ remove the positioner: 1. Remove the Field Service Access‘Cover.(Paragraph 2.3.1). 4. Remove 2. Remove the Cartridge Access Cover (Paragraph 2.3.2). A3,‘ vRemeve the DC Servo Module (Paragraph 2.5.2). | Steps 1 Module the Read/Write through (Paragraph 2.5.4, assembly 5). - 5, - Remove the head cables from the module assembly (Figure 2-13) . to the Place the pOSLtioner back‘ into the baseplate of the Remove 6. the baseplate 7. six (Figure the screws .holding 2-18). positioner Lift the positioner up and out of the drive area. NOTE The Read/Write heads are not part of the postioner have to be assembly. removed Thus, from they will the old tioner and attached to the new one. posi- The "head removal and replacement procedure is described in Paraqrapb 2.7.2. A To replace the positioner~- | | 1. drive. | | - NOTE The it 4. into place. Seeure ‘the 2. 3. postioner is fragile. Lower p051t10her head screws Phllllps - | Do not - drop it gently. to the baseplate (Figure 2-18). with the B six Replace the head cables into the module assembly (Flgure2-13). | | Replace the DC Serve ModUle (Paragraph 2.5.2). 11/2-29 | THESE 2 SCREWS ARE NEAREST THE MOTOR SHAFT AND ARE THE LONGEST OF THE SIX MOUNTING SCREWS. e HEADS HOME SWITCH ADJUSTING SCREW POSITIONER ADJUSTING SLOT POSITIONER ADJUSTING SLOT —/ \%> | '/; /_ ‘}; N N | ' \ | v Figuré 2-18 ' v. | L SN | :5’ Positioner Assembly I11/2-30 | ] '/f\-‘ Replace the Read/Write Module assembly (Paragraph 2.5.4). 5. 7. Replace the Field Service Access Cover 8. Perform Paragraph 2.7.2 To (Paragraph 2.3.2). Replace the Cartridge Access Cover 6. Alignment Radial Positioner the (Paragraph 2.3.1). r (Chapte3, 3.5). Read/Write Heads remove the Read/Write heads: Remove the Field Service Access Cover (Paragraph 2.3.1). (Paragraph 2.3.2). Remove the Cartrldqe Access,Cover Remove the Read/Write Module assembly (Paragraph 2.5.4). Disconnect the 2-13). (Figure head the from cabies | | module | assembly Usé a 3/32" Allen wrench to loosen the captive head retaining screw and carefully slide the head forward, out of the positioner allow the Do not the procedure. bump 6. assembly Repeat or for CAUTION head on the drag (Figure being ather 2-19). temoved head to durmg the other head. To replace.thé Read/writé heads: l. the Insert lower head into the positioner frame such that: (Figure 2-1_9). is in the recess of o The locating pin o The tailstack fits into the carriage assémbly o The the tailstack corner extension of of the head the head fits into the plastic Slide the head to the rear of the drive so that the head is up against the locating pin. 11/2-31 o 2 N TM \ ,;y//w | | 11/2-32 mexmwww , /J/_, % ddown screw to Using the 3/32“ Allen wrench, snugh thé hol | . secure the head in place. " The screw aluminum | |is - CAUTION being casting. tightened into an Do overtighten not this screw and no damage w111 occur to : the threads 1n the castlng. Insert the upper head into the rm51tloner careful not to strike the lower ‘head. the Secure with Reconnect holddown frame, being D screw. into the Read/erte Module the head cables . connectors (Figure 2-13). The lower head cable (J3) is inserted into the connector to the left of the upper head The J3 connector 1s the one closer to cable connector. ~ the rear of the drlve. _.Replace the Read/Write module assembly (Paragraph 2.5.4). 'Replace the Cartridge Access Coverr(Paragraph 2.3.2). Replace the Field Serv1ce Access Cover (Paragraph'2.3.1). 1@. REAR PANEL AREA 2.8 2.8.1 To (Paragraph 3.6) . Perform,the_Read/erte head allgnment Power Supply' remove the power " Remove Steps 1 the supply drive through from the sllde ralls 2. 2 S, (Paragraph 3). RemoVe‘the Field Service Access Cover (Paragraph 2.3.1). Remove the Cartridge Access Cover (Paragraph 2.3.2). - Remove the AC Servo Module (Paragraph 2.5.1). Remove the DC Servo Module (Paragraph*'z.S;z, Steps 1 | through 4). | - Place the DC Servo Module on its edge in the mountlng slots provided (Figure 2-9) and disconnect cable J1l. Di sconnect (Figure brush motor drlve 2-11). 11/2-33 cable from its connector 8. At the rear of the drive, remove the six mounting (Figure 2-20). | | screws . - CAUTION - The power panel assembly will sw1ng out ~away from the drive after the last screw is removed. Therefore, the power supply Panel unt11 should be held firmly in the last screw is removed ' To replace the power 1. Slide the ensuring 'o‘ place panel assembly rear panel aSsembly into the rear of the drive, that' The top edge of the panel flts under the rear casting = flange (see o The | of bottom the Flgure edge of drlve (see 2-21, callout #1) the panel Flgure f1ts 2~21, over the bottom pan callout #2) 2.:‘]Wh11e holdlng the panel flrmlyy start the twollbottom - - screws so remalnlng that four the panel will be held in place screws. for the v ~3._ Reconnect Jl.of the DC Servo Module. 4. Reconnectthe.bruSh,motor drivecable(Figure2~9). 5. | Replace the DC Servo Module (Paragraph 2;5{2). 6. Replace the AC Servo Module (Paragraph 2(5 l)l 7. Replace the Cartridge Access Cover (Paragraph 2.3.2). 8.“\ PeplaCe the'Fleld Serv1ce Access Cover (Paragraph 2.3.1). |.9. - Replace the drive into the cablnet-(Paragraph 2.2.5). 2;8.25pind1e1DriveBe1t ' To remove the spindle drive belt: 1. "Remove the power supply (Paragraph 2.8. ll '2. Remove the belt from the splndle pulley (F1gure 2-15). 3. -"Remove the drive hou51ng 4. (Figure motor tensmn 222) spring from Pull belt out through the back of the drive. - I1/2-34 the motor 1/0 CABLE | ("CABLEIN") TERMINATOR ~ NORMAL/LOW | LINE VOLTAGE — K BLOC " TERMINAL - - COVER. ~ 110/220 VOLTS 'TERMINAL BLOCK COVER Acunecorp /' CIRCUIT BREAKER | Figure 2-280 : R S Rear View of Drive ‘11/2—35.7-' CZ-1056 | I1/2-36 | REAR POWER PANEL ASSEMBLY | Figure 2-21 ‘Rear Panel .-ASSembly \\an-»/ MOUNTING SCREWS (6) C2-0015 SCREW— H ER 3y —— LOCKWASH STEEL WASHER—__ ]~ SPRING WASHER—N= STEEL WASHER—Z=4 ° DELRIN WASHER— 353\ 'DELRIN WASHER—= - CZ-1062 ‘Figure 2-22 Drive Motor Mounting . 11/2-37 To replace the spindle Ensure l. drive the as it Slip belt 2. and drive belt: drive motor will go. housing under housing slide the belt 1is (around 1in the as the far forward drive direction in the motor pulley) the spindle of pulley. From the access in the bottom of the drive, slip the belt onto the spindle pulley. Ehsurevthe belt'is sti1l on the motor hoUsing pulléy. Slide drive motor housing as far to the rear of the drive as it will go, and reinstall the tension spring. 'Rotate the spindle several times to position the belt on the self-centering twists The in 2.8.3 To and check for binding and/or tension as applied by the illustrates * o the proper belt ~ belt should have tension spring. tension. 8. pulleys the belt. proper Figure o 2-23 ‘Reinstall the power supply panel (Paragraph 2.8.1). Power remove the Supply Fan power Remove the supply fan: power supply (Paragraph 2.8.1). Disconnect the ac plug to the fan. ‘Remove The wrench To replace 1. the four screws bottom or a the power two nuts pair of supply and nuts holding the fan can be long-nosed accessed with in place. an open-end pliers. fan: Place the fan in place with the ac socket located on the and the airflow direction arrow pointing to the rear of the assembly. top Reinstall the guard. Reinstall four screws securing supply (Paragraph the fan | the power I1/2-38 2.8.1). and finger SPINDLE PULLEY DRIVE BELT (NORMAL PATH) DRIVE ' MOTOR PU LL EY ~ SPINDLE GROUND BUTTON | 'SPRING ) DRIVE BELTWI TH c2.0016 Figure2—23:'DriveBelt‘Tension | 1I1/2-39 2.8.4 To Circuit Breaker remove the circuit Remove the power Locate the wires going Remove breaker: the supply (Paragraph 2.8.1). circuit breaker (Figure 2-24) to the four breaker terminals. four wires on the breaker and mark the assembly. Squeeze on the feur,plastic-holdinq tabs (two on the top of the breaker Slide 5. breaker and from panel (Figure out the panel, the the breaker two on the bottom) to release the 2-24). toward the rear. To replace the circuit breaker:“ Slide 1. the breaker into the power that.the "OFF" Reconnect 2. position the w1res - to breaker, ‘as the ensuring marked when Reinstall the power supply panel (Paragraph 2.8.1). 30 " To going supply panel down. | removed. 2.8.5 is Spindle remove the Drive Motor spindle Remove the drive power Remove the housing (Figure Remove the standoffs motor: supply drive (Paragraph motor tension 2.8.1). spring from the motor 2-22). two drive (Figure motor mounting 2-25). screws from the | Slide the drive motor housing forWard_slightly and lift the To assembly up approximately one-half S Drive belt should have 6. Slide drive motor out replace 1. 2. the spindle Check to see pulley If From the back the slack. drive if not, the fallen of if not, remove it. drive. motor: drive replace of the the off; inch. belt is still on the on the spindle it. drlve, I11/2-40 pull belt to take away " REAR PANEL ASSEMBLY S CIRCUIT BREAKER CZ-0017 Figure 2-24 Circuit 11/2-41 Breaker I1/2-42 N S30vid |\mw./ NOONIIYSdSNAL I- ¥uouoz.u>flun,.mrm_musm6f4lm\0aANHTVq1uS\af\s\yanbruy)osy 431714 |vDoLz.U0o| Slip the belt‘entovthe drive-motor pulley. Using the Figure 2-25, drive, noting reinstall that- drive motor 1nto | the rear of | ® Tab (B).fits under bracket (C) ® Blower housing mOUnting pads_fit over theestandeffs” & _'Deltin Specers.are still on the standoffse Check that belt did not come eff the motor pulley. If the belt is still on, check to see if it came off the spindle pulley. If belt Attach the drive housing (Figure is off, replace on the pulley. motor ‘tension.‘Spting to the motor | 2-22) . | o | a Install mountlng hardware on drlve motor housing, using~.' Flgure 2-25 as a guide. | " pull backward on ‘the drlve motor hou51ng to apply ten51on to the belt | Ten51on spring should hold motor in place. 10. Rotate spindle several .times to posxtlon belt on the.‘ 11. " The belt should have proper tension as'applled by the: crowned tension ~ 12. . self—centerlng pulleys._ sprlng. Flgure 2-23 111ustrates proper tension. ,VReinetall.the power}supplyipanel“(Patagreph 2;8,l). I1/2-43 be1t~ | CHAPTER 3 CHECKS, ADJUSTMENTS AND ALIGNMENTS | INTRODUCTION 3.1 Many of the checks, adjustments and alignments described in this chapter deal with the Drive Logic Module (DLM). Because there are three different versions of the DLM, it is necessary to first identify the particular type of module on the drive being serviced. ® The three versions Version fact of 1 that the bottom (Part the two are No. point in 54-12175) Berg module point row shown can be 3-1. identified connectors in the down, up. Figure which This the board will lower other by right two the hand along only operate in the an RLOA1. °® Version 2 the bottom module ° Berg function in an as R1#1 arrangement of has in Figure 3-1) jumpers used Table 3-1. that 2, but are not on E33-3 3 In in these - checks for | test lugs the other of adjustments . o v | E17-6 to E19-8 to TP1-6 E54-12 to TP6 TP1-4 of select - TP8 to to E17-7 to are TP23 to TP26 performing Head accomplishing 1 and this -| - TP24 some then are of shown I11/3-1 the later in | SELECT HEAD 1 E10-7 TP25 to TP20 mehtods and DEFEAT SK TO E54-7 the course either DEFEAT POS SIG TP19 to necessary to also | DEFEAT E33-7 it Service Jumpers for Drive Logic Module COVER SWITCH 2 RL@2. in This 54-14025) has the same service | an or 3-1. Version Table 3-1 1 connectors Figure as | VERSION four 1in No. modules. in has all up, (Part two listed 54-13531) pointing connectors (shown The No. row will Version 3 - (Part TP21 to TP22 alignments, reselect Head Table 3-2. #. it is The LTANVPF~ e s 1 Z d L ® @ 2 4 1 l €EidLe . @02dl .. . ,. - sAarigo1bo7mvfinvozInoke] . sil. . ONI6Sliddll N6Y0HL89z TlaL LNIOd NMOQ LO1H AINO Lo 910-20 OSLbdZl3L-P-S old I|e SZiHdl3ALN Jo2A4*1ldL TeS‘dZ1O|&vL-TSvYrS),|BYH@.R<;|©6sT&PlzOTd9]d°|llR._e4-Z€tO|) n.LZlWd,EL4M|3\/3LmOiNH: SIlhLON3AQ34’3:4c..d1“m)£Tl¥h1S NeLEdStEL-SPISr Hpidl]| OISH3IA‘¢TJLON[im0 tdl|31 S2LF0VMA4HL"ONI6NHiOHOdH14LO041N70YZ7|HOHTLH‘9.2oRo zv301eIZSzS-3dI61€kHeLwTLns)-9r3HLLS10vnI813LV413SdSI1s°9A0|NQHOv43L43AY3H0VSDL(QG-33S100H112D .| ..@2a|nLbl1dLgeT-€.6dl. ¥rONVLiFINIOdd- 9Z-6ZLv343dSOdOIS 9SddlL)T8d1||LdizZidy91dLWL- ZL €1 ‘310N I1/3-2 _ '_ 1HL2ONM0414 Table 3-2 Methods for Selecting DLM VERSION 1 OR 2 PDP-11 DLM VERSION 3 Load DZRLCXX or CZRLIXX and Jumper TP21 to 22 WRITE No run 1, PDP -8 | Heads head run PROTect out " Load = head or AJRLHXX alignment = in = = Head Head 1 | jumper = Head @ 0 PROTect out routine. switch Head AJRLBXX WRITE l, alignment Head and Same as above routine. switch in = Head # NOTE If diagnostics in the Appendix 3.2 The the are not appropriate available, program toggle shown in C. VOLTAGE CHECKS DC Servo module template following voltages. points. | Check The regulators on the DC Servo module are not adjustable. If a Voltage voltage The the on is | voltage indicates test Limits +Vin +14V to +18V -V ~-14V n to -18V 59 +4.85V to +5.35V +8V +7.7V -8V -7.7V to out of tolerance, the to +8.3V faulty -8.3V FRU should be replaced. +5V can be killed by a blown pico fuse, a thermal switch on DC Servo heat sink, an overvoltage crowbar, or a home switch the 3.3 This positioner not closed during power SECTOR TRANSDUCER OUTPUT CHECK check verifies a correct output A. Required Tools: l. 2., Oscilloscope DIP clip. with probe I1/3-3 of up. the sector | transducer. ‘ —~——— Check: Remove both top cover assemblies. Instali cartridge. Defeat the cover interlock (Table 3-1). LOAD sw1tch Depress While set waiting the up the heads. to for (sync oscilloscope onto load internal the pack, negative- going) . ha. Version 1 of DLM: Place oscilloscope probe on 6b0 Version 2 of . 0C Version 3 of DLM: Place oscilloscope probe on TP14. | 8. Place oscilloscope probe on DLM: E8, pin | TPl4. The signal displayed on the oscilloscope should be The peak output similar to that shown in Figure 3-2. of the negative portion of the waveform should be and #.35Vp between 1.5Vp. NOTE The wave form must be negative-going first. CHECK SECTOR PULSE TIMING 3.4 This is a check of the sector pulse width and repetition rate. The repetition rate is a function of spindle speed. A. Required Tools: with Oscilloscope probe. Check : Remove both top cover assemblies. Defeat cover interlock (Table}B-l). install cartridge. Depress LOAD switch. probe on TP9. 5a. Version 1 of DLM: Place the 5b. Version 2 of DLM: Place the probe on TPll. 5¢c. Version DLM: Place the TPll. 3 of 11/3-4 probe on v +V. I | / 4+ asv. |\ to \ 4 [V | 4 , e L b S A I AR (A SREE] | : I : ov ' - ; | ¥ NN SN S— T TIME = 100 uSEC/DIV. ‘ -V. ) \ Figure 3-2 Sector Transducer Output II1/3-5 Set the oscilloscope going. The should be the width should speed sector pulses within that read/write 624 should be pulses from observe how travel_,and the that cartridge hub. occur in straight also the acts as negative- oscilloscope Sector pulse Correct disk 594 microseconds being the stable desired at to 639 norm. some time The period range. assures heads) the Figure 3-3. microseconds. POSITIONER RADIAL ALIGNMENT ~ This adjustment internal, on in from with sync displayed same as be 62.5 ranges microseconds, 3.5 to signal a l A. ~ Tools Requlred: the . the servo proper It burst (as enables the time also carriage motion check for head - 3 relation 1is over skew. read to the by the sector technician to the of length - 1. OScilloSCopewith‘twoprobes 2. Two flat—blade,screwdrivers - S _6. 3. One Phillips head screwdriver lead, or ~4b. cllp,' one pin-to-pin T, T jumper and o | | one test | \\&‘./ g 4a. One DIP Two pin-to-pin jumpers'and two DIP clips - 3. 'Diagnostic‘liSted in Table 3-2. _B. - Positioner Alighment Check1. Remove both top cover assemblles.' | 2. Defeat POS SIG, SKTO and cover interlock (Table 3~l) 3. Place of the the way Read/Write of the module carrlage box | assembly up ‘and out assembly. 4. Install cartrldge. 5. Depress LOAD switch. 6. Wait for heads to load onto the pack. 7. Disable servo drlve to the carr1age by dlsconnectlng | the 8. Select Head 1 -9, 1n line connector Place of the (Figure 3-4). (Table 3—?) the Channel B osc1lloscope probe on TP2 (data) Read/Write module 11/3*6 and Channel A ground on TP3. - o s L gma 4.1 ARy SRR P 1 Ty 2 R Vv ARDO-y R 1 B v ALl AR Ty g v Ag T TTrTTTY 625 us . +- 1 41 2.2 LA 1 ¥ < I ] .3 2 4 2 2 eV § @ v L 2B J 4 2 9 2 o - + R o - -l ] + - - 1 L e L P ¥ ullLA 2 2 a2 b 2222) T TIME = 100 us/DIV. VOLTS = 2V/DIV. Figure 3-3 C2-1078 Sector Pulse Timing I11/3-7 I1/3-8 | , ATque 9anbiyP-§€18auoT13isodpuemflsvo:.muflMZ\nmmogXm<19 ¥502-Z0 l1da. Version TIME) 1 of and DLM: Place Channel B Channel ground (TPl""TP4)e 10b. , Version 2 of DLM: TIME) and A probe on , any : on TP9 signal (SEC ground | Place Channel A probe on TPll Channel B ground on any signal (SEC ground (TP1-TP4). l6c. Version 3 of DLM: TIME) and Channel Place Channel A probe on TPl1l B ground (TP1-TP4). 11. Set on the oscilloscope Channel A and to | the sync internal, the waveform observe ‘ and any signal (SEC ground | 3-50 S1 on A | , negative-going shown | " NOTE S2 servo bursts may not in 4 | R appear in Figure 4 positive/negative proportions shown in Figure 3~5, depending upon which track the head is centered on. | 120 Measure the time the sector pulse burst when this value. the positioner is | | Cylinder 0. Record | 14. Repeat Step 12 for Head @#. 15. If the difference between these two values than six microseconds, replace Head # (see is greater Chapter 2) and two go 170 back (Table at Select falls # the negative-going edge of beginning of the S1 servo 13. 16. Head between and the to Step outside of 3-2). 14. the Record this value. 1If 15 + either 3 of tion, perform the alignment Otherwise, continue. procedure Manuallly to the or track 511 move (track 255 Head ©# enters Move the Measure the the an carriage RL@A1 the inner positioner the sector burst It on time pulse when should the be is complete. C) below. 15 guard back until the beginning 3 is S1 at track RL@2). As disappears. of the the perform the If edge S1 of servo last cylinder. so, the adjustment | 11/3-9 below. | data an negative-going microseconds. Otherwise (Part C appears. and positioner + S1 values specifica- 1last on band, between the the microsecond check - (Part GND. REF. —»H++++ CHAN. A : GND. REF.—» | HEADER | et | i -] 15 - 3 ,uS ~ 3 I ER CHAN. B - s2 i —— s1 | SECTOR PULSE l T 1% TIME: 10 MICROSEC/DIV. CHAN: “ATM 500 MILLI VOLTS/DIV. CHAN: “B".2 VOLTS/DIV. Figure 3-5 | €Z-1077 ServoBur/\JEs and Sector Pulse 11/3-16 C. Positioner Alignment' 10 Using Figure 3-6 as a guide, Phillips 2. 'Losg?en screws on the locate the positioner six largest baseplate. (but do not remove) the 51x screws holding 'down'the positioner. ‘Take into the the Move the side of two flat-blade screwdrivers and insert adjusting slots on the positioner. them positioner hand the drive assembly (toward against the ‘Manually move the cartiage to -~ of S the two adjusting until the the fall servo flat-blade slide 15 microsecond + 3 of the sector burst screwdrivers slots, can be the pulse met. spec1f1cat10n and (See pressure must ensure that be the the Figure exerted the rise between of the S1 3-5). on the positioner baseplate straight. is kept in small | Tighten the Check the @ track at the ~ screwdrivers when sliding to 1in positioner baseplate NOTE Equal right module). its approximate center travel. Using the Read/Write six 15 + @ retaining 3 screws mlcroseconds and the last spec1f1cat10n track. within the specification, the Otherwise, repeat the adjustment 3.6 HEAD ALIGNMENT | This procedure will ensure that the each other to cut down on the Servo heads. If is (Part C) the head alignment. I11/3-11 for Head head is complete. above. | two heads are in line with tracking time when sw1tch1ng NOTE BEFORE the <check The Positioner Radial Alignment (Paragraph 3.5) should be done before attempting the head alignment, so that any head skew that may be present will be detected increments. THESE 2 SCREWS ARE NEAREST THE MOTOR SHAFT AND ARE THE LONGEST OF THE SIX MOUNTING SCREWS. HEADS HOME SWITCH ADJUSTING SCREW POSITIONER ADJUSTING SLOT POSITIONER N\ > | \‘\ . ADJUSTING SLOT —- S C2-1079 Figure 3-6 Positioner I1/3-12 Assembly "Required Tools: 1. Oscilloscope with three 2. 3/32" Allen wrench 3. Flat—blade probes screwdriver 45, One DIP clip, one pin-to-pin jumper and one test lead ~(alligator 4b. Two 5. Diagnostic Cllp) pin-to-pin or jumpers and listed in Table two DIP clips 3-2. NOTE No allqnment Alignment cartidge is requ1red. Check: 1. Remove both top cover assemblies. 2. Defeat SKTO and POS SIG (Table 3-1). NOTE These jumpers enable the diagnostic routine to work by disabling the Seek Timeout Error. Defeat cover 1nterlock (Table 3 l) Place the Read/Write module box assembly up and out' of the way of the carriage Install cartridge. Depress the assembly. LOAD switch. Wait for the heads to load onto the‘pack; Disable the Select 140. servo servo drive in-line Head 1 the carriage by connector to (Figure 3-4). (Table 3-2). Place the Channel A oscilloscope probe on TP2 of the Read/Write module (Servo on the test point ground lla. disconnecting Version 1 of DLM: pin 7 (Position TP9 (SEC Data) and Channel A (TP3) of this module. ground Place the Channel B"probe' on Ell Slgnal) TIME). I1/3-13 and external sync probe on 11b. Version 2 of (Position (SEC llc. DLM: Place Signal) the and TIME). Channel external B sync probe on TPl5 porbe on TPl1 | Version 3 of DLM: Place (Position Signal) (SEC TIME). the and Channel external sync B probe on probe TP15 on TPl1l Set the oscilloscope to sync internal, negative-going 12. and observe the waveform | S1 shwon in Figure 3-7. "NOTE and S2 servo bursts may not appear in same positive/negative proportions shown 1in Fiqure 3-7 depepnding upon which track the head is centered on. the 13. - Manually position observing the positioner disappears outer 14. Move the on 16. The it goes Head @ of (Table Slowly Signal (Channel Signal not, perform the move The moved in signal B) and be head burst data negative not on (as tracks track (described reverse instead the carriage crossed. within 1is If from the decrease See Figure should also in 3-8, have stopped. reversed continued If the direction moving) Therefore, necessitating @.5 1. described (away should directiand on but were @, Signal head head alignment finally disappear. Signal (Channel B) continued more slowly 4. by in data stop, The should S2 not S2 the reappears. presented carriage the did in Position track the and Position S2 the The amplitude until is 3-2). Position spindle). by the spindle) potential. data @ ' Move positioner until below. 17. track carriage the wuntil to ground to waveforms. Move the of 1s burst spindle) centerline Position volts area. the positioner the Select band B) <carriage servo reverse (away from in Figure 3-8), the (toward (Channel now in (as guard forward the S1/S2 a head Head then @ was alignment below). Alignment Using the’ 3/32" - retaining screw against its Select Head 1 Allen and wrench, slide stop. (Table 3=2). 11/3-14 the 1loosen head the to Head the @ rear A A 4 12 v 8 89 R 22 S2 v 14318 TIME =104SDIV. — — a4 1212 L 3 BB | iR POSITION SIGNAL 4. 8 4 h »| v AL 2 GND. REF.| GND. REF.| HEADER vy v v CHAN A CHANB I 4. 82 S CHAN A = 500 MV/DIV. CHAN B = 500 MV/DIV. Figure 3-7 C7.1066 Servo Bursts and Position Signal II/3-15 ¥ %V Y bty n v Ty L 2 e -4 > 3 = e L. 3 B | . | - S P = L ‘aamd P chan Al | I T TM vttt e etel T ! T v HEADER el ¥ v ¥ IR POSITION SIGNAL S N B 11l GND. REF. L0 e N 11 I LA IR § CHAN B \\\-.-// TIME = 10uSDIV. CHAN A = 500 MV/DIV. - CHAN B = 500 MV/DIV. CZ-1067 Figure 3-8 Outer Guard I11/3-16 Band Servo Data Manually position observing the disappears (as in Select Head follow), S2 the is carriage in the slowly Signal 0. be sure that 5 a Head flat-blade and the holding the Head forward and the Tighten the head wrench. Do not carriage, = between use until Position retalnlng over doces B the tailstock stop. move reappears , (which « screwdrlver rear Whlle @ 6 carriage : @ | and the move. Insert of by When 3-8), to track ground NOTE - @ waveforms. area. Move the positioner reappears and the Position While performing steps not carriage burst Figure outer guard band forward until S2 reaches thee S1/S2 the the screwdriver S2 servo Slgnal reaches ground. screw 3/32" tighten the with the to burst screw. Allen . | CAUTION .e If the retaining screw is overtighened, the threads on the aluminum frame may be damaged. | Select Head 1 (Table 3-2). The next few steps check to see that the heads have been properly aligned. Begin this check by manually positioning the carriage to track @. As before, this is doen by observing the When §S2 disappears, as carriage Move is the once Move the (Channel now on in outer slowly waveforms. Fiqure 3-8, the guard forward - band area. wuntil S2 B positioner B) the servo burst shown in the positioner reappears. 1@' again S1/S2 goes to centerline until the Position ground potential. of data The Signal head 1is track 0. Select Head @. 11. The Position Signal (ChannelkB).should be within 6.5 12. volts of the Position Signal presented by Head 1. it is not, this head alignment procedure must - repeated. " II1/3-17 If be After observing that the position signals from each are within 0.5 volts of each other, check to see both heads were aligned over track #. First, mvoe the over carriage track amplitude Also, the moved signal in in the reverse. S2 data If will finally disappear. See Position Signal (Channel B) the negative more data not on track tracks were this @, direction but and instead carriage stopped. reversed a procedure). head the the data the Head then @ was alignment - - amplitudes of against If in the read signal the engineering from each specification. N Read/Write compares in direction ‘head READ SIGNAL AMPLITUDE CHECK check was 3-8. have moving) Therefore, necessitating § Figure should continued crossed. Head decrease and did (repeat 3.7 slowly then not stop, continued (as the and Required Tools: A. 1. Oscilloscope with three probes 2a,'One‘DIP élip, one pin-to-pin jumpetvand one test lead (alligator clip), or 2b. Two pin—to—pin»jumpefi§ and two DIP clips 3. Diagnostic 1iSted in'Tablé 3-2. Check: l. Remove both 2. Defeat SKTO,-POS SIG and cover interlock (Table 3-1). top cover assemblies. 3' Place thé .R'ead/wri.tve'mod‘ule box‘ ‘assembly Qp and out of | the way on the carriage assembly. 4. Install cartridge, 5. Depress 6. Wait for‘theiheads to load. 7. the Disable LOAD the disconnecting | switch. servo the | drivé in-line to the connector. <carriage by 8. Place the.Channel.A oscillbs¢ope probe on TP2 of the Read/Write module (Servo Data). | | 9a. Version 1 of DLM: Place-Channel'B probe on El1 pin 7 (Position on TP9 Signal) (Sector and place Time). II1/3-18 the external sync - probe | o This @, e head that \\‘—.m;/ 13. 9b. Version 2 of (Position on 9¢c. Place and Channel place the B probe external (Sector Time) . TP15 probe *3 of DLM: Place Channel B probe on TPlS5 (Position Signal) and place the external sync probe TPl1l (Sector Set the and observe Time) . | osc1lloscope to sync internal, negative-going the waveform shown in Flgure 3+7e_ , llo - "Move the pOSItloner forward until the S1 loses amplitude and finally disappears. 120 on sync Version on 10. TPll DLM: Signal) Pull servo burst the positioner back slowly until the S1 servo returns. This will be the last data track on disk (track 255 on an RL@1, track 511 on an burst Sty the RLO2) . 13. | Carefully move »-the track centerline. Channel B signal Measure and in Figure move from 15. The than 16, 17. record the heads track a 1ower 432 3-7. of the mv. is on the reference of the S1 when burst 3-2 (as to select heads) indicated by the that the positioner Ensure track ground amplitude (see Table centerline the it This is done by observing the which is the 1Integrated Position signal. It will be at (see Flgure 3 -7) . both this - positloner until track 140 | for while Table 3-2 and does not no less centerline. two record explains amplltudes | The amplitude of the less than 2. 38 volts. 19. Replace or the how 18. either spec1f1cat10ns. on asterisk should | be Repositlon the carrlage to track ) by reversing carriage until S2 disappears (outer guard band) the forward until S2 reappears. Measure on amplitude to S1 both I1/3-19 of both the and heads. select heads. burst on heads that track do @ should be not meet the NOTE If both heads fail to meet the specification, it is p0551b1e that the Read/ Write module is bad. Replace the module (see Chapter dure. If aligned a (see severe tracking determine repeat the replaced, it 3.6). also proce- must The be be radial checked 3.5). CHECK the problems spindle assembly for positioning the or cartrldge system. whether: can cause This check L Runout exists or-does'not exist Runout 1is in Runout 1s in the [] Required [] '0 D WAy will must (Paragraph SPINDLE RUNOUT 3.8 Excessive runout in and is Paragraph alignment - 2) head the cartridge spindle. Tools: Oscilloscope with DIP clip Jumper | Several test probe and ground .eads | ~ cartridges Runout Check: Remove both top cover Place the Read/erte of the way of Defeat cover the module carriage interlock Install cartfidge. Depress assemblies LOAD (Table » box assembly up and out assembly. 3-1). | switch. Wait for héads'to load onto the pack. Disable the 8a. 8b. servo drive to the carriage in-line connector (Figure 3-4). Version 1 on pin Ell ground on Vrsion 2 of DLM: 7 TP7 of by disconnecting | Place Channel A (Position Signal) and place Channel (Integrator DLM: Place on TP15 (Position on TP5 (Integrator probe A Ground). Channel Signal) Ground) . I11/3-20 oscilloscope and A oscilloscope place Channel | A probe ground PC')SITI(I)‘N SIJGNAL -l MV <350 TR LYY 'p IR 19 , TIME = 5SMS/ICM VOLTS = 200MV/DIV. Figure 3-9 CZ-1068 Position Signal 11/3-21 8cC. Version on on 3 of DLM: Place Channel TPl5 (Position Signal) and TP5 (Integrator Ground). A oscilloscope place Channel A probe ground Set the OScilloscope'to sync internal, negative-going 10. and observe the The waveform symmetrlcally 11. waveform in representing about the 3-9. | runout should ground reference. be measured The amplltude of the runout should be no greater than 350 mv. 12. Figure If . the specification cannot be met, runout exists and the ria” another cartridge 1is needed to determine 1f runoutgexists.injthe cartridge or the spindle. NOTE »Ideally, the oscilloscope will d1splay a nearly stralght 13. of dots. To con‘f.lrm a seatlng problem, re-seat the cartridge and repeat the specification, runout Step 14. 11ne is runout the still out 14 Spindle check. problem of If has the runout been solved. specification, is within If continue the with = and cartridge second cartridge within the and are still suspect, repeat specification, check. the first If the runout check fails once _spindle"bearings are bad and If so install runout is cartridge is a now bad. more, assume that the replace the spindle assembly 3.9 POSITION SIGNAL GAIN CHECK Insufficient amplitude of the Position Signal carriage on able itself 2. Too high an result resulting in in the read noise 1. errors. cound track, could Required seek hold amplitude B. possible to result 1n a Jltter‘which, in turn, emits a vibrating-type from the carriage that may generate seek timeout errors. A. and being Tools: OscilloScope»with probe and ground leads One DIP clip, one pin-to-pin jumper. Gain Check: 1. 'Remove_both top,cover'assemblies; 2. Place the Read/Write module box ‘assembly ~of the way of the carriage assembly. I1/3-22 up and out N’ errors not Defeat cover intérlock (Table 3-1). Install cartridge. Depress LOAD switch. Wait for heads to load onto the pack. Disable servo drive to the carriage the in-line connector (Figure 3-4). Version 1 8a. on Ell ground on on " DLM: pin 7 (Position (Integrator TP7 dlsconnectlng Place.Channel'A oscilloscope probe on Version 2 of DLM: 8b. 8c. of by Signal) and place Channel A Ground). Place Channel A oscilloscope probe TP1l5 (Position Signal) and TP5 (Integrator Ground). place o Channel A ground | Version 3 of DLM: Place Channel A oscilloscope probe. on TP15 (Position Signal) and place Channel A ground on TPS Observe mov ing (Integrator Ground). the Measure 18. waveform in Figure the carrlage back and the peakto -peak Signal amplitude about should be B.7 3.7 + 3- 10 (a) forth. devz.atmn the ground whi le manually the Position of reference. volts. | NOTE l. 2. If these amplitudes are not within tolerance, the head load operatwn would most likely fault. Look at the servo data wavefdrms at TP2 of the Read/Write module for a smooth sinusoidal waveform, as in Figure 3-18(b). If something 1like Figure 3-16(c) 1is seen, the head azimuth angle is wrong. In this case, 3. | replace the Read/Write head. If the head azimuth is good, then check to see if the +8Vdc voltages are out of tolerance (Paragraph 3.2). 1I/3-23 It POSITION SIGNAL 1 o | o’o" ol ® e o & s o |@ 6 ®le e 9 ® :. D s | % @ ® ® o 0 o P ) o ; el e ; 2 Aifl' H:#%%yh”r‘%iihfij;d‘ifli.i%rv#fifiifl e ¢ o ® (A) | o: M — -0 1 ® el Ioe Ta 4 P s a T '_ v % I o , K — | \«.4.-«/// GND. REF. :‘ :.: 1 I TIME = 5 MS/DIV. VOLTS = 1 VOLT/DIV. | N | y | . (B) (SMOOTH SINUSOID) (C) (REPLACE HEAD) CZ-1069 Figure'3~lfl Position Signal Gain»Check'aneforms I1/3-24 3.18 TACHOMETER AC NOISE PICK-UP CHECK This procedure checks the amount of noise being plcked up by ‘the If the noise is excessive, the positioner will have a holding onto a track signal. In this case, the READY tachometer. hard time light may A, B. Requlred | | | : | fllcker. Tools 1. 0501lloscope with probe and ground 3. Jumper leads Check : 1. Remove both 2. Place the the top cover aesemblles. Read/erte module up and out of the way of carriage assembly. \‘\imm»"// 3. Defeat cover interlock (Table 3-1). 4. Insta11=oartridge.- 5. Depress LOAD switch; 6. Wait for heads to load onto the pack. 7. Disable servo drive to the;carriage by disconnecting the in—line connector (Figure-3—4) | | - Set the osc1lloscope (sync 1nterna11y) as follows: 8. " a. | - b. | 9. Channel A probe Module (Summlng Amp) should be on TPl of the | Channel A ground should be on TPll Servo Module (Signal Ground) Each will drive's summlng look slightly similalr to the DC Servo | of the DC | ampllfler output at this polnt different, but it should be waveform shown 1n Figure 3-11. | 19. The signal seen should have a peak to~peak value of ~ no 11l. If more mv. the s,1gna‘1 1s_out of tolerance, module could solve the noisy. - than 6@@ be Replace Chapter 2). bad the problem, | - the drive replace the or module, | 11/3-25 and | the DC ‘SerVo motor may be too if that drive ) does motor o not (see - L o L L 4 b o o 1. 2 \ p AR £ 2 L L L ALAR ) e 1 |§ |] A A 2 | 2LJ A a2 §F v § L 2.3 8 8 v a 1 B3 I ' | v " 1 2 - = L- SUMMING AM;LIFIER OUTPUT TIME = 10MS/DIV. VOLTS = 50MV/DIV. Figure 3-11 Summing Amplifier 11/3-26 €z-1070 Output 3 11 ~ VELOCITY PROFILE CHECK By causing the positioner to perform an osc1llat1ng seek, velocity profile can be checked for duration, amplltude | | o waveshape. the and ~A. Required Tools:' W N . Oscilloscipe with probe and ground leads DIP . Jumper. | seek program (Appendix C) Toggle-in oscillating . O AB. . clip Check: l. Remove?both,tovaOver assemblies.. 2.‘ Install cartrldge.vf.u-‘ N 3. Defeat 4., Depress LOAD sw1tch 5. Wait 6. top cover 1nterlock (Table 3l) | for heads to 1oad Usmg the onto osc111at1ng | the pack program shown in Appendix cause an oscillating. seek from track 2 (RL@#1) or track 511 (RL@Z) 7a. Version 1 of DLM:* Place. the to track C, 255 Channel A oscilloscope probe on TPl2, place the Channel A ground on any of the DLM ground points (TPl through TP6 are ground) (SIGN ~and place the ‘external trigger on E38 pin 12 | | ) FWD) 7b. Version 2 'of DLM.:' Place "the Channel A oscilloscope probe on TP8, DLM ground and place place test the FWD) Channel A points external | trlgger on on TP8, ground on TP4 E25 any of the are ground) p1n 12 (SIGN | 7c. Version 3 of DLM: Place probe ground (TPl through place the points the Channel Channel (TPl A the DLM through and place the external trlgger on A osc1lloscope ground TP4 on are E25 pin any of ground) 12 (SIGN FWD) . 8. Set' the -oscxlloscope‘ to Sync ” 9. golng and observe the 1nternal, waveform shwon The peak amplltude of the waveform 4.6 and 5. @ volts. 11/3-27 ‘positive- in Figure 3-12. should be- between’ L 4 : “C 1.2 4. 4 TACHOMETER O JPUT VELOCITY SIGNAL - -— - \ W LEDLER B4 / 5.0 V \~ Ty 3 4+ }1:'%5“ !1| v I | IR 4.6 TO L1 11 L 46 TO .U11 'U}l'“'“ 1#:: LL 'vvq: ‘ : T 50V +—80TO 8 MS—pq + { J b X L] L 1 L] 1 : \— ' \ \ ‘ S TIME = 20 MSIDIV. VOLTS = 2VIDIV. Nt 21071 Figure 3-12 Tachometer‘Output Velocity Signal II/3-28 10. The maximum seek time should be between 8¢ milliseconds. l11. Observe the indicated should be by an asterisk 1In Figure a slight "stepping" slope. slope has replacing 12. If the cannot fau.].ta 3.12 One trailing spikes as 1t other be and 86 | is edge in not it, of the the rolllng DC Servo ' (as positioner needs smoothly. spe01flcatlons (in met, the waveform 3-12). There If the observed Steps module 9 1is and probably 10) at SERVO DRIVE MOTOR CURRENT CHECK possible current. A. This cause of seek check will determine errors 1is excessive if there is too drive much Required Tools: 1. 4Osc1110500pe with probes and gr0und leads 2. 3. 4. B. motor current. Toggle DIP in 050111at1ng seek program (Appendlx C) clip Jumper. Check: 1. Remove both top cover assemblies. 2. Defeat top cover interlock 3. Install cartridge" 4. Depress LOAD switch. 5. Wait for heads to load onte the pack (Table 3-1). | 6. 'U51ng the osc111at1ng seek program 1lsted in Appendix | C, 255 7. cause (RL@1) an or oscillating track 511 seek from track to track (RL@2). Place Channel A osc1lloscope probe Servo @ module. on T?B | of the DC | 83,_Version 1 of DLM: Place'the external trigger on E38 pin 12 . (SIGN FWD). | | « 8b.eversion'2 of DLM: Place the external trlgger on E25 pin 12 (SIGN FWD) . - - ac; Version 3 of DLM: PlaCe'the external trigger on E25 | pin 12 9SIGN FWD). I o 9. Observe the'waveform'shown in Figure‘3-13. I1/3-29 | T . POSITIONER MOTOR CURRENT | ?rg-\ | ¥ 1 . ll*ll bTVi Ll ;L'Jl ) LA I 3 g2 8 18 80 i L. .2 2 LR LR | A 3 re N LR B LA L BRI 2 ' L -y R A2 11315 GND REF TTUV Ty vy 4 Figure 3-13 | CZ-1072 Positioner Motor Current Check I1/3-30 A VOLTS = 500MV/DIV. e TIME = 20MSIDIV. Measure the points called out in compare them to the following: the #1 should be between 756 and 788 mv. #2 and #3 should 3.13 ACCESS TIME CHECK | "The access time is checked A. the Position Required 1. less than or equal to 500 by Signal | oscillating performing and "Ready to | and Read/Write". Tools: Toggle-in DIP clip 4. mv. seeks Osc1lloscope with probes and ground leads 2. 3. and Failure to meet spec1f1catlons requires replacement of the positioner/drive motor assembly (described in Chapter 2). | 11. observing be fiqure osc1llat1ng seek program (Appendix C) | Jumper. Check : 1. Remove both top'cover assemblies. 2. Defeat the top cover 3. Install cartridge.- '4. Depress LOAD switch. 5. Wait 6. (Table 3-1). for'heads‘to,load onto the pack. U51ng C, interlock the issue oscillating a one track seek program shown in Appendix seek, 7a. Version 1 of DLM: Place Channel A oscilloscope prove on E25 pin 12 (Ready toRead/Write)° '7b. Version 2 of DLM: Place Channel A oscilloscope probe' on TP1l6 (Ready to Read/erte) 7c. Version 3 of DLM: - on TPl16 (Ready to 8. Observe 9. Measure the time low. It should seconds. Place Channel A oscilloscope probee Read/Write). the waveform depicted the be "Ready less | I1/3-31 in Figure to than 3-14. Read/Write" or equal to signal 15 is milli- 1 3tt1 1A ERRE R 1 T egl TT e r T <-—-|—J e vqgrritTy L1l (15 MS RSN ey | Ty bt e e et e ey et v vl vl gy e T P, -+ e T e 1‘ -—-{v—- TIME=2 S MS/DIV | CZ-2063 VOLTS =2 V/DIV Figure 3-14 Access Time Check I1/3-32 (One Track Seek) 10. Issue a seek from track @ to track 85 (RL@1) or track 170 (RL®2) and check to see that "Ready to Read/ Write" is low for slightly less than 55 milliseconds. See Figure 3-15. 11. Issue track a seek from track @ to track 255 511 (RL@2) and check to see that (RL@l) "Ready or to Read/ Write" than 100 milliseconds. 12. If the 1low See or excessive for slightly 1less Figqure 3-16. specifications at fault, Lo is are not met, the DLM the positioner itself may be friction. 3-12.) II/3-33 (See Paragraph could binding be due i TTj“ L BRARI [.-1 1t rilag | |S TEY 114l BRRER! o L i Ty a s d a ey T 12 21 i 1 g ITTIvVYyy T I N LRI B LABLAE| + —e cades - L o B —— - - TIME=10MS/DIV VOLTS=2V/DIV .Figure 3-15 , CZ-2064 AccessiTime CheCk;(BS Track.Seek) - I1/3-34 —p— L od - U O TV T U VT O W WW IvViIvy O T T| T JVye TR TIT TV e 11 AJ I o LR 20 B LI [ I LIRS i v 11 T . ¢ N v . AELIR] - b od b . and B L o L ad b -+ e o ——— —— L - — TIME 20 MS/DIV CZ-2065 VOLTS=2 VIDIV Figure 3-16 Access Time Check (255 Track Seek) I1/3-35 - APPENDICES APPENDIX A REGISTER APPENDIX INSTALLATION B - APPENDIX C APPENDIX D SUMMARY TOGGLE-IN PROGRAMS RL11 CONFIGURATION AND INSTALLATION CONSIDERATIONS | | APPENDIX A REGISTER SUMMARY A.l RL11/RLV11 ADDRESSABLE REGISTERS Table A-1l Controller Addressable Registers Address (octal) Type (read/write) Register Name/Mnemonic 774400 R/W Control Punction Basic Status (CS) Indicates condition; ready drive decodes and commands drive overall provides functions and control indications. error 774402 R/W Bus Address (BA) memory Indicates location involved 1in transfer during data normal a write or read operation. 774404 R/W Disk Address (DA) (1) Holds disk address during a data transfer such as Read or Write; or (2) holds the drive a word for command Seek command; holds the for word mand Status command 774406 R/W Multipurpose (MP) (1) Functions counter or drive when (3) com- a Get as word transfer- ring read/write data between Unibus and drives; or (2) acts as storage buffer when ‘reading drive status; or (3) stores header information from controller silo when exeheader read a cuting command. A.l.l Control Status,Register CONTROL STATUS REGISTER (CSR) 15 14 13 12 1110 o9 08 ERR DE | NXM| E2 E1 DS1 | DSO ‘CRDY . EO —— 07 06 A 05 04 03 IE | BA17 BA16 — - READ ONLY ' 02 O 00 F1 FO |DRDY F2 —_— gNy READ/WRITE WRITE | READ ONLY CZ-2009 Y Function Drive Ready (DRDY) | When | set, this bit 1indicates the selected drive receive a command. cleared when a Seek Function Code | These | bits indicate F2 Fl1 F@ | are the set ) Y No Op g1 Write 1 Y Get Y 1 1 1 g %) 1 Seek 0 Read Header 1 Write Data 1 1 @ Read Data 1 1 1 Check bit 7 as a (BAl6, BA17) of Go A the 1 2 3 Data execution software. ) Status Read (Controller or (RLV11) @ Command Bits executed. Octal (RL1l1l) Header Extension be Code 7 7 1is Seek software to to Command Maint. Bus Address the | ) 4-5 by command to 1s operation initiated and set when . operation is completed. 1-3 that‘ 1is ready The bit CSR 4 5 6 Without 7 Check requires Ready) zero | be that transferred can bit cleared be by 1into considered bit. | The two most significant bus address bits. Read 4 5 and considered of the bus and of written the CS as data bits register but as address bits 16 address register. and s | Name . Bit(s) 17 Bit(s) Function Name Intefrupt When this bit Enable controller 1s (IE) the or - Controller Ready (CRDY) is set allowed processor error at the by software, to interrupt normal command termination. When cleared by software, this- bit indicates that the command in bits 1-3 1is to be executed. When set, this bit indicates the controller is ready to accept another command. Drive Select These (DS@, DS1) will via 10 Operation Incomplete 11 Data CRC (DCRC) or Header Write | CRC or (OPI) (HCRC) bits determine which drive communicate with the controller the drive bus. When set, the current this pleted within If OPI bit is set, when bit (bit 200 10) a (WCE) reading If OPI also is the (bit set, on the If OPI 11 is was a error 18) the (bit com- cleared and this occurred (DCRC). data is has set error and bit 11 is has occurred (HCRC). 10) and Write (WCE) not error CRC header set that was ms. CRC | Check indicates command 1is the Check, has B cleared and function command a Write occurred. bit Check “ Bit(s) Name 12 Data Function Late This bit the silo " has not is set during a Write when is empty but the word count 2zero (meaning vyet reached that the bus request was ignored for " too long). The OPI bit will not be (DLT) or Header Not (HNF) Found set. This bit will be set during a read when the silo is full (meaning that the word being read the the silo and bit will not be been ignored long). and are OPI enter has The o set. timeout ms 200 not request for too When this bit a could bus occurred both while OPI set, controller was searching for correct sector to read or write header compare - Error RROPPER ~ Non-Existent Memory 14 Drive (NXM) Error (DE) Summary Bits 12 11 10 Read Data CRC @ 1 B @ N’ Error Write Check ) 1 Header CRC @ 1 1 ‘Data Late ~Header Not 1 g @ 1 ) 1 " This bit 1is set when memory proper does time memory access This bit is interface indicates has the addressed not respond within the frame during a direct (DMA) tied transfer. directly 1line. that the flagged data to the DE When set, it selected drive an error. (The source of the error can be determined executing a Get Status command.) DE can be Status command register the (no HNF). . Found 13 the cleared set. by with executing bit 3 of by a Get the DA Function Bit(s) Name 15 Composite Error o When | set, "of CS) 1is bit will indicates that the error bits (bits If the IE bit (bit 6 and an error occurs 7), an interrupt initiated. (which A.l.2 this one or more of 19-14) is set. set sets be bit Bus Address Register BUS ADDRESS REGISTER (BAR) 15 14 13 12 11 10 BA15|BA14| BA13 [BA12|BA11/BA10| 08 09 07 06 04 02 01 03 BAS | BA8 | BA7 | BAG | BAS | BA4 | BA3 | BA2 00 BA1| 0O | o -« - Bit(s) Name g-15 BA@ READ/WRITE €Z-2035 Ffi@cinn thru BAlS These bits address memory the A.1.3 Disk Address A.1.3.1 CSR bits 12 11 the Unibus is 4 to Dbe Normally a BAl6 and and 5. BAl7 are in o Register Disk Address Register During a 13 to data to/from. address, DAR DURING SEEK COMMAND 14 point that transferred 15 05 Seek Command | 10 09 08 07 | 06 DF8 | DF7 | DF6 | DF5 | DF4 | DF3 | DF2 | DF1 | DFO| 0O 05 04 | o | us| SR 03 02 o |om| 01 00 o] 1 CZ-2010 Bit(s) 'Name- Functibn_ g - Must be a 1 _ Must be a @. A-5 1. _Function Bit(s) Name 2 Direction (DIR) | R This bit indicates the direction 1in the 1s which a Seek ~ bit toward the is to take place. When set, move the heads higher a (to spindle When the bit is cylinder address). ‘cleared, the heads move away from the spindle (to a lower cylinder The actual distance moved address). address | cylinder on the depends | 7-15). (bits difference | . 3 o '4"A, | _Head_Select'(HS)k - - 5%6’ Indlcates which head (disk surface) ~is selected. lower head; a - - Difference N DF 08:00 A.1;3.2 the number Indicates Cylinder Address 7-15 A one indicates the zero, the upper head. Reserved | | | | - Must be a @. | of the heads are to move on a | - cylinders seek. | Disk_Address Register During;Read or Write Data Command DAR DURING READING OR WRITING DATA COMMANDS 15 14 13 12 - 1j-. 10 09 08 07 06 CA8 | CA7 | CA6 | CA5| CA4 | CA3 | CA2 | CA1| CAO | 05 04 03 02 01 00 Hs | SA5 | sa4a | sa3 | saz2 | sa1 | sao CZ-2011 - Bit(s) | @-5 ‘6' ~ Name | ) R ‘Sector Address SA 05:00 o _Heed Select (HS) Function Address of one of ‘the 490 sectors on a | track. Indicates which head (disk surfaCe) is to be selected. A one indicates the lower head; a zero, the upper The correct track (head and head. cylinder) ,selected -~ 7-15 | | ~ Cylinder Address CA 08:00 by a must be previously Seekw Address of the cyllnders belng jaccessed A.1.3.3 Disk Address Register During a Get Status Command DAR DURING GET STATUS COMMAND 15 14 13 12 11 10 09 08 07 06 05 Q4 03 02 01 00 X X X X X X X X 0 0 0 0O |RST| O 1 1J CZ-2037 Bit(s) Name Function 0 - Must be 1 Get Must be a 1, that the Status (GS) a 1. requested. Get indicating status' Status At the to the drive 1is being word completion command, the drive of the status word 1is read into the controller Multipurpose (MP) register. | 3 Reset (RST) When this | bit 1is clears its error sending status a set, the register word drive before to the controller. 4-7 ~ Must be a @. 8-15 - Not A.1.4 } Multipurpose A.l.4.1 16 14 used during a Get Status. Register Multipurpose Register During a Get Status Command 13 12 11 MPR AFTER GET STATUS COMMAND 10 ©09 o08 woe | cHE| wi [skTo| spe |wGEe| vc | pse| 07 06 05 04 03 02 01 00 DT | Hs | co | HO | BH | sTC | sTB | sTA CZ-2012 A-7 Bit(s) Name @-2 State ST Function drive. C B A ') 3 0 1 2 0 | ) Y ) ) 1 1l 1 0 1 Home -~ 4 - Heeds_Out,(HO) 5 | | Cover Opeh“(CO) Set Spin Up Brush Cycle Load Heads Seek (Track Counting) 1 Lock On | track) ) 1 1 when on Heads Unload are home. brushes the disk. (Keeping ~Sp1n Do wn the ,Set when (BH) 3 Load Cartridge 1 ) 1 1 1 Brush the of b1ts define the state These C:A C:A heads are' over the Set when the cartridge access cover the dust 'Ind‘icates the currently not is cover or open 'is 1in place., | (HS) Drive Type (DT) | 7 8 Head Select = 6 | Drive Select Error (DSE) Volume 9 (VC) Check ‘head. head; A = a zero - - Set when a multlple ls detected Set when a - Cleared by Write Gate Error(WGE) 1nd1cates ‘an | upper RLfll a one, an drive selectlon RLO2. command | 10 selected A zero indicates the one, the lower head. Set more cartridge execution with Bit 3 of is a spun-up. Get asserted. during Write Gate if of the follow1ng Drive 1is not Status one or condltlons occur. o Write” 11 Spin Error (SPE) "Ready to o o Drive is Write Protected Sector pulse 1is occurring o Drive has another error Set when spindle has : speed in the required spin-up or when spindle high. A-8 Read/ | not reached time during_ speed is too Bit(s) Name Function 12 Seek Time Out Set (SKTO) track - when the fieadsxdo' in Seek the required command or Read/Write" 1s is in position 13 Write Lock ('WL) Set 14 Current Head Set if | (CHE) ~ 15 when Error E in heads Set (WDE) no drive drive Write 1is Gate is asserted but Write 1if Write Write Data are detected Gate being 1s not detected on line. Multipurpose Register During a Read Header Command MPR AFTER READ HEADER COMMAND 14 is a to <current when transitions the 15 during "Ready asserted. Write Data Error A.1.4.2 write the when lost while the (lock-on) mode. the Protected. not come on time 13 12 11 10 09 08 07 o6 05 04 03 02 01 00 - ~. o - CA8 | CA7 | CA6 | CA5 | CA4 | CA3 CA2 | CA1 | CAO HS SA5 | SA4 | SA3 | SA2 | SA1 SAOJ 16 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 07 06 05' 04 03 02 01 00 ZEROES 15 14 13 12 11 10 09- 08 CRC CZ-2013 Bit(s) Name Function @-5 SAf:SAS Sector AddreSs 6 HS Head Select head 7-15 CAQ:CAS8 = Upper 1 Cylinder Address head = @, | lower A;1;4.3 Multipurpose Register During Read/Write Data Commands MPR DURING READ/WRITE COMMANDS FOR WORD COUNT 15 14. 13 1 1 1 12 11 10 09 08 07 06 | 05 04 O3 | 02 01 00 |WC12{WC11/wC10| WCS | WC8 wc7 WC6 | WC5 | WC4 | WC3 | wC2 | wcCt wcoJ CZ-2036 Bit (s) Name B-12 Word Count WC ~ Function 12:00 - | o ' 13-15 ~ Contains total the number two's of words complement of to be trans- ferred. | ~ Must be ones. | MP:'Register " Programming Note =~ The RLOA1/RLA2 Disk Drive will not do spiral read/writes. If data is to be transferred past the end of the last sector of a up the track, it operatlon is necessary 1nto the to follow1ng \\....,,__.,/ ; ~ break steps. l. Program the terminate at the ’of the track 2. This end Program a seek to the next can be either a head switch track. to the same cylinder or move to the next a head cylinder. Program the data transfer to continue the next of the - to sector switch and 3. transfer last other surface but ‘at data start of the flrst track A-10 sector at the A.2 | RL8-A ADDRESSABLE REGISTERS "Table A-2 ~ OCTAL CODE * 6600 RLBQA IhstructionASet MNEMONIC FUNCTION RLDC Clear controller, 6601 - RLSD flags. and a disk all AC registers, (Do not use to terminate function.) | Skip on function done, then clear if to set a one 6602 RLMA Load Break MA Register from AC @:11 66083 RLCA Load Command Register 6604 RLCB Load Command 6605 RLSA A from AC @:11 Register B Load Sector Address Register from AC | A:5 6607 6610 RLWC Load RRER Read RRWC Word Count Register Error Register from AC g:11 Read P:11 into AC @, 1, 2, - 11 lfll 6611 AC from execute command #g:11, Word Count Register into AC 6612 RRCA Read Command Register A into AC @:11 6613 RRCB er AC @:11 B into Read Command Regist - 6614 ~ RRSA Read Sector Address Regiéter into AC 6615 RRSI 6617 RLSE g:5 Read'silo word‘into AC @:11 Skip on composite error, if set *Alternate'device codé, 62 and 63 A-11 to a one then clear A.2.1 A.2.1.1 Register A Command a Seek Command A During Command Register COMMAND REGISTER A DURING A SEEK COMMAND 01 00 03 02 11 | 10 09 08 07 06 o5 04 LSB lDIR Hs | x |[mss]| _ N ' ~ CYLINDER DIFFERENCE | Y | CZ-2016 | Bit(s) Name Function AC# Direction (DIR) This bittindicates the direction in which a Seek is to take place. o | bit the - o the heads When move | 3-11). (bits ‘Indi"cates,which head {disk surface) | Head Select (HS) is to be selected. o the lower head; head. | a A one indicates =zero, B the upper | . spare ‘ AC2 - AC3:11 Cylinder Address er of cylinders Indicates the numb ‘the heads are to move.on a seek. Difference A.2.1.2'.Command Register A During Read or Write Data Command COMMAND REGISTER A DURINGA READ/WRITE DATA COMMAND o0 01 02 o | Hs | o 03 04 05 . 06 07 o8 |mss| 09 10 11 LSBJ J. — CYLINDER ADDRESS C2-2017 N | set, toward the spindle (to a higher cylinder address). When the bit is ‘cleared, the heads move away from a lower cylinder (to the spindle address). The actual distance moved cylinder address ‘depends on the difference ACl 1is A-12 Function Name Bit(s) Must be 2ero ACO Indicates which head (disk surface) A one indicates is to be selected. the lower head; a zero, the upper The correct track (head and head. sector) must be previously selected Head Select (HS) ACl by a Must AC2 be zero -Cylinder address Cylinder Address ~AC3:11 A.2.2 Seek. Command Register B ~ COMMAND REGISTER B 00 01 02 03 04 05 RES MAIN |MODE| IE MSB LSB N 08 09 10 11 EMA2} FC FB FA 067 06 |EMAO | EMA1{ J DRIVE SELECT Cz-2018 Bit(s) Function Name Reserved ACO ACl Maintenance Disk Address The contents of the back to the looped are (DA) Register Bit silo for maintenance purposes. 2 of Command Register B must also be work to function for this set AC2 Mode When set, words per the data . | correctly. this field bit will sector, indicates be When 256 that 8-bit the 2zero, data field will be truncated to 170 This bit 12-bit words per sector. must be set when a Maintenance, a Get Status or a Read Header command is | AC3 Interrupt (IE) Enable to be executed. when this bit is set, the COntroller is allowed processor at to interrupt the conculsion the of a normal command or error termination. A-13 | 'Bit(s) | - . ‘Name -Drivé*Select.l, AC4:5 - (Ds@, DS1l) These bits determine | which drive ‘will communicate with the controller v via the drive bus. ,These three bitsdefine the' memory | Ektended Memory AC6:8 Function up to This allows ~ field location. Addressed (EMA) 32K memory locations to be addressed | B on processors hav1ng more than 4K of | These bits 1nd1cate the command to be executed ‘subsystem. . Bit Bit' Bit 11 10 controller/dlsk Command S Maintenance R - Reset - Get Seek Read Status | SR Header Write Data Read Bl ol R RS IS TS P I N P R N T SRR R 9 the by S’ | AC9:11. _F_:unc'tion'Code | - memory Data Read Data Without Header Check A.2.3 Break Memory Address Reg1ster BREAK MEMORY ADDRESS REGISTER 01 IBM 00 02.‘_"03v; o4 05 06 07 ©08. 03 10 11 BM01 |BM 02 |BM 03 |BM 04 |BM 05 |BM 06 [BM 07 [BM08 |BM 09 |BM 10 Blva | CzZ-2019 »Bit(s) ACO:ll | 'Name.d | BMflill- . Function , ‘.ivMémory Address - A.2.4 Word Count Register WORD COUNT REGISTER - 00 WC 00| . 02 01 03 - 04 05 06 07 08 09 10 11 WC 01| WC 02| WC 03 WC‘04 WC 05| WC 06 |WC 07| WC 08{WC 09{WC 10| WC 11 CZ-ZOZO Bit(s) Name AC@:11 A.2.5 Function WCO:11 Word Count Sector Address Register SECTOR ADDRESS REGISTER 02 01 00 | I 05 04 03 EAOO SA01|{SA02|SA03{SA04{SAO05 CZ-2021 Bit (s) Name Function \ / B AC@:5 SAQ:5 A.2.6 Sector Address Error Register ERROR REGISTER | 00 01 02 DCRC| OPI | DLT 03 04 05 06 07 08 09 - NOT DEFINED é " HCRC | 10 11 DE DRDY : HNF ————'—-J | Bit (s) ACO Name CZ-2022 Function Data CRC (DRCR) Header CRC or (HCRC) If " OPI is cleared and this bit is set, the CRC data (DCRC). error TIf occurred OPI is set ~bit 1is also set, the CRC occured on the header (HCRC). ACl Operation When Incomplete \ | (OPI) | the set, this current ~completed bit 2040 also used in conjunction and 2 of this register. A-15 error that was ms. with the this indicates command withing in and not It 1is bits @ Bit(s) Name AC2 Data Function Late Header (DLT) Not or Found (HNF) This bit the silo is not is set is empty vyet zero during a Write 1if (meaning that no and the word count word was available for wrltlng) OPI will not be set. ‘This bit is set during silo is full and the a Read word if the count is not yet zero (meaning that the word being read could not enter the silo). OPI will not be set. When this bit and OPI are both set, then a 200 ms timeout occurred while the controller was: searching for the correct sector to read header compare - HNF). ACO: 2 Error Drive Error write (no Summary Code Error ACl0 or (DE) Bits - 00 DLT 2 OPI HNF g ) g1 g2 e 1 1 1 g 1 DCRC 1 ) ) HCRC 1 1 ) This bit is Drive Error tied directly 1interface 1line. to the . When set, 1t indicates that the selected drive has flagged an error. The source of determined the by a error Get can. be Status. The DE bit is cleared with a Reset command AC11 Drive Ready (DRDY) to the drive. When set; the selected receive cleared this bit drive indicates 1is ready that The bit a command. when a Seek operation initiated and set again when Seek operation is completed. to is is the A.2.7 Silo A.2.7.1 Buffer ©Silo Buffer After | a Get Status Command . SILO BUFFER — STATUS WORD 1 - 00 r 01 02 03 NOT DEFINED 04 05 06 DT HS | CO 07 08 09 10 11 HO | BH | STC | STB | STA WORD 1 CZ-2023 Bit(s) ACO:3 AC4 Function Name Drive Undefined A Type zero indicates an RL@l; a one, an RL@2. ACS5 Head Select AC6 Cover Open (HS) ‘(CO) ‘Indicates currently selected A zero indicates the one, the lower head. upper head. head; a Set when the cartridge access cover is open or the dust cover is not 1in place. AC7 Heads Out (HO) A ohé'indicates that the heads are ‘over the disk; a zero the heads are home. ACS8 Brush Home AC9:11 State Bits (BH) Set when These the bits brushes define are the disk drive. State indicates home. state of Bit Bit Bi t A B C Definitions Definition ) ) 0 Load Y] 0 1 Spin-up Cartridge @ 1 Y Brush Y 1 1 Y 1 @ Load Heads Seek (track counting) 1 ) 1 Y 1 Cycle Lock-on (keeping ~on 1 1 the | Bit 1 1 that track) -Unload Heads Spin-down SILO BUFFER — STATUS WORD 2 00 01 02 03 05 04 L - NOT DEFINED 06 07 08 09 10 11 WDE | CHE | WL | STO | SPE |WGE| vC | DSE | WORD 2 C2-2024 Name Function ACB:3 - AC4 - | AC5 Undefined Write DatavErrorA“ (WDE) Current | Error This - Head - | | Error - AC8 ~ Spin Errbr | Seek Write" | Set ~up erte Gate Error one ACll Volume Check (VC) DriveASelect is Write Pro- when | time while the does speed to is not the come too is not and condi- Drive is Write Drive is 1in time ©Drive "Ready » 3. to Protected the mldst of sector | has when spun-up. following or high, true. Read/erte" Set - of in seconds is a Read/ drive mode . within the‘spindle during "Ready 4@ Status Error (DSE) Write | required or 2. 4. | Current but when_ ,the *spindle Drive" - | Write heads to speed or more 1. o - detected Set if Write'Gate 'is asserted | | the is lost tions 1is AC1l¢ when the P051t10n (lockon) (SPE') (WGE) set were asserted. command when | 11ne. the drive ~track in - | ~AC9 Data in not tected. ' | is detected was when Write Gate 1is transitions Set when the heads do not come on (SKTO) | no © Set when Seek Time oOut » the erte ~Gate o ACT on 1s ACH S write:Lock'(WL)' - but This bit (CHE) - - bit is set on another a error asserted 'cartr'idge This bit is has reset by been a Get command. Set when one or more drives have the same number have responded A-18 (unit to select the same plug) number. or S Bit(s) A.2.7.2 Silo Data Buffer Duriné a Read Header Command' SILO BUFFER — HEADER WORDS o0 02 01 00 | 02 01 — SECTOR ADDRESS ~ CYLINDER | ADDRESS 05 04 03 11 LSB . ~ | 10 | LSB | HS | MSB| NOT DEFINED WORD 1 09 08 07 06 05 04 03 08 06 07 , —~ 03 10 11 MSB | NOT DEFINED - WORD 2 - NOT DEFINED ) ' CYLINDER ADDRESS 0 0 o l ol 0 | O 0 0 0 oo o] oo 0 WORD 3 NOT DEFINED o ol 4 WORD * NOT DEFINED WORD 5 LSBJ —— | HEADER CRC B NOT DEFINED WORD6 o W, | MSB — ~ HEADER CRC _J n CZ-2025 WORD Bit(s) Name 1 - HEADER Function ACB:3 Undefined ACS cyl Add ACS HS LSB of Cylinder Address Head Select ‘head = 0 Sec Add Sector WORD Bit(s) ‘Name - 1, | upper | Address HEADER Function AC@:3 AC4:11 2 lower head = " Undefined Cyl Add Cylinder bits e AC6:11 - Address - eight high order WORD 3 - HEADER Bit(s) Function "Name AC@: 3 Undefined AC4:11 Zeros "WORD 4 Bit(s) Name - HEADER Function AC@:3 Undefined AC4:11 Zeros WORD 5 - HEADER Name .anction Undefined ACO:3 AC4:11 CRC Eight WORD 6 ~ LSB Function ACO: 3 ‘Undefined CRC CRC word HEADER Bit(s)‘ " Name AC4:11 of Eight MSB of CRC word A-20 e Bit(s) APPENDIX B INSTALLATION B.1l | | | | SITE PREPARATION AND PLANNING This appendix describes power, space, environmental, cabling and safety requirements that must be considered before 1nsta11at10n of “the RLP1/RLPA2 Disk | Subsystem. | Env1ronmenta1 C0n51derat10ns B.1l.1 in a business operate to designed is Subsystem Disk RL@1/RL@A2 The s 1is an cleanlines Although t. environmen or light industry computer any of n installatio the in on considerati important a disk of operation proper for crucial particularly system, it is drive. The RLO1K/RLO2K Disk Cartrldge is not sealed while being loaded and is therefore vulnerable to dust or smoke particles suspended in the air, as well as fingerprints, hair, 1lint, etc. These minute obstructions can cause head crashes, resultlng in fsevere damage to the read/wrlte heads and disk surfaces. Cleanliness - The RLGl/RLflz Disk Drives can operate in B.l-l.l an ambient with less than one million particles per cubic foot of The drive in diameter. air which are @.5 micron or larger contains a filter system which, under these conditions, maintains the particle count within the cartridge below 100 partlcles per sz cublc _B l.l 2 service rack or elther Storage , e foot. Space clearances cabinet in Requiremeri’tfils'—' of 1 which m (36 the in) drive Provision should be made and m (36 in) at the front 1s mounted and 1 for rear of the side. space for the RL@lK/RLflZK cartridges should also be available. Each cartridge has a diameter of approximately (15 1n) and a helght of approxlmately 6 cm (2 S in). made 38 cm CAUTION gRLfllK/RLflZK disk cartridges must recommended (see the DIGITAL never A "be stacked on top of each other. spec1a11y : or ~ designated shelf area designed disk cartridge storage unit is and Accessories Catalog) B'.l;.l;B Supplles-A - Floor Loadmg - The welght of the RLfll/RLM Dlsk Drlve\ ‘alone is 34 kg (75 1lb), which will not place undue stress on most floors. However, the added weight of the rack or cabinet as well as the number of drives to be installed should be considered in Possible relation to the weight of existing computer systems. future expansion should also be a consideration. ‘ Heat Dissipation - The heat dissipation Disk Drive is 546 Btu/hour maximum. cooling requirements for the entire system can multiplying this figure by the number of drives, to the total heat dissipation of the other system then adjusting the total figure to compensate cooling system margin of at requirements. B.1l.1.5 efficiency, least Acoustics 25 - etc. It percent is Most computer the sites level. harbor Ensure dust. B.l.1.6 that » acoustlcal Temperature -~ The materlals personnel, maximum estimated allow a safety at least some the RL@1/RL@O2 overall system Disk noise used do RLGl/RLflZ Di sk and for require degree of acoustical treatment. However, Subsystem should not contribute unduly to the each components, advisable to above of The approximate be calculated by adding the result not produce Subs%stem w111 or operate ~over a temperature range of 18° C (SE F) to 4 C (164 F). The max imum temperature gradient is 16.6° ¢ (3g° F) per hour. The nonogeratlng temperature range is from -48° C (40 F) to 66° C (151 F) . B.l.1.7 proper may Relative operation cause any memory components. within Humidity - of a The errors or RL@1/RL@2 relative humidity temperature 1s percent, from lfl to 46° C (115 F). - B.l.1.8 may (36o F). 95 Altitude have heat - control system even Disk maximum wet bulb p01nt of 2° ¢ Humidity computer since of of 28° 10 Computer dissipation flying a is to c (82° F) The nonoperatlng with important maximum damage to logic designed to operate 99 percent, 2449 m (89089 18008 f£t) ft). bulb systems operating Altitude is reduced by a above sea temperature at 2440 m B.1l.1.9 " Power subsystem presents existing ~carefully, the added " RL@1/RL@2 level. factor of Thus, Safety no temperature at high also the system. AC however, to as well as Drive is listed ensure UL - or power wiring that for its any and 1000m reduced to 36°C fire The safety CSA (lo F per opegatlng (96~ hazards is F). be disk to an checked adequate expansion. certified. the operating RL@1/RL@2 should capacity possible altitudes affects maximum allowable be of The maximum Subsystem is allowable 1.8° ¢ per Precautions wunusual 1load Disk maximum (8@00 ft) would and computer the a relative humidity range wet problems. Also, with and a minimum dew height of read/write heads in disk drives. altitude specified for operating the RLOL1/RLP2 Disk temperature for electricity permanent Subsystem range is static for The ) RN B.1.1.4 RLO1/RLA2 B.1.1.18 Radiated interference operation Common EMI the sources Emissions that is that are - near known source computer causes of electromagnetic system may affect the equ1pment peripheral related its and processor BAny the of failures include: on a © Broadcast stations © Radar | © © Thunderstorms Mobile communications | ¢ lines Power @ power Arc © @ "High-voltage Vehicle ignition systems Static electricity ® The of (EMI) tools welders effect of unpredictable. protecting Thus, circuits EMI emissions grounding plays an computer important used in disk drive_subsystems. To help reduce the effects of perform the following actions: known hlgh 1nten51ty ® the radiated system 1is role in EMI emissions Ground window screens and other large metal'surfaces; @ Ensure that Provide proper properly . ments) ® disk B.l.1.11 overall to computer Paragraph » storage B.14, - (metal system is grounded Grounding | cabinets with RequireS doors) for cartrldges. Attltude/Mechanlcal RLA1/RLO2 Disk max imum the (refer pitch Subsystem will and roll do Shock not be not exceed - Performance of the affected by an attitude where 15 degrees. The subsystem is designed to operate while a half-sine shock pulse of 10 gravity either peak and direction of three B.1l.2 Options The RL@1/RLP2 Disk Drive (for Unibus, Ommibus configured for 115 Table B-1 shows shows RL@1/RL@2 and Vac + 3 ms orthagonal can be LSI-11 238 saleable option 10 Vac duration axes shipped Bus is (three with computer applied pulses various systems), once in total). controllers and can be operation‘ RLB1/RL@2 components. subsystem optlons. Table B-2 Table Option Saleable B-1 Number Description RLO1A RL#1 Unit, Mounting RLO2A RL@2 BC20J Subsystem Options 1I/0 Cable, Chassis Slide and I/0 Cable, Chassis Slide and Hardware Unit, Mounting RL@G1/RLB2 BC28J Hardware RLA1-AK RLA1-A (Drive), RLP1K-DC (Cartridge) RL @2 -AK RLA2-A (drive), RL@2K-DC (cartridge) RL@1K-DC RLA1 Data Cartridge RL@2K-DC RL@2 RL11-AK RLA1-AK, RL1l1l Controller, BC@A6R, Terminator RL211-AK RLA2-AK, RL1l Controller, BC@6R, Terminator RLV11-AK RLA1-AK, RLV1l Controller, BC@6R, Terminator RLV21 -AK RL@2-AK, RLVlflC@htfoller, BCA6GR, Terminator RL8A-AK RL@1-AK, RL8-A Controller, BC@6R, Terminator RL 28A ~-AK RL@2-AK, RL8-A Data | Cartridge Controller, BC@6R, Terminator | (Includes Table B-2 ~ skins, Saleable Cabinet Options'_ doors, covers, Volts 3950 110 H96@-BC 220 H960-BD 110 H967-BA ‘Dwg_ (lfi 5 SWLB with H9514-B top covers 220 H9603-EE DWLB witn'H9514—AJtop_coverS' 116 H9601-ED HO6¢1-EE 220 be ’SWHB complete hiboy cabinet HO602-EA 220 ' H96@2-EB 110 H9600~EA 220 HO9600-EB H9602-B~0 DWHB complete hiboy cabinet SWHB option arrangement dwg, Order as required. HO6@@-A-0 DWHB H96#3-B—0 SWLB option Order Order optlon as as arrangement dwg. requ1red arrangement dwg requlred B 39601+Ae0*'_ DWHB optlon arrangement dwg.: H9500 'Order as saleable Cable Options: ‘feet cm 'H96A3-ED 110 H9500 Includes f1ve 26.67 in) hlgh panels 26 67 Ccm (l@ 5 1n) cover panels (H950-QA) must ordered if required. | 110 - controllers) H967-BB 220 H9500 and power | 'lRemarks Type 7 J96 trim, is required, Order No. BC20J-20 BC20J-40 BCZ@J 60 order Where an I/O cable length of more than 10 one of Par t 701 requ1red the following: .'Length' Ne. 2122-20 701 2122-40 781 2122-60 from length of cable(s) ~Total must not exceed 30 m (108 £t). 6 m (20 ft) 12 m (40 ft) 18 m (6@ ft) the controller to the last drive B.1.3 AC Power Requirements The RLO1 or RLOP2 drive can operate within one ranges that are manually selected by means of two lotated at the rear of the device (Figure B-1l). ranges of two voltage terminal blocks These voltage are: | 11¢ Vac NOM 110-120 LO | 220 Vac | 220-256 °08-185 188-210 "The drive will operate when the line frequency is between 47.5 and 63 Hz. | B.1.3.1 Standard Applications - The drive can be the factory as a free-standing unit or mounted in and cabinets (refer to Paragraph B.l1l.2, Options). If the ac power drive is cord Part No. shipped is as 9¢-0¢8938). receptacle B.1.3.2 a free-standing terminated with (Figure This a plug requires B-2). | Vac) will require the drlve and the 2.74 m plug (DIGITAL a NEMA (9 type ft) 5-15R | Operation in reconfiguring changing from racks 5-15P | Optional Applications - range (180-256 at the rear of unit, NEMA type shipped various the the the 1line high voltage terminal cord block plug (Figure changed (Figure B -1). In 58 Hz applications, the llne cord plug must be - B-2). B.l.4 Grounding Requirements Each cabinet of a DIGITAL computer system is equipped with ground lug terminals that should be connected to a low-impedance earth ground by No. 4 AWG (5 mm/@#.20 in) copper wire or stranded No. 4 AWG welding cable. is recommended for standard grounding A bulldlng steel However, some connections to A Burndy QA4C-B solderless terminating the cable. conductor w1th each I/0 lug (or DIGITAL and memory equivalent) supplies a cabinet. beam 1is an adequate ground in many instances. disk-oriented systems may require additional earth carried through ‘contained within ground, various in signal addition buses to the and ground ground leads connectors the power cables, The green grounding wire in also be returned to ground, usually through conduit of the electrical distribution system. Note that the ~green wire is a not a current-carrying conductor, nor a neutral the the power cable must conductor. Whenever possible, the system power ‘panel must in contact with bare building steel by bonded ~or connected to the steel by a short length of be either joints cable. mounted (Figure 2-3)‘ - 1/0 CABLE (“CABLE IN") TERMINATOR NORMAL/LOW # LINE VOLTAGE TERMINAL BLOCK COVER CABLE "OUT" 110/220 VOLTS TERMINAL BLOCK COVER CIRCUIT BREAKER CZ-1056 Drive - Rear View Disk L@2 Figure B-1 RLO1/R SOURCE RECEPTACLE USED ON ALL120VTABLE-TOP COMPUTERS. STANDARD 120V 15A ' 1-PHASE 120V LOW-CURRENT HUBBEL #6266-C ::hca::os;)g:s DISTRIBUTION. 120V ”52:: ?2105351 TU10 UNITS. MOST 120V TERMINAL DEVICES. POWER CONTROLLER 861-F w 120/208V | 30A 3.PHASE Y ALL 120V STANDARD HUBBEL CABINET MOUNTED EOPT 42610 L5-30R 12-11194 | #2611 NEMA # L5-30P DEC # 12-11193 POWER CONTROLLER 861-C : 120/208-240V 20A 2.PHASE 20A #2410 3-PHASEY L14-20R 12-11046 G POWER CONTROLLER 861-A — v X oy - ;goA/zosv 120V PDP-11/45 PRO. CESSOR CABINET ONLY. ) T or 120/208V ' 3.PHASE Y | 60 Hz RM 10 DRUM HUBBEL #2611 NEMA # L21-20P DEC# 12-11209 #2610 L21-20R - 12-112100 Z ~~ 80 Hz RPO2/RP0O3/ - RPO4, RPOS, RPOS z ALL 240V TABLE-TOP COMPUTERS. STANDARD LOW-CURRENT 240v 16A 1-PHASE 240V'DISTRIBUTION. MOST 240V TERMINAL ;’f‘;’\:ifi-o 8-16R NEMA # 6-16P 12-11204 DEC # 90-08863 : = 240V fo:fl e uBBEL 42321 . 42320 ALL 240V STANDARD POWER CABINET MOUNTED CONTROLLER 861-8 EQUIPMENT. L8-20R 12-11191 NEMA # L8-20P DEC # 12-11192 240/416V 60 Hz AM10 DRUM 208 3.PHASE Y ¢ NEMA # -- NOTNEMA DEC # 12-09010 G - 50 Hz RPO2/RP03/ | RPO4 NOT NEMA 12-11269 PDP11/70 120V 304 1-PHASE | PROCESSOR HUBBEL #2811 PDP 11/70 MEM. VAX-11/780 #2810 - NEMA 2 121-30R L21-30P DEC 12-12314 PROCESSOR POWER CONTROLLER 861-D 12-12316 CP-1968 Figure B-2 approved Electrical Plugs and Receptacles B-8 | BUILDING STEEL e— POWER PANEL 08-0717 ~Figure B-3 Power Panel Grounded to Building Frame B-9 Where neither scheme is possible, a metal area (comprlslng2 the poger panel, the conduit, and a metal plate) of at least 1 mTM that is in 'green ‘ground exceed 1.5 m contact wire (5 with (Flgure ft) 1in masonry B-4). length must The and be connected connectmg should be at wire 1east a (10 to the must not No;_l2 AWG (2nm) . ‘When two 'cabinets electrically several with copper mesh are bolted No. 4 straps togje"ther,' DIGITAL AWG conductor (5 connected between bonds them mm/@.2¢0 in) the cablnet or frames. by After the groundlng system is 1nsta11ed it is advisable to take a voltage reading object. NBFU between No. the 78 Underwriters) provides frame and the (published by the National further ~grounding procedures. B.1.5 cabinet nearest grounded Bureau details regarding | | - | | Installation Constraints of preferred | | The route from the receiving area to the installation site that the equipment will travel should be studied in advance to ensure problem-free delivery. Among the considerations are: | Height and location of loading doors | | Size, capacity, and availability of elevators Number and size of aisles and doors en route Bends B.2 or obstructions AC CABLING in hallways. » ~ Computer equipment requires a power source with a minimum number of voltage and frequency disturbances. Line voltage disturbances greater than operation) 1/4 are cycle (measured at the receptacle unde51rable. 'DIGITAL power wiring during system | conforms to: Underwrlters Laboratorles, Inc.,"' Handbook UL No. 478, National Electrical Code standards, and the type II requirements of the National Fire Protection Assoc1atlon - (NFPA 76) ~ This means that in the United States the w1re used as ~equipment ground carries no leakage current. 1load does not The grounded used to ground Lines l, have gr,een, current No or green (except"' equipment is conductor is with a vyellow emergency), permltted a groundlng connectlon to to its frame, llght grey or v#ute. equipment. ',Its purpose is is black, red, in that order. and blue ' wires, - but leave stripe; it does carry DIGITAL that It must not be to conduct current. 2, and 3 in a typical 60 Hz power system represented by - rotation 1is (Figure B-5) are respectively, and phase . e— POWER PANEL CONCRETE (4 > - m s r T . FLOOR 08-~-0718 Figure B-4 Power Panel Grounded to Metal Plate B-11 13NVGNV'3YIHMISTI g"" - eEe GEs GUb e e 3VSYHd y AOZI C “-YIWHOISNVYL “S31ON OL3T9NIS3SVHdSGvVO1 ?anbrygmrmTeo1dA]uwaom,nm&wwa3sAs ''V83A3JHNHLLV314W1VVHGYI3dNHIIONNNDH3YOOLYAOS8NHATOvNILO0OD1NAGSNIINOLODIHHASOVHW3L8N1YGSIILSVANNIOHDOL4Y0NDOVILL2VN1B4FI1HY0LL3S1SI3ANIVW NIVAld NS AS802 A802 A1dNSHIWHO4SNVHL ~ SOLl-vin H¥3INVO3IHEG e IvyLN3N B-12 AIYNLOVY9 .iTM. ” )1DHITNIAVONIDWGI'TA4SI¥VLIOMBS0HILTN1DYAVdHY CAUTION Where no guaranteed, There are within the side of grounded it must some can Dbe assumed. 115 V/60 Hz systems States where neither United the 3-phase wire be not 1line 1is grounded (115 V delta). Figure B-6 shows a typical S@Hz power system. Two types NEMA type of power systems can L14-20R receptacle. be used to provide power The type shown in Figure to the B-7 1is referred to as split-phase (or 2-phase 180 displaced) 120/248 Vac. It comprises a center-tapped transformer with 120 Vac between the center two tap and outside either of the two legs. 24¢ legs. Vac exists between I | The second type (Figure B-8) 1is referred to as 3-phase displaced) 120/280 Vac. The 128 Vac exists between neutral of the three other legs (X, Y, or Z), and 208 Vac exists any and two Z). the Y (1290 and any between of the outer legs (i.e., between X and ¥, X and Z, or Y Although Figure B-8 shows the X and Y connections as the two phases used for shown can be used. the receptacle, any - two of the three phases The ground terminal on the L14-Z0OR receptacle will normally have a green "hot" B.3 The screw, the neutral terminal will be terminal will be brass covered. INSTALLATION -~ GENERAL controller should be white or . first, installed 511ver, and the followed by | the drive(s). Next, the diagnostics should be run to demonstrate that the subsystem is functioning properly or to diagnose any problems. Paragraph B.4 explains the installation of the RL1l1 Controller, Paragraph RL8~-A B.5 deals with Paragraph B.7 contains Paragraph B.8 explains paragraphs describes on B.4 the RLV11 and Paragraph B.6 describes installation. for the RLll-based each use of 1instructions acceptance of the the M9312 to install testing three and the controllers. bootstrap unit contains module Paragraph that and separate may be B.9 used systems. The RL11 CONTROLLER INSTALLATION | | RL11l Controller (M7762) is a single hexhelght module that can be installed connects the controller Of the factory 21 in to any the Jjumpers test hex-height SPC drive (Flgure B-9). on the W1-W6 RL11 purposes. selection: W7-W16 bus The | Controller, | VECTOR ADDRESS (169) ADDRESS Connector Jl remaining | BASE slot. (774409) B-13 16 | five are are for - used for address | AOb2/7022 ’ AN OYO1V3HL SNIVW ATd NS fi /08¢ /08¢ AOb2r0e2e IVHLN3N ]C1C] « 'V‘3TVIVYHIILWATHHVLVOM1HII0DSI3N1V33IlHNJLQI:M3HTAOV4L10LIGHI3IdNNHWAIYNLOIADNI8AYGNTAIOv8NDIO0TH1HvOSI.0mw37_8.m_O._w:m.O_I..m_U.OmDIZ<#DO(U.O:lAHVidOv3SV38 043J19NIS3SVHd'SAV0 mu:mflm9-g Teo1dAL ZHAS 1amog wa3lsAs NIV A1d NS 08¢ A9/ e O(TvIIdAl) 1L 3348HL 3AI8NO)JAHL¥V>AhwNuO<mD3HSIUV(3NMOONHNOSYOHOLONANQDAV1SISNODu_O SVHd8~~ A_A_A_ h E o . S . u H O L O V L I N O D A O v 2 / 0 2 HIWHOISNVYL — oS A9Ib A9t A134VSHI¥V3QNO¥9 NIV L I N J Y H I D Y 3 X M v 3 Y A 4 O 3SVHdV w! 9ISVY"Hd B-14 (TVOIdAL) T * Q L 3 I H V 1 L 3 ‘S31ON ZO:.wADtmhvEg.N_m.m.V_z.<wOm owi-vYN l WER LWME RANSFORMER | | | gf N l '/Z]C\)V ZJOTV \g:lcngAYG » l E\ = I 2 | —] _ GREEN SAFETY GROUND (A) 120/24OV SPLIT-PHASE (TWO PHASE) Figure B-7 Split Phase(2—Phase;§PowerSystem B-15 ] wer Line [Po TRANSFORMER l | : 'IGREEN" G 11-2294 N (B) 120/208V THREE PHASE ‘Figure B-8 Three Phase Y Power System B-16 OLDER VERSION Ji " MA-0S61 ‘Figure B-?9, RL11 C_b_mponeflnt; Layoth,‘ (Sheet 1 of 2) =~ ' NEWER VERSION wo | wio | | wig wis | wit ] | wia W13 W12 ITEMNO. 1 FigUré B-9 RLll-Compofient.Layodt‘(Sheet 2 of 2) 3?18 NOTE | - A logical one 1is represented presence of a )umper wire. The Unibus priority plug'sets priority for bus requests. the RL11 subsystem, bus requests are (See Figures B-18 and Bfll.) at priority (BR5/BG5) . the by the For level §5 NOTE Ad]ustments the factory the field. To install on the and are RL1l1 are preset not to be changed at in the'controller: Remove the M7762 'module from its shlPPlng contalner and ,examlne it for any phy51ca1 damage. If a prlorlty level other than 5 is required, appropriate priority Jjumper assembly or priority Jjumper assembly (item 1, Figure Figure B-18 as-a guide. The vector and obtain an set up the B-9) using base address " Jjumpers W1-W16 are for 160 and 774400, respectively. If the subsystem configuration requires other than standard addresses, set the jumpers up as shown in Fiqure B-14. Phy51cal location “Install the of ribbon ~indicator stripe to the viewer controller - when as Jjumpers cable the right viewing shown in shown (BC@6R-XX) and the Figure is the with the red smooth side facing component B-12. on Figure Dress side of the the cable as necessary. Insert the controller into SPC backplane the | these slot "row D. up and straln does out to shown in not Do not contain a chafe the the its appropriate Figqure rear of grant ribbon the B-12 after slot continuity cable. cabinet, in the ensuring that Route a110w1ng module the in cable for cable rellef | See and as NOTE - Appendix D for configuration rules SPC slot selection considerations. Remove the jumper between CAl and CB1l, (NPR Grant) | on ot the | , jumper exists. if the backplane VECTOR ADDRESS SCHEME R | l o 0 0 0 0 0 0,0 |] | 217 216 | 2!5: 214 213 212 I211 210 29 l 28 X X XIX X I o ' I ‘ FOR VECTOR ADDRESS —| 6 | 1 ' 0 | | | 23 I 25 24, 23 I 22 21 20 1010-00 00!001i1 Xl X | W W3|W4YW5 | 0 | Ii X X 10 160 - W3 W4 Ws JUMPERS IN Wi, W2 We JUMPERS OUT ' BASE ADDRESS SCHEME | o | . B I I- | 4 | | 1 : 213| 217 216 215| 214 213 zul 21 210 29' 28 27 Qe l 25 o1 l 1 o o|]1 o o]lo l ' X X W12| Wm Wls WMI W; o | | 0 2_3-_| 22 21 | 20 o olo'o'o W, 9' " W1o Wtal X X X FOR BASE ADDRESS 774400 - W,,, W1e, W; JUMPERS IN Wi, Wa. Wi, Wiy, Wia, Wie. Wis. JUMPERS QUT | NOTE: © ~ ~ | X'S DENOTE DON'T CARE (NOT SELECTABLE) 1'S DENOTE JUMPER IN 0'S DENOTE JUMPER OUT Figure B-18 | | R | c2-2004 RL1l1 Base and Vector Address Jumper Configurations - B-20 POSITIONER FRONT VIEW: ,‘1 ® POSITIONER RESTRAINING BRACKET LATCH 'SOLENOID ACCESS COVER - €Z-2003 Figure-B—ll RL11 Priority Jumper Assembly Connections B-21 2inb1gZI-9TITY13T0I3UO0DuorjerTe3Isul 8V1HOIHAN434) |( -:§3ION , B-22 Install the transition bracket at the rear of the cabinet 6. in Figure B-12. shown | - connector. 7. install transition Assemble and Connect the other end of the ribbon cable (BCP6R-XX) with Use Figure B-12 as the red indicator stripe on the top. a guide. Apply system power and, using a suitable measurlng dev1ce digital voltmeter or equ1va1ent) verlfy the (i.e., 8. voltages are within the ranges specified below. TEST POINT RANGE VOLTAGE AC2 | GROUND +5 VDC ~15.75 -15 vDC TO LOCATION ‘CV1 +14.25 TO +15.75 VDC +15 VvDC BACKPLANE AA2 TO +5.25 VDC +4.75 CB2 -14.25 VDC Measure all voltages between the ground test point and the appropriate voltage test point. If any adjustments to the power supply are necessary, refer to the approprlate manual. RLV11 CONTROLLER INSTALLATION | B.5 An RLV11 Controller is comprised of a bus interface module (M8@14) Each module has sw1tches, and the drive bus module (M8@1l3). jumpers, following B.5.1 trimpots, paragraphs. and connectors n explained are that in the | ~ Bus Interface Module | The bus interface module (M8@14) contalns the loglc circuits that' perform the following major funct1on5° ® ® & LSI-11 bus interface functions Programmable registers Silo data storage and control circuits An illustration of the component side of M8814 is shown in Figure B-13. The location of the bus address switches, the wvector address switches, and the connector flnger a551gnments are shown 1n this figure. The bus address switch 1is used to set up the dev1ce base address. It is normally factory preset to 74449. an address of 174406 This means the device CS and the register MP register has labeled. The ON p051tlon is the loglcal 1 or true state address of 174446. has an The switches have the ON and OFF positions B-14) . (Figure vof the The vector address switch is used to 'seleCt the address factory preset vector for this device when it interrupts. for an address of 160 (Figure B-15). B-23 It is | | | RLV11 BUS INTERFACE MODULE (M8014) | COMPONENT SIDE 1 MSB | BUS ADDRESS SWITCH | VECTOR SWITCH A B v F* A Figure B-13 S C2-2006 RLV1l Bus (M8014) Interface Module (Component B-24 Side) LOGIC ELEMENT E23« 1 HARDWIRED T 215 1214 213 b1 1 L 4 29 | 28 27426 | 252o 4 23 BASE ADDRESS 00O BINARY VALUE 212 | 211210 1 100 100 10] 987 ) 654] 321 fe—o SWITCH NUMBER USE THIS SCHEME TO SELECT THE APPROPRIATE BASE ADDRESS IF A DIFFERENT BASE ADDRESS IS REQUIRED CZ-2034 e - e FOR EACH “0" SET THE CORRESPONDING SWITCH "OFF” SWITCH "ON" FOR EACH “ + §ET THE CORRESPOND!NG .Figute'8—14 RLV11l Base Address Switch B-25 Settings E22e- | BINARY VALUE SWITCH NUMBER | 5 1 VECTOR ADDRESS — | ae o e | 2s e oo 1|1 —~ 7 6 MSB 5| LOGIC ELEMENT 10| | 0 20 | 20 g | o | g g [THARDWIRED 4 32| 1 |° | LSB FOR EACH “0" SET THE CORRESPONDING SWITCH "OFF" FOR EACH "1” SET THE CORRESPONDING SWITCH “ON" USE THIS SCHEME TO SELECT THE APPROPRIATE VECTOR ADDRESS IF A DIFFERENT VECTOR _A ADDRESS IS REQUIRED Figure B-15 | | | CZ-2007 RLV11 Vector Address Switch Settings B-26 B.5.2 Drive Module | The drive module (M8@13) contains the circuitry that performs the - follow1ng major functions: @ e @ An Data formattlng and error detecting c1rcu1ts» Control microsequencer and tlmlng circuits - interface bus Drive illustration of the component side of M8@13 is shown NOTE -~ Adjustments the in B.5.3 Figure in | 8-160 factory the to and are not to at preset are RLV1l the be adjusted field. Module Slot Location | - | Modules M8¢13 and M8@P14 must be inserted into the H9273 backplane, (Figure B-17) such that the M8@13 module is in the slot closest to the processor. Outside of this in slot 1. one restriction, the two modules The controller priority can be inserted in any two unused slots. distance from the electrical its on level is based solely microprocessor module B.5.4 1. 2. Module | Installation Using the normal conflguratlon rules, select two adjacent slots in Insert with the the backplane rlbbon cable stripe red the for edge the two controller modules. (BCGGR—XX) toward into the Jl module., - 3. 4. 6. 7. the M8@13 of | the - Insert the M8@13 modulle' into the selected slot that is closest to the processor. Examihe ‘the switches correctly. 5. on top (Row A) and M8fll4' to See the - | - insure that the base addr'ess vector address Figures | B-14 and B-15. switches are set Insert the M8014 module-next to the M8#13. Install the transition bracket at the rear of the cabinet as shown in Figure B-12. transition connector." | Connect the stripe up. other end of B-27 Assemble | the rlbbon and install o | cable w1th the the red B I \_ | ) / I RE | wz[? CABLE CONNECTOR TO DRIVE R| 4| vcoPoT 1 RLV11 DRIVE MODULE (M8013) COMPONENT SIDE 1 JUMPERS W2 AND W4 IN PLACE FOR EPROM USE JUMPERS W1 AND W3 IN PLACE FOR MASKED ROM USE W1 a a E49"\/‘1¢¢ ROM - ‘ | W4 W3 OR EPROM 1 | D | V | AV C B - ';Af»llv NOTE: | A AV A | CZ-2008 JUMPERS ARE ZERO OHM COMPOSITION RESISTORS Figure B-16 RLV1l Drive Module (M8013) A B . D PROCESSOR MODULE [ ) C ’ LK HIGHEST PRIORITY LR , > R | v 3 O 4 |l : 5 | ! 6 T ' l L 7 8 | 9 ] | l —_— LOWEST PRIORITY | l 1 1 (MODULE SIDE VIEW OF 8 SLOT BACKPLANE) MA-0566 ~Figure B-17 H9723 Backplane Grant Priority Structure Apply system power and, using a suitable meaSuring.device 8. (i.e., digital voltmeter or equivalent), verify that the | voltages are within the ranges specified below. Ground +12 vdc #11.5 vdc to +12.5 vdc The -5 module. ' NOTE on generated 1is Vdc It is not adjustable B but only corrective procedure. | - the specifications for Module replacement be within " operation. M8@13 must proper is the . | ground test point and to the power supply are necessary, appropriate processor's service manual. to the refer DU . Measure all the between voltages If any adjustments e point. tag the appropriate voltest RL8-A CONTROLLER INSTALLATION B.6 W/ AD2 | ALl (M8813 only) -5.25 vdc to —4.75,Vdc_ -5 Vdc | AA2 - +4.75 Vdc to +5.25 Vdc ~ - +5 vdc AC2 | | | v Test Point | - Range Voltage IR | B.6.1 ‘Introduction following ains the cont (M8433) module The RL8-A Omnibus controller ‘logic functions: | logic Interface ~ Programmable registers Silo storage data and control ) o Data formatting and error detection ‘Control microsequencer and timing logic | Drive bus interface logic | B.6.2 | - NOTE | o Adjustments on the RL8-A are preset at in the factory and are not to be changed S the field. | Module Slot Location : - | The module can be inserted into any unused Omnibus hex-height slot is between the CPU and the first memory element. The controller cable. connected to the first drive via a BC88J-208 interface Connections between drives are made using a BC2@J-XX (78-12122-10) | | cable. - . 5,5,3“ Modhle Installation'- 1. Remove the M8433 module (see Figure "-B--lS-.)' Vlah_d‘ interface cable (BC@P83-28) from the shipping container and inspect L | R | them for physical damage. B-29 W5 M8433 RLBA DISK CONTROLLER wa W9 CZ-2030 Figure B418‘ RL8—A'Jumpers ~B-39 Verify the and proper priority Device jumper configuration (Figure device Wl W2 6fA,61 IN OuT 62,63 IN IN W3 W4 W5 OuT IN IN OUT Break Code for codes B-18). | Priority 4 IN ouT 1 NOTE RL8-A is shipped priority Device of from factory with Type | W8 W9 OuUT RL Q2 IN IN OUT Wlg Wll Type (E133) P12E?2 8788 or 2708 Position PDP~-8 | the and W6 - W7 ouT IN IN ouT IN ouT ouT IN BC86J~-20 chassis a | RLA1 ROM ‘— the 0. interface-to-drive connect the Berg cable connector to 1in the module. Install the Omnibus 5. Route M8344 module into the RLB1/RLA2 B.?.l 1. DISK Unpacking cable out to where ‘the DRIVE and delivered, enclosed by that the drive will be secure INSTALLATION each a drive (Figure the shipping the Remove the staples carton flanges 1id and its associated cabinetry cardboard carton and attached to heavy skid Remove and in Inspection are shipping first | When a slot backplane. installed. B.7 selected the M8344 from the B-19). Remove carton to the top of that to the fasten skid. the plastic skid. straps the carton. the wooden cratlng slats FULL TELESCOPE CAP (9905446) ./ 5-PANEL FOLDER (9905975) ‘ > CRATING SLAT / (7606858) CUSHIONED SHIPPING SKID ~ STAPLES 114979 Figure B-19 H95@ Shipping B-32 Package ) ) the Remove 4. Inspect 5. | shipping carton. cabinet the Retain all. packing claims should that any claims be drive and material for shipping filed and signs for receipts damage must promptly with be of damage. the event filed. All integral part 1in transportation the company. RLA1/RLA2 Disk Drive Unit Mounting B.7.2 NOTE If the RLOA1/RL@2 is to be mounted in an H95¢ cabinet, the shipping brackets must s be retained and refitted after installation. This is the only way to prevent the drive from sliding while H958 the moving or repositioning ” . cabinet. The drive may be shipped in a rack or cabinet as an of a system or may be shipped in a separate container for addition to "If an system. existing the drive installed is to be in an existing rack or cabinet, install the chassis slides first as described in Steps 1 through 6 below (Figure B-20). The procedure for installing the drive | | itself begins with Step 7. 1. 2. 3. Install cabinet stabilizers before mounting the drive. the Remove hardware for slides from the disk drive. (Retain the , reassembly.) Install slides into the rack or cabinet using enclosed Be sure the slides are at the correct height hardware. to permit installation of pop panels (dress panels) upon Also verify that the slides completion of installation. do not bind on any hardware used to mount 4, 5. 6. Extend slides to lock position, Slide drive onto chassis slides and reinstall Security mounting | hardware. Ensure that the disk drive moves that there is no binding in the proper 7. the slide. Open height the drive has been maintained access cover. B~33 easily on the slides, cabinet, and that the for dress panels. \ GT.000000N luooooaoai\ : 1 b : ) 5 o e} 0 g o) S 0 8 PP~ 2] Sl ACCESS SLOT - SLIDE EXTENSION 'RELEASE CATCH . Fig?ile B~20 RL@l/RL@Z'Cabinet Installation B-34 CZ-0009 gz | o | NOTE There is a safety interlock in the "RL#@1 and RL@2 Disk Drives that locks the drive access cover when the drive has no power. this bypass to release manual The ‘interlock is located on the right side of cover access small a under drive the (Figure B-21). Remove the cover to reach Pull down on the solenoid the solenoid. and operate the top release mechanism at the same time to open the drive access After the drive access cover is cover. open, replace the solenoid cover. on the Loosen the head restraining bracket screw located retlghten_ and degrees 9@ Turn the bracket positioner. ’the screw (Flgure B-22). - On newer drlves, these are two shipping screws on the bottom of the unit that secures the splndle/blcwer motor. ng Remove the screws. If. drive the is | being install in a dual-drive cabinet that has an interlock system to prevent more than one 1is a time, ensure that 1is drive being extended at | | connected. 11. ’Inspect the terminal block covers: at the rear of the Ensure that they are conflgured properly for the drive. input power available Connection ~will result ~disk drive. 12. to (Flgure B-22). in the wrong ~ power source serious damage to the | S If there is only one disk drive in the system, or if this install a the last drive of the daisy chain, is terminator assembly (DIGITAL part no. 78-12293) in the "cable out" location at the rear of tbe drive (Figure - B-22). 13, i CAUTION | If this is an RL1l1- or an RLV1l-based system, route the I/0 cable BC2@J-XX (DIGITAL part no. 76-12122-10) between the first drive and the transition connector., If this is an RL8-A-based RL8»A to the system, route the BC88J-20 cable from the first drive. B-35 POSITIONER ~ FRONT VIEW: | ® - - POSITIONER - RESTRAINING BRACKET LATCH SOLENOID ~ - ACCESSCOVER CZ-2003 Figure B-21 RLfil/RLflz'- Covers Removed B-36 / 1/0 CABLE ("CABLE IN") ~ NORMALLOW ,\ ) | LINE VOLTAGE . TERMINAL BLOCK — o COVER s -z | ) ’ | ' | ~110/220 VOLTS | TERMINAL 'BLOCK COVER CZ-1056 } Figure B-22 2 - Rear View Disk Drive RL@1/RLO B-37 14. If this is a multidrive installation, connect an I/0 cable from "cable in" of this drive to the "“cable out” connector of the previous drive. Repeat for each drive. o NQOTE < The total controller to length of last the exceed 3@ m (100 ft). cable must drive from not 15. Install the proper unit select plug at the front of the o B.7.3 drlve Drive To begin loosening Rest the 2. 3.', Prestartup cover on off, - Inspection the rear of follow_these - - B the top <cover by cover straight up. the drive (Flgure B24) Wlth the steps. Ensure that the positioner restraining,bracket is secured out of position to prevent interference with it (Figure Ensure that the p051t10ner is home., Ensure that the read/wrlte head gimbels are not bent or dirty. (If they percent alcohol Ensure that are dirty, o wiper. 4. B-23) . the 1nspect10n procedure, remove the captive screws and lifting the drive power 1. (Figure and 9 clean percent with water the spindle rotates surfaces are not dirty. ‘ a solution and a of 91 lint-free : e freelyt/and: its top (Clean as described above.) 5. ,'Ensure that the btush assembly is'home (not exposed). ‘6. 7.‘- 8. Ensure that the loglc modules and connectors are seated flrmly Turn CB1 ON. Ensure that the spindle rotates slowly counterclock wise for approximately 15 w1ll ~the LOAD 11ght seconds and come on. At stops. o this time, | 9. b Ensure that the FAULT light is not on. 10. | ;Ensure that operatlng the muffln fan at | B-38 the rear | of the drlve is \J D SWITCH LOA AND INDICATOR N UNIT SELECT PLUG AND READY INDICATOR FAULT INDICATOR ): - | Figure B-23 | SWITCH TECICAT TOR WRITEANDPROIND ' RL@1/RL@2 Disk Drive- Front View B-39 CZ-1005 | a suitable voltmeter voltages or are within Voltage - specified ~ Test (+15.08 to +18.8 Vvdc) (-15.0 to -18.8 vdc) +5REG +8REG (+7.7 to +8.3 -8REG (-7.7 to -8.3 (+4.85 B-24 to for servo Point +VUNREG ~ TP8 TP4 Vvdc) the drive -=VUNREG +5.35 vdc) Vdc) dc are located on (Figure B-25). digital following tolerances. Range Figure (i.e., the +15UNREG points module 13. the ensure -15UNREG See 12. measuring device equivalent), TP5 module mask location. covering the Test dc servo Verify that the WRITE PROTect switch cycles in and out “and the indicator lights up when the switch is pressed. Verify that the LOAD switch indicator 1light goes out Return switch to the "out" cycles in when the position. and out switch | and 1s the pressed. 14, Turn off CBl. Reinstall the top cover and secure with the captive screws. Ensure - that the drive access cover cannot v be opened. Turn CBl on and ensure the drive access cover will open. Drive Star-tup Operation Check With the Close drive the o the o) When power cover, LOAD press light the the install the goes 3@ will load heads have locked will illuminate. approximately 45 reaches have heads scratch LOAD switch seconds), brushes a and cartridge. note that: out cartridge approximately When ON, and nominal brush returned approach onto The a home, total the cylinder cylinder seconds. speed cycle time @. @, the for this (after commences. read/write When READY the light process is ~— Using 110 DRIVE LOGIC MODULE SERVO MODULE R/W - MODULE D.C.SERVO MODULE ANDTEMPLATE Figure B-24 - cz-00Mm RLP1/RLE2 Disk Drive - Exposed Drive Logic Module 41 3. Press off the and again. The READY position. The heads should a stop about complete spindle should after illuminate when the slow 3@ light down and seconds. spindle should retract to has go their home then The come LOAD stopped. to 1light -.If the drive startup operation check detailed above 1is ~ successfully completed illuminates), run the described B.8 switch read/write should 4. LOAD the CONFIDENCE in READY 1indicator confidence tests B.8. o consists has a Each the subsystem TESTING Confidence testing "Each diagnostic instructions. Paragraph (i.e., ER of running the 1listing that listing explains system diagnostic programs. contains operating hardware requirements, "software environment, which features are tested and how they are tested, program options and how to select them, how to interprete printouts, with error handling, the Diagnostic ‘instructions. The device listings or on. mlcroflche. information Supervisor, are and tables, complete avallable as hard - copy - dialogue operating printouts - The\ binary formg of-,the diagnostic programs are available on various media. It is always advisable to keep a copy of the ‘RLA1/RLA2 cartridge dlagnostlcs on a media other than the so that the dlagnostlcs can be loaded -dev1ce the 1f RL subsystem is RL@1K or RL@2K through another down. ~ The old MA INDEC nam ing system is belng replaced with a new naming 'system. Manual and converted. conform to When In microfiche addition, part DIGITAL S standard orderlng dlagnostlc check the Table B-3. ‘revision revision current twelve medla, catalog or level. The applicable will be are for tatalogs are being character llstlngs, index Unless otherwise designations numbers part manuals, the and latest also being assigned that number or mlcroflche, designation indexes are specified when system. ordering, listed the shipped. | | PDP-11 Dlagnostlc PDP-8 Software PDP-11 PDP-8 MAINDEC Software Components Index MAINDEC Index PART NUMBER Components Catalog* Catalog* | | | AV-BO21E-TC AV-0872B-TA : AH-9026P-MC | AH-6572G-MA * NOTE: Both'of thesetcatalogs are available on microfiche (EP-08/11DC-02) in latest Table B-3 ,_Diagnostic_Catalogs and Indexes NAME and B.8.1 The RLll-Based diagnostic Diagnostics package used for an RL11/RL@]l subsystem before the release of the RL@P2 consisted of the six free-standing programs listed in Table B-4. There were two revisions, Revision A and Revision B. These programs handled only RL@A1 drives (not RL@2 units) . | | Table CZRLAA QD CZRLBA@® CZRLCAQG | - CZRLDA® | CZRLEA® RL11-Based Test Part 1 Test Part 2 Drive Test Part 1 Drive Test Part 2 Drive diagnostics Supervisor, Diagnostics Controller Controller " Performance CZRLFAQ These | B-4 can manually Exerciser Compatibility be run Test free-standing, under the Diagnostic under XXDP, chainable under XXDP (except CZRLFA@ which requires manual intervention), or under ‘manufacturing checkout environments such as SLIDE or ACT-11. A new diagnostic package is available to test either an RLE1 or an RLA2 unit. The kit contents of the There a new program used into is tests numbers are are shown in added to to read the Bad Sector File the field writable portion program is assumes that not a the diagnostic system Table PART NUMBER ZJ283-RB | - 2J283-RZ Z2J283-PB Z2J283~-FR o a B-5 is and listed Table the can the should Table B-6. package and of functioning RL11 in B-5 named CZRLMAQ. not be Kit used Numbers Documentation and Paper Documentation Only Only Only It is be used to write entries Bad Sector File. This DESCRIPTION Paper Tape Microfiche the | properly. Diagnostic and Tape as one. It Table PART NUMBER AC-F111A-MC AH-F110A-MC B- 6 RL1]1 Diagnostic Components ITEM NAME CZRLGA® CONTROLLER TEST #1 DOCUMENTATION FICHE PAPER AK-F108A-MC PAPER TAPE 'AK-F109A-MC AF-F111A-MgQ AC-F115A-MC AH-F114A-MC | TAPE #1 #2 'DECO CZRLHAQ CONTROLLER TEST #2 DOCUMENTATION FICHE | PAPER TAPE #1 AK-F113A-MC PAPER TAPE #2 "AF-F115A-M@ DECO AK-F112A-MC AC-F119A-MC CZRLIAQ DRIVE TEST #1 - DOCUMENTATION AH-F118A-MC FICHE PAPER | | AK-F116A-MC TAPE #1 AK-F117A-MC PAPER TAPE #2 AF-F119A-Mg@ DECO AC=F123A-MC AH-F122A-MC ~ CZRLJAD DOCUMENTAT ION DRIVE TEST #2 F ICHE AK-F120A-MC - "AK-F121A-MC AF-F123A-MD AC-F127A-MC AH-F 126A-MC PAPER TAPE 1 PAPER TAPE #2 - DECO CZRLKA® 'PERFORMANCE EXERCISER DOCUMENTATION FICHE AK-F124A-MC PAPER TAPE AK -F125A-MC PAPER TAPE AF-F127A-M@ DECO AC-F131A-MC AH-F139A-MC CZRLLA® DRIVE COMPATIBILITY TEST #1 #2 "DOCUMENTATION FICHE AK-F128A-MC PAPER TAPE #1 AK-F129A-MC PAPER #2 AF-F131A-MO DECO AC-F135A-MC AH-F134A-MC AK-F132A-MC AK~F133A-MC AF-F135A-M@Q CZRLMAQ BAD SECTOR FILE UTILITY TAPE DOCUMENTATION FICHE PAPER TAPE #1 PAPER TAPE DECO #2 In addition to the free-standing diagnostics, there is a DECX1l module for use with the DECX1ll System Exerciser, The current revision is designated RLAA and is in DECXll Option Library #5 DXQLQ. Revision A (RLAA) will operate an RL@G1 drive only. Revision B (RLAB) will operate either an RL@1 or an RL#2. There is also an RL subsystem»driver for the Maintenance Program Generator (MPG). The binary form of the diagnostics are included as part of XXDP. This makes them available on media for the RK@5, RX@1l, DECtape, magnetic tape, and DECassette. The use of listed in XXDP, Table DECX11l, and B-7. MPG RK@#6, 1is expla'ined - | - RK#7, | RLA1, in_thé manuals 'Table_B—7;:User Documents PART NUMBER HARD COPY " PART NUMBER MICROFICHE ~ AC-90931-MC EP—DZQXA-J-D_ AC-8240Z-MC ~ . CZQXAI@ XXDP USER GUIDE AH-8242Z-MC AC-816JC-MC B.8.2 NAME CXQBAZ@® EP-DTUMA-C-D RLV1l1-Based The RLV11 has an is tested subsystem internal run first. feature kit includes kit plus the CVRLAAP in Table B-8. ‘Table B-8 the test. is | same The that so there 1is one additional Diskless Test. . It should be | dlagnostic DOCUMENT MANUAL with the same set with the following maintenance not tested by the RL11 diagnostics dlagnostlc program called the CVRLAA@ The USER Diagnostics The RLV1l Controller-based subsystem of diagnostics as the RL11l Controller exception. DECX1l CTUMAC@ MPG USER items RLV11l | as kit the RL1ll diagnostic designations are | shown - the RLS8-A RLV1l Diagnostic Kit Designations DESIGNATION CONTENTS Z2J285-RB | 2J285-RZ | Documentation and Paper Tape | 2J285-PB Z2J285-FR Documentation | | - Paper Tape Microfiche Only Only Only The DECX1ll module is the same one used for the RL1l. " B.8.3 RL8A-Based There are six Controller-based with as the system. DECX8 system individual B-10). Diagnostics free-standing There (see | programs for module is also a DECX8 Table B-9) or in exerciser. components | | diagnostic These | B-45 diagnostics a are kit for use available (see Table | Table AC-C656A-MA AJRLAAG, RL 8A AH-C657A-MA AJRLAAD, RL 8A DISKLESS DISKLESS CONTROL CONTROL TEST TEST AK-C658A-MA AL-C659A-NA AJRLAAG, RL 8A DISKLESS CONTROL TEST AJRLAAQ, AC~-C660A-MA ~ AJRLBAG®@, AL-C663A-NA AJRLBAG®, AJRLBAG, DISKLESS CONTROL RL8A/RL@1 DRIVE TEST RL8A/RL@A1 DRIVE TEST AJRLBAR, RL8A/RLQ@1 DRIVE TEST RL8A/RLO1 DRIVE TEST AJRLCA®, RL8A/RLOL DRIVE ‘TEST AJRLCAB, RLSA/RLA1 DRIVE RL8A/RLG1 DRIVE RL8A/RL#A1 DRI VE AC-C664A-MA AH-C665A-MA 'AK-C666A-MA AL-C667A-NA AC-C668A-MA AJRLCA®, ~ AJRLCAQ, AJRLDA®, AH-C669A-MA AJRLDAG, RL8A/RL@1 AC-C672A-MA AHfC673A“MA- AJRLEA®, AK-C674A-MA AL-C675A-NA AJRLEA®, AJRLDAJ, TEST RL8A/RLO1 COMPAT. RL8A/RLO1 COMPAT. AK-C670A-MA AL-C671A-NA TEST TEST COMPAT. RL8A/RLA1 COMPAT. (DOCUMENT) (FICHE) ~(P. TAPE) (DECTAPE) VERIFY (DOCUMENT) VERIFY (FICHE) VERIFY (P. TAPE) VERIFY (DECTAPE) (DOCUMENT) RL8A/RL@1 PERF. AJRLEA®, RL8A/RL@1 PERF. EXER. (FICHE) AJRLEAQ, RL8A/RL@1 PERF. RL8A/RL@1 PERF. EXER. (P. EXER. AH-C677A+MA AXRLAAQ, RL8A .DECX8 MODULE AK -C678A-MA AXRLAAQ, RL8A AC-C682A-MA AJRLGAQ, AH-C683A-MA AK-C684A-MA AJRLGAZ, AJRLGAQ, AJRLGAQ, AL -C6 85A-NA Table - ZB233-RB (FICHE) (P. TAPE) (DECTAPE) TAPE) EXER. (DECTAPE) AXRLAAQ, RL8A DECX8 MODULE (DOCUMENT) AC-C676A-MA PART NUMBER (DOC) (FICHE) (P. TAPE) TESTV(DECTAPE).. (DOCUMENT) s RL 8A N RPN N e AH-C661A-MA | Diagnostic'Components 'DESIGNATION NUMBER AK-C662A-MA | RL8-A/RL@1 B-1# (FICHE) TAPE) (DOCUMENT) RL8A/RLO1 PACK VERIFY (FICHE) DECX8 MODULE (P. RL8A/RLO1 PACK VERIFY RL8A/RL@1 RL8A/RL@1 PACK VERIFY PACK VERIFY (DECTAPE) RL8-A/RLM1 Diagnostic Kits " CONTENTS DOCUMENTATION AND PAPER TAPE ZB233-RZ ZB233-PB DOCUMENTATION ZB233-FR MICROFICHE PAPER (P. TAPE ONLY ONLY TAPE) ‘\\"m/, . PART B-9 e iTablé B-11 RL8/RL@2 Diagn°5tiC1Kits . PART NUMBER CONTENTS ZF241 -RZ DOC UMENTATION DOCUMENTATION AND PAPER TAPE ZF241-RB .~ PAPER ZF241 -PB ZF241~FR FICHE ZF241-PH RL@2 ZF241-RH RLG2 Table B-12 PART TAPE | | AND DOCUMENTATION RLB/RLBZ Dlagnostlc Components NAME NUMBER AJRLAC@ RL8A DISKLESS CONTROL TEST AC-C656C~-MA AH-C657C-MA AK-C658C-MA AL-C659C-NA AC-F362A-MA AK-F363A-MA AJRLHA@ RL8/RL@2 SEEK/FUNCTION AH-F 364A-MA AL-F365A-MA AF-F362A-M0 AC-F366A-MA AK-F367A-MA 36 8A-MA AH-F AC-F370A-MA DOCUMENTATION FICHE | PAPER TAPE " DEC TAPE DOCUMENTATION PAPER TAPE F ICHE ' DEC TAPE AJRLIA® RL8/RL@2 READ/WRITE DECO/DEPO ' DOCUMENTATION PAPER DEC AJRLJA@ RL8/RLO2 DRIVE COMPAT AK-F371A-MA TAPE DOCUMENTATION PAPER FICHE AL-F373A-MA DEC AF-F370A-M0 AK-F375A-MA EXER. L@2 PERF. AJRLKAQ RL8/R AJRLLA@ RL8/RLO2 PACK VERIFY AK-F379A-MA AH-F380A-MA AH-F384A-MA AF-F382A-M@ 'DOCUMENTATION PAPER TAPE DEPO/DECO DOCUMENTATION PAPER TAPE FICHE - DEC TAPE AL-F 38 1A-MA 38 2A-MA AC~F AK-F 38 3A-MA TAPE DECO/DEPO "DEC TAPE AL-F377A-MA AF-F378A-M0 TAPE ~ FICHE AH-F 376A-MA AF-F374A-M0 AC-F 378A-MA TAPE DECO/DEPO "AH-F372A-MA AC-F 374A-MA | FICHE AL-F369A-MA AF-F366A-M@ 'fITEM AXRLBA@ DEC/X8 MOD RL8/RLO2 DECO/DEPO DOCUMENTATION PAPER 'FICHE TAPE DECO/DEPO | | B.9 USE OF THE M9312 The M9312 module is BOOTSTRAP WITH AN RL11 used bootstrap capability five IC sockets for on many as well as ROM chips, PDP-11 SUBSYSTEM Unibus systems to provide other functions. The module has four of which are reserved for peripheral bootstrap programs. = There are several ROM chips available for the different peripheral devices, and an M9312 is configured by selecting the appropriate chips for the particular 'system on which it is The subsystem RL 23-751A9. available all the An RL This in kit available system used. bootstrap program is contained in ROM chip ROM disk by a command (a program that can is a feature of the M9312). mnemonic for the DL or n the RL11 also plus chips. emulator is be booted DLn, where is to the unit The device (@ | information on the M9312 is available Manual. It 1s available microfiche (EP-M9312-TM) . console number through 3). More number chip can be ordered individually and is MR11-EA, which consists of an M9312 module in printed in form the M9312 Technical (EK-M931Z2-TM) or on | APPENDIX TOGGLE-IN C.1 HEAD SELECTION PROGRAM FOR RL11/RLV11 The following program causes Head 1 (lower (on- unit @) if the WRITE PROTect switch is head) to be selected the switch is out. 13060 1002 1004 012700 174400 312701 1006 174404 | Wait 1010 105710 1912 100376 1914 1916 912711 220013 1020 1022 12710 00004 1024 1957109 1026 1030 p—— if | Housekeeping | | -~ Get Status Command | | - Wait 108376 - B913702 1832 174406 1034 1936 006302 313203 1040 1042 936303 185702 1044 100405 Status Check Word HS Bit Bit | 1046 Ba5703 Check WL 1050 1052 100357 12711 Equal, Set HS 1854 o head) to be in and Head genp21 Loop Bit 1056 1060 ARg4A04 035703 Go to Seek Command Check WL Bit 1064 12711 Reset 19066 1270 go0o0l 312710 Seek 1872 AoA0A6 1062 1074 180752 Ga@d745 Equal, Loop Loop HS Bit Command C PROGRAMS selected 8 (upper C.2 The HEAD SELECTION PROGRAM FOR RL8-A following program causes Head 1 (lower (on unit @) if the WRITE PROTect switch is in head) to be selected if the switch is out. 200 201 | 6600 | Clear 1234 202 203 204 6604 6601 - | ~Get Status Wait 206 207 First @232 7640 Check 210 5217 6615 P233 7650 214 216 7332 5224 217 6615 220 #2333 221 . Word | | HS=WL, o o 6603 225 226 HS 7325 6604 o ~Seek 234 1002 | | | | : > o 224 5201 | | Go to 201 Second 7300 9100 0040 Bit | 223 231 WL - HS=WL, 232 233 | | Check Check 6601 | | 217 of Status | 5201 5227 (upper Bit HS=1, Go to Second Word - 7640 227 @ HS 222 230 Head | Status of | 5201 215 > selected Command - 5203 212 and be Controller 6615 213 to | 205 211 | head) Word of Status WL Go to 201 - | ) to Command REG Command Wait Loop | - | to | Command | to A \ ) REG B ' 241 Constant Constant ) GET STATUS (WITH OR WITHOUT RESET) ON AN RL11/RLV1l c.3 SUBSYSTEM To 1t accompllsh thls, is necessary to: '1; Dep051t a 3 1nto DAR at 774404 (or 13 to Reset) 2. Deposit a 4 into 'CSR at 7744080 (or 404, 3. Wait for operation to be complete 4. 6. Examine contents of MPR at 77440 1404 for 1004, the On some PDP-11 systems thlS can be accompllshed manually ausing program On other PDP-11 systems it is necessary to run console. Start at 100¢ and when it halts, such as given 'below. | memory location 1632. examine llfl to 404, To get status on unit 1, 2, or 3 mOdify-loCation’lf . A ' . or 14@40 1664, S To | | » reset drive modlfy locatlon 1902 to 13 1000 ’012737 1904 174404 00003 1602 @12737 10086 1610 1012 | o004 o 174400 1014 165737 1020 100375 1216 174400 1022 313737 1626 001032 1024 1039 1932 Get Status Command Use 13 to Reset Use o | l1 ,2 , Poagoo 3 | wWait | | . | Memory to lt. Move Resu | 174406 000000 1404 1004, 404, Halt Result for | Units GET STATUS ON AN RL8-A SUBSYSTEM following program will GET STATUS from C.4 The 1, 2, 3 change location 212 to Start the program at 2080 1102, - at the 1282, first the status word 1is displayed in the halt, the second byte is displayed. 200 201 7300 1212 202 203 6604 6601 204 5203 205 206 207 6615 7402 6615 219 211 7402 5200 212 1002 unit @. To access halt, the accumulator - first at the Get First Byte Halt and Display Frist Byte Get Second Byte Halt and Display Second byté v»»GetStatus Wait Jump to Constant unit 1302. Start | Byte of second R FOR RL11/RLV1l1 ING SEEK C.5 OSCILLAT program will cause unit zero to perform an To drive units other than unit @, swap the unit seek. ing oscillat locatlons 1fl44 and 1054 to reflect the unlt» modify or plugs number The following | and 9. ,;number 1n bltS 8 fThe number of cyllnders 1nvolved is 1nserted into blts 15 through* bit @ 7 and - programs at in is set 1p00. from location 112 switch register before the If no switch register the to @@1@68 and ~put 177578 the starting is available, modify of r numbe in bits 17 through 7 and set bit fl 1n 1ocatlon 1@6@. I»cyllnders ?The common values forthe sw1tch reglster ‘are: Value of Sw1tch Reglster Number of cyllnders' »” (in dec1mal) S (in octal) r onge205 17¢ | 25 - . \‘MP‘/’/ | 1062 1004 1912 1014 1916 19424 1930 1¢32 177578 - @gple32 042701 _._4 ‘ S p09ne4 Change dlrectlon b1t in Rl g@4537 GoSeek 198376 @18137 136 R Seek 174484 146 | = o ged767 Loop Back Wait 1085719 1034 . @p12M10 1p42 1p44 000006 . 1p46 1654 Set leference 1nto Rl @@1e32 1626 1856 o Set Dev1ce Address 1nto RG = 904537 '1j_ ':.‘Go Seek - 1822 1050 pl2706 #1"fASet Stack Polnter @¢@leee g127¢8 - p13791 | .j 1620 - 1@952 17685 174498 1006 leia 852405 877685 s 1080 - | - 15718 g?*jWalt 108376 | | o '01271gt-_}.vd".Read header to klll tlme for 000010 000285 .a‘,[ -,'Return, _, ; SKTO C.6 The OSCILLATING SEEK follow1ng seek. program To drive Insert the number at location 2¢@. -gylinder=l, 85 200 o 201 202 203 | | cyl=125, 7201 1708 to cyl=252, 255 . 6604 e 6603 207 210 7325 6604 211 4221 212 213 7387 6604 214 215 1225 1226 216 | 217 7500 perform an cyl=377 and Reset osc1llat1ng - Get NumberQ Go Wait for o ~ 511 cyl=7717. for | SKTO | - - -~ Store Ready number Seek , | Go | - | Check 5222 224 5621 P000 4000 ~ ~ Loop Wait Temp Ready to Delay | Direction for ~Loop to oo 223 for Header | Change 5203 6601 Wait Read 52082 222 226 unit g 1225 200 225 cause units other than @, swap unit number plugs. of cylinders into the switches before starting The usual values for the switch register are: 1 3225 205 221 RL8-A 7684 4221 204 220 FOR will for Constant Time Start Ready to Bit Restore et APPENDIX D RLll CONFIGURATION AND INSTALLATION CONSIDERATIONS D.1 SPC The RL1l1 CONSIDERATIONS 1s unconditionally 'quad height | | a Small Peripheral fit 1into modules or any Controller SPC slot. combinations modules that 1involved only assignments applied only to four rows | | (SPC) but Early of SPCs smaller rows. C, D, E | does were (single Thus, the and F on | not always or dual) standard pin a hex-height backplane. Many new options, such as the RL11l, are hex-height modules and therefore require that rows A and B be vacant since some SPC slots use rows A and B for Unibus cables or power connectors. Som hex-height options require standard Unibus pinning on rows A (MUD) pinning. 1In on rows either The A and of early the such Unibus SPCs did to/from original as the assignment Rl111 B standard transfers and B and some require Modified Unibus Device the case of the RL11, the only connections used are the +5v and ground. Thus, these rows can be is to necessary RL1l1l, be MUD pinning. not utilize memory SPC called or and pin utilize PRIME in Memory an DMA signals Some of transfers. that includes older that the Access those assignments. SPC used Direct therefore do to ensure I (non-SPC followmg (DMA) were the newer There is these PRIME) signals data not part options, a new pin signals. If the slot are then wired it is on the must be backplane. Pin CAl - NPG In ~ Pin CBl1l - NPG Out Pin FJ1 - NPR Pin CVl - AC LO Pin CUl - +15v Sirimeir If the slot has SPC PRIME pinning taken. slot by NPG cont1nu1ty is a backplane jumper must removed an be RL1l1l, and the whenever Jjumper This consideration Continuity card used then a DMA-type must 1is in in row another precaution maintained across an empty SPC PRIME from pin CAl to pln CBl. This jumper be option added addition D of all if is the installed, such module removed. to the normal empty SPC slots. is Bus as Grant D.2 CONFIGURATION CONSIDERATIONS When configuring a Unibus =system for the best priority assignments, two characteristics of a peripheral option must be taken into consideration. These are the peak word transfer rate and the T1 time (Tl time is a function of the peak transfer rate and the silo size). The RL1l has a peak transfer rate of 256kHz (3.9 microseconds/word).and a Tl time of 62.4 microseconds. This dictates its p051t10n in the prlorlty scheme.,. The recommended priority scheme is 1lsted below. CPU Memory "RK11/RK®@5 TM11/TUl@Q TC11/TUS6 RL11/RL@1-RLG2 RJSP4 RM@2 RIJPP4 | RK611/RKG6 RK@7 RP11C/RP@3 - RJs g3 TJU16 RF11/RS11 "DB11 Other ® general On a and configuration PDP-11 a tape rules Unibus, or a are: combination floppy disk maximum. e On a PDP11/70 system, con51dered max1mum e A disk if two not | disk subsystems is considered subsystem Unibus disk there are Massbus subsystem ‘should expander. one of o subsystem disks. be ‘installe'd | beyond S 1is a "bus |
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