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Document:	RK05 Exerciser Maintenance Manual
Order Number:	EK-RK05-MM
Revision:	002
Pages:	114
Original Filename:

OCR Text

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o X O n 5 x V) - 1 iser

EK-RK05-MM-002

RKOS-Exerciser

Maintenance Manual

digital equipment corporation - maynard. massachusetts

1st Edition, April 1974

Copyright © 1974 by Digital Equipment Corporaticn
The material in this manual is for informational
purposes and is subject to change without notice.

Digital Equipment Corporation assumes no respon-

sibility for any errors which may appear in this
manual.

Printed in U.S.A.

The following are trademarks of Digital Equipment

Corporation, Maynard, Massachusetts:
DEC

PDP

FLIP CHIP

FOCAL

DIGITAL

COMPUTER LAB

CONTENTS
Page

CHAPTER 1

GENERAL INFORMATION

1.1

INTRODUCTION

1.2

GENERAL DESCRIPTION

. . . . .

1.3

PHYSICAL DESCRIPTION

. . . . . .

1.3.1

Exerciser Chassis

1.3.2

Bus Terminator Module

133

Positioner Exerciser Module

134

Writer Exerciser Module

1.3.5

FrontPan:zl

1.3.6

Unibus Cable Assembly

1.3.7

Power Cable

. .

. . . . . .

SPECIFICATIONS

. .

. . . .. L

1.4

. .

Environmental

14.2

Power Requirements

143

Packaging

CHAPTER 2

1-1

e e e e e e e e e

1-1

e e e e e e e e e e e e e

1-1
1-1

. . . . . . . . . . .. ... .. e

1-1

. . . . . . . . . ...
e

1-1

e e

. . . . . . . . . . . . . . . ...
e

e e

1-1

1-3

e e

1-3

e e e e e e e e e e

1-3

. .. L

e e

e e e e e e

. . . . . . . . . . . . .. ..t

e
e

e e e e e e

1-3

UNPACKING, SET-UP AND ACCEPTANCE TESTING
UNPACKING PROCEDURE

SET-UPPROCEDURE

ACCEPTANCE TESTPROCEDURE

. . . . . . .

e e

2-1

e e e e e e e e

2-1

e et st e it e

2-3

. . . . . . . . ... .. .. .........

2-3

. . . . . . .

e e

. . . . . . . . . .

2.3.1

Writer Exerciser Module Test Procedure

2.3.2

Positioner Exerciser Module Test Procedure

e et e

s e

. . . . . . .. ... ... ... .....

2-6

e e e e

OPERATION

3.1

SCOPE

3.2

CONTROLS AND INDICATORS

3.3

MODES OF OPERATION

e e e e

e e

3-1

e e e e

e e

3-1

e e e e e e e e

e e

3-3

. . . L
e
e e e e

3-3

. . . . .

. . . . . .

StepMode

3.3.2

Alternate Mode

. . . . . L. L L

333

Oscillate Mode

. . . . . . . . . ..

334

Random Mode

. . . . . . . . . .

UTILIZATION PROCEDURE

CHAPTER 4

THEORY OF OPERATION

4.1

SCOPE

4.2

FUNCTIONAL DESCRIPTION

. . .

Writer EX2rciser

e e

e e e e e e

3.3.1

e
e

. . . . . . .

e e

. . . . . . . L

e e e e e e e e e e
e
e e

Sector Decoder

4.2.1.2

Write Control Logic

4.2.1.3

Write Clock

4.2.14

Clock and Data Output Multiplexer

4.2.1.5

Head Select Switch

e e e e e

. . . . . . . . . . . . . .
e

3-3

e e e e

4-1

e e e e s e

4-1

e e e

4-1

e e e e

4-1

. . . . . ... .. ... ... .......

4-1

e e e

. . . . . . . . . . . . . .

. . . . . . . .

e e e e e e e e e e e e e

. . . . . . . . ..

Positioner Exerciser

e e

e e e e e e e

. . . . . . .

. . . . . o

4.2.1.1

4.2.2

e e

s e e

e e e e e

e e e

2.1

4.2.1

e e

e e e e e

. . . . . . . . . . . . . .

2.2

CHAPTER 3

e e e e e e

. . . .

1.4.1

. .

e e

. . . . . . . . .

. .

e e e e e

. e

4-1

e e e

4-1

4-2

. . . . . . . . . ..

e e e e e e

4.2.2.1

Strcbe Oscillator

4.2.2.2

Adcress Counter Control Logic

. . . . . ... ... ... ... ........

4-2

4.2.2.3

AdcressCounter

4-2

4.2.2.4

Cylinder Address Source Select Logic

. . . . . .. ... ... .........

4-2

4.2.2.5

Fault Detect Logic

. . . . . . .

e e

e e e

. . . . . . . . . . . . . . .

e e e e e e e e
.

. ...

CONTENTS (Cont)
Page
4.3

DETAILED LOGICDESCRIPTION

4.3.1

Writer Exerciser

43.1.1

. . . . ... ... ... .. .. . ... .. .. ..

. . .. ... ... ...

. . . ... .. . ... .. ... .. .
. . ... .... ... .. ... . e
e e e e e
. . .. ...
... .

Sector Decoder and Write Sector Switch

4.3.1.2

Write Control Logic

43.1.3

Write Clock

43.14

Clock and Data Output Multiplexer

4.3.2

Positioner Exerciser

. . ... ... ..

... ... .. .

4-5

. . . ... ... .. .. ... . ... .. ... . ...
4-5
. . . . ... ... .. ... ... ... ... ... ..
4-5
Address Counter Control Logic
. . . . ... ... ... ... ... .. . . .
4-8
AddressCounter
. . . . ... ... .. ... . ... .. ... ...
4-10
Cylinder Address Source Select Logic
. . . . .. ... .. ... .. ... . . 4-10
Fault Detect Logic
. . .. ....
... ...
..
.. ..
..
... ...
. . 4-11
FLOWDIAGRAMDESCRIPTION
. ... ..... ... .. .. .. . ... .. ..
4-11

4.3.2.1

Strobe Oscillator

4.3.2.2
4323
4324
4.3.2.5
4.4

CHAPTER 5

MAINTENANCE

5.1

SCOPE

5.2

MAINTENANCEPHILOSOPHY

5.3
54

TEST EQUIPMENT REQUIRED
PREVENTIVEMAINTENANCE

5.5

CORRECTIVEMAINTENANCE

CHAPTER 6

RKO5 DISK DRIVE MAINTENANCE USING THE RK05 EXERCIS

6.1

SCOPE

6.2

ALIGNMENT, CHECKS, AND ADJUSTMENTS

6.2.1

. . . . . .
. . . ... ....... ... ... ... .. ... . . .
. . . ... ... ... ... ... . . ... ...
. . ... . ... ... ... ... .. . ... .. .
. . . ... ... ... ... ... . ... ... .. .

5-1
5-1

5-2

6-1

. . . . . ... .. . . .. ... .
.
. . . . . ... .. ... ... ... ... ...
...

6-1

. . . . . .. ... ... . .. ... . ..
.
2315 CE Test Cartridge Shim Installation
. . . ... . ... ... ... . . .

6-1

RKO5K-AC Alignment Cartridge

6.2.1.2

5-1
5-1

. . .. ..

Alignment Cartridges

6.2.1.1

6-1

6-2
. . . . . . ... .. . .. ... . . .
6-2
Dynamic Off-Line Checks and Adjustments
. . . . . ... . ... ... ....
64
Static Tests and Adjustments
. . . . . . .. ... ... ... . ... ... ..
6-9
Read/Write Data Separator (G180 Card) Adjustment
. . . .. . ... ........ 6-10
Read/Write Head Check and Alignment
. . . . . . .. ... .. .. .. ..
6-10
RKOSK-AC Alignment Cartridge . . ... ... ......
. .. ...
..
... 6-11
2315CEPack
. . . ... 6-14

6.2.2

Servo System Timing Checks and Adjustments

6.2.2.1
6.2.2.2
6.2.3
6.2.4
6.2.4.1

6.2.4.2
6.2.5

Index/Sector Timing Adjustment

6.2.5.1

. . . . . ..

. .. ... . .. .. ... ... . .. 6-16
.. ... .. ..... . .. ... . . 6-16
2315CEPack
. .. ... 6-18
Cartridge Receiver Alignment
. . . . .. ...
. ... . . .. ... ...
6-19

RKO5K-AC Alignment Cartridge

6.2.5.2
6.2.6

... ...

. . . . .

APPENDIX A

IC SCHEMATICS

A.l

7442 4-LINE-TO-10-LINEDECODERS
. . . . ... .. .. ... ... .. ...
7474 DUAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
. . .. .. ... . . ... .. .
74123 MONOSTABLE MULTIVIBRATOR
. . . . . . . ... ... ... .. .. . .
74193 SYNCHRONOUS 4-BIT UP/DOWN COUNTER (DUAL CLOCK WITH
CLEAR)
..

A2
A3
A4

APPENDIX B

ENGINEERING DRAWING SET

A-1

A-2
A-3
A4

ILLUSTRATIONS
Figure No.

Title
RKOS Exerciser Components

Page

. . . . . . . . . . .. . ... e

1-2

Bus TerminatorModule

. . . . . . . . . ... ... ..

1-2

1-3

Unibus Cable Assembly

. . . . . . . .. .. . ...

1-3

Power Cable

2-1

Exerciser to RKOS Disk Drive Connection Diagram

. . . . . . . . e
. . . . . . ... ... ... ......

14
2-2

2-2

RKOS5 Exerciser to Multiple RKO05 Disk Drives Connection Diagram

2-3

Write Gate Data Waveform

Writer Exerciser Clock and Data Waveforms

. . . . . .. .. ... . ... .........

2-5

Write Data Waveforms

. . . . . . . . .. .

2-7

2-6

HowtoReada Vernier

. . . . . . . ... . .. ... .. ... .

3-1

RKOS5 Exerciser Front Panel Controls and Indicators

. . . .. ... ... ..

2-3

. . . . . . .. . ... ... ... ...

3-1

. . . . ... ... ... ............

4-3

4-1

RKOS Exerciser Functional Block Diagram

4-2

Sector Decoder and Write Section Switch Diagram

4-3

Write Control Logic
Write Clock

. . . . . . .. ... ... .......

. . . . . . . . . . . ... .

4-5

. . . .

. L
e

4-5

Write Clock and Multiplexer Timing Diagram

4-6

Clock and Data Multiplexer Logic

4-7

Strobe Oscillatcr

4-6

. . . . ... ... .. ... ... . ... .. ......

4-7

Address Counter Logic

4-10

Cylinder Address Source Select Logic

4-11

Fault Detect Legic

4-12

Writer Exerciser Flow Diagram

4-13

Positioner Exerciser Step Mode Flow Diagram

4-14

Positioner Exerciser Alternate Mode Flow Diagram

4-15

Positioner Exerciser Oscillate Mode Flow Diagram

4-7

. . . . . . . . . . . . . . ... 4-10
. . . . . ... .. ... ... ... ... ...... 4-11

. . . . . . . . . . . ., 4-11
. . . . . . . ... ... ... .. .. ... ... ... ... 4-12

. . . . ... ... ... ........... 4-13
. . . . .. ... ... ... ...... 4-14

. . . . . . . ... ... ... ...... 4-15
Positioner Exerciser Random Mode Flow Diagram . . . . . . .. ... .. .. ....... 4-16
Troubleshooting Flow Diagram
. . . . . . .. ... . ... ... ... ..........
5-3

6-1a

Spindle Runout (Negligible Runout)

6-1b

Spindle Runout (Considerable Runout)

6-2

CE Test Cartridge Shim Installation

6-3

. . . . . ... ... ... ... . ... .. ...

4-9

5-1

4-6

. . . . . ... .. .. ... ... ......

. . . . . . . . L L

Address Counter Control Logic

4-16

2-8

. . . . . ... ... .........

. . .. .. ... ... .. ... ............

6-1

. ... ... ... ... ... ...........

6-2

. . . ... ... .. ... .. ... ... .......

6-3

Sine Amplitude/Offset and Velocity Offset Waveform

. . . . . ... . ... ... .....

6-5

6-6

6-7

. . .. ... .. ... ... .. ............
Velocity Amplitude Waveform . . . . .. ... ... ... .. ... .. ...
Acceleration Waveform
. . . . . .. .. L
Full Stroke Waveform
. . . . . .. . ... .. ... ...

6-8

Full Stroke Posstion Waveform

6-9

6-8

Outer Limit Waveform

6-10

RKO05-AC Alignment Cartridge Head Alignment Waveforms

Cosine Amplitude/Offset Waveform
6-5
6-6

. . . . ... ... ... ... .. ... ... .. ... ...
. . . . . . . . ... ... ... ..,

6-11

Read/Write Head Adjustments

6-12

2315 CE Pack Head Alignment Waveforms

6-13

Index/Sector Waveform

6-7

6-9

. . . . ... ... ....... 6-13

. . . . .. ... ... .. ... ... .. ... .. ..... 6-15
. . . .. ... .. ... . ........... 6-17
. . . . . . . . .. ... 6-19

6-14

Cartridge to Receiver Clearance

6-15

Cartidge Receiver Clearances

. . . . . . . . . . . . . . . . . .. ... ... ... 6-20

A-3

. . . . . . . .. . ... .. . . ... ... ... 6-20
7442 Package and Logic Diagrams
. . . .. .. ... .. .. e e e e e e e e e e e A-1
DEC 74123 IC Mlustrations
. . . . . . . . . . o i it it e
e e
A-3
DEC 74123 IC Qutput Pulse Width vs. External Timing Capacitance
... ... ... ... A-3

74193 Logic Diagram

A-l

A-2

. . . . . . . . . ..

e e

A-S

Table No.
3-1

3-2

3-3
5-1
5-2

6-1

6-2

Title
Exerciser Controls and Indicators

. . . . ... ... ... ... .. . ... .. ... . . .
. . . .. ... . ... . .. ... .. ... . ... .. ...
Data Bits Switch to Data Bit Correlation . . . . ... .. . ... .. ... ...
. .. .
Test Equipment Required
. . . . . ... ... ... . ... ... ... .. ...
Preventive Maintenance Schedule
. . . ... ... ... ... ... . ... .. .. .. ..
ServoSystem Checks . . . . .. ... .. ... ... ...
Servo System Adjustments . . . ... ...
L. L L

Exerciser Operating Procedure

Page
3-2

3-8
5-1
5-2

6-2

RKO0S5 EXERCISER MAINTENANCE MANUAL

RKO5-TA
RKOS5 - Exerciser

CHAPTER 1
GENERAL INFORMATION

1.1

INTRODUCTION

1.3.2

This manual provides a complete description of the RK0S
Exerciser, including physical, functional, logic level, and
flow diagram descriptions, specificatiors, and operation and

block and contains all the circuitry necessary to terminate

maintenance procedures.

1.2

the Unibus.

GENERAL DESCRIPTION

1.3.3

The RKOS Exerciser is a portable unit used to cxercise the
signals necessary to exercise the disk drive linear positioner

and

write

circuitry;

the

processor

and

Positioner Exerciser Module

The G503 Positioner Exerciser Module (Figure 1-1) is a
dual height module that is mounted in slot 3 of the

RKOS5 Disk Drive off-line. The unit generates all the control

circuitry

Bus Terminator Module

The M930 Bus Terminator module (Figure 1-2) is a dual
height module that is mounted in slot 2 of the connector

drive

controller are not needed.

connector

block.

necessary

This

exercise

module

contains

the

drive

disk

all

linear

the

logic

positioner

circuitry. In response to front panel switch setting and disk

drive control signal inputs, the module generates control

The exerciser can be used to isolate :nost hard disk drive

signal and cylinder address outputs to the disk drive linear

faults and to verify proper operation once the fault has

positioner circuitry. The module also monitors the disk

been corrected.

drive fault lines and illuminates the front panel fault
indicators when a fault is detected. Refer to engineering

NOTE

drawing D-CS-G503-0-1 for a complete physical layout and

If reliability problems are encountered, the disk

parts identification.

drive should be checked out on-line, using
MAINDEC diagnostics.

1.3.4
The exerciser is completely contained in an aluminum
chassis and is powered by the RKOS5 Disk Drive power

height module that is mounted in slot 4 of the connector

block. This module contains all the logic necessary to
exercise the disk drive write circuitry. In response to front

supply. A special 4-wire power cable serves to route the

power

supply

outputs

(+15V,

-15V,

+5V)

the

panel switch settings and disk drive control signal inputs,

exerciser without interrupting power to the disk drive.

the
1.3

Writer Exerciser Module

The G502 Writer Exerciser Module (Figure 1-1) is a dual

module generates control signals, clock, and data

outputs to the disk drive write circuitry. Refer to engi-

PHYSICAL DESCRIPTION

The exerciser (Figure 1-1) consists of five subassemblies and

neering drawing D-CS-G502-0-1 for a complete physical

two cable assemblies: exerciser chassis, front panel, bus

layout and parts identification.

terminator

module,

test

positioner module, test writer

module, bus cable assembly, and power cable.

1.3.5

1.3.1

The 9605719 front panel (Figure 1-1) contains a 4-pin
female Mate-N-Lok input power connector and controls

Exerciser Chassis

The 9605720 chassis is a 6-1/10 in. high by 11-9/10 in.

Front Panel

and indicators necessary to exercise the disk drive. Refer to

wide by 3-6/10 in. deep metal box with a hinged front

engineering

panel.

parts identification, and a complete physical layout.

1-1

drawing

D-UA-RKO05-TA-0

for

wiring data,

FRONT PANEL

CONNECTOR BLOCK

CHASSIS

(9605719)

(1205348)

(96045720)

WRITER

EXERCISER
MODULE

BUS TERMINATOR

MODULE (M930)
POSITIONER
EXERCISER

NOTE:

MODULE

UNIBUS AND POWER

(G503)

CABLE NOT SHOWN

68911

RKOS Exerciser Components

Figure 1-1

Figure 1-2

Bus Terminator Module

1-2

68918

Figure 1-3

1.3.6

Unibus Cable Assembly

1.4

SPECIFICATIONS

1.4.1

Environmental

The BC11A Unibus Cable Assembly (Figure 1-3) consists of
a

120-conductor

ribbon

cable

with

bus

connector

attached to each end. One bus connector is mounted in slot

1 of the exerciser connector block and the other connector

Ambient Temperature

50° to 110° F (67° to 73° F nominal)

is mounted in slot 8 of the disk drive electronic module.
The Unibus cable is the only signal interface between the

exerciser

and

disk drive. Refer to engineering drawing

Relative Humidity

8 to 80% (no condensation)

D-UA-BC11A-0-0 for physical specifications.

1.3.7

1.4.2

Power Cable

The 9606036 power cable (Figure 14) consists of a 6-ft
4-wire cable harness, a 4-pin male Mate-N-Lok connector

(P1), a 9-pin male Mate-N-Lok connector (P2), and a 9-pin
female Mate-N-Lok connector (J1). The 4-pin Mate-N-Lok
connects to connector J1

Power Requirements

Input Voltage (dc)
+15 £0.75 Vdc

15+ 0.75 Vdc
+5+0.15 Vdc

located o1 the exerciser front

panel. The two 9-pin Mate-N-Loks connect between the

1.4.3

Packaging

disk drive power supply and the disk drive power harness.

Height: 6-1/10 in.

The power cable routes dc power from the disk drive to the

Width: 11-9/10 in.

gi’ij:f Zav‘v?sior <lhsk

exerciser. Refer to engineering drawing D-IA-9606036-0-0

Depth: 3-6/10 in.

for complete physical specifications and wiring data.

Weight: Less than 10 1b

pPpPly-

P1,4 PIN

J1, 9 SOCKET

P2,9 PIN

MATE-N-LOK

CONNECTOR

(CONNECT TO J1

(CONNECT TO P1

ON EXERCISER

ON DISK DRIVE

FRONT PANEL)

POWER HARNESS)

(CONNECTS TO
J1 ON DISK
DRIVE POWER

SUPPLY)
6891-2

Figure 1-4

Power Cable

CHAPTER 2

UNPACKING, SET-UP
AND ACCEPTANCE TESTING
2.1

UNPACKING PROCEDURE

To connect the RKO5 Exerciser to four RK05

To unpack the RKOS Exerciser, proceed as follows:

Disk Drives, the Unibus cable is installed as

follows (Figure 2-2):
1.

Unpack the unit from the shipping container

and inspect for damage. Damage claims should

Remove all power from the RKOS Disk
Drives.

be directed to the responsible shippers.

Check that the Unibus and power cables are

Disconnect

the

controller end of the

Unibus cable, which connects the RK05

included with the exerciser.

Disk Drive to the controller module.
2.2

SET-UP PROCEDURE
c.

Open the exerciser chassis and mount the

disconnected Unibus cable into slot 1 of

NOTE

The RKOS Exerciser may be coanected to one

the connector block.

disk drive or as many as four disk drives
simultaneously; however, the exerciser can only

To install the RKOS Exerciser power cable,

exercise one drive at a time.

proceed as follows (Figure 2-1):

Remove the RKOS Disk Drive top cover.

Disconnect the P1 Mate-N-Lok connector

To connect the RKOS Exerciser to one RK05
Disk Drive, the Unibus cable is installed as

follows (Figure 2-1):

on the disk drive power supply.
a.

Unplug the disk drive ac power cord.

of the exerciser power cable to P1.

Open the exerciser chassis and mount
either end of the Unibus cable assembly

(BC11A) into slot 1 of the connector

Connect the 9-pin female connector (J1)

Connect the 9-pin male connector (P2) of
the exerciser power cable to Mate-N-Lok

block.

connector J1

Remove

the

disk

drive

prefilter

on the disk drive power

supply.

and

ensure that the bus terminator module is

mounted

slot

of the

disk drive

Connect the 4-pin male connector (P1) of

electronic module.

the exerciser power cable to the 4-pin

Mount the other end of the Unibus cable

exerciser front panel.

female

connector (J1) located on the

assembly into slot 8 of the disk drive
electronic module.

(continued on page 2-3)

m Su
ELECTRONIC

MODULE

RKOS
EXERCISER —-—-—'—‘. S

cp-o8M

Figure 2 -1

Exerciser to RKOS Disk Drive Connection Diagram

2-2

Set

RKOS5#4

the

Selector

exerciser

front

knob

the

panel

Drive

ID (disk

drive

identification number) of the disk drive
:B

RKOS#3

RKOS#2

to be exercised.

UNIBUS CABLES

2.3

ACCEPTANCE TEST PROCEDURE

The exerciser is shipped ready-to-use. If the unit is not
operating properly, refer to Chapter 5 (Maintenance) and
EXERCISER

[

diagnose

and

correct

the

problem.

Service

should be

performed by qualified service personnel only.

PDP
- 11

To test the exerciser, obtain an RKOQ5 Disk Drive that is

known to be operating properly, and set the exerciser up
cP-0810

for

testing

accordance

with

the

set-up

procedure

described in Paragraph 2.2. After completing the set-up
procedure, perform the following test procedures.

Figure 2-2

RKOS Exerciser to Multiple RKOS5 Disk Drives

Connection Diagram

NOTE
If faulty operation is detected at any point in

Set

the

exerciser

Constant

toggle

front

switch

panel
to

the following procedure, refer to Chapter 5 and

Write

the

correct the fault before proceeding to the next

down

step in the procedure.

position.

2.3.1
CAUTION

Writer Exerciser Module Test Procedure
1.

Set the Write Sector knob to “ALL.”

Set the Head Select-UPPER/LOWER toggle

The disk drive write circuitry must
not be exercised while an alignment

disk cartridge is installed in the disk
drive

serious

damage

switch to UPPER.

the

alignment tracks may result. The

Depress

alignment

observe the disk drive front panel WT indicator

red access door

illuminates momentarily each time the WRITE

identified

disk

cartridge

the

WRITE

pushbutton

repeatedly;

and/or a red label.

pushbutton is depressed.

Apply power to the disk drive(s); observe

observe the disk drive front panel WT indicator

the disk drive blower motor comes on
immediately. After a short delay, the

illuminates and does not extinguish until the

door

position.

Set the Constant Write toggle switch to ON;
g.

lock

solenoid energizes and the

Constant Write toggle switch is set to the down

exerciser front panel POWER ON indicator illuminates.

NOTE

An oscilloscope (Tektronix 453 or equiv-

Set the disk drive RUN/LOAD switch to

alent) is required to perform the follow-

LOAD and insert the DECpack.

ing steps.

Set

the

RUN/LOAD

switch

observe the DECpack rotates.

RUN;

Connect channel 1 scope probe to pin BO8M?2
on the RKOS Disk Drive logic block.

Toggle the exerciser Head Select toggle switch
up

and

12.

down; observe a HIGH level signal

(+3 V) when the toggle switch is set to LOWER

Set Write: Sector knob to positions 1 through 9;
observe the index pulse moves in discrete steps.

and a LOW level signal when the toggle switch

NOTE

is set to UPPER.

The index pulse is not visible on the
photograph shown in Figure 2-3 due to

Set the oscilloscope controls as follows:
o

Vertical

13.

Mode

photographic resolution limitations.

ADD

Sensitivity

1 V/div

Coupling

= dc

A sweep time =

5 ms/div

Trigger

Normal

the

=
channel

probe

14.

Mode

Sersitivity

1 V/div

Coupling

Ch1l

Swzep

BOSL2

(WRITE GATE L) on the RKOS5 Disk Drive
logic block.

A sweep time

0.2 us/div

Triyger

Normal

Set all exerciser Data Bit toggle switches to the
0 position.

Connect the channel 2 probe to AOQ2R2
(INDEX PULSE) on the RKO5 Disk Drive logic

15.

block.

Connect channel 1 scope probe to AOSF2 on
RKOS D:sk Drive logic block and uncalibrate
the

Set exerciser Constant Write toggle switch to

scope

horizontal sweep to display four

negative-going pulses as shown in Figure 2-4a.

ON.
16.

11.

Ve -tical

Sweep

Connect

10.

Set the oscilloscope controls as follows:

Set the Write Sector knob to 0; observe the

Set all four Data Bit toggle switches to the 1
position; observe eight negative-going pulses as

display shown in Figure 2-3.

shown in Figure 24b.

INDEX PULSE APFEARS HERE

Figure 2-3

Write Gate Data Waveform

Figuwe 2-4

Clock Waveform

Clock and Data Waveform

Writer Exerciser Clock and Data Waveforms

2-5

17.

Toggle each of the Data Bit toggle switche
s;
observe that each switch controls one of
the

2.3.2

negative-going pulses.

18.

Set the oscilloscope controls as follows:
°

Set the Function knob to STEP.

Set the FWD/REYV switch to FWD.

Vertical

Set

Mode

Positioner Exerciser Module Test Procedure

= CH1

Sensitivity

= 0.5 V/div

Coupling

= dc

Sweep

19.

toggle

switch

the

down

(inward) cylinder addresses.

normal

Set

FWD/REV toggle switch to REV:
the linear positioner moves to ever
decreasing (outward) cylinder addresses.

(ABO1 in RKOS5 Disk Drive).
20.

Set exerciser RUN switch to the down position.

21.

Set

the

observe

Connect scope probe to TP3 on card G180

exerciser

RTZ

Set the RUN switch to the up position; observe
the linear positioner moves to ever increasing

A sweep time = 0.5 us/div
trigger

the

position.

Set all Cylinder Address toggle switches to 0.
Set the Function knob to ALT; observe the
linear positioner moves back and forth between

Constant Write and DC Erase

toggle switches to the down positions.

cylinde- address O and ever decreasing cylinder

addresses.

22.

Set exerciser Write Sector knob to ALL.

23.

Set

exerciser

Head

Select

toggle

UPPER.

Set the FWD/REV switch to FWD; observe the
linear positioner moves back and forth between

switch to

cylinder address O and ever increasing cylinder
address.

24.

Depress exerciser WRITE pushbutton; observe

data appears on display as shown in Figure
2-5a.

25.

Set

Set exerciser Head Select toggle switch to
LOWER and depress the WRITE pushbutton;

10.

observe data appears as shown in Figure 2-5a.

26.

11.

RUN

toggle

switch

the

down

Cylinder . Address

toggle

Set the Function knob to OSC.
Set

the

following

switches to the 1 position:

Set the exerciser Head Select toggle switch to

(cylinder address 202).

UPPER.

12.
27.

the

position.

Set the exerciser DC Erase toggle switch to ON

128, 64, 8, and 2

Momentarily set the RUN toggle switch to the
up position; observe the linear positioner moves

and depress the WRITE pushbutton; observe
data is erased completely as shown on Figure

to cylinder address 202.

2-5b.
NOTE

28.

Refer to Figure 2-6 for instructions on

Set the exerciser Head Select toggle switch to

reading the vernier.

LOWER; observe data is still present as shown
on Figure 2-5a.

29.

Depress

the

exerciser

WRITE

13.
pushbutton;

observe data is erased completely as shown on

Figure 2-5b.
30.

Set Cylinder Address toggle switch 1, 4, 16, or

32 to th: 1 position.
14.

Set the RUN toggle switch to the up position;
observe

the exerciser ADDR
invalid) ndicator illuminates.

Repeat steps 23 through 29 for sectors 0—9.

INV (address

Write Data Waveform

Erase Data Waveform

Figure 2-5

Write Data Waveforms

15.

Set

the

RUN

toggle

switch

the

down

18.

Set the RUN toggle switch to the up position

position and set all Cylinder Address toggle

and set the Function knob to RAND); observe

switches to O.

the linear positioner moves to random cylinder

addresses.
19.
16.

Put the RKOS Disk Drive servo amp switch

Set Cylinder Address toggle switch 128 to 1

(located to the left of the positioner assembly)

and momentarily set the RUN toggle switch to

to the down position; observe the exerciser

the up position; observe the linear positioner

SEEK INC (Seek Incomplete) indicator illumi-

moves to cylinder address 128.

nates. Return the servo amp switch to the up
position.

20.
17.

Repeat

steps

and

Set the RTZ toggle switch to the up position;

16 using each of the

observe the linear positioner moves to cylinder

remaining Cylinder Address toggle switches.

address () and stops.

/'REGULAR SCALE

L
Chr
o)

200

Lo
T

100

by g

gyl

1
2

‘

\ PERFECTLY ALIGNED
VERNIER SCALE

TO READ A VERNIER, proceed
As follows:
a.

Determine the whole number value of the nearest regular scale marking to the right of Vernier scale triangle ().

Add that value to the value of the vernier scale marking that aligns perfectly with a regular scale marking.

In the illustration shown above the vernier reading is:

Regular Scale Marking

200

Vernier Marking

Vernier Reading

202
cP-0808

Figure 2-6

How to Read a Vernier

2-8

CHAPTER 3
OPERATION

3.1

controls and indicators. The writer exerciser controls
directly control the writer exerciser logic and enable
manual selection of the upper or lower disk drive read/write
head. The positioner exerciser controls and indicators
directly control the positioner exerciser logic and monitor

SCOPE

This chapter covers complete operation of the exerciser and
includes a description of front panel controls and indicators
and modes of operation and a utilization procedure.

indicators can be functionally separated into two cate-

disk drive fault lines and +15 V input power. The front
panel drive selector knob selects the ID of the disk drive to
be exercised. Figure 3-1 shows the exerciser front panel,
and Table 3-1 provides a complete description of each

gories: writer exerciser controls and positioner exerciser

control and indicator.

3.2

CONTROLS AND INDICATORS

The RKO5 Exerciser front panel (Figure 3-1) controls and

6891-4

Figure 3-1

RKOS Exerciser Front Panel Controls and Indicators

3-1

Table 3-1

Exerciser Controls and Indicators

Item

Description

Function

POWER ON indicator

Muminates when +15 V input power is present.

Constant Write-ON toggle switch

Enables the writer exerciser logic to perform
repeated write operations on the selected sector.

DC Erase-ON toggle switch

Places a constant HIGH on the writer exerciser
logic clock and data output line, thus erasing the
selected sector.

4-Pin Connector

Input power connector, connects to RKOS Disk
Driver power sunply via the power cable.

Data Bits toggle switches

Enable manual selection of data bits output to the
disk drive by the writer exerciser logic.

Head Select-UPPER/LOWER

Selects read/wrize head at the selected RKOS Disk

toggle switch

Drive.

WRITE pushbutton

Enables the writer exerciser logic to perform a
write operation on sectors 0—9 or all

single

sectors

Write Sector Knob

Selects sectors 0-9 or all sectors for writing by the
writer exerciser logic.

Drive Sector Knob

Selects ID of disk drive to be exercised (switch
output goes directly to disk drive).

Function Knob

Selects one of four position exerciser modes of
operation:

Step

Alternate

Oscillate

Random

(See Paragraph 3.3 for a complete description of
modes of operation.)
11

RUN toggle switch

Enables

the

positioner

exerciser

to perform a

position operation each time the disk drive enters

the ready state, i.e., R/W/S READY L asserts.

3-2

Table 3-1 (Cont)
Exerciser Controls and Indicators

Item

Description

Function

RTZ toggle switch

Clears the

address

counter

extinguishes

the

ADDR

INV

count

of O,

indicator

illuminated and asserts the RESTORE L output to
disk

drive.

RESTORE

initiates

restore

operation in the disk drive.

FWD/REV toggle switch

Enables the address counter to count up (FWD) or

count down (REV).
14

ADDR INV indicator

Illuminates when the BUS ADDRESS INVALID L
input line asserts. The disk drive asserts the BUS

ADDRESS INVALID L line when the cylinder
address is considered to be greater than 202.
15

SEEK INC indicator

Illuminates when the BUS SEEK INCOMPLETE
input line asserts. The disk drive asserts BUS SEEK

INCOMPLETE when the seek operation is not
completed.

3.3

Cylinder Addrzss - 1, 2,4, 8, 16,

Enables manual selection of cylinder address for

32, 64, 128 toggle switches

use in the alternate and oscillate modes.

3.3.2

MODES OF OPERATION

Alternate Mode

The positioner exerciser logic operates in four different

In the alternate mode of operation, the positioner exerciser

modes selectable via the Function knob.

alternately

selects

the

front

panel

Cylinder

Address

switches and internal address counter as the source of the

3.3.1
In

cylinder address. The Cylinder Address switches are con-

Step Mode

the

step

mode

operation

coasecutive

cylinder

addresses are provided to the disk drive. An address counter
internal to the positioner exerciser logic is the source of the
consecutive addresses. If the FWD/REV switch is set to

FWD,

the

address counter starts at

whatever count it

contained when the step mode was selected and increments

by one after each cylinder seek operation is completed.
When cylinder address 202 is reached, the address counter
is cleared to a count of 0 and continues to increment by 1.

If the FWD/REYV switch is set to REV, -he address counter
decrements by 1 after each cylinder seek. operation; when a
count of minus 1 is reached, the addres; counter is loaded

to a count of 202 and the process continuaes.

trolled manually by the operator and are normally set to
address 0. However, these switches may be set to any
address

the

operator’s discretion. If the FWD/REV

switch is set to FWD, the internal address counter will
increment by 1 each time the address counter is selected as
the source of the cylinder address, i.e., on alternate cylinder

seek operations. When the counter reaches a count of 202,
it is cleared to 0 and the process continues.

3.3.3

Oscillate Mode

The oscillate mode is similar to the alternate mode in that
the positioner exerciser logic alternately selects the cylinder
address switches and the internal address counter as the

source

of the cylinder address. In the oscillate mode,

however, the internal address counter is held to a count of

Thus,

the

step mode

the

positioner

exerciser will

0. Hence the cylinder seek operations oscillate back and

generate all 203 cylinder addresses (0—202) consecutively

forth between the contents of the manually controlled

and gate them out to the disk drive.

cylinder address switches and 0.

3.3.4

Random Mode

In the random mode, pseudo random cylinder addresses
provided by the internal address counter are gated out to

is less than the previous operation until a count of minus 1
is reached. At a count of minus 1, the counter is loaded to a
count of 202 and the process continues.

the address counter until a strobe occurs. When the strobe

3.4 UTILIZATION PROCEDURE
To exercise the RKOS Disk Drive, set up the exerciser and

the disk drive. An internal clock referred to as the fast
clock is enabled in this mode which increments/decrements

occurs the fast clock is shut off, the contents of the address
counter

used

perform a

seek operation, and

disk drive per Paragraph 2.2 and perform the following

the

operating procedures (Table 3-2).

counter is incremented/decremented by 1. The fast clock is

then enabled again and the process is repeated. If the

CAUTION

FWD/REV switch is set to FWD, the cylinder address of

DO NOT attempt to exercise the disk drive

each successive cylinder seek operation is greater than that

write circuitry with an alignment disk cartridge

At a count of 202, the counter is cleared and the process

installed in the disk drive as serious damage to
the alignment tracks may result. The alignment

of the previous operation until a count of 202 is reached.

continues.

If the FWD/REV switch is set to REV, the
cylinder address of each successive cylinder seek operation

disk cartridge is identified by a red access door

and/or a red label.

Table 3-2
Exerciser Operating Procedure

Procedure
1.

Indication

To position the read/write heads to a particular cylinder:

Set the RTZ and RUN toggle switches to the down
position.

b.
c.

Set the Function knob to OSC.
Set the Cylinder Address toggle switches to the

desired cylinder address (0—202).
d.

Quickly toggle the RUN toggle switch to RUN and
off; repeat until positioner stops at the selected
cylinder.
position

Observ: the linear positioner moves to
the selected cylinder and stops.

the read/write heads to ever increasing

cylinder addresses:
a.

Set the FWD/REYV toggle switch to FWD.

Set the Function knob to STEP.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves to
ever increasing cylinder addresses.

Table 3-2 (Cont)

Exerciser Operating Procedure
Procedure

Indication

To position the read/write heads to ever decreasing
cylinder addresses:
a.

Set the function knob to STEP.

Set the FWD/REV toggle switch to REV.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves to
ever decreasing cylinder address.

To alternately position the read/write heads to a selected
cylinder address and ever increasing cylinder addresses:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function knob to ALT.

Set the Cylinder Address toggle switches to the

desired cylinder add-esses (0- 202).
d.

Set the FWD/REV switch to FWD.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves back
and forth between the selected cylinder

address

and

ever

increasing

cylinder

addresses. When the increasing cylinder
addresses reach 202, the positioner moves
directly to cylinder address O and the
process continues.

To alternately position the read/write heads to a selected
cylinder address and ever decreasing cylinder addresses:
a.

Perform steps 4a through 4c.

Set the FWD/REYV switch to REV.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves back
and forth between the selected cylinder

address

and

ever

decreasing

cylinder

addresses. When the decreasing cylinder

addresses reach 0, the positioner moves

directly to cylinder address 202 and the
process continues.

Table 3-2 (Cont)
Exerciser Operating Procedure

Procedure

)

Indication

To oscillate the read/write heads back and forth between
a selected cylinder address and cylinder address O:
a.

Set the RTZ and RUN toggle switches to the down
position.

b.
c.

Set the Function knob to OSC.
Set the Cylinder Address toggle switches to the

desired cylinder address (0—202).
d.

Set the RUN toggle switch to RUN.

Observe

the linear positioner oscillates

back and forth between cylinder address
0 and the selected cylinder address.

NOTE

If the Cylinder Address switches are set
to address 0, the linear positioner will not
move.

To randomly position the read/write heads to many
different cylinder addresses:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function switch to RAND.

Set the RUN toggle switch to RUN.

Observe

the

linear

positioner

moves

randomly.

To move the read/write heads to cylinder address 0, set
the RTZ switch to RTZ.

Observe the linear positioner moves to
cylinder address O and stops.

3-6

Table 3-2 (Cont)

Exerciser Operating Procedure
Procedure

continuously

write

all

Indication

sectors

particular

cylinder:
a.

Set all toggle switches to the down position.

Set the Function knob to OSC.

Position the Cylinder Address toggle switches to

the desired cylinder address (0—202).
d.

Quickly toggle the RUN toggle switch to RUN and

Observe the linear position moves to the

off. Repeat until positioner stops at the selected

selected cylinder and stops.

cylinder.
e.

Set the Head Sel:ct —

UPPER/LOWER toggle

switch to the desired position.

Set the Data Bits toggle switch to the desired data

configuration (Table 3-3).

10.

11.

Set the Write Sector knob to ALL.

Set the Constant Write toggle switch to ON.

To write all sectors on ¢ particular cylinder only once:
a.

Perform steps 9a through 9g.

Depress the WRITE pushbutton.

To write a particular s:ctor on a particular cylinder
continuously:

12.

Perform steps 9a through 9f.

Set the Write Sector knob to the desired sector.

Set the Constant Write toggle switch to ON.

To write a particular sector on a particular cylinder only
once:

Perform steps 9a tl rough 9g

Set the Write Sectcr knob to the desired sector.

Depress the WRITE pushbutton.

3-7

Table 3-2 (Cont)
Exerciser Operating Procedure
Procedure

13.

14.

Indication

To erase all sectors on a particular cylinder:
a.

Perform steps 9a through 9e.

Set the Write Sector knob to ALL.

Set the DC Erase toggle switch to ON.

Depress the WRITE pushbutton.

To erase a particular sector on a particular cylinder:
a.

Perform steps 9a through 9e.

Set the Write Sector knob to the desired sector.
Set the DC Erase toggle switch to ON.
Depress the WRITE pushbutton.

Table 3-3
Data Bits Switch to Data Bit Cotrelation

Data Bits Switch

Data Bit Selected

0,4,8, 12%

1,5,9,13%*

2,6,10, 14%

3,7,11, 15%

*Bits 12, 13, 14, 15 are written only on 12 sector disk
packs.

3-8

CHAPTER 4
THEORY OF OPERATION

4.1

SCOPE

If the Constant Write toggle switch is set to ON, the WRITE

This chapter provides a detailed description of the RKO05

ENABLE line is constantly asserted thereby enabling the

Exerciser. The description is provided in three parts: a

write clock to run continuously. The BUS WRITE GATE

functional description, a detailed logic description, and a

line then asserts whenever the WRITE GATE ENABLE line

flow diagram description.

asserts. Thus, in the constant write mode, the BUS INDEX

signal has no effect and the selected sector is written each
4.2

time it passes under the read/write head.

FUNCTIONAL DESCRIPTION

Functionally, the exerciser circuitry can be separated into
two logic sections: the writer exerciser and the positioner
exerciser.

The writer exerciser monitors the disk drive

sector counter and BUS INDEX lines and generates control

and data signals to exercise the disk drive write circuitry.
The positioner exerciser monitors the disk drive R/W/S

READY (Read/Write/Seek Ready) line and fault lines and
generates control signals and cylinder addresses to exercise

the disk drive linear positioner circuity.

4.2.1

If the Constant Write toggle switch is set to off (down) and
the WRITE pushbutton is depressed, the first BUS INDEX
pulse causes the WRITE ENABLE line to assert. The BUS
WRITE GATE line will then follow the state of the WRITE

GATE ENABLE line. After one revolution of the disk

another BUS INDEX pulse occurs and clears the WRITE
ENABLE and BUS WRITE GATE lines. Thus, the write

clock is enabled for one revolution of the disk only and the
selected sector is written only once.

4.2.1.3

Writer Exerciser

Write

Clock — When

enabled,

the

write

clock

As illustrated in Figure 4-1, the write exerciser is separated

generates the clock pulses and control signals necessary to

into four functional logic blocks: the sector decoder, the

gate the clock pulses and data bits through the multiplexer.

write control logic, the write clock, iand the clock and data

4.2.1.4

output multiplexer.

Clock and Data Output Multiplexer — The clock

and data multiplexer converts parallel data bit inputs from

front panel Data Bits toggle switches into a serial data
Sector Decoder — The sector decoder decodes the

output and frames each data bit with clock pulses. Setting

sector counter inputs from the disk drive and asserts one of

the front panel DC Erase toggle switch to ON causes a

4.2.1.1

ten sector select lines (0—9) to the front panel Write Sector

constant HIGH to be output on the BUS WRITE DATA

switch.

AND CLOCK line thereby erasing the selected sector.

The

disk

drive

continually

updates

the sector

counter inputs to indicate the sector currently passing

under the read/write heads. When the sector select line

4.2.1.5

asserted corresponds to the position of the Write Sector

panel Head Select switch selects either the upper or lower

switch, the WRITE GATE ENABLE line asserts.

read/write head in the disk drive.
4.2.2

4.2.1.2
monitors

Write Control Logic — The Write Control logic
the

front

panel

Constant

Write

and WRITE

Head Select Switch — The output from the front

Positioner Exerciser

As illustrated in Figure 4-1, the positioner exerciser is
separated

into

five

functional

logic blocks: the strobe

switches and the disk drive BUS INDEX signal and enables

oscillator, the address counter control logic, the address

or disables the write clock and the disk drive write circuitry

counter, the cylinder address source select logic, and the

accordingly.

fault detect logic.

4.2.2.1 Strobe Oscillator — The strobe oscillator monitors
the front panel RUN switch and the R/W/S READY
line

Cylinder Address switches and the address counter. Note
that the Cylinder Address switches provide a fixed address

from the disk drive and, when enabled, generates strobes to

while the address counter provides an ever increasing or
decreasing address.

the address counter control logic, the cylinder address
source select logic, and the disk drive. If the RUN switch
is

set to the down position, the strobe oscillator is disabled.

4.2.2.2.3 Oscillate Mode — In this mode, like the alternate
mode, the ADDR CNTR SEL line asserts on alternate
strobes. However, in the oscillate mode, the OSC line

Setting the switch to the up position conditions the strobe

oscillator such that any assertion of the R/W/S READY
input activates the oscillator.

4.2.2.2

Address

Counter

asserts causing the zddress counter control logic to assert

Control

Logic — The

the CLEAR line which clears the address counter to O and

holds it there. Thus, in the oscillate mode, the disk drive

address

counter control logic, monitors the front panel Function

linear positioner performs seek operations alternately to the

and FWD/REYV switches, and controls the operation of the

cylinder address contained in the front panel Cylinder
Address switches, which may be set to any address from 0

address counter accordingly. The Function switch selects

one of four operating modes and the FWD/REV switch

determines whether

to 202, and the address counter, which is held to address 0.

the

address counter will be incremented or decremented. Note that setting the RTZ switch
to the up position overrides all other inputs to the address

4.2.2.2.4

Random Mode — In this mode, the STEP and
RANDOM lines assert. The assertion of STEP causes ADDR

counter control logic by clearing and holding the address
counter to a count of O and asserting the BUS RESTORE

CNTR SEL to asser:, therefore, as in the step mode, each
occurrence

line to the disk drive. The following paragraphs describe the
operation of the address counter control logic in each of

and the address counter to be incremented or decremented

the four modes.

4.2.2.2.1

1. The random mode differs from the step mode,
however, in that the assertion of the RANDOM line enables
a fast clock internal to the address counter control logic.

Step Mode — In this mode the STEP input to the

The

Cylinder Address source select logic asserts and causes
ADDR CNTR SEL to assert. When the strobe oscillator

source select logic and asserts the NEQ 1 DETECT and 202

control logic enable the counter to be incremented by 1
from 0 to 202, decremented by 1 from 202 to 0, cleared to
a count of 0 and loadzd to a count of 202.

strobe causes the COUNT DOWN line to assert decrementing the counter by 1 and upon reaching a count of

4.2.2.4

Cylinder Address Source Select Logic — The
cylinder address source select logic monitors the front panel

minus 1, the counter is loaded to a count of 202. Thus, in

the step mode, the disk drive performs seek operation to

Function switch and selects either the front panel Cylinder
Address switches or the address counter as the source of the

ever increasing or decreasing consecutive cylinder addresses.

cylinder address accordingly. If the Function switch is set
to ALT or OSC, the STEP input is cleared and the strobe

ADDR

CNTR SEL line asserts only on alternate strobes, causing

input alternately selects the address counter input and

the ADDR CNTR BITS (0—7) to be gated out to the disk

Cylinder Address switch input as the cylinder addresses
source. If the Function switch is set to STEP or RAND,

drive and enabling the address counter to be incremented or

decremented by 1. Thus, in the alternate mode, the disk

however, the STEP input asserts and the address counter

drive linear positioner performs seek operations alternately
the

cylinder

address

contained

the

front

address

DETECT lines whenever those counts are reached. The
inputs to the address counter from the address counter

a count of 202. At a count of 202, the 202 DETECT line
asserts, the counter is cleared to a count of 0, and the
process continues. If the FWD/REV switch is set to REV, a

the

Address Counter — The address counter outputs
the ADDR CNTR BITS (0-7) to the cylinder address

CNTR BITS (0—7) are gated out again and the counter is

the

decrements

4.2.2.3

incremented by 1. This continues until the counter reaches

mode,

Hence, the cylinder addresses

between strobes. As 1 result, the seek operations performed
by the disk drive linear positioner are pseudo-random.

counter by 1. When the next strobe occ.rs, the ADDR

this

increments

output to the disk irive are not consecutive, but rather,

performs a seek operation to the cylinder address indicated.
If the front panel FWD/REV switch is set to FWD, the
COUNT UP line then asserts and increments the address

Mode — In

clock

differ by varying amounts depending on the elapsed time

through the cylinder address source select logic and strobed
into the disk drive. The disk drive linear positioner then

Alternate

fast

counter between strobes.

generates a strobe, the ADDR CNTR BITS (0—7) are gated

4.2.2.2.2

of a strobe in the random mode causes the

ADDR CNTR BITS (0-7) to be gated out to the disk drive

input is constantly selected as the cylinder address source

and the strobe input has no effect.

panel

4-2

M WRITER
weiter exerciser
..
EXERCISER

T ———————

I (MODULE G502)

POSITIONER EXERCISER

(MODULE GS03)

| |I

| FRONT

| Fn“t'-:t\)/ l

I
FRONT PANEL

PANEL !

| swiTcH |

l
HEAD SELECT- | UPPER"

r——-= +Fwo*

b —d
RKOS

r==9

r—=

| Front|

CONTROL

WRITE

::Pmmlle |1i CONSTANT WRITE®

SiGNALS A 1

ENABLE
(ASSERTS HIGH)

' WRITE

| switc |

oT0

RKOS I

WRITE

| SWITCH |
L- —J

[BUS INDEX (LT)

FROM,
RKOS

COUNT up*

]

—_—

RTZ
=

|osc

LOGI

]

| ADDRESS s

. DETECT *
NEQ{

202 DETECT®
f
L

ADDRCNTR SEL

ADO® SOURCE TRIO

| FronT |
.
| PANEL . | RANDOM

ADDR CNTR

ss | Loa

couz%a
TRO

—

cyLinoer | BUS CYLINDER,

ADORESS | ADDRESS (0-7)%)

SOURCE
SELEC

RKOS l

LOGIC

FUNCTION !

STROSE

| Frowt WRITE
|
I PANEL ¢
(1))

STROBE

| SWITCH
' |
l

L -ns e J

COU'{" DOWNTM

FRONT RUN"
' l | P”msl‘

BUS WRITE GATETM

REV

~ [Ros

BUS RESTORE*

FROM R/W/S READY"

s 1O

B8US STROBE (LTr)

STEP
WRITE

CONTROL
LOGIC

| £ront QMR o o). | cLoCK
“AND | DATA aNp cLock
ANEL

BITS

| switcHes

DATA | (NEG PULSE TRAIN) T0

OUTPUT

;

* RKOS

r——1

l
'

Lt
—

r—-—1

l | RTZ

| PAREL | ERASE*

' -—_—

SWITCH

switcw |

| rmOwT | e

FRONT PANEL, INDICATORS
'

ADDR

EEX

INV

i
l

[

)

POWER

418y

=== e

FRONT

PANEL

DRIVE

SELECTOR
SWITCH

DRIVE

[|DRIVE

|ORIVE 2
fORIVE

*>{T0

o | RKOS l

;

* These signals are a logical low (OV) when asserted.
CP-0009

Figure 4-1

RKOS5 Exerciser Functional Block Diagram

—

42.2.5

Fault

Detect

Logic — The

fault

detect

4.3.1.2

logic

Write Control Logic — The write control logic

(Figure 4-3) enables the disk drive to write the selected

monitors the BUS ADDRESS INVALID and BUS SEEK
INCOMPLETE inputs from the disk drive and lights the
corresponding front panel indicator when either of the lines
asserts. Assertion of the RTZ line causes the ADDR INV
indicator to extinguish.

sector once or repeatedly. Setting the Constant Write
switch to ON asserts CONSTANT WRITE L which sets the
Write Gate flip-flop, thereby enabling the write clock and
conditioning

the

bus

write

AND gate.

Under these

conditions, the write clock runs constantly and the BUS
WRITE GATE L line asserts each time WRITE GATE
ENABLE L asserts, i.e., each time the selected sector passes

4.3 DETAILED LOGIC DESCRIPTION

under the read/write heads. Setting the Constant Write

The following paragraphs provide a detailed logic level
description of each of the functional blocks shown in

switch to off (down) and depressing the WRITE pushbutton clears CONSTANT WRITE L and asserts WRITE L,

Figure 4-1.

which sets the Write Latch. When the bus index pulse

occurs (the bus index pulse occurs once per disk
revolution), the positivegoing edge sets the Enable Write

4.3.1 Writer Exerciser

Gate flip-flop, which in turn sets the Write Gate flip-flop

— The
4.3.1.1 Sector Decoder and Write Sector Switch
sector decoder (Figure 4-2) decodes the SECTOR CNTR
(0-3) inputs and asserts one of ten lines to the Write Sector
switch. When the sector decoded corresponds to the
position of the Write Sector switch, the WRITE GATE
ENABLE L line asserts. If the Write Sector switch is set to
ALL, WRITE GATE ENABLE L is always asserted.

write AND gate. BUS WRITE GATE L then asserts when

thus enabling the write clock and conditioning the bus

the selected sector passes under the read/write heads and
immediately thereafter the selected sector is written, The
very next bus index pulse then resets the Write Gate

flip-flop on its negative-going edge. Note that releasing the

WRITE pushbutton clears the Write Latch and resets the
Enable Write Gate flip-flop.

IP/0 FRONT PANEL
r

SECTOR CNTR OL:D

|
I
i

FROM ¢
34 dol.]

|
|
|
|

CNTR 1L

BINARY TO

CNTR zL..J_l>

DECODER

i
1

DECIMAL

CNTR 3L®

1——-02

L_o;

d
1

|
l

l
WRITE GATE
ENABLE L

L_.._______....J
cp-0o8ge

Figure 4-2

Sector Decoder and Write Section Switch Diagram

\_1 l(TO FIGURE 4-3)

73 |

WRITE SECTOR SWITCH

[

FronT Pane ]

CONSTANT WRITE

(ON)

|
|

(FROM FIGURE 4-2)

|
|
IJ

WRITE GATE

ENABLE L

+ 3V

CONSTANT

WRITE

WRITE ENABLE H _

(TO WRITE CLOCK FIGURE 4-4)

—— WRITE LATCH—

[P0 FRONT PANEL]

WRITE

[wRiTE W

w_nn‘s L
| j*-———:l:':l
1

L
(FROM

/ (TO RKO5)

+5V —vwv

BUS WRITE
GATE L

RKO5)

BUS INDEX L
CP-0827

Figure 4-3

4.3.1.3

Write Control Logic

Write Clock — The write clo:k generates the clock

4.3.2

Positioner Exerciser

pulses and control signals necessary tc gate clock pulses and

data bits through the clock and data multiplexer (Figure
4-4). See timing diagram (Figure 4-%) for logic operation.

4.3.2.1

Strobe Oscillator
— The strobe oscillator (Figure

4-7) generates strobes which are used internally and are also

Note that the clock runs as long as WRITE ENABLE H is

output to the disk drive to gate in the cylinder address.

asserted.

Setting thefront panel RUN switch to the up position

4.3.1.4

Clock and Data Output Muitiplexer - The clock

and data output multiplexer serially outputs the clock
pulses and data bits such that each data bit is preceded and

clears the RUN L line. When the disk drive is ready to
execute

another

operation,

the R/W/S

READY

L line

asserts, turning the input driver off. With the driver off, the

capacitor charges until

succeeded by a clock pulse (Figure 4-6). Referring to Figure

the UJT (unijunction transistor)

conducts,

the

4-5, note that the initial clock pulse is generated on the first

positive-going pulse which is inverted by the output inverter

assertion of CLOCK H. On the second assertion of CLOCK

asserting STROBE L. The negative-going pulse output turns

discharging

capacitor

and

generating

H, 1 L is cleared and the bit 0 AND gate is satisfied, gating

the output driver on, asserting BUS STROBE L. In response

bit O on to the output line. On the third assertion of

to BUS STROBE L, the disk drive initiates a seek operation

CLOCK H, 1 L is asserted again generating a second clock

and clears the R/W/S READY L input.

pulse and so on.

o CLOCK 1

— H
+5v

—e 2H

250'| <

QNE=

* 4"

) FIGURE
4-6

F/F

CRrO©

F/F

ENABLE H

l ré"

WRITE

i’

> 4L

(FROM

— 2L

FIGURE 4 -3)

(1.44 MH2)

> 1L

J
cP-0812

WRITE

ENABLE H

ov—

Write Clock

190

-|250ns|-—-|

J1
MmooJ1
1L

+3V

[

)
—

Figure 44

DC ERASE +3V

BIT O ov—]

BIT 1

ov—]

BIT 2

ov——-r

BIT 3 ov._.l
BUS WRITE +3V

100ns

CLOCK

BITO

CLOCK

BIT1

CLOCK

BIT2

CLOCK

BIT3

CLOCK

l_"_

CLOCK L
CP-0813

Figure 4-5

Write Clock and Multiplexer Timing Diagram

4-6

rp—-——-

| /0 FRONT PA?‘E-l
|

fr/o FronT Paner 1 | ° fi\
GED GNP

GEs

GE»

DATA ansl

—oe—o

¢—oe-o0—o—

l
|

N O
o“‘

og-o-&

BUS WRITE
DATA & CLOCK L

[1’_'} (TO RKOS)

‘:1:)"_‘

A
ol

BIT 3

SE,_

|
:

BITI
r.

‘

- = o
Figure (

4-4 | YmgoeRA—
LIL

BIT

_(1.44 MHs)
cp-08i14

Figure 4-6

:?y

|
'

RTC

L
NO

Clock and Data Multiplexer Logic

( See figure 4-11)

RUN NO

NC'

+15V

BUS
STROBE L

+3V

(TO RKOS)

RUN L

( RKOS READY L
FROM)

R/W/S

STROBE L

T0
= Figures
4-8 & 4-10

CP-08I5

Figure 4-7

Strobe Oscillator

4.3.2.2

Address Counter Control Logic — The address

counter control logic (Figure 4-8) monitors the front panel

switches and manipulates the address counter in accordance

with the mode of operation selected:
a.

Step Mode — If the step mode is selected and
the FWD/REV switch is set to FWD, the ADDR
CNTR SEL H line asserts (Paragraph 4.3.2.4 b),
FWD L asserts, and REV L clears (goes HIGH).

When the strobe oscillator outputs STROBE L,

the

count

trigger

one-shot triggers asserting

COUNT UP L which increments the counter by
1

and

ADDR

SOURCE

TRIG

asserts

(Paragraph 4.3.2.4 b) and clears the Load/Clear
flip-flop. This has no effect on the fast clock
driver because RANDOM L is cleared holding
the driver ON thereby disabling the fast clock.
Therefore, in the step mode, successive strobes
gate the count of the address counter to the

disk drive and increment the counter until a
count of 202 is detected. At a count of 202,
the Load/Clear flip-flop is set, asserting CLEAR
H which clears the counter to a count of 0. The
very next strobe then asserts ADDR SOURCE

TRIG L, clearing the Load/Clear flip-flop and

on alternate strobes. When the counter reaches
a count of minus 1, the Load/Clear flip-flop is

set and LOAD L asserts, loading a count of 202
into the counter. The very next strobe asserts

ADDR SOURCE TRIG L, clearing the Load/
Clear flip-flop.

Oscillate

Mode — If the oscillate mode is
selected, OSC L is asserted clearing the counter

to a coun of 0 and holding it there.

Random Mode —If the random mode is
selected und the FWD/REV switch is set to
FWD, the ADDR CNTR SEL H line asserts
immediately and RANDOM L asserts, turning
the fast clock driver off enabling the fast clock.

The fast clock then outputs clock pulses which
increment the counter and reset the Load/Clear

flip-flop. 'When the first strobe occurs, ADDR
SOURCE TRIG L asserts turning the fast clock
driver

on thereby inhibiting the fast clock
pulses. The count trigger one-shot also triggers
on the first strobe, incrementing the counter by

1. When ADDR SOURCE TRIG L clears, the
fast clock starts incrementing the counter again.

incrementing the counter to a count of 1 and so

When the counter reaches a count of 202, the

on.

202 DETECT L line asserts and the counter is
cleared to a count of 0. Thus, in the random

Alternate

Mode — If

the

alternate

mode

selected and the FWD/REV switch is set to the
REV position, the ADDR CNTR SEL H line
clears on the first strobe thereby preventing the
counter from being decremented. The first
strobe also asserts ADDR SOURCE TRIG L
which clears the Load/Clear flip-flop but does
not affect the fast clock. On the second strobe,

ADDR CNTR SEL H asserts causing COUNT
DOWN L to assert decrementing the counter by
1. On the third strobe, ADDR CNTR SEL H

clears hence the counter is only decremented

mode, the fast clock increments the counter
until a strobe occurs; the strobe gates the count
to the disk drive and increments the counter by
1. The fait clock then starts again and increments the counter until another strobe occurs.

As a result, successive cylinder address outputs
to

the

disk

drive

appear

randomly

selected.

Note that the assertion of RTZ L clears and
holds the counter to a count of O and asserts

BUS RESTORE L.

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4.3.2.3 Address Counter — The address counter (Figure
4-9) can count up from 0 to 202 and count down from 202
to minus 1. When the CLEAR H input asserts, the counter

clears to a count of 0. When the LOAD L input asserts, the
counter sets to a count of 202. When the counter reaches a

count of 202 or minus 1, the respective count detect line
asserts.

triggers

esserting

ADDR

SOURCE

TRIG

which sets the Address Source flip-flop, thereby
asserting SWITCH ADDR SEL H. The assertion

of SWITCH ADDR SEL H selects the front
panel Cylinder Address switch inputs. When the
second strobe occurs, the 4 us one-shot triggers

again but this time the Address Source flip-flop
resets because the D-input to the flip-flop is
low. Thus, the ADDR CNTR SEL H line asserts

4.3.2.4

and selects the address counter inputs.

source in accordance with the mode of operation selected:

Step and Random Mode — In these modes, the
STEP L input to the Cylinder Address source

Cylinder Address Source Select Logic — The
cylinder address source logic (Figure 4-10) monitors the
front panel Function switch and selects the cylinder address

Alternate

and

Oscillate

Modes — In

select logic is a constant LOW, holding the
these

modes, the strobe input to the address source
select logic alternately selects the cylinder
address switch inputs and the address counter
inputs. If the Address Source flip-flop is reset

when the first strobe occurs, the 4 us one-shot

Address

Source flip-flop in the reset state.
Thus, the ADDR CNTR SEL H line is always
asserted selecting the address counter inputs.
Note however, that ADDR SOURCE TRIG L

still asser:s each time STROBE L asserts in
these modes.

COUNT UP L

888%%%3

COUNT DOWN L

CONTROL

LOGIC

FIGURE 4-8

jown

LOAD L

[CLEARH

—d LD

CLR
A

+3V

-+ BIT O (LS8

+ BIT |

COUNTER

} ADDRESS SOURCE
SELECT LOGIC
FIGURE 4-10

+ BIT 2

he———— c

+ BIT3

D
BOR

|CAR

.-}———‘ 202 DETECT L

(TO FIGURE 4-8)

DWN

dto

|UP

+ BIT4

CLR

4
=

1[_ Acoumea
A

> BIT 7

BIT S

) ADDRESS SOURCE

+ BIT6

[—- C
+3V

)

SELECT LOGIC
FIGURE 4-10

)

BOR

|CAR

)

% 3 most significant bits
frue for negative 1 only

NEG 1 DETECT L

(TO FIGURE 4-8)
cpP-0817

Figure 4-9

Address Counter Logic

ADDR SOURCE TRIG L _~ 10 ADDRESS

ADDR CNTR SEL H

COUNTER

» ) Figure 4-8

+3V
1

_Ls

CYL ADOR SW 1

ADDR

SOURCE

STROBE L

FROM

ONE-

CYLINDER
ADDRESS

29 L

S F/F

SHOT
4us

s c

' P/O FRONT PANEL ¢rep

ADDR CTR BIT O
ADDR CTR SEL H

CYL ADDR SW 2

stepL |

g1 L

ggt

g3 L

FUNCTION

Bus

OURCE

l._......._......_..........l
|

SWITCH ADDR SEL H

ADDR

TRIG

(Figure
Qu 4-7)

ADDRESS SELECT LOGIC

osc

|
=
L____S_A_NE__

@ L

ADDR CTR BIT1

* This diode is mounted
across the

function switch.

2 OF 8

—

SELECT CIRCUITS
cpP-o08I8

Figure 4-10

4.3.2.5

Fault

Detect

Logic — The

fault

Cylinder Address Source Select Logic

detect

logic

4.4

FLOW DIAGRAM DESCRIPTION

monitors the disk drive fault inputs (Figure 4-11). When

The

following

BUS ADDRESS

explanation of the exerciser operating sequences. Figure

INVALID L asserts, the flip-flop sets

turning the driver on. When the driver turns on, a ground is

applied

to the ADDRESS INV indicator causing it to
illuminate. The indicator remains illuminated until the RTZ
switch is set to the up position resetting the flip-flop. When

flow

diagrams

provide

BUS ADDRESS
INVALID L

égeasss
indicator

PANEL

no Rtz
>

[_—*’\.“C

L —

+3V

l TO RUN SWITCH

SEEK

(see Figure 4-7)

BUS SEEK
INCOMPLETE L

INV

[

H5V

indicator
1SV

+3V

CP-08I19

)
Figure 4-11

step

Figures 4-13 through 4-16 cover the positioner exerciser
module operation in each of the four modes.

BUS SEEK INCOMPLETE L asserts, 1 ground is applied to

F:/o FRONT

step

4-12 covers the writer exerciser module operation, and

the SEEK INC indicator.

Fault Detect Logic

ERASE

SELECTED

ASSERT WRITE
DATA AND CLOCK

bopela

::;: :'::E
CLOCK L LINE

AT +3 VDC

ENABLE WRITE

GATE AND HOLD

ENABLE WRITE

GATE

‘

DISABLE WRITE

)

GATE

ENABLE CLOCK
_

AND DATA OUT-

PUT MULTIPLEXER

NOTE:

ALL APPLICABLE LOGIC
CONTAINED ON MODULE
G502

ASSERT
WRITE GATE

L ONTO
BUS

CP-0820

Figure 4-12

Writer Exerciser Flow Diagram

4-12

(FROM FIGURE 4-16)

(SEE FIGURE 4-14)

STROBE DiISK
DRIVE

GATE CONTENTS

OF ADDRESS

COUNTER ONTO
BUS CYLINDER

NOTE:
AN applicable logic

ADODRESS LINES

contained on module G5(:3.

FWOD/REV

REV

W
INCREMENT

3
DECREMENT AD-

ADDRESS

DRESS COUNTER

COUNTER BY 1

8y 1

NEGATIVE
1

LOAD 202

CLEAR ADDRESS

INTO ADDRESS

COUNTER

COUNTER
—

CP-0821

Figure 4-13

Positioner Exerciser Step Mode Flow Diagram

4-13

FROM FIGURE 4-13

(SEE FIGURE 4-15)

STROBE DISK

DRIVE

GATE CONTENTS

OF CYLINDER

ADDRESS

SWITCHES ONTO

SOURCE FLIP-

BUS CYLINDER

FLOP RESET,

ADDRESS LINES
AND RESET AD-

DRESS SOURCE
FLIP-FLOP

GATE CONTENTS

OF ADDRESS
COUNTER ONTO

BUS CYLINDER
ADDRESS LINES

AND SET ADDRESS SOURCE

FLIP- FLOP

INCREMENT AD-

FWD

DRESS COUNTER
BY 1

REV

DECREMENT ADDRESS COUNTER
BY
1

ADDRESS
COUNTER
EQUALS

ADDRESS

COUNTER

202

EQUALS
NEGATIVE
1

CLEAR ADDRESS

COUNTER

LOAD 202 INTO
ADDRESS
COUNTER

NOTE:

ALL APPLICABLE

LOGIC CONTAINED
ON MODULE G503

CP-0822

Figure 4-14

Positioner Exerciser Alternate Mode Flow Diagram

4-14

FROM

FIGURE 4-14

(SEE FIGURE 4-18)

CLEAR ADDRESS
COUNTER AND

HOLD

STROBE DISK
DRIVE

NOTE:

All applicable logic
containesl on module (3503.

CONTENTS OF
ADDRESS COUNTER GATED ON-

TO BUS LINES
AND ADDRESS

SOURCE FLIPFLOP IS SET.

CONTENT
OF
S
CYLINDER AD-

DRESS SWITCHES
GATED ONTO BUS

LINES
AND AD-

DRESS SOURCE

FLIP-FLOP IS

CP-0823

Figure 4-15

Positioner Exerciser Oscillate Mode Flow Diagram

4-15

FROM FIGURE 4-15

DISABLE FAST

CLOCK AND

STROBE DISK

(SEE FIGURE 4-13)
SELECTED

ORIVE

GATE CONTENTS

OF ADDRESS

ENABLE FAST

COUNTER ONTO

CLOCK

BUS CYLINDER

ADDRESS LINES

INCREMENT ADDRESS COUNTER

BY 1

FWD/REV

DECREMENT

SWITCH

COUNTER BY 1

ADDRESS

COUNTER
EQUALS

202

CLEAR ADDRESS
COUNTER

R/MWN/S

READY

INCREMENT AD-

DRESS COUNTER

8y 1

ADDRESS

ADORESS

COUNTER

EQUALS

NEGATIVE

LOAD 202 INTO

CLEAR ADDRESS

ADDRESS COUNTER

COUNTER

LOAD 202 INTO
ADDRESS COUNTER

NOTE:

YES

ALL APPLICABLE LOGIC CONTAINED

NS
Figure 4-16

DECREMENT AD-

DRESS COUNTER

ON MODULE G503

cP-0824

Positioner Exerciser Random Mode Flow Diagram

4-16

CHAPTER 5
MAINTENANCE

5.1

SCOPE

This chapter lists test equipment required and provides a

circuitry. The maintenance log (included in the back of this
manual) is used to record all maintenance action and aid in

complete description of exerciser maintenance procedures,

detecting any component failure pattern that may develop.

including a preventive schedule and a corrective main5.3 TEST EQUIPMENT REQUIRED
Exerciser maintenance procedures require the test equip-

tenance troubleshooting flow diagram.

ment, tools, and materials listed in Table 5-1,

5.2

MAINTENANCE PHILOSOPHY

in addition to

standard hand tools, cleaners, test cables, and probes.

Basically, exerciser maintenance consists of preventive and
corrective maintenance procedures, and a maintenance log.

5.4

The

Preventive

preventive

maintenance

procedures are

performed

regularly in an attempt to detect any damage caused by

PREVENTIVE MAINTENANCE

maintenance

consists of tasks performed at

periodic intervals to ensure proper equipment operation

improper handling of the unit. The corrective maintenance

and

troubleshooting flow diagram is provided to aid service

include visual inspection and operational checks. Table 5-2

personnel

provides a recommended preventive maintenance schedule.

isolating

and

repairing faults in

exerciser

minimum

unscheduled

maintenance.

Table 5-1

Test Equipment Required

Equipment

Manufacturer

Designation

Oscilloscope

Tektronix

Type 453 or equivalent

X10 Probe (2)

Tektronix

P6008

Multimeter

Triplett/Simpson

Model 310/Model 260

Module Extender

DIGITAL

W984 (Dual Height)

These

tasks

Table 5-2

Preventive Maintenance Schedule
Performance Interval

Test or Procedure

Monthly

Visually inspect for physical damage, correct if required.

Monthly

Clean externally.

Monthly

Check that all modules are properly seated in the connector block.

Quarterly (Every 3 months)

Check that all indicators work properly.

Quarterly

Clean internally with vacuum cleaner or s soft brush.

Quarterly

Touch up external paint scratches or scrapes. Check for looseness of the

knobs, switches, and indicators.

5.5 CORRECTIVE MAINTENANCE
The following information will aid the service technician

isolating failing exerciser components. The informa

presented

flow

functioning exerciser circuitry is systematically eliminat
ed.
Using the flow diagram (Figure 5-1) and logical deductiv
e
reasoning, faulty cornponents can be located.

tion is

diagram

form such

that

correctly

5-2

\_/

START

PERFORM WRITER |

OBTAIN A DISK
DRIVE UNIT

EXERCISER

KNOWN TO BE OP-

INDICATORS

MODULE TEST

ERATING PROPER-

FAULTY

LY AND PERFORM

PROCEDURE PER

PARAGRAPH 2.3.1

THE EXERCISER
SET-UP PROCEDURE PER PARA-

GRAPH 2.2

REFER TO FAULT

DETECT LOGIC

(FIGURE 4-11 AND
ENGINEERING

WRITER

EXERCISER

MODULE

DRAWING

UNPLUG DISK

D-CS-G503-0-1)

DRIVE POWER

CORD AND DISCONNECT POWER

AND ISOLATE THE

REFER TO

FAULT

WRITER EXER-

CABLE CONNEC-

I PERFORM POSI-

CISER MODULE

TIONER MODULE

TOR P1 AT THE

FLOW DIAGRAM

TEST PROCEDURE

EXERCISER
FRONT PANEL

AND ISOLATE THE

2.3.2).

THE FAULT

POSITIONER

PLUG IN DISK

EXERCISER

DRIVE AC POWER

(FIGURE 4-12)

(PARAGRAPH

MODULE
oK

CORD AND CHECK
FOR+5V,+15V,

FAULT

-15V AND GND
ON P1

EXERCISER

OCCURS IN

FAUL T
OCCURS IN AlL.-

STEP

TERNATE

MODE

FAULT

OCCURS IN OSCILLATE
MODE

FAULT OCCURS

IN RANDOM
MODE

NOT AT
YES-

FAULT
DISK DRIVE

REFER TO POS|-

POWER CABLE

REFER TO POSI-

FAULTY

TIONER EXERCISER STEP MODE

FLOW DIAGRAM

(FIGURE 4-13)
UNPLUG DISK

DRIVE AC POWER

CORD, RECONNECT POWER

CABLE CONNEC-

TIONER EXER-,
CISER ALTER-

NATE MODE FLOW

DIAGRAM (FIG:
URE 4-14) AND

ISOLATE THE
FAULT

OR EXERCISER

REFER TO POSI-

TIONER EXER-

CISER OSCILLATE

CISER RANDOM

MODE FLOW DIA-

GRAM (FIGURE

4-15) AND ISOLATE

4-16) AND ISO-

THE FAULT

LATE THE FAULT

YES

POWER SUPPLY

CP-0825

POWER

TOR P1 AND PLUG
IN DISK DRIVE AC
POWER CORD

Figure 5-1

Troubleshooting Flow Diagram

CHAPTER 6
RKO05 DISK DRIVE MAINTENANCE

USING THE RK05 EXERCISER
6.1

SCOPE

This chapter contains RKO5 Disk Drive alignment, checkout, and adjustment procedures which incorporate the use
of the RKOS Exerciser as a maintenance aid. For additional
maintenance information, refer to the RK05 Disk Drive
Maintenance Manual, DEC-00-RK05-D8.

6.2

RKO5K-AC

alignment

shows a spindle with negligible runout; Figure 6-1b shows a
spindle with considerable runout. The amount of wobble

equations used for head alignment.
NOTE

Alignment

Cartridge — This

If the condition shown.in Figure 6-1b exists,

DEC

alignment cartridge represents the preferred method for

RKOS

indicates the degree of wobble of the spindle. Figure 6-1a

can be determined by the amplitude differences occurring

Alignment Cartridges

6.2.1.1

sector locations and misaligned at others. This condition

in any adjacent pair of sector boundaries using the same

ALIGNMENT, CHECKS, AND ADJUSTMENTS

6.2.1

is displayed, the head may appear to be aligned at some

procedures.

provides

three tracks

ensure that the mating of spindle and disk is
clean. Improper mating can cause such runout.

(principal track 105, plus spare tracks 85 and 125) of
constant frequency data with alternate sectors recorded at
displacements of +0.0025 and -0.0025 inches, respectively,
from the ideal track locations.
When a head is aligned to specifications, the readback signal

shows equal amplitudes for all sectors (shown when the

oscilloscope displays only two sectors and triggered by the

SECTOR signal). The degree of amplitude inequality in
sectors indicates the departure from exact

alternating
alignment.

Sector timing data is included on all three tracks to indicate
head gap location relative to sector pulse detection. This

data is represented by a single pulse (70 us nominal)
following the INDEX pulse and 10 us prior to the onset of
head alignment data.

The

RKOSK-AC

alignment

cartridge

also indicates the

degree of runout on the spindle. When the oscilloscope is
triggered on INDEX and a complete revolution of the disk

Figure 6-1a

Spindle Runout

(Negligible Runout)

6.2.1.2 2315 CE Test Cartridge Shim
Installation — (To be
used only when an RKO5K-AC align
ment cartridge is not
available.) Before a 2315 CE test
cartridge can be used for
any RKOS alignment procedure, a
.005-inch shim must be
installed in the disk hub. Because
the 2315 cartridge is
recorded at low density and the RKO5
uses a high-density
cartridge, this shim is required to accent
uate the wobble of
the low-density cartridge and allow
it to be used for

high-density alignments. To install the

shim properly, trim a

piece of .005-inch shim stock as indica

attach it to the disk hub as follows:

ted in Figure 6-2 and

Locate sector 00 by holding the
cartridge
upside down and observing the sector
slots in

the metal lip of the disk hub (Figure
6-2).
Rotate the disk clockwise inside the plastic
case

until two slots close together are locate

Figure 6-1b

d (sector
11 and index slots). Continue to rotate
the disk
clockwise, stopping at the next slot (secto
r 00).

Spindle Runout

(Considerable Runout)
2.
Specifications for the RKOSK-AC alignment cartridge are as

follows:

Position the shim 180 degrees from the
sector
00 slot. Ensure that the narrow portio
n of the
shim is in the spindle cavity and that
the shim

does not reach the bottom of the cavity.
Alignment and Sector Timing Tracks:

Primary Track — 105
Backup Tracks — 85,

125 (Use only if track

6.2.2 Servo Systern Timing Checks and
Adjustments
The servo system timing adjustments are precise
ly set at the
factory and should not be routinely adjust
ed or fine-tuned

105 is unusable)

Recorded Frequency: Nominal 720 kHz
Number of Sectors:

as part of any PM procedure. If a positi
oner malfunction is
suspected. all waveforms related to each
phase of servo

operation should be examined; based on

Timing: Single

pulse

701 us

these, the possible

trouble should be diagnosed before any servo
adjustments

Alignment Accuracy, track 105: +200 microinches

Sector

Tape the shim in position.

are attempted. Because some of the servo

check tolerances

differ from the adjustment tolerances, refere

nce should be
made to the check tolerances in Table
6-1 before adjust-

following

INDEX pulse

ments are attempted.
Table 6-1

Servo System Checks
Checks
Full Stroke Profile

Drive Configuration

Test Point

Tolerance

Reference

202 cyl osc seek

AOSH1

<90 ms waveform dura-

Figure 6-7

tion with plateau at
trailing =dge
Full Stroke Position

202 cyl osc seek

AQSM1

equal beginning & end

Figure 6-8

amplitudes within 5%.

<1 V overshoot
Outer Limit

rep RTZ

A05J1

3 to 3.5 V amplitude.
< 0.3 V plateau

6-2

Figure 6-9

Table 6-1 (Cont)

Servo System Checks

Checks

Drive Configuration

Sine Amplitude/Offset

4 cyl osc seek

Test Point
AOSM1

Tolerance

Reference

10+ 1V p-p, ground

Figure 6-3

symmetrical within
+10%

Velocity Offset

4 cyl osc seek

AOSM1

ground symmetrical

Figure 6-3

within +10%

Cosine Amplitude

4 cyl osc seek

A0S5S1

101V p-p, ground

Figure 64

symmetrical within

+10%
Velocity Amplitude

2 cyl osc seek

AOSM1

center pulse dura-

Figure 6-5

tion=3.2120.5ms

Acceleration

64 cyl osc seek

AOSH1

14 ms rise time

_——fi

Figure 6-6

TAPE

SHIM

\‘

SECTIR O

SLOT

stot
.

SPINDLE

INDEX
SLOT

]

X
CAVITY

VIEW A

SPINDLE
CAVITY

—-—

®
-—

_ -

\___

SECTOR 1
SLOT

SECTOR 11

THICKNESS=.005"

CP-0513

F:gure 6-2

CE Test Cartridge Shim Installation

6-3

Table 6-2
Servo System Adjustments
Potentiometer*

Function

SA (Sine Amplitude)

Sets amplitude of SIN POSITION signal

SO (Sine Offset)

Adjusts SIN POSITION symmetry about ground

CA (Cosine Amplitude)

Sets amplitude of COS POSITION signal

CO (Cosine Offset)

Adjusts COS POSITION symmetry about ground

VO (Velocity Offset)

Adjusts velocity generator output at zero velocity. (Provides offset
control to position loop.)

LSA (Limit Signal Amplitude)

Simultaneously adjusts amplitude of both Limit signals before digitizing

LSO (Limit Signal Offset)

Sets zero level of Limit signal with Jositioner in normal recording area

of disk
CURRENT (on H604)

Sets maximum positioner current (determines acceleration)

*Potentiometers are located on the G938 card (card position 5) of the electronic

drive to gain access to these potentiomecters.

module. Remove the prefilter at the rear of the

NOTE

Settings within the tolerances listed in Table
6-2 should not be adjusted.

A sweep

For most malfunction cases, the positioner system will
operate enough to allow dynamic measurements. However,

if the positioner either does not operate or operates very
erratically, the static checks and adjustments described in

Paragraph 6.2.2.2 should be performed. If servo system
parts

are

field-installed,

settings

must

sweep

readjusted,

according to Table 6-1.

time

10 ms/div

trigger

normal

trigger

source

external*

coupling

slope

Connect the scope external trigger input
to disk drive B0SJ2 (FWD H)

6.2.2.1

Dynamic Off-Line Checks and Adjustments

the probe test point changes to a
minimum, perform the following checks and
adjustments in the listed sequence.

To prepare the RKO5 Disk Drive for testing,
perform the RKO5 Exerciser set-up procedure

(Paragraph 2.2).
2.

SINE A mplitude (SA ) and Offset (SO)

Set the oscilloscope controls (Tektronix 453 or

equivalent) as follows:
®

vertical

mode

Toavoid excessive scope control changes and to

keep

Set exerciser front panel RTZ and RUN
toggle switches to the down position.

Set the exerciser Function knob to OSC.

channel] 1

sensitivity

2 V/div

trigger

channel 1

coupling

Set

exerciser Cylinder Address4 toggle

switch

to 1 and all
Address switches to 0.

other

Cylinder

Set the

RUN

observe

the linear positioner oscillates

toggle

switch to RUN;

The

waveform

1021V

amplitude

and

must

symmetrical

about

between cylinders 0 and 4.

ground.

Observe AOSM1 (SIN POSITION) for a

correct amplitude and SO for the ground

scope display as illustrated in Figure 6-3a.

If necessary, adjust SA (Table 6-2) for the
symmetry.

SWEEP

10 ms/div

VERT SENS

2V/div

Correct Waveform (Symmetrical Signal)

Inccrrect Waveform (Signal not Symmetrical about Ground)

Figure 6-3

Sine Amplitude/Offset and Velocity Offset Waveform

A0O5M1

Velocity Offset (VO)
a.

Cvlinder Address-2 toggle switch to 1;
observe the linear positioner oscillates

Observe that the voltage minimums at
AO5SM1 (SIN POSITION) are symmetrical

between cylinders 0 and 2.

about ground (Figures 6-3a and 6-3b). A
small amount of ripple at the minimum
voltage levels is normal. To estimate the

Set the scope sweep time to 1 ms/div.

degree of symmetry, use the average value
of the ripple as the voltage minimum.

Observe AOSM1 for a scope display as
ill astrated in Figure 6-5S. The duration of
the center cycle must equal 3.2 + .05 ms.

If necessary, adjust VO (Table 6-2) for
the required symmetry.

If necessary, adjust VA (Table 6-2) for

the correct time.
Cosine Amplitude (CA ) and Offset (CO)
a.

Acceleration (Positioner Current)

Observe A05S1 (COS POSITION) for a

scope display as illustrated in Figure 64.

The

waveform

101V

p-p

amplitude

and

must

symmetrical

about

Set the exerciser front panel Cylinder
Address-2 toggle switch to O and the
Cylinder Address-64 toggle switch to 1;
observe

ground.

the linear positioner oscillates

between cylinders 0 and 64.
Set the scope sweep time to 5 ms/div and
the vertical sensitivity to 0.5 V/div.

If necessary, adjust CA (Table 6-2) for
the correct amplitude and CO for the
ground symmetry.

Observe disk drive AOSH1 (VELOCITY)

for a welocity profile as illustrated in
Velocity
a.

Set

Fizure 6-6.

Amplitude (VA )

the exerciser front panel Cylinder

Address-4

toggle

If necessary, adjust R15 (on H604) for a

switch to 0 and the

Figure 6-4

14 ms rise time.

A0581

SWEEP

10me/div

VERTSENS

2V/div

Cosine Amplitude/Offset Waveform

6-6

Figure 6-5

SWEEP

AO05M1

1 ms/div

VERT SENS

2V/div

Velocity Amplitude Waveform

Figure 6-6

Acceleration Waveform

SWEEP

AO5H1

5 ms/div

VERT SENS

0.5V/div

Full Stroke Profile
a.

Set

Acceleration (Positioner Current). Adjust

the exerciser front panel Cylinder

the appropriate potentiometer (Table
6-2) as required to obtain the correct
waveform.

Address-128, 8, and 2 toggle switches to
1; observe the linear position oscillates

between cylinders 0 and 202.

Full Stroke Position Waveform

Set the scope sweep time to 10 ms/div

and the vertical sensitivity to 0.5 V/div.

Set

the

2V/div

scope

and

vertical

observe

trated in Figure 6-8. The waveform
amplitudes at the start and end of the
seek must be equal within 5% and the

display as illustrated in Figure 6-7. The
O V level of the profile must be reached

in less than 90 ms from the start of the

overshoot at the end of the seek must not

seek. In addition, there must be a definite

exceed

plateau (constant voltage level) at the end

1V.

recheck the

of the seek. If this is not the case, recheck

and

the Velocity Amplitude (VA) and the

the

rert).

If overshoot is excessive,

Velocity Amplitude (VA)
Acceleration (Positioner Cur-

10 mw/div

0.5V/div

Full Stroke Waveform

EQUAL

WITHIN 5%

Figure 6-8

(SIN

POSITION) for a scope display as illus-

Observe AOSH1 (VELOCITY) for a scope

Figure 6-7

sensitivity

AOSMI

SWEEP

10 me/div

VERTSENS

2V/div

Full Stroke Position Waveform

6-8

AOSM1

Outer Limit (dynamic test)
a.

6.2.2.2

Set

exerciser front panel
switch to RTZ.

RTZ toggle

Static

Tests

and

Adjustments — Perform

the

following procedure when the positioner or a major servo
system

component

has

been

replaced.

This

procedure

should also be followed as a diagnostic aid when the
positioner system is inoperative or unstable in operation.

Trigger the scope from BOSK2 (REV H).

Set

the

scope

vertical

sensitivity

make the required adjustments, remove the disk
cartridge from the drive and physically move the positioner

1 V/div and observe A05J1 (LIMIT) for a

carriage back and forth while observing the selected signal.
Use the automatic scope sweep and do not attempt to sync

scope display as illustrated in Figure 6-9.

The waveform peak amplitude must be 3
to 3.5 V with a minimum level of0 V. In

the sweep to the observed signal. With a little practice, the

addition, the voltage plateau immediately

positioner motion required will quickly be discovered.

most

following the trailing edge must not
exceed 0.3 V. If not, perform the Static

convenient

Set the exerciser RTZ toggle switch to

Do not install a disk cartridge in the drive.

Place

INNER

LIMIT

any

signal

the

positioner

carriage

signal

operative,

restore operation will be initiated. If this

procedure

possible

carriage

motion

caused

Make the following checks and adjustments.
Sine Amplitude (SA ) and Offset (SO)
a.

(Paragraph

Set

the

scope

vertical

sensitivity

2 V/div and adjust the ground reference

6.2.2.2).

to the center of the scope screen.

PLATEAU

<0.3v

1ms/div

VERTSENS

1V/div

SWEEP

Figure 69

transient switch noise.)

is not the case, perform the Static Limit

Adjustment

finger

down or off position. (This precaution prevents

physically moving the positioner to the
inner limit (towards the spindle). If the
INNER

assembly and place switch S1 (on H604) in the

the down position.
the

To make the static adjustments, proceed as follows:

Limit Adjustment procedure (Paragraph
6.2.2.2).

Check

sweep speed setting and the type

Outer Limit Waveform

6-9

A05J1

Observe AO5SM1 (SIN POSITION) while

manually moving the positioner back and

forth. Adjust SA (Table 6-2) for a 10 V

p-p signal amplitude.

Install a prerecorded cartridge in the drive.

Place the drive in the run mode and manually

position the heads at any recorded cylinder past

track

zero. An all ZERO data recording is
preferable; however, any recorded pattern is
sufficient.

Adjust SO until the signal is symmetrical

about ground.
Cosine Amplitude (CA ) and Offset (CO)

Observe A05S1 and adjust CA and CO (Table

6-2) in the same manner as that used in the Sine

Amplitude and Offset procedure above.

Limit

Signal Amplitude

(LSA)

and

Set the oscilloscope controls as follows:
vertical

Offset

(LSO)
a.

Set

the

scope

vertical

sensitivity

1 V/div and adjust the ground reference

channel 1

coupling

time

100 ns/div

Observe

trigger

normal

source

internal

coupling

slope

AO0SJ1

with

the

positioner

Adjust

LSO (Table

6-2) for a

trigger

screen.

Move the positioner to the inner limit and

observe the voltage change on the scope.
Similarly, move
outer

limit

and

the

positioner to the

observe

the

Connect the channel 1 scope probe to TP1 of

the G180 card (card position 1). It should be
possible to obtain solid scope synchronization

voltage

at the sweep start. (Disregard the unsynchro-

change.

nized puises that follow.)

Adjust LSA until the smaller voltage level

obtained in step cis 3.0 V.
Return the positioner to the center of

readjust the smaller voltage level to 3.0 V.

6.2.3

Read/Write Data Separator (G180 Card) Adjustment
Adjustment of the data separator is not part of the normal
maintenance and therefore is not recommended unless a

been replaced. If this occurs, set the width of the data

window as follows:

NOTE
R13 is the write current adjustment potentiometer and should not be adjusted in the field.

Adjust

RS54 counterclockwise to obtain a
500 ns pulse width as measured from the start

of the rise to the start of the fall.

Repeat step c above and, if necessary,

G180 component that affects the data separator section has

Adjust R55 fully counterclockwise and RS54

clockwise.

travel and readjust LSO for 0 V.

channel 1

sweep

ground signal at the center of the scope

1 V/div

trigger

A sweep

travel.

to the center of the scope screen.

stationary at approximately the center of

mode
sensitivity

Readjust R5S clockwise until the pulse width
decreases to 440 + 10 ns as measured from the

start of the rise to the start of the fall.
6.2.4 Read/Write Head Check and Alignment
The following procedure describes the complete read/write

head alignment. Before attempting this alignment procedure, ensure that the drive operates correctly and that the
heads have not been contaminated by exposure to a
defective cartridge. If new heads have been installed, it is

recommended that this alignment procedure be performed

off-line using the RK05 Exerciser.

6-10

6.24.1

RKOSK-AC

Alignment

Cartridge — The

appro-

Set the exerciser Function knob to OSC.

Set the exerciser Cylinder Address-64, 32,

priate on-line diagnostics may be used; however, DO NOT
ADJUST A HEAD THAT

HAS

LESS THAN A 15%

ERROR (Figure 6-10).

8 and 1 toggle switches to 1 and all other
Cylinder

To align or check the heads proceed as fyllows:

Address toggle switches to O

(cylinder address 105).

Perform the RKOS Exerciscr set-up procedure

Quickly

(Paragraph 2.2).

set

position,
2.

Install an alignment cartridge on the spindle

and operate the drive in the run mode for at
alignment

exerciser RUN toggle

cartridge

and

the

observe

the

linear

position

moves to cylinder 105.
Monitor

least 30 minutes. This must be done to allow
the

the

switch to RUN and back to the down

the

scope

display

for

one

of the

waveforms illustrated in Figure 6-10.

drive

components to achieve therial stabilization.
NOTE

Using the WR PROT switct., place the drive in

If a bright horizontal line does not appear

the write protect condition.

the

beginning

waveform

through

Set the oscilloscope controls as follows:

the

Figures

shown

6-10g,

adjust

the

displayed

6-10b

scope

level

control until the line appears. The bright
line indicates proper positioning of the

® vertical

mode

ADD (invert CHAN 2)

sectors on the display [odd sectors (X1)

sensitivity
coupling

=
=

20 mV/div
dc

on left, even sectors (X2) on the right].

If none of the illustrated waveforms appear, the
®

head

sweep

misaligned

badly

that

manual

manipulation of the positioner is required. If

A sweep

time

500 us/div

manual manipulation is required, perform the

trigger

normal

following steps; if not, proceed to step 10.

source

external*

coupling

trigger

Place switch S1 (on H604) in the down or
off position, keeping a finger on the
carriage

dampen

any

positioner

transients.

*Use a 1:1 probe to connect the scope external
trigger input to A02S2 (sector).

b.
5.

Connect the channel 1 procbe to TP3 and the

channel 2 probe to TP4 of the G180 card. (Use

85 and 125 have identical patterns, so be

10: 1 probes.)

sure

that

the displayed pattern is for

cylinder 105.

Ensure that the positioner track scale indicates
cylinder 00. If it does not, loosen and readjust

the scale to ensure proper scale readout over

Slowly move the positioner by hand until
the alignment pattern occurs. Cylinders

Observe

the track

scale and note the

cylinder indication when the “right on”

the entire length of the head.

waveform (Figure 6-9) is obtained. If the

Select cylinder 105 as follows:

too

scale indicates less than 105, the head is
far forward

in the carriage. Con-

versely, if the scale indicates more than

Set the exerciser front panel Head Select

105, the head is back too far in the

toggle switch to LOWER.

carriage.

6-11

Large misalignment. Head at too great a track

radius. Further misalignment reduces amplitude

Head correctly aligned. Amplitudes are equal.

of signal on right side of screen.

Large misalignment. Head inside of CYL 105.
Further misalignment reduces amplitude of
signal on left side of screen.

BRIGHT LINE

SHOULD APPEAR
HERE

BRIGHT LINE
SHOULD APPEAR
HERE

NOTE

Head considerably misaligned. Smaller left
amplitude indicates head outside of CYL 105.

Heads slightly misaligned. Larger left amplitude

€.

indicates head inside of CYL 105 (toward 106).
N2

error =-72%

error =+15%

The alignment error is denoted as a signed percentage. The percentage is derived from
the relative amplitudes of the two signal modes (x; and x,) according to the following

expression:

%C"'OI'=X1 - X2 X 100

BRIGHT
LINE SHOULD

BRIGHT LINE

APPEAR HERE

SHOULD APPEAR
HERE

X +x,

(Approximate error in MICRO inches equals % error X 35)
The sign denotes the direction of the alignment error. A negative sign indicates the
head is too far from center (track less than 105).

Head slightly misaligned. Smaller left amplitude

indicates head outside of CYL 105.
error =-15%

Head considerably misaligned. Larger left
amplitude indicates head inside of CYL 105.

error = +72%
BRIGHT LINE

BRIGHT LINE

SHOULD APPEAR

HERE

Figure 6-10

RKOS5-AC Alignment Cartridge Head
Alignment Waveforms

6-13

LOWER

TRACK SCALE

HEAD ADJUSTMENT SCREW

UPPER

HEAD ADJUSTMENT SCREW

Figure 6-11

b.
C.

LOWER HEAD CLAMP SCREW

UPPER HEAD CLAMP SCREW

Read/Write Head Adjustments

Set the exerciser Function knob to OSC.
Set the exerciser Cylinder Address-64, 32,
8 and 1 toggle switches to 1 and all other

Cylinder Address toggle switches to 0
(cylinder address 105).

Place switch S1 (on H604) in the down or

off position, keeping a finger on the
carriage to dampen any positioner transients.

Slowly move the positioner by hand until

the alignment pattern occurs. Cylinder

Quickly set

the exerciser RUN toggle

switch to RUN and back to the down
position;

observe

the

linear

positioner

moves to cylinder 105.

110 has an identical pattern, so be sure

that the displayed pattern is for cylinder
105.

Do not use undue force on the

positioner when manually changing track

positions.

Observe

Monitor the

scope

display for one

of the

waveforms illustrated in Figuare 6-12. If none of

the

track

scale and note the

cylinder indication when the waveform
shown in Figure 6-12d is obtained. If the

the illustrated waveforms zppear, the head is
misaligned so badly that manual manipulation

scale indicates less than 105, the head is

Conversely, if the scale shows more than

the

positioner

recuired.

manual

manipulation is required, perform the following

steps; if not, proceed to step 9.

too

far

forward

105, the head is too
carriage.

the

carriage.

far back in

the

Loosen the clamp and adjustment screws

6.2.5

Index/Sector Timing Adjustment

(Figure 6-11) and move the head in the
appropriate direction until the waveform

6.2.5.1

shown in Figure 6-12d is obtained and

for adjusting index/sector timing using the RKOS5K-AC

the scale indication is slightly greater than

alignment cartridge :s as follows:

RKOSKAC Alignment Cartridge — The procedure

105.

1.
e.

Perform the RKOS Exerciser set-up procedure

(Paragraph 2.2).

Lightly tighten the clamp screw and turn

on the positioner power (S1 up).

Install an alignment cartridge on the spindle,

Set the exerciser RTZ toggle switch RTZ

ensuring that the mating surfaces are clean and

momentarily;

operate the drive in the run mode for at least

observe

the

linear

30 minutes. This must be done to allow the

positioner moves to cylinder O.

alignment cartridge and the drive components
g.

Quickly

set

the

to achieve thermal stabilization.

exerciser RUN toggle

switch to RUN and then back to the
3.

down position; observe the linear positioner moves to cylinder 105 and stops.

If one of the illustrated waveforms is present,
note

which

direction

the head must be

Set the oscilloscope controls as follows:
® vertical

moved to obtain the proper indication. If it
must

Using the WR PROT switch, place the drive in

the write protect condition.

moved backward, loosen the head

clamp and adjustment screws and gently push
the head all the way back into the carriage; if it
must be moved forward, loosen only the clamp

screw, and then turn the adjustment screw until
the

correct

waveform

obtained.

mode

ADD (invert CHAN 2)

sensitivity
coupling

=
=

0.2 V/div
dc

sweep

A sweep

(The

adjustment screw is a vernier that only moves
the head forward; it should not be left torqued

down after this adjustment.)

time

5 ms/div

trigger

normal

source

external*

coupling

® trigger

NOTE

If the positioner is moved from cylinder
105

during the adjustment procedure,

*Use a 1:1 probe
to connect
the scope external

perform steps 8f and 8g.
10.

trigger input to AO2R2 (INDEX).

Set the exerciser Head Select toggle switch to

UPPER.

11.

10:1 prodes.)

Using a torque wrench (9605893-0-0), if avail-

able, tighten the head clamp screw until the

wrench begins to ratchet (55 ozfin.). If a torque

Momentarily set the exerciser front panel RTZ

toggle switch to RTZ.

wrench is not available, use the appropriate

Allen wrench to tighten the head clamp screw

snugly; however, do not overtighten.
12.

Connect the channel 1 probe to TP3 and the

channel 2 probe to TP4 of the G180 card. (Use

Select cylinder 105 as follows:
a.

Recheck to ensure that the clamping action did

Set the exerciser Cylinder Address-64, 32,

8 and 1 toggle switches to 1 and all other

not disturb the head adjustment.

Cylinder

Address toggle switches to 0

(cylinder 105).

6-16

Large misalignment. Head close to CYL 104.

(Further misalignment only reduces amplitude of

Head correctly aligned at CYL 105. Null
amplitudes are equal.

peaks.)

Large misalignment. Head close to CYL 106.

(Further misalignment only reduces amplitude

of peak.)

Head considerably misaligned. Smaller left null

Head slightly misaligned. Larger left null

indicates head position more than CYL 105.

indicates head position less than CYL 105.

error = +26%

error =-60%

lculate % of

N(::Ef lowi

0 calculate 7 ot error, use

the following expression.

% error = X1 ~ X; X 100
X1 T X

x = null amplitudes and the resultant sign denotes the

direction of error. A negative (-) sign indicates that
the head is too far from center (track less than 105).

Head slightly misaligned. Smaller left null
indicates head position less than CYL 105.
error =-33%

Head considerably misaligned. Larger left

null indicates head position more than
CYL 10s5.

error = +71%

Figure 6-12

2315 CE Pack Head Alignment Waveforms

6-17

b.
c.

® vertical

Set the exerciser Function knob to OSC.
Quickly set the exerciser RUN toggle
switch to RUN and back to the down
position; observe the linear positioner
moves to cylinder 105 and stops.

trigger

source

external*

coupling

slope

Set the exerciser front panel RTZ toggle switch

cylinder 0 and stops.

If the time difference of the two timing

pulses exceeds 20 us, replace one of the

Select cylinder 100 as follows:

heads to reduce the difference. Once the

difference

readjust

within
to

tolerable

achieve

limits,

average

Set the exerciser Cylinder Address-64, 32,
and 4 toggle switches to 1 and all other

70 tts between the peaks.

Cylinder Address toggle switches to O

(Cylinder Address 100).

If the average of the peaks cannot be
adjusted to 70 us, relocate the sector
transducer to the right (if the average is

too high) or to the left (if the average is

too low). Readjust R6 to achieve 70 us

Set the exerciser Function knob to OSC.

Quickly

set the exerciser RUN toggle

switch to RUN and back to the down

between peaks.

position; observe

the

linear

positioner

moves to cylinder 100 and stops.

6.2.5.2 2315 CE Pack — The procedure for adjusting
index/sector timing using the 2315 CE pack is as follows:

Monitor the scope for a single pulse followed

by a 1 ms burst of data.

Perform the RKOS Exerciser set-up procedure

(Paragraph 2.2).

Expand the sweep time to 10 us/div and check
that the single pulse occurs 70 * 10 us from the

Install a 2315 CE test cartridge on the spindle
and operate the drive in the run mode for at
least 30 minutes. This must be done to allow

start of the sweep (Figure 6-13) (this pulse may
be either positive or negative going).

the CE cartridge and the drive components to

10.

achieve thermal stabilization.

Set the exerciser Head Select toggle switch to
UPPER;

observe

scope

for

same

pulse

tolerances as step 10. If necessary, adjust R6 on

Using the WR PROT switch, place the drive in

the M7700 card (card position 2) until the

the write protect condition.

10 ms/div
normal

to RTZ; observe the linear positioner moves to

corrective actions:

=
=

10:1 probes.)

maintained. If these requirements cannot be
achieved, perform either of the following

sweep

channel 2 probe to TP4 of the G180 card. (Use

time for the two pulses is 70 us and the

Connect the channel 1 probe to TP3 and the

M7700 card (card position 2) until the average
requirement

trigger input to AO2R2 (INDEX).

UPPER; observe the same pulse tolerances as in
step 9, above. If necessary, adjust R6 on the

pulse

0.2V/div

coupling

*Use a 1:1 probe to connect the scope external

Set exerciser Head Select toggle switch to

individual

ADD (invert CHAN 2)

A sweep

Expand the scope sweep time to 10 us/div and
check that the single pulse occurs 70 + 10 us
from the start of the sweep (Figure 6-13).

70 £ 10 us

sensitivity

time
trigger

~ Observe a single timing pulse followed by data
which lags the timing pulse by 10 us (the timing
pulse may be either positive or negative going).

10.

mode

average time for the two pulses is 70 us and the
70 £ 10 us

Set the oscilloscope controls as follows:

maintained.

6-18

individual

pulse

requirements

SWEEP

VERT SENS =

Figure 6-13

If the (A) clearance is incorrect, loosen the
pivot post lock nuts and adjust the height of

receiver is precisely aligned at the factory. Since it is not
necessary to disturb the receiver alignment when per-

both posts to obtain the proper clearance. Hold
the pivot post at (x) with an adjustable wrench

forming any of the field maintenance procedures, cartridge

while loosening and tightening the lock nuts

receiver alignment is therefore not norinally required in the

(¥).

field. However, if the duckbill, airduct, or cartridge support

post are replaced, the cartridge receive- alignment must be

Lightly tighten the pivot post lock nuts and

checked. In addition, the Cartridge-On switch should also

check the following (Figure 6-15):

be checked for proper operation.

NOTE

The duckbill on later model drwves is slightly
is replaced

with

the

rails and the cartridge channel are equal,

later

and that the receiver rails are as parallel as

version, the airduct and cartridge support posts

possible to the channel.

must also

be replaced. Refer to the RKO0S5
Nllustrated Parts Manual (DEC-RKO05-IPB-1) to

identify

which

duckbill

version

being

Slide the drive out of the rick and remove the

making

top and bottom covers.

Insert a cartridge into the receiver and close the

Check

for a

.020 to

this

check,

not

push

the

receiver so hard that the pivot posts twist.

drive front door.
3.

Push the receiver all the way to one side

and ensure that there is a slight clearance

replaced.
1.

Remove the cartridge and ensure that the

clearances (B) between the upper receiver

different than the earlier models. If an earlier
duckbill

10 us/div
2Vv/div

Index/Sector Waveform

6.2.6 Cartridge Receiver Alignment
Prior to shipment of the RKOS Disk Drive, the cartridge

version

TP3& TP4

Push the receiver to the left and right and
ensure that the front receiver rail does
not touch either side of the chassis.

.040in. clearance (A)

between the plastic cartridge case and the
receiver rails (Figure 6-14). Make this measure-

Tighten the pivot post lock nuts and recheck all
clearances. There must be a clearance at points

ment towards the rear of thz receiver at a point

A, B, and C; however, it is especially critical
that clearances A and C do not exceed the
limits indicated in Figures 6-14 and 6-15.

where the plastic cartridge case passes over the
intersecting receiver rails.

6-19

DUCKBILL

POSITIONER

DISK

i
AN

‘e e

)

..~

)
.

‘_*_’

-] CARTRIDGE
:

CASE

)

(

\cmmtms

.020 MIN.

RECEIVER

.O40 MAX.

(

{

L‘M LOCK NUTS k\“ss PLATE
cp-o8ill

Figure 6-14

Cartridge to Receiver Clearance

CARTRIDGE RECEIVER PUSHED
WAY TO ONE SIDE

CHASSIS

ALL THE

C=010 TO

ALLLLLLLLLL
L L L L
L LLLL
L L

040 j

CLEARANCE

-—

%—JL
)

BASEPLATE

;

/AR
-—

—

\Tfi

# .a.f

\ CHANNEL

(

CARTRIDGE

AN
CHASSIS

Figure 6-15

Cartridge Receiver Clearances

6-20

l CLEARANCE
YaA

cP-08I12

Check for the following

points of contact

between

and

the

cartridge

the

cartridge

receiver, which indicate that the cartridge is

Check for the following points of clearance

properly seated:
a.

between

Two thin rails (These should either touch

Two cartridge posts

Access door opener bail

Spring at top center of cartridge

Duckbill (lower slot)

Airduct bridge

cartridge

and

the

cartridge

properly seated:

of the cartridge.)

the

receiver, which indicate that the cartridge is

evenly or be parallel along the full length

Airduct foam seal.

Two fat rails on top of the cartridge

Four crosspoints on the underside of the
cartridge

The pivot posts and receiver hinge bail.

The position of the pivot posts determines how
the top rails ride on the cartridge and also
determines the bottom clearance of the four
crosspoints and the underside of the carriage.

6-21

APPENDIX A

IC SCHEMATICS

The RKOS Exerciser employs sever:l types of integrated
circuit (IC) chips in its design. This appendix provides

A.1

7442 4LINE-TO-10-LINE DECODERS

detailed schematics, packaging diagrams and truth tables on
several of the more complex ICs as a maintenance

service technician.

BCD Input

The following ICs are covered in this : ppendix:

7442

4-LINE-TO-10 LINE DECODERS

7474

DUAL D-TYPE EDGE TRIGGERED

74123

MONOSTABLE MULTIVIBRATOR

FLIP-FLOPS
74193

SYNCHRONOUS 4-BIT UP/DOWN

COUNTER (DUAL CLOCK WITH CLEAR)
i

]
INPUT

TRUTH TABLE

aid to the

)moumw

Octal Output

01234567829
0111111111

1011111111

1101111111

1110111111

1111011111

1111101111

1111110111

1111111011
1111111101

1111111110

1111111111

OUTPUT
¢

i
‘
/

(4)

INPUT E'D'_‘{>"\4

o OUTPUT
2

]

‘@ OUTPUT 3

Vee

INPUTS

OUTPUTS

(s)

(

(13)
INPUT co——
De—A

[__Dv c

OUTPUT o

__}——QOUTPUT S

# o 1

=
w___Jfl__

—

ImBmB
o

b—“’W"UT 7

L L=
l

OUTPUTS

I l

GND

11-0733

(10)

pUT
OUTPUT

Ve PIN 16

GND=PIN 8

IY fi LIL
L_

; }—zz»ouwur s
-

(12)
INPUT oo——f{>
&~

]

(6)

1»-—‘-*

pi—k OUTPUT 9
1

Figure A-1

11-0736

7442 Package and Logic Diagrams

A-1

A.2

7474 DUAL D-TYPE EDGE-TRIGGERED

FLIP-FLOPS

Vcc

CLEAR

CLOCK

PRESET

8 |

“

CLEAR

—{CLOCK

PRESET

L-CLOCK

Q T

PRESET

Q
Q-

CLEAR

g
]

1
CLEAR

1
CLOCK

1
PRESET

GND

POSITIVE

LOGIC:

LOW

INPUT TO PRESET

LOW

INPUT TO CLEAR

PRESET

AND CLEAR

SETS

Q TO

LOGICAL 1

SETS Q TO LOGICAL O

ARE INDEPENDENT OF CLOCK
*1-0766

Truth Table (Each Flip-Flop)

thtl

Input

Output

Notes:

1.t = bit time before clock pulse

2. t 41 = bit time after clock pulse.

A.3

74123 MONOSTABLE MULTIVIBRATOR
1R,
et/

Vee

Cedt

{

Coext

CLEAR

r_16,,_415___11«4___‘13..__‘

—

CLEAR

cext

FUNCTIONAL

2 Rgy, GND
Cext

LOGIC/PIN LOCATOR

TRUTH TABLE

INPUTS

| OUTPUTS

| L

O
NOTE:

VI oT

H=hgh :evel (steady state), L= low level (steady state),
t: tronsition from low to high level, ¥=transition from

high

to low level,

low-leve'

puise,

_I'L_= one high-level pulse,
LI = one
X: irrelevant (any input, including transitions)

Figure A-2

8E-0516

DEC 74123 IC Illustrations

OUTPUT PULSE WIDTH
Vs

EXTERNAL TIMING CAPACITANCE
10 000

—

7 000 | V=3V

4 000

2 2 000 |-

700

200 peeade=tT

100

@(\0
AP

@{") t

1ol

Figure A-3

0\9‘ ”

‘
7

—+
T

Taz25°C
*

o 4
’

RS
100200400 1000
20 40

Cext-External Timing Copacitance-pF

DEC 74123 IC Output Pulse Width vs. External Timing Capacitance

A-3

A.4

74193 SYNCHRONOUS 4-BIT UP/DOWN COUNTER

(DUAL CLOCK WITH CLEAR)

J OR N DUAL-IN-LINE PACKAGE (TOP VIEW)
INPUTS

INPUTS

OUTPUTS

DATA

CLEAR ~——A——

BORROW CARRY

LOAD

164151413

DATA
5

Qg B

Q4%

INPUT

OUTPUTS

DATA

1049

CLEAR
8 ORROW

DATA

LOAD

COUNT COUNT

DOWN

Q¢

Qp D

GND

COUNT COUNT
T3Wn
o

INPUTS

F—

|—

OUTPUTS

LOGIC: LOW INPUT TO LOAD SETS Qq=A,Qg=B,Qc=C,AND Qpy*D

11-0640

_o BORROW

OUTPUT

]

o CARRY

OuTPUT

-l

DATA _
INPUT A ©

DOWN
COUNT

PRESET

-0 OUTPUT Q,

UpP
COUNT

CLEAR ' h

—

DATA _

INPUT B

——° OUTPUT Qg

DATA
INPUT C

PRESET
Qc

—0 OUTPUT
Q¢

dc|—
CLEAR

“\\¥ 4>___:r

DATA
INPUT O

CLEAR o—
PRESET

-0 OUTPUT
Qp

—QT

aDFfl

CLEAR

(/—‘\

LOAD o———c{:::>~
H-0641

Figure A4

74193 Logic Diagram

APPENDIX B

ENGINEERING DRAWING SET

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READER’S COMMENTS

RKO05 EXERCISER MAINTENANCE MANUAL
EK-RK05-MM-002

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