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EC-QN7MB-TE

January 1996

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Document:	21140A PCI Fast Ethernet LAN Controller Product Brief 199601
Order Number:	EC-QN7MB-TE
Revision:
Pages:	5
Original Filename:	http://bitsavers.org/pdf/dec/semiconductor/ethernet/EC-QN7MB-TE_21140A_PCI_Fast_Ethernet_LAN_Controller_Product_Brief_199601.pdf

OCR Text

Digital Semiconductor
Digital Semiconductor 21140A
PCI Fast Ethernet LAN Controller
Product Brief
January 1996

Description
The Digital Semiconductor 21140A PCI Fast Ethernet LAN Controller is a PCI
single-chip bus master, which supports direct memory access (DMA) and
provides 10Mb/s and 10/100Mb/s networks. The 21140A has several additional
features that are not available on the 21140, yet it remains pin and software
compatible with the 21140. The 21140A is fully compliant with the IEEE 802.3
100BASE-T draft for Fast Ethernet.
The integration of the 21140A provides a low-cost 10Mb/s and 10/100Mb/s
solution; it requires no external memory, and the 10/100Mb/s port contains a
complete media-independent interface (MII).

Features
• Provides standard 10/100Mb/s MII
• Contains onchip scrambler and PCS

for CAT5 for a higher integration
level of 100BASE-T solutions
• Supports full-duplex operation on both
10Mb/s and 10/100Mb/s ports
• Provides internal and external
loopback capability on both ports
• Contains a variety of flexible address
filtering modes
• Offers a unique, patented solution to
Ethernet capture-effect problem
• Contains large independent receive
and transmit FIFOs, with no additional
onboard memory required
• Includes a powerful onchip DMA with
programmable PCI burst size,
providing for low CPU utilization
• Implements unique, patent-pending
intelligent arbitration between DMA
channels, preventing underflow or
overflow
• Supports PCI clock speed frequency
from dc to 33 MHz; network
operational with PCI clock from
20 MHz to 33 MHz
• Supports an unlimited PCI burst
• Supports PCI read multiple
command*
• Supports early interrupts on transmit*
• Implements low-power management
with two power-saving modes (sleep
and snooze)*

• Supports both PCI 5.0-V and 3.3-V

signaling environments*
• Supports big or little endian byte

ordering for buffer and descriptors*
• Contains 8-bit, general-purpose

programmable register and LED
support
• Provides MicroWire interface for
serial ROM (1K and 4K EEPROM)
• Provides an upgradable boot ROM
(flash or EEPROM) interface of up to
256KB*
• Supports automatic loading of
subvendor ID configuration register*
• Implements JTAG-compatible test
access port with boundary-scan pins
• Supports IEEE 802.3, ANSI 8802-3,
and Ethernet standards
• Uses low-power, 3.3-V (CMOS)
technology

*Indicates 21140A features that are not available on the 21140.

Preliminary – Subject to Change – January 1996

21140A Microarchitecture
The 21140A has a direct interface to the PCI local bus. It communicates with the
host processor by using onchip control and status registers, and a shared host
memory area. Most of the required setup and initialization is done after
power-up. The 21140A software interface and data structures are optimized to
minimize the host CPU load and to allow for maximum flexibility in the buffers’
descriptor management. The 21140A comes with large onchip FIFOs, so no
additional onboard memory is required. The two FIFOs and the internal
microarchitecture provide complete support for full-duplex operation.
On the network side, the 21140A has separate 10/100Mb/s and 10Mb/s ports. It
provides a direct interface to the external 10/100Mb/s and 10Mb/s front-end
decoder (ENDEC), and it contains the complete MII interface. The 21140A
includes an onchip PCS and scrambler to reduce the cost of 100BASE-T (CAT5
cabling) implementation.
Figure 1 shows the functional groups of the 21140A interface pins.

Figure 1 21140A Pin Interface
10Mb/s ENDEC
Interface
7-Wire

LED Support
3

PCI Data
and Control
50

DS 21140A
PCI Fast
Ethernet
Controller

JTAG
4
Serial ROM
4
Boot ROM/External
Register
11

MII/SYM
20

GeneralPurpose Pins
8
LJ03897A.AI5

System Application Examples
The 21140A is optimized for PCI-based systems. It implements a direct interface
to 10/100Mb/s ENDEC for 100BASE-T (unshielded twisted-pair CAT5), and it
ensures complete MII compliance. The 21140A also implements a direct interface
to external 10Mb/s ENDEC (AUI and 10BASE-T).
The 21140A is a high-performance, highly integrated solution for a variety of
applications, such as:
• Cost-effective, high-performance PCI to Fast Ethernet adapter card
• PCI-based internetworking applications such as a Fast Ethernet switch or a Fast
Ethernet router port
• Low-cost Fast Ethernet bridge

Preliminary – Subject to Change – January 1996

Figure 2 shows a possible adapter design using the 21140A. This adapter is
capable of interfacing to both 10Mb/s Ethernet and 10/100Mb/s Fast Ethernet
networks.

Figure 2 10Mb/s and 10/100Mb/s Fast Ethernet PCI Adapter
PCI Bus

DS 21140A
PCI Fast Ethernet
Controller

GeneralPurpose
Pins

7-Wire Interface

ID ROM

MII Interface

ENDEC and
10Mb/s
Transceiver
and Clock
Recovery

10/100Mb/s
Transceiver
and Clock
Recovery

10Mb/s

10/100Mb/s
LJ03898B.AI5

Figure 3 shows an example of a PCI-based bridge and Ethernet switch that uses
the 21140A for the Fast Ethernet connection and several 21041 Ethernet
controllers for the 10Mb/s connections.

Figure 3 PCI-Based Bridge and Switch
Memory Bus

PCI-Based
CPU

DRAM
Memory
Optional
Cache
PCI Bus

DS 21041
Ethernet
Controller

DS 21140A
PCI Fast
Ethernet
Controller

10BASE-T

100BASE-T

Preliminary – Subject to Change – January 1996

LJ03899A.AI5

Figure 4 shows a possible implementation of a Fast Ethernet, 2-port bridge.

Figure 4 Fast Ethernet, 2-Port Bridge
Memory Bus

PCI-Based
CPU

DRAM
Memory
Optional
Cache

PCI Bus

DS 21140A
PCI Fast
Ethernet
Controller

Clock
Recovery

Transceiver

100Mb/s

Transceiver

100Mb/s

LJ03900A.AI5

Complete Solution
A 21140A evaluation board kit provides all the tools necessary for hardware
engineers to design a PCI Fast Ethernet Controller board for a variety of products.
The kit includes a PCI evaluation board with both 100BASE-TX and 10BASE-T
connections. It also includes software drivers, documentation, schematics, and
gerber files.

Preliminary – Subject to Change – January 1996

For More Information

21140A Characteristics
Characteristic

Specification

Power supply

vdd=3.3 V
vdd_clamp=5 V or 3.3 V

Operating temperature

0°C to 70°C

Storage temperature range

–55°C min, +125°C max

To learn more about the availability of
the 21140A and evaluation board kit,
contact your local semiconductor distributor. To learn more about
Digital Semiconductor’s product portfolio, contact the Digital
Semiconductor Information Line:

Power dissipation (typical)

0.5 W @ vdd=3.3 V with
33-MHz PCI clock

1–800–332–2717

Package

144-pin PQFP

Outside North America, call:
+1–508–628–4760

While Digital believes the information in this
publication is correct as of the date of
publication, it is subject to change without
notice.
© Digital Equipment Corporation 1996.
All rights reserved.
Printed in U.S.A.
EC–QN7MB–TE
Digital, Digital Semiconductor, and the
DIGITAL logo, are trademarks of Digital
Equipment Corporation.
Digital Semiconductor is a Digital Equipment
Corporation business.
IEEE is a registered trademark of The Institute
of Electrical and Electronics Engineers, Inc.
MicroWire is a registered trademark of
BankAmerican Corporation.
All other trademarks and registered trademarks
are the property of their respective owners.

Preliminary – Subject to Change – January 1996