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XX-5A1F2-AA

April 1975

44 pages

Original

11MB

Document:	AD8-A Engineering Drawings
Order Number:	XX-5A1F2-AA
Revision:
Pages:	44
Original Filename:	http://bitsavers.org/pdf/dec/pdp8/omnibus/AD8-A_Engineering_Drawings_Apr75.pdf

OCR Text

ADS-A
Engineering Drawings
Digital Equipment Corporation

The material herein is for information purposes only
and is subject to change without notice. Digital
Equipment Corporation assumes no responsibility for
any errors which may appear herein.
These drawings and specifications herein are the
property of Digital Equipment Corporation and shall
not be reproduced or copied or used in whole or in
part as the basis for the manufacture or sale of items
without written permission.
Copyright ( 1975, Digital Equipment Corporation

Idl i 191 iIt Jail 1~~~i§'~~!~~~

CUSTOMER PRINT SET INDEX

SEQUENCE

.,r

AD8 A DRAWING DIRECTORY
19 BIT ANALOG SUBSYSTEM
CONFIGURATION DRAWING
ENGINEERING SPECIFICATION
TROUBLESHOOTING
CIRCUIT DESCRIPTION
INSTALLATION/ACCEPTANCE
19 BIT A/D! AD8-A
SHIPPING LIST
SHIPPING KIT LIST

B~DD -Am~-A
A-PL-ADB-A-9
C-OC-ADS-A-!
AoSpoAD8-A-2
A-SP-AD8-A-3
A-SP-A08-A-4
A-SP-AD8-A-5
DoCS -A99a -9-1

CONN ECTOR CABLE
CABLE}BCIIL

B-IA-7011017-0-0
D-UA- BCIIL-0-¢
D-lA- 7010872- 0 -0

EXT,CLK.START CABLE'

"THIS DRAWING AHD SPECIFICATIONS HERE
ARE THE PROPERTY OF DIGITAL EQUIPMENT CORPORATION AND SHAll
NOT BE REPRODUCED OR COPIED OR
~IN PART
THF BASIS FOR THE MANUFACTURE OR SALE OF
ITEMS WITHOUT WRITTEN PERMISSION, COPYRIGHT
1974, DIGITAL EQUIPMENT CORPORATION"

DRAWING DIRECTORY
SEQUENCE

PRINT SET Ixl I

..,

.,r

PRINT SET

NS
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<:(

AD8-A

19 BIT ANALOG SUBSYSTEM

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USED ON OPTION/MODEl

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12-13-74

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SIZE CODE

B
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NUMBER

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I I I I I I

REV

ELECTRICAL

CUSTOMER
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CUSTOMER
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«I

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IJI.

DRAWING NO.

BoDD-Aoe-A

X
X

A~PL~A08~A~B

C~OC~A08~A~1

X
X
X
X
X
X
X

A~SP~AD8~AD2
A~SpeADe$A~3
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# B
# II
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DESCRIPTION

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OPTION

ii.i:

~/fU

OF
. DRAWING NO.

~E\i SHT

DATE

DESCRIPTION

DRAW INGTI IRECTORY
1B BIT ANA LOG SUBSY STEM
CONFIGURATION DRAWING
ENGINEERING SPECiFICATION
TROUBLESHOOTING
CiRCUIT DESCRTPTION
INSTALLATION/ACCEPTANCE
113 BIT AID AD8=A
SH IPP ING LI ST
SHIPPING KIT LIST
C:ONNECTEB CABLE

"# I
:B-IA 7011017-0-0
D-UA' Bell L· (/) (J
:tt I CABLE BCIIL
•D· r A-70 I 087 2- 0 - 0 ,-# I EXT. (1 K.STA"Rt CABLE
A-SP-AOO8-0-3
# 15 A008 TEST ~EDURE

tx:

OPTION

,-~-

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'--

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QJSTOMER

PRINT SET

CODES

= PRINT OF OOCUMENT INQ..UDED IN PRINT SET

s -

INCLUDES ALL PRINTS INDICATED ON OOCUMENT
CONFIDENTIAL AUTHORIZED SIGNATURE REQUIRED

1----

SIZE icODE

TITLE

10 BIT ANALOG SUBSYSTEM

IHIEET

2 Of 2

NUMBER

AD8~A

REV

ORB 108
DEC 16-(325)-1062·2S-R912

DIG I TALE QUI PM EN

ORPORATION

MAY II! A PO. MAS SAC ",j USE T T S

PAKTS H~ -'T
,')

DATE
ENG ~~.'
"--:
DATE
"$-7-:;;;~,

•

-1-

CHECKED
DATE
12-1
PROD

\..-~~.... (....,....-~- 'JII"'1\i,OiI:

<,>/ -I_ ,. J .",

f(I.,.
DATE ,, ; VI (1-, ;;1-J
,

1
2

DWG NO./PART NO.
17-00021-02
1210918-15

'Ii. - ''"

,,-

c::l

F'!;

2
1

....

1210089-6

PIN, BERG

1211166

STRAIN RELn:F

F'!;

DESCRIPTION
SHIELD
SHELL, BERG

I
ISSUED SECT.

, -.~'"

ITEM
NO.

QUANTITY /VARIATION

SECTION

-Z4

/) A

fi} rCkl"{(~

D. K. CRABBE
12/10/74

MADE BY

50
1

7¢11¢17-¢-ri

A¢¢8

FASTON JUMP8H

-- 1¢ BIT A/D, AD8-A

ASSY NO.

TITLE

•.

1¢ BIT ANALOG SUBSYSTEM
DEC FORM
ORA 110

DEC 16-(325)-I031-N870

SHEET

A PL AD8-A-¢

DIST.

REV.

NUMBER

SIZE CODE

/ l

ECONO.

"THIS DRAWING AND SPECIFICATIONS, HEREIN, ARE THE
PROPERTY OF DIGITAL EQUIPMENT CORPORATION AND·
SHALL NOT BE REPRODUCED OR COPIED OR USED IN WHOLE
OR IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE
OF ITEMS WI.I.HOUT WRITTEN PERMISSION.
COPYRIGHT \Q 1974 DIGITAL EQUIPMENT CORPORATION"

NOTES:
I.

CUSTOMER INSTALLED SHIELDS ON
BOTH SIDES OF EAC H ACbCbs p.e. BOARD.

c
k1 0

11:.1
.w.

c.:J,.

-'11 TO 4

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MS3Q)9 (DKS-AP )
c===========================~~==========================~
OPTIONAL

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FIRST USED ON OPTION/MODEL

A08-A
~

ex:

DIMENSIONS ARE

... ...

,~ .."

__ 'LLIMETER,

'X
~
0.10

VI
z z

0
Vi

INCHES

LLJ

<.9

z
'>
LLJ
<

-.5
=± 2)

THIRD ANGLE
PROJECTION

ex: I

INCHES

DATE

14-<.

12-/371

.XXX
.XX
.X

'
ANGLES

=± .005

±CO 30'

=± .02
=±.1

DATE

lootc74

CW:~: (~ J

UNLESS OTHERWISE SPECIFIED

ENG.",<

• _"~'

DATE~

PRO,}. ENG.
{/<..-

TITLE

~"IV

.-p{.,.

1·} 7)
DATE

4-[')-75

REMOVE BURRS AND BREAK SHARP
CORNERS SURFACE QUALITY V

10 BIT ANALOG

rlf.XT HIGHER ASSY.

Cb
SIZE CODE
.Li::L
..-1
'A:-"'~D'8~""A
B-DD-A08-A
'fI- -c:.:..::r~A-....!...P-=L;....;-...:..:::...:::....-.:....;.--.:.........--+------:~=_---t CAR

FINISH

.. ----1-/----

DEC FORM NO.
UI(", luv·a

SUBSYSTEM

MATERIAL S I- 1-.

l - I--

iTEM
NO.

PARTS LIST

t______~D~I~M~E~NS~I~O~NA~L~T~O~L~E~R~A~N~CE~----~DRNJ,C5~~
/

l -I--

DESCRIPTION

PART NO,

SCALE
SHEET

N ONE
I OF I

DIST.

REV.

NUMBER

A 08 -A - I
I

I I

DIGITAL EQUIPMENT CORPORATION

ENGINEERING SPECIFICATION

MAYNARD, MASSACHUSETTS

I - - - - - - - - - - - - - - -_________________
ENGINEERING SPECIF~CATION
DATE 9/16/74

~-----.--"

. . ---.-..---. --~

I-------------------.~.------.---------~

TITLE

ADS-A Engineering Specification

TITLE

1.0

CONTINUATION SHEET

INTRODUCTION

ADS-A Engineering Specification

1------------------. . _---------- ________.. __._... ____
REVISIONS

1.1

....._-DATE
--_._----

DESCRIPTI -i\j"

I----r-----------------....-------,r-----_~---_._-~.----.-

REV

DESCRIPTION

CHG NO

ORIG

DATE

APPD BY

The ADS-A (AOOS module) is a 5 volt FSR, la-bit A/D Converter
having 16 channels of input multiplexing with sample-and-hold for
use on the PDP-S Omnibus family of processors.

The device code

is selected by PC switches on the module allowing the use of multiple A/D's per system.

1.2

FEATURES
A.

Arbitrary device code selection.

Self-contained analog power supply operating from +5VDC

logic power.
C.

Double buffered data output for maximum throughput rate.

programmed unipolar/bipolar operation.

program enabled auto increment of the multiplexer register.

ADS-E compatible instruction set

Conversions may be initiated by program command, from

theD~S-AP

2.0

real time clock, or from an external source.

Compatible with H322 distribution panel.

GENERAL SPECIFICATIONS (@ 25 0 C unless otherwise specified)
2.1

INPUTS
Analog Input Impedance

(-5V~Vin~+5V):

L-----------~----~----------------~~~~~----~~~----r.-~
E~
<) '. :i-1-7S-1 ARPD " ~ __ _
SIZE \CODEI
NUMBER
i' REV

J'w . .....>"'" -*'11""

DEC

16-(392)-1079-N971

DRA 107

I ~ r:JIL>~-

.................

AD8 A 2
\

5h. I

I:!J

DEC FORM NO
DRA 108

DEC 16-(381)-1022-N370

SHEET

REV

OF~

ENGINEERING SPECIFICATION
TiTlE

EN INEERING SPE IflCATION

CONTINUATION SHEET

TITLE

AD8-A Engineering Specification

AD8-A Engineer

CONTI

UATION SHEET

Specification

Input Prot;ection:
unselected Channel

= 1000 Meg~min.
Ext.ernal Start: 47-<1..

= 10 Meg~~min.

Selected Channel

fusible* resistor guaranAnalog Input Bias Current (-5V::.'.:: Vin -::':: +5V) :
unselected Channel

= +100 nA max.
~A

Selected Channel = -2
Analog Input Voltage

lar

within 6.25 sec.

max.

Analog Inputs: lK fusi-

EXT ST

ble" resistors guaranteed

Bipolar = -2.5V to +2.5V

to open @ 70 rnA within

External Start Input Current:

6.25 sec.

OV input

(fig. 2).

FIG. 1
EXTERNAL START INPUT CIRCUIT

Guaranteed not to open

High = +1.1 mA max. @ +SV input

from -lSV to +15V input.

External Start Logic Levels:
Low = OV to +0.7V
High

47..1i..

from -3V to +8V input.

= OV to +5V

(fig. 1).

Guaranteed not to open

(FSR):

Low = -3.2 mA max.

+SV

teed to open @ 325 rnA

*lK

= +2V to +5V

-6V
FIG. 2
TYPICAL ANALOG INPUT CIRCUIT

I
DEC FORM NO
DRA 108

DEC 16-(381)-1022-N370

SHEET

NUMBER

REV

OF 13

AD8--A-2
DEC FORM NO
ORA 108

DEC 16-(381)-1022-N370

SHEET _4_ OF

ENGINEERING SPECIFICATION
TiTlE

ENGINEERING SPECIFICATION

CONTINUATION SHEET

TITLE

ADS-A Engineering Specification
2.2

CONTINUATION SHEET

AD8-A Engineering Specification
FIGURE 3

CODING

TIMING DIAGRAM
start L --------~t_J~------------------~5f
UNIPOLAR
INPUT Jy}_ .... _

c-OCT A1 CO D E

+5 - 1 LSB

o 77

+2.5

0000

7000**

AD Done H __________ LI---~--------4S5'-_ _----'

1 r

MUX Change H

-fl
~ S ~~~c 11~

L-----------------------~SS~--------------

Hold L

BIPOL~

INPUT (V)

~I------------~S~f----~I

~
·-1

OCTAL CODE

+2.5 - 1 LSB

0777

0000

-2.5

7000**

CONV. == 0 if no MUX
DELAY
Change

EN AD L

~--------~~~s----~I

AD CLK H
2

** The three MSB's of the output data are tied together

r- ~sec 1 I

PERFORMANCE
Accuracy: 0.1% of FSR (1 LSB)
Linearity: 0.05% of FSR

SAR

pp~/oC

Linearity

(~LSB)

------------------!5~.

LSB

Temperature Coefficients:
Gain

~sec

l.JLrLIL
I I

u ____ ~~ __________ :

MSB

2.3

I I

max.

EOCP L

25 ppm/oC max.

Noise:
~

LSB rms max.
LD BUF H

1/15 LSB rms typical
warmup Time

~sec1 ~I

------------------!f~

5 minutes max.

SIZE ICODEI

DEC FORM NO
ORA 108

2 ~sec
rL 0 toSync.

DEC 16-(381)-1022-N370

N~~MBER
ADS-A-<c
SHEET

NUMBER

REV

ADS-A-2
DEC FORM NO
DRA 108

DEC 16-(381)-1022-N370

SHEET __6__ OF 13

ENGINEERING SPECIFICATION
TITLE

ENGINEERING SPECIFICATION

CONTINUATION SHEET

TiTlE

AD8-A Engineering Specification
2.4

AD8-A Engineering Specification
2.5

TIMING (fig. 3)

POWER REQUIREMENTS
+5V DC ~5% @ 3.25 A.max.

Discrete (nominal):
A.
(8

MUX and S & H settling delay
~sec

= 11 ~sec from channel change

2.6

ENVIRONMENTAL SPECIFICATIONS (ref. DEC STD. 102, Class C)
Operating Environment:

by removing jumperW3 if channels are all unipolar

or all bipolar)

= SoC to 50°C system ambo

Temp. range

5°C to 70°C module ambo
to 9~/o

= 4 ~s

Humidity =

(clock dependent)

Storage Environment:

l~/o

Same channel re-acquisition

AID Sync-up = 0-2

Hold delay

= 2 ~sec

(clock dependent)

Temp. range

Conversion

= 20 ~sec

(clock dependent)

Humidity = 95% max.

~sec

2.7
Start to AID done

CONTINUATION SHEET

= -40°C to +66°C

PACKAGING

(nominal):
The AD8-A is a single A008 quad size module which mounts

Same Channel:
on to a PDP-8 Omnibus.
B + C + D + E = 26 to 28

Included with this option are two RFI

~sec

shields which should be mounted one on each side of the A008
Different Channels:
module.

~or

improved performance it is recommended that at

Mixed unipolar & Bipolar (W3 in)
least one slot adjacent to each side of the A008 be left empty,
Al + C + D + E = 22 to 35 ~sec
(AI = 0 to ll~sec)
All Unipolar or Bipolar (W3 out.)

or that the A008 be the last module onthe bus assembly with the
adjacent slot left empty.

A2 + C + D + E = 22 to 32
(A2 = 0 to 8 ~sec)

~sec

One Berg connector (Jl) provides access to the analog in-

Clock Dependent Times:

puts.

Table 1 shows the pin assignments for Jl.

1wo tabs on

Accuracy = +6% with supply @ +5V
the A008 (which are disabled .when not connected) provide the

+8% with supply from +4.75 to +5.25

input start signal from the DK8-AP.

Temperature Coefficient = 650 ppmloc max. @ constant
supply voltage

\
DEC FORM NO
ORA 108

DEC 16-(381)-1022-N370

SIZE ICODEI

NUMBER

AD8-A-2
SHEET

REV

\
DEC FORM NO
ORA 108

DEC 16-(381)-1022-N370

SIZE ICODEt

I REV

NUMBER

AD8-A-2
SHEET

ENGINEERING SPECIFICATION
TITLE

mllJDII

...

ENGINEERING S

CONTINUATION SHEET
IFICATIO
~------------------------------------------------------------------------~
TITLE
AD8-A Engineering Specification

CONTINUATION SHEET

AD8-A Engineering Specification
-

3.0

A/D SPECIFICATIONS

TABLE 1
Resoluti0 n •

10 bits (1 part in 1024)

CONNECTOR Jl
Differential Linearity:
PIN
-

SIGNAL

Guaranteed:

9~/o of states within +~ LSB.
85% of states within +\ LSB.

Typical:

K, M, W, Y , AA,
EE,

HH,

KK,

ANALOG GND

L
N
P,

No skipped states;
95% of states within +~ LSB.

CHAN 17
CHAN 16
S

4.0

LOGIC GND

R
T

SAMPLE-AND-HOLD SPECIFICATIONS
Tracking:

CHAN 15
CHAN 14

S::nall signal bandvlidth = 700 KHZ typical
U

EXT ST L

V
X

Slew rate = IV/~sec typical

LL
NN

CHAN 13
CHAN 12
CHAN 11
CHAN 10'
CHAN 0'7
CHAN 0'6
CHAN 0'5
CHAN 0'4
CHAN 0'3

--13V (for test only)

CHAN

+13V (for test only)

-80 db @ 1 KHZ

CHAN 0'1

-20 db/decade roll-off

+5V HQ @ 20 rnA

CHAN

BB
DD
FF
JJ

IA I I
SIZE CODE
SP

DEC FORM NO
DRA 108

DEC 16-(381)-1022-N370

Aperture:

5.0

0'2

Delay

= 200 nsec max.

Jitter

1 nsec max.

MULTIPLEXER SPECIFICATIONS
switching:

break-before-make

Channels:

16 non-expandable single-ended inputs

Crosstalk:

0'0'

NUMBER
AD8-A-2
SHEET

REV
13

\
DEC FORM NO
ORA 108

DEC 16-(381)-1022-N370

SIZE TCODEI

A I

NUMBER
ADS-A-2
SHEET 10

·l REV
OF

...

CIFICATION

ENGINEERING S

CONTINUATION SHEET

TiTlE

ification

CONTi

ADS-A

Specification

STERS
it 5) when set = 1 from the AC will

AID

TMG
ERR

DONE
INT

ERR
INT
EN

EXT
ST
EN

INC
EN

.-r-'

UNIPOLAR

TEST
BI'l'

11
~~
I

the MUX REGISTER to the next;

1-'-'- - -

MSB

LSB

of each conversion.

I
--,.----------.-.~oIoE_- Mu 1 tip 1 ex e r__,.-J
Register

= 0 from the AC the

it 6) when set

When set = 1 the

in bipolar mode.
ster (AC bits

The MUX REGIS'1'ER

from 17.

i st er

status

0' & 1)

mode.
is set = 1 when a conversion is completed.

6.3
buffer is

it 1) is set

~sec

MULTIPLEXER REGISTER

bits S thru 11)

The mult

later.

= 1 when a start conversion is at~
dicates the current channel be

monitored

Ie a conversion is in progress, or when the
One of 16 channels is selected by load
while a read buffer command (ADRD) is

ffer is

(¢¢ - 17 octal)

into this

the c

ster.

process.
ister

Enable

NOTE:

bits 2 thru 7)
~ Nhen

All ADS-A

sters are cleared

ted INITIAI,IZE.

set = I from the AC will enable the
7 .0

line to interrupt when AID DONE is set.
it 3) when set = I from the AC will enable the

PROGRAMMING
Eight instructions are used to program the ADS-A.

code

ST line to interrupt when TMG ERR is set.

(XY)

is preset

the user using switche

(AOOS module) .

= 1 from the AC will enable the

EXT

it 4) when set

external

start conversion circuit to initiate conversions

CLEAR ALL (ADCL) - 6XYj,'1
Clear STATUS, ENABLE, and MUX

from the DKS-APJr an external source.

sters.

- 6XYl

Load MUX REGISTER from the AC, then clear the AC.
NUMBER

ADS-A-2
DEC FORM NO

DEC 16-(381)-1022-N370

SHEET 11

DEC FORM NO
DRA 108

DEC 16-(381)--1022-N370

EET

ENGINEERING S
TITLE

AD8-A Engi
START CONVERSION

CONTINUATION SHEET

specification
) - 6XY2

( '"'lr AID DONE and ERROR flags (STATUS REGISTER), then initiate a conversion on the current channel.
READ AID BUFFER

) - 6XY3

Transfer the con-tents of the AID BUFFER into the AC (bits

o thru 2 are the MSB) , and clear the AID DONE flag.
(ADSK) - 6Xy4
Skip the next instruction if the AID DONE flag

Skthe next instruction if the TMG ERR flag

= 1.

(ADLE) - 6XY6
Load the ENABLE REGISTER from the AC,

then clear the AC.

READ REGIS'I'ERS (ADRS) - 6XY7
Transfer the STATUS, ENABLE, and MUX registers into the AC.

NUMBER

REV

AD8-A-2
DEC FORM NO
DRA 108

DEC 16-(381)-1022-N370

SH EET ..lL OF --1.L

DIGITAL

QUIPMENT CORPORATION
MAYNARD, MASSACHUSETTS

1--------------------------,----------------,,---

NG SPECIFICATION

DATE 4/1

AD8-A TROUBLESHOOTING PROCEDURE

TITLE

1.0

SCOPE

AD8-A TROUBLESHOOTING PROCEDURE

This document covers troublshoot

procedure

REVISIONS
DESCRIPTION

CHG NO

ORIG

DATE

APPD BY

DATE

module

system.

converter with s
ion,

The

consist

and-hold.

Since

i't also contains an Omnibus interface.

from the +5V processor power

draws power

a dc-to-dc converter to

2.0

power for the