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February 1964

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Document:	F-61 PDP-6 Brochure 196402
Order Number:	XX-86073-A6
Revision:
Pages:	12
Original Filename:	http://bitsavers.org/pdf/dec/pdp6/brochures/F-61_PDP-6_Brochure_196402.pdf

OCR Text

F-61
2/ 64

SYSTEM
DESCRIPTION

DIGITAL EQUIPMENT CORPORATION

•

MAYNARD, MASSACHUSETTS

PROGRAMMED DATA PROCESSOR - 6
36-bit word length
15 index registers and / or 16 accumulators
FORTRAN II - Macro assembler- utility programming library
memory protection and program relocation for multiprogramming and time sharing
asynchronous operation - modular construction
262,144-word directly addressable memory (2 µ.sec and 0.4 µ.sec)
memory overlap
363 instructions
fast floating point arithmetic: floating multiply average 14 µsec
program-assignable operation codes
seven-channel priority interrupt system
byte manipulation - half-word - block transmission
128 input/ output devices
programmed input/ output transfers require no data channels
multiple processors
remote input / output
mass memory
Micro Tape

i •.•

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Figure 1

Programmed Data Processor-6

PDP-6 SYSTEM DESCRIPTION
Summary
Programmed Data Processor-6 (PDP-6) is a general-purpose digital computing system
designed for scientific data processing. The flexibility of this system permits the
user to specify the data handling capacity and the exact configuration needed to
meet his requirements . The system can be expanded with presently available
equipment or, at a later date, with equipment yet to be developed. Faster memories,
for example, can be added as they become available.
The PDP-6 system consists of processors, memories, and input / output devices.
Since each is autonomous (no device is dependent upon another for its timing), a
system configuration can include memory modules of different speeds, processors
of different types sharing the same memory modules, and standard or unique
input/output devices. All of the hardware necessary for time-sharing is built into
PDP-6.
For maximum flexibility in system configurations, the PDP-6 system is built around
two busses: processor-memory bus and processor-input / ouput bus. The memory bus
permits each processor to directly address 262,144 words of core memory, automatically permits overlapping, and simplifies multiprocessor operation. An input/
output bus of a processor can service up to 128 devices.
Programming systems include a Monitor, Symbolic Assembler and Macro Processor,
FORTRAN 11 Compiler, Debugging Aids, and a library of general utility programs.

Processors
A PDP-6 system can include any number of processors of the same or different types.
The Type 166 is a 36-bit arithmetic processor with many powerful features , including
16 accumulators, 15 index registers, built in floating point arithmetic, and byte
operations capability. Memory protection and relocation registers are included for
time-sharing operations.
The Type 167 Drum Processor transfers data directly between mass memory and
core memory, the arithmetic processor supplying only block or job control information. The characteristics of the drum system include a transfer rate of one 36-bit
word in 6.4 microseconds and a total storage of 4,194,304 words on four drums.

Memory
The PDP-6 core memory subsystem permits modular expansion using blocks of
different sizes and speeds . The Type 1638 Core Memory Module (8,192 words) and
the Type 163C Core Memory Module (16,384 words) have a word length of 36 bits, a
cycle time of 2 microseconds, and an access time of 0.8 microseconds. The Type 162
Fast Memory Module contains 16 words with a 0.4-microsecond cycle.
The memory processor bus permits memory cycle overlap, gives al l processors direct
access to memory simultaneously, and permits easy expansion and modification of
the memory subsystem. Memory modules are time-independent of processors, per-

mitting a processor to put a word on the bus and resume operations without waiting
for memory to write the word. When reading a word, the processor takes the information from the bus and operates on it immediately, without waiting for the memory
to rewrite.
Maximum system efficiency is achieved when sequential memory references address
alternate memory modules. The addressed module places data on the bus as soon
as it is available in the memory buffer and disconnects itself from the bus while
rewriting, freeing the processor to store the resu It or seek the next instruction in a
second memory module before the first one has completed rewriting. Utilizing such
overlapping memory references, PDP-6 users can effectively cut in half the time
required for average random accesses. Multiple connections between the bus and
each memory module permit module sharing on a priority basis for multi-processor
operations.

Input/Output
The input/output bus consists of device selection, data, control, and status sense
lines. A seven-channel program-assignable priority interrupt system signals the
processor when input / output devices require service. Word count and memory
address registers are located in the processor and are available to all devices. This
reduces the cost of various input / output controls, and data block transfers may be
performed between tapes, card readers, printers, displays, and other devices where
a block transfer may be advantageous.

Program Preparation
PDP-6 design eliminates the need for off-line conversion equipment. Conversion
of programs from cards or paper tape to Micro Tape is done within the Monitor (see
below) concurrent with normal program running. The Monitor also controls outputs
to line printer from Micro Tape. Users at peripheral Teleprinters can simultaneously
prepare and debug their programs on line. The Monitor and memory protectionrelocation registers protect each user's storage from others.

Programming System
The basic programming system for the PDP-6 consists of a Monitor, Symbolic Assembler and Macro Processor (MACR0-6), FORTRAN II Compiler, Debugging Aids,
and Library. The entire system is designed to run on any PDP-6 with 16,384 words
of memory and a Micro Tape Dual Transport and Control. The programming system
is designed to take full advantage of whatever features are available in larger
systems.

INPUT I OUTPUT BUS

DISPLAY
.....- CONTROL
AND
MONITOR
346

TELEPRINTER
INTERFACE
630

DISPLAY
MONITOR
~
343

.,__

DISPLAY
MONITOR
343

DATA
CONTROL
136

TTY
LINE

MAG
TAPE
TRANS
570

PERFORATED TAPE
PUNCH
761

PERFORATED TAPE
READER
760

CONSOLE
TELEPRINTER

63.3 CPS
PUNCH

400 CPS
READER

t
I

100 CPM
PUNCH

1000 LPM
PRINTER

200
CPM
READER

DATA
CONTROL
136

MICROTAPE
CONTROL
551

.__
1

MICROTAPE
TRANS
555

MAG
TAPE
TRANS
570

MICROTAPE
TRANS
555

I
I II I I
I
I
I

I I

MEMORY
MODULE
163C

DRUM
CONTROL
236

DRUM

I-

DRUM

..........

MEMORY
MODULE
163C

DRUM

L-

MEMORY
MODULE
163C

DRUM
PROCESSOR
167

I
I
I

CARD
READER
461

TELEPRINTER
CONTROL
626

ARITHMETIC
PROCESSOR
166

PROCESSORMEMORY BUS

TTY
LINE

MAGNETIC
TAPE
CONTROL
516

....._

CARD
PUNCH
460

LINE
PRINTER
680

......

t--

OTHER
PROCESSORS
I I

I
I
L-----~
IL _______

DRUM

MEMORY
MODULE
163C

t--

TYPE 166 ARITHMETIC PROCESSOR
The Type 166 Arithmetic Processor is a general purpose processor capable of
performing arithmetic, logical and input / output operations. It uses the first 16
locations in memory as accumulators, index registers, or ordinary memory locations.
The results of each operation are transmitted automatically to one of these registers
at the end of each instruction; thus the accumulator resides in memory. Instruction
times vary, depending on the memory subsystem selected. Use of the Type 162 Fast
Memory reduces instruction times significantly.

The 363 operation codes include fixed and floating point arithmetic, logical or
Boolean , memory or accumulator modification and testing, half word, variable sized
byte, block transmission, and input / output instructions. Table 1 summarizes instruction categories.

TABLE 1

SUMMARY OF INSTRUCTION CATEGORIES

Category

Total
Instructions

Operations

Modes

Data Transmission
full word
half word
byte manipulation
block transfer
exchange

4
16
5
1
1

4
4

16
64
5
1
1

Arithmetic and Logic
fixed-point
floating-point
Boolean
shifting

6
8, 1
16
6

4
4
4

24
33
64
6

127

137

Executive
memory and accumulator
modification and testing
arithmetic compare
logical compare
jumping
miscellaneous

6
2
16
8
1

Input/Output
basic
augmented

4
4

Push Down

8
8
4

48
16
64
8
1
8

4
363

INPUT /OUTPUT EQUIPMENT
Digital offers a large selection of optional equipment for full utilization of the extensive
input/output capacity of the system.
MICRO TAPE TRANSPORT TYPE 555
A fixed address m.agnetic tape facility for high speed loading, readout, and on-line
program debugging. Read , write, and search speed is 80 inches a second. Density
is 375 bits an inch . Total storage is three million bits. Features phase recording,
rather than amplitude recording; redundant, nonadjacent data tracks, and a prerecorded timing and mark track.
MICRO TAPE CONTROL TYPE 551
Controls up to eight Type 555 Micro Tape Transports. Searches in either direction
for specified block numbers, then reads or writes data. Uses the Type 136 Data
Control to assemble data and buffer transfers to the processor.
DATA CONTROL TYPE 136
Provides for assembly of 6, 12, 18, or 36-bit characters; six input/output devices
can be controlled .
TELEPRINTER AND CONTROL TYPE 626
Permits on-line programming and debugging. Provides hardcopy outputs. Is standard
Teletype equipment, operating at ten characters a second.
TELEPRINTER INTERFACE TYPE 630
Automatically scans up to 64 teleprinter (TTY) lines. Signals a program interrupt
when teleprinter needs service.
CARD PUNCH CONTROL TYPE 460
Permits on-line punching of cards in any format, including IBM, at 100 or 300
cards a minute.
CARD READER AND CONTROL TYPE 461
Provides on-line reading of standard punched cards at 200 or 800 cards a minute
in alphanumeric or binary codes.
HIGH SPEED PERFORATED TAPE PUNCH AND CONTROL TYPE 761
Punches 8-hole tape at 63.3 characters a second.
HIGH SPEED PERFORATED TAPE READER AND CONTROL TYPE 760
Reads perforated paper tape photo-electrically at 400 characters a second.
MAGNETIC TAPE CONTROL TYPE 516
Automatically controls up to eight tape transports Type 570 or IBM 729 series. Permits
reading, writing, forward / backward spacing, rewind and unload, and rewind. Uses a
Type 136 Data Control to assemble data and buffer transfers to the processor.
Longitudinal and lateral parity is checked.

·®·

Micro Tape and Tape Reader

'Analog-Digital-Analog Converter

High Speed Light Pen

Automatic Line Printer

Magnetic Tape Transport
10

Card Reader and Control

MAGNETIC TAPE TRANSPORT TYPE 570
Tape motion is controlled by pneumatic capstans and brakes, eliminating conventional
pinch rollers, clamps, and mechanical arms. Tape speed is either 75 or 112.5 inches
a second. Track density, program-selectable, is 200 and 556 bits an inch. Tape width
is one-half inch, with six data tracks and one for parity. Format (200 and 556-bit
densities) is compatible with the IBM 727 and 729 series. Dual heads permit read
checking while writing.
DRUM PROCESSOR TYPE 167
Establishes a data transmission path between main memory and the drum(s). Up to
four drums can be connected to the drum processor.
MAGNETIC DRUM AND CONTROL TYPE 236
Drum stores 1,048,576 36-bit words organized into 128 tracks, each with 8192
words consisting of 64 128-word blocks. A word is transferred in 6.4 microseconds,
and the drum revolution time is 52 milliseconds.
DISPLAY CONTROL AND MONITOR TYPE 346
Plots points, lines, vectors, and characters on a 93/s-inch-square raster of 1024
points along each axis. Time between points plotted is 1.5 microseconds in the vector,
increment, and character modes. In random point plotting, a time of about 35
microseconds is required per point.
DISPLAY MONITOR TYPE 343
Provides additional cathode ray tube display for multiple consoles.
HIGH SPEED LIGHT PEN TYPE 370
Detects data displayed by the Types 346 and 343 and inputs identifying signal to
the computer.
AUTOMATIC LINE PRINTER AND CONTROL TYPE 680
Prints 1000 lines a minute, 120 columns a line, any one of 64 characters a column.
AUTOMATIC LINE PRINTER AND CONTROL TYPE 64
Prints 300 lines a minute, 120 columns a line, any one of 64 characters a column.
ANALOG-TO-DIGITAL CONVERTER TYPE 138
Transforms an analog voltage to a binary number, selectable from six to eleven bits.
Conversion time varies, depending on the number of bits and the accuracy required.
Twenty-one combinations of switching point accuracy and number of bits can be
selected on the front panel.
MULTIPLEXED ANALOG-TO-DIGITAL CONVERTER TYPE 138/139
The Type 139 Multiplexer Control permits up to 64 channels of analog information
to be applied singly to the input of the Type 138 Analog-to-Digital Converter.
Channels can be selected in sequence or by individual addresses.
HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER TYPE 142
Transforms an analog voltage to a signed, 10-bit binary number in 6 microseconds.
Conversion accuracy is ± 0.15% ± 1/ 2 least significant bit.
ANALOG-DIGITAL-ANALOG CONVERTER SYSTEM TYPE ADA-1
Performs fast, real-time data conversion between digital and analog computers.
Maximum sample rate for D/ A conversion is 200 kc ; for A/ D and interlaced conversions, 100 kc. Digital word length is 10 bits. Actual conversion times are 5
microseconds for A/ D and 2 microseconds for D/ A. Semiautomatic features enable
the converter system to perform many of the functions that a computer normally
performs for other converter interfaces.
11

INSTRUCTION TIMES
Table 2 summarizes instruction times for each group of instructions. Two times
are given, a fast time and a slow time. The fast times are based on starting with
instruction and data in fast memory. The slow times are based on starting with
both instruction and data in the same core memory and allow for one index reference. The fast times are not necessarily minimum, since instructions in the immediate mode may run faster. Nor are the slow times maximum times, since an
instruction may take considerably longer if there are several levels of indirect
addressing. Exact times depend on the program context in which the instructions
occur and on other factors. Therefore the figures should not be used to calculate
program running time.

TABLE 2 SUMMARY OF INSTRUCTION TIMES
Instructions

Fast

Slow

Full and half word moves
Full and half word immediate
Byte manipulation
Byte manipulation and increment
Block transfer
Exchange

1.9
1.5

4.0

5.7
l.5+0.8n
2.8

8.0
8.0
2.4+1.2n
4.0

2.7

4.3

2.9
14.5

7.2

2.7

Fixed point add
Fixed point subtract
Fixed point multiply
Fixed point divide

23.4

4.5
16.1
25.0

Floating point add
Floating point subtract
Floating point multiply
Floating point divide

5.8
6.0
12.4
18.4

8.0
8 .2
14.5
20.5

Boolean

2.7

4.3

Shifting (18 bits)

4.7

5.9

Memory, AC modification and testing
Arithmetic compare
Logical compare
Jumping

2.6

3.9
4.4
4.4
3.0

2.7
2.7
1.8

1/0
basic
augmented
Push down

3.0
3.8

6.2

3.1

6.4

7.0

mnmnomn

3572

PRINTED IN U.S.A.

25-4/ 64