Digital PDFs

DEC-15-GWSB-D

January 1971

62 pages

Original

5.4MB

Document:	Graphic-15Ref
Order Number:	DEC-15-GWSB-D
Revision:
Pages:	62
Original Filename:	http://bitsavers.org/pdf/dec/pdp15/hardware/DEC-15-GWSB-D_Graphic-15Ref.pdf

OCR Text

Digital Equipment Corporation
Maynard, Massachusetts

PDP-15 Systems

Graphic-15
Reference Manual

DEC-lS-GWSB-D

PDP-15

GRAPHIC-15
REFERENCE MANUAL

DIGITAL

EQUIPMENT

CORPORATION • MAYNARD, MASSACHUSETTS

1st Edition 1970
2nd Printing January 1971

The material in this manual is for information purposes and is subject to change without notice.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts:
DEC
FLIP CHIP
DIGITAL

PDP
FOCAL
COMPUTER LAB

CONTENTS
Page
CHAPTER 1

GENERAL INFORMATION

1.1

General

1-1

1.2

Purpose of the Equipment

1-1

1.3

System Description

1-1

1 .3. 1

VT 15 Graph i c Processor

1-2

1.3.2

VT04 and vr07 Graphi c Display Consoles

1-2

1.4

Equipment Options

1-3

1.4. 1

VL04 Light Pen Option

1-3

1.4.2

W15 Arbitrary Vector Generator

1-3

1.4.3

'NI01 Sonic Digitizer Writing Tablet

1-3

1.4.4

LK35 Keyboard Option

1-3

1.4.5

VM 15 Display Console Multiplexer

1-3

1.5

Functional Description

1-4

1.5. 1

Data Collectors

1-5

1.5.2

Timing and Control

1-5

1 .5.3

Position and (). Registers

1-7

1.5.4

Digital-to-Analog Converters

1-7

1.5.5

Analog Function Generator

1-8

CHAPTER 2

VT15 GRAPHIC PROCESSOR INSTRUCTIONS

2. 1

Introduction

2-1

2.2

Display Capability

2-1

2.3

The VT04 CRT Display

2-1

2.3.1

The Addressable Coordinates

2-2

2.3.2

Visible Image Area

2-3

2.4

Input/Output Transfer (lOT) Instructions

2-3

2.4.1

lOT Instruction Format

2-3

2.4.1.1

Computer Operati on Code

2-4

2.4.1.2

Device Selection Code

2-4

2.4.1.3

Subdevice Selection Code

2-4

2.4.1.4

Accumulator Clear

2-4

2.4. 1.5

lOP Code

2-4

2.4.2

Read Status 1 (RS1)

2-5

2.4.3

Read Status 2 (RS2)

2-6

iii

CONTENTS (Cont)
Page
2.4.4

Read Status 3 (RS3)

2-6

2.4.5

Read X Position Register (RXP)

2-6

2.4.6

Read Y Position Register (RYP)

2-7

2.4.7

Read Program Counter (RPC)

2-7

2.4.8

Skip lOT Instructions

2-7

2.4.9

Operate lOT Instructions

2-8

2.4.10

Miscellaneous lOT Instructions

2-10

2.5

vr 15 Graph i c Processor Instruction Set

2-11

2.5. 1

Character Input Instructi on

2-12

2.5.2

Character String Instruction

2-14

2.5.3

Point/Graph Plot Instruction

2-15

2.5.3.1

Point Plot

2-15

2.5.3.2

Graph Plot

2-16

2.5.4

Parameter/Skip Instruction

2-17

2.5.4.1

Parameter 1

2-18

2.5.4.2

Parameter 2

2-19

2.5.4.3

Parameter 3

2-22

2.5.4.4

Skip 1

2-24

2.5.4.5

Skip 2

2-25

2.5.5

Save/Restore Instruction

2-26

2.5.6

Basic Vector Instruction

2-27

2.5.7

Basi c Short Vector Instruction

2-28

2.5.8

Jump/Jump-to-Subroutine Instruction

2-29

2.5.9

Slave Instruction

2-30

2.5. 10

Arbitrary Long Vector Instruction

2-30

2.5.11

Arbitrary Short Vector Instruction

2-31

CHAPTER 3

PROGRAMMING EXAMPLES

3. 1

Introduction

3-1

3.2

MACRO-15 Mnemonics

3-1

3.3

Microcoding Instructions

3-1

3.4

Bas i c Square

3-5

3.4.1

Relocation

3-6

3.4.2

Increase Intensity and Size

3-6

CONTENTS (Cont)
Page
3.4.3

Blink

3-7

3.4.4

Parameter 3 Modifi cati on

3-7

3.5

Character Input

3-8

3.6

Display Fi Ie Chains

3-9

APPENDIX A

WORD FORMATS

A. 1

lOT Status Word Formats

A-1

A.2

Vf 15 Instruction Set

A-2

APPENDIX B

EIGHT-BIT ASCII OCTAL CHARACTER CODES

B-1

ILLUSTRATIONS
Title

Figure No.

Art No.

Page

1-1

Type Vf15 Graphic Display System

1-2

Basi c Graphic-15 Display System, Block Diagram

15-0615

1-4

1-3

VT15 Graphic Processor, Simplified Block Diagram

15-0592

1-5

2-1

Visible Image Areas Display CRT

15-0624

2-2

Relative Paper Size Dimensions

15-0625

2-2

2-3

lOT Instruction Format

15-0607

2-4

Status 1 Word Format

15-0601

2-5

Status 2 Word Format

15-0602

2-6

Status 3 Word Format

15-0603

2-6

2-7

Read X Position Word Format

15-0604

2-7

2-8

Read Y Position Word Format

15-0605

2-7

2-9

Program Counter Word Format

15-0618

2-7

2-10

Set Initial Conditions Word Format

15-0598

2-9

2-11

VT15 Graphic Processor Instruction Format

15-0620

2-11

2-12

Character Input Instructi on Bit Format

15-0608

2-12

2-13

Character Generation Format

15-0621

2-13

2-14

Character Stri ng Instructi on Bit Format

15-0606

2-14

2-15

lOPS Character Format

15-0622

2-14

2-16

Point/Graph Plot Instruction Bit Format

15-0599

2-15

2-17

Parameter Instruction Bit Formats

15-0597

2-17

2-18

Screen Edge Violation Examples

15-0609

2-21

ILLUSTRATIONS (Cont)
Figure No.

Title

Art No.

Page

2-19

Skip Instruction Bit Formats

15-0600

2-23

2-20

Save/Restore Instruction Bit Format

15-0616

2-27

2-21

Save/Restore Instruction Status Format

15-0617

2-27

2-22

Basic Vector Instruction Format

15-0595

2-27

2-23

Basic Vector Directions

15-0623

2-28

2-24

Basi c Short Vector Instruction Bit Format

15-0613

2-29

2-25

Jump/Jump-to-Subroutine Instruction Bit Format

15-1614

2-29

2-26

Slave Instruction Bit Format

15-0610

2-30

2-27

Arbitrary Long Vector Instruction Bit Format

15-0611

2-31

2-28

Arbitrary Short Vector Instruction Bit Format

15-0612

2-31

3-1

Basi c Square

15-0586

3-6

3-2

Relocation

15-0587

3-6

3-3

Increase Intensity and Size (Parameter 1)

15-0588

3-7

3-4

DASH3 Modification (Parameter 3)

15-0590

3-8

3-5

Character Input

15-0589

3-9

TABLES
Title

Table No.

Page

2-1

Read Status 1 Word Bit Functions

2-5

2-2

Read Status 2 Word Bit Functions

2-6

2-3

Skip lOT Instruction Set

2-8

2-4

Operate lOT Instruction Set

2-9

2-5

Significance of Set Initial Conditions Word Bits

2-9

2-6

Miscellaneous lOT Instruction

2-11

2-7

Parametri c Variables

2-18

2-8

Line Pattern Codes

2-23

2-9

Skip Instruction Variables

2-24

2-10

Pushbutton Bank Address Codes

2-25

3-1

Instruction Mnemonics

3-2

INTRODUCTION

The purpose of this reference manual is to familiarize the Graphic-15 Display System user with the
purpose and use of the Graphic-15, describe the VT15 lOT instructions and display file instructions,
and provide a brief description of programming at the machine-language level.
Additional reference manuals and maintenance manuals related to the Graphic-15 Display System are

I isted in the following table.

Document Number

Title
Graphic-15 Programming Manual

DEC-15-ZFSA-D

Vf15 Graphic Processor Maintenance Manual

DEC-15-H2JB-D

VT04 Graphic Display Console Maintenance Manual

DEC-15-H2GA-D

PDP-15 Systems Reference Manual

DEC-15-BRZC-D

PDP-15 Interface Manual

DEC-15-HOAB-D

PDP-15 System Maintenance Manual

DEC-15-H2BB-D

PDP-15 Operator's Guide

DEC-15-H2CB-D

vii

Figure 1-1

Type VT15 Graphic Display System

CHAPTER 1
GENERAL INFORMATION

1.1

GENERAL

This chapter provides a physical and brief functional description of the equipment comprising the
Graphic-15 Display System and its interfacing arrangement with the PDP-15 Programmed Data
Processor •

1.2

PURPOSE OF THE EQUIPMENT

Common applications of the Graphic-15 Display System permit immediate solution of a broad range of
electrical, physical, and mechanical design and analysis problems. While there can be little doubt
about the value of the computer in solving complex design problems, the graphic display system
accelerates the exchange of data between the user and the computer. Visualization of a problem,
whether it be a simple curve that displays the interaction of system variables or a complex network
synthesis, permits rapid selec tion of new parameters or variabl es so that compl ex changes - the computer does the math - need not require laborious reprogramming.

The VTl5 Graphic Processor is an

ancilliary to the basic PDP-15 computer that permits the user to create a visual model of an electrical,
hydraulic, mechanical, or other physical system while the computer operates on its mathematical
counterpart.

Thus, parameters that define a point outside a curve can be immediately displayed as

irrelevant data, the change in the cross section of a beam can immediately reveal its ability to withstand a given load., and a change in the value or placement of a resistor in a network synthesis can
immediately demonstrate the relative stability of an electrical circuit.

1.3

SYSTEM DESCRIPTION

The Graphic-15 Display System (Figure 1-1) consists of a VTl5 Graphic Processor and a VT04 or VT07
Graphic Display Console working with a PDP-15 Computer.

1-1

1 .3.1

VT15 Graphic Processor

The VT15 Graphic Processor interacts with the PDP-15 computer to obtain its instructions. Because
the PDP-15 computer and VTl5 share the same core memory, their programs interact through the hardware. Furthermore, their programs interact to the extent that the PDP-15 computer program can
directly modify the VT15 Graphic Processor program, which is called the display file. The display
file consists of instructions and data upon which the VT15 operates to construct a desired graphic image
on the display consol e CRT. The display file program in the PDP-15 computer core memory contains
the instructions and data upon which the graphic processor operates and to which its digital control
and analog outputting circuits respond. The VT15 has a set of 11 basic machine-language instructions
that give the Graphic-15 Display System the utmost versatility in the display of points, basic vectors,
graph plots, and ASCII characters.
The Graphic -15 Display System is a directed-stroke refreshed display system. The directed-stroke refresh system requires a local memory so that the display can be continually renewed or refreshed; the
local memory used is the one contained in the PDP-15 computer. A directed-stroke system permits
the graphic construction to be traced on a one-to-one basis so that real-time motions such as those
that might be produced by an operator-controlled light pen or tablet can be quickly converted to an
active CRT display.

An additional feature of the VT15 Graphic Processor is its hardware character generator. This
character generator has a local read-only memory which permits anyone of 68 ASCII-compatible
characters to be generated at an average rate of 12 tJS per character in a basic system. This high writing rate produces 80,000 characters per second on a basic Graphic-15 Display System. These characters are called by one of two instruction words in the VT15 Graphic Processor instruction set.

1.3.2

VT04 and VT07 Graphic Display Consoles

The VT04 Graphic Display Console contains the CRT monitor upon which the graphic images are displayed in accordance wi th the instruc tions and data operated upon by the VT15. In addition to the
display CRT, this console also contains six operator-controlled pushbuttons that can be used to provide
auxi liary functions. These pushbuttons may be programmed to produce skip signals, back to the PDP-15
computer or to the VT15, which permit exit from the current display file or entry into some other display file. The CRT monitor is a standard 17-inch cathode ray tube which uses electromagnetic deflection and electrostatic focusing.
The VT07 Graphic Display Console functions identically with the VT04. The CRT used in the VT07
is a standard 21-inch cathode ray tube.

1-2

1.4

EQUIPMENT OPTIONS

Options that are currently available with the Graphic-15 Display System and those that will be
available in the future give the VTlS Graphic Processor a wide range of capability in many disciplines.
These options and the Graphic-15 Software Library make the Graphic-15 the most versatile graphic
display system availab Ie within its pri ce structure.

1 .4.1

VL04 Light Pen Option

The 370 Light Pen used in the VL04 is a photosensitive device used to detect light on the CRT screen
when programmed to do so. The light pen is interfaced with the VTl5 Graphic Processor through a
connector on the display console. The light pen can be used to delete graphic constructions and to
draw directly on the face of the CRT through suitable subroutines.

1 .4.2

VV15 Arbitrary Vector Generator

The VV15 Arbitrary Vector Generator is a prewired plug-in option available with the VT1S.

This op-

tion permi ts any vector of arbi trary angl e I to be drawn on the display c onsol e.

1 04.3

VWOl Sonic Digitizer Writing Tablet

The WVOl is an interactive digitizing device that permits the operator to input graphic instructions
directly. This option is an excellent auxiliary for graphi c designs.

1A A

LK35 Keyboard Option

The LK3S Keyboard option is a send-only keyboard I through which an operator at a remote display consol e station can enter data into the PDP-15 computer.

The keyboard is the I ink between the operator I

the VT15 Graphic Processor and the PDP-15 computer. Instructions or data are entered into the
PDP-1S computer through the send-onl y keyboard I are processed by the computer I and stored in core
memory as display-file data. A subroutine permits any characters struck on the send-only keyboard to
be displayed on the CRT screen.

lA.S

VM1S Display Console Multiplexer

The VM15 Display Console Multiplexer permits up to four display consoles and four VL04 Light Pen options to be interfaced with a single VT 15 Graphic Processor. This option permits these equipments to
be situated at remote locations and to share the use of the VT15 Graphic Processor and PDP-15 computer.

1-3

1.S

FUNCTIONAL DESCRIPTION

The VTlS Graphic Processor converts digital instruction inputs from a PDP-15 computer into analog
signals that drive the X- and Y-axis deflection circuits of the display CRT. The digital inputs required by the graph ic processor are entered into its input buffer directly from memory via the PD P-15
sing le-cyc Ie word transfer faci Iity when instruc tions are being transferred from the display fj Ie in the
PDP-15 memory. This program consists of instructions to the VTl5 Graphic Processor that tell the
graphic processor what to do with the display file data. Because the graphic processor incl udes a
hardware character generator, text characters or text strings can be ordered directly from the program
by specifying the wanted ASCII characters.
The basic Graphic-15 block diagram is shown in Figure 1-2. Although the VTlS Graphic Processor
uses PDP-1S program-controlled transfer faci lities for initial izing instruction transfers, for computer
sk i p testi n9, an d for read sta tus func ti ons, the
basic mode of data and instruction transfers is
DATA AND

the si ng Ie -c yc Ie word tra nsfer fac i Iity of th e

PDP-15
COMPUTER

PDP-15 computer.

PDP-15
I/O BUS

CONTROL BUS
VT15
DISPLAY
GRAPHIC
PROCESSOR
ANALOG BUS CONSOLE

'5 0615

To perform a single-cycle word transfer, the
address register is contained in the interfaced

Figure 1-2 Basic Graphic-15 Display
System, Block Diagram

peripheral device, which in this case, is the
program counter (PC) in the VTl5. Operation

of both the PDP-1S and the VT15 is interactively-controlled through the machine language instructions
in the PDP-15 and by various functions of the VT15. For some interactive processes, the PDP-15 generates the display file. When the VT15 is commanded to perform some display function, a programmed
display file stored in the PDP-15 core memory is entered through an initializing program-controlled
input/output transfer (IOn. Once the display file has been initialized, operation is turned over to
the graphic processor, which functions autonomously, with respect to the PDP-15, and frees the
PDP-15 for computing or I/O tasks.

The operation of the VT15 is asynchronously controll ed, but

interacts with the PDP-1S computer through the data-channel single-cycle data break and input/
output transfer (IOn faci Iiti es. The VT15 Graphic Processor (Figure 1-3) has five major functional
groups.
a.

Data coli ectors

Timing and control

Posi tion registers

Digital-to-analog converters

Analog function generator.

1-4

r-Y-POS DATA

.,
110

BUS J'"

TIMING

READ DATA

DATA
COL

lOTS
INSTR

1~ .,

X-POS DATA
CUR PC DATA

NEW fl DATA

NEW PC DATA
--'"

DATA

TIM I NG
AND
CONTROL

CONTROL
PDP-15

PC, fl REG
POS REGS

NEW X DATA
NEW Y DATA
fl WRD

flX

flY

DISPLAY
CONSOLE

X WRD
Y WRD

L
~

Y- POS ANALOG
DACS

x- pes ANALOG

ANALOG

BUS

AFG

f1 ANALOG

CONTROL
BUS
VT15

Figure 1-3

GRAPHIC PROCESSOR

VT15 Graphic Processor, Simplified Block Diagram

These five major groups of the V Tl5 control the interac tive functions of the PD P-15 computer, the
VTl5, and the generation of the graph ic display called for in the display fil e.

The functions I isted in

a. through d. above deal with the digital data supplied from the PDP-15 computer over the input/
output (I/O) bus.

The analog function generator converts the inputted digital data to an analog out-

put which is used by the display console to generate the graphic display.

1 .5.1

Data Coil ec tors

The data collectors have a bus receiver interface which receives outputs from the PDP-15 computer
I/O bus and suppl i es them to the VTl5 or receives outputs from the VT15 and suppli es them to the
PDP-15 I/O bus. Also included in the data collectors are two registers called the input buffer register
and the data buffer register.

The input buffer is a holding register that receives inputs from the I/O

bus da ta lines, during data-break transfers I and retains them unti I call ed for by the VTl5 timing and
control function.

This input buffer register is under control of the PDP-15. When called for, the data

held in the input buffer register is transferred to the data buffer register. The data buffer register,
under control of the VTl5 I is an ac tive regi ster that receives the input buffer register contents and
operates on them according to the timing and control function demands.

1 .5.2

Timing and Control

The tim ing and control processes the dig ital data held in the data coil ec tor data buffer register.
Timing and control functions include: instruction and lOT decoding; updating of the PC register;
determination of the graphic construction according to the contents of parameter and skip register,
and direction and rotate logic; and updating of X- and V-position registers.

1-5

Data processing functions are controlled by main timing circuits that are operated by a basic clock
pulse having a 250 ns repetition rate. Each 250 ns interval is called a time state. In general, three
time states of 250 ns are required to accompl ish instruction-word processing func tions. Instruc tion
words and signa Is are processed as follows during the three active ti me states:
Time state 1 - is used to increment the display file program counter and to
load the other registers of the control logic.
Time state 2 - is used for modification of the X-position register.
Time state 3 - is used for modifications of the Y-position register.
Modification of the X- and V-position registers is accomplished through a digital adder in the main
timing and control that is operated by a gating network controlled by main timing logic. This gating
network performs a switching function that enables data to be processed during each time state.
During the first time state, the PC is incremented through an adder. When th is is done I the data currently held in the program counter, Cur PC Data, is summed with the incrementing bit and the content
of the PC is updated to become New PC Data. During the second time state, X-Pos Data, is summed
with the contents of a third or del ta (.6.) register, New .6. Data, and becomes New X Data. During the
third state, the V-position register is updated so that the current content of the V-position register,
Y -Pos Data, is summed with the new .6. data and becomes New Y Data. There are seven instructions
that cause the contents of the X- and V-position registers to be modified; the Point/Graph Plot instruction, the Basic Vector instruction, Basic Short Vector, Character Input, Character String, Arbitrary Long Vector, and Arbitrary Short Vector.
When a point is plotted, the point-plot version of the Point/Graph Plot instruction is used. This instruction establishes the coordinates position of the point in both the X- and Y-axes in separate data
entries, one for each axis. When one of these instructions is processed for a point plot, the 10-bit
coordinate position digital data is transferred into the position register and .the digital register of the
X- or Y-axis digital-to-analog converter (DAC). Each axis movement requires from 8 to 20 I-'s. When
the graph-plot version of this instruction is used by the programmer, he specifies only one axis in this
version of the instruction; the other axis will be automatically incremented. When the instruction is
processed by the VT15 Graph ic Processor, the 1O-bi t coordinate position digital data of the spec ified
axis is transferred into the position register and the register of the specified axis digital-to-analog converter, but the digital register of the unspecified axis analog-to-digital converter is updated with the
digital value of some fixed increment previously chosen by the programmer. This version of the instruction need only be used once to spec ify both coordinates.
When using a basic vector instruction the programmer specifies anyone of eight directions and the
magnitude of the displacement of the line along ei ther the X- or Y-axis. When a basic vector instruction is processed, the contents of the X- and Y -posi tion registers are modifi ed according to the

1-6

requirements of the programmer-specified three direction bits (part of the instruction) and the displacement of the wanted vector along either axis in the lO-bit 6. data word (also part of the instruction).
If, for example, the basic vector is to be drawn at a 45 0 angle to the X axis with its start at the
origin, the adder will sum the 11 word with the contents of both X- and Y-position registers because
for a 45° angle / the displacement of the line along both axes is the same. During time state TS2,
the X-position register gets modified by the 6. word and during time state TS3 J the Y-position register
gets modified by the 11 word.

1 .5.3

Position and 11 Registers

There are three data holding registers, a position register for each axis and a magnitude of change

(11) register. The purpose of the two axis-position registers is to hold the binary equivalent of the
current position of the CRT writing beam. The purpose of the 6. register is to hold the binary equivalent
of the relative displacement of the writing beam. Digital J rather than analog, holding registers are
used because they are not subject to drift; they retain their data indefinitely until needed. When programming basic vectors or basic short vectors, the programmer must express a line with respect to its
relative displacement from the last named position whose digital coordinate equivalents are always
held in the X- and Y-position registers.

The data that defines the magnitude of the relative displace-

ment of the wanted new position from the old position, along either axis, is transferred to the 6.
register during the first time state. It is the new 6. word that is always summed with the current position
data held in the X- and Y-position registers.
During the given time state, the 6. word held in the 6. register may be added to or subtracted from
the content of the X-position, the V-position or both registers on the dictates of the programmer.
The outputs from the position and 11 register / 6. word, X word, and Y word are appl i ed to the digi talto-ana log converters.

1 .5.4

Digi tal-to-Analog Converters

There are three digital-to-analog converters (DACs) in the basic VT1S.

The purpose of the DACs is

to convert the binary data word held in each of the position registers to a voltage whose magnitude is
proportional to the magnitude of the digital data word. The digital-to-analog converters produce
three analog voltages/ one from each of the two position registers and the I:l register, which are fed to
the ana log function generator (AFG).

1-7

1 .5.5 Analog Function Generator
The basic analog function generator (AFG) contains a comparator and a ramp generator: The ramp
generator is used to drive the X- and V-CRT deflection circuits. The ramp generator is used whenever
the programmer specifies a basic vector, basic short vector or characters. This generator produces a'
ramp whose voltage causes the CRT beam to deflect at a minimum rate of 1/4 inch per microsecond.
The instantaneous magnitude of this ramp voltage is compared with the analog equivalent of the digital
content of the !:l register. When the ramp and !:l analog voltages are equal, the ramp generator is disabled. Both positive and negative values of the ramp voltages are produced, and depending on the
direction of the wanted basic vector or basic short vector, the positive or negative vol tages are summed with the X or Y DAC voltage to produce the CRT deflection vol tages. When a point is desired by
the programmer, the voltages equivalent to the contents of the X- and V-position registers are summed
in the analog function generator output drivers. The writing beam is deflected to the point on the CRT
equivalent to the magnitudes of these two voltages.
Addition of the W15 Arbitrary Vector Generator adds circuitry to modify the slope of the output
ramps and therefore allows vectors other than the basic eight directions.

1-8

CHAPTER 2
VT15 GRAPHIC PROCESSOR INSTRUCTIONS

2.1

INTRODUCTION

This chapter describes how to use the basic VT15 Graphic Processor instruction set to generate machine
language programs.

2.2

DISPLAY CAPABILITY

The Graphic-15 Display System has two primary drawing capabilities: point-plot and basic vector.
The Graphic-15 is also capable of displaying text characters by use of the proper instruction. Characters are generated through a special instruction format which permits the generation of single characters or character strings.
Using the basic graphic instruction set, points, basic lines, and characters or character strings can be
outputted from the graph i c processor for display on the CRT of the display console. The display can be
annotated with text at the discretion of the programmer.
The W15 Arbitrary Vector option allows lines of arbitrary angles to be generated.

2.3

THE VT04 CRT DISPLAY

The CRT X-V display (Figure 2-1) has a screen whose dimensions are 9-1/4 in. by 10-1/2 in. with
horizontal plane (X-axis) being 10-1/2 in. in length. This screen is divided into two basic display {or
image) areas. The major (largest) image area is a 9-1/4 in. square single-quadrant cartesian coordinate system whose origin is located at the lower lefthand comer of the visible portion of the display
console screen. Th is square has 1024 addressable coordinate positions in both the X - and Y-axis
planes. The minor (auxil iary) image area is a rectangular coordinate system whose effective display
area is about 9-1/4 in. by 1-1/2 in. with the longer dimension in the vertical {Y-axis} plane. The
basic auxiliary image area is divided into 1024 addressable coordinates along the Y-axis and approximately 161 addressable coordinates along the X -axis. The basi c major image area represents a square
paper area 9-1/4 in. by 9-1/4 in.; this area is the basic paper size. Through the use of a 2-bit paper

2-1

size field, in one of the input/output (lOT) instructions, this area can be increased to four times the
basic 9-1/4 by 9-1/4 in. area to 37 by 37 in. as shown in Figure 2-2. The numbers in boxes indicate
the binary word for each virtual paper expansion and the numbers in parentheses indi cate

(0,1023)

(1023,1023) (0,1023)

the absolute value of the coordinate positions
w

at the corners. Each increase in paper size

(!)

Cl
W

ct
w

provides a corresponding increase in the number

a::

MAJOR IMAGE AREA
(X,Y)

of coordinate positions along each axis. When

w
(!)
ct
~

doubling the paper size 2048 coordinate posi-

MINOR
IMAGE
AREA

a::
~

tions are contained in each axis; and when

:::t

doubled again, 4096 coordinate positions are

(0,0)

(1023,0) (0,0)

contained in each axis.

15-0624

Figure 2-1
2.3.1

Visible Image Areas Display CRT

The Addressable Coordinates

Coordinates that specify points are expressed as

t4095,4095)

(0,4095)

absolute in terms of their displacement from the
origin.

I X4=10,1! I

Coordinates that specify vectors are

expressed as relati ve in terms of their displacement from the last named coordinate positions.
(2047,2047)

(0,2047)

Any point within the major image area is defined both by its X-axis andY-axis coordinates.

I X2=0!

Basic vector direction indicators permit vectors

(0,1023)
(1023,1023

to be drawn in anyone of eight di rections. In

IXl=ool

machine language programming, the character-

(0,0)

\1023,0)

(2047,0)

4095,0)

istics of the desired graphic form, such as character, point, graph plot I or basic vector are
detennined by the instruction used.

Each of

15-0625

these instructions has a data field that permits

Figure 2-2

an address (for characters), a position (for point
or graph), or a magnitude (for basic vectors) to
be expressed.

Other characteristi cs of the

wanted display are expressed through a parameter instruction.

2-2

Relative Paper Size Dimensions

2.3.2

Visible Image Area

AI though the entire CRT screen can be used to produce any desired graphics form which the VT15 is
capable of drawing, only 86 square in. of this area (the major image area) can be used unl ess programmable modifications are made. These programmable modifications include changing the virtual
paper size and/or using the minor and major image areas together. The ordinary basic data word that
defines vector length or a coordinate position contains 10 binary bits, which permits a maximum length
of 9-1/4 in. of viewing area to be used when generating a vector or defining a point. Vectors longer
than 9-1/4 in. can be easily programmed. It is possible to program vectors up to 138-3/4 in. in length.
They may be visible or invisible depending on how the programmer uses the available alternatives.

2.4

INPUT/OUTPUT TRANSFER (IOn INSTRUCTIONS

There are 17 input/output transfer (IOn instructions for the VTl5. They are used by the programmer
to initiate operation, execute programmed skips on the occurrence of some prescribed event or flag, to
permit the programmer to read the status of flags, read the contents of the PC, and to read the contents
of the X- and Y-axis position registers.
Of the 17 lOT instructions, six are read lOTs, seven are skip lOTs, and four are VT15 operate instructions. The read 10 Ts allow the programmer to read the status of various flags and registers into the
PDP-15 accumulator. Access to these flags and register contents allows the programmer to write
decision-making subroutines based on their status. Read lOTs are particularly useful when the programmer wishes to perform some program function other than skipping or interrupting. The read lOTs
are also useful for trouble-shooting.
Skip lOTs cause the next instruction in the PDP-15 program (display file) to be skipped when certain
hardware-controlled events have occurred.

The occurrence of an event is signaled by a raised flag

(a fl ip-fl op is set) •

2.4.1

lOT Instruction Format

The lOT instruction is a standard 18-bit word used by the PDP-15 computer to elicit specific responses
from the VT15 Graphic Processor. Th is 18-bit instruc tion (Figure 2-3) contains four basic mul ti -bit
parts: the computer operation code, the device selection code, the subdevice selection code and the
input/output pulse (IO P) code.

2-3

CLEAR AC
AT EVENT
TIME 1
~

OPERATION
DEVICE
CODE
70
~________
~
________~\(,________S_E_LE~~_Tl_ON________~

GENERATE
AN lOP 2
PULSE AT EVENT
TIME 2
~

12 113 114 115 1 16 117

'---..r---l

"--.,...-J

SUB-DEVICE
SELECTION

GENERATE
AN IOP 4
PULSE AT
EVENT TIME

GENERATE
AN rop 1
PULSE AT
EVENT TIME

1
15 -0607

Figure 2-3

2.4.1 . 1

lOT InsfTuction Format

Computer Operation Code - The computer operation code uses the first four bits of the 10 T

instruction word; when an lOT is specified, bits 0, 1, and 2 are always set and bit 4 is always a zero
(unset). Because bits 4 and 5 are unused, the total 6-bit word is always 111000 (or 70 )'
S

2.4.1.2

Device Selection Code - The next six bits (6 through 11) of the lOT instruction word are the

device selection code. The 6-bit length of this code permits up to 64 peripheral addresses. However,
some peripheral devices require two or more codes because they perform a large number of discrete
operati ons. For example, there are two device codes for the VT1S; 011 000 and 011 011 (30 and 31S) .
S

2.4.1.3

Subdevice Selection Code - The next two bits (12 and 13) of the lOT instruction are the sub-

devi ce sel ec tion code. In the VT15 Graph ic Processor these bi ts are used to increase the number of
discrete 10 T operations.

2.4.1.4

Accumulator Clear - One of the operations possible with the lOT insfTuction format is to

clear the PDP-15 accumulator. This is done when bit 14 is set; this bit should be set when the read
status lOT instructions are issued by the programmer or a logical "OR" of the data and ac contents

wi II resul t •

2.4.1.5

lOP Code - The last three bits (15,16/ and 17) of the lOT instruction are the lOP codes.

Setting anyone of these three bits separately or in combination obtains a specified response from the
VT1S.

These bits control a timing generator in the PDP-15 computer that provides serial output pulses

on the input/output 0/0) bus which are used by the VT15 to perform its operation. For each of the
output pulses, a separate response is provided by the VT15 depending on the lOT device codes.

2-4

Read Status 1 (RS 1)

2.4.2

The Read Status 1 lOT (703002 or 703012 for AC CLR) is used to read the status of various flags and
registers into the PDP-15 accumulator. The accumulator is loaded with the special format 18-bit word
shown in Figure 2-4. The significance of each bit is listed in Table 2-1 .

15- 0601

Figure 2-4

Status 1 Word Format

Table 2-1
Read Status 1 Word Bit Functions

Bit Pos

Name

Function

OFFS

Indicates status of offset-parameter register. When set
indicates offset has been enabled.

ROT

Indicates status of rotate-parameter register. When set
indicates that all vectors are rotated 90° counterclockwise.

BNK

Indicates status of blink-parameter register. When set
indicates that blink circuit is enabled.

5 and 6

PAO, PAl

Indicates effective paper size.

7 through 10

INCR through INCR
3
O

STOP INTR EN

Indicates content of increment-parameter register.
When set in combination indicates relative magnitude
of increment between 00 and 17 .
8
8
Indicates status of stop interrupt enable register. When
set indicates that a stop flag will interrupt PDP-15
computer program.

LP INTR EN

Indicates status of light-pen flag interrupt register.
When set indicates that a light-pen hit will interrupt
PDP-15 computer program.

EDGE INTR ENA

Indicates status of edge-flag interrupt register. When
set i nd i cates tha t th e PD P-15 computer program will be
interrupt when the edge limit has been exceeded.

PB INTR EN

Indicates status of push-button flag interrupt register.
When set indicates that a push-button hit will interrupt
PDP-15 computer program.

LP FLAG

Indi cates status of I ight-pen flag enab Ie register. When
set, a light pen hit will cause a flag.

16 and 17

Indicates content of line parameter register. When set
in combination indicates type of dashed lines in vectors.

2-5

2 .4.3

Read Status 2 (RS2)

The Read Status 2 lOT (703022 or 703032 for AC CLR) loads the special format 18-bit word shown in
Figure 2-5 into the PDP-15 accumulator. Tabl e 2-2 I ists the function of each bit of the status word.
NOTE

If the VTlS is running a display file tha~ can modify the
pushbuttons (Skip 1 instruc tion) care must be taken not to
allow a Read Status 2 of the buttons at the same time or
erroneous data wi" resul t.

15-0602

Figure 2-5

Status 2 Word Format

Table 2-2
Read Status 2 Word Bi t Functions

Bit Pos

o through 5

Function

Name

8 through 10

through PBS
O
BRTO through BRT2

11 through 17

NRO through NR6

2.4.4

Indicates content of pushbutton skip register.

Indicates content of brightness parameter register. When
set in combination indicates relative brightness of display
between 0 and 7 ; with 0 the darkest and 78 the bright8
8
8
est.
Indicates content of name register.

Read Status 3 (RS3)

The Read Status 3 lOT (703142 or 703152 for AC CLR) loads the specially formatted 18-bit word
shown in Figure 2-6 into the PDP-15 accumulator. Only the six most significant bits of this status
word are used.

15-0603

Figure 2-6
2.4.5

Status 3 Word Format

Read X Position Register (RXP)

The Read X Position lOT (703102 or 703112 for AC CLR) loads the specially formatted 18-bit word,
shown in Figure 2-7, into the PDP-15 accumulator. Because bits 0 through 4 of the 18-bit word are
unused and bit 5 indicates an X-register overflow, the maximum word length is 12 bits. When 12 bits

2-6

are set, the maximum coordinate position has been named and is 4095. This register can accommodate
all coordinate positions for paper sizes up to 37 in. (Refer to Paragraph 2.3.) The overflow bit is
useful for indicating that the X-register capacity (full paper size) has been exceeded.

15-0604

Figure 2-7

2.4.6

Read X Position Word Format

Read Y Posi ti on Reg i ster (RYP)

The Read Y Position lOT (703042 or 703052 for AC CLR) loads the specially formatted l8-bit word
shown in Figure 2-8 into the PDP-15 accumulator. Bits of this word have the same significance for the
Y axis as those of the Read X Position lOT described above.

15-0605

Figure 2-8

2.4.7

Read Y Position Word Format

Read Program Counter (RPC)

The Read Program Counter lOT (703062 or 703072 for AC CLR) loads the contents of the PC into the
PDP-15 accumulator. Bit 0 is not used.

The PC can hold a maximum of 131,072 addresses.

Refer to

Figure 2-9.

15-0618

Figure 2-9

2.4.8

Program Counter Word Format

Skip 10 T Instruc tions

Skips available to the programmer can originate either from the PDP-15 program or from the display
file.

Both types of skips are produced as a result of some VT15 Graphic Processor event I but they are

generated in two ways. Display fi Ie skips are generated when ordered by a skip instruction from the
VT15 Graphic Processor instruction set. PDP-15 program skips are generated when ordered by any of
the seven skip lOTs listed in Table 2-3.

2-7

Table 2-3
Skip lOT Instruction Set

Mnemonic

Octal
Code

Operation

SPSF

703001

Skip on Stop flag.

Causes the computer program to skip next instruction when the stop flag is raised.

SPlP

703021

Skip on I ight pen flag.

Causes the computer program to skip next instruction when the light pen flag is raised.

SPPB

703041

Skip on pushbutton flag.

Causes the computer program to skip next instruction when anyone of six pushbuttons on
the display console is depressed.

SPEF

703061

Skip on edge flag.

Causes the computer program to skip next instruction when a vector exceeds C! previously
defined paper size edge.

SPDF

703101

Skip on any flag.

Causes the computer program to skip next instruction when any flag in the VTl5 is raised.

SPDI

703121

Skip on any interrupting
flag.

In the VTl5 instruction set there is an interrupt and two skip parameter words. The
parameter 3 instruction enabl es a program
interrupt on the occurrence of anyone of
five flags. This lOT instruction will cause
a skip when any of the five flags is raised
only when the parameter 3 interrupt is also
enabled. When the flag is raised and the
interrupt enabl ed, the computer program
will be interrupted and a program skip wi II
occur.

SPES

703161

2 .4.9

Function

Skip on external stop flag. One of the lOTs in this instruction set is an
external stop instruction (STPD). This stop
originates from the PDP-15 computer program via the STPD lOT. When the external
stop lOT is received by the VTl5 Graphic
Processor the display wi II stop and the external stop flag will be raised. This lOT permits the PDP-15 computer program to skip
when this flag is raised.

Operate 10 T Instruc tions

There are four operate lOTs. These rOTs are used to initiate the display file, to clear fl~gs, to enable
interrupts, to establish paper size, to stop the display (VTl5 Graphic Processor halts), and to resume
the display file after a flag occurs or if a display stop has been previously ordered. The operate 10 Ts
and their functions are Iisted in Tabl e 2-4.

2-8

Table 2-4
Operate lOT Instruction Set

Mnemonic

Octal
Code

Operation

LSD

703004

Load and Start display.

STDP

703044

External stop display.

Provides an external stop of the display.
Refer to the SPES instruction described in
Table 2-3.

RES

703064

Resume display after flag.

This lOT causes the display to clear all
flags and continue after a flag occurs.

SIC

703024

Set initial conditions.

This lOT is used to set initial conditions for
computer interrupts, to cl ear flags 1 and to
establish paper size. The initial conditions
are determined by an 18-bit word formed in
the PDP-15 accumulator. The word is shown
in Figure 2-10. Bit functions are listed in
Table 2-5.

Function

This lOT is used to initialize a single cycle
word transfer sequence by the PDP-15 computer and entry into the display file by the
VT15. The transfer is initialized by an
18-bit address word which is first loaded into
the accumulator. This address is the location
of the first instruction in the display file. It
is loaded into the VT15 PC when this lOT
occurs.

15-0598

Figure 2-10

Set Initial Conditions Word Format

Table 2-5
Significance of Set Initial Conditions Word Bits

Name

Function

SET STOP INTR EN

When set 1 stop flag will produce a PDP-15 program interrupt.

SET LP INTR EN

When set, a light-pen flag will produce a PDP-15 program
interrupt.

SET EDGE INTR EN

When set, an edge flag will produce a PDP-15 program
interrupt.

SET PB INTR EN

When set, and the operator depresses anyone of six
pushbuttons on the VT04, a PDP-15 program interrupt
will occur.

Bi t Pos

2-9

(continued on next page)

Tabl e 2-5 (Cont)
Significance of Set Initial Conditions Word Bits

Name

Function

SET EXT STOP INTR
EN

When set, and External Stop lOT, STPD (703044) is issued
from the PDP-15 computer program, a PDP-15 program
interrupt will occur when the VTl5 stops.

CLR STOP FLAG

When set, the stop flag will be cleared.

CLR LP FLAG EN

When set, the light-pen flag will be cleared.

CLR EDGE FLAG EN

When set, the edge flag wi II be cleared.

CLR PB FIND

When set I the pushbutton flag will be cleared.

CLR EXT STOP

When set I the external stop flag will be cleared.

PA CHAN EN

When set, the effective paper size wi II be changed
according to the code given by bits 11 and 12.

11 and 12

PAOO and PA01

When set in combination, the effective size of the visible
area of the CRT screen is as follows:

Bit Pos

PAOO

PA01

VT04 Size (inches)

0
0
1
1

0
1
0
1

Xl (9-1/4 x 9-1/4)
X2 (18-1/2 x 18-1/2)
X4 (37 x 37)
X4 (37 x 37)

CLR LP INTR EN

When set I clear Light Pen Interrupt enable is cleared.

14 and 15

SLAVE PBOO and PB01

Set in binary combination to indicate which display console is being addressed by a subsequent RS2 lOT.

Note: Bits 0 through 9 are effective only if they are set. The cleared condition has no
significance other than negation of a set bi t.

2.4.10

Miscellaneous lOT Instructions

Table 2-6 lists two PDP-1S lOT instructions that affect VTl5 Graphic Processor operation.

2-10

Table 2-6
Mi sc ellaneous 10 T Instructions

Mnemonic

Octal
Code

10RS

700314

Input/Output Read Status

Upon receiving this lOT I the VTl5 will
return a logic 1 to bit position 5 of the
PDP-15 accumulator if any flag exists within
the VTl5.

CAF

703302

CI ear All Flags

Upon receiving this lOT I the VTl5 will clear
all flags and reset the display to a "power
clearll condition.

2.5

Operation

Function

VTl5 GRAPHIC PROCESSOR INSTRUCTION SET

There are eight 18-bit instructions in the basic VTl5 instruction set. Each instruction has a separate
format but generally consists of an instruc tion fi eld, a parameter fi el d, and an address or data fi eld .
There are three types of VTl5 instruc ti ons: memory reference I graph ic, and parameter. Memory
reference instructions have 13-bit address and parameter fields. Graphic and parameter instructions
have parameter and data fields.

Data fields in operate instructions vary in length from three to 13

bits. Figure 2-11 shows the formats for each of the VTl5 Graphic Processor instructions.

The

parameter/skip instruction is further augmented into three parameter instructions by a 2-bit register
field and two skip instructions by a 1-bit subregister field.
INSTRUCTION BITS
INSTRUCTION
NAME
CHARACTER
INPUT
CHARACTER
STRING

INSTRUCTION FIELD

NOT
USED

PARA
FLD

INSTRUCTION FIELD

PARA
FLD

POINTI
GRAPHPLOT
PARAMETERI
SKIP
SAVEl
RESTORE
BASIC
VECTOR

INSTRUCTION FIELD

10-BIT DATA FIELD

PARAMETER FIELD

SHORT
VECTOR
JUMPI
JMS
15- 0620

Figure 2-11

VTl5 Graphic Processor Instruction Format

2-11

The VTl5 Graphic Processor instructions are used in combination to produce a display file.

Two 10 T instruc ti ons are usua II y used with each

display fi lei s the VT15 Graphic Processor program.
display file:

The

The Set Initial Conditions lOT, SIC (703024) and the Load and Start Display lOT, LSD

(703004). The Set Initial Conditions lOT is used only when its bits are of significance to display file
operations. The Load and Start Display lOT must always be used when a display file is initiated.
Memory reference instructions are Charac ter String I Save/Restore, and Jump/Jump-to-Subroutine.
Each of these memory reference instructions operates on data at an absol ute address specified by a
13-bit address field which is part of the instruction word.
The parameter instructions generally establish characteristics of points, graph plots, characters and
vec tors. These instructions a Iso establ ish PD P-15 program interrupts when flags are raised in the VT15
or when pushbuttons on the display consol e are pressed by the operator; they permi t the display fi Ie
to skip on various programmabl e flags and on one or more of rhe six pushbuttons. Flags can be enabl ed
by setting the proper bit in the parameter instruction.
With the exception of a 3-bit operate field in the Basic Vector and Basic Short Vector, and Jump
instructions, each instruction is characterized by a 4-bit operate field.

Parameter and skip instruction

operate fields are characterized by an additional 2-bit sub-instruction field for parameters and a 3-bit
sub-instruction field for skips. Sub-instruction fields are necessary to characterize augmentation of
the basic parameter and skip instructions. Instruction fields tell the graphic processor what to do with
each instruction. Each instruction requires a minimum of three 250-ns time states to be processed.

2 .5. 1

Charac ter Input Instruc tion

The Character Input instruction format is shown in Figure 2-12. The Character Input instruction provides a convenient means of displaying individual text characters. When processed, the VT15
Graphic Processor operates directly on this instruction so that the character named in the ASCII field
is displayed directly from the display file. The 8-bit ASCII code is listed in Appendix B.

, 5-0608

Figure 2-12

Charac ter Input Instruction Bit Format

This instruction is also useful when using the light pen to identify the generation of a character.
When a display file is active and the light pen flag bit of this instruction is enabled, a skip or interrupt can be generated by properly encoding a previous parameter or skip instruction.

This mode is also

useful for displaying a limited number of characters, or in response situations, from a keyboard or TTY.

2-12

When spec ifying ASCII character~ I any of six characteristics can be determined by the programmer;
he mayor may not specify them all:
a.

Brightness - Brightness of any character is established by a 3-bit parameter field
in the Parameter 1 instruction and is determined in a manner identical to that
described for vectors in Paragraph 2.5.4. 1.

Starting Place - Characters may be started anywhere on the specified paper size.
Figure 2-13 shows the character generation format for all 64 displayed characters
together with the 5 x 7 coordinate-point matrix. The numbers and arrowed lines
in the matrix indicate the direction and number of vectors required to generate
the illustrated character; solid lines indicate visible vectors and dashed lines
indicate invisible vectors. All characters are automatically generated by the
character generator when called for by the Character Input instruction. For
exampl e, to generate charac ter A, six vectors are required, four visibl e and
and two invisible. Character A starts at the coordinate dot at the beginning
of vector 1 and ends at the arrowhead of vector 6. The dot location at the
arrowhead of the final vector of the character is the starting place of the first
vector of the next character. Therefore, only the starting place of a single
character or the first character in a string of characters needs to be defined.

f.---- :: ~·I
3/32"

•

:::: 1/8"

FINISH
15-0621

Figure 2-13

Character Generation Format

The starting place of any character can be specified using the Arbitrary Vector instruction (Paragraph 2.5.10), the Basic Vector instruction (Paragraph 2.5.7), or
by usi ng the Point/Graph Plot instruction (Paragraph 2.5.3).
c.

Size - The size of any character can be continuously expanded from its basi c d imensions of approximately 1/8 in. by 1/8 in., up to 15 times. The expander increments are determined by a 4-bit data field in the Parameter 1 instruction (refer
to Paragraph 2.5.4). The contents of the increment register in the VR15 are processed for each Character Input instruction. When this register contains data, each
vector in the character is repeated the number of times equivalent to the data word
contained in the increment register.
(continued on next page)
2-13

Rotation - All characters can be rotated 90 0 counterclockwise so that characters
can be written in the vertical and the horizontal planes. Rotation is selected by
setting a parameter bit in the Parameter 2 instructi on. (Refer to Paragraph
2.5.4.2. )

Light Pen Enable - If a light pen enable is desired on any character, bit 5 of the
input character instruction should be set. Setting this bit will enable the light pen,
but on lyon the character named in the data field.

Blink - The blink parameter permits any vector to be blinked at an approximate
rate of four cycles per second {Paragraph 2. 5.4.2}.

NOTE:

2 .5.2

Characters may not be dashed.

Charac ter Stri ng Instruc tion

The 18-bit Character String instruction format is shown in Figure 2-14.

This instruction has a 4-bit

operating code of 048 which occupies bi ts 0 through 3. Bits 5 through 17 form a 13-bi t absol ute
address field capable of naming up to 8,192 locations. This address is the starting location in lOPS
character format.

(Refer to Figure 2-15.) If the address specified by the 13-bit address field does

not occur in the same memory as the instruction, bit 4, which is used to specify an address in an
alternate memory storage bank, must be set.
o

15-0606

Figure 2-14

Character String Instruction Bit Format

When bit 4, the indirect addressing bi t, is set, the address named in the 13-bit word does not give the
starting location, but the address of the starting location. Indirect addressing permits the address word
to be expanded to 17 bits so that anyone of
128K core memory locations can be referenced.
BIT POSITION t-0---t---'-';'~~.J.:......;;r----.:...,r:---~.....:.:..j

The memory reference instruction directs the pro-

CHAR POSITION o....-1st_.C_H_AR--,o'---_~_ _--L._ _....L.._ _~
15-0622

gram counter in the VTl5 to the named address
Figure 2-15

which the programmer has assigned as the start
of his ASCII file.

10 PS Character Format

The character generator un-

packs the ASCII file and displays each character of the file in sequential order until a delimiter such
as an AL T MODE terminates the character string operation mode. With the exception of the light pen
hit, the same characteristics used to specify ASCII characters when using the Character Input instruction are used to specify characters in the Character String instruction.
A characteristic not available in the Character String instruction that can be specified in the parameter
instruction is the character escape mode. Once initialized the character generator remains active
2-14

until the escape character has been written. When bit 6 of the Parameter 2 instruction is set and bit 7
of this instruction is also reset only the ALT MODE character will terminate the Character String instruction. If bit 7 is set then both ALT MODE or a CR will terminate the Character String instruction.
All characters must also be specified in lOPS ASCII format (Figure 2-1S).

2.S.3

Point/Graph Plot Instruction

The l8-bi t Point/Graph Plot instruction format is shown in Figure 2-16.

Point/graph plot instructions

have an operation code of 148 which is defined by the operation-code field consisting of bits 0
through 3. This instruction is augmented into two instructions by bit 7 permitting the programmer to
plot points in two ways. When bit 7 is reset (0), the VTlS interprets the Point/Graph Plot instruction
as a point plot; when bit 7 is set (1), the instruction is interpreted as a graph plot.

15-0599

Figure 2-16

2.S.3.l

Point/Graph Plot Instruction Bi t Format

Point Plot - When a point plot is ordered by the programmer (bit 7 reset), the instruction

must also name the axis in which the CRT writing beam is to move. Bit 6 of this instruction defines the
axis in which the CRT beam is to be moved; when this bit is set, the beam is moved along the X axis.
When unset I the beam is moved along the Y axis. Bi ts 8 through 17 are a 1O-bi t data fi eld that permits the programmer to specify any point absolutely with respect to the origin along the named axis.
Because the beam is displaced from its previous position only when the coordinate data field is used,
if the beam is defl ected in onl y one axis, only that axis need be named in bi t 6.
If the beam is to be moved in both axes, then the Point/Graph Plot instruction must be used twice l
once to move the beam along the X axis (bit 6 set) and once to move the beam along the Y axis (bit
6 unset) requiring from 8 to 20 Ils/point instruc tion. Usually the point is written unintensified (invisibly)
during the first beam movement.
When plotting points I there are four characteristics that can be determined by the programmer. Although he migh t not spec ify all of them 1 the following parameters shoul d be consi dered by the programmer:

2-1S

Brightness - Brightness of any point (or vector) is establ ished by a 3-bit brightness
field in the Parameter 1 instruction and is determined in a manner identical to that
described for vectors in Paragraph 2.5.4. 1 .

Intensification - When points are moved in both axes I usually the first move is
invisible and th~ second move visible or invisible. Beam intensification is
selected in bit 4 of the Point/Graph Plot instruction. This intensification bit
pertains only to the point named in the 10-bit coordinate data field. Points
cannot be bl ink ed.

Axis of Beam Deflection - When moving a point I only the axis of beam deflection need be named to execute movement. Bit 6 of the Point/Graph Plot
instruction is used to name the axis of beam movement.

Absol ute Displacement from Origin - When points are displayed I all beam
movements are referenced to the origin - relative displacement of the beam
from its previous position should not be considered when planning point plots.
All coordinates between 0 and 1023 in the visible image area can be expressed
in the 10-bit coordinate data field of the Point/Graph Plot instruction. All
coordinates must be entered into the coordinate data field as octal numbers.

2.5.3.2

Graph Plot - When a graph plot is ordered by the programmer (bit 7 set) I only one axis need

be specified by the Point/Graph Plot instruction. The beam is automatically moved a predetermined
amount by the hardware, according to the content of the increment register in the VT15. The increment register is loaded through the issuance of a Parameter 1 instruction. The Parameter 1 instruction
has a 4-bit increment field defined by bits 14 through 17 of the parameter/skip instruction (Paragraph
2.5.4). This increment register permits the CRT beam to be moved in decimal increments between 1
and 15 rasters, or between 0.01 and O. 150 in., (approximately) in the unspecified axis.
Graph plots conserve 50 percent of core memory when a curve to be plotted for two variables is
represented by a data file having all point for one variable solved for fixed increments in the other
variable.
When plotting graphs I there are three characteristics that can be determined by the programmer. As
with a point plot I he might not specify all of them, but the following parameters should be considered
by the progra mmer .
a.

Brightness and Intensification - When graph plotting, each coordinate point is
moved in both axes, but only the axis for which data samples have been taken
need be named for each point. Bi t 4, the intensification bit, will permit the
final graph/plot point to be visible; the point in the unnamed axis will remain
unintensifi ed. Bit 6 (Figure 2-16) of the Point/Graph Plot instruc tion is used
to specify the axis for which data samples have been taken. Graph plots
cannot be bl inked.

(continued on next page)

2-16

2.5.4

Absolute Displacement of Data Points - When graphs are plotted, movement of
the CRT beam in the specified axis is a function of the data samples taken. The
displacement of the beam in the specified axis should be referenced absolutely
with respect to the origin. For a continuous graph, (increments of 1) 1024
samples shoul d be taken between 0 and 1023. However, when 512 samples are
taken, in increments of 2, between 0 and 1023 the eye wi II just begin to
resolve individual points. It is possible to take data increments as large as
15, which establishes a requirement for 64 data samples. Using the arbitrary
(stroke) vector option, it is possible to connect points with a series of straight
lines. All coordinates between 0 and 1023 in the visible image area can be
expressed in a manner identical to that used to express point-plot coordinates
(in oc tal) as described above.

Increment of Data Points - Data point increments should be determined on the
basis of the number of sample points taken and the desired resolution of the dot
pattern described by the graph plot. For graph plotting, the data point increments are determined by a 4-bit data field in the Parameter 1 instruction. The
content of the increment register in the VT15 is processed for each graph plot
and causes a relative displacement of the CRT beam, in the unnamed axis, with
respec t to its last previous position. Hence, a graph will automatically be
plotted for successive fixed increments in the unnamed axis when data points in
the specified axis are separated by that increment.

Parameter/Skip Instruction

The parameters of the Parameter/Skip instruction format are shown in Figure 2-17 . This instruction has
6-bit operating codes of 20 21 , 22 , or 23 , which are used to indicate anyone of three parameter
8, 8
8
8
instructions or a skip instruction. The skip instruction (Figure 2-19) is further augmented into two subinstructions having codes of 2308 and 234 ,
8
PARAMETER 1

PARAMETER 2

PARAMETER 3

15-0597

Figure 2-17

Parameter Instruction Bit Formats

The parameter instructions perform no direct operations such as drawing points or vectors, or characters,
but are used to establ ish one or more charac teristics of these drawing func tions. The parameter instructions can be thought of as augmenting instructions, but they apply equally to all drawing

2-17

instruc tions in the display fi I e when used. Wi th but one exception (the stop-flag bi t), each of the
parameters that can be named in the three parameter instructions has an enabling bit. When a wanted
parameter is specified, its enabling bit must also be specified. Each of the three parameter instructions
permits more than one parameter to be specified; hence, without an enabling bit, each time one of the
parameter fields is used to specify a new parameter or a change in that parameter, all other parameters
in the same instruction would have to be repeated because all bits of the instruction are usually
processed. The presence of the enabling bit ensures that only the bits of the enabled parameters will
be processed by the VT15; thus, the need for bookkeeping on the part of the programmer is eliminated.

If the enabling bit was not present with each of the parameter bits, each time a parameter instruction
is used I the programmer would have to remember how he had previously specified other parameters in
the same instruction. For the VTl5, this would require keeping track of 14 variabl es at all times. The
14 parameters that can be specified by the three parameter instructions are listed in Table 2-7.

Table 2-7
Parametric Variables

Parameter 1

a. Stop flag
b. Brightness
c. Increment

2 .5.4. 1

Parameter 2

a.
b.
c.
d.
e.
f.

Escape Mode
Blink
Edge
Rotate
Light Pen
Offset

Parameter 3

a.
b.
c.
d.
e.

Stop flag interrupt
light pen interrupt
Edge interrupt
Pushbutton interrupt
line Type

Parameter 1 - The Parameter 1 instruction (Figure 2-17) permi ts the programmer to spec ify

the three parameters listed in the Parameter 1 column of Table 2-7. Each of these parameters is
described in a. , b., and c. below:
a.

Stop flag - When bit 6 of the Parameter 1 instruction is set (Figure 2-17) the stop
flag will be raised and the VT15 will halt. The programmed stop flag can be
used to produce a computer skip or it can be tested through the issuance of the
Read Status 3 lOT instruction (Paragraph 2.4.2). The stop flag status bit position
for the Read Status 3 word is shown in Figure 2-6. A program interrupt can be
specified on the occurrence of this flag by setting bits 10 and 11 of the Parameter
3 instruction.

Brightness - The brigh tness of the programmed display is determined by bits 8,
9, and 10 of the Parameter 1 instruction I but only if brightness enable bit 7 is
also set. The brightness of the display can be controlled in eight incremental
steps between maxi mum dark and maximum I igh t by spec ifying any oc tal code,
representing the wanted brightness, between 0 and 7, respectively. The
(continued on next page)

2-18

b. brightness parameter code is usually established at the beginning of a display file,
(cont) and is seldom changed. However, if the brightness of a coordinate point, a
vector, or a character to be generated is to be different from all previously
generated points, vectors, or characters, a new Parameter 1 instruction must be
issued in the display file; this new Parameter 1 instruction must have enabling
bit 7 set and the new val ue of brightness coded into bits 8, 9, and 10, the
brightness parameter field. After the character, vector, or point whose brightness
has been altered is written, the former Parameter 1 instruction must be restored in
the di splay fi I e if subsequent characters are to have the originally sel ec ted brightness.
The brightness code can be tested through the issuance of the Read Status 2 lOT
instruction (Paragraph 2.4.3). The brightness bit positions for the Read Status
2 word are shown in Figure 2-9.
c.

Increment - The 4-bit increment parameter fiel d in the Parameter 1 instruc tion
is used in the following ways:

It permits any vector or character to be repeated up to 15 times. This
feature is useful in zooming and scaling.

It permits any graph-plot coordinate-point increment between 1 and 15
to be specified for beam defl ection in the unnamed axis when using the
graph-plot feature of the Point/Graph Plot instruction.

When a vector, character, or point plot instruction is processed by the VT15, the parameter registers
are examined as part of the instruction execution. When vectors are written either as lines or characters, the increment register is examined for scale. When a graph-plot point is written in the unspecified axis, the increment register is examined for beam displacement.
For vectors and characters, the scale code is usually established at the beginning of the display file.
This is also usually true for graph-plot coordinates and the increment code. These parameters are seldom changed. However, if the vector repeatability or plot increment to be generated is to be different from all previously generated repeats or increments, a new Parameter 1 instruction must be issued
in the display file; this new Parameter 1 instruction must have enabling bit 13 set and the new value
of the scale or increment coded into bits 14 through 17, the increment parameter field.
After the new scale or increment has been written, the former Parameter 1 instruction must be restored
in the display file if subsequent vectors, characters, or graph plots are to have the originally selected
number of repeats or basi c increments.
The increment code can be tested through the issuance of the Read Status 1 lOT instruction (Paragraph
2.4.2). The increment bit positions for the Read Status 1 word are shown in Figure 2-4.

2.5.4.2

Parameter 2 - The Parameter 2 instruction (Figure 2-17) permits the programmer to specify

the six parameters I isted in the Parameter 2 column of Table 2-7. Each of these parameters is described in a. through f. which follow:

2-19

Escape Mode - The escape mode is used when a Character String instruction is
used to specify the starting address of a charac ter string. When escape mode
enable bit 6 is set in the Parameter 2 instruction escape code, bit 7 will be
read when the instruction is processed. If bit 7 is set then both an AL T MODE
or CR will cause termination of the Character String instruction. If bit 7 is
reset, only an ALT MODE code will terminate the character string.

Blink - When the programmer desires to blink a vector, a character, or character
string, he uses the blink parameter bits of the Parameter 2 instruction. When
blink enable bit 8 is set in the Parameter 2 instruction and bit 9 is set for ON
condi tion, the bl ink bi t wi II be loaded into the bl ink register. Subsequent
characters or vectors will then blink until the blink register is reset through
the Parameter 2 instruction again. The status of the bl ink bit can be tested
through the issuance of the Read Status 1 lOT instruction. The blink status bit
for the Read Status 1 word is shown in Figure 2-4.
The blink bit is usually used just for single characters and vectors, and is often
changed. When the vec tor or character is wri tten, it will bl ink at an approxi mate
rate of four times a second.

Edge - When the programmer desires to know when the paper size he has chosen is
exceeded, he uses the edge bits of the Parameter 2 instruction. When edge flag
enable bit 10 is set in the Parameter 2 instruction, the edge control bit and edge
wi II be loaded into the edge flag enable register. If edge bit 11 is set, when a
vector exceeds the chosen effective paper size, an edge flag wi II be raised by
the VTl5 Graphic Processor. Refer to Paragraph 2.3 for a description of paper
size selection. The edge flag can be used to produce a computer skip through
the issuance of the Skip lOT instruction SPEF (Paragraph 2.4.8).
The status of the edge flag bit can be tested through the issuance of the Read
Status 3 lOT instruction. The edge flag status bit for the Read Status 3 word
is shown in Figure 2-6.
Note that if a line violates the edge of a viewing area, it will be completely
blanked. For example, if either or both end points of a line are outside of the
viewing area, the entire line will disappear from view. However, the display file
will be updated logically. If the portion of the picture is drawn entirely outside
of the viewing area, the vectors are not drawn. Instead, the processor simply accompl ishes its additions and continues, providing a great saving in drawing time.
Whenever a vector's starting point is outside the viewing area, but its end point is
within the viewing area, an additional 20-l-Is delay is imposed to allow the CRT
mon itor to settle before the next element is drawn. Refer to Fi gure 2-18.

Rotate - When the programmer wishes to rotate his displayed vectors or characters
90° counterclockwise, he uses the rotate bits of the Parameter 2 instruction. When
rotate enable bit 12 is set in the Parameter 2 instruction, the rotate control and
rotate bit will be loaded into the rotate register. If rotate bit 13 is set, the
vec tors or charac ters subsequently generated wi" be rotated 90° counterclockwise.
The status of the rotate bit can be tested through the issuance of the Read Status
1 lOT instruction. The rotate status bit for the Read Status 1 word is shown in
Figure 2-4.
The rotate bit is most often used when generating characters to annotate a part
of a display. If a charac ter or charac ter string is to be rotated, a new Parameter
2 instruction must be issued in the display file. This Parameter 2 instruction must
have enabling bit 13 and rotate bit 14 set. When subsequent vector or characters
are written they will be rotated 90° counterclockwise with respect to their starting
point.
(continued on next page)
2-20

~1·---------9~--------~·1

I
0-- ---1
20,IJs DELAY
ON THIS VECTOR}
EXECUTION

----!
:::;
/

BLANKED LINES

~----------~~~
15-0609

Figure 2-18

Screen Edge Violation Examples

Light Pen - When the programmer wishes to use the light pen to detect any intensified part of the display, he uses the light pen bits of the Parameter 2 instruction.
When light pen enable bit 14 is set in the Parameter 2 instruction, the light
pen bit will be read when each character, vector, or point/graph plot instruction is executed. If light pen bit 15 is set, whenever a light pen hit
occurs, a light pen flag will be raised by the VTlS. However, because of
phosphor rise time limitations, light pen throughput time, and the time delay
of the data and control bus, the light pen flag may not always set during the
instruction that actually caused the light pen to respond. For example, during
the point word, the phosphor is excited for only 2S0 ns. Within another
500 ns I the next instruction is brought into the data buffer. However, the
rise time of the phosphor (i .e., before light can be sensed) may be as long
as 3 Ils (1 .S Ils is typical). Therefore, because of the fast drawing rate and
effici ent doubl e-buffering of the I/o, the next instruc ti on could appear before
the I ight pen flag is sensed.
The light pen flag can be used to produce a computer skip. To produce a program
skip, the Skip 10 T instruction SPLP (Paragraph 2.4.8) must be issued.
The occurrence of the light pen flag can also be tested through the issuance of the
Read Status 3 lOT instruction. The light pen flag status bit for the Read Status 3
word is shown in Figure 2-6. A program interrupt can al so be specified at the
occurrence of this flag by setting bits 10 and 12 of the Parameter 3 instruction.

Offset - The offset bi ts of the Parameter 2 instruction are enabl ed when the use
of the minor image area is desired. When offset enable bit 16 is set in the
Parameter 2 instruc tion, the offset control bi t 17 will be loaded into the offset
register. A point X (PX) and point Y (PY) instruction must follow each entry
and exi t from the offset area.

2-21

2.5.4.3

Parameter 3 - With the exception of the line sel ection bits (dash), the Parameter 3 instruc-

tion (Figure 2-17) is used to enable program interrupts for various skip conditions. There are four flags
whose occurrence can enable an interrupt if their interrupt bits are set in the Parameter 3 word:
a.

Stop flag (bit 11)

Light pen hit flag (bit 12)

Edge flag (bit 13)

Pushbutton find (bit 14)

The programmer can enable the program interrupt facilities when any event, which causes any (or all)
of the above flags to be raised, is sensed. The stop, light pen, and edge flags cause a display fi Ie
hal t. Further, the programmer can use anyone of the six pushbuttons on the display consol e to perform
some manually initiated display function. There are actually nine sources of program interrupts in the
Graphic-15 System. There are two types of interrupts in the PDP-15 computer system: program interrupts (PI) and automatic priority interrupts (API).
The program interrupt feature of the computer is enabled by programming an ION instruction. When the
interrupt enabling flag is raised, the PDP-15 computer program traps to location 0 at the conclusion of
the instruction currently being executed. When this occurs the program count is stored at location 0
and the next instruction, location 1, names a programmer specified subroutine that will identify the
source of the interrupt. Peripheral devices (Teletype for example) must be identified in this manner.
Once the interrupt producing device is identified, then its particular interrupt-producing flag must be
identifi ed. In the case of the VTl5, this can easil y be done by testing each interrupt source using the
Read Status 3 lOT instruction and a masking word. When the KA15 Automatic Priority Interrupt option
is used in the PDP-15, the first level (peripheral isolation) of interrupt identification is automatically
performed by the hardware.

For each of the peripheral equipments having a data channel assignment,

the PDP-15 program requires a service subroutine that is entered through a hardware-defined trap
address; for the Graph ic-15 System, this trap address is 54 at priority level 2. When used, this address will contain a memory reference instruction that directs operation of the computer to the VT15
Graphic Processor service subroutine in the program.
The mechanism for controlling the interrupt enabling signals on the occurrence of raised flags is a
series of fl ip-flops in the hardware, which when set, produce a computer program interrupt when the
flag is raised. These flags are: the stop, light pen, edge, and anyone of six pushbutton flip-flops.
However, before the status of anyone of the interrupt registers can be changed, bi t 10 of the Parameter
3 instruction must be set, or the Set Initial Conditions (SIC) lOT must be issued with the proper bits
set in the SIC word.

2-22

Also located in the Parameter 3 instruction are line selection bits 16 and 17 and line enabling bit 15.
Whenever a line selection is made by the programmer, this bit must be set.

The line selection codes

permit the programmer to identify any vector as a dashed line. The two line selection bits permit
three alternate dashed-line configurations.

Table 2-8 lists the possibilities in terms of line increments

lighted and unlighted, or on to off. Any dashed line may be blinked just like any vector. Characters
may not be dashed.

Table 2-8
Li ne Pa ttern Codes

Line Code

Display Ratio
(On to Off)

Line Pattern
Bit 16

Bit 17

Always on

6 I ines on; 2 I ines off

----

3 lines on; 1 line off

-------

1 line on; 1 line off

The skip producing part of the parameter/skip instruction format is shown in Figure 2-19. The skip
instruction has an operating code of 23 and is augmented into two subinstructions having operating
8
subcodes of 2308 and 234 , Skips provide the programmer with one of the most powerful decision
8
making tools available in the VT15 Graphic Processor instruction set. These skips, however, are
display file skips, not computer skips. Computer skips are programmed through the VT15 lOT instruction
set; the computer skip lOTs are described in Paragraph 204.8.

The two VT15 Graphic Processor skip

instructions do not deal with skips exclusively.
SKIP 1

SKIP 2

15- 0600

Figure 2-19

Skip Instruction Bit Formats

2-23

Table 2-9
Skip Instruction Variables

Skip 2

Skip 1

a.
b.
c.
d.
e.

2.5.4.4

a.
b.
c.
d.
e.

Skip on light pen sense indicator
Clear pushbutton after test
Skip on pushbutton
Pushbutton enable
Select pushbutton bank

Sync to line
Skip unconditionally
Load name register
Skip on name word
Name word enable

Skip 1 - The Skip 1 instruction permits the programmer to specify the variables listed in the

Skip 1 column of Table 2-9. The skips, with programmer-controlled pushbutton functions, provide the
programmer with both software and hardware decision-making powers. The skips can be used in the
display file to skip on light pen sense indicator, to branch on pushbutton register functions, and to
identify flag producing pushbutton functions devised by the programmer. A wide variety of programmed alternatives is possible through the use of the Skip 1 pushbutton bits, the Skip 2 name register
bits, and the Read Status 2 lOT instruction.
a.

Skip on Light Pen Sense Indicator - This instruction is used to skip whenever a light
pen hit occurs but the light pen flag, which is enabled and set by bits 14 and 15 in
the Parameter 3 instructi on, is not enabled. When bit 7 of the Skip 1 instruction is
set, any light pen hit will cause a display file skip without computer intervention.
The display processor does not stop since the flag was not set.

Clear any Pushbutton PB O through PBS - When bit 8 of the Skip 1 instruction is set
to a 1, the pushbutton fl ip-flop is cleared and the lamp turned off.

Skip on Pushbutton - When bit 9 of Skip 1 instruction is set, where any of the pushbuttons PB O through PBS on the display console are set by the programmer, and if
the corresponding pushbutton bit has been set in the Skip 1 instruction word,
a display file skip wi II occur. For example, if the programmer wishes to cause a
skip when he sets pushbutton PB 4 he sets bits 9 and 14 in the Skip 1 instruction; this
gives the octal code 230140. Thus, when the operator presses pushbutton PB4 on
the display console and the PB 4 flip-flop register in the VTls sets, a display file
skip will occur when the above Skip 1 instruction is executed.
To clear any pushbutton fI ip-f1op register, bit 8 in the Skip 1 instruction must be
set. If the PB4 flip-flop register is to be cleared immediately after the skip, bit 8
of the Skip 1 instruction should also be set. This gives the equivalent octal code,
231410, which results in the following sequence: when the operator presses pushbutton PB4 and the PB 4 pushbutton flip-flop register sets, the pushbutton indicator
lights, and a display file skip occurs when the above Skip 1 instruction is executed.
Subsequently, the pushbutton flip-flop register is cleared and tf,e PB4 indi cator
goes out. The sequence occurs so rapidly that no visible indication takes place.
(continued on next page)

2-24

c. If bit 9 of the Skip 1 instruction is not set and a pushbutton bit in the Skip 1
(cont) instruc tion is set, the corresponding pushbutton register wi II be set and the
pushbutton will light. The status of the pushbutton registers can be tested through
the Read Status 2 lOT instruction as previously described in Paragraph 2.4.3.
Computer skips on combinations of pushbuttons can be interactively programmed
by using mask words with the Read Status 2 lOT instruction, but the name
registers provide the programmer with easier programming possibilities.
d.

Pushbuttons PB O through PB 5 - Bits 10 through 15 in the Skip 1 instruction refer
to the pushbutton registers PB O through PB5 and are used with bits 8 and 9 as
previously indicated.

Select Pushbutton Bank - Used with the YM15 Display Console Multiplexer where
more than one display console is interfaced with the VTl5 Graphic Processor.
Bits 16 and 17 of the instruction are set or reset in combination to give four
possible combinations for selection of a pushbutton bank or LPSI flip-flop. The
address codes are as listed in Table 2-10.

Table 2-10
Pushbutton Bank Address Codes

Instruction Bi t
Pushbutton Sank

2.5.4.5

0
0
1
1

0
1
0
1

Used for only one bank
Optional Bank 1
Optional Bank 2
Optional Bank 3

Skip 2 - The Skip 2 instruc tion permits the programmer to specify the variabl es I isted in the

Skip 2 col umn of Table 2-9.
The name register is a 7-bit register in the VT15 hardware.

This register can hold 128 combinations of

binary codes. These codes can be used to tag subroutines for the purpose of future identification. The
name register is loaded through bits 11 through 17 of the Skip 2 instruction and load name bit 9.
For example, repeatable subroutines can be assigned 7-bit binary tags by the programmer which he can
encode as he calls them.

Then, if later the graph i c presentation drawn by the call ed subroutine is to

be deleted, he can identify the subroutine using the previously assigned name register tags.

2-25

2.5.5

Sync to Line Frequency - A synchronizing register in the VT15 permits the programmer to synchronize operation of the VTl5 with the incoming line frequency.
Synchronizing operation of the VT15 with the line frequency eliminates a visible
swimming effect on the CRT monitor when such interference occurs. When bit
17 of the Skip 1 instruction is set, the display file will stop. When the incoming
sample line frequency signal passes a preset threshold, a trigger pulse is produced
by the hardware. When the trigger pulse is sensed, the display file is started
again, but is now synchronized with the incoming I ine frequency.

Skip Unconditionally - This instruction is used to skip unconditionally in the display fi Ie. Whenever bit 8 in the Skip 2 instruction is set, an unconditional skip
wi II occur in the display fil e.

Load Name Register - This instruction is used to load the hardware name register
with any binary code between a 000 000 and 1 111 111, which gives the programmer 128 encoding possibilities. When bit 9 of the Skip 2 instruction is set,
7-bit name word given in bits 11 through 17 of the Skip 2 instruction will be
loaded into the hardware name register.

Skip on Name Word - This instruction is used to skip test for the word currently
stored in the name register. The content of the name register can be examined
through a skip test by setting bit 10 and setting the wanted name-register code
into bits 11 through 17 of the Skip 2 instruction. If the content of the name
register and the current skip code in the name register bits are identical,
a display file skip will occur.

Name-Word Bits NWO through NW6 - Bits 11 through 17 of the Skip 2 instruction
are used in two ways: to load the name register or to skip test the content of the
name register depending on whether bits 9 or 10 of the Skip 2 instructions are set.

Save/Restore Instruction

The 18-bit Save/Restore instruction format is shown in Figure 2-20. This instruction has a 4-bit
operating code of 248 which occupies bits 0 through 3. Bit 4 of this instruction indicates whether the
parameters listed below should be saved from or'restored into the display file. When bit 4 of this instruction is set, the parameters should be restored into the display file; when this bit is not set (a zero)
the parameters should be saved. Bits 5 through 17 of this Save/Restore instruction form a 13-bit address field capable of naming up to 8,192 locations in the PDP-15 core memory. The 13-bit address
is used to name the location where the parameters listed below are to be saved, or from which they
are to be restored into the display file:
a.

Offset

Light pen interrupt enabl e

Rotate

Edge interrupt enabl e

Blink

Pushbutton interrupt enabl e

Edge flag enable

i·

Light pen flag enable

Brightness

Line bits

Stop interrupt enable

2-26

I : :

: : : : I
HI-0616

Figure 2-20

Save/Restore Instruction Bit Format

When the Save/Restore instruction is used, the parameters listed in a. through k. above are collected
from their respective registers into a formatted status word.
2-21.

The status word format is shown in Figure

The content of the addressed save or restore location can be easily examined by simply issuing

a LAC instruction which names the status word location.

This instruction is useful when it is desired to

change one or two parameters in the display file for a small part of the display file.

Parameters that

are normally unchanged are saved into some location in the PDP-15 core memory and then restored
after the display file functions have been programmed. This instruction is also useful when jumping
to subroutines. The status of previousl y programmed parameters may be saved at some memory location
and then restored when leaving the subroutine which permits full nesting of any level of subroutines.

15-0617

Figure 2-21

2.5.6

Save/Restore Instruction Status Format

Basic Vector Instruction

The 18-bit Basic Vector instruction format is shown in Figure 2-22.

This instruction has a 3-bit oper-

ating code of 48 which occupies bits 0,1, and 2. This instruction provides the parameter and data
fields necessary to generate any vector up to full screen in length in anyone of eight directions.
This instruction also has a light pen and intensity bit. When enabled, light pen bit 3 will produce a
light pen enable only on the vector defined by this instruction. Intensity bit 4 permits the programmer to draw the vector either visibly (bit set) or invisibly (bit unset).

15-0595

Figure 2-22

Basic Vector Instruction Format

The VT15 draws lines on the CRT through an analog function generator in anyone of eight possible
directions.

In addition to the specification of the vector directions, the vector I ine length, up to full

screen, must also be specified.

The linear vector is generated from a relative position either intensified

(visible) or unintensified (invisible). The basic vector instruction is used to specify three characteristic~

2-27

of the wanted line: intensification (visible or invisible), direction, and displacement (called delta).
Initially, one or more basic parameter instructions that specify other characteristics of the overall display or functions of the graphic processor are used to determine other characteristics of vectors such as
brightness I 90° rotation, and scale.
Figure 2-23 shows eight vectors superimposed on a basic cartesian coordinate system. The direction for
each vector is shown by the arrowhead on each line. Bits 5 through 7 establish vector direction. It
can be seen from the figure that vectors lying

(-X,+Y)
3

delta (6)

(O+Y)
2

(+x+V)

-------3

along the axes of the coordinate system can be
expressed by their direction 0, 2, 4, or 6 and

the displacement of the line {delta} along the axis

I delta

upon which they are located. The coordinates of

I
I

these I ines need not be expressed because they

-3

-2

4.----+----4---~~--~-----r----.o

are already defined by delta and the line direc-

(-X,O)

(+X,O)

tions. For example, a vector that takes direction
4 will move to the left on (or parallel with) the
X-axis.
Examining vectors 1, 3, 5, and 7, it can be seen

-3

5
(-X,-Y)

that their displacement along both axes has the

(O,-V)

7
(+X.-V)
15-0623

same delta; vector 3 is displaced 3 delta units

Figure 2-23

Basic Vector Direc tions

when projected to the negative X-axis and 3
delta units when projected to the positive Y-axis. Again, these coordinates do not need to be expressed because they are defined by del ta and the direction that vector 3 takes. To express any basic
vector only direction and delta (relative displacement along an axis) need be expressed to generate
that vector.

Note that the length of any odd-numbered direction vector will be 1.416 times delta.

Bits a through 17 of the Basic Vector instruction permit the programmer to specify any vector length
(delta word) between 0.009 to 9-1/4 in.

Each binary increment, from 0 to 1024 increases the vector

length approximately .009 in. (VT04).

2.S.7

Basic Short Vector Instruction

The la-bit Basic Short Vector instruction format is shown in Figure 2-24. This instruction has a 3-bit
operating code of SR which occupies bits 0, 1, and 2. The Basic Short Vector instruction provides the
parameter and data fields necessary to generate two short vectors up to approximately 0.06 in. (prior
to scaling) in length in any of the eight basic directions. This instruction permits the programmer to
pack two short vectors into one instruction; thus conserving core space. The use of this instruction

2-28

rather than the Basi c Vector instructi on makes more effi c ient use of core memory and I/O bus ti ming.
Using this instruction togethe~ with the scale code bits of the Parameter 1 instruction pennits vectors
up to approximately 1-1/4 in. to be drawn.

15-0613

Figure 2-24

Basic Short Vector Instruction Bit Format

Bit 3 of the Basic Short Vector instruction is also the light pen bit for the vectors defined by both
direction and data fields of this instruction. Light pen I imi tations described in Paragraph 2.5.4 apply
here as well. Bits 4 and 11 are the intensity bits for the first and second short vectors, respectively.
The two intensity bits are provided so that they may be drawn visibly (bits set) or invisibly (bits unset)
independently of each other.
Bits 5,6, and 7 establish direction for the vector whose delta word is defined by bits 9,10, and 11.
Bits 12, 13, and 14 establish direction for the vector whose delta word is defined by bits 15, 16, and

17.
When programming basic short vectors, the same considerations given basic vectors should also be given
basic short vectors.

2.5.8

Jump/Jump-to-Subroutine Instruction

The 18-bit Jump/Jump-to-Subroutine instruction format is shown in Figure 2-25.

This instruction has

a 3-bit operating code of 6 which occupies bits 0, 1, and 2. This instruction can be used either as
8
a Jump or a Jump-to-Subroutine instruction, depending on the state of bit 3. If bit 3 is set, the instruction is a Jump-to-Subroutine; if bit 3 is reset the instruction is a Jump.

: :
15-1614

Figure 2-25

Jump/Jump-to-Subroutine Instruc tion Bi t Format

The Jump, or DJMP instruction permits the program to repeat instructions already performed or to jump
over display file instructions in the normal programmed sequence. This instruction is used within one
memory bank. The hardware loads the effective address of the location named in the instruction address
field into the VT15 program counter, thereby changing the normal programming sequence.

2-29

When the Jump-to-Subroutine (DJMS) instruction is ordered by the programmer f the DJMS instruction
stores a pointer address (bits 5 through 17) in the first location of a subroutine and transfers program
control to the second location of the subroutine. After the subroutine has been executed f the pointer
address identifies the next instruction to be executed. This scheme provides the programmer with a
method of exiting the basic display file to perform some graphic display function, and a means of
returning to the correct location in the basic display file at the completion of the subroutine.
The indirect address bit (bit 4) provides a means of addressing to anyone of 128K core locations. The
13-bit address (bits 5 through 17) of this instructi on does not give the pointer word location, but the
location of the pointer word address. Indirect addressing permits the pointer word to be expanded to
17 bits.

2.5.9

Slave Instruction

The Slave instruction allows the programmer to selectivel y blank or intensify up to four mul tiplexed
display consoles when the VM15 Display Console Mul tipl exer option is implemented. The instruction
also controls the light pen enable function on each display. The Slave instruction bit format is shown
in Figure 2-26.

15-0610

Figure 2-26

Slave Instruction Bit Format

The instruction is used by setting the proper bits to a logical 1 to enable either the intensity f or light
pen, or both, on any combination of up to four di splay consol es.

2.5.10

Arbitrary Long Vector Instruction

When the W15 Arbitrary Vector Generator option is installed in the VT15 Graphic Processor,
vectors other than the eight basic vectors shown in Figure 2-23 can be drawn without resorting to time
consuming software al gorithms that use the Basic Vector instruction. For example, a software
algorithm to draw a 22.5° vector requi res 512 instructions. When the VV15 option is implemented,
this same vector requires only two instructions. Bit formats for the 2-word Arbitrary Long Vector
instruction are shown in Figure 2-27.
The operation code for both words is 1° , In the first word I bit 4 is set to intensify the vector. The
8
light pen is enabled when bit 5 is set. Bit 6 specifies the direction of X. When bit 6 is a logic 1,

2-30

the direction is negative. When bit 6 is reset 1 the direc tion of X is positive. Bit 7 is not used. Bits
8 through 17 define the /J.X component length of the vector.

WORD 1 -t::,.x

It:~1

WORD 2-t::,.y

I I I
0

Figure 2-27

:10

+
12

o':""y +CTOR:
15-0611

Arbitrary Long Vector Instruction Bit Format

In the /J.Y word, bit 6 specifies the direction of the /J.Y component and bits 8 through 17 specify the
length of the /J.Y component. Both words must be used in the proper sequence to execute the vector.
The condition that I1X and I1Y both equal zero is illegal. If this condition should occur, the VT15
wi II cycle indefinitely in a "normalization" loop.

2.5.11

Arbitrary Short Vector Instruction

The Arbitrary Short Vector instruction can be used instead of Arbitrary Long Vector to conserve core
space and execution time when only short vectors are to be generated. As indicated in the bit format 1
Figure 2-28, both the I1X and I1Y components of the vector are contained within a single instruction
word.

15-0612.

Figure 2-28

Arbitrary Short Vector Instruction Bit Format

Because of the reduced I1X and I1Y fields, the length of a vector drawn by the Arbitrary Short Vector
instruction is limited to 31 raster units. However, by using the scaling register, the length can be
increased.

2-31

CHAPTER 3
PROGRAMMING EXAMPLES

3.1

INTRODUCTION

This chapter describes some very simple subroutines that a novice can use to familiarize himself with
the VT15 lOT and graphic processor instructions. These subroutines will acquaint the user with
sufficient basic concepts so that he can examine further capabilities and possibilities on his own.
The subroutines are bri ef so that they can be manually deposited into core / and al tered / from the
PDP-15 operator's console. Programs are written at the machine language level.
NOTE
The VT1S Graphi c Software System is not described in
this chapter. Refer to the Graphic-15 Programming
Manual/ DEC-1S-ZFSA-D / for system software information and programming.

3.2

MACRO-1S MNEMONICS

Table 3-1 is a partial list of mnemonics assignetl to the Graphic-1S instruction set.

The MACRO-15

Assembler recognizes these symbolic mnemonics to assemble the program in machine language.

The

equivalent machine language instruction is listed in octal base. The mnemonics are included in the
programming examples to fami! iarize the reader with their usage.

3.3

MICROCODING INSTRUCTIONS

Microcoding allows the programmer to combine more than one instruction in a single display file location. An exclamation mark (!) is used between mnemonics of the instructions to be microcoded. The
MACRO-15 Assembler interprets the exc lamation mark to indicate microcoding and performs an inc! usive OR of the machine language instructions in the accumulator to provide the combined microcoded
machine language instruction.

3-1

Table 3-1
Instruc tion Mnemon ics

Mnemonic

Octal

Definition

lOT Read Instructions t
RS1
RS2
RS3
RPC
RYP
RXP

703012
703032
703152
703072
703052
703112

Read Status 1
Read Status 2
Read Status 3
Read program counter
Read Y position register
Read X position register
lOT Skip Instructions

SPSF
SPLP
SPPB
SPEF
SPDF
SPDI
SPES

703001
703021
703041
703061
703101
703121
703161

Skip on stop flag
Skip on I ight pen flag
Skip on pushbutton flag
Skip on edge flag
Skip on any flag
Skip on any interrupting flag
Skip on external stop flag

lOT Operate Instructions
LSD
SIC
STDP
RES

703004
703024
703044
703064

Load and start display
Set initial condi tions
External stop display
Resume display after flag
Character Generation

CHARI
CHARS

000000
040000

Character input
Character string

Point/Graph Plot Instructions
GY
GX
PY
PX

142000
146000
140000
144000

Graphplot mode, Y direction
Graphplot mode, X direction
Point mode, Y direction
Point mode, X direction

tThe Clear AC bit is included in the lOTs above.

(continued on next page)

3-2

Table 3-1 (Cont)
Instruction Mnemonics

Mnemonic

Octal

Definition

Parameter 1 Instructions
DNOP
INTO
INT1
INT2
INT3
INT4
INT5
INT6
INTl
SCALE
STOP

200000
202000
202200
202400
202600
203000
203200
203400
203600
200020
204000

Display no operation
Intensity 0
Intensity 1
Intensity 2
Intensity 3
Intensity 4
Intensity 5
Intensity 6
Intensity 7
Set scale
Stop display
Parameter 2 Instructions

LPON
LPOF
OSETN
OSETF
ROTON
ROTOF
BKON
BKOF
EDGON
EDGOF

210014
210010
210003
210002
210060
210040
211400
211000
210300
210200

Enable light pen
Disable light pen
Offset on
Offset off
Rotate on
Rotate off
Blink on
Blink off
Edge fl ag enab Ie
Edge flag disable

Parameter 3 Instructions
ENSTP
ENLP
ENEDG
ENPB
SOLID
DASH 1
DASH 2
DASH 3
DISABL

220300
220240
220220
220210
220004
220005
220006
220007
220200

Enable stop interrupt
Enable light pen interrupt
Enable edge flag interrupt
Enable pushbutton interrupt
Enable solid lines
Dashed line, length 1
Dashed line, I eng th 2
Dashed line, length 3
Disable all interrupts
Skip 1 Instruc tions

SKPB
STPB
CLPB

230400
230000
231000

Skip if indicated pushbuttons are set
Set indicated pushbuttons
Clear indicated pushbuttons
(continued on next page)

3-3

Table 3-1 (Cont)
Instruction Mnemonics

Mnemonic

Octal

Definition

Skip 1 Instruc tions (Cont)
BO
B1
B2
B3
B4
B5
SLPSI

230200
230100
230040
230020
230010
230004
232000

Pushbutton 0
Pushbutton 1
Pushbutton 2
Pushbutton 3
Pushbutton 4
Pushbutton 5
Skip on light pen sense indicator
Skip 2 Instructions

SKIP
LDNM
SPNM
SYNC

235000
234400
234200
236000

Unconditional skip
Load name
Skip on name
Resume in sync
Save/Restore Instruc tions

SAVE
RSTR

240000
260000

Save mode
Restore mode
Basic Vector Instructions

VO
V1
V2
V3
V4
V5
V6
V7
INT

400000
402000
404000
406000
410000
412000
414000
416000
020000

Vector direction 0
Vector direction 1
Vector direction 2
Vector direction 3
Vector direction 4
Vector direction 5
Vector direction 6
Vector direction 7
Intensify point or vector

INCR

500000

Basic increment mode

DJMP
DJMS

600000
640000

Display jump
Display jump-to-subroutine

LPEN

010000

VLPEN

040000

Light pen enable-arbitrary vector and char input modes
Light pen enable-vector and increment modes

3-4

For example, the programmer can use a single statement to set the parameters for a specific operation,
such as intensity and scale.

The individual mnemonics INT4 and SCALE are coded as:

INT4 ! SCALE
When the program is assembl ed 1 the machine language code for each instruction will be ORed in the
accumulator as follows:
Mnemonic

Octal

Mach ine Language

INT4
SCALE
INT4 ! SCALE

203000
200020
203020

010 000 011 000 000 000
010 000 000 000 010 000
010 000 all 000 010 000

NOTE
Microcoding can only be performed on parameter and skip
i nstruc ti on s wi th in th e same group, hav i ng th e sa me basic
op code. In the above example, both instructions were
selected from the Parameter 1 group listed in Table 3-1.
If the instructions are not in the same group, the incl usive
OR operation may resul t in an undesired op code.

3.4

BASIC SQUARE

This subroutine can be manually toggled into memory using the PDP-15 operator console. When the
program is started at location 100, a square as shown in Figure 3-1 wi II be displayed on the CRT.
Address
(Octal)

Contents
(Octal)

50
100
101
102

001000
200050
703004
740040

lAC50
LSD
HlT

1000

202220

IN Tl !SCALE 0

1001

211252

lPOF!OSETF! ROTOF! BKOF! EDGOF

1002

220004

DISABL! SOLID

1003
1004
1005
1006
1007
1010
1011

144000
140000
420040
424040
430040
434040
601000

PXIO
PYIO
VO!INT!40
V2 !INT!40
V4! INT!40
V6!INT!40
DJMP! 1000

Mnemonic

Comments
/Vector square routine
/load VTl5 starting address
/load and start display lOT
/Program hal t

3-5

/VTl5 display file starts at 1000
/Parameter 1: Inteni sty 1,
/Scale 0 increments
/Parameter 2:
/AII items turned off.
/Parameter 3: all interrupts
/disabled, solid line selected
/Point plot X = 0 uni ts
/Point plot Y = 0 uni ts
/Vector in a direction, 40 units
/Vector in 2 direction, 40 units
/Vector in 4 direction, 40 units
/Vector in 6 direction, 40 units
/Display Jump to square box routine

40 UNITS

o RI GIN - , ' - - - - - - - '
INT1! SCALE 0

~
15-0566

Figure 3-1

Basic Square

The VTl5 Graphic Processor will continue to cycle through the display file.

The PDP-15 halts at

address 102. To experiment with a few instructions, stop the program and modify the display file
exampl e as indicated in the following paragraphs.

3.4. 1

Relocation

M~dify two locations in the display file to change the position of the square on the display:

Address

Contents

Mnemonic

Comments

1003
1004

144600
140600

PX!600
PY!600

Point plot X = 600 units
Point plot Y = 600 units

The resul ts are shown in Figure 3-2.

40 UNITS

I NTl

1.00
I._UNITS X

! SCALE 0

ORIGIN
600
UNITS

15-0587

Figure 3-2

3.4.2

Relocation

Increase Intensity and Size

Modify the Parameter 1 instruction in the display file to increase the intensity and size of the square:
Address

Contents

Mnemonic

Comments

1000

203230

INT5! SCALE10

/Parameter 1:
/Intensi ty 5,
/Scale 10 units

3-6

The resul ts are shown in Figure 3-3.

400 UNITS

Loo

1""'TS
ORIGIN

.-x

INT5! SCALE 10

15-0588

600
U NI TS

Figure 3-3

3.4.3

Increase Intensity and Size (Parameter 1)

Blink

Modify the Parameter 2 instruction in the display file to show one of the enable bits in operation.
The bit associated with blink has been selected.
Comments

Address

Contents

Mnemonic

1001

211652

LPOF! OSETF! ROTOF! BKON ! EDGEOF

As a result of this modification, the square shown in Figure 3-3 will blink on and off approximately four
times per second.

3.4.4

Parameter 3 Modification

Modify the Parameter 3 instruction in the display file to produce a dashed-line display.
Address

Contents

Mnemonic

Comments

1002

220007

DASH3

/Selects one I ine on and one I ine off
las listed in Table 2-7.

The resul t of this modification is shown in Figure 3-4.

3-7

Figure 3-4

3.5

DASH3 Modification (Parameter 3)

CHARACTER INPUT

This subroutine can be manually-deposited into memory to demonstrate the use of the Character Input
i nstruc ti on .
Address

Contents

60
200
201
202

002000
200060
703004
740040

LAC 60
LSD
HlT

2000

203020

INT41 SCAlEO

2001

211252

LPOF I OSETF I ROTOF I BKOF I EDGOF

2002

220004

DISABl I SOLID

2003
2004
2005
2006
2007
2010

145000
141000
000304 t
000305 t
000303 t
602000

PXll000
PYll000
CHARIID
CHARlIE
CHARIIC
DJMP 2000

Mnemonic

Comments
/Character input routine
flood VTl5 starting address
/load and start display
/IOT
/Program halt
/Parameter 1: In tensi ty 4,
/Scale 0 increments
/Parameter 2: All items
/turned off.
/Parameter 3: All interrupts
/disabled, solid line selected
/Point plot X = 1000 units
/Point plot Y = 1000 units
/Character D input
/Character E input
/Charac ter C input
/Display jump to
/Character input
/routine

t 7- bit ASCII codes may also be used.
The Graphic-15 continues to cycle through the character input display file, displaying the characters
DEC on the CRT as shown in Figure 3-5.

3-8

4 UNITS

DE[

Je
!_,

ISUNITS

1'000

Y UNITS

ORIGIN

1000
UN IT S

Figure 3-5

3.6

15-0589

Character Input

DISPLAY FILE CHAINS

The various routines in the display file chain can be chained together to provide combinations as required. For example, the basic square shown in Figure 3-4 can be displayed with the characters shown
in Figure 3-5 by modifying the routines as follows:
Address

Contents

Mnemonic

Comments

1011

602000

DJMP!2000

2010

601000

DJMP! 1000

/Go to character input
/routine
/Go to basic square
/routine

Start at location 100(8) or 200(8)' The VT15 will cycle through both routines in the display fi Ie to
provide both displays.

3-9

APPENDIX A
WORD FORMATS

A.l

lOT STATUS WORD FORMATS

\5 - 0601

Read Status 1 Word Format
o

15-0602

Read Status 2 Word Format

\5-0603

Read Status 3 Word Format
o

\5- 0604

Read X Position Word Format

\5-0605

Read Y Position Word Format

A-l

15-0618

Read Program Counter Word Format

15-0598

Set Initial Conditions Word Format

A.2

VT15 INSTRUCTION SET

15-0606

Character Input Instruction Bit Format
2

0
0

I·I~RI

l' Brrs: OF +ESS:

: I
15-0606

Character String Instruction Bit Format
0

15-0599

Point/Graph Plot Instruction Bit Format
PARAMETER 1

PARAMETER 2

PARAMETER 3

15-0597

Parameter Instruction Bit Formats
A-2

SKIP 1

SKIP 2

15 - 0600

Skip Instruction Bit Formats

0
0

I I I I'~H I :

1~-BITS FF AO+ESS

15-0616

Save/Restore Ins truc ti on Bit Format

15-0617

Save/Restore Instruction Status Format

15-0595

DIRECTION BITS

2
3

4~----------~----------~O

6
15-0596

Basic Vector Instruction Bit Format

A-3

"
15-0613

Basic Short Vector Instruction Bit Format
0

2
0

JMS

I'NDR I

8
:.. -

1 fODR+

8IT

: :
15-1614

Jump/Jump-to-Subroutine Instruction Bit Format

WORD 2-/:lY

I I l~o;~1
0

:10

O';AY +CTOR :
15-0611

Arbitrary Long Vector Instruction Bit Format

15-0612

Arbitrary Short Vector Instruction Bit Format

15-0610

Mul tipl exer (Slave) Instruc tion Bit Format

A-4

APPENDIX B
EIGHT-BIT ASCII OCTAL CHARACTER CODES

Character

8-bit ASCII

Character

8-bit ASCII

300
301
302
303
304
305
306
307
310
311
312
313
314
315
316
317
320
321
322
323
324
325
326
327
330
331
332
333
334
335
336
337
215
375

(Space)
!

240
241
242
243
244
245
246
247
250
251
252
253
254
255
256
257
260
261
262
263
264
265
266
267
270
271
272
273
274
275
276
277
211
212

A
B
C
D
E
F
G
H
I

J
K

L
M
N
0
P
Q

R
S

T
U

V
W
X

y
Z
[

\
]
1\

Carriage Return
ALT MODE

$
%
&
I

(
)
*

0
1
2
3
4

5
6
7
8
9
:

;

<
=

>
II

TAB
Line Feed

B-1