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MAINDEC-15-D0CA-D

January 1970

25 pages

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Document:	Memory Address Test
Order Number:	MAINDEC-15-D0CA-D
Revision:
Pages:	25
Original Filename:	http://bitsavers.org/pdf/dec/pdp15/diag/MAINDEC-15-D0CA-D_Memory_Address_Test_Jan70.pdf

OCR Text

15
!7fnoi<.'/
j))P -

IDENTIFICATION
Product Code:

MAINDEC-15-DOCA-D (D)

Product Name:

Memory Address Test

Date:

January 5, 1970

Maintainer:

Diagnostics Group

. Author:

Edward P. Steinberger

ABSTRACT
The Memory Address Test checks the memory system of the PDP-15 to ensure
that all memory locations not occupied by the program in a given 4K memory
stack can be uniquely addressed. It does th is by writing the address of a
memory location into itself and checking to see that it is there. The
complement of the address is also written to ensure that all bits of a word
can be accessed. Checks are also made to ensure that only one memory
location is written into whenever memory is addressed, and that cores
of different memory locations are not shorted together inside the memory
stack. Errors are indicated to the operator via the teleprinter.

REQUIREMENTS
Equipment
Standard PDP-15 Computer

The program uses all of 4K memory for the program or as a test are. The
program occupies memory from location 07200 to 07770 and tests all locations
below 07200.
3.

LOADING PROCEDURE
Method
Put HRI tape of program in reader (High speed, if available).
Set ADDRESS SWITCHES to 07200 ; the BANK MODE switch to a 1.
Depress I/o RESET.
Depress and release READ IN key.

STARTING PROCEDURE

4. 1

Control Switch Settings
The following is a table of accumulator switch settings and their action on the
program.
AC Switch

Set As

o
1

o
2

Action
Ha It on error
Don't halt on error
Don't print errors
Pr i nt errors
Ring bell on error
Ring bell after N passes

AC Switch

Set As

Action
Loop on current number
(address or complement)

o
1

Loop on current location

o
1

Loop on current test

o
6

Skip lis in Dis test (Test 4)

Halt after completing all tests

Switch 3 operates only with the first test, switch 4 with first and
fourth, 3 has presence over 4 (in first test), and 4 over 5 (in first
and fourth tests). N is an arbitrary number (initially 200000 ) for
8
the first and fourth t,ests, and 48 for the second and third. It may be
changed at the operatorls discretion by modifying the contents of
locations 07202 and 07200 respectively to the appropriate LAW-N
instruction.
4.2

Starting Address
The starting address of the program is 07200. The restart addresses
are 07200, 07257/ 07310, and 07353 (see listing).

4.3

Program and/or Operator Action
Set ADDRESS SWITCHES to 07200.
Set ACCUMULATOR SWITCHES to desired positions (see Section 4. 1).
Normal setting is 500000.
Depress I/o RE5ET .
Depress START.

OPERATING PROCEDURE

5.1

Operational Switch Settings
See Section 4. 1 .

5.2

Program and/or Operation Action
a.

To put the program in the ISCOPE mode, the ACCUMULATOR
SWITCHES should be set to 260000 {don't halt, don't print, bell
after N passes, loop on current number, loop on current location}.

To test an individual location (first test), store the address to be tested,
in location 07756 (PO I NT) and restart the computer at location 07211
(FIRST +7) to store the address in itself I or location 07225 (SECOND)
to store the complement (lIS) in the address. ACCUMULATOR SWITCHES
should be set to 260000 (see a).

To run the individual location test (whole first test) I restart the computer
at location 07200 (FIRST-2) with AC Switches 3 and 4 a 0 and 5 a 1.

To narrow the first test to less than all of memory not occupied by the
program, place the new upper limit in location 07762 (UPLlM), then
start the computer at location 07200 (FIRST -2).

To test crli of memory in the forward direction only I restart the computer
at location 07257 (THIRD) with AC switch 5=1.

To test a II of memory in the reverse direction only, restart the computer
at location 07310 (FIFTH) with AC switch 5 = 1.

To narrow the second and th ird tests to I ess than a II of memory not
occupied by the program, place the new upper limit in location
07763 (UPLIM 1) I then restart at the appropriate address for the
particular test. Checks will still be made starting from location
00000 up to the limit for the forward test, or from the I im it down
to Iocat i on 000000 for the reverse tes to

To write lis into a particular memory location (fourth test) store the
address to contain all lis in location 07755 (PNTR 1) and restart the
computer at location 07360 (,SEVENH+5) with AC switch 4 = 1.

To narrow the fourth test to less than all of memory not occupi~d by the
program, place the new upper I imit in location 07762 (UPLlM), then
start the computer at the appropriate starting address. Checks will
still be made starting from location 00000 up to the I im it.

To run the Write 1's in a Field of O's test (fourth test), restart the
computer at location 07353 (SEVENH) with AC sw itch 5 = 1.

ERRORS
Unless AC switch 1 is a 1, all errors will be printed on the teleprinter.

6.1

Error Halts and Descript.ion
There is only one error halt in the program oj location 07503. This halt will
occur anytime there is an error; there is no usefu I information in the AC. The
computer will halt at location 07451 if all tests are not repeated.

6.2

Error Recovery
If AC switch 0 = 1, the computer will halt on an error. To recover and repeat
the failure, reset AC switches 0 to 5 as necessary (see Section 4. 1) .and then
depress CONTINUE.
To test a particular location, see Section 5.2.

6.3

Error Switch Hierarchy

(SWITCH Z)

......•.

I
I

(SWlfCH 0)

~- ---R~~~~---MAIN pqOGRAM
CHEC> COR REPEAT

or ERROR

CONDIT '0"'5

6.4

Error Typeout Examples

6.4. 1

Individual Location Test
ADDRESS

GOOD

BAD

001234

001230

The above example shows that location 1234 dropped bit 15 when its
ADDRESS was written in it.

6.4.2

Forward Write-Read and Reverse Complement Write-Read Tests (both typeouts
are the same)
Forward Write-Read Test
ADDRESS
001234

GOOD
001234

BAD
003234

The above example shows that location 1234 contained 3234 when it shou Id
have contained 001234. This may have been due to the "picking up" bit 7
in the memory buffer register when addressing location 0001234, or it may
have been due to "double addressing" (addressing location 001234 when the
memory address register contains 001234 and 003234).
6.4.3

Write l's in a Field of O's Test
WRITE ONES IN A FIELD OF ZEROES
ADDRESS
001234
001235

GOOD
000000
000000

BAD
000004
000004

The above examples shows that location 01234 contained 000004 when it
should have contained 000000. This may have been due to bit 15 of location
01234 being shorted to bit 15 of location 01234, 01235. This same error
may have caused location 01235 to be in error. If location 07764 (PNTR 1)
contained 01235 at the first error and 01234 at the second error, this is
probably true.
7.

EXECUTION TIME
Tests 1, 2 and 3 - insignificant
Test 4 - 7 minutes

PROGRAM DESCRIPTION
There are four basic parts to the program. The first tests each memory
location, not occupied by the program, to assure that all bits of each may
be accessed. It does this by first writing the address of a location in itself,
and then checking to see if it was properly written. The l's complement
of the address is then written into the same location and checked, to assure
that all bits of a memory location may be written and read. The second
portion writes sequential addresses into their respective memory locations
in the forward direction for all of memory not occupied by the program, and
then each location is checked in the forward direction to assure that it
contains its own address. The third portion writes the complement of each
address not occupied by the program into sequential memory locations
respectively in the reverse direction (from the highest location down

to the lowest) ond then checks each of the locations in the reverse direction
to ensure that it contains its re~pective address complemented.
The fourth portion of the test writes 0 in a II memory locations not occupied
by the program, and then writes all lis in one memory location. All of the
memory locations are then checked to assure that they contain 0, except
the one location con~aining all l's.

8.1

Individual Location Test
a.

The first function performed is that of initialization. Several loop
counters and message header locations are initialized.

An internal pointer for the program is set to 0 to indicate the first
location to be tes ted is location O.

The number wh ich is in the interna I pointer is then stored in the
memory location specified by the pointer and then the memory location
is checked to see the correct number has been stored. An error
causes the typeout subroutine to be called.

A check is then made to see if this portion of the test (current
number) shou Id be repeated (sw itch 3). If so, the program goes to (c).
If not, the program goes to (e).

8.2

The number in the internal pointer is obtained, complemented and
stored in the memory location specified by the pointer and then the
location is checked to see the correct nt,Imber has been stored. An
error causes the typeout subroutine to be called.

A check is mode 10 s~e if th is portion (number complemented) of the
tes t (current number) shou ld be repeated (sw itch 3). If so, the program
goes to (e). If noi, the program goes to (g).

A check j, made to see if the current location shou Id be tested aga in
(switch 4) and if so f the program goes to (c). If not 1 the number in
the internal pointer is incremented and the program goes to (c)
untj I a II locations have been tested.

A check is then performed to see it: the whole test should be repeated
(switch 5). if so, the program goes to (b). If not, the program goes
on to the next portion.

Forward Write-Read Test
a.

The first function performed is that of initial ization.
header locations are initialized.

An internal pointer for the program is initialized to 0 to indicate the
first location to be tested is location O.

Severa I message

8.3

The number which i~ in the internal pointer is then stored in the memory
location specified by the pointer.

The pointer is then incremented and (c) is repeated until a II memory
locations have had their addresses stored in them.

The internal pointer is then set back to O.

The number which has been stored in the location specified by the
pointer is obtained and checked to see that it is correct.

The pointer is then incremented and (f) is repeated until all memory
locations have been checked. Any error causes typeout on the
teleprinter.

A check is then made to see if this test should be repeated (switch 5).
If so, the program goes to (b). If not, the program goes on to the
next portion.

Reverse - CO'llplement Write-Read Test
a.

The first function performed is that of initialization. Several
message header locations are initial ized.

An internal pointer for the program is initialized to the first location
under the program (07177).

The number which is in the internal pointer is obtained, complemented
(1 IS) and then stored in the memory location specified by the pointer.

The pointer is then decremented (1 is subtracted from it) and (c) is
repeated until all memory locations have had the complement addresses
stored in them.

The internal pointer is then set back to 07177.

The number which has been stored in the location specified by the
pointer is obta ined and checked to see that it is correct.

The pointer is then decremented and (f) is repeated until all memory
locations have been checked. Any error causes typeout on the
teleprinter.

A check is then made to see if this test should be repeated (switch 5).
If so, the program goes to (b). If not, the program go<es to (i).

A check is then made to see if the next test should be skipped
(sw itch 6). If so, the pl'ogram goes to 8. 1 (a). If not, the computer
goes to 8.4 (a).

8.4

Write 115 in a Field of 0 15 Test

The first function performed is that of initialization. Several
message header locations are initialized.

The all 115 pointer is set to O.

All of memory tested is then cleared.

All 115 is then stored in the location pointed to by the all 115 pointer

A memory pointer is then set to 00000.

The contents of the memory pointer is then checked against the
all 1'5 pointer. If they are the same, the AC is set to all 115,
otherwise it is set to O. This is then stored in a temporary storage
location.

The contents of the location indicated by the memory pointer are
then obta ined and compared aga inst the contents of the temporary
storage location. If they are the same, the program goes on to
(h). If they are different, the error typeout routine is called after
wh ich the program goes on to (h).

The memory location pointer is then incremented and checked
to see if it is at the upper limit. if it is not, the program goes
to (f). If the pointer is at the upper limit, the program goes to 0).

A check is then made to see if the bell shou Id be rung (sw itch 1).

A check is then made to see if the current location should be looped
upon. If not, the program goes to (I). If the current I ex: ation shou Id
be looped upon, the program goes to (k).

If there was no lis in OIS error, the location containing lis is
cleared, and control goes to (d). If there was a lis in OIS error,
the program goes to fc).

If there was a lis in 0'5 error, the a Ill's pointer is incremented, and
if it is not the upper limit, the program goes to (c). If it is the upper
I im it, the program goes to (m). If there was no lis in O's error, the
location containing all lis is cleared, the all lis pointer is incremented,
and if not the upper limit, control goes to (d). If it is the upper
limit, control goes to (m).

A check is then made to see if the test should be repeated (switch 5).
If so, control goes to (b). If the test is not repeated, control goes
to (n).

A check is made to see if all tests should be repeated (switch 7). If
so, control goes to B. 1 (a). If all tests are not to be repeated, the
computer halts.

PAn

M. A. T •

.TITLE M.A.T.
I

07200
(11720(11
(117201
(1172~2

(1171'03
(117204
07205
07206
07207
07210
07211
07212
07213
07214
07215
07216
07217
07220
07221
07222
07223
07224
07 22 5
07226
07227
07230
07231
07232
07233
07234
07235
07236
07237
07240
07241
07242
07243
~7244

0724'5
071'46
07247
07250
07251
07?5?
07253
07254
07255
07256

777774
~47745

76(11000
(1147744
207746
(1147465
207764
047754
147756
207756
067756
047761
227756
547756
607221
74""001
107453
750004
507747
740200
607211
207756
740001
067756
047761
227756
740001
547756
607237
74ti1001
107453
750004
507747
740200
607225
750004
507750
74(11200
607211
107556
447756
2077'56
'547762
74H.H~0

607212
107622
607210

IMEMORY ADORESS TEST
.FULL
.lOC 7200
IINDIVIDUAL lOCATION TEST
LAW 17774 IINITIALltE LOOP
OAC COUNT1
lAW
FIRST
OAC COUNT ICOUNTER
LAC JMPT
DAC CHANGE
lAC tt21
DAC PNTR lAND MESSAGE POINTER
DtM POINT ItERO POINTER
LAC POINT IGET ADDRESS TO BE STORED
GAC. POINT
lAND STORE IT IN ITSELF
nAC TEMP lAND TEMP
IGET THE NUMBER WRITTEN IN MEMORY
lAC. POINT
SAO POINT lAND CHECK IT AGAINST ITSELF
IAlL OK.
JMP .+3
CMA
fERROR
JMS ERROR
LAS
AND MASKl
StA
ILOOP ON CURRENT NUMBER?
JMP FIRST+7
IYES, LOOP
LAC POINT INO, GET ADDRESS TO BE TESTED
SECOND
CMA
DAC. POINT
ISTORE COMPLEMENT
DAC TEMP
lAC. POINT
IGET NUMBER STORED
CMA
SAD POINT lAND CHECK IT
JMP .+3
IALl OK
CMA
IERROR
JMS ERROR
lAS
AND MASK1
StA
ILOOP ON CURRENT NUMBER?
JMP SECOND
IYES, LOOP
lAS
AND MASK2
StA
ILOOP ON CURRENT LOCATION?
JMP FIRST+7
IYES, LOOP
JMS BELL IBELL AFTER N PASSES?
ISr POINT IINCREMENT POINT FOR
LAC POTNT INEXT LOCATION
SAO UPLIM lIS IT THE UPP[R LIMIT?
SKP
IYES, SKIP
JMP FIRST+10
INO, TEST NEXT lOCATION
JMS LOOP3 IREPEAT TEST?
JMD FIRST+6
IYES
.EJECT

PAGE

M.A.T.

07 25 7
071160
07261
07262
07263
07264
Vl7265

07266
Vl7267
0727Vl

07271
07272
07273
07274
07275
07276
07277
07300
07301
07302
07303
07 3 0 4
07305
07306
07307

11077 46
047465
207765
047754
147756
207756
067756
547763
607272
447756
607 2 64
147756
207756
047761
227756
547756
741000
107453
547763
607305
447756
607273
107572
107622
607263

IFORWARD WRITE- READ TEST
I
THIRO
LAC JMPT IINITIAlI~E
ICHANGE
oAr CHANGE
lAC ~i~2
OAC PNTR lAND MESSAGE POINTER
Oi!~ POINT Ii!ERO POINTER
LAC POINT IGET NUMBER TO BE STORED
DAe. POINT
ISTORE IT
IWAS IT THE UPPER lIMIT?
SAO UPLIM1
JMP .+3
IYES
lSi! POINT INa, INCREMENT POINT
JMP THIRD+5
IGG BACK ANO STORE
FOURTH
DiM POINT IClEAR POINT
LAC POINT
DAC TEMP
LAC. POINT
IGET WORD STORED
SAO POINT ICHECK IT
SKP
ICORRECT, SKIP
JMS ERROR IERROR
SAD UPLIMl
IUPPER LIMIT
JMP .+3
IYES
ySl POINT INa, INCREMENT POINT
JMP FOURTH+1
IGO BACK ANO CHECK NEXT LOCATION
JMS BELL1 IRING BELL?
JMS LOOP3
JMP THIRO+4
IYES
.EJECT

PAGE

M. A. T.

IREVERSE - COMPLEMENT WRITE-READ TEST
I
~731(i1

07311

07312
~7313

~7314

07315

207746
047465
207766
047754
207763
047756

~7316

74~0eJ1

~7317

~67756

07320
07321
07322
073 2 3
07324
07325

7400eJ1
741200
607326
750001
347756
607315

07326
07327
07330
eJ7331
07332
07333
07334
07335
07336
07337
07340
07341
07 3 4 2
07343
07344
07345
07346
07347
0735eJ
07351
07352

207763
047756
740001
047761
227756
740001
547756
607340
740001
107453
751201
607344
3 4 7756
607327
107572
107622
607314
750004
'507752
740200
607204

FIFTH

LAC JMPT IINITIALIlE
r)AC CHANGE
ICHANGE
LAC ~t~3
nAC pNTR lAND MESSAGE pOINTER
LAC UPLI Ml
f)AC POINT lAND POINT (TO HIGHEST LOCATION)
ICOMPLEMENT ADDRESS IN POINT
CMA
IANQ STORE IT
DAC. POINT
IRECOMPLEMENT IT
CMA
SNA
lIS IT 01
JMP SIXTH IYES, OONE OEPOSITING
INO, SET AC=-l
CLA!CMA
TAD POINT ISUBTRAC T 1 FROM POINT
IGO RACK TO STORE
JMP FIFTH+5
IRE-INITIALI~E
LAC UPLIM1
DAC POINT IPOINT
CMA
DAC TEMP
IGET CONTENT OF ADDRESS
LAC. POINT
ICOMPLEMENT IT
CMA
SAD POINT ICHECK IT
JMP • +3
IALL OK.
/ERROR
CMA
JMS ERROR
/CHECKED ALL MEMORY LOCATIONS
SNA!CLA!CMA
IYES
JMP .+3
TAO POINT INO, SUBTRACT 1 FROM POINT
JMP SIXTH+1
IGO BACK AND CHECK NEXT
JMS BELL1 IBELL?
JMS LOOP3 IREPEAT TEST?
JMP FrFTH+4
IYES
LAS
AND MASK4
S~A
ISKIP NEXT TEST?
IYES
JMP FIRST+2
.EJECT

PAGE

M. A. T .

07~53

07354
07355
07356
07357
07360
07 3 61
07362
07363
07364
07365
07366
07367
07370
0737 1
07372
07373
07374
07375
07376
07377
07400
07401
07402
07403
07404
07405
07406
-07407
07410
07411
07412
07413
07414
07415
07416
07417
07420
07421
07422
07423
07424
07425
07426
07427
07430

207746
047465
207767
047754
147755
147756
167756
447756
207756
547762
751001
607361
067755
147756
207756
547755
751000
750001
744001
047761
227756
547761
741000
107453
447756
207756
54776 2
741000
607372
107556
750004
507750
741200
607424
207453
547743
607422
167755
607365
147453
607360
207453
547743
741000
007436
147453

IWRITE 1'5 IN A F"IELO OF 0'S
I
SEVENH
LAC JMPT IINITIALltE
ICHANGE
nAC CHANGE
LAC ~~24 lAND MESSAGE
flAC PNTR IPOINTE'R
n~M PNTR1 ItERO ALL ONES POINTER
ntM POINT IlrRO POINT
OtMit POINT
IcLEAR MEMORY
1St POINT
LAC POINT
SAO UPLIM
SKP!CLA!CMA
JMP .-5
OAC. PNTRl
ISTORE 1'5 IN 1 MEMORY LOCATION
OlM POINT IlERO POINT
EIGHTH
LAC POINT IGET POINT
SAD PNTR1 ISAME AS PNTRl
lyES, CLEAR AC AND SKIP
SKP!CLA
INO, SET AC TO -1
CLA!CMA
IC6MPLEMENT AC, IF" POINT : PNTR1
CMA!CLL
DAC TEMP lAC:::. l'S, OTHERW~SE 0
LAC. POINT
IPICK U CONTENTS OF" MEMORy
SAO TEMP IGOOO DATA?
SKP
IYES
JMS ERROR INO
1St POINT IINCREMENT POINT
LAC POINT ITO NEXT LOCATION
SAO UPLIM IUPPER LIMIT?
SKP
IYES
INa, GO BACK TO TEST NEXT LOCATION
JMP EIGHTH+2
JMS BELL IRING BELL?
LAS
AND MASK2
ILOOP ON CURRENT LOCATION?
SNA
JMP .+10 INO
LAC ERROR IYES, GET C(ERROR)
SAO CONST IWAS THERE A l'S IN 0'S ERROR
IyEs
JMP .+3
DiM. PNTRl
INO, tERO ltS LOCATION
IGO BACK TO STORE 1'5
JMP EIGHTH-3
DtM ERROR ItERO ERROR
JMP SEVENH+5
IGO BACK To tERO MEMORY F"IRST
LAC ERROR
SAD CONST IWAS THERE A l'S IN 0'S ERROR?
SKP
IYES, SKIP
JMP .+7
INO
DiM ERROR ItERO ERROR
.EJECT

pAGE

M. A. T.

07431
074 32
07433
07434
07435
07436
07437
07440
07441
07442
07443
~7444

07445
~7446

07447
07450
07451
07452

447755
?~77"5

t;47762
MP444
607360
167755
447755
207755
547762
741000
607365
lli'7622
607357
750004
'507753
7402rrH~

740040
607204

PNTRl IINCREMENT ALL l'S
PNTRl IPOINTER TO NEXT LOCATION
UPLIM IUPPER LIMIT?
.+10 IYES
SEVENH+5
INO
12ERO LOCATION cONTAINING ALL 1'S
D2M~ Pf\J TR l
1St PNTRl IINCREMENT ALL 1'S
LAC PNTRl IPOINTER TO NEXT LoCATION
SAD UPLIM IUPPER LIMIT?
SKP
IYES
JMP EIGHTH-3
INO
JMS LOOP3 IREPEAT TEST?
JMP SEVENH+4
IYES
LAS
AND MASK5
S~A
IHALT?
XX
IYES
JMP FIRST+2
IREPEAT ALL TESTS
.EJECT
IS2

LAC
SAn
JMP
JMP

PAGE

loA. A •

T.
IERROR PRINT ROUTINE
I
~~

0 {7! 0 00

ERROR

07453
(117454
Vl7455
07456
07457
07460
07461
07462
07463
07464

740100
611'7463
76°211'1
107606
741400
607501

07465
07466
07467
07470
07471
07472
07473
07474
07475
07476
07477
07500
07501
07502
07503
07504
07505

607506
207756
107536
760240
107606
207761
107536
760240
107606
207622
107536
107614
750004
741100
740040
207756
627453

CHANGE

07506
07507
07510
07511
07512
07'513
07514
07515

760000
047465
107614
107516
207770
047754
107516
607466

TITLE

OAe ANSWF:R
LAS
RTL
SMA
JMP • +3
LAW 207
JMS TYPE

01 47622

750004
74~010

S~L

/STORE BAD NUMRER
IRING BELL?
INO
IPRINT ERRORS

JMP HALTl INO

HALT1

IYES
JMP TITLE
LAC POINT
JMS PRINT ITYPE OUT ADDRESS
LAW 240
JMS TYPE 11 SPACE
LAC TEMP
JMS PRINT ITYPE OUT CORRECT ANSWER
LAW 240
JMS TYPE 11 SPACE
LAC ANSWER
JMS PRINT ITyPE OUT BAD ANSWER
JMS CRLF"
LAS
SPA
IHALT ON ERROR?
XX
IYES
LAC POINT IRESTORE AC
JMP* ERROR
IEXIT

LAW 0
OAC CHANGE
JMS CRLF
JMS TMESS1
LAC lt~5
OAC PNTR
JMS TMESS1
JMP CHANGE+1
.EJECT

ICHANGE

CHANGE

ITYpE OUT APPROPRIATE MESSAGE
ITYPE OUT REST OF HEADER

PAGE

M. A. T .

/MESSAGE PRINT SIJBROUT I NE
/
~7516

~000~0

07517

?27754
74;:>020
74;:>020
742020
74;:>020
74"'020
1076""6
547757
627516
227754
107606
547757
627516
447754
611'7517

~752Vl
~7521

~7522
~7523

07524
~7525

07526
07527
07530
07531
""7532
07533
07534
07535

TMFSSl

0
LAC~

P~TR

RTP
RTR
RTR
RTP

RAR
JMS TYpE
SAO RUROUT
JMP~ TMESSl
LAC .. PNTR
JMS TYPE
SAO RUB OUT
JMP .. TMESSl
IS2 PNTR
JMP TMESS1+1
/
I

/PRINT CONTENTS OF AC IN OCTAL
/

07536
07537
07540
07541
07542
07543
07544
07545
07546
07547
07550
07551
07552
07553
07554
07555

11'00000
047556
777772
047572
207556
740010
740010
742010
047556
507760
247742
t07606
207556
447572
607544
627536

OAC TEM1
LAW 17772
OAC TALLY
LAC TEM1
RAL
RAL
RTL
DAC TEMl
AND SEVEN
XOR ASK I I
JMS TyPE
LAC TEMl
IS2 TALLY
JMP PRINT+6
JMP .. PRINT
.EJECT

PAGE

M.A.T.
007556

TE M1=.
ISOME USEFUL SUBROUTINES
I

AELL

07 556
07557
Cil7560
07561
07562
rtl7563
07564
07565
rtl7566
07567
0757'11
07571

r.00000
75Cil0rtl4
742010
7411'110
627556
447744
627556
407202
Cil47744
760207
107606
627556

07572
rtl7573
07574
0757'5
07576
07577
0760'11
07601
07602
07603
07604
07605

0'117572
000000
750004
742010
741100
627572
447745
627572
407200
047745
760207
107606
627572

TALLY=.
BELL1

07606
07607
07610
07611
07612
07613

000000
507757
700406
700401
607611
627606

TYPE

07614
07615
rtl7616
07617
0762rtl
07621

000000
760215
107606
760212
107606
627614
007622

CRLF

07622
rtl7623
07624
07625
rtl7626
rtl7627

~0rtl0e10

'1'

LAS
RTL
SPA
JMP" BELL
1St COUNT
JMP.. BELL
XCT FIRST
DAC COUNT
LAW 207
JMS TYPE
JMP" BELL
I

rtl
LAS
RTL
SPA
JMP" BELL1
ISl COUNTl
JMP .. BELLi
XCT FIRST-2
DAC COUNT1
LAW 207
JMS TYPE
JMP" BELLi

0
AND RUBOUT
TLS
TSF
JMP .-1
JMP.. TYPE

75rtl0rtl4
507751
741200
447622
627622

ANSWER=.
LOOP3

rtl
LAW 215
JMS TYPE
LAW 212
JMS TyPE
JMP .. CRLF
Cil
LAS
AND MASK3
SNA
IS2 LOOP3
JMP .. LOOP3
.EJECT

PAGE

M. A. T .
IERROR MESSAGE 1

I
0763'"
07631
07632
07633
07634
07635
07636
07637
07640
07641
07642
07643
07644
0764'5

311316
304311
326311
304325
301314
240314
317303
301324
311317
316240
324305
323324
21'5212
377000

MESS1

~11316

I I, N

30 4 311

10, I

~2t'311

I V, I
IO,U
IA,L
ISP,L

304325
:HH314
240314
317303
301324
311317
316240
324305
323324
21'5212
377000

IO,C
IA,T
II,0
IN,SP
IT,E
IS,T
ICR,LF

IRO

I
I
IERROR MESSAGE 2

I
07646
07647
07650
07651
07652
07653
07654
07655
07656
07657
07660
07661
07662

306317
322327
301322
304240
327322
311324
305255
322305
301304
240324
305323
324215
212377

MESS2

306317
322327
301322
304240
327322
311324
305255
322305
301304
240324
305323
324215
212377
.EJECT

IF,Q
IR,W
IA,R
IO,SP

IW,R
II,T
IE,IR,E

IA,D
ISP,T

IE,S
IT,CR
ILF,RO

PAGE 10

M. A. T .

IERROR MESSAGE 3
I
V1766~

07664
V'l7665
V'l7666
V'l7667
07670
07671
V'l7672
(117673
07674
07675
07676
07677
07700
~7701

07702
07703
07704
07705

3 2 ?3V'l5
""526305
32?323
30'5255

MESS~

3 2 ?3 V1l 5

IRE

~26305

IV E
IR S
IE
Ie 0

~2?323

30'5255

3~3317

~03317

315320
314305
315305
31 6 324
240327
322311
324305
255322
3053'111
304240
324305
323324
215212
377000

31';320
314305
315305
316324
240327
322311
324305
?55322
3053'111
304240
324305
323324
215212
377000

.EJECT

1M P
IL E
1M E

IN T
ISP W
IR I
IT E
1- R
IE A
ID sP
IT E
IS T
leR LF
IRO

PAGE 11

M. A. T.

IERR()R MESSAGE 4
I

MESS4

~27322

~7706

32 7 322

C'J7711J7
C'J7710

~113;:>4

~U 3?4

30S240
317316
3elS323
240311
316240
301240
306311
3"'5314
304240
317306
;:>4"'332
30S322
317323
21S212
377000

305240
317316
30S323
240311
316240
301240
306311
305314
304240
317306
240332
305322
31 7 323
215212
377000

301304
304322
305323
323240
307317
317304
240240
240302
301304
215212
377000

IREST OF HEADER
MESS5
301304
304322
305323
323240
307317
31730 4
240240
240302
301304
215212
377000
.EJECT

~7711

C'J7712
~7713

07714
07715
07716
07717
"'7720
07721
07722
07723
07724
07725
07726

IW,R
II,T
IE,SP
10,N
IE,S
ISP, I
IN,SP
IA,SP

IF, I
IE,L
ID,SP
10,F
ISP,~

IE,R
10,S
ICRLF
IRUBOUT

I
07727
07730
07731
07732
07733
0 77 34
07735
07736
07737
07740
07741

IA,O
10,R

IE,S
IS,SP
IG,O
10,0

ISP,SP
ISp,B

IA,O
ICR*LF

IRO.

PAGE 12

M. A. T.

ICONSTANTS AND VARIARLES
I

077 4 ?

~00260

0774~

0074~3

07744
077 45
07746
07747

~0~000

607506
04(11000

~775(11

V'2~000

~7751

0H'000

. 07752
07753
07754
07755
(117756
07757
07760
07761
07762
07763
07764
07765
07766
07767
07770

~04000

~0~000

~02000

000000
000000
000000
~00377

000007
000000
007167
007166
007630
007646
007663
007706
007727
000000

ASK I I
CaNST
COUNT
COUNT1
JMPT
MASK1
MAsK2
MASK3
MASK4
MASK5
PNTR
PNTR1
POINT
RUBOUT
SEVEN

TEMP
uPLIM
UPLI M1
~~~1

ttt2
~tt3

ttt4
~tt5

26 0

EIGHTH+13
0
~

JMP TITLE
40000
20~00
1~000

4000
2000
0
0
0
377
7
0
FIRST-13
FIRST-14
MESS1
MESS2
MESS3
MESS4
MESS5
.ENo
NO ERROR LINES

PAGE 13
ANSWER
ASK}I

BELL
RELLl
CHANGE

CLOF
CLaN
CLsF
CaNST
COUNT
COUNT1

CRLF
EIGHTH
ERROR
FIFTH
FIRST
FOURTH
HALT1
JMPT
KR8
KSF
Loap3
MASK1
MASK2
MASK3
MASK4
MASK5
MESS1
MESS2
MESS3
--M-ESS4
MESS5
peF

pNTR
PNTR1
POINT
PRINT
PSA
PS8
PSF
--ReF

RR8
RSA
RS8

RSF
RUROUT
SECOND
SEVEN
SEVENH
SIXTH
TALLY
TeF

TEMP
TEM1
THIRD

M. A. T •

007622
07742
07556
07572
07465
700004
700044
700001
07743
07744
07745
07614
07370
07453
07310
07202
07272
075PJ1
07746
700312
700301
07622
07747
07750
07751
01752
07753
07630
07646
07663
07706
07727
700202
07754
07755
07756
07536
700204
700244
700201
700102
700112
700104
700144
700101
077'57
07225
07760
07353
07326
vHlJ7572
700402
07761
007556
07257

PAGE 14

TITLE
TLS
TMESSl
TSF
TYPE
UPLIM
UPLIMl

M. A. T •

07506
700406
07516
700401
07606
07762
07763

t~~l

'117764

1!tt2

07765
07766
07767
0777'11

t~i!3

ttt4
ttt5

PAGE 15
FIRST
SECOND
THIRD
FOURTH
FIFTH
SIXTH
SEVENH
EIGHTH
FRROR
CHANGE
HALT1
TITLE
TMESSl
PRINT
BELL
TEMl
AELLl
TALLY
TYPE
CRLF
ANSWER
LOOP3
MESS1
MESS2
MESS3
MESS4
MESS5
ASKII
CONST
COUNT
COUNT1
JMPT
MASK1
MASK2
MASK3
MASK4
MASK5
PNTR
PNTR1
POINT
RUBOUT
SEVEN
TEMP
UPLIM
UPLIMl

2tt1
r.t~2

lltr3

rrt4

22ZZ5
CLSF
CLOF
CLON
RSF
RCF

M. A. T .
07202
07225
"'7257
07272
07310
07326
07353
07370
07453
07465
07501
07506
07516
07536
07556
f7107556
07572
007572
07606
07614
007622
07622
07630
07646
07663
07706
07727
07742
07743
07744
07745
07746
07747
07750
07751
07752
07753
07754
077':)5
07756
07757
07760
07761
07762
07763
07764
07765
07766
07767
07770
700001
700004
700044
700101
700102

PAGE 1n
RSA
RRB
RSR
PSF
PCF
pSA
PSA
KSF

KRB
rSF
rCF
TLS

M. A. T .
7V'1V'11~4

700112
700144
700201
700202
700204
700244
700301
700312
700401
700402
700406