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MAINDEC-12-D0GA-A

April 1970

18 pages

Original

0.5MB

Document:	PDP-12 Tape Quickie
Order Number:	MAINDEC-12-D0GA-A
Revision:	0
Pages:	18
Original Filename:	http://bitsavers.org/pdf/dec/pdp12/diagnostics/02_01_MAINDEC-12-D0GA-A_Apr70.pdf

OCR Text

IDENTIFICATION
1: RODUC'l'

CODE :

Ml\IHDEC-12-D)JGA-A

PRODUCT NAME:

PDP-12 TAPE QUICKIE

DATE CREATED:

APRIL 21,

MAINTAINER:

DIAGUOSTIC GROUP

AUTHOR:

WAL'rER MANTER

197~

ABSTRACT

The Tape Quickie Diagnostic is designed to provide a. test of
major register information flow through use of the tape
maintenance instructions. Also included is an addi.td.on test
(Tape Buffer Added to Tape Accumulator) and a test of the
shifting of the tape Read-Write Buffer. The Le:f:t and Right Switches
are used to Test Data.
REQUIREMENTS

2.1

EQUIPMENT

2.2

A standard basic PDP-12

A ·TC-12, PDP-12 line-tape controller.

A.ASR-33 Teletype or equivalent.

PRELIMINARY PROGRAMS
All PDP-:-8 and 12 mode basic instruction diagnostics. and
exercisers must have been successfully run prior to; running
the program.
(The processor should be solid)

LOAD ING PRO CED URE

3.1

METHOD
This program must be loaded with the rim loader.
A)

With the RIM loader program in memory, place the. perforated
tape which must be in RIM format in the perforated-tape
.reader.

i'lctke sure that the

Place the starting address 7756 in the le·ft sw.itch register.

Set the right switches to

Set the mode switch to 8 mode.

Depress I/O Reset.

Press the Start Left Switches.

Hove the treader control switch to START.

S't:op'.the Reader at the end of the Tape.

ARS-33 is on line.

SSSSa·

STARTING PROCEDURE
The setting of the left, right and sense switches is not
critical to the starting procedure.
A)

Set the mode switch to Linc

Depress I/O preset.

Depress START

Mode

The program is running; consult the listing for
5.

tes~

descriptions

CONTROL SWITCH SETTINGS
There are 4 optional modes of operation which are determined by
the sense switches ~-2.
They are:
SNS~-2

loop through program

SNS~

loop major register tests

SNS!

loop addi tic!'. (TB TO TAC) test

SNS2

loop shift read-write buffer test

Right switches = Data all tests.
Left switches = Data for TB TAC Test
If more than one sense switch is depressed at any time, the program
will loop in the portion of the program affected by the first sense
switch depressed until such time it is reset. The operator· can
change the setting of the left and right switches from ls to ~s
and back while the program is running.

i:-IAINTENANCE INSTRUCTION SET USED
CODE

MODE

OPERATION

6151

PDP-8

Load maintenance register

The contents of the processor ACCUMULATOR bits ~, 1, 2, 3, are
loaded as a command into the maintenace instruction register.
The command will be executed if and only if the transfer IOT
6154 is generated.

6152

PDP-8

Tape register clock

6154

PDP-8

Transfer

If you are not familiar with the maintenance instruction IOT's, the
above list of them and the various functions are included in
Appendix A.

ERROR ~S

Irr the event. an eror occurs, the program will halt wi.th the
information received from the tape controller in the
accumulator. This should be compared with the index
register/registers containing a copy of the bit pattern
tr:ansferred to the tape controller and associated, with the
particular test to dete,rmine what bit/bi ts were dropped or
. picked up.
8.

ADDITIONAL INFORMATION

A copy of the RIM loader pr.ogram is included in Appendix B

for those not familiar with it.

APPENDIX A
TAPE IOT INSTRUCTIONS

MSC 3 TAC TO AC
MSC I 3 AC TO TMA SETUP
IOT 6151
AC BIT
~

1
2
3
4
5

6
7
8

9
l~

FUNCTION
To Maint Inst Reg
To Maint Inst Reg
To Maint Inst.~Reg
To Maint Inst Reg
Clear Tape Done
Skip on Tape Done
Generate TT~
Generate TT3
Simulate Mark Input
Simulate Data 1 Input
Simulate Data 2 Input
Simulate Data 3 Input

IOT 6152
AC BIT

FUNCTION

Tape Preset
Shift RWB
TB to RWB
TB + TAC to TAC
~ to Tape Word FF
Set 8 Tape
Set Unit 1
Set BKWRD
Set Write SYNC
Set 8 Tape MOTN
Set 8 Write

1
2
3
4
5
6

7
8
9
l~

•

APPENDIX A cont

IOT 6154
CON'I!ENTS MAIT
INST REG
1--

ACTION

···--···--·-··--·

Y1 fJ Y1

P-$1

JJn

frfJl
fJlfJ

~1¢

{&11
,011
1,0{&
l{&{&

1.01

:1'¢

1
Y1
.1

l{Jl

llfJ

11¢
111
...____. 111

Ae; TO TB
AC TO TBN
AC 'l'O 'fAC
AC TO TMA
TMA SET.UP TO AC
TBN TO AC
TB TO AC
RWB TO AC
MARK WINDOW TO AC
STATES ·TO AC
,UNITS + MIN TO AC
TINST TO AC
MISC STATUS 1 TO AC
MICS STATUS 2 TO AC
TMA TO AC
NOT USED

APPENDIX B

0000
0001
0002
00\03
00~4

00~5

0006
0Vj07
0010
0011

0012
0013

0014
0015
0016
0017
0020·
12112121
0022
0023
121024

0025
f2l026

a-2121

/TPTS - TAPE QUICKIE MAINOEC 12•00GA-A
/AUTHOR - WALTER MANTER
/MAlNTAlNlR - DIAGNOSTIC GROOP
/COPYRIGHT 1970, DIGITAL EQUIPMENT CORP,, MAYNARD, MASS,
/TESTS MAJOR REGISTER INFORMATION FLOW
/THROUGH USE OF THE MAINIENANCE INST
/REGISTERS TESTED IN ORDER ARE:
/TAC
/TB
/RWB

/TBN
/TMA
/TMA SETUP
/ALSO ADDITION TB+TAC TO TAC
/ALSO SHIFT or RWB
/SENSE SWilCHES 0-2 CONTROL THE MODE O~ OPERATION DESIRED
/SNS f2l-2 = 0 LOOP ENTIRE PROGRAM
/SNS 0
= 1 LOOP REGISTER TRANSFE~ TESTS
/SNS 1
= 1 LOOP ADDITION TEST <TBTAC)
/SNS 2
= 1 LOOP SHIFT RWB TEST <SHRWB)
EJECT

0027

00 30
00..310032
0033

/TTAC

- TRANS~ER CONTENTS OF THE
AC TO THE TAPE ACCUMULATOR
/READ IT aACK ANO TEST FOR DISCREPANCY
/TH( BIT PATTER~ IS DETERMINED BY THE
/LEFT SWITCr-IES
/PROCEED TO ~EXT TEST IF NO ERROR
~EST
/PROCESSC~

0~-54

0C35
0'136

0037

;:rn·rn
0041
0042
0043
0044
0045
0046
0047

02150
0051
0052
0053

0054
0055
0056
0057
0060

0061
0062
0063

TTAC

CLR
LOA

0020

0J11

0021
0022
e.023
0024
0025

1020
1Mrn
0500
6151

0:;17

0026

rn40

STA

0027

~010

0030
00.31

0:>00

!OB

6154

61'.'>4

0011
02103

CLR

1440
0010

SAE

0032
0033
0034
00J5

0036
00J7

0000
0016

10~0

IOB
6151

LSW

TAC

10
HLT

NOP

EJECT

/CLEAR THE AC
/LOAD THE AC
/BIT 2 SET
/EXECUTE IN 8 MOOE
/TRANSFER OF AC TO TAPE MAINTENANCE REGISTER
/SELECT BIT PATTERN DESIRED WITH LErT SWifCHES
/STORE A COPY OF THE BIT PATTERN
/IN INDEX REG 10
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAC
/CLEAR THE AC
/TRANSFER THE TAC TO THE AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH THE COPY IN IR 10
/ERROR • THE CONTENTS O~ THE AC NOT EQUAL TO IR 10
/CAN INSERT JMP COMMAND TO LOOP TEST

0064
0065

/TB - TRANSFER THE CONTENTS OF THE
/PRO~ESSOH AC TO ~HE TAPE BUFFER
/READ Il SACK ANO TEST FOR DISCREPANCY
/THE BIT PATTERN IS DETERMINED EY THE
/LEFT SWITCrlES
/PROCEED TO ~EXT TEST IF NO ERRORS

2'066
~067

0070
3071
0072
0073
0074

0040

(c1;u1

0~75

~vJ 41

~~~00

0076
0077

0042

b 1:>1

k'.1043

J:>17
1040

rs,

CLR
IJB
01:,1
L!:i w

~100

~044

0101
0102

0045

v.rnrn

STA
10

'5~46

~.500

IO~

010~

0104
0105
0106
0107
0110
0111
0112
0113
0114
0115
0116
0117
0120

~i~R~~ 10

0017 9+51

~DA I

0051
0052

Sill 00

~05~

~i53
00~4

0055

1J20
..S000
0500
6151
0~11
~?00

0154
0057'- 1440
0060
00Hl
0061 0000
2'01q
0062
00~6

/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSFER OF CLEARED AC TO MAINTENANCE REGISTER
/SELECT BIT PATTERN DESIRED WITH I. EF' T SWITCH~S
A COPY OF' BIT PATTERN

"124
.t

IOB
6151

CLR
IOB
61!;;4

SAE
10

HLT
NOP

EJECT

(EXEpUTE IN 8 MODE
tTa~~~FtR ~F A~- TP TB
lLdAb.~HE AC
.
/BITS 1 AND 2 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO MAINTENANCE REGISTER
/CLEA~ THE AC
/EXECUTE IN 8 MODE
/TRANSFER OF' TB TO AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH THE DRIGIONAL BIT PATTERN IN IR 10
/ERROR ... CONTENTS OF' AC NOT .EQUAL TO IR 10
/.CAN INSERT JMP COMMAND TO LOOP TEST

fi:H21

/RWB -

0122

T~A~SFER

CONTENTS OF PROCESSOR

/AC TO TAPE BUFFER
/TRANSFER TAPE BUFFER TO
/TAPE ~EAD WRITE BUFFER
/TRANSFER TAPE READ WRITE SUFFER TO

ca1·23
0124
~125

0126

/PROSCESSOR AC

~127

/TEST BIT PATTERN RECIEVED FOR DISCREPANCY

0130
~131

/THE BIT PATTERN rs DETERMINED BY THE

0132
01J3

/IF NO ERRORS CONTINUE TO NEXT TEST

0134
013i
0136

/LEFT

~263
~Z64

01J 7

Jl65

0140

;:t;66

0011
0500
0151
0517

01 ,, :
;Jl42

0067
0270

H'l40

0143
0144
0145
0146
0147
0150
0151
0152
0153
0154
0155
0156
0157
0160
0161
0162
0163
0164
0165

~~71

0500

C372

6154
rn20
HrneJ
0500
6152

{ [' 7 3
J074
~05

0076

0~10

0077
0100
0101
0102

1020

~H'l3

RWB,

S~ITCHES

CLR
I ClB
61~1

LS W

STA
1 r3
I OB

6154

LOA I
Hl00

IOB
6152
LO.A I

3400
0500

3400

6151

fc1011

CLR

0104 0500
3105 ~ 6154
iH06 • 1440

6154

~107

l-110

r3111

0 0 HJ
0000
0016

108

IDB

SAE
10
HL T

NOP

EJECT

/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSFER OF CLEARED AC TO MAINTENANCE REGISTER
/SELECT BIT PATTERN DESIRED WITH LErT SWITCHES
/STORE A COPY OF BIT PATTERN
!IN IR 10

/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE surrER
/LOAD THE AC
/BIT 2 SET
/EXECUTE IN B MODE
/TRANSFER OF TB ro RWB
/LOAD THE AC
/BITS 1r 2 AND 3 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE MAINTENCE REGISTER
/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSrER OF RWB TO AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH THE ORIGIONAL BIT PATTERN IN IR 10
/ERROR - CONTENTS Or AC NOT EQUAL TO IR 10
/CAN INSERT JM? COMMAND TO LOOP TEST

121166
0167
0170
0171
0172
0173
0174
0175
0176
0177
0200

0201
0202

0203
0204
020'
0W6
0207
02H'l

0211
121212

0213
0214
0215
0216

121217
0220

0221
0222
0223
0224

/TBN - TRANSFER CONTENTS OF PROCESSOR
/AC TO TAPE BLOCK NUMBER REGISTER <TBN>
/READ IT BACK AND TEST FOR DISCREPANCY
/THE B!T- PATTERN IS DETERMINED BY THE
/LEFT SWITCHES

/PROCEED TO NEXT TEST IF NO ERROR
0112
0113

0114
0115
0116
0117
0120

JIJ11
1220
0400
05ij0

6151
3?17
1 i.:14i!l

0121

'1010

0122
0123
0124
0125
0126
0127
01-50
0131
1'?1.52
0133
0134
0135
0136

~?00

TBN,

CLR
LOA
400
IOB
6151

LS W
SlA

6154

IDB
6154

1020

LOA I

2400
0500
6151
0011
0500
6154
1440

2400
108

6151

CLR
I OB
6154

SAE

0010
:iJ000

~016

NOP

HLT
EJECT

/CLEAR THE AC
/LOAD THE AC

/BIT 3 SET
/EXECUTE TAPE MAINTENANCE INSTRUCTION IN 8 MODE
/T~ANSrER OF AC TO TAPE MAINTENANCE REGISTER
/SELECT BIT PATTERN DESIRED WITH LEFT SWITCHES
/STORE A COPY or BtT PATT~RN
/SEL~Cl£D IN IR 10
/EXECUTE TAPE MAINTENANCE INSTRUCTION IN 8 ~ODE
/TRANSFER OF AC TO TBN
/LOAD THE AC
/BITS 1 AND 3 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE MAINTENANCE REGISTER
/CLEAR THE AC
/EXECUTE IN 8 MOINTENANCE INSTRUCTION lN 8 MOOE
/TRANSFER O~ TBN TO AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH THE ORIGlONAL BIT PATTERN IN IR 10
/ERROR • AC NOT EQUAL TO IR 10
/CAN INSERT JMP COMMAND TO LOOP TEST

0225
0226

/TTMA - TRANSFER CONTENTS OF PROCESSOR
TO TAPE MEMORY ADDRESS REGISTER CTMA)
/READ IT 34CK AND TEST FOR DISCREPANCY
/T~E SIT PATTERN rs DETERMINED BY THE
/LEFT swr TC HES
/PROCEED TO NEXT TEST IF NO ERRORS

-~AC

0227
02.3~

02-31
02.52
~2..S3

0234
0235

Jl37

0236
02.57
0240
i!1241
0242

C140

0243
0244

0245
0246

0141
0142
0143
J144
0145
0146
0147

0011
1ni

TTMA I

CLR

LOA I

1400
0:>1?Jl?J
6151

1400

~j517

LS W
STA
Hl
108

1040
0010

k150e

108
61~1

n50

6154

0151

1020

LOA I

0250

0152
0153
..H54
0155
0156

7000
0500

7000

0251

0247

0252
0253

0254
0255
0256
0257
0260
0261

0262
0263

0157
0160

6151
0011
0500
6154
1440

JOB
6151

CLR
I OB
6154

SAE

~161
~H62

0~10

i3000

HLT

2163

0016

~OP

EJECT

/CLEAR THE AC
iLOAD THE AC
/BITS 1 AND 3 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE MAINTENANCE REGISTER
/SELECT BIT PATTERN DESIRED WITH LEFT SWITCHES
/STORE A COPY OF THE BIT PATTERN
/SELECTED IN IR 10
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TMA
/LOAD THE AC
/BITS 0, 1 AND 2 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE MAINTENANCE REGISTER
/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSFER OF TMA TO AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH THE ORIGIONAL BIT PATTERN IN IR 10
/ERROR - AC NOT EQUAL TO IR 10
/CAN INSERT JMP COMMAND TO LOOP TEST

n64

/TMAS - TRANSFER CONTENTS OF PROCESSOR
/AC TO T~A SETUP REGISTER CTMAS)
/READ IT aACK AND TEST FOR DISCREPANCY
/THE BIT PATTERN IS DETERMINED BY THE
/LEFT SWITCHES
/PROCEED TO NEXT TEST IF NO ERRORS

e265
~2 66

7 2 67
22 7~

l-271
Z272
0273
0274
ZV5
Z276
Z277
0300

032i1
0332
0303
0304
03C5
0306
0307

C164
J165

;)517

~166

1040

D167
/1/0
0171
;:)172
J173

00H'l

~·174

r:'.175
'~ 17 6
:Jl 77

0310

~2~0

0311
0312
0313
0314
0315
0316

J201
0202
f1203
0204

0011

~J23

rn20
2000
~1?00

6151
kHH 1
!.-1?00

TMAS,

CLR
LSW
STA
10
TMA
LOA;; I
2000
I 08

6151

CLR
!OB

6154
1440

6154

00Hl
0000

0460
6020

SAE
HLT

SNS I 0
JMP TUC
EJECT

/CLEAR THE AC
/SELECT BIT PATTERN DESIRED WITH LEFT SWITCHES
1srnRE A COPY OF THE BIT PATTERN
/SELECTED IN INDEX REGISTER 10
/TRANSFTR AC TO TMA SETUP REGISTER
/lOAD THE· AC
/Bi tr• 1 5 El<;
/EXECUTE IN 8 MODE
/TRANSFER OF' AC TO TAPE MA.I NTENANCE REGISTER
/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSf"ER OF TMA SETUP REGISTER TO AC
IC OMPA RE THE BIT PATTERN lN. THE AC
/WITH THE COPY IN INDEX REGISTER 10
/ERROR
THE CONTENTS OF THE AC NOT EQUAL TO IR 10
/IS SENSE SWITCH 0 SET
/NO LOOP THROUGH AL.L PREVIOUS TESTS AGAIN

0317

/TBTAC - ENTER TEST Ir SENSE SWITCH
10 IS NOT DEPRESSED
/TRA~SFE~ CONTENTS OF PROCESSOR AC
/AS DETERMINED BY THE LEFT SWITCHES
/TO THE TAPE BUFFER CTB)
/THEN TRA~SFER CONTENTS OF PROCESSOR AC
/AS DETERMINED av THE RIGHT SWITCHES
/TO THE TAPE ACCUMULATOR CTAC)
/NOW ADDITION OF TS TO iAC IS DONE
/THE SUM IS READ RACK AND TESTED FOR
/DISCREPA~CY AGAINST A COMPUTED SUM
/STORED IN INDEX REGISTER 12
/IF THERE ARE ANY ERRORS THE PROGRAM
/I-JILL HALT
/IF SENSE SWITCH 1 IS DEPRESSED
/THE PROGRAM WILL LOOP ON THIS TEST
/OTHERWISE IT WILL CONTINUE WITH THE
/NEXT TEST

0J2~-'
03~1

0322
~~3 23

0324
k1325
i326
0327
2330

03,H

0332
0333
0334
0335
0336
0337

l'l340
~;341

16342
0343
0344
0345
0346
0347
0350
e!351
0352
0353
0354

0355
0356
0357
0360
0361
0362
0363
0364
~365

0366
0367
0370
0.571
0372
0373
0374

0205
0206
0207
k'.l2U

0211
0212
0213
0214
0215
0216
0217
0220
1.1221
0222
0U3
0224

0225
0226
0227
0230
0231
0232
02J3

0~11
~500

6151
0517
1040
0010

TBTAC,

CLR
!OB
6151

LSW
STA
10

~500

IDB

6154

0154

1020

LOA I

1000
0500
6151
0516

1000

H'l40
11011

STA
11

0500
6154
1200

61~4

LAM

0~Hl

12140

STA

!OB
6151

RSW
!OB

0~12

1020

LOA

k14 i(rn

4 0, ~

IOB

~12 36

v.,500
bl52
21011

~375

~j267

;J:.103

Ci..R
TAC

ei376
0377

~·240

144e

SAE

0241

dJ12

2i;242
11243
~) 24 4

<.P00
;_14 61

HLT
S;,;S I 1

b ~ ~~:;

. J·~·~ P

(4~0

~401
~4J2

Z.234
0.205

61:;2

T 8 TAC

~ 4 ~13
~~ 4 (.14

EJECT

/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO THE TAPE MAINTENANCE REGISTER
/SELECT TB BIT PATTERN DESIRED WITH THE LEFT SWITCHES
/STORE A COPY OF TB BIT PATTERN SELECTED
/IN INDEX REGISTER 10
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TB
/LOAD THE AC
/BIT 2 SET
/EXECUTE IN 8 MODE
/TRANSFER OF AC TO TAPE MAINTENANCE REGISTER
/SELECT TAC BIT PATTERN DESIRED WITH THE RIGHT SWITCHES
/STORE A COPY OF TAC BIT PATTERN SELECTED
/IN INDEX REGISTER 11
/EXECUTE IN 8 MODE
/TRANSrER Or AC TO TAC
/ADD THE CONTENTS or INDEX REGISTER 10
/TO THE AC <2S COMPLEMENT ADDITION)
/STORE THE COMPUTED SUM OF TB ADDED TO TAC
/IN INDEX REGISTER 12
/LOAD THE AC
/BIT 3 SET
/EXECUTE IN 8 MODE
/THE TB IS ADDED TO THE TAC AND THE SUM IS IN THE TAC
/CLEAR THE AC
/TRANSFER THE TAC TO THE AC
/COMPARE THE BIT PATTERN IN THE AC
/WITH TME COMPUTED SUM IN INDEX REGISTER 12
/ERROR - THE CONTENTS OF THE AC NOT EQUAL TO IR 12
/IS SENSE SWITCM 1 DEPRESSED
/YES LOOP TBTAC TEST AGAIN

0405
0406
e407

/SHRWB • E~TER TEST IF SENSE SWITCH
/1 IS NOT DEPRESSED
/TRANSFER CONTENTS OF PROCESSOR
/AC TO TAPE BUFFER (TB)
/THEN TAPE BUFFER IS TRANSFERRED TO READ WRITE BUFFER CRWB>
/THE REAJ WRITE BUFFER IS NOW SHIFTED
/ONE BIT POSITION AND ITS CONTENTS READ
/BACK TO THE AC AND COMPARED WITH A.
/SIMULATED SHIFT IN THE PROCESSOR
/IF AN ERROR OCCURS THE PROGRAM WILL HALT
/THE THREE BITS SHIFTED OUT FROM UNDER
/THE READ WRITE HEAD ARE MASKED OUT AS
/THEY COULD BE EITHER SET OR RESET
/IF SENS SWITCH 2 IS DEPRESSED YOU WILL
/LOOP THIS TEST ofHERWISE YOU WILL GO
/BACK TO THE BEGINNING OF THE PROGRAM
/AN~ START THROUGH AGAlN

0410

0411
0412
0413

0414
0415
0416
0417
042~

0421
0422
0423
0424
0425
0426
0427
0430
0431
0432
0433
0434
0435
0436
0437
0440
0441

0442
0443
0444
0445
0446
0447
045~

0451
0452

el453

SHRWB,

CLR

0245
2246
·0247

~011

0500
6151

IDB
6151

0250

0517

0251

~?00

LSW
IOB

0252
0253

6154

0261

ROL I 1
BCL I

0254
02?5

1:>60

!0421

0421

0256

1040

STA

0010

:Z257
e260
0261
0262
0263
0264
0265
k::266

0267
0270

1020

LOA I

1000

0500

I08
6152

6152
1020
2000
0500
6152

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2421

0421

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SHRWB

/CLEAR THE AC
/EXECUTE IN 8 MOOE
/AC-MAIN REG
/SELECT BIT PATTERN DESIRED FROM THE RIGHT SWITCHES
/EXECUTE IN 8 MOOE
/TRANSFER OF AC TO TB
/ROTATE RIGHT ONE PLACE MSB LOST
/CLEAR OUT BITS THAT WILL BE SHIFTED IN FROM TAPE READ HEAD
/BITS 3, 7 AND 11
/STORE A COPY OF THE BIT PATTERN
/IN INDEX REGISTER 10
/LOAD THE AC
/BIT 2 SET
/EXECUTE IN 8 MODE
/TRANSFER OF' TB TO RWB
/LOAD THE AC
/BIT 1 SET
/EXECUTE IN 8 MODE
/SHIFT RWB
/LOAD THE AC
/B fTS 1, 2 ANO 3 SET
/EXECUTE IN 8 MODE
/TRANSFER AC TO TAPE MAINTENANCE REGISTER
/CLEAR THE AC
/EXECUTE IN 8 MODE
/TRANSF'ER OF RWB TO AC
/CLEAR OUT BITS THAT WERE UNDER THE READ WRITE HEAD
/BITS 3, 7 AND 11
/COMPARE THE BIT PATTERN IN THE AC
I WI Tl-I THE ORIGIONAL BIT PATTERN STORED IN INDEX REG 10
/ERROR
CONTENTS OF" AC NOT EQUAL TO INDEX REGISTER 10
II S SENSE SWITCH. 2 DEPRESSED
/YES LOOP THIS TEST

/NO LOOP BACK TO BEGINNING OF PROGRAM AGAIN

RhB

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40 40

TB
TBN

4112

TB TAC
TMAS

4164

TTAC

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