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EK-DS780-TD-001

February 1979

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Document:	VAX 11/780 Diagnostic System Technical Description
Order Number:	EK-DS780-TD
Revision:	001
Pages:	244
Original Filename:

OCR Text

RWEC

T PR

RS.

C A

by de L TLSP TSI
g

i ARG

EK-DS780-TD-001

VAX-11/780 Diagnostic System
Technical Description

digital equipment corporation - maynard, massachusetts

First Edition, February 1979

The material in this manual is for informational
purposes and is subject to change without notice.
Digital Equipment Corporation assumes no responsibility for any errors which may appear in
this manual.

Printed in U.S.A.

The following are trademarks of Digital Equipment Corporation,
Maynard, Massachusetts:
DIGITAL

DECsystem-10

MASSBUS

DEC

DECSYSTEM-20

OMNIBUS

PDP

DIBOL

0S/8

DECUS

EDUSYSTEM

RSTS

UNIBUS

VAX

RSX

VMS

IAS

8/84-15

CONTENTS

Page

CPU

w N

Diagnostic

Program

Exerciser

Package

RH784

(MBA)

Diagnostic

Program

DW78@

(UBA)

Diagnostic

Program

DIAGNOSTIC

PROGRAMS

SYMBOLS

Abbreviations

CONSOLE COMMAND DESCRIPTIONS
Boot Command
(B)
Clear Command (CL)
Continue Command (C)
Deposit Command (D)
Enable DX1l: Command
Examine Command
(E)
Command (H)
Command (HE)

Halt
Help

b WNNHBERKRE

Command

AND

Examples

TERMS

Notation

Module

Services

Executor

DESCRIPTION

CONSOLE PROGRAM OVERVIEW
Command Getter
Parser and Parser Tables

COMMAND

CONTROL

PROGRAM AND

CONSOLE

Additional

(S )

Modification

Console Control Functions
Default Settings
Status Displays
Command Linking and Repeating
Real-Time Delays

Command

L]
e
o
e
o
[]
O~JO
Ui WN -

Display and

Control

wWN

Clock

Control

Element

TM W N =

Program

Memory

B W
-

e
o
e

PROGRAMS

OPERATOR/VAX-11/783 COMMUNICATION
Console Terminal Modes
Console Panel Equivalent Functions

Division

Supervisor

Cluster

PERIPHERAL

Hardcore

o
&
s

o
o

NN N

Cluster

Diagnostic

PROGRAM

Adapter and
Microtest Division
MICRODIAGNOSTIC

ENVIRONMENTS

DIAGNOSTICS

Console

WWWWWwNhDpdDNDND
-

OVERVIEW
=

SYSTEM

SYSTEM EXECUTION

DIAGNOSTIC

MICRODIAGNOSTIC

WWWWWWwWwWwwWw
NN

o
s
o
*
e
*
@
*
[I

)
[
[]
.
L]

INTRODUCTION

CONSOLE

CHAPTER
DN NN DNDODNNDDDNDDNDND

MANUAL SCOPE
DIAGNOSTIC SYSTEM CAPABILITIES

o
o
8
e
o

&
e

8
8

o
o
&

e b et b

e
6

o b

e b
o
ot

OWWOWWOWWOWWOWWOWOWOWYWWOWOWONdNNNINIaoa
ks W
=

CHAPTER

(Cont)

Unjam Command (U)
Wait Command (WA)
Indirect (@) Command
WCS

Command

WN
>
JOY WU
WN
>

@
¢

¢
o

CHARACTERS

Qualifiers for RADIX
Defaults for RADIX
Local Radix Override

COMMAND QUALIFIERS AND DEFAULTS
Address Type Qualifiers
Address Type Defaults
Data Length Qualifiers
Data Length Defaults

o
o

(W)

PERFORMED WITH THE

Default
OO

(N)
(T)

Command
Command

VAX-11/788 CPU RUNNING
COMMENTS WITHIN COMMANDS
CONTROL CHARACTERS AND SPECIAL

(S)

Command

COMMANDS

N NN
NN
N
i
=
i
NN
VO WOWO DO
®

S Ve

BWNHFRQWOWOIJOANTBPWNDHFHS

o
o

e e Sy S

o
o
s
o

o S e

SIS N

Next
Test

RSN

o
o
o
e
e
o
o
o
o

Start

HH\O\O&OG)CI)\]\I\I\]\I\]\I\J\I\I\]\]\I\]O\U’I

N =

2 11.1

2.12
2.13

2.14
2.15

2.15.1
2.15.2

Facility

Address

Specifying Default Address in a Command
Last Address Notation
Preceding Address Notation
Use of Last Data as an Address Argument
NEXT Qualifier
COMMAND REPEAT FACILITY
Repeating

Commands

LINK

FACILITY

COMMAND

X
e o

o
*

o
s

o
o
o
o
o
e

(I)

(SH)

Show Command

¢«

NM[\)NNN[\)MNNNNN NN NN NN

Command

Initialize

LINK Command (LI)
Load Command (LO)
Perform Command (P)
Quad Clear Command (Q)
Reboot Command
(REB)
Repeat Command (R)
Set Command (SE)

HWWWWwwwwwwwww
wwww

NN NN
NN DNDN

o
Q
1Y

CONTENTS

Link Facility
Link Facility
CONSOLE

MODE

Operation
Usage

CHANGE

VMS COMMUNICATION WITH CONSOLE FLOPPY DISK

Floppy Function Protocol
MISCELLANEOUS CONSOLE COMMUNICATIONS
COMMUNICATION REGISTER FORMATS AND SELECT CODES
FLOPPY STATUS BYTE DEFINITION
REMOTE

CONSOLE

Enable

Talk

ACCESS

Mode

Enable/Disable

COMMAND

Command

Echo

Command

SET

CONTENTS

(Cont)

Page

Enable

Local

Control

Enable/Disable
Enable/Disable
CONSOLE

ERROR

Syntactic

Copy

Command

Carrier Error Command
Local Floppy Command

MESSAGES

Error

Command Generated Error Messages
Microroutine Error Messages

Script

Operator

o
o

AND

DESCRIPTION
Module

Services

Command

Terms

Command
Command

Description Segments
Abbreviations

Command

Overview

Load

CONTROL

Symbols

COMMANDS

Command

Start

Command

Restart

Command

Control

Characters

Continue

Command

Summary

Abort

Special

Characters

Command

Submit

Command
CONTROL

Set

and

Command

EXECUTION

Control

COMMANDS

Flag

Command

Clear Control Flag Command
Set Control Flag Default Command

Show
Set

Control
Event

Clear

Show

Flags

Event

Flags

Command

Flags

2-34
2-35

CONTROL

System Error Handling
SUPERVISOR COMMAND DESCRIPTIONS
and

2-33
2-33

2-36

Module

Terminal

2-33

2-35

Messages

OVERVIEW

MODULE

Processor

Messages

FUNCTIONAL MODULE DESCRIPTION
Memory Management and Adapter Services

Run

WO OO~

Error

Image Loader Module
Test Sequence Control

w N

s
o
o

w N

*«
o
o
o

= w N
W

STRUCTURE

FUNCTIONAL

SEQUENCE

SUPERVISOR

PGI

NS
WN e

o
e
8
0
8
0
s
8
0
&
&
8
e
&
e
0
8
0
8
O

SUPERVISOR

CLI

o
o

o
¢

o
o

o uULTLNnULTLTUTUIEUOTLED
B BB BRWWwwWwNDNDD NN

e
o

b
o

o
®

o
o
¢
.
.

WWWWwWwWwuwWwwWwwwwWwwwWwwwuwWwwwwwuwww
ww ww

aonooanoo

DIAGNOSTIC

2-32
2-32
2-33

Messages

CPU Fault Generated
RX@41 Error Messages
Miscellaneous Error

2-32

Command

wWwww
w
! WWWwWwWwuwWwuwWuwWwuwWwwwwwwww
b
=
=
|
i
UL
L
NE
S V|VOWOWOOOIIANANNONA
DD DL DWW WWWWH

Enable/Disable

3-12
3-13

3-13
3-13
3-13

CONTENTS

(Cont)

Default

PROGRAM

BASIC

PROGRAM

BASIC

TEST

[]

DESCRIPTION

Test

Structure

Instruction
DESCRIPTION

AN
B WN

Loop

Description

Structure

MONITOR

Flag

Report

Error

Flag

Command
Abort Flag

w N -

MICRODIAGNOSTIC

Messages

System

Error

Messages

PROGRAM
VW N

Error

Monitor

LISTING

Monitor

AND

Listing

Hardcore

Message

LISTING/ERROR

Error

DESCRIPTIONS

Description

Description
Execution

Format

CORRELATION
Situation

and Single Step Setup
Scope Loop Setup
Single Bus Steps Setup

MACRODIAGNOSTIC
DEFINITION

Messages
MESSAGE

Loop

Microtest
Microtest

OVERVIEW

Error
ERROR

MESSAGE

Message

Hardcore

MESSAGES

Listing

Microdiagnostic
Error

ERROR

Descriptions

Listing

Microtest

(NER)

(BELL)

(CONT)
(ERABT)

Syntax

Chain

(LOOP)

Flag

Continue
Error

CONTROLS

Examples

Error

Bell

STRATEGY

Monitor Control
HD/HI Flags

B W N

OVERVIEW

EXECUTION

TEST

Microtest

3-14

3-14
3-15

MICRODIAGNOSTIC

3-14

Command

DESCRIPTION

3-14

Command

MICRODIAGNOSTIC

Pseudo
MICROTEST

[]
o
*

[

Command

Command
Command

Hardcore

3-14

3-13

Command

Breakpoint
Breakpoints

Examine
Deposit

3-13

o
¢

Set

COMMANDS

Command

MICRODIAGNOSTIC

N
N
N
SOt N
ST T SO
.

T
N oN
o
e
A ¢
o

S e
@

Breakpoint

HARDCORE

N
G
Y NG O SO . N NG N N

WCOWOWOWWOWOVOVWWWOINIJAOTAHAOANAAANAAAUI
UL BB WA

e I
¢
.

Set

Show

CHAPTER
WHN
=

UTILITY

Base

Clear

CHAPTER

AND

Set

NN NN

DEBUG
NOY
O
WN =

Wwwwwwww

Page

PROGRAM

DESCRIPTIONS

TERMS

THE

MACRODIAGNOSTIC

PROGRAM

DESCRIPTION

LISTING

CONTENTS

(Cont)

(623
.

(MBA)

AND

SAMPLE

Analysis of
RH789

SUPERVISION

TEST:

Format

Typical

RH780

INTERACTION

(MBA)

Description

Lines

DIAGNOSTIC

SAMPLE

SUBTEST

(Direct 1/0)
RH780 Diagnostic Detailed Flow
RH780 Diagnostic Sample Error Message
RP@X/DCL REPAIR DIAGNOSTIC (DIRECT 1/0),

PROGRAM

TEST 3, SUBTEST 1
Listing Column

SAMPLE SUBTEST
Detailed Flow

o
N

U 0N
o

~N
o Oy

o
.

oo,

DIAGNOSTIC
ANALYSIS

Page

RP@X/DCL

Repair

Diagnostic

Sample

Error

Message

DISK

RELIABILITY

SAMPLE

DIAGNOSTIC

(QUEUE

I1/0)

SUBTEST

Detailed Flow
Disk Reliability

Diagnostic

Sample

Error

Message

CONTROL MODULE

SETUP

SERVICES

MODULE

(CITS)

CITS

CHECK

CITS

Error

Messages

Message Heading
CITS Subtest Troubleshooting

Unexpected
Results

PSL

Errors

Expected
Extended
to

Exception

Trace

Traps

Errors

6-15
6-17

DESCRIPTION

First

Mode

Test

Part

Possible

Printout
NO-OP a Test Case

Compatibility

Errors

Branch

How

Features

in CITS

Leading
Data

Exceptions

HWOONOUMbWNE

L
[]

CITS SUBTEST

—

[

w ww

TEST

CITS EXECUTE

CITS

ESKAX
[]

INSTRUCTION

CITS_ DECODE

O AU
WN

COMMON

(ESKAX@2,
A OY
Oy

PACKAGE

First

) Wi ) Wo ) Tike) B ) W 2

EXERCISER

Entry/Exit

Module

Done

Test

First

Part

oo o RN BE N BES B

CLUSTER

W W N SIS

CPU

SOy
Yoy O
(e
) ) Ee) ) We ) T2 We W2 We )W) We )Mo )
|
et b =
0 7 1y
!
ooy

WWNNDNNDNDNDNDDNDNDMNDMNDDNDMPDNDMNDDNDNDND
-

[

o) l*)¥e W) Neor W) We)We)Neo)We)Ne) Je) Ne ) Wie) o) Je)Ner W) e

o) N el

CHAPTER

Done

vii

(ESKAX@4,

Part

Test

Done

Test

Failures

Procedures

6-17
6-25
6-25
6-25

CONTENTS

(Cont)

o
o

¢«

Checkout

Subtest

Checkout

Subtest

Clock

Arithmetic,
Test Module

Test

Logic, and Field Instruction
(ESKAY@3, Test 2)

CRC,

and

(ESKAY05,
Ul

Test

J N

Operators

Character

String

(ESKAY10,

Test

[

Module

6-50

Test
Test

Module
5)

6-59

Instructions

Test

Exception

Test

10)

6-60
6-60
Test

Module

(ESKAZ@3,

6-60

Memory

Management

Test,

General

Memory

Management

Test,

Subsection

Compatibility
Format
Sample

Error

Compatibility
Assumptions

GLOSSARY

6-57
6-57

Module

Flow

Mode

DIAGNOSTIC

Viii

6-62
6-62
6-70

Test

Message

Mode

Flow

6-62

TEST

(ESKAZ@3, TEST 2)
Instructions Tested

DESCRIPTION

Test Reference Execution
COMPATIBILITY MODE INSTRUCTION

APPENDIX

Test

6-57

6-60

Instruction
Test

(ESKAY@9,

Memory Management
Test 1)

[]

Test

Instruction
4; ESKAY@6,

Privileged

N =

Queue

EDITPC

> W

L]
[

[)
.
.
°
o

6-40
6-44

Function

(ESKAY@4,

ESKAZ

6-40

Specifier Dependent Floating-Point
Test
(ESKAY@7, Test 6)
Decimal Strings Module (ESKAY@8, Test 7)

]
(SRS

Verification

Operand

(9}

e
e

[
oY

12)Ne) Mo
)]

(ESKAX@6,

Internal Timer and Day Clock
Module
(ESKAY@2, Test 1)
Interval Timer Functions

[]

N =

6-35
6-36
6-36
6-37
6-39
6-40

MBE

Day

6-32

Subtest
Interaction Subtest

SBI
UBE

Memory Verify

(o)W e)]

SN
N

o) J®)
12N e)!

(o) We)l

6-33
6-35

(ESKAY11l,

1) Wer N o) o)t

Test

UBA
MBA Checkout

Test
Floating-Point

(ESKAX@5,

Subtest
Checkout Subtest

Branch,

Module

Checkout

ESKAY

[ TS s

oY OV

Verification

SBI

WWwwwwww

o
e

o
*

@
e

YOy OYOY O Oy

o
o

SBI

WwWw Wwwwww

Page

Error

Message

Explanation

Instruction

SOFTWARE

Module

TERMS

6-70
6-72
6-73

FIGURES

[
I
Noy
s

PHERERERQOOJONDWNEHN
-

§L

R SN

Title
Diagnostic

Program

VAX-11/780

Diagnostic

System

VAX-11/780 Diagnostic
Environments

System,

Monitor

and

Relationships

Hardcore

Monitor

Environment

and

Program

Levels

Hierarchy

Execution

Test

Sequencing

Residency/Test

Flow
Monitor Residency/Test Flow
of the Diagnostic Supervisor
Environments
Communication Register Formats and Select

Microtest
Functions

Floppy Status Bit Assignments
Basic Diagnostic Supervisor Structure
LSI-11

Memory

Program

Codes

Residency

Simplified Microdiagnostic
Hardcore Test Sequence
Microtest Structure

Test

Procedure

Monitor Listing Sample
Hardcore Listing Sample

Microtest Listing Sample
Typical Error-Free Terminal
Error

Message

Listing

Indexing

Microtest

Portion

Example
Example
Loop Example

Single

the

(MBA)

Output

Format

Loop and Single
Microtest Scope

RH784
L T

Mode,

Bus

Example

Program

Section

Diagnostic

Program

Synopsis,

Portion

of the Global Symbol Table for the
Absolute PSECT of the Loader File of the RH780
(MBA) Diagnostic Program
Diagnostic Program and Diagnostic Supervisor

Interaction
RH780

(MBA) Diagnostic
Subtest 1, Listing

Program

Test

RH784 (MBA) Diagnostic
Subtest 1, Flowchart

Program

Test

DSSBGNSUB
ESCAA

Link

Listed

the

Symbol

Table

the

Symbol

Table

the

Map

DS$SBGNSUB

Listed

Supervisor

Link

Map

DS$BGNSUB

Entry

RBGNSUB

Listed

Diagnostic

Point
in

the

Supervisor

Symbol

Link

Table

the

Map

ESRCA

Sample Error Listing
ESRCA RP@AX/DCL Test 1, Subtest
Listing

ESRCA RPOX/DCL Repair
Subtest @, Flowchart

Diagnostic

Program

Test

FIGURES

Figure

No.

(Cont)

Title

Page

ESRCA Sample Error Message
Disk Reliability (ESRAA) Test

5-13
5-14

Subtest

Listing

Error

ESRAA

Test

Subtest

Error

Flowchart

(for disks)

Contents

Block

Status

I/0

5-23

5-24
5-25

CHECKBLOCK Routine

Code

5-28
5-30
5-31

ESRAA

Listing

5-32

GETBBFSECTOR Routine
Sample

Error

CPU Cluster Exerciser Package Memory Allocation
Execution

Test

Compatibility Mode

Case

ESKAY#3

Instruction

Module

Subtest

Structure

TABLES

Title

o
«Q
1

No.

VAX-11/780 System Manuals
Term and Symbol Definition
Deposit Symbolic Addresses
Examine
Set

Default

RX@1

Error

Message

Control/Special
Qualifier

N
\S)
W

oo
= Oo

Code

Definitions

Definitions
Character

Descriptions

Symbol/Abbreviation Definitions

Microdiagnostic Command/Flag Descriptions
Summary Parameter, Length Parameter for
4

Information

Reserved

Pushed

the

Stack by the

Handler

Operand

Compatibility

Options

Descriptions

Flag

Control

Instruction

|
|

)]

Command

Symbol

Term and

Exception

o)l e)We)We)No)Re) o))

Address

Qualifiers

Set Step Command Options
Control/Special Character Descriptions
Memory Management Error Code Definitions

Vector
o)}

Symbolic

Command

Load

Faults and

Mode

Compatibility Mode

Compatibility Mode
Page Faulting with

Entry

Trap

Instructions

Part

Done

Test

Table

First

Part

Done

IDB

Format

First

Part

Done

TCB

General

Part

Done

TCB

Settings on

Reserved Instructions
First Part Done

First

PSL Bit

Passed

Entries

Format

to CITS DECODE

NN NN
>
w W
N
NN
S
w W I
|
I W W =
(|
~J OOV
HFROIONN -

DDLU NFROONOUIWNDHFHE

DWW
wWWw
NN DD NN DO
|
|

Table

TABLES

Table

No.

Title

Page

6-11

Unibus

6-12

Compatibility

Adapter

Compatibility

ESKAZ

6-13

(Cont)

Test

Map

Offsets

Instructions
Hardware and

Provided by
Exercised by

Mode

Instructions

Not

Compatibility

Address

Mode
Mode

6-39

6-71

Yet

Tested

6-71

EXAMPLES

Example

6-1

No.

Title

Page

Unexpected

6-2
6-3

Exception Error Message
Unexpected Exception in CITS, Error
Result Register Errors

6-4

CITS

Detects

Longword

Data Error
Data Error

6-11
6-12

CITS

Detects

CITS

Detects

Quadword

String

6-8

Branch

6-9

Expected

6-10
6-11
6-12
6-13

6-12

Error

Exception
Trace Trap Error
Extended Printout

6-13

Error

6-13
6-14

Case 105 SUBD2 Instruction
ESKAX Test 1, Subtest 1, Error

6-14

ESKAX

6-15

Test

ESKAX

Test

6-16
6-17

ESKAX
ESKAX

6-18
6-19

Test
Test

Subtest

Error

Subtest

1,
1,

ESKAX Test
ESKAX Test

Subtest
Subtest

1,
1,

Subtest

6-20
6-21

ESKAX Test
ESKAX Test

1,
1,

6-22

ESKAX

Test

ESKAX Test
ESKAX

Test

6-30
6-31

ESKAX Test
Test
ESKAX Test
ESKAY Test
ESKAX Test
ESKAX Test
ESKAY Test

6-32

ESKAY

6-23
6-24
6-25
6-26

6-27
6-28

6-29

ESKAX

Test

6-10

6-11

6-6
6-7

Error

6-3
6-8

Error

6-5

PSL

Data

Message

6-14

6-16

6-18

Error

6-18

Error

2,
3,

Error
Error

Subtest

3
4

6-19
6-20

Error

Subtest
Subtest

4,
5,

Error
Error

6-21

3
4

6-22

Subtest

Error

Subtest

6-22

Error

Subtest

Error

2,
2,
2,

Subtest
Subtest

Error
Error

Subtest

@,
0,
@,

Error

6-30

212
213
287

Subtest

Error

Subtest
Subtest

3,
3,

Error
Error

Subtest

4
4

6-38

Error

Subtest

Error

6-20
6-21

6-22

6-23
6-23

6-28
6-32
6-38
6-38

6-40
6-40

6-33

ESKAY Test

6-34

Subtest

ESKAY

Error

Test

6-35

Subtest

ESKAY Test
ESKAY Test
ESKAY Test

Error

1,
1,
1,

Subtest
Subtest

4,
5,

6-41

Error
Error

1
1

Subtest

6-41
6-42

Error

6-42

6-36
6-37

6-40

EXAMPLES

(Cont)

Page

Example No.

Title

6-38

ESKAY Test 1, Subtest 6, Error 1

6-43

ESKAY Test 1, Subtest 16, Error 2

6-39
6-40
6-41
6-42

ESKAY Test
ESKAY Test
ESKAY Test
ESKAY Test

1,
1,
1,
1,

Subtest 6,
Subtest 7,
Subtest 8,
Subtest 9,

Error 2
Error 3
Error 2
Error 1

6-44

ESKAY Test 1, Subtest 11, Error 1

6-46

ESKAY Test 2, Subtest 2, Error 1

6-45

6-47

ESKAY Test 2, Subtest 1, Error 31

6-47

ESKAY Test 4, Subtest 1, Error 2

6-51

ESKAY Test 4, Subtest 1, Error 24

6-53

ESKAY Test 5, Subtest 8, Error 104

6-56

ESKAY Test 7, Subtest 2, Error 26

6-58

ESKAZ Test 1, Subtest 1, Error 20212

6-64

6-50

ESKAY Test 4, Subtest 1, Error 7

6-52

ESKAY Test 5, Subtest 2, Error 7

6-54

ESKAY Test 5, Subtest 8, Error 101

6-53

6-55
6-56

ESKAY Test 8, Subtest 1, Error 48

6-58

ESKAZ Test 1, Subtest 1, Error 20213

6-57

6-59

6-45

ESKAY Test 1, Subtest 12, Error 1

6-48

6-51

6-44

6-45

ESKAY Test 2, Subtest 3, Error 1

6-49

6-43

6-43
6-43
6-44
6-44

ESKAZ Compatibility Mode Test Error

xii

6-46
6-49

6-52

6-55

6-56

6-59
6-65

6-73

CHAPTER 1
INTRODUCTION

1.1
This
and

MANUAL SCOPE
manual provides a comprehensive descr
iption of the functional
operational
characteristics of the
VAX-11/780 diagnostic

system.

The

level

appropriate

branch

detail

courses

presented

Provides

the

service

field

and for a field reference.
Table
1-1 provides
documents.
Note that a glossary of diagnostic
provided in Appendix A.

Table
Document

1-1

Title

Control

1VAX—11/78E Power System
iTechnical

VAX-11/780

Description

System

Number

resource

training

for

program

list of
related
software terms
is

Manuals
Form

EK-PS780-TD-001

EK-SI78@-IN-00@1

Available

EK-DS780-UG-g01

Available

EK-DS780@-TD-041

Microfiche

Library

Technical
Description

EK-FP780@-TD-001

Microfiche

Library

REP@5/REP@G6 Subsystem
Technical Description

EK-REP@6-TD-001

Microfiche

Library

EK-MS780-TD-g01

Microfiche

Library

EK-MS780~-TD-0d1

Microfiche

Library

EK-DW780-TD-001

In Microfiche

Library

EK-KC78@-TD-901

Library

EB@7466

Available

VAX-11/780

DS780

System

Guide

Diagnostic

Technical
FP780

Manual

Diagnostic

User's

Library

System

~Installation

DS780

Microfiche

hard

copy*

hard

copy*

System

Description

Floating-point

Processor

VAX-11 KA788 Central
Processor Technical

Description
VAX-11

MS780

System

Technical

Memory

Description
DW780

Unibus

Technical
KC780

Console

Technical

VAX-11/780
Handbook

Adapter

Description
Interface

Description

Microfiche

Architecture

1-1

hard

copy*

VAX-11/7886 System Manuals (Cont)

Table 1-1
Document Title
VAX-11/780

Software

VAX-11/78¢

Hardware

Handbook

VAX/VMS Primer
VAX/VMS Command

User's Guide

Language

VAX-11 MACRO User's

Guide

VAX-11

Manual

Linker

Reference

VAX-11 Symbolic Debugger

Reference Manual

Control Number

Form

EB@8126

Available in hard copy*

EB@9987

Available in hard copy¥*

AA-D@30A-TE

Available in hard copy?*

AA-D@23A-TE

Available in hard copy*

AA-D@33A-TE

Available in hard copy*

AA-D@19A-TE

Available in hard copy*

AA-D@25A-TE

Available in hard copy*

*These documents can be ordered from:
Digital Equipment Corporation
444 Whitney Street
Northboro,

@1532

Attn: Printing and Circulation Services (NR2/M15)
Customer Services Section

For information concerning microfiche libraries, contact:
Digital Equipment Corporation

Micropublishing Group,
129

Parker

Maynard,

1.2

Street

PK3-2/T12

@1754

DIAGNOSTIC SYSTEM CAPABILITIES

ents
The VAX-11/788 diagnostic system is a set of software compon
tion
detec
error
of
range
wide
a
rated as a system to provide

integ
The
and isolation capabilities for the VAX-11/78% hardware. ted
dedica
to
tests
onal
diagnostic levels range from system functi fying a faulty module
microprogram techniques capable of identi es. In addition, the
(printed circuit board) or group of modul ntial selection and
diagnostic control functions provide substa
execution options.

1-2

The

overall

goals

diagnostic

strateqgy

of:

High

quality

providing

and

efficiency

formal

configurations,

that

can

configured

Reduction

providing

high

and

for

the

field

service

system
installation,
by
procedures, automated test

System

specific

exerciser

VAX-11/78¢

fault
isolation
and
visibility diagnostic

program

systems.

repair
times,
by
programs
(programs

to the operator)
and procedures keyed to
service troubleshooting and repair philosophy.

field
diagnostic

system
1is
supported
by
console system.
In addition

microcomputer

major

installation

package

accessible

The

satisfies

(on-site)

diagnostic

diagnosis

from

execution,

remote

the

diagnostic

PDP-11/v@3

providing

diagnostic

system

center.

the

(LSI-11)
for 1local

allows

for

1.3
DIAGNOSTIC SYSTEM OVERVIEW
The
diagnostic
system
consists
of
programs
that
hierarchically
(from
general
to
specific
capabil

levels.

Each

level

Level

Operating

Level

2 --

contains

one

system

(using

queue

System

exerciser

Diagnostic
can

(using
Bus

run

(VMS)

based

diagnostic

program

either

VMS

the

1I/0)

interaction
and

under

standalone

level

Diagnostic

supervisor--based

can

only

run

Certain

Level

run

Functional
Repair

peripheral

diagnostic

standalone

level

programs

macrodiagnostic

instruction

only

diagnostic

test

programs

that

programs

that

(using

diagnostic

supervisor.

Hardcore

mode

programs

diagnostic

mode

peripheral

diagnostic

Standalone

the

diagnostic

VMS.

supervisor--based

level

Cluster
Level

under

peripheral

Diagnostic
can

that

program

reliability

programs

Level

programs

I/0)

supervisor--based diagnostic programs

queue

Formatter

are
organized
ities)
in
six
categories, as follows:

direct

I/0)

programs

that

run

without

Console

Console-based

Level--

that

diagnostics

standalone mode only

can

run

the

Microdiagnostics
Console

program

Octal Debugging Technique

(ODT)

ROM resident power-up tests
LSI-11 diagnostics

The diagnostic programs can be used for preventive maintenance
checks to ensure proper computer operation; or, 1if system
of

mal functions have been detected, specific programs or groups
programs can be run to isolate the fault.

Figure 1-1 shows the relation of the six levels to four diagnostic
es

nment requir
program operating environments. The console enviro
mode). It
lone
(standa
exclusive use of the VAX-11/780 system
nment,
enviro
this
In
includes only the console level programs.
the
1in
sor
proces
program control is exercised by the LSI-11
console

subsystem.

In the cluster environment, the system environment, and the user
environment, control is exercised in the VAX-11/78¢ CPU. The
cluster environment supports only standalone diagnostic programs.

level
It includes level 4 programs and some level 3 programs.theThechannel

3 programs supported are those that test the CPU and

adapters.

The

that

system

can

environment

run

the

supports

peripheral

standalone mode.

programs and level 3 peripheral programs.

diagnostic

These

include

programs

1level

The user environment supports only programs that can be run under

VMS, namely levels 2R,

and l.

In general, the diagnostic system uses a building block approach

When
to testing (and subsequent fault detection and isolation).
system
d
standar
the
the diagnostic programs are executed in
m (basic) set
checkout sequence, they will initially test a minimu
After these
on.
operati
proper
of logical functions to ensure their
x block is
comple
more
and
basic operations are verified, a larger

tested, using the previously tested block as a base. This sequence
is implemented consistently from the ROM resident- power-up tests
(which check the console) to interactive system tests executed as

user mode tasks under the VMS operating system, as shown in Figure
1-2.

in a
It may be that a diagnostic program will indicate an error
er
anoth
by
osed
diagn
y
easil
hardware component which is more
a
te
indica
may
m
progra
program. For instance, the bus interaction
also
may
m
progra
ility
failure of a tape drive. The tape reliab

detect the same failure or a related failure, but the problem may
1-4

PROGRAM
MODE

ENVIRONMENT

CONSOLE
ENVIRONMENT

OFF-LINE

(STANDALONE)

CLUSTER

ENVIRONMENT

PROGRAM
LEVEL

| CONSOLE LEVEL

LEVEL4
LEVEL
3

SYSTEM
ENVIRONMENT
LEVEL
2

ON-LINE
(UNDER VMS)

USER
ENVIRONMENT

LEVEL 2R

LEVEL
1

TK-1170

Figure

1-1

Diagnostic

Program

1-5

Mode,

Environment

and

Levels

|1|

RK611

RPOX/DCL

ALONE ONLY
STAND
(DIRECT 1/0)

REPAIR

DIAGNOSTIC

(ESRCA)

(ESREA - E)

PARTS A-E

DIAGNOSTIC

REPAIR LEVEL

RK611 MANUAL

INTERVENTION

TESTS

(ESREF)

LEVELaj

STAND ALONE ONLY

1/0)
(DIRECT
FUNGTION LEVEL

STAND ALONE

OR UNDER VMS

(QUEUE 1/0)

TAPE DRIVE

FUNCTIONAL

TIMER

(ESMAB)

RPOX

RMO3

FUNCTIONAL

(ESRDB)

(ESRBA)

DMC
EXERCISER
(ESDBB)

DIAGNOSTIC

RP/RK/RM

TAPE

DISK

(ESMAA)

(ESRAB)

LOCAL TERMINAL

DIAGNOSTIC

FORMATTER

RELIABILITY

(ESTAA)

9-1

DISK

TERMINAL

(ESRAA)

(ESTBA)

DIAGNOSTIC

RELIABILITY

STAND ALONE

(ESAAA)

MULTI-

RP/RK/RM

LEVEL2 4

LINE PRINTER

DIAGNOSTIC

BUS

OR UNDER VMS

(ESXBA)

UNDER VMS

LEVEL 2R

ONLY

SYSTEM

(QUEUE 1/0)

EXERCISER
TK-0606

Figure

1-2

VAX-11/780

Diagnostic

System

Hierarchy

(Sheet

Program

1 of

DEDICATED

LSI-11

LSI-11 DIAGNOSTICS

TESTS

PROGRAM 1/0 MODE

CONSOLE-

POWER UP

TESTS

oDT

MOST BASIC LEVEL

(1BM RESIDENT)

CONSOLE

PROGRAM

E
1/0 MODE
L—— CONSOL

BASED

STAND ALONE ONLY

HARDCORE TESTS ——|

MICRO-

DIAGNOSTIC

|—— MICROTESTS.

PROGRAM

HARDCORE

INSTRUCTION

LEVEL 4¢

TEST

(EVKAA)

> oa————
CLUSTER
EXERCISER
(ESKAX)

STAND ALONE ONLY

LEVELSfi

(DIRECT 1/0)

]

RH780 (MBA)

DW780 (UBA)

DIAGNOSTIC
(ESCAA)

DIAGNOSTIC
(ESCBA)

-~
TK-0607

Figure 1-2
VAX-11/780
Diagnostic System Program
Hierarchy (Sheet 2 of 2)

be
on
the
tape drive controller,
the
(CPU). Proper use of the six levels of
enable the field
accurately.

service

engineer

RH780
(MBA),
or the KA780
diagnostic programs should

identify

the

failure

quickly

and

1.4

DIAGNOSTIC

SYSTEM

EXECUTION

Most of the diagnostic programs
In
other
words,
they
require

ENVIRONMENTS

must be run off-line (standalone).
exclusive
use
of
the
VAX-11/780

computer system and will not run under the VMS operating system.
Diagnostic programs in levels 3, 4, and the console level are of
this type
(Figure 1-2). The diagnostic programs in level 2 can be
run off-line or on-line (under VMS).

”

Off-line

diagnostics

must

run

from

the

console

terminal.

On-line

diagnostics

system

and

will

mode

programs.

environments
1.5
On

power

CONSOLE
up,
a

may

the

Figure

required

DIAGNOSTICS
set
of
ROM

run

from

computer
1-3

the

any

shows

various

resident

terminal

system with

tests

the

the
user

execution

diagnostic

verifies

other

programs.

the

proper

functioning of the LSI-11 within the console subsystem before the
console
program is
booted
from
the
floppy disk.
If
the
console
program cannot be
booted,
the ROM resident
tests,
together with
ODT,

can

used

1isolate

VAX-11/78@9 Diagnostic
Appendix D. In addition,
be used to
subsystem.

The

perform

console

in-depth

subsystem,

provides the
functions:

basis

Traditional

DEPOSIT,

lights

Diagnostic

and

Store

tests

and

START,

capability
Control

fault.

For

details

see

the

each

component

the

console

in
connection
with
the
console
program,
the diagnostic system with the following

for

HALT,

the

System User's Guide
(EK-DS78¢-UG-001),
a set of dedicated LSI-11 diagnostics may

switch

and

functions

single

maintenance

load

control

EXAMINE,

instruction

functions,

diagnostic

(WCS),

such

microcode
execution,

including

into

the

Writable

control

single

step clock functions, and examine key system points via a
serial diagnostic visibility bus (V Bus), and to deposit
and
examine
data
1in
1locations
in
the
VAX-11/780
main
memory and I/0 space
Operator

The console
to load and

communication

with

the

VAX-11/780

software.

program enables the operator to run microdiagnostics,
the diagnostic supervisor (in the standalone mode)

run

and
the
standalone
native code), and to

macrodiagnostic
boot

the

programs

operating

1-8

system.

(using

VAX-11/780

DEDICATED
__ coNsOLE LSI-11 __ oDT
LSI-11

TESTS

POWER UP TESTS

CONSOLE

PROGRAM

LOAD FROM

INSTRUCTION

HARDCORE

DIAGNOSTIC

TEST

SUPERVISOR

VAX/VMS

I_____cowsous
PROGRAM

/
DIAGNOSTIC
SUPERVISOR

LOAD FROM * *

SYSTEM DEVICE

LOAD FROM

SYSTEM DEVICE

MONITOR

DIAGNOSTIC
SUPERVISOR

CONSOLE FLOPPY

MICRODIAGNOSTICS

—l

MICRODIAGNOSTICS

HARD CORE TESTS

MICROTESTS

- GO CHAIN

DIRECT 1/0

- FAIL CHAIN

/
.

KA-11/780 CPU CLUSTER EXERCISER

guyggaflgpg';\gggfl,c
TMO3/TEE16-TU77 TAPE DRIVE FUNC TIMER

RPOB/FUNCTIONAL DIAGNOS

—

DZ11 DIAGNOSTIC

Qi/o

TAPE RELIABILITY
RP/RK/RM DISK FORMATTER

QI/0

RP/RK/RM DISK RELIABILITY

EXER

LINE PRINTER DIAGNOSTIC
BUS INTERACTION

CR11 CARD READER DIAGNOSTIC

—_— e

* THE NUMBER OF 1/0 DIAGNOSTIC PROGRAMS WILL GROW.

Figure

LOCAL TERMINAL DIAGNOSTIC

RMO3 DISKLESS DIAGNOSTIC

RMO3 FUNCTIONAL DIAGNOSTIC
DR11-B DIAGNOSTIC

1-3
VAX-11/789
Diagnostic System,
Execution Environments

_\____]
TH-0373

, it
Note that when the console program is running in the LSI-11
program
or
mode
1/0
console
modes,
two
will always be in one of
I/0 mode. With the exception of the Control P ("P) command, the

console commands (console command language) listed in the help
files are available only when the console program is in the
'

console I/0O mode.

In the console I/0 mode, the console program interprets the
characters typed on the console terminal as console commands. In
the program I/0 mode, however, the console program is transparent

to the operator. The console program passes characters from the

console terminal directly to the VAX-11/780 CPU for use by VMS or
the diagnostic supervisor.

Type Control

P to

switch

from program

I/0O mode

console

1I/0

mode

.
mode

Type

TERMINAL

SET

program I/0 mode.

MICRODIAGNOSTIC

1.6

console

from

switch

PROGRAM

I/0

PROGRAM

The microdiagnostic program provides module isolation for 1logic
failures within the CPU, floating-point accelerator and MOS memory
controllers. The program will detect stuck high/low logic

functions and open or grounded etch and wire interconnections. The
microdiagnostics are organized in a bootstrapping test sequence
(i.e., building blocks) of the console interface, CPU hardware,
cache—-translation buffer,

I-stream buffer,

Synchronous Backplane

Interconnect (SBI), and memory controller and array. All detected

faults result in an error typeout indicating the smallest set of
modules to which the diagnostic can isolate the failure.
The microdiagnostic program

by one

initiated

console

command

and executed from the CPU cluster test facility. The test facility

consists
Control

Store

the

console

(WCS),

subsystem,

and the V Bus.

console

interface,

Writable

The microdiagnostic package consists of two major test divisions:

console adapter and hardcore, and microtests. Each test division
is controlled by an associated monitor that provides nondiagnostic
services to that division. Both test division monitors are
serviced by the console-resident microdiagnostic monitor.

addition to loading the test monitors, the microdiagnostic monitor
retrieves

microtest

performs

error

sequences

into

WCS,

overlays

performs

reporting,

from

test

and

the

floppy

dispatching

manages

fault

1loads

test

isolation.

The

disk,

and

sedquencing,

microdiagnostic monitor also allows the operator microdiagnostic

test selection and execution options (Chapter 4). Figure 1-4 shows
overall monitor relationships and test sequencing.

1-10

MICRODIAGNOSTIC
MONITOR
[

HARDCORE

MICROTEST

MONITOR

]

v
e

TEST

SEQUENCE

CONSOLE

DATA PATHS

ADAPTER

e TRANSLATION

SEQUENCER

. CACHE

* MICRO
e

WCS

DATA PATH

BUFFER

INSTRUCTION

FPA OPTION

SBI INTERFACE

BUFFER

SUBSET

MEMORY

CONTROLLER
*

MEMORY ARRAY
TK-0752

Figure

1-4

Monitor

Relationships

and

Test

Sequencing

1.6.1

Console Adapter and Hardcore Division

composed of a
The adapter and hardcore division microdiagnostic islocated
on the

test stream of pseudo-instructions and test data ions are defined
o-instruct
console floppy disk. Note that the pseuddivisi
on tests the console
This
.
stream
test
the
specifically for

and a subset of the
adapter (CIB module), microsequencer, WCS,into
the console memory
data paths. The hardcore monitor is called

or, in turn,
by the microdiagnostic monitor. The hardcore monit
the floppy
from
data
test
of
bytes)
retrieves small blocks (+1.5K
When the
tion.
execu
ols
contr
then
and
r,
into a console buffe
ys
current block has been completed, the hardcore monitoronoverla
the
of
data porti
this block with a new test block. The test
lists of VAX-11/78a
and
words
data
of
sed
compri
test stream is
d into the WCS
microinstructions. The microinstructions are loade
tate modes.
and executed in single bus cycle or single time-s

Then,
When an error is detected, an error header message is typed.
typed and
if the HALTD flag 1is not set, a trace message is addit
ional
the fault. This
additional code is executed to isolate Bus
.
ctions
instru
compare
testing will normally consist of V
of the

Figure 1-5 shows monitor residency and the basic flow

console adapter and hardcore tests.

1.6.2

Microtest Division

not covered by
The microtest division completes testing of the CPU
ng module.
the hardcore division, and provides isolation tol aoffaili
the microtest
The microtests, which are executed under contro
GO chain and FAIL
monitor, are divided into two subdivisions: loaded
into WCS and
chain. The GO chain consists of microtests
executed at full speed. The purpose of the GO chain isto tothedetect
FAIL
an error. If an error is detected, control is passed
e
modul
ng
faili
chain, which isolates the error and reports the
1is
chain
FAIL
through the microdiagnostic monitor. Note that the
executed only on detection of an error.

overlay is
The GO chain consists of a series of WCS overlays. Each one
or more
in
approximately 1K microwords in length and will conta
first
the
loads
microtests. Initially, the microdiagnostic monitor If no error
1is
executed.
overlay into WCS; that overlay is then
This
ed.
execut
detected, the next overlay is loaded into WCS and
sequence continues until each test in each overlay has been
executed, or until an error is detected.

of the microtest
When the GO chain detects an error, execution microt
est address
that detected the error is suspended. The error
execution
test
micro
rt
is saved and used by the FAIL chain to resta
to recreate the conditions that detected the error.

test and begins fault
The FAIL chain reenters the failing micro
c number of ticks
specifi
a
isolation. The microtest is clocked
Bus signals are
V
in
from the error address and then certa
module, an
faulty
processed. If the V Bus signals identify the monitor.
If these
error report is made through the microdiagnostic
1-12

CONSOLE MEMORY
.

MICRODIAGNOS-

ERROR

" REPORT

TIC MONITOR

CORESIDENT WITH

MICRODIAGNOSTIC

LOAD AND

MONITOR

SERVICE CALLS

HARDCORE

MONITOR

SERVICE CALLS

TEST

STREAM

ERROR

CONSOLE

WCS

BUFFER

EXECUTION

ERR.

YES

DETECT

NO
EXECUTE
NEW

TK-0753

TES'lI'

Figure

1-5

Hardcore

Monitor

1-13

Residency/Test

Flow

ional V Bus signals are
signals do not identify the error, addittent
error which 1is not

intermit
processed. In the case of anexecu
tion, a report is printed that
chain
FAIL
g
reproduced durin
ing GO chain microtest.
lists the modules involved 1in theandfail
the basic test flow.
Figure 1-6 shows monitor residency
1.7

MACRODIAGNOSTIC PROGRAMS

in VAX-11 MACRO and
The macrodiagnostic programs are written
and 3 programs do
2R,
Level 2,
assembled in VAX-11 native code.
d and executed
loade
be
s
not run independently; they must alway
with the diagnostic supervisor.
visor

Diagnostic Super
1.7.1
that supports each
The diagnostic supervisor provides a framework
. It operates in
time
a
at
, one
of the macrodiagnostic programs
Two of these
ions.
funct
three environments and provides two major
environment
em
syst
and
(CE)
environments, cluster environmentmode.
supervisor
ostic
diagn
The
(SE), constitute the standalone
the VMS
under
runs
it
when
operates in the user environment (USE)
modules
rent
diffe
ts
onmen
envir
operating system. In each of these
major
first
The
ated.
activ
rvisor are
within the diagnostic supesuper
the
of
tion
preta
inter
the
is
visor
function of the diagnostic

's terminal. The command 1line
command line typed on the operator
supervisor performs this
interpreter (CLI) portion of the to
control the 1loading,
ator
function, enabling the oper
programs. The program
test
ostic
sequencing, and execution of diagn
r function of the
majo
nd
interface (PGI) performs the seco
required by some or
ces
servi
n

supervisor, providing a set of commo services include operator
all diagnestic programs. The PGIformatting, memory management,
interaction routines, error message
that the operator can communicate
and I/0 request handling. Notice
with the diagnostic program only through the CLI and the PGI

message service in the supervisor.

de their own device
The supervisor supports programs that provirequi
re I/O services.
that
programs
interfaces (direct I/O) and
the standalone
in
run
be
must
ams
The direct I/O diagnostic progr
since VMS
ent)
ronm
envi
em
syst
mode (cluster environment andheral devices. Programs, that
do not
inhibits direct access to perip
queue
on
rely
test
under
ces
devi
directly access the peripheral
visor
super
ostic
diagn
the
and
I/0 system services. Both VMS

these programs can run
provide queue I/0 system services, so that
m environment) or the
syste
the
in either the standalone mode (in

ic
ent, under VMS). When the diagnost
user mode (user environmI/0
services are run in the user mode,
programs requiring queue
I/0 requests directly to VMS. When
the supervisor passes the queue are
run standalone, the supervisor
ams

gueue I1/0 diagnostic progr
em, providing the queue I/0 system
emulates the VMS operating systthe
functions of the diagnostic
services. Figure 1-7 shows
tic operating environments.
gnos
supervisor in the three macrodia

1-14

CONSOLE MEMORY
MICRODIAGNOSTIC

_, ERROR/TRACE

MONITOR

REPORT

CORESIDENT WITH
MICRODIAGNOSTIC

LOAD AND

MONITOR

SERVICE CALLS
MICROTEST

MONITOR

SERVICE CALLS

GO
EXECUTE

CHAIN

OVERLAY
WCS

EXECUTION

ERROR

REPORT

FAIL CHAIN

TRACE

VBUS SIGNAL

REPORT

EXECUTION

YES

ADDITIONAL

VBUS SIGNAL
PROCESSING

_
TK-0738

Figure

1-6

Microtest

Monitor

1-15

Residency/Test

Flow

CLUSTER ENVIRONMENT
(CLUSTER EXERCISER
RH780 DIAGNOSTIC

DIAGNOSTIC

VAX-11/780

SUPERVISOR

DW780 DIAGNOSTIC)

OPERATOR

1
_

PGI

CPU
CLUSTER

VMS

DIAGNOSTIC

SERVICES

TEST
PROGRAM

TERMINAL

(VECTORS)
CHANNEL
SERVICES

uuT

SYSTEM ENVIRONMENT

DIAGNOSTIC

(DIRECT 1/0 PERIPHERAL

VAX-11/780

SUPERVISOR

DIAGNOSTICS, STAND ALONE)

PGI

CcPU

DIAGNOSTIC

VMS

PROGRAM

(VECTORS)

CLUSTER

SERVICES

TEST

OPERATOR
TERMINAL

CHANNEL

SERVICES

v
>

uuT
TK-0746A

Figure 1-7

Functions of the Diagnostic Supervisor Environments
(Sheet

1-16

(Q1/0 PERIPHERAL

DIAGNOSTICS,

DIAGNOSTIC
SUPERVISOR

STAND ALONE)

VAX-11/780

CLI

OPERATOR

TERMINAL

PGI

VMS SERVICES

Q 1/0 DRIVERS

?é’;?NOST'C

CPU CLUSTER

PROGRAM

CHANNEL

SERVICES

uuT

USER
ENVIRONMENT

Q 1/0 PERIPHERAL

DIAGNOSTICS

DIAGNOSTIC

UNDER VMS

SUPERVISOR
N

VMS

VAX-11/780

’

OPERATOR

*
>

PGI

TERMINAL

DIAGNOSTIC

VMS

TEST

VMS

SERVICES

OPERATING

PROGRAM

(VECTORS)

SYSTEM

CPU

[

UsTER

uuT

CHANNEL

SERVICES

TK-07468B

Figure

1-7

Functions

the

Diagnostic

(Sheet

1-17

Supervisor

Environments

1.7.2
The
the

Cluster

Diagnostic

Programs

CPU cluster exerciser, the RH780
DW780
(UBA)
diagnostic
program

hardware.
They run under
diagnostic supervisor, in

1.7.2.1

CPU

package

consists

Cluster

diagnostic

program,

and

test
the
VAX-11/788
cluster
the cluster environment portion of the
the standalone mode.

Exerciser

(MBA)

three

Package

diagnostic

The

cluster

programs.

exerciser

The

package

provides
a
comprehensive
functional
test
of
the
CPU
cluster,
including
the CPU,
the
Unibus and Massbus adapters,
and memory.
The first program
(ESKAX)
1is the quick verify portion of the CPU
cluster exerciser package.
The second
program
(ESKAY)
tests
the
native mode
instruction set of the VAX-11/780.
EXKAZ,
the third
program in the package,
checks memory management and the PDP-11
instruction set (in compatability mode).
The

CPU

cluster

exerciser

programs

identify

failing
subsystems.
For
further
fault
should run the microdiagnostic program or

cluster exerciser
will
detect
the

failing

functions

and

isolation
the
operator
restrict the desired CPU

program to the minimum number of modules which
failure,
through
commands
to
the
diagnostic

supervisor.
1.7.2.2

RH788

(MBA)

Diagnostic

Program

The

RH78¢

(MBA)

diagnostic program tests the majority of the MBA logic regardless
of the type of peripheral device attached to the Massbus. Although
the
program
does
not
provide
explicit
component
1level
fault
isolation,
every
detectable
error
1is
associated
with
an
operator-selectable
not

attempted.

scope

is possible with a
the Massbus. Use of
of
the MBA
that either

The

Diagnosis

the

Massbus

attached

transceivers

Massbus exerciser
(MBE, RH11-TB)
an MBE on the Massbus also allows

ability to
perform high
speed
block
a device or a bus terminator must be

Massbus to enable
three levels.
1.

loop.

Verification

program

execution.

The

program

devices
and

cables

attached to
verification

transfers.
Note
attached to the
tests

the

MBA

first

1level

checks

basic

functions.

The

functions

tested
are
those
which
are
necessary
for
subsequent,
detailed
fault
detection.
The
objective
is
to
1locate

functional
failures
prior
to
testing
for
explicit
bit
failures.
Map register access, virtual address register
access,
tested

and
at

correct

this

The second
high/low).
to

the

setting

input

buffer

level of testing locates
The program toggles bits

CPU,

data

byte

selection

are

level.

and

specific

sets

and

commands

clears

and

bit failures
(stuck
directly accessible
bits

conditions.

indirectly

The third level determines the ability of the MBA to meet

The

demands.

system

program

performs

features.

using the MBA wraparound

transfers

block

These block transfers

are executed in the maintenance mode and ensure that the
MBA will support data transfers typically associated with
In addition, the program tests the
system software.
conditions.

diagnostic program,
of

the

UBA

logic.

operator-selectable

scope

(UBA)

detectable

Every

attached

devices

test

the DW78¢

The

loop.

legal

the

RH784

(MBA)

diagnostic program tests most
error

with

associated

program does

Unibus.

the

Program

Diagnostic

(UBA)

DW780

1.7.2.3

all

under

CPU

the

interrupt

the MBA to

ability of

However,

not

attempt

Unibus

exerciser is attached to the Unibus, the program will verify the

integrity of the Unibus transceivers and the ability of the UBA to

respond to device-initiated functions.

seven

The program tests the UBA

levels.

The program tests the basic functions necessary for
subsequent fault detection: the addressability of the UBA
registers, their initial states, and whether they can be
written.

read

and

The

program

and

BRSVRSs).

UBA logic

tests the RAM addressing capability of the
(accessing map registers, data path registers,

Power-fail and

interrupt functions of

the

UBA are

tested

next.

The program creates and tests all error conditions.

Extensive data

the direct data path,

path
the

registers,

tests

transfer
the

the

Unibus

check the map registers,

buffered

address

data

paths,

and data

the

lines,

data

and

microsequencer.

The device tests check all types of data transfer on the
Unibus: DATI, DATIP, DATO, DATOB initiated by the UBA and

by the

UBE.

Interrupts

from the

UBE

the CPU

are

also

tested at the four BR levels.

The contention logic test checks for race conditions when
the four microsequencer select lines (UBATT SEL, SB SEL,
DMA SEL, FILE WRITE SEL) are asserted at about the same
time.

1-19

1.8

PERIPHERAL

DIAGNOSTIC

In
accordance
with
the
whole,
the
peripheral

hierarchy.
test

Repair

specific

exception

executed

the

diagnostic

and

functional

peripheral

the

PROGRAMS

structure

line

the

1level

devices.

printer

standalone

and

mode

diagnostic

programs

are

programs

These

the

are

(with

diagnostics)

system

1in
a
designed
to

programs

terminal

under

system

organized

the

must

environment

(SE)

services of
the
supervisor,
since they provide
their own
access
(direct
I/0)
to the devices under
test.
The diagnostic programs
which
rely
on
VMS,
or
the
supervisor,
for
access
to
the units
under
test
(queue
I/0)
are
each
designed
to
test
a
range
of
peripheral device types. For example, the disk reliability program
(ESRAA)
will
test
all
disk
drive
types
supported
by
the
VMS

operating
On

error

out

system.

detection,

both

the

function,
expected

provide

dump
and

the

repair

failing

the

device
data

diagnostic

controller

contents

received

level

relevant

patterns.

The

the

system

out

the

failing

reliability
information
register dumps.

and
on

dumps

and

call

program

tests

SBI,

Massbus,

(i.e.,

will

the

registers,

functional

exerciser

system
buses
activity, and

and

The

error
is
detected.
The
provide
more
detailed

addition

programs

module

call

failing

and

level

1list

programs

function when an
formatter
level programs
the
failing
function
in

the
integrity
of
Unibus)
under

the
heavy

major
1I/0

it highlights any interaction problems that result.
The
program
should
be
run as
a
dedicated process
under
VMS.
No
other
program
may
run
concurrently
or
compete
for
system
resources,
since
the
program
requires
the
use
of
all
system
resources.

1.9
OPERATOR/VAX-11/788 COMMUNICATION
The operator communicates with the VAX-11/78¢ computer through the
console
subsystem.
The
console
subsystem
provides
a
programmed
interface between the console terminal and the VAX-11/78¢ hardware
and
software,
including
the
diagnostic
system.
The
console

- subsystem hardware
single floppy disk

line

units,

control

LSI-11

and controller,
VAX-11/7880
CPU
console

panel

consists

drive

the

VAX-11/78¢

CPU

microprocessor
a

terminal
interface

cabinet.

The

(11/83),

and two
(CIB),
console

serial
and
a
program

includes
a
console
command
language
and
the
software
utilities
that
provide
operator
console
functions.
These
functions
are
required
for
VMS
and
diagnostic
support.
The
paragraphs
that
follow

for

introduce

detailed

the basic console
functions.
Refer to Chapter
description of the console command language.

1.9.1
Console Terminal Modes
The
console
terminal
serves
as
and

operating
In

VMS

operator

modes:

console

the

kernel

I/0 mode,

console
test

the

panel

functions.

the

terminal.

console
The

program's

console

I/0O mode

and

terminal

serves

functions,

CPU

debug

this

mode

1-20

program

console

I/O

the

I/0

program

device

has

two

mode.

operator

interface

functions,

CPU
not

terminal

and
input is

Passed

the

VAX

interpreted
invoked.

I/O

program

terminal.
the

All

ISP-level

the

1ISP-level

LSI-11,

mode

terminal

software.

and

the

terminal

input

software.

All

appropriate

terminal

console

serves

passed,

character

and

CPU

clock

controls,

and

elements.

display

1.9.2.1

Program

setting

Control

The

certain

console

logic

defined

ISP-level
program

instruction

counter,

addition,

the

execution

well

console

with

a
specific
file
instruction execution

VMS

character,

operator

can

through a
ISP-level

include
and

modification

initialize

state.

terminate

available

point

the

can

specified

instruction

the
system load
device,
and
initiate
predefined address after the load. The

ISP

Main

CPU

the

system

CPU

I/0

instruction

memory,

I/0,

elements:

general

byte,

registers

space:

(R@--R13,

longword

processor

registers:

byte,

word,

SP,

internal

accessed,

1longword,

quadword

PC),

quantity

space:

word,

longword

and

processor

quantity

quantities

depending

bus

VAX-11/788
V
Bus
(Visibility
Bus)
channels
displayed
(V Bus channels are read-only)

VAX-11/780

data

registers:

main

(WCS)
can be
floppy disk.

length
longword

memory

loaded

from

1-21

console
in
the

and

The
address
spaces
can
quantities specified below:

the

memory

execution.

general,

space.

memory

level

main

quantities

from

including

the

bootstrap

Memory Element Display and Modificati
on -- The
display
and
modification
of
memory
elements

VAX-11/780

can

1.9.2.2
allows

execution.

can

stop

CPU

initiate

console

also

are

to
checking,
etc.
is performed
transparent
to
the
VAX-11/780
the software is passed directly

1.9.2
Console Panel Equivalent Functions
The functions in this group are those
normally
traditional
console
panel.
These
functions

program

validity

by
VMS.
The
console
program
is
software. All terminal output from
to the console terminal.

memory

input

functions

quantity

and/or

files

Writable

the

Control

console

can

Store

subsystem

controlled by the
1.9.2.3 Clock Control -- The CPU clock canforbe use
in hardware or
k mode
console to provide single step cloc
e
modes available 1include singl
software debugging. The control cycl
e step, and single SBI time

instruction step, single SBI bus
step modes.

state

ams to execute
Single instruction step mode allows ISP-level progr
CPU to enter the

causes the
one instruction at a time. This mode tion.
halt state after the instruction execu

s the CPU clock to stop each
Single SBI bus cycle step mode cause
ted. TO remains asserted until

time SBI time state @ (T®) is asser
causes the clock to resume
a control signal from the console next
SBI T#@.
operation. The clock ticks until the

causes the CPU clock to assert and
Single SBI time state step mode or
T3) until a control signal from

hold a time state (T¢, T1l, T2,
held.
the console causes the next time state to be asserted and
1.9.3

Console Control Functions

ol of numeric radices,
The console control functions allow contr
provide for displaying
and
th,
leng
addressing modes, ands. data
Functions are also provided that repeat
console and CPU statu
ands into a single executable
commands and 1link multiplethe comm
console provides a means to control
command list. In addition,
acters
the number of fill characters to be added after special char
are sent to the console terminal.

specification of
Default Settings -- The console allows inpu
t and output,
s, radix of numeric
defaults for addressing mode
Any default
and the data length of addressable memory elements. ole
command.
1.9.3.1

setting can be overridden within the context of a cons
a.

wvirtual,
The default addressing modes can be set , for
physical, ID Bus, V Bus, general register or internal
(processor)

C.
d.

and output can
Default radices for console numeric inputradi
x.
be set to octal, decimal, or hexadecimal

Defaults for memory element data lengths can be set for

byte, word, longword, and quadword.
Power-up defaults -Address
x
Radi

Data

Physical

Type

Hexadecimal

Longword

Length

1-22

(32 Bits)

1.9.3.2
display

Status
CPU and

Displays
-The
console
provides
a
means
to
console subsystem status. The CPU status includ
es

the stop/run state of the
instruction set processor,
the current
clock step mode,
and
the
state
of
the
Stop
on
Microbreak
Match
Enable
(SOMM).
Console
subsystem
status
includes
the
current
setting of all
console defaults
and
the
number of
terminal
fill
characters.

1.9.3.3

Command

facility

that

executable

Linking

allows

1list.

and

Repeating

The

commands

multiple

Commands

console

linked

provides a
a single

into

1linked

are

entered

allows

the

diagnostic

into

user

internal console queue. The console operator can specify
execution
of
the command
gqueue one
pass
at
a
time.
Or,
the
queue may be

executed
Create

continuously.

short

debugging
The

facility
CPU

and

also

facility

console

provides

command

execution

This

operations.

console

single

routines

commands

facility

1list

continues

until

terminated

allows

maintenance

subsystem

logic

invoked

Once

use

hardware

continuously

commands.
personnel

for

the

execute
a
initiated,
command

operator.

scope

console

the

The

repeat

operation

commands.

1.9.3.4

Real-Time Delays -- The console provides a
facility for
introducing
real-time
delays
of
varying
duration
between
the
execution
of
console
commands
linked
with
the
command
linking

facility.

the

This

console's

function

has

processing

effect

the

command

queue.

The

console

commands

complete

(e.g.,

that
invoke CPU
initialization).

delay

facility

1-23

next
is

the

CPU,

sequential
provided

functions

which

but

only

command
for

use

require

delays
in

the

after

time

This

chapter

command

are

describes

facilities.

included.

Also

CONSOLE

PROGRAM

AND

console

command

language

the

Where

appropriate,

included

are

examples

all

2.1
The

PROGRAM OVERVIEW
paragraphs provide a basic
modules.
Note that the services

are

contained

the

LSI-11

ROM

provides
services
for
console
microdiagnostic
execution,
VMS

2.1.1

error

Getter
functions of this

from
the
provide
a

console
terminal
check
point
(or

(console

null

program

which

overview
provided

and

of
by

RAM.

the
the

console
console

The

console

interface,
and
remote

Command

basic

module

are

to retrieve a command line
command
1line
routine),
and
1loop
for
the
console
program

(get
wait)

loop).

spends

the majority of
its
time
in
the
null
loop,
of a series of test points and conditional
branches
bootstrap
initiated,
VAX-11/784 CPU halted,
etc.).
Should

consists

(e.g.,
any

usage

console

control,
operator
support
functions

diagnosis.

The

associated

command

CONSOLE
following

software

The

and

applicable

messages.

CHAPTER 2
DESCRIPTION

CONTROL

these

functions

performs

a branch to the
initiated by that flag.

active

(i.e.,

flag

set)

the

program

the

request

routine

required

Parser and Parser Tables
parser
module
decodes
the
terminal
and
provides
a
pointer

command

typed
on
the
console
appropriate
routine
to

service

2.1.2

The

eéxecute

the

condition

command.

for

The

parser

decoding

checking

the

manipulates

(e.g.,

the

discarding

command

leading

for a delimiter in the command input string
). The
is
decoded
through
a
set
of
syntax
check
trees
that
pointers to the appropriate execution routin
e within the

execution

module.

set

tables

Any

data

included

required

part

for

the

command

line

blanks

execution

and

command
provide
command
has

been

parser.

2.1.3
Command Executor Module
The command execution pointer
from

the
parser
is
passed
to
the
command execution module entry point. This
entry point provides a
pointer
(i.e.,
starting
address)
to
the
appropriate
command
execution routine
(e.g.,
DO BOOT,
PERFORM QUAD CLEAR).
The basic
sequence

module

Apply

data

action

switches

is:

defaults

length.

Execute

Test

for

command

routine.

repeat

function.

for

radix,

address

space,

and

repeat

function

specified,

routine

the

monitors

console for the control character (°C) required to terminate the
loop.

The module also supplies the required subroutines to support the

execution functions (e.g., open a file, load a file). Following
control

command

execution,

2.1.4

Additional Services

passed

within the command getter module.

loop

null

console

the

In addition to the command decoding and execution functions,
console provides several other services.

remote

Remote support is provided to allow console access from a

terminal

computer.

The

facility also

enables communication

between local and remote operators, as well as transfer of console
control between local and remote operators.

services

These

VMS services are also provided.

routines

include

for terminal support and the associated drivers, as well as a file
service for the floppy drive and its associated drivers. The code
for some of these services is contained in the ROM as well as the

RAM. These services are provided through emulator traps.

The console software also includes the basic LSI-11 processor and
p,

memory tests, that are executed on each power-up and bootstra
and the primary bootstrap routine for the floppy.
2.2

COMMAND TERMS AND SYMBOLS

Table 2-1 provides a summary of terms and symbols used to describe

the syntax of the console

Table 2-1
Term/Symbol

< >

commands.

Term and Symbol Definitions
Definition

Used to denote a category name

e.g.,

a valid

OR
Exclusive
the
indicate
ters
parame
of
ion
select
(i.e.,
command line). For example,

<A>1<B> means

()

Used

[ ]

is to be

syntactic
be

(label)

represents

address

to
Used
operation
within a
both

name

category

numeric

count

indicated

occurrences

Represents

<data>

Represents

numeric

argument

Represents

command

modifier

<input

Represents

the

prompt>

>>>

Console

DS>

address

program

from

argument

console's

(switch)

input

prompt

string

input

prompt

Diagnostic

supervisor

prompt

<CR>

Represents

console

terminal

carriage

<LF>

Represents

console

terminal

line

Delimits

command

from

its

character

return

feed

qualifiers

Used

separator

within

list

Used

separator

within

command

3-5

the

XYZ

line.

Command Description Segments

3.4.2

Each supervisor command description is divided into three, four,
or five descriptive segments, depending on the particular command.
The descriptive segments are:

command

the

describes

structure.

Syntax:

Command description: a brief paragraph describing command

operation, general restrictions, or available options.

description of the console program response

Response:

Qualifiers: a list of applicable command modifiers.

Options: a list of applicable command options.

the

specified

command.

use the terms and symbols defined

The descriptive segments
3-1.

Table

that

Note

terminated with a <CR>.

command

every

Command Abbreviations

3.4.3

Supervisor

command

words,

must

arguments

may

command

(or

and

switches,

1in

line)

abbreviated by typing only enough characters to uniquely identify

each item. For example, the load command can be specified by L,
while the start command requires a minimum entry of ST.
3.4.4

The

Command Overview

supervisor

commands

operator

following

groups:

Load/test

sequence

the capability of

control:

provides

the

three

operator

with

into

divided

are

the

and sequencing diagnostic

programs.

Execution control: provides the operator with control of

the operational characteristics of the diagnostic program

and/or supervisor

Debug/utility functions: provide the operator with debug

and

utility

deposit,

The

such

supervisors

width,

3.5

supervisor.

as:

functions

such

support

operator

breakpoints,

examine,

etc.

also

fill,

provided by the console
the

(e.g., looping, error reporting, etc.).

etc.

(e.g.,

terminal

addition,

Control C)

SEQUENCE CONTROL COMMANDS

all

characteristics

control

functions

are also supported by

The program/test sequence control commands provide the operator
with the capability of loading and controlling the sequencing of
diagnostic programs, as well as the capability of controlling the

sequence

test

execution

within

program.

The

supervisor

also

provides for the execution of a single subtest, and if the
count option is used, provides a loop-on-subtest capability.
command

allows

predefined

The

submit

the

operator.

performing

the

test

session

Note

that

following

the

unit

entire
The

diagnostic

supervisor

without

operator

argument

defined

:[UIC]

<file

test

session

then

capable

assistance.

spec>

used

the

as:

filename

ext

Load Command

3.5.1
Syntax:

The

symbolic

subsection
dev

pass

LOAD

1load

memory.

<file

spec>

command
The

[/PHYSICAL

causes

supervisor

the

<address>]

specified

obtains

file

sufficient

<CR>

1loaded

information

from

1into
the

program,

After

successful

message:

Progname
the

The

load,

Progname-r.p

the

is the program name.

supervisor

extracts

--r.p

the

release

number

the

program.

optional

supervisor

prints

out

the

following

internal

name which

LOADED.

from

This
the

version

is the

program

number

header

and

section.

the

DEPO

(patch)

to load the
<address>.

PHYSICAL switch directs the
image loader to attempt
program into physically contiguous memory starting at
The
<address>
argument
1is
normally
accepted
in

hexadecimal

format

3.5.2

Start

Syntax:

START

[:<last>

!/SUBTEST

The

start

default.

Command
[/SEC
:

command

<section

<number>]

causes

the

As execution
the operator

begins,
the
to determine

which

units

are

optional.

The

SECTION

test).

switch

The

]

TEST

program

command

program

switch

<first>

the

used

[/PASS
in

[/TEST

<count>]

memory

<first>]

<CR>

begin

execution.

supervisor enters
into a dialogue with
the program specific parameters.
(e.g.,

two

and

switches

specific

with all programs. When a section
it contains will be executed.

The

name>]

and

not

available

only

different

arguments

supervisor sequentially passes
through <last> inclusively.

3-7

certain

selected,

distinctly

<last>

and

are

control

the

arguments

for use

tests

that

ways.
specified,

tests

the

<first>

the

If
the
<Kfirst>
arqgument
1is
combined with
the SUBTEST
switch, program execution begins at the beginning of the
<first>
test
and
terminates
at
the
end
of
SUBTEST
<number>.
SUBTEST

switch

used

conjunction with

the

PASS

switch,

the operator is provided with a loop-on-subtest capability.
optional PASS switch is not specified, a default <count> of

If the
one is

assumed.

the

are

TEST

switch

executed.

not

specified,

only

the

<first>

all

tests

within

the

argument

specified

TEST switch, the <last> argument is assumed
highest numbered test within the program.

default

3.5.3

Syntax:
[:<last>

Restart

Command

RESTART
[/SEC:
<section
! /SUBTEST : <number>]] --

program

with
to

the
the

name>]
-[/TEST
:
<first>
[/PASS : <count> ] <CR>

The restart command is similar to the start command; however, the
supervisor does not enter into the parameter retrieval dialogue.
This

command

previously
to

the

requires

setup

start

with

command

that

the

program

start

command.

P-Tables

Switch

syntax

have

-- [/TEST
<count>]

The

and

sequence.

command

1is

equivalent

(Refer

Paragraph

optional

switches.)

3.5.5

Control

Table

3-2

characters

identical

switches.

3.5.4
Run Command
Syntax: RUN<Kfile spec> [/SEC: <section-name>]!
[ : <last>! -- /SUBTEST : <number> 1]
[/PASS :
run

been

Characters

contains

recognized

and

1load

3.5.2

for

Special

Characters

description
the

supervisor.

the

start

description

control

and

<first>

command

the

special

Table

3-2

Control/Special

Character
Control

Character

Descriptions

Description

(°C)

Returns

program

control

the

supervisor

which
enters
a
command
wait
state.
The
operator may then issue any valid supervisor
command.
Control

(70)

Suppresses

console

enables

terminal

(on

output.

toggle

Console

basis)

terminal

output

is always enabled at the next console
terminal
supervisor
input
prompt.
However,
the
supervisor
will
override
~“0
and

reinstate

operator

terminal

system

active

errors,

output
when

status

the

servicing

CLI

prompts,

line

terminator

forced

messages.

Control

("U)

“U

typed

deletion
"last

before

characters

line

all

termination.

The

causes

the

entered

since

the

console

echoes:

“U/<CR><KLF>
Rubout

Typing

typed

rubout

entered

the

since

deletes

1input
the

the

1line.

last

line

be
rubbed
out.
Several
deleted
1in
sequence
by

1last

Only

character

characters

terminator

can

characters
can
be
typing
successive

rubouts.
The
backslash
(\)

first
rubout
echoes
as
a
followed
by
the
character

which

has

deleted.

cause

only

been
the

deleted

Subsequent
character

rubouts
to

echoed. The next character typed that is not
a rubout causes another
(\)
to be printed,
followed by the new character to be echoed.
Carriage

3.5.6
Syntax:

Return

(CR) | Terminates

command

line.

Continue Command
CONTINUE

<CR>

The

continue
command
causes program execution
to
resume
at
the
point at which the program was suspended. This command is used to
proceed from a breakpoint, error halt, or Control C situation.

3.5.7
Syntax:

The

Summary Command
SUMMARY

summary

report

code

<CR>

command causes the execution of the program's
section which prints statistical reports.

3-9

summary

3.5.8
Syntax:

The

Abort Command
ABORT <CR>

abort

control

command executes

this point
continue.

3.5.9

Syntax:

the program's cleanup code

the

operator

may

Submit Command

issue

any

command

[/LOG

spec>

SUBMIT <file

and

returns

which enters a command wait state.

supervisor,

the

except

restart

ON!

OFF]

script

file

[/CONSOLE

OFF]

<CR>

The

from

submit

any

functions

command

outlined

script

the

supervisor

the

script

file

read

supervisor

The

device.

console.

the

the operator

The

causes

file-oriented

and

then

considered

control

commands,

including

a submit command within a script file

However,

terminal

the

performs

returns

file may contain any valid operator

submit command.

command

(i.e.,

the

supervisor

will

the current script and log files and open new ones as specified by

the

current

command).

If the LOG switch is specified as ON, a transcript of the

indirect

terminal dialogue is maintained in a file of the same filename as

the script

file with an extension of

.LOG on

the device where the

script file is located. The default for this switch is OFF.
If

the

CONSOLE

generated
terminal.

3.6
This

switch

The default

for

script

the

specified

this

switch

EXECUTION CONTROL COMMANDS
group of commands allows the

dynamically
diagnostic

implemented

alter

program

the

operational

that

reside

and/or

flags

the

ON,

the

printed

file

terminal

the

dialogue

operator's

ON.

operator

statically

supervisor.

These

the

functions

are

characteristics

in both the supervisor and the

program. The event flags are located within the diagnostic program
and are supported by VMS and the supervisor.
These commands are

used

to control

the printing

error messages,

ringing the bell, halting and looping of the program, etc. Flags
type of
which
supervisor
the
to
indicate
are provided that
operator
The
operator.
the
by
dialogue characteristics are desired
also has access to a subset of the event flags that are available
to

program.

the

3.6.1

Syntax:
This

Set Control

SET

[FLAGS]

command

sets

Flag

Command

<CR>

the

execution

control

flags

specified

<argument list>; no other flags are affected. <argument list> is a

string of flag mnemonics separated by commas. The applicable flags
are described

Table

3-3.

3-10

Table

Flag
HALT

3-3

Control

Flag

Descriptions

Description
Halt

error

detection.

When

the

program

detects a failure,
with this flag set,
the
supervisor enters a command wait state after
all
error
messages
associated
with
the
failure have been output.
The operator may
then
continue,
restart,
or
abort
the
program.

LOOP

This

LOOP

flag.

Loop

flag

error.

takes

When

precedence

set,

this

over

flag

the

causes

the program to enter a predetermined scope
loop on
a
test
or
subtest
that
detects
a

failure.
Looping

will

returns

operator

and
BELL

continue

the

may

then

continue,

Bell

When

the

continue,

restart,

error.

cause the
operator

until

supervisor

clear

abort

set,

operator
“C.
The

using

the

flag

will

the

this

program.

supervisor to output a bell to the
whenever
the
program
detects
a

failure.
IE]l

Inhibit
this
except

or
IE2

messages

suppresses

those

that

are

level

all

error

forced

When

set,

messages

the

program

supervisor.

Inhibit error messages at level 2. When set,
this
flag
suppresses
basic
and
extended
information concerning the failure. Only the
header
lines)

IE3

error

flag

information message
(the first
1is output for each failure.

Inhibit error messages
this
flag
suppresses

level

When

three

set,

extended

information
concerning the failure. The header and basic
information
messages
are
output
for
each
failure.
IES

Inhibit

summary

suppresses
QUICK

Quick
to

verify.

the

quick

report.

statistical
When

program

set,

that

verify mode

When

set,

this

flag

report messages.

the

this

flag

operator

operation.

indicates
desires a

Table 3-3

Control Flag Descriptions (Cont)
Description

Flag

List

SPOOL

printer.

When

printed
actually
not
(not
file on disk
a

but
yet

messages

error

line

this flag causes the supervisor to
set,
line
direct all program messages to the
the
environment,
VMS
the
In
printer.
are
messages
into
entered
implemented).

Report the execution of each test. When set,

TRACE

this

causes

flag

supervisor

the

report

the execution of each individual test within
the supervisor dispatches to

the program as

that

test.

Lock in physical memory. When set, this flag

LOCK

disables the program relocation function.
Self-relocating programs are then locked
into their current physical memory space.

Operator

OPERATOR

When

present.

flag

this

set,

indicates to the supervisor that operator
interaction is possible. When cleared, the

takes

supervisor
ensure

the

that

appropriate
session

test

actions

bypasses

tests that require manual intervention.

any

Display long dialogue. When set, this flag

PROMPT

indicates

operator

defaults

wants

for

the

all

supervisor
see

the

questions

that

the

1limits

printed

and

program.

All flags in this list.

ALL

Clear Control Flag Command

3.6.2

Syntax: CLEAR [FLAGS]

The clear command clears the flags specified by <argument list>;

no other flags are affected. The <argument list> is a string of
flag

mnemonics

separated

described in Table 3-3.

3.6.3

Syntax:

by commas.

The

supported

arguments

are

Set Control Flag Default Command

SET FLAGS DEFAULT <CR>

This command

returns all

flags to their

initial default status.

The default flag settings are OPERATOR and PROMPT.

3-12

3.6.4

Show Control

Syntax:

SHOW

FLAGS

Flags Command

<CR>

This

command causes the display of all execution
control flags and
their
current
status.
The
flags
are
displayed
as
two mnemonic
lists: one for set flags, one for clear
flags.

3.6.5
Syntax:
This
no

Set
SET

Event
EVENT

command

other

Event

sets

event

of
flag
optional

The

<argument

event

are

services

flags

that

are

set

and

numbers

two

3.6.6

Clear
CLEAR

This

EVENT

are

for

simultaneous

causes

the

breakpoints

and/or

modified

image

occur

3.7.1
Syntax:

list>;

is a string
commas.
The

supervisor

clusters

means

flags

provide

event

each.

pProgram

use.

Number

used

Flags Command
[FLAGS]

<argument

display

set.

examine

the

signaling

3.7
DEBUG AND UTILITY COMMANDS
This group of commands provides the
alter
diagnostic
program
code.
The

all

list>

ALL

<CR>

specified
by
<argument
The optional ALL may be

Show Event Flags Command
SHOW EVENT [FLAGS] <CR>

command

Another

flag clusters.
Event flags are
@g--63.
However,
flags
24--31
are
The
operator
has
the
capability
to
flags 1--23.

clear

32--63

Event

and

clears
those
event
flags
other event flags are affected.
instead of <argument list>.

currently

need

<CR>

<argument

command

list>; no
specified

3.6.7
Syntax:

ALL

event

numbers
by
VMS.

supervisor.

This

specified

The

provided

located

provides

by
the
for
use

interactively

Syntax:

list>

flags

affected.

synchronization

Event

specified
restricted

the

those

flags

supervisor

Note

Command

numbers
in
the
range
1--23,
separated
by
ALL may be specified instead of <argu
ment list>.

intraprocess

flags.

Flags
[FLAGS]

the

can

written

only

feature

the

allows

Base
BASE

the

Program

once.

program

Set
SET

within

modify

the

error

operator

messages.

Command
<address>

<CR>»

3-13

the

event

flags

operator with the ability to
supervisor
allows
up
to
15
program. The operator can also

image

list

load

memory.

device

Optionally,

that

unconditionally

patching

list

any

This command loads the address specified into a software register.

This number is then used as a base to which the address specified
in

the

set

breakpoint,

clear

examine,

and

deposit

commands is added. The set base command is useful when referencing
code in the diagnostic program listings. The base should be set to
the base address (see the program link map) of the program section

referenced. Then the PC numbers provided in the 1listings can be
used directly in referencing locations in the program sections.
NOTE

address = physical address
Virtual
when memory management is
y)
(normall
turned off.

3.7.2

Set Breakpoint Command

Syntax: SET BREAKPOINT <address> <CR>

This command causes control to pass to the supervisor when program

execution encounters the <address> previously specified by this
maximum

simultaneous

command.

3.7.3

Clear Breakpoint Command

within the diagnostic program.

breakpoints

can

set

Syntax: CLEAR BREAKPOINT <address> ! ALL <CR>

This command clears

the previously set breakpoint at the memory

location specified by <address>. If no breakpoint existed at the

specified address, no error message is given. An optional argument

of all clears all previously defined breakpoints.
3.7.4

Syntax:

Show Breakpoints Command

SHOW BREAKPOINTS <CR>

This command displays all currently defined breakpoints.
Set Default Command
3.7.5
DEFAULT <argument list> <CR>
SET
Syntax:

This command causes setting of default qualifiers for the examine
and deposit commands. The <argument 1list> argument consists of a
data length default and/or radix default qualifiers. If both
qualifiers are present, they are separated by a comma. If only one

default qualifier is specified, the other one is not affected.
Default defaults are HEX and LONG. Default qualifiers are:
Data Length: Byte, Word, Long
Radix: Hexadecimal, Decimal, Octal

Examine Command
3.7.6
Syntax: EXAMINE [ <qualifiers>]

[<address>]

<CR>

The examine command displays the contents of memory in the format

described by the qualifiers. If no qualifiers are specified, the
default qualifiers set by a previous default command are
implemented. The applicable qualifiers are described in Table 3-4.
3-14

Table

3-4

Qualifier

Descriptions

Qualifier

Description

Address

points

byte

Address

points

word

Address

points

longword

Display

in hexadecimal

Display

in decimal

Display

octal

radix

Display

ASCII

bytes

radix

When

specified, the <address> argument is accept
ed in hexadecimal
format unless some other radix has
been set with the set default

command.

preceding

<Address>
PC,

Optionally,

the

may

address

also

one

3.7.7

Deposit
DEPOSIT

the

qualifiers

implemented.

The

the

examine

The

some

other

Optionally,

with

specified

by
immediately
30,
respectively.
R@--R11, AP, FpP, SP,

following:

Command
[

The command accepts data
specified by <address> in
If

PSL.

Syntax:

may

argument

are
and

argument

radix

has

writes

the

format

described

specified,
in

accepted

been

the

qualifiers

described

<data>

and

applicable

command

]

set

into

Table

with

the

memory

default

are

<CR>

the

qualifiers

identical
3-4.

hexadecimal
the

set

location
qualifiers.

those

format

default

unless

command.

<address>
may
be
specified
as
decimal
or
octal
immediately preceding <address> with %D or
30, respectively.

3-15

are

CHAPTER 4
MICRODIAGNOSTIC

DESCRIPTION

4.1
The

MICRODIAGNOSTIC PROGRAM OVERVIEW
microdiagnostic
programs provide module
isolation
for
logic
failures
within
the
CPU,
floating-point,
and
MDS
memory
controllers.
All detected
failures
result
in an error
printout

indicating the module,
or smallest set of
microdiagnostics can isolate the failure.

modules,

The

major

microdiagnostic

console

adapter

package

consists

two

Hardcore

Microtest

Monitor

that
--

Monitor

monitors,

test

the

divisions:

division.

Console

Adapter

-- Microtest

and

Hardcore

the

selection

microdiagnostic

and

execution

Program

Both test division monitors are serviced by the
microdiagnostic monitor.
In addition to loading
operator

test

which

and hardcore, and microtests.
Each test division
by
an
associated
monitor
that
provides

is
controlled
non-diagnostic services

microtest

console-resident
the hardcore and

monitor

options

allows

(Paragraph

4.6).

the
1In

order to reduce the address space required to execute the hardcore
and microtest programs, the common code of both programs has been
incorporated into the microdiagnostic monitor.
That code, which
is unique to either
the hardcore
tests or microtests,
has been

incorporated

The

into

the

associated

monitors.

microdiagnostics

reside
on
diskettes
for
the
floppy drive.
basic
test
sequence
is:
1)
hardcore
tests,
2)
microtests.
hardcore
tests
verify
the
operation
of
the
minimum
1logic
required to
reliably execute the microtests.
The minimum 1logic
consists of the basic hardware elements required for data transfer
and error reporting.

The
The

The

code,
data,
and
structure
required
by the
microdiagnostics
prohibit them from being resident in the LSI-11 address space at
any one
time.
The
hardcore
tests
are
executed
out
of
a
small

buffer
of the

4.2
With
can

area in the LSI-11 memory.
WCS of the VAX-11/780 CPU.

The

microtests

are

executed

BASIC PROGRAM EXECUTION
the console program resident (in LSI-11 memory), the
execute the entire microdiagnostic package by issuing

command.

The

console

program

overlays

itself

out

operator
the test

with

the

microdiagnostic monitor from the console floppy.
(However,
the
floppy and terminal software drivers are not overlaid since they
provide utility service to each of the monitors.)
In

turn,

monitor

the

into

tests

are

LSI-1]1

memory.

monitor

microdiagnostic

the

then

notifies

LSI-11

executed
On

memory

from

transfers

the

floppy.

sequentially

completion

the

monitor

the

microdiagnostic
4-1

out
of
hardcore

monitor.

the

The

hardcore

the
buffer
in
the
tests, the hardcore

The

microdiagnostic

monitor, in turn, transfers the microtest monitor into the LSI-11
memory
(from
floppy).
The microtest monitor
then
executes
the
microtests out of the WCS in approximately 1K microword overlays.
On
completion
of
console program.
Figure
Note

4-1
that

memory;

the

microtests,

illustrates
items

those

e.g.,

the

control

1is

returned

the

program
residency
in
the
LSI-11
memory.
on
a
horizontal
line
are
exclusive
1in

console

program

may
be
resident,
but
not
both.
floppy and
terminal drivers
(and

the

microdiagnostic

monitor

As
previously mentioned,
the
software bootstrap)
are always

resident.
4.3
BASIC TEST STRATEGY
The basic test strategy is to transfer data from a test source and
load it into the logic element under test.
The next step is to
retrieve
the
data
from
that
element
and
compare
it
with
the

original data loaded.
Depending on the test requirements, logic
element structure, and functional location, the retrieved data may
or may not have a true compare.
In either case, the fail/no fail
decision is based on the expected results.
In some tests,
the
same logic is tested using an array of data patterns.

HARDCORE
TEST STREAM

OVERLAYS

1
l

MICRO-CODE
BUFFER

HARDCORE

MICRO-TESTS

MONITOR

MICRO-

WCS

DEBUGGER

CONSOLE

DIAGNOSTIC
MONITOR

FLOPPY &
TERMINAL

DRIVERS
TK-0754

Figure 4-1

LSI-11 Memory Program Residency

4-2

essential

reporting
an

error-free

a
test
is
microdiagnostic

the

data

simplified

that

true

the

are

test strategy that the basic load and error
initially tested for reliable operation.
In

situation,

when

test,

paths

the

completed.

microdiagnostic

the

can

notify

case

the

of error detection,
can identify for the user:
the failed module
pattern used, and the expected test result.

test

compare

procedure
is

not

illustrated

necessarily

the

Figure

expected

4-2.

result.

(s )
GENERATE TEST

DATA, WRITE
TO REGISTER
y

READ REGISTER
COMPARE DATA

DISPLAY:
YES

TEST 1.D.

TEST DATA
RESULTS

NEXT
TEST

HALT
OR

REPEAT TEST

OR
NEXT TEST
TK-0779

Figure

4-2

Simplified

Microdiagnostic

4-3

Test

Procedure

user

the

and

Note

HARDCORE TEST DESCRIPTION

4.4

The hardcore tests are the initial set of microdiagnostic tests

executed. Paragraph 4.4.1 describes the hardcore test structure.

The hardcore tests initially check the control and data registers

of the Console Interface Board

the VAX ID Bus.

(CIB). This ensures test access to

After the CIB tests, the clock board is tested.

The clock is turned on and off, single-stepped, and certain clock
function status is retrieved over the Visibility Bus (V Bus).
The next element tested

is the microsequencer.

For

example,

data

is transferred onto the microstack and then retrieved. An address
is placed on the microstack. The maintenance return feature is

then used to pop the address off the microstack and load it into
the micro PC.
small

This allows the microaddress paths to be tested

segments.

shown

the

Figqure

4-3,

path.

Generally,

remainder

sequence tests WCS, PROM Control Store
data

parity checking tests.

these

the

hardcore

test

integrity

and

(PCS), and basic elements

are

address

The WCS is tested by writing a variety of

address and data patterns to it, and checking for good parity, or
forced bad parity.

The basic elements of the data path are tested by writing data to

certain

results.

registers,

reading

retain expected data.

Logic

Unit

that

data

back,

and

comparing

the

The data path is tested for its ability to transmit and
(ALU)

The basic capabilities of the Arithmetic

to transfer and compare data

are

tested.

The

scratch pads are also tested for retaining data; the scratch pads
are used to hold error data in the case of error detection.

4-4

CLOCK
START/STOP

STATUS

uUsC
ADDRESS PATHS
TRAPS, ECO’'S

STACK

MAINT. RETURN
HARDCORE

TESTS

WCS

DATA REGS
CONTROL/STATUS

PARITY GEN.
ADDRESS INTEG.

ID BUS

DATA INTEG.

CLOCK CONTROL

PCS

PARITY CHECKER

ADDRESS INTEG.

DATA
PATH

D BUS

Q& D REGS.

SCRATCHPADS
ALU
ZERO BRANCH
‘TK-0751

Figure

4.4.1

Hardcore

Because
tests

are

1.5K

the

4-3

Test

Hardcore

LSI-11

memory

sequentially

loaded

from

buffer

the

LSI-11

implemented
using
special
instructions are actually
produces

table

and

operand

addresses.

The

hardcore

monitor

pointer

into

the

operands,

the

code

perform

Implementing
functionality

the

Based

calls

address

the

floppy

memory.

space,
and

The

parameters

software

hardcore

subroutines

operation

that

PC
that

required

out

tests

are

codes

effect,

the op codes

are

written

test
code
in
this
manner
allows
to reside in a small address space.

4-5

hardcore

The
pseudo
where
each

resemble

which,

the content

the

executed

pseudo
instructions.
functional
statements,

contains

tables.

monitor

Sequence

Structure

limited

byte

statement

Test

and

PDP-11

specific

test.

large

test

Pseudo Instruction Description

4.4.2

instructions

defines

statement

the

describe

paragraphs

following

The

their

and

symbols

formats.

the hardcore

formats.

statement

associated

Table

describing

1in

wused

abbreviations

pseudo

test

4-1

the

Instruction Symbol/Abbreviation Definitions

Table 4-1
Item

Definition

< >

Used to denote a category name or argument within
functional statement, e.g., <SCR ADDRESS> represents

[ ]

valid

source

Used

that

a
a

address.

that

indicate

optional,

part

statement

functional

INDEX>],

ADDRESS

[<KWCS

e.g.,

represents an address index value that may or may not be
specified depending on the functional statement.

Used

SCR

Abbreviation

psST

Abbreviation for destination.

I,J,K

Legal

functional

Each

pseudo

description

index

for

within

divided

1into

source.

names.

instruction

description

two

The format segment describes the statement

the symbols defined

arguments

statement.

descriptive segments.
format using

category names

separate

’

Table

instruction

The

4-1.

a brief paragraph describing general command

Each instruction description

operation and the available options.

is preceded by the instruction mnemonic in boldface type.
BLKMIC

BLKMIC

<SCR ADDRESS>, <SCR INDEX>, <WCS ADDRESS>,

<WORD COUNT>,

[<KWCS ADDRESS INDEX>]

Move the <WORD COUNT> number of 96-bit microwords from the <SCR

ADDRESS>,

indexed

<SCR

INDEX>,

WCS

the

starting

<WCS

If an <SCR INDEX> is

indexed by <WCS ADDRESS INDEX>.

specified, the <SCR ADDRESS> is indexed by six PDP-11 words (i.e.,
96 bits).

the

<WCS

ADDRESS>

starts

with

alpha

character,

the

<WCS

ADDRESS> is used as a pointer to a table in the test data area of
the test. Otherwise, it is used as a physical WCS address.

For example,

if the current value of the

index is

(<SCR

INDEX> * 6) would be added to the <SCR ADDRESS> to find the first
96-bit microword to load into the WCS.
4-6

CHKPNT

[<PASS

ADDRESS>],

[<KFAIL

ADDRESS>]

the error flag,
set during a compare
instruction
(see CMPXXX
instructions),
is zero,
go to the <PASS ADDRESS>.
If the error
flag is not zero, go to the <FAIL ADDRES
S>.
TIf neither a pass nor
a fail address is specified, go to the next instruc
tion in line.

The

address

appear

the

typed

line

instruction
named

TRACE

typed.

(Figure

These

addresses

4-14).

CLOCK

CLOCK
Step

<TIMES>
the

system

<TIMES>

1is

executed

for

clock

<TIMES>

integral

each

four

number

single

four,

time

single

bus

<TIMES>.

states.

cycles

are

CMPCA
CMPCA

[<MODE>],

Compare

the

SREGISTER>

<REGISTER>,

contents

with

the

ADDRESS>,

indexed

generally

EQUAL.

the

comparison

argument

not

ADDRESS>,

the

console

contents

by
If

<DST

left

ADDRESS

blank,

false,

specified,

the

default

the

ADDRESS

location

INDEX>.

the

set

[<DST

specified

by
<DST

The

<MODE>

argument

for

<MODE>

error

defaults

INDEX>]

flag.
EQUAL.

EQUAL.

the

<MODE>

If the <REGISTER> argument is specified as
IDREGLO or IDREGHI,
register used
in the comparison is the ID Bus register that
read in the most recent READID instruction.

the
was

CMPCAD
CMPCAD

[<KMODE>],

<REGISTER>,

<DST

ADDRESS>,

[<DST

ADDRESS

Compare
the
contents
of
the
console
registers
<REGISTER>
and
<REGISTER>+2
with
the
contents
of

specified

<DST

ADDRESS

INDEX>.

comparison

the

argument

not

ADDRESS>

and

false,

specified,

<DST

set

the

defaults

ADDRESS>+2,

error
to

flag.

EQUAL.

INDEX>]

specified

the

indexed

the

<DST

<MODE>

If the <REGISTER> argument is specified as IDREGLO
or IDREGHI,
register used
in the comparison is the ID Bus register that
read in the most recent READID instruction.

4-7

location

the
was

CMPCAM

[<MODE>], <REGISTER>, <MASK ADDRESS>, [<MASK ADDRESS

INDEX>], <DST ADDRESS>,

[<DST ADDRESS INDEX>]

Take the content of the console register specified by <REGISTER>,
mask it with the content of the <MASK ADDRESS>, indexed by <MASK
ADDRESS INDEX>, and compare it with the content of <DST ADDRESS>,
indexed

by <DST ADDRESS

INDEX>.

If the comparison is false, set the error flag.
argument is not specified, it defaults to EQUAL.

<MODE>

the

If the <REGISTER> argument is specified as IDREGLO or IDREGHI, the
register used in the comparison is the ID Bus register that was
read in the most recent READIN instruction.

The mask is performed by taking the content of <MASK ADDRESS>,
and
1it,
complementing
INDEX>,
indexed by <MASK ADDRESS
it.
with
TER>
bit-clearing the contents of <REGIS
CMPCMD

CMPCMD

[<MODE>], <REGISTER>, <MASK ADDRESS>, [<MASK ADDRESS

INDEX>], <DST ADDRESS>,

[<DST ADDRESS INDEX>]

Take the content of the console registers specified by <REGISTER>
and <REGISTER>+2, mask it with the contents of <MASK ADDRESS> and

<MASK ADDRESS>+2, indexed by <MASK ADDRESS INDEX>, and compare it

with the contents of <DST ADDRESS> and <DST ADDRESS>+2, indexed by
<DST ADDRESS

INDEX>.

If the <MODE> argument is false, set the error flag.
<MODE> argument is not specified, it defaults to EQUAL.

the

If the <REGISTER> argument is specified as IDREGLO or IDREGHI, the
register used in the comparison is the ID Bus register that was
read in the most recent READIN instruction.

The mask is performed by taking the content of <MASK ADDRESS> and
<MASK ADDRESS>+2, indexed by <MASK ADDRESS INDEX>, complementing
it, and bit-clearing the contents of <REGISTER> and <REGISTER>+2.
CMPPCSV

CMPPCSV <DST ADDRESS>,

[<DST ADDRESS INDEX>]

Compare the content of the PC save register with the content of

the location specified by <DST ADDRESS>,
INDEX>.

indexed by <DST ADDRESS

If the contents are not equal, set the error flag.

ENDLOOP

Add

the

increment

the
the

current value of the
current
value
with

value

<INDEX

NAME>

(see

loop

instruction)

index specified by <INDEX NAME>.
Compare
the
last
value
(specified
in
the
1loop

instruction).
If the current value is less than or equal to the
last value, go to the instruction following the associated
(I, J,
or K)
loop
instruction.
Otherwise,
go
to
the
next
sequential
instruction.
ERRLOOP

ERRLOOP
Save

address

detected,

the

and

loop

execution

instruction

the

restarted

executed

instruction.

error

flag

this

saved

(Figure

4-11).

1is

set

error

(Paragraph

address

after

the

1is

4.6),

IFERROR

FETCH
FETCH

<WCS

ADDRESS>,

[<KWCS

ADDRESS

INDEX>],

ADDRESS> is a numeric string,
1location
specified
by
<WCS

to
the
ADDRESS

INDEX>.

execute

maintenance

content

<WCS

ADDRESS>,

indexed

the
by

NOP>
1is specified,
clear bit
7 of
(MCR) during the maintenance return.

ROM

NOP>]

execute a maintenance return
ADDRESS>,
indexed
by
<WCS

ADDRESS>

return

[<WCS

alphanumeric

1location

<WCS

the

string,

specified

ADDRESS

Machine

INDEX>.

Control

the

<ROM

FLTONE

<DST

Generate

bit

ADDRESS>,

32-bit

postion

NAME>,

and

ADDRESS>

word

all

zeros.

Insert

specified

the

current

value

load

and

this

word

into

the

logic

minus

1location

one

specified

the

<INDEX

<DST

<DST ADDRESS>+2.
FLTZRO

FLTZRO

<DST ADDRESS>,

Generate

bit

32-bit

position

NAME>,

and

ADDRESS>

and

word

all

logic

specified

the

current

1load

<DST

this

word

ADDRESS>+2.

into

the

ones.

value

Insert

minus

location

zero

one

specified

the

<INDEX

<DST

IFERROR

[<MESSAGE NUMBER>],

IFERROR

[<KFAIL ADDRESS>]

If the error flag is nonzero, type the PC of this instruction, the
Then, go
test number, subtest number, and the good and bad data.

to <FAIL ADDRESS>

if the HALTD flag

is not set

(Paragraph 4.6).

If the error flag is zero, or the <FAIL ADDRESS> is not specified,

instruction.

the next

INITIALIZE

Set and

clear

and

the

the CPU

initialize bit

in the MCR,

clear

the single

time state bit, set the single bus cycle bit, set the ROM NOP bit,
set

proceed

bit

the

MCR.

KMXGEN

<SRC ADDRESS>,

KMXGEN

Generate the KMUX address specified by the current value minus one
into the KMUX field of the
it
and load
<INDEX NAME>
of
ADDRESS>. <SRC ADDRESS> points
<SRC
by
microinstruction specified
to a six word table in the test data section of the test that
contains

the microinstruction.

LDIDREG

[<SRC ADDRESS INDEX>]

LDIDREG <REGISTER>, <SRC ADDRESS>,
Load the

ID Bus

indexed

by <SRC

the locations specified

ADDRESS

is the

by <SCR ADDRESS> and

INDEX>.

microstack,

microbreak,

content of <SCR ADDRESS> is taken to be 16 bits.
taken

<SCR ADDRESS>+2,

WCS

address,

the

Otherwise, it is

bits.

LOADCA

LOADCA <REGISTER>, <SRC ADDRESS>,

[<SRC ADDRESS INDEX>]

Load the console register specified by <REGISTER> with the
content of the location specified by <SRC ADDRESS>, indexed by
<SRC ADDRESS

INDEX>.

This instruction loads 16 bits of data.

4-10

LOOP
LOOP

<INDEX

Initialize

NAME>,

the

<START>,

loop

<END>,

parameter

[<SIZE

DEPENDENT>]

specified

value

the
for

the

ENDLOOP

instruction

<START>

<END>,

set

otherwise,

<INDEX

NAME>

the

specified by <START>.
Save the value specified by <END> for
ENDLOOP instruction.
Calculate and save the increment value

<END>

name

the

<SIZE

the

<INDEX

<END>

Otherwise,

leave

1less

increment

them

than

-1.

save

the

this

index

specified,

divide

following

NAME>,

the

set

value

DEPENDENT>
system,

with

the

equal

value

current

+1;

value

that

index

name.

and

larger

algorithm:

there

only one

<START>

and

WCS module

<END>

two.

it,

and

unchanged.
NOTE

The

tests

modules.

This

parameters

the

are

written

argument

for

two

WCS

allows

the

1loop

to be modified at run
only has one module.

system

time

MASK

<DST

ADDRESS>,

Take

the

content

bit-clear

the

<MASK

ADDRESS>

location

content

<MASK

location

ADDRESS>,

complement

with

it.

MOVE

<SRC

ADDRESS>,

[<SRC

ADDRESS

Move

the

content

<SRC

ADDRESS

INDEX>)

the

location

specified

INDEX>],

INDEX>

(indexed

ADDRESS>.

<DST

<SRC

ADDRESS

NEWTST

<TEST NAME>,

[<KTEST

DESCRIPTION>],

[<ERROR

DESCRIPTION>]

This

instruction

arguments.

instruction

for

creates

clears

the

looping

[<LOGIC

DESCRIPTION>],

test
error

header
flag

test.

4-11

[<SYNC

document

and

saves

for
the

POINT

the
PC

specified
the

READID

READID

the

Read

Bus

specified

content into locations IDREGLO and IDREGHI.

1load

and

the

RESET

Execute an LSI-11 reset instruction.
REPORT

REPORT <MODULE NAME STRING>

Type out

the module numbers of

STRING>.

NAME

the

microdiagnostic monitor.

HALTI

the modules

flag

1is

specified

set,

by <MODULE

return

the

SETPSW

" SETPSW <DATA>
the

Load

LSI

processor

with the value

status word

specified

<DATA>.
SETVEC

SETVEC

the

Set

LSI-11

address

expected trap routine.

specified

<VECTOR

ADDRESS>

the

SKIP

[<KDST ADDRESS>]

If <DST ADDRESS> is not specified, go to
Go to the <DST ADDRESS>.
starts with the alpha character
ADDRESS>
<DST
If
test.
the next
S,

the next subtest.

SUBTEST

Increment

the

subtest counter.

4-12

TSTVB

<SRC

Load

and

TABLE

read

ADDRESS>,

the

Bus.

[<SRC

TABLE

ADDRESS

Compare

the

contents

INDEX>]

the

data

<SRC

TABLE ADDRESS>,
indexed by <SRC TABLE ADDRESS INDEX>, with the
Bus data just read.
The <SRC TABLE> has the following format:

1$:

.WORD

<NUMBER

VBUSG

<CHANNEL

OF BITS

TO CHECK>

NUMBER>,

<BIT

NUMBER>»,

<EXPECTED

BIT

<EXPECTED

BIT

VALUE>

2$:

.WORD

<NUMBER

VBUSG

<CHANNEL

BITS

TO CHECK>

NUMBER>,

<BIT

NUMBER>,

VALUE>

VBUSG

16-bit

word

MACRO

name

that

BITS

<@7:00>

<CHANNEL

BITS

<14:08>

<BIT

BIT

<15>

The

following

three

arguments

16,1

current
<SRC

<SRC

into

one

NUMBER>

BIT

VALUE>

example

TSTVB

and
the
physical

the

NUMBER)

<EXPECTED

the

encodes

follows:

value

<SRC

TABLE

ADDRESS

INDEX>:

INDEX>

the

<SRC

TABLE

ADDRESS

1looks

1like

the

preceding

ADDRESS>

would

TABLE>

TABLE

the

table,

2,
the

2S.

TYPSIZE
TYPSIZE

Use

the

content

the

WCS

data

module

location

configuration,

BADDATA,

when

and

type

was

which

contains

read,

message

and

the

value

the

WCS

determine

the

number

modules that will be tested.
1If any of the following conditions
exist, the test stream is aborted and the NER
(No
Error Report)
flag

set.

WCS

b.
C.

bits 3--8§ are nonzero
fifth K of WCS is not

These

module

count

zero

present

conditions
mean
that
the
incorrectly or the WCS data register

WCS

cannot

1is

either

read

configured

correctly.

MICROTEST DESCRIPTION
4.5
On completion of the hardcore

Microtest
sequencing
microtest monitor.
The

microtest

floppy

However,

into

buffer.
the

the

and

monitor

same

the

case

the

begins

buffer

area

microdiagnostic

monitor

then

the

from

the

with

the

microtest

load

the

microtests

execution

are

used

microtests,

tests

executed out
The

monitor

references

was

just

first

are

order

microstack

the

first

buffer

and

loaded

contains

the

WCS

monitor

into

and

addresses

into

being

1is

the

performed,

the

first

test

popping

the

1loaded

micro

and

end

each

the

executed

test,

monitor

the

allows

This

initiating

in the

the

correct order.

initiates the next test with another maintenance

then

overlay has

been executed.

sequence

loads another

address

return

test.

the microtests are

This

the

The

interrupted.

1is

The monitor
return.

locate

table).

the

maintenance

the

check that

in system microcode,

the

from

microtest

tests.

strictly

onto

loaded

execution

that

1is

that

microstack.

address

table

the

hardcore

area

instruction of every test in the overlay (section)

entry

(first

from

monitor.

controlled

the

this

Since the microtests are implemented
transferred
of the WCS.

the

tests,

monitor

hardcore

the

overlays

continues

1K microword

until

the

original

overlay

microword

the microtest monitor

At this point,
into WCS.

Because of the microtest package size, more than one diskette is
required

for

storage.

diskette,

entire

package.

When

determines
In

the

monitor

whether

case

where

executes

the

last

the

1last

test

the

test,

the

test

last

monitor prints out a message to the operator with instructions to

load the next sequential diskette and
microtest execution (Paragraph 4.8).
4.5.1
Microtest Structure
The initial microtests complete

hardcore

the

Translation

The

tests.

Buffer

(TB)

and

the

enter

data

microtests

a command

path

then

testing

begin

cache without

using

memory.

check

correctly.

continue

started

test

The

the

tests

check the TB and cache for their ability to retain correct address

and

data

information,

The Instruction Buffer

using

memory.

cache,

and

microtests
data path.

(IB)

test

check the

branching

cause

interrupt

from

cache.)

(i.e.,

and

data

instruction

test

condition

code

test

data

parity

tests are then executed, again without

The

manner

and

loaded

functions '‘and
logic

into

4-14

1loaded

patterns

and

into

cache.

retrieved

controls

checked

subsequently

for

The

from
the

similar

retrieved

The
next
test
segment
covers
maintenance
functions,
and the
these tests, the microtests go
the

TB,

the
SBI
control
logic
and
its
memory system.
After performing
back and test those
functions of

cache,
and
SBI subsystem that depend on retrieving data
memory (e.g., cache, SBI faults, etc.).
A minimal amount of
testing
is performed on the
Unibus and Massbus adapters.
These

from

tests

force

capability

The

selected

detect

floating-point

Figure

4-4

shows

errors

and

the

SBI

and

react

the

accelerator

tested

the microtest

determine

forced

errors

last.

sequence.

DATA PATH

!
TB, CACHE

W/0 MEMORY

!IB (W/O MEMORY)
IB BRANCH
FUNCTIONS,
CONTROLS FOR

DATA PATH

INTERRUPT &

CONDITION
CODE LOGIC
uTESTS

SBI CONTROL

LOGIC,
MAINTENANCE
FEATURES,
Ifi/IEMORY SYSTEM
4

TB, CACHE, SBI
FUNCTIONS

PERTAINING
TO MEMORY

:
MINIMAL UBA,

MBA TESTING

!
FPA

TK-0778

Figure

4-4

Microtest
4- 15

Structure

the

adapters'

correctly.

On completion of the microtests, control is returned through the

microdiagnostic

monitor

console

the

The

program.

console

the

reboots, sends the relevant bootstrap header information to
console terminal, and prompts for operator input.
MICRODIAGNOSTIC MONITOR CONTROLS

4.6

The following paragraphs describe the operator command execution

Where
control functions provided by the microdiagnostic monitor.
usage
flag
control
program
and
command
of
appropriate, examples
nostic
microdiag
of
on
descripti
a
is
included
Also
are included.
related

The

error messages.

majority

commands

the

available

microdiagnostic

the

monitor are not used in the normal course of execution. Normally
the operator enters the test command and executes the entire
microdiagnostic package. The command mode is wusually used
Following the error message printout,

following error detection.

testing stops and control is returned to the monitor command mode.

this

point,

operator

the

executes

commands he decides would be most helpful.

those

microdiagnostic

The
Symbols used in the command syntax are the comma and < >.
< > denotes an
comma is used to separate items within a list,.
or a V Bus
value,
count
pass
address,
an
either
is,
argument, that

channel.

Note

that

the

Control

(°C)

1is

looping

error,

command

line)

interrupt

control

character.

return

user

must

(or

command

every

terminated with a carriage

(CR).

Control C is entered during test execution, the current test will
complete, further testing is suspended, and control is returned to
1If Control C is entered while a test is
the monitor command mode.

the

1loop will

suspended

Any command may be
returned to the command mode.
d line.
comman
that
in
entered
is
C
Control

Table 4-2 describes the monitor commands.

commands,

and control

aborted

Note that although all

keywords, qualifiers, and flags are spelled out, they

The only
can be abbreviated to the first two characters.
on error
halt
and
n
detectio
error
on
halt
the
exceptions are
ly.
respective
HI,
and
HD
typed
be
must
which
flags,
isolation

4-16

Table 4-2

Miérodiagnostic Command/Flag Descriptions

Command/Flag

Description

DIAGNOSE

Initializes
and

starts

test

the program control flags,
microdiagnostic execution at

number

one.

Valid qualifiers are:
/TEST:

-- Dispatch to the test
number
specified
(do
not
execute
any
prior
tests),
and
1loop
on
the
test
indefinitely.
/SECTION:

section

number

execute

the

any

-- Dispatch to
specified
(do

prior

section

sections),

<NUMBER> -diagnostics and the
before

1loop

indefinitely.

/PASS:

passes

and

the
not

Execute
the microspecified number of

returning

the

If the number is -1, execute
diagnostics indefinitely.

console.

the

micro-

/CONTINUE
-Used
with
the
/TEST
or
/SECT switch to automatically continue
after the specified test or section has
been reached.

/TEST:

<N>

<M>

execute

(inclusive),
mode.

/SECT:
<N>,

Dispatch

tests

<N>

and

<M>

execute

<N>

return

Dispatch

sections

(inclusive),
mode.

and

test

through

<N>

return

command

section

through

<M>

command

and

execute

NOTE

In
the
preceding
variations
of
the
/TEST and /SECTION qualifiers, the value

of
<N> must
<M>.
If
<KM>

will

start

be
is

1less
1less

<N>

than
than

and

or
equal
to
<N>,
testing

continue

end.

/TEST

and
/SECT
simultaneously.

Examples

cannot

the

specified

DIAG/TEST:
2F

Dispatch to test
it indefinitely.
4-17

number

Table 4-2

Microdiagnostic Command/Flag Descriptions

(Cont)

Description

Command/Flag

DIAG/SECT:B

Dispatch
to
section
number
execute it indefinitely.

and

DIAG/PASS:--1

Execute all of
indefinitely.

the

microdiagnostics

DIAG/TEST: 2F/CONT

Dispatch to test
of the remaining

2F and
tests.

start execution

Continues
microdiagnostic
execution
without
changing
the
program
control

CONTINUE

flags.

Set

and

Clear

Flags

SET/CLEAR

FLAG HD

Sets
(or
detection

SET/CLEAR

FLAG HI

Sets

SET/CLEAR

FLAG

LOOP

(or

<clears)
flag.

the

halt

error

clears)

the

halt

error

the

1loop

error

report

isolation

flag.

Sets

(or

<clears)

(or

clears)

(or

<clears)

flag.

SET/CLEAR

FLAG NER

Sets

the

flag.

SET/CLEAR

FLAG BELL

Sets

the

bell

error

flag.

SET/CLEAR FLAG
CLEAR FLAG

ERABT

Sets

(or

Clears
flag.

clears)

the

(Note

the

error

special

loop
that

abort

this

flag

flag.

section
cannot

set.)
CLEAR

FLAG

SET/CLEAR FLAG ALL

Clears the loop on special test flag.
(Note that this flag cannot be set.)

Sets

(or

clears)

all

the

flags.

SET/CLEAR

SOMM

Sets

(or

clears)

the

stop on micromatch

bit.
SET/CLEAR

SOMM:<ADDRESS>

Loads address
into
the
CPU microsync
register, and sets (or clears) the stop
on micromatch bit.
4-18

Table

4-2

Microdiagnostic

Command/Flag

Description

SET/CLEAR

Loads <ADDRESS>
register.

SET

STEP

FPA:<ADDRESS>

STATE

Sets

the

CPU

Descriptions

(Cont)

into

the

microsync

clock

FPA

single

state.

SET

STEP

BUS

Sets

the

Both
BUS

the

step

STEP

the

mode

UPC
input.

terminal

clock

triggered

value

typed

character

Sets

the

single

current

value

typed.

The

input.

current

pseudo

the

typed,

step

the

CLOCK

SLOW

Sets

the

RETURN

space

4-19

typed,
is

the

executed

clock

speed

the

slow

clock

ERABT,

HD
NER

speed

clock

display

the
and

Returns

terminal

CPU

continue

for

fast

BELL,

Clears

waits

the

Sets
the
CPU
oscillator.

LOOP

(TPC)

CLOCK

LOOP

speed

SET

Causes

the

Test

clock

Sets

NER,

When

invoked,

CPU

CLOCK NORMAL

SHOW

mode

value
of
the
TPC
any
other
character
mode is exited.

SET

EXTERNAL

any

instruction

margin.
the

the

1If

step

current

typed.

Sets

and

monitor.

are

the

monitor

margin.
SET

the

current

out.

entered,

software

enter

waits
space
is

UPC

exited.

STEP

and

the

and

FAST

cycle.

SET

the

value,

typed,

flag and returns to
the
hardcore
tests

CLOCK

and

monitor
types

the

bus

current

SET

single

STATE

cause
Step

state

other

INSTRUCTION

SET

mode.

for

STEP

clock

commands

clock

SET

CPU

time

for

the

LS,

and

flags

command.
control

the

normal.

external

HD,

HI,

flags.

and

flags.
and

LOOP,

Sets

the

executes

console

program.

Table 4-2

Microdiagnostic Command/Flag Descriptions (Cont)

Command/Flag

Description

Examine Commands

The

following

examine

commands

cause

the current microinstruction to be
is
examine
the
before
executed
ne
exami
first
the
is
it
if
rmed,
perfo
since entering the monitor command
All successive examines do not
mode.
additional
any
te
execu
registers
Bus
ID
s.
tion
truc
microins
the
during
destroyed
are
T1--T8
Bus
VvV
the
for
pt
exce
,
ines
exam
following
of the
All
examines.
ce the
advan
Bus,
V
t
excep
nes,
exami
the
ting
execu
e
befor
CPT@
to
clock
.
command

EXAMINE

ID: <ADDRESS>

Displays the content of the ID Bus

EXAMINE

NEL>
US
: <CHAN
VB

Displays

the

content

the

channel specified by <CHANNEL>.

BUS

Bit 4

is at the right side of the display.

Displays the content of the RA scratch

EXAMINE

RA : <ADDRESS>

EXAMINE

RC : <ADDRESS>

EXAMINE

Displays the content of the LA latch.

EXAMINE

Displays the content of the LC latch.

EXAMINE

Displays the content of the D register.
Displays the content of the Q register.

EXAMINE

Displays

the

content

the

EXAMINE

Displays

the

content

the

EXAMINE

Displays

the

content

the

EXAMINE

pPC

Registers

the

program

pad specified by <ADDRESS>.

Displays the content of the RC scratch
'

pad specified by <ADDRESS>.

counter.

4-20

content

Table

4-2

Microdiagnostic

Command/Flag
Deposit

Command/Flag

The

deposit

examine
to

command

command,

deposited

user.

DEPOSIT
DEPOSIT

ID:

RA:

<DATA>

DEPOSIT

RC:

<DATA>

<DATA>

DEPOSIT
DEPOSIT

DR:

DEPOSIT
DEPOSIT

QR:

<DATA>

SC:

<DATA>

DEPOSIT
DEPOSIT

FE:

<DATA>

VA:

DEPOSIT

<DATA>

PC:

<DATA>

LC:

(Cont)

Description

Commands

DEPOSIT LA:

Descriptions

the

except

must

same

that

the

supplied

data

the

4.6.1

Monitor Control Examples
following
paragraphs
provide
usage
examples
of
selected
monitor
controls.
These
descriptions
are brief and
are
intended
only to indicate some of
the capabilities of the micr
odia
gnostic
monitor.
The

4.6.1.1
HD/HI
microdiagnostics
error

isolation.

the
HI
flag.
microdiagnostic
a.

Error

Call

d.
In

is
the

normal

the

set.

addition
functions:

circumstances,

flag

to
testing,
error detection

the
and

the

set

user

initiates

the

would

following

detection

isolation
an

pattern

situation
halt

In
basic

Under

Terminate

two

Setting

sequence:

Display

data

wants

Flags
perform

error

used,

test

where

routine

identify

message

and

the

identifying

failing

error

cause

the

failed

modules

test,

execution.

the

execution

user

does

the

not

error

require

detection

scope

point,

loop,

the

This flag halts the test befo
re the microdiagnostic
isolation routine overlay (e.g
., V Bus compare).

and
flag

calls

4.6.1.2
Loop On
Error Flag
(LOOP)
-- With
¢this
flag
set,
the
microdiagnostic will
revert to a tight program
loop after error
detection (assuming
the NER flag is set). Note
that the loop will
continue
cleared

even though the error
to break the loop.

4-21

intermittent;

the

flag

must

sses the
No Error Report Flag (NER) -- This flag suppre
in the
l
usefu
ially
espec
typing of error messages. The flag is error
time,
takes
ut
printo
case of looping on an error. Since the
ts
repor
error
With
the scope sync is lost during typing time.
a reasonable sync.
4.6.1.3

suppressed, the loop is tight and produces
4.6.1.4

Bell On Error Flag (BELL)

g this
s When running the hardcore tests, settin
Hardcore Test-—error
an
when
bell
flag causes the console terminal to ring itsion where a manual
This flag is useful in a situat
occurs.
In this situation, the user
adjustment could clear the error. flag,
producing a tight loop.
would set the LOOP flag and the NER
the user does not have an
However, with no error report,cleare
d during the adjustment.
indication of where the error
en a reasonably tight
betwe
Setting the BELL flag is a compromise
at) and an error
somewh
error loop (the BELL flag slows the 1loop
used during the
were
If a scope
indication during the adjustment. error
without losing
tion
indica
adjustment, the user would have an
the

scope trace.

loop on test
Microtests -- In the microtests, one mustbeen
printed, set
has
(DI/TEST:n); then, after the error messageand
type CONTINUE.
the NER and BELL flags, clear the HI flag,

command allows the user
4.6.1.5 Continue Command (CONT) -- This situat
ion. For example,
halt
tic
to proceed from a microdiagnos
reflected in the
been
not
has
suppose that a hardware ECO, which
er. When the
comput
the
into
diagnostic system, is incorporated
o error, the
pseud
the
of
tion
detec
microdiagnostic halts following
ion at the
execut
ue
contin
and
test
user can bypass the failing
next test by entering CONTINUE.

4.6.1.6

to
Error Abort Flag (ERABT) -- This flag allows the user
tests

t in certain hardcore
display more than one error reporpiece
of logic with more than
(tests which exercise a particular

one data pattern).

flag is set,
For example, consider the situation where the ERABT
initial
of
one
on
R2)
(ERRO
and the test detects a type 2 error enter CONTINUE, the the
flag would
data patterns. If the user were to
the next
of
tion
execu
ate
initi
and
abort the remainder of the test
UE will
CONTIN
d,
cleare
flag
the
sequential test. However, with
data
ntial
seque
next
the
with
initiate execution of the same test
pattern.

4.7

MICRODIAGNOSTIC RELATED ERROR MESSAGES

microdiagnostic-related
The following paragraphs describe the
All error
pretation.
inter
error message formats and their
them from
h
nquis
disti
to
mark
messages are prefixed by a question
informational messages.

4-22

4.7.1
?2USE

Syntax
DIAG

Error

Messages

COMMAND

Execution of a continue command was attempted before a diagnose
command.
This would only occur if TEST/COM were used to invoke
the microdiagnostics from the console program.
2INVALID COMMAND
The previously entered

2INVALID KEYWORD
The argument of a
?NUMBER MUST
A

command

was

error

number

was

recognized.

System Error
<NUMBER>

Messages

was

and

detected

Error

code

identified

is:

Floppy

File

Floppy

?READ SECTOR: <NUMBER>
error was detected and

the

floppy.

hardware

not

trying

not

identified

while

trying

Sector

number

out

Floppy

queue

full

Floppy

hardware

error

identified

while

code
5

Terminal

TRAP TO 4
trapped to

read

sector

range

trying

PC =
4 at

Chain Monitor

the

specified

PC.

Error Messages
is

hung.

The

monitor

the

last

four

seconds.

?EXECUTION

The

the

microcode

OUT

microcode

has

sequential

SEQUENCE

not

UPC =
executed

2ILLEGAL MONITOR CALL:
The microcode made
a

was

SHOULD BE =
the
tests within

did

not

the

overlay

receive

order.

?CLOCK STOPPED UNEXPECTEDLY
The clock stopped and the SOMM

which

the

busy
hardware error

from

read

driver

?TIMEOUT IN TEST ... UPC =
Indicates that the microcode
call

is:

LSI-11

floppy

is:

2UNEXPECTED

ready

Error

open

error

terminal.

found

code

?KEYBOARD ERROR: <NUMBER>
error
was
detected
and

4.7.3

while

Error

The

not

FILE:

file.

from

was

HEX

non-hexadecimal

4.7.2
?0PEN

command

<NUMBER>.

bit

was

not

set.

<NUMBER>
call

the

4.3

monitor

with

bad

argument,

PROGRAM LISTING AND ERROR MESSAGE DESCRIPTIONS

4.8

The following paragraphs describe microdiagnostic program listings
is beyond the scope of this chapter

formats.

and error message

to describe the various diagnostic program assemblers and their
associated

languages.

Monitor Listing Descriptions
4.8.1
The program listings for the microdiagnostic-associated monitors
(i.e., microdiagnostic, hardcore, and microtest) share the same
listing format. That is, since the three monitors operate out of
the LSI-11, they are coded in MACRO-11 (PDP-11 assembly language)
in the general description.

and are discussed as one

listing

Each

comprised

Table of

sections:

general

three

Contents, Program Definitions, and Program Code and Descriptions.

Each page

program,

number,

Table

listing

the page

generated,

was

the

the name of

title containing

particular

line item that indicates the content of that page

and a

(listing header)

The

has a

listing

in a

the date the

(Figure 4-5).

Contents

the

list

content

the

program

listing. The first (left) column contains a hyphenated number. The

number preceding the hyphen specifies the page number of the
listing on which the line appears. The number following the hyphen
is a listing line number. This number specifies the starting line

(within the 1listing)

the

right

sections,

etc.)

Program

The

column

of the associated listing content contained
(e.g.,

definitions,

test

address

specifies

section

Definition

routines,

utility

assignments, bit definitions, module and bus name assignments, and
other constants that are used throughout the program.

The remainder of the listing (and the largest section by far)
the Program Code and Description section

(Figure 4-5). The format

is described on a per column basis from left to right. Note that

the address and data radix for all monitor listings is octal.

Column 1, Listing Line Number -- Each line in the listing
to

is assigned a unique decimal number
referencing from the Table of Contents.

allow

easy

Column 2, Address —- The address of the instruction.

in Column 2 -reference line

Column 3, Content of the Address listed
(e.g.,
This is wusually an instruction

number 79 in Figure 4-5). The address is 101029, and its

content is @32767, which is the octal code for a Bit Test
(BIT)

Column

instruction.

and

three-word

specified

reference

columns

line

instruction

the

instruction,

number

the

second

4-24

and

two-word

words

are

4-5).

This

BIT

respectively

Figure

third

(e.g.,

STAR MICRO YEST MONITOR MACRO Mi@
PLAG TEST ROUTINE

03=MAR=77

77
78
| 79

108776
je1002
1831020
101026
101230
1021036
101940
101044
101046

80
61
82
83
84
85

o@0%@67

177130

932767
p0146
Q32767
Q01463
0204767

040000

177064

@e0@d4

177054

101079

88
89
90
91
92
93
94

0212667

177022

032767

1681076
101180
101106
101124
101142
101160
101176

195

101282

96
97
98
99
100

101206
101212
101214
101220
101226

191

101232

o004l
032737

200004

177014

o@@0200

163032

204767

003236

004767

go3Rie

105737
100402
000167
032737
oe1118

104236

01257

123

101240

1n;
10

191244

05267

FLGTST:
181

CLR
TIMER
}
UPDATESHR
5T
SCTRLC, SWR
)
BEQ
118
J}
81y
#LOOP, SWR
?
BEQ
118
}
JSR
PC,STOPCLK
!
GETUPC
?
MOV
(SP)¢,8THPO
!
CALLMICMNON °
?}
817
"WLOOP, SWR
!
BNE
128
!
818
NCLRUWRD,##CONMCR
LOADID
WERIADR,SUSCADR j
LOADID
W®ERIDAT,MUSCDAT 3
LOADID
WER2ADR,#USCADR 3
LOADIDO
WER1IDAT,NUSCDAT ;
JSR
PC,MRETURN
]

1181

QG412
000042

163032

000004

1a8s

BNE

BIT

176666

Q01256

114

101362

119 101310
116 101314

117

101330

118

177314

016767

177304

Q05267

176360

176546
176564

101372
104376
to1400

or4767

101482

012667

101426

101434

128 101452 | 162767

130

oouoaal 175372'

LINE

ADDRESS

LISTING

NUMBER

CONTENT

ADDRESS

—

fi“f

YES

LOOP

}

BRANCH

INCREMENT

)

BRANCH

THE

TIMEOUT TIMER

NO TIMEOUT

YET

HAS BLOWN UP

’

!
5

TYPE

TIMEOUT ERROR

IN THE FIRST TEST
BRANCH IF YES

MESSAGE
YET?

@STSTNM,HEX

#SIXSPC
¥MSG3

!
?

TYPES |

(SP)+,8TMPD

#STMPO, HEX

tvee

' wscriLF

sus

CALLMICMON

44,TSTPTR

e | gesy
1

1 |

SIX SPACES
"ypPCat

STOP THE STAR CLOCK

READ THE UPC SAVE REGISTER

}

TYPE THE TEST NUMBER

TYPE
TYPE

SAVE

TYPE THE CURRENT UPC

)

GO TO THE MICRO MONITOR

? RESTART AT THE CURRENT TEST

INSTRUCTION

MNEMONIC

SECOND AND

TEXT

REFERENCE

FLAG SET?

THE MICROCODE

TSTSAVE,$THPD

SECOND

STOP?

$TMPO
WSTMPO,MEYX

MOV

CLOCK

JSR
PC,STOPCLK
LOADVBUS
GETUPC

176468

| 120] 101480 ' app167 ! 177262

STAR

TYPE
TYPE

8s:

| 126) 101422 I

THE

WSCRLF
#MSG2
TSTSAVE,$TSTNM

TYPES

002614

DID

INDICATES THAT

583

BRANCH

INC
TYPES

633

TIMER

MOV

1081346
fey1360

YET?

}

TIMER

CLOCK

CALL
NO

INC

SNE

Q00406

101332

119
120

026767
oofni4

TIMEOUT
)

MICROCODE
BRANCH IF

FLGTST

TYPE
TYPE
cnp

THE

FIRST
CONTROL C FLAG SET? € —
TEXT
BRANCH IF nNO
REFERENC!
LOOP FLAG SET?
BRANCH IF nNO
STOP THE CLOCK
GET THE CURRENT uPC
SAVE
GO TO THE MICRO MONITOR
LOOP FLAG STILL SET?
BRANCH IF YES
j GOING TO RESTORE MONITOR CALLS
LOAD THE ERROR | ADDRESS
RESTORE THE JUMP ADDRESS
LOAD THE ERROR 2 ADORESS
RESTORE THE JUMP ADORESS
DO MAINTENANCE RETURN ON ORIGINAL UPC

1 START THE

#LOOP, SWR

BNE

INITIALIZE

e#TXRDY
?
108
}
29
#CLKSTPD,s#CONMCR

BNE

Je
? THIS CODE

109
110 101246
111 101260
112 181272
113 181302

PC,RUNCLK

TSTB
8MI
JmMp
817

176654

106
107

127!

PAGE

PFLAG TEST ROUTINE

1283

163016

0232767

102

124

LISTING

oSBTTL

0203146

101032

125

PAGE

HEADER

121
122
123

19382

LABEL

THIRD WORDS

COMMENTS

OPERAND
DEFINITIONS

OF INSTRUCTION

TK-0773

Figure

4-5

Monitor
Sample

4-25

Listing

instruction happens to be a

word

second

@40600¢,

and

instruction,

three-word

the

word

third

the

177064.

Thus, this instruction is testing bit 14 (040003) to
determine if the Control C flag is set at address 177064.
(Note that this flag was defined 1in the definition
section.)

Column 6, Label -- This symbol is the name used by the
program mnemonics to reference this instruction (e.g.,
reference line number 95 in Figure 4-5). The 1label in
this case is 128.

Column 7, Instruction Mnemonic -- This is the assembler
language mnemonic for the instruction (e.g., Bit Test
Instruction = BIT).

Column 8, Operand Definitions -- These symbols and
mnemonics are the assembler language mnemonic definitions
the

for

operands.

Column 9, Comments -- A brief description (following the
semicolon) of the instruction operation.
4.8.2

Hardcore Listing Description

to that of
The general format of the hardcore listing is similar tions,
and
Defini
m
Progra
s,
Content
of
the monitors (i.e., Table
of
Table
the
of
column
left
The
).
Program Code and Descriptions
the
ng
precedi
number
The
number.
ated
Contents contains a hyphen
hyphen specifies the page number of the listing on which the line
appears. The number following the hyphen is the 1listing 1lineg
number, indicating the starting line of the associated 1listin
contents.

listings,

The definition section

1i.e.,

address,

module

and

similar

the monitor

assignments,

bus

definitions, and other constants used in the program.

bit

The remainder of the listing is the Program Code and Descriptions.
As indicated in the Table of Contents, the hardcore tests area
composed of sections and tests. The section number represents
1.5k byte segment. The section number is displayed on the console
terminal during hardcore test execution. The test number
identifies a test on a particular logic area or function. The
subtest number (which is not referenced in the Table of Contents)1
jdentifies a particular portion of a test. For example, Subtest
floats a logic one through each bit of a register; Subtest 2
floats a logic zero through the same register.

shown

Figure

4-6,

the

program

code

preceded

by an

outlined test header area. A subtitle statement (.SBTTL) generates
the test number and title above the header area.

The header area consists of five descriptive segments. The first
line within the outlined header repeats the test number and test
title. The test description segment is a brief paragraph

describing the general logic area tested and method of test. The
logic description segment describes the test in more detail.
4-26

CS BUS DATA INTEGRITY

T1C

[ .SBTTL

e53e

|AR

’

TEST

’

\\\\\

?
’

L R

A e

L R R

g L

ONE

AND

ZERO

THRU

AND CHECKING
|

FLOAT

MICRO

WORD,

EXECUTING

THE

THE V BUS FOR

PARITY ERRORS,

ZERO

THRU

THE

MICRO

BUS

SUBTST 2 = FLOAT A ONE THRU THE CS BUS

]

HEADER

ey rr

THIS TEST CHECKS THE DATA INTEGRITY OF THE (S BUS BY FLOATING

SUBTST

AREA

CS BUS DATA INTEGRITY

WORD,

TEST

DESCRIPTION
A

SUBTITLE

STATEMENT
cS BUS DATA INTEGRITY J4/

1€

s TESY
'

TiC

PAGE 29

20=APReYY 10137

MACRD M1@

MICRO DIAGNOSTIC HARDCORE TEST

LOGIC DESCRIPTION

THIS TEST CHECKS THME ID BUS INTERFACE TO THE WCS MODULES, THE
DATA INTEGRITY OF THE WCS MEMORY CHIPS AND THE DATA INTEGRIYY QOF

’
'

THE

CONTRCL

STORE

(CS)

BUS,

y
’

ERROR DPESCRIPTION
DATAS EXPECTEC V
RECEIVED

BUS CHANNEL,

BIT
BIT

AND VALUE
AND

VALUE

3=BIT 2,

LOOP COUNT « INDICATES WHICH BIT IN YHE 32 BIT GROUP I8 UNDER

L
]

TESYT,

l.E,

I®BIT @,

TEST,

1.E,

2=BIT

ETC.

LOOP COUNT = INDICATES wWHICH 32 BIT GROUP 18 UNDER

'
1

NOTEs

’
!

’

SYNC

’

RITS<31109>,

28BITS«<463:132>,

3IsBITS<9S164>

THE EXPECTED AND RECEIVED V BUS CHANNEL INDICATES WHICH 32 BIY
GROUP MAS RAD PARITY IN IT, 1,E, 102X=BIT8<31182>,
101 X3BIT8<63132>, AND 10BX®BITS<c9S5364>,

DESCRIPTION

POINT

SUBTST | « SYNCUC=«TEST PATTERN IS8 ACTIVE ON THE €S8 BUS
SURTST 2 = SYNC4D==TEST PATYTERN IS ACTIVE ON THE CS RUS

'..

R R

AeASSA

2534 @paSSy
2535
2536 8p0556
280556

2537
2538
2539
2540

FLOAT

et e

ZERD THRII THE CS BUS

LooP
LOIDREG
LOOP
LPIDREG

J,1,3
USCADR,TMPIA@
K,1,3
USCDAT,TMPIR2

t
3
)
1

LOOP COUNT FOR THE 3 BANKS
SELECT LOCATION ZERO
INITIALIZE THE CONTENTS OF LOCATION @
,,,

LooP

1,1,32

LOOP COUNT FOR THE BITS IN a BANK

LOAD INTO THE SELECTED BANK

ENDLOOP

2548 200630
2549, 200636

LDIDREG USCADR, TMP18@,J
FLTZRO Itnpxelpl

255eiaaeedy

2552l eegesu

LINE

T1CS13

2545 220614
2546

LISTING

SUBTESY

200560
200570
@0@sS76
PoB606

2551

$77020080072772700777777707270707727077707727770777772777727777072771770707777277717¢4¢7777

2547 200620

INITTALIZE

1"
t FIRST
3=

2501
2542
2543
2544

TiCs

#0964

ADDRESS

ERLOOP

LOIDREG, USCDAT,TMP1Q1

FETeW

$oaee

3
t

LOAD THF BANK ANDRESS
GENERATE THE TEST PATTERN

|1oeen

|+ EXECUTE THE MICRO WORD

ADDRESS

INSTRUCTION

CONTENT

OPERANDS

COMMENTS

NUMBER
TK-0769

Figure 4-6

Hardcore Listing Sample

4-27

For
error description segment specifies test parameters.
The
example, in the error description of Figure 4-6, the first line
the second 1line
specifies what is expected during the test;
specifies what is received. The third line indicates which bit in

the 32-bit array is under test; the fourth line indicates the
32-bit group under test. The sync point segment specifies critical
points in the 1listing around which an error loop or scope loop

might be

set

(Paragraph

4.9.2).

Following
the
test
header
is
the
program code.
listings are described on a per column basis below.

Column

Listing

Column

Address

unique decimal

listed

pseudo

Address

The

relative

Content

(Note

address

Content

that

instructions described

Columns 4 and 5,
the

to allow easy referencing.

Column

hardcore

Line Number -- Each line is assigned a

number

instruction.

Column

The

the

(PC)
the

the

address

are

contents

the

in Paragraph 4.4.2.)

Instruction Operands -- The operands are

instruction source,

destination,

index values.

The

mnemonics appearing in these columns have been defined in
the definition section of the listing.

Column 6,
the

Comments —-- A brief descriptive note concerning

instruction operation.

Microtest Listing Description
4.8.3
The general format of the microtest listing is somewhat similar to
the other microdiagnostic listings, i.e., a Table of Contents,
Program Definitions, and Program Code and Descriptions. However,

since the microtests are executed out of the WCS, they are written
in

system

microcode

firmware listings.

and,

therefore,

are

similar

the

system

Unlike the hardcore listings that are assembled

in one listing, the microtests are assembled into separate
listings by 1K microword test sections and identified by those
section numbers. Note also that the address and data radix for
these listings is hexadecimal.

The Table of Contents
it contains a
i.e.,
listing

content

is similar to those of the other listings;
1line number entry and the corresponding

description.

Since

the

first

column

does

not

contain assembler directives, only the line number appears. The
Program Definition section describes all macro definitions
associated with the listing.

The Program Code and Description section format is similar to that

of the system firmware listing.
program

code

described

identical

Paragraph

the

4.8.2.

4-28

in the hardcore listing, the

hardcore

format

and

content

The

microtest

listing

described

per

column

basis

(Figure

Column
1,
UPC
-This
column
specifies
the
address
contained in the UPC at that particular microstate.
Column

microword

Microword

This

column

describes

content of the address specified

Column 3, Listing Line Number
to allow easy referencing.

Decimal

the

in column
number

assigned

Column 4, Microstate Operation -- This column specifies
the
operation during
a
particular microstate.
The
notations
used
to describe the operation have been
defined in the
program definition section.
Column 5,

the

Comments

-- A brief descriptive note

microstate

operation.

detailed

concerning

firmware

description
is
provided
in
the
VAX-11/780 Central
Processor Technical Description, e.g., field definitions,
coding

TEST

etc.)

Microdiagnostic Execution

4.8.4

The

conventlions,

entire

microdiagnostic

the

described

console

the

package

terminal.

detailed

may

Other

diagnostic

executed

operation

operating

entering

options

procedures

are

The

VAX-11/780 Diagnostic System User's Guide

(EK-DS780-UG-001).

hardcore

illustrates

Following

console

microdiagnostic

and

microtest

terminal

output

during

hardcore

tests

execution.

The microtests

and

1identification

execution.

no duplication of test numbers).
no

differentiation

differentiation
(Paragraph

4.8.5).

The monitor

loads

the

section

allow

console
number

the

The

entire

are

hardcore

only

the

test,

the

printed

and

Test
(in

test

identify

sequentially

and

(with

microtests.

case

the

section

number

execution

the

failing

exact

typical

Figure 4-8, there 1is

hexadecimal)

1initiate

microdiagnostic

numbered

As shown

required

terminal.

monitors

4-8

error-free

1is

operator

case

between

the

Figure

then

prior

error

printed

initiated.

The

section

the

diskettes.

execution

error.

microdiagnostic

package

requires

two

indicated in Figure 4-8, the microdiagnostic monitor instructs the

operator

when

mount

the

second

diskette,

and

prompts

for

the

types

command required to initiate execution of those diagnostics.
4.8.5

Error

Message

Format

The
general
error
message
format
microdiagnostics is shown in Figure 4-9.

4-29

for

both

DWMPOA ,MCR([400,3262)
DWMOOA MICI490,3262)

12813
14338

Microcode file
MICRO 31(241)
TEST AS CES REGISTER ALU N BIT

21°APR=1977
20<APR=1977

TEST

HEADER

+«PAGE

#000,2030,0180,0800,0000,1135%

11406,
1141,

2018,0038,7980,0A90,0000,1141

y
'

TEST

THIS TEST CHECKS THE ALU N BIT IN THE CES REGISTER, THIS Is DONE

1041
1842

THIS BIT,

DATA PATTERNS ON THE AMX AND BMX TO CHECK TME LOGIC THAT GENERATES

SUBTST { « CHECK THE DATA PATTERNS THAT REQUIRE THE ALU TO
BE EXECUTING AN A+B T0 GET THE CORRECT ALU DATA,
SUBTST 2 = CHECK THE DATA PATTERNS THAT REQUIRE THE ALU 10

WP
VY
VG
WS
TG
TG
CO
TP
VO

YO T

1879
1881
1882

GO
G

flOOfla303C0019GUCO0000000,11‘9l

1877
1878

1080

1146, 0001vUD!CoOl‘O:OAl0,00GO:1147l
11474 f200,003C,0180,0A08,0200,1148
1148,

1866
1867
1868
1869
1870

0100,003C101802,0000,0000,1143

1018, 2000,003C,0180,0A00,0200,1145
11454 #000,003C,0100,0000,0000,1146

BE EXECUTING ANYTHIN BUT AN AR OR Ae*B,

LOGIC

188)

DESCRIPTION

THIS TEST CHECKS THE LOGIC NETWORK ON THE CEH MODULE THAT GENERATES
THE ALU N BIT, AND THE MULTIPLEXOR ON THE ICL MODULE THAT FEEDS
THE ALU N BIT IN

1854

1885
1856
1857
1858
1859
1860
1861
1862
1863
1864
186%

DBE EXECUTING AN AeB T0 GET THE CORRECT ALU DATA,

SUBTST 3 = CHECK THE DATA PATTERNS THAT REQUIRE THE ALU TO

1884
1852
1853

1873
1874
1878
1876

0218,0038,D580,09E0,0000,101A
0000,003D,0180,0800,0000,1124

1846
1847
1848
1949
18%0

1872

)

ccQaoccaccac

1144,
1014,

ALU N BIT

BY SELECTING THE ALU TO DO A¢B AND AeB, AND FsB, WITH SPECIFIC

7818,0238,4180,0800,0000,1142
0001,003C,0100,0A98,0002,1144

CES REGISTER

TEST DESCRIPTION

1840

1142,
1143,

1839

1871

°018,0038,7580,0A88,0000,1140

1219,

$#918,0038,6500,0A80,0000,1018

CES REGISTER ALU N BIT"

W
W
B
WS
VO
WA
WG
VO
WO
V6
W
G
O
O
W
TO
UH
UG
N0
W
WS WS

10318

VO UH W

0018,2039,0D03,09F6,02000,10F

cQcoCccca
o

1014,

1019,

"TEST AS

JHRRENEBRVRNBBRRERERBRVVBRERBBRRRORDBVRBRRDRRBBBOGRRVRVBRBRRRERERAERRRERE

AREA

1832
1033
1034
1038
1836
1837
1830

Page ?

ERROR DESCRIPTION
DATAS EXPECTED CES REGISTER
RECEIVED CES REGISTER
LOOP COUNT <« INDICATES

1887

WHICH DATA PATTERN

(SEE THE DATA AT THE END OF THE TEST)

1S BEING USED,

SYNC POINT DESCRIPTION

SUBTST 1 = SYNCilAe=ALU N BIT GETS LOADED
SUBTST 2 = SYNCiBeeALU N BIT GETS LOADED
SUBTST 3 = SYNCiCeepALy N BIT GEYTS LOADED

JHBRRRBBRBNRBBRBBSEFBB
AR R VR RER VPR ERRBRROERFERBERRRBR BB BB RBEBRRBIRRBBRED

ICLTO

NEWTST(,3]

R(P)l.K(,10)

) ADDRESS OF AMX DATA

Ril).K(,20]

1 ADDRESS OF BMX DATA

CALL,J/UNJAM

3 CLEAR ANY SBI

R{2)1.KI,30)
D.D,LEFT2
R[3)LD

INTERRUPTS

) ADDRESS OF EXPECTED ALU N BIT

DaK(+80)

)} GENERATE MASK FOR N BIT
) SAVE

$SI77107777707070272077207020777770700777777720770707727772072077F07777771707777
1¢

;

3 DO THOSE FUNCTIONS REQUIRING THE ALU TO

DO AN A PLUS B

’.

78811

RC[OCIK([,6)

SUBTEST

ICLT8L{1VALR(D)
1884
1885|
R{S).D
1886

1888|

THE CES REGISTER,

DIBYTE).CACHE,P
VALR[1)

DIBYTE].CACHE,P

}

|
|

SET THE LOP COUNT

$ FETCH AMX DATA
!

SAVE

FETCH BMX DATA

|
|

MICRO

MICROWORD

LINE

MICROSTATE

PROGRAM

CONTENT

NUMBER

OPERATION

COMMENTS

COUNTER

(UPC)

Figur e

TK-0771

4-7

Microtest
Sample

4-30

Listing

=>>TEST
MICRO

DIAGNOSTIC

01+02y03,
NO. OF WCS

V.05

MODULES

0001

04!05!06107_v08!09’OADOBvocDODIOEvOFv10) 11,12913914515916+17»
18v1951As1Bs1Cs 10

1Es1F 1209 21922923524, 257269279289 299 2A1 2B

2F 130931 932+33934135936537,38r3953Ay

END

FASS

MOUNT FLOFFY #2 & TYFE 'UI'I

—~——

REFERENCE

SECOND

TEXT

REFERENCE

3E»

¥ MEM CTRLS=
3C,30,
4K

2C» 20

000001

.MIC.}L{

FIRST
TEXT

CHIF

00000001

00000E08

OPERATOR

IEY3F

CFU TR= 00000010

‘UNN;,-E‘-RL|NED
P

40141 942+43944y45+46947148949r
44y
CTRL
4Ry

MAX

ADR+1i=

00080000

CTRL

MAX

ADR+1=

00080000

A4Cy 40,
END FASS

000001
TK-0772

Figure

4-8

Typical

Error-Free

Terminal

ERROR: <PC> TEST: <#> SUBTEST: <#>
DATA:

XXXXXXXX
XXXXXXXX

XXXXXXXX

TRACE:

WXY.Z

FAILING MODULES: (M8269 (S13)...
NOTE:

PC IS OCTAL FOR HARDCORE TESTS.
OTHERWISE ALL NUMBERS ARE HEX.
TK-~0750

Figure

4-9

Error

4-31

Message

Format

Output

The

first

line

items

are

ERROR,

address
(PC) of the failing
error,
the
PC
is displayed

TEST,

test.
as
a

and

SUBTEST.

ERROR

the

In the case of a hardcore test
six-digit
octal
address,
since

these
tests
are
microtest error,

executed
out
of
the
LSI-11.
In
the
case
of
a
the PC is displayed as a four-digit hexadecimal

address

since

executes

TEST

the

failing

section

test

out

number.

number

sent

execution.

SUBTEST

the

first

items

line

(Paragraph

The

are

of WCS.

the

Note

that

console

failing

important

this

terminal

subtest

different

during

number.

referencing

the

from

error-free

These

program

three

listings

4.9.2).

DATA

line

item

represents

test.

The

number

data

test.

Generally,

the

words

data

used

displayed

hardcore

during

the

particular

the

particular

words

are

displayed;

depends

tests

two

the first word is the expected (or good) data, the second word is
the
received
(or bad)
data.
However,
as described
in Paragraphs
4.8.2 and 4.8.3, the program listings contain a header describing
the data patterns used.
The

TRACE

line

determining

The

last

line

represents
cases,

the

order

will

involved

4.9
This

MODULES.

module

and

output

will

not

its

module

numbers,

ID
on

the

The

several

probability.

bit.
bus.

program

module

For

content

examples are
capabilities.
4.9.1

test

its

included

Error

Consider
the
microdiagnostic
or
another
message is

and

mainly

Message

procedure

failure.
of

this

number.

numbers

listed

cases

the

consider

the

other

example,

the

illustrate

out

ID BUS.

the

use

program

basic

1In

error

listings.

The

microdiagnostic

Situation

situation
where
the
operator
execution using the TEST command.

has
For

initiated
one reason

execution
stops
in
the
hardcore
tests,
and an
not printed. As shown in Figure 4-10,
execution

section

item

slot

The failure could appear to
Rather than printing out all

would

relationship

the

output

However,

number.

Bus
the

isolation

for

backplane

LISTING/ERROR MESSAGE CORRELATION
subsection
provides
basic
direction

message

fault

FAILING

failure

module

the

responsible

situation of a grounded
extend across all boards
related

failing

the

set of modules

item

the

some

output

item

the

error

stops

#4.

The
operator
has
a
reasonable
index
1into
the
hardcore
test
listings since section @4 is one of the initial sections executed.
Referencing
the section number
in the hardcore listing Table of
Contents,

the

starts

listing

operator
line

finds

number

that

777.

4-32

the

section

description

CONSOLE TERMINAL OUTPUT
s TEST

MICRO

DOIAGNOSTIC

V.05

01,025,003,
.

WCS

MODULES

0001

LISTING TABLE OF CONTENTS

MICRO DIAGNOSTIC HARDCORE TEST

TABLE

NUMBER

INDEX

MACRO Mio

20=APReT7T

10137

CONTENTS

CMPCA

le
e
le

s
§
§

SWITCH REGISTER
CONSOLE ADAPTER
1D BUS REGISTER

le
2

&
42

206

TEST

3e 141

AND

MODULE

CMPCAM

AND

BUS

MODE

DEFINITIONS

BIT DEFINITIONS
REGISTER DEFINITIONS
DEFINTTIONS

NAME

ASSIGNMENTS

SECTION NUMBER 21
Ty
CONSOLE ADAPTER

RESPONSE

('}

CONSOLE "TO 10" REGISTER DATA INTEGRITY

4« 206

T23

CONSOLE "MCRTM REGISTER DATA INTEGRITY

6e
T~

356
439

108
TO6

CONSOLE
TXREADY

S64

S« 284

SECTION

NUMBER

104

CONSOLE

SECTION

NUMBSER

"I1D0CS"

DATA

INTEGRITY

RXDNE AND TXROY REG DATA
AND RXDONE INTERRUPTS

8«
9«
{10«
10«

S6u4
661
777
777

Ta7
ID BUS DATA LINES DATA
TA8
vV BUS SELF TEST
SECTION NUMBER Q@4
129
CONSOLE CLOCK CONTROL

11«

9021

TOA

CONSOLE

12«

975

TOR

CONSL

FROM

CYCLE
ID

INTEGRITY

FUNCTION

REG

CLY

CTRL

DATA

SECTION NUMRER 85
Tac
CONSOLE MAINTENANCE

14e1162
1S+1282
15«1282
1Se1367
16=1394

TOD
SECTION
TOE
SECTION
TOF

16=1529

SECTND

171538
171656
181677
191745

T1o
SECTION
T11
T2

CI18 INITIALIZE FUNCTION
NUMBER 49
CONSOLE REGISTER DUAL ADDRESSING
WCS DATA REGISTER READ

20=1771

T13

21+1817

SECTION

INITIALIZE
NUMBER 04

NUMBER

THE

CONTROL

T14

WCS

23«1976
24«2061
2Ue2361
2Se2158

Tie
SECTION
117

MICRO STACK
NUMBER 08
MICRO STACK

T18

MAINTENANCE RETURN DATA

262327

SECTION

26=2327
272372
28«2424

T19
TiA
T1R

30262}

SECTION

292530
30e2621

J1e2748

ADDRESS REGISTER DATA

NUMBER

INTEGRITY

NDUAL

ADDRESSING

INTEGRITY

MAINTENANCE RETURN MICRO STACK
MICRD STACK WRITE DISABLE
WCS PARITY GENERATOR

€S BUS DATA

T1D

PCS PARITY
NUMRER

NUMBER

wCS

DUAL

CHECKERS

ADDRESSING

SECTION

TIF

3S=3168

36=3229

T22

SECTION

USUB FIELD "RETURN"

363229
37«3365

123
T24

USUB FIELD
UJMP FIELD

WCS DYNAMIC MEMORY
UBEN FIELD
NUMBER @F
USUB FIELD
NUMBER

INCREMENY

INTEGRITY

312807

T20
SECTION
T21

INTEGRITY

DATA

32-2845

33.29%9
343060
34=3060

STORE

WCS ADDRESS REGISTER COUNT LOGIC

TiC

T1E

INTEG

RETURN
RXCS REGISTER FROM THE ID BUS SIDE
NUMRER @é
TXCS REGISTER ON THE 1D B&US
NUMBER 07
ID BUS REGISTER ADDRESS INTEGRITY

21=1817

118§

PROGRAM
LISTING
INDEX

13«1070
131079

22«1906

INTEGRITY

DECODE
"CALL

TEST

FUNCTION®

"SELECT SPECIFIER"
DATA INTEGRITY
TK-0770

Figure

4-10

Listing

4-33

Indexing

Example

4.9.2
During

Hardcore Loop and Single Step Setup
microdiagnostic execution the error message

shown

Figure

4-11 is displayed on the console terminal. Since the error PC is a
six-digit number (@000670), it is an octal address and indicates a
hardcore
test.
Referencing
TEST:
1C
in
the
hardcore
Table
of
Contents indicates that the test begins on line 253@.
Referencing
the error PC of @00670 in the program code shows the PC to be at
an

IFERROR

The

statement

function

produce

error

the

line

2554.

IFERROR

report

statement
failure

Usually the IFERROR statement
function (in this case TSTVB).

Bus

signals.

expected

data;

this

example,

consequently,

Since the hardcore
may be too slow to

(Paragraph

4.4.2)

encountered

test.

the

is preceded by a check or compare
Basically this test is comparing V

the

received

error

was

data

did

not

match

the

detected.

tests
be of

execute out of the LSI-11, a scope loop
practical use. An alternative is to use
the set step instruction and loop commands of the microdiagnostic
monitor. As indicated in Figure 4-11, the operator sets the single
instruction and loop flags.
the statement following the

In this case the loop range is between
previous ERLOOP statement (line 2551)

and the
IFERROR statement
(line 2554).
each time the operator types SPACE, the
At TPC = (00662 the operator reaches
time the operator could scope the CS

to
detect
the
failing
microword has just been
Bus.)
The

operator

except

SPACE.

returned

4.9.3
During

the

exit
the

from

the

example,

step

mode

Control

microdiagnostic

sent to the
section 3A.

the

error

console

sync point SYNC4C, at which
Bus data bits in an attempt

bit.
(At
this
point
fetched from WCS and

monitor

Microtest Scope Loop Setup
microdiagnostic execution the

4-12 is
on test
Since

can

As shown in Figure 4-11,
current PC is displayed.

has

Note

four-digit

typing

been

command

error

terminal.

in
the
test
the
is driving
the CS

typed

that

and

shown

control

execution

(101E),

hexadecimal
address
and
indicates
a microtest.
section number of 3A, and
referencing the Table
that section, test
(of
the microtest

character

mode.

message

number

any

Figure

stopped

1is

Using
the
test
of Contents for

A5 starts on line 1832. A look at the PC column
listing)
shows
that the
error
PC
is
on
1line

1906.
By scanning back through the microcode,
select a sync point,
in
this
case
SYNCIA
on
1line
1901.
Control
is
returned
to
the
microdiagnostic monitor via Control C. The operator enters a CLEAR
SOMM:
<1153>
command.
This
micromatch bit, and produce a

command
will
clear
the
stop
on
sync pulse when the UPC equals the

content of the microbreak register (i.e., 1153). The operator then
enters
a
loop
command.
This
sequence
causes
the
test
to
begin

looping

and

produce

sync

pulse

each

4-34

time

the

UPC

1153.

CONSOLE TERMINAL OUTPUT
s

LISTING TABLE OF CONTENTS

TEST

"isgg.gé?smsnc Y
.

MICRD

DIAGNOSTIC

TABLE

5§

le
le

fe
te

fe
2=

)

]

1011
000A

0002
FAILING MODULES: C.S. BUS

MIC>LOOP )

N
(SPACE

BAR)

—————r

(SPACE B3AR)
X

e—

ANY CHAR. TO RESUME

FULL SPEED.

$C «—

&
42

1414

10137

MICRO

DIAGNOSTIC

TEST
NUMBE
INDEX

CONTR-C
OL
70 KETURN TO MONITOR

UNDERLINED

RESPONSE

CONSOLE "T0 10" REGISTER DATA

106

TXREADY

439

Sb4

8«

S6u

Ta?

% 661

vV BUS

SECTION

NUMBER

RXDONE

LINES

DATA

104

SECTION NUMBER

ToR
Tac

INTEGRITY

CONSOLE IO CYCLE FUNCYION

15=1282

TAD

RXCS REGISTER FROM THE ID BUS SIDE

SECTION NUMBER 06

151282

TQE

TXCS

1Se1367

SECTION

16=1529

SECTNO

17-153s

TOF
Tie

NUMBER

CIB

NUMPER

T14

CONSOLE

INITIALIZE

211817
211817
22-1906
231976
2Ue2061
2ue2061

SECTION
Ti4
T1S
T16
SECTION
T1Y

NUMBER DA
‘
WCS ADDRESS REGISTER DATA INTEGRITY
WCS ADDRESS REGISTER COUNT LOGIC
MICRO STACK DATA INTEGRITY
NUMBER 0B
MICRO STACK DUAL ADDRESSING

DUAL

T18

SECTION

NUMBER

26=2327

T19

27=2372

TiA

MAINTENANCE RETURN MICRO $TACK

MICRO

RETURN

STACK

118

WCS

TiC

€S BUS DATA

PARITY

SECTION NUMBER @D

WRITE

T4D

PCS

PARITY

TAE

wCS

SECTION

DUAL

NUMRER

TiF
T2@

WCS DYNAMIC MEMORY
UBEN FIELD DECODE

34=3060

Si=3960

3S+3168
36-3229
36=3229

317«336S

T21

USUB

A2ASSA
2534 M@a5S4
25315
2536 890556

INTEGRITY

TESY

o
OF THE CS

BUS BY FLOATING

EXECUTING TRE MICRO=~

BUS FOR PARITY ERRORS,
T

BP
—

CHECKS

THE

BUS

INTERFACE

OF THE WCS MEMORY CHIPS

THE

WCS

MODULES,

AND THE DATA

THE

INTEGRITY OF

ERROR DESCRIPTION

DATAs EXPECTED V BUS CHANNEL, BIT AND VALUE

RECEIVED v BUS CHANNEL,

BIT

AND

VALUE

LOOP COUNT = INDICATES WHICH BIT IN THE 32 BIT GROUP IS UNDER

TEST,

1.E,

1®BIT @,

TEST,

I1.E,

2=8IT 1,

3=BIT 2,

ETC,

LOOP COUNT = INDICATES WHITH
32 STYT GROUP 1§ UNDER
NOTE:

BITS<3110>,

HAS

BAD

PARITY

101X3BITS<63132>,

SYNC

POINT

2aBITS<63:32>,

SSBITS<9S164>

THE EXPECTED AND RECEIVED V BUS CHANNEL INDICATES WHICH 32 BIT
GROUP

AND

IT,

1,E, {O2Y#B1YS<3{i30>,

100XEBITS<9S1604>,

ToTm T

DESCRIPTION

T
T

SUBTST

« SYNCUC==TEST PATTERN IS ACTIVE ON THE C8 BUS

SUBTST

Yoo
Rl
TIC!

SYNCUD=<=TEST

PATTERN

ACTIVE

THE

AUS

_
T
’
e e
T L T Y T T
o
T
I
-

INITTALIZE
SUBTEST

2538

3 FIRSY
I

2ERO

THRII

THE

BUS
)

J,1,3

3 LOOP COUNT FOR THE 3 BANKS

004579

2543

aoesS7te

LoO®

2544

00606

Ko1,3

LNIDREG

USCOAT,TMPIA2

)

I,1,32

1 LOOP CODUNT 'POR YHE BITS IN A BANK
—~

LDIDREG USCADR,TMP1a@

820614

ENDLOOP

LooP

G0D63Q

2549 0@e63s
2550 AoR64d
2581 0008646

3
?

SELECT LOCATION ZERO

INITI
THE
ALIZE
CONTENTS

3 LOAD

FETCH

3 EXECUTE THE MICRD WORD

ERROR

10089

OFLOCAT8
ION

oees

LDIDREG USCADR,TMP108,J

FLTZRO
TtMPiORf,1
"
FR| 0OP
1
LOIDREG USCDAT,TMP1O}

2552 200654

THE

BANK

ADDRESS

1 GENERAYE
YRE TE&Y PAYYERN

LOAD 'INTO THE BE(ELTED BANK

SYNC POINT

LooP

RANGE

2542

2548

UJMP FIELD DATA INTEGRITY

FLOAT

Loop

2547 2800620

FUNCTION"

/////////////7//////7/)//////////////

T1CSt1t

2519

2545
%46

T22
USUB FIELD "RETURN®
SECTION NUMBER 10
T23
USUB FIELD "SELECT SPECIFIER"

THE CONTROL STORE (CS) AUS,

2541 B0AASLO

CHECKERS

"CALL

280556

2540

ADDRESSING

FIELD

NA AN AR AR R AN SR N AR

:///////////////////////////////////////

INCAEMENY

SECTION NUMRER oFf

INTEGRITY

OISABLE

31=2748

DATA

GENERATOR

INTEGRITY

TEST

302621

32-2845
332959

DATA

R RN NN N RO

o
DATA INTEGRITY

THE

DESCRIPTION

2S+2158

MAINTENANCE

LOGIC

STORE

262327

INTEGRITY

ADDRESSING

CONTROL

:
SUBTST1 = FLOAT A ZERO
THRU THE CS 8uUs

T13

THE

DATA

AND A 2ERO THRU A MICRO WORD,

A9
REGISTER

PABE 29

SUBTST 2 « FLOAT & ONE THRU THE ¢S BUS

WCS DATA REGISTER READ

BUS

R AR

AND CHECKING THE

181677

3te2807

> NUMBER

BuUS

20-1771

3020621

LINE

INITIALIZE FUNCTION

SECTION

T12

STARTING

1D BUS REGISTER ADDRESS INTEGRITY

NUMBER

AN R

THIS

TEST

CONSOLE MAINTENANCE RETURN
THE

W37

CS BUS DATA INTEGRITY

R R

A ONE

’
’

CONSL FROM ID REG CLX CTRL & DATA INTEG

2C«APRe77

SECTION NUMRBER 24
Te9
CONSOLE CLOCK CONTROL

13«1a70

M1O

PAGE #

WORD,

’

INTERRUPTS

MACRO

DESCRIPTION
THIS TEST CHECKS

DATA

TEST

SELF TEST

11 991

BUS

ITEST

)

"MCR"TM

AND

A AR

’

INTEGRITY

DATA
CONSOLE "IDCS" REGISTER
REGISTER DATA INTEGRITY
INTEGRITY

8«

28e2424

SECTION NUMBER 22

TEST

INTEGRITY

P R
144

)
?

CONSOLE

{29253

PAGE

AND BRUS NAME ASSIGNMENTS
SECTION NUMBER 01
Yo
CONSOLE ADAPTER REGISTER

CONSOLE RXDNE AND TXROY REG DATA INTEGHITY

191745

INPUT

DEFINITIONS

To4

Mic>

OPERATOR

171656

BUS
MODULE

108

161394

HARDCORE

DATA

be 356

t4e1162

CS-BUS

+SBTTL TiC

BIT DEFINITIONS
REGISTER DEFINITIONS

Se 284

13-1270

—_—

12« 975

MIC>SET STEP INST )

TPC = 000662

SWITCH REGISTER
CONSOLE ADAPTER

12« 777
18« 777

TRACE: 000700, 000720

TPC = 000654

HARDCORE PROGRAM LISTING
20=APRe77

206

1010

= 000646

M{P

CMPCA AND CMPCAM MDDE DEFINITIONS

S
S

4e 206

ERFK)R:000676]| TEST.1C41 SUBTEST: 1

TPC

MACRQ

CONTENTS

NO. OF WCS MODULES = 0001
04505506+07,08.0950A:0K,0C

DATA:

TEST

T1C

.05

HARDCORE

MICRO

TiC

DIAGNOSTIC

HARDCORE

€S BUS DATA

TEST)

MACRO

INTEGRITY

MiQ

20=APR=T7

18837

PAGE

29=t

ERROR

2553

INDEX

000662

SYNCUCE

YSTVE

TMP1Q3
)

2554

dgosTQ

FERROR

255% pnasTe

2556 203702
2557 panTRe
25%8
g:sc POMT12
Y]
2561

000722
pART22

ENDLNOP

CSERR;

)

CHECK

THAT

THERE

WAS

PARITY

ERROR

? CONTINUE WITH THE NEXT BIT

ENDLONP J
sKIp
SUBTST

CONTINUE WITH THE NEXT BANK
L

REPORT

CS BUS

<CSBUS>

BIT(S)

STUCK

SUBTEST
l/I/I///////////I///////I///////////////////
//////I//I/////II//I/I/////I////
TI1CS28

Figure

4-11

Loop and
Example

4-35

Single

MICROTEST PROGRAM LISTING

S
E
CONTENT
BL
OF
TA

CONSOLE TERMINAL OUTPUT

; DWM@GA.MCR[400,3262)

2E>TEST

;

MICKRO DIAGNOSTIC

01,02,03,
NO.

V.09

1832

OF WCS MOLDIULES = 0001

DWMB@A,MIC(400,3262]

12113 21°APR=1977

1832 SECTION 3A

TEST A

1 1832] PAGE
]

IEHROR:101EJ | TEST: A5 J
.

DATA:

;E;fiBER

-—

(IF SYNC WANTED
AT THAT ADDRESS)

>>>

-C TO STOP LOOP
44— CONTROL

; 1881
1 1852

4 1858

3 ERROR DESCRIPTION

s :ggz

18%¢

1856

s 1859
1

INPUT

1860

s 1861

3 1862

UNDERLINED

s 1863

1214,

e012.,2039,02083,09F8,02000,10F1

10815, #218,0038,6580,0700,0000,10218

1219,

#018,2038,7580,0A80,0000,1140

1141, P818,0038,4180,0000,0000,1142

1143,

U 1142, 0102,203C+0182,0900,0000,1143

THIS TEST CHECKS THE LOGIC NETWORK ON THE CEH MODULE THAT GENERATE
THE ALU N BIT, AND THE MULTIPLEXOR ON THE ICL MODULE THAT FEEDS

THE ALU N BIT IN THE CES REGISTER,

2001,803C,0180,0A99,0000,1144

:
1144, 9#218,0030,D5080,09E0,0000,101A
101A, 7009,203D,2180,0800,0000,1124
1018, 0000,003C,0180,0A00,0200,1145%

U
U
U

1146,
1147,
1148,

U
U

SUBTST | = SYNCiAe«ALU N BIT GETS LOADED

SUBTST 2 = SYNC{B=eALU N BIT GETS LOADED

1
1

1867
1868

=
ICLTB:

NEWTST(,3)

CALL,J/UNJUAM

1869

181

1873

1
s
8

1878
1876

jgee

SUBTST 3 « SYNCiCeepALU N BIT GETS LOADED

RI21K(,10)

! ADDRESS OF AMX DATA

RU1)K[,20)

3 1872

R{2)K(,30)

? 1874

D.D,LEFTZ

3 CLEAR ANY SBI INTERRUPTS
3 GENERATE MASK FOR N BIT

R(3)LD

1878

s
1
s
1

1880
188}
1882
188)

1984

3 DO THOSE FUNCTIONS REQUIRING THE ALU TO DO AN A PLUS B

7T8si:
=9

RC(8C).K[,6)
SUBTEST

DIBYTE)L.CACHE,P

3 FETCH AMX DATA

ICLTBL11VALRIR)

RC(S)aD
VALR(2)

114C,

1892

DD« SXT[WORD)

101C, #¢p0,003D,0180,0800,0002,1@FD

1894

U
{14E, 08031,0020,2180,0800,0000,114
U 114F, 081C,2034,0180,0A10,0000,1150

1
;1

189¢
1897

1899

1901

SYNCiAs ALU,LA+LC,CLK UBCC,BYTE]

1 1904

ALULQeD,CLK,UBCC

;1 1893
3 189"

U 1150, #810,0038,31803,3D75,0000,115}

1 16898

U 1152, 0000,003C,01980,2928,0000,1151

1151,

20002,003C,0180,0A28,0000,1152

1153,

@010,8014,01802,0800,0010,1154

U 1154, 0000,003C,31Fa,2C00,0000,119%6
U 1156, 201C,0034,01C0,PA18,0000,11%7

U 11%7, 001D,2000,2180,0800,0010,1158

=10

1158, #000,013C,0100,0800,0000,101F

1900

1 1902
1 1903

;1 1908

101E, 0001,203D,0182,29E8,0000,1109

; 1906

U 1159, 0018,0014,2580,0A80,02000,115A

1 1908

R{S)LD
VALR(1)
DIBYTE).CACHE,P

3 1891

{e1r,

0009,003C,0100,0A00,0000,1159

115A,

7000,003C,0180,2A08,0000,1188

U 1158, an18,0014,0560,0A08,0000,115C

SAVE

ABYY R/IIIIIIIIEPIIII L2 E0000 2000000000200 7000000000770200000000172777004100777

1889
1890

101D, 9810,0038,7150,0970,0000,114LF

ADDRESS OF BMX DATA

) ADDRESS OF EXPECTED ALU N BIT

DuK[+80)

1
1

0802,403C,0100,0800,0000,114D

IS BEING USED,

3 SYNC POINT DESCRIPTION

1149, 9001,203C,0180,29A0,0000,114A
114A, ¢000,203C,0100,0K10,0200,1148

—pdU

INDICATES WHICH DATA PATTERN

(SEE THE DATA AT THE END OF THE TEST)

1886
1887
1888

U 114D, ©0001,003C,n180,09F0,0000,101C

RANGE

LOOP COUNT «

1
s
1

U 114B, 0020,493C,0100,C000,0000,114C

LOOP

RECEIV%D CES REGISTER

lUIQOQQ!Ql...llil!i.l..bl.l'.l.li.'l.b.l.i!'!!l'blll&!li!il!lil.!l!i.&#.

3 1885

¢001,803C,0100,0AN8,0000,1147
0000,003C,0180,0A00,0200,1148
07000,803C,0100,C800,0000,1149

DATAI EXPECTED CES REGISTER

1966

1865

U 114%, 04000,803C,0180,0800,0000,1146

¢t 1879

INDEX

BE EXECUTING ANYTHIN BUT AN A+ OR A=B,

3 LOGIC DESCRIPTION

31 1870

U 1142, 2019,8638,7980,0A90,0000.,1141

SUBTST 3 = CHECK THE DATA PATTERNS THAT REQUIRE THE ALU 710

1864

U 1218, v#ene,2030,0190,0800,0000,113%

ERROR

BE EXECUTING AN A+B TO0 GET THE CORRECT ALU DATA,

SUBTST 2 =« CHECK THE DATA PATTERNS THAT REQUIRE THE ALU TO
~ BE EXECUTING AN A«B TO GET THE CORRECT ALU DATA,

y
3

o CHECK THE DATA PATTERNS THAT REQUIRE THE ALU TO

}3 1848
1649

OPERATOR

3 1847

CONSOLE PROMPT

SUBTST

; :::: :

START SCOPE LOOP

H18

1843

MIC>RET)<——— RETURN TO CONSOLE
a—

BY SELECTING THE ALU TO DO A+B AND AeB, AND F=B, WITH SPECIFIC

21;1 ::;rtaus ON THE AMX AND BMX T0 CHECK THE LOGIC THAT GENERATES

st 1844

$ 1645
1 1846

TEST
STARTING

00000003

00000000

MIC>LOOP)

CES REGISTER ALU N BIT®

CES REGISTER ALU N BIT

3 TEST AS

3 :::? 3

INDEX

00000200

*—

).Qil.6..........0.0.!.l".l'IG.l"l".."..llll0...!.QO!Q...'IQ!'Q!!.QIQ!

s 1839
) 1842

MIC>CLR SOMM: 1153

"TEST AS

Page

! ::;g ! TEST DESCRIPTION
THIS TEST CHECKS THE ALU N BIT IN THE CES REGISTER, THIS 1§ DONE
s 1838

LEiIBER
u

SUBTEST: 1

s 1838

18'1911011371[)11[‘71Ev1Fr2012112217 !24!25726v27128!2‘712ArQByQC!ZDIQEr

)
FAILING SECTION

1 1834

04!057'067071081091091081()(:!0['10Ev0F710111712!13114115716!177

DFy30,31932+33934935936537 387399@

MICRO 31(241)
Microcode file
TEST AS CES REGISTER ALU N BIT

14135 20=APRe1977

1907

1909

3 1910

wmp

SAVE

FETCH BMX

SAVE
.

DATA

) FETCH EXPECTED N BIT DATA

RC{OL)..D

) SAVE

DaeRC [PE]

D.NOT,D
DWDAND ,R([3)

]

IDICES]I.D,D.RC(GE]

s=p

)

DI{WORD).CACHE P
ERLOOP

SET THE LOP COUNT

3 GENERATE INITIAL VALUE OF N BIT
} MASK

3 INIT THE CES REGISTER

LABLR([S5]

LCLRC(S

3 LATCH AMX AND BMX DATA

Q.. ID [CES]
0.0, AND R3]

1 MASK

ERROR2,RC(ADILG
LABLR[®)

EXECUTE THE TEST

1 CHECK

y ALU N BIT FAILED IN CES REG

RlO1LLAGKL, 1]

3 INCREMENT ADR OF AMX DATA

RI11LASKI 1)

3 INCREMENT ADR OF BMX DATA

LABLRI[1)

TK-0775

Figure

4-12

Microtest

4-36

Scope

Loop

Example

shown

followed
loop and

4.9.4
During

4-13

Figure

4-12,

the

operator

has

Microtest Single Bus Step Setup
microdiagnostic execution the error

example,

entered

by a RETURN (RET) command. This sequence
returns control to the console program.

printed

execution

the

terminal.

section

stopped

As
in
Paragraph
4.9.3,
indicating a microtest. A

message

console
test

the
look

error
at the

that the error PC is on line 1948.
use the single bus step capability.

Control

breaks

shown

the

test

Figure

3A.

PC
1is
a
four-digit
number
section 3A listing indicates
this

point

decided

A scan backward through the microcode indicates a possible 1loop
between SYNC1B (line 1943) and ERLOOP
(line 1936). A point in the
loop is chosen to stop the microtest, in this case UPC 116C (line
1949). The operator enters SET SOMM: 116C, which sets the stop on
micromatch bit and loads 116C into the microbreak register. A loop
command

then

entered

which

When the loop reaches UPC 116C,
UPC on the console terminal.
At

this

point,

the

initiates

the

operator

enters

time
and

operator
UPC
1is

bus
command).
Each
cycle
1is
executed

the
the

execution

microtest

the

bus

halts

cycle

the

loop

the

operator

the

operator

has

exited

typing any
previously

Fiqure

4-13,

the

1loop.

prints

the

mode

(set

step

types SPACE,
displayed
on

terminal.
At
any
point
current conditions.
shown

and

single bus
the
console

may

from

scope

step

mode

the

character other than SPACE. The program control flags
set are cleared.
The
HI
flag
is
set
to
restore
the

normal default case.
stop
on
micromatch

A CLEAR SOMM
bit
and
the

CONTINUE 1is performed
sequential test (i.e.,

is then performed to clear the
microbreak
register,
then
a

to begin normal test execution at the next
A6). If the operator feels that the problem

has been cleared, it is probably
over rather than to begin at the

4-37

practical

test.

start

the

tests

MICROTEST PROGRAM LISTING

TEST HEADER AREA

CONSOLE TERMINAL OUTPUT

TABLE OF CONTENTS

=arTEST

—

1832 SECTION 3A

1149,

TEST A5

1144,

MICRO DIAGNOSTIC
V.05
01,02,03,
NO. OF WCS MODULES = 0001
04705706707vOBvO?rOfirOByOCrOUrOErOF!10!11912!13!14115!161177

18519y 1Ar 1By 1Cs 10y 1Ey1F 1209219 22923924925926927+28929r 209 2K

2F930r31932+33+34935+36937,38,39,34,

2C» 201y 2E »

t14C,

U
U
U

114D,
101C,
1210,

{ERroR: 1026 [ | TesTias | susrest:2
)

)

TEST

DATA:

0001,203C,0180,09A8,0000,114A
¢000,303C,0100,0A10,0200,1148

0808,403C,0180,0800,0000,114C

INDEX

MICROBREAK MATCH UPC
= 116C

0082;403(’-0180'0!0000000'1140

9081,003C,n1088,09F0,0000,101C
7007,003D,0180,0800,0000,10FD
€4810,9038,7180,0970,0000,114L

)

1892

;
1
s

189)
1894
1098

t14E,

1150,

7910,0038,3180,3D73,0000,11%1

v 11:§.

eooo.galc.oisa.aoze.aooo.1:52

1183,

0010,8014,0100,0800,0010,115%

1981

U
U

1156,
1157,

190)

11508,

001C,0034,031C0,0A1¢,0000,11%7
#91D,2000,0180,0800,0010,1158

1904

U
U

101F,
1017,

0001,203D,0180,09E8,0000,1189
02000,003C,n180,0M00,0000,1159

3
1

1151,

08a1,00208,03190,0800,0000,114F

061C,2034,2180,0A10,0000,115%0

0002,203C,0180,0028,0000,1152

1159,

018,0014,05080,0060,0000,11%hA

1154,
1158,

MGB0,003C,0180,0000,00020,11%8
0a18,0014,0580,0A88,0000,115C

DaNOT,D

1908

1
;

MASK

ALU,Q=D,CLK,UBCC

}

CHECK

ERROR2,RC(AD]..0
LAB_R(2)

ALU N BIT FAILED IN CES REG
)

THE

INCREMENT

ADR

AMX

DATA

INCREMENT

ADR

OF BMX

DATA

INCREMENT

ADR

LooP

115¢C,

9000,003C,0180,0A10,0000,115D

1150,

0018,0014,0900,3490,0000,115E

1912

RI2)LASKE, 2]

LABLRI2)

1155.

2010,8030,0180,0960,0700,135F

;

1913

D.!C[?C]

118F,

0019,8000,0580,09E0,0010,1160

1914

RC [oC).DeK[,1],CLK,UBCC,BY

)

CHECK

1020,

2000,003C,0180.0000,0000,101B

3§

1916

J/ICLTBLY

CONTINUE

1 1915

INPUT

1:19

1920

1;;:

1 1921

ANY KEY LEAVES STEP MODE

U 1021, 7010,0038,0900,09E9,0000,1022
U 1022, 7900,003D,0180,0000,0000,1124

TEST

UNDERLINED

—

THE

EXPECTED

DATA

€0
P

COUNT

VL1717 7007000770200007200007008070020707700700000070770007027747272000070007047

3 NOW CHECK THOSE PATTERNS REQUIRING THE ALU TO DO AN A MINUS B

1 1924
; 1925

U 1023, 000¢,003C,0180,0000,0200,1161

RESTORE NORMAL FLAGS

0wQ,AND,R[3]

LAB_RI[1)
RI31LAGK(,. 1)

(SPACE BAR)

MIC>SET FLAG HALTI

LATCH AMX Auotsnx DATA
EXECUTE

1909
1910

UPC = 116F

:::’

3
)

QuID(CES]

191}

N BIT

INIT THE CES REGISTER

ALULLA+LC,CLK,UBCC,BYTE

GENERATE INITIAL VALUE OF

MASK

RIG)LLAGKL, 1]

(SPACE BAR)

—_—

LCSRC(S]

SYNC1A3

1908

1906
1907

LAB_RI[S)

1900

1 1902

R([3]}

ID[CES).D,D_RCIAE)

§19899

: :::;

1C_<— CONTROL-C TO GET COMMAND MODE
MIC>CLR FLAG ALL
)
THESE 2 STEPS

SAVE

DD AND

UPC = 116E

@——

s®mp

1898

OPERATOR

FETCH EXPECTED N BIT DATA

}

DD« SXTIWORD]}

1896

(SPACE BAR)

)

RC[OL).D
ERLOOP
DSRC [AE]

1897

VPC=1160

UPC = 1170

SAVE

;

9000,013C,018¢,0800,0000,181E

}

D(WORD).CACHE, P

U 1160, 7000,013C,0180,0004,0000,1020

MIC>SET STEP BUS

VALR(2)

1891

114F,

U
U

MIC>SET SOMM: 116C

RC[S).D

1090

MIC>LOOP

1609

)

U 1154, 0099,003C,31F0,2C00,0000,1156

NUMBER

;

1148,

$ 1926

U 1161, #0002,803C,0100,C000,0000,1162

; 1927

TES2:
=@

RC[EClLK[,2]
SUBTEST

1 SET THE LOOP COUNT

DIBYTE}LCACHE P

) FETCH AMX DATA

ICLTS8L21VALR(e)

wc>co~r)

FULL SPEED, NEXT TEST

—

1163,

00002,203C,0182,0A08,0200,1164

1929

VALR({1)

U 1165, @001,003C,0180,09A8,02000,1166

;

1931

RC{3).D

1167,

1168,

;

1933

1934

U 1164, 0000,803C,0180,C000,0000,116%

1166,

U 1169,

‘U

—o{U_

.
RANGE

U
MICROMATCH

—»{U

ERROR

PC
INDEX

0000,003C,0180,0010,0200,116?

06802,403C,0100,0000,0000,1169

0001,003C,0100,09F0,0000,1024

DIBYTE]JLCACHE,P

1932

DaD,SXTIWORD)

BCLPEL.D

0000,003D,0102,0800,0009,1aFD

1164,

0801,0020,0180,0000,0000,1168

§938

116C,

0010,0038,3180,3070,0000,1160

ID (CES)

1941

LABR{S

116D,

116F,

0000,003C,0100,0A20,0000,116CL

0000,003C,01080,0928,0000,116F

U
U

1171,
1172,

001C,7034,01C¢,0418,0000,1172
9010,2000,0100,0800,0010,1173

3173,

0000,013C,0180,0800,00

1026,

0001,203D,0180,09E8,0000,1109

#010,8000,0100,0000,0010,1178
0000,203C,31F0,2000,0200,1171

1936

;

1943

1944

;
1

226

ERLQOP

DaRC [OF]

D.NOT,D

194;

)

VALR([2)

1024,

1937

} FETCH BMX DATA

DIWORD)LCACHE,P

1 193%

1075, 0010,0038,0186,0970,0000,116A __

1167,
10,

0602,403C,0180,C000,0000,1168

U
U

»>{U

1 193¢

DRCTQE)

]

ALU_LA=LC,CLK.UBCC,BYTE]

§948

FETCH EXPECTED N BIT

SAVE

GENERATE

INITIAL

INIT

CES

THE

Q.0,AND,R([3]
ALU.Q=D,CLK,UBCC
=0

ERROR2,RC [0D] .0

DATA

]

VALUE

LATCH AMX AND BMX DATA
EXECUTE

1
1

MASK
CHECK

ALU

BIT

)

0LIDICES])

1945
1946
9

LCLRC(S

SYNCiBs

SAVE

THE TEST

BIT

FAILED

CES

REG

TK-0776

Figure

4-13
Bus

4-38

Microtest
Example

Single

MACRODIAGNOSTIC

5.1

DEFINITION

PROGRAM

CHAPTER 5
DESCRIPTIONS

TERMS

Module -- The diagnostic programs are written in a modular format.
Each module (file)
is a part of the program assembled separately.
Modular programming allows the development of
large programs
in
which separate parts share data and routines.
Assembler

VAX-11

-Macro

one

language
Linker

The

MARS assembler
(which runs on
assembler (which runs on a VAX-11l)

and

produce

The

source

modules

relocatable

VAX/VMS

linker

PDP-11)
and the
are programs that

written

object modules

and

the

cross

linker

one or more native code object modules produced
Linking consists of three basic operations.
1.
2.

Allocation

virtual

Resolution

memory

MACRO

and

assembly

symbol
accept

the

tables.
as

input

assembler.

addresses

intermodule

symbolic

references

(global

symbol
s)

Initialization

Program Defined Symbols
are
either
internal
or

the

contents of

-- Program defined
external
(global)

memory

image.

symbols
(and
to
a
source

labels)
program

module.
An internal symbol definition
(and reference)
is limited
to the module in which it appears.
Internal symbols used by the

diagnostics
assembler.
A

global

are

temporary

symbol

can

definitions

defined

one

that

are

source

resolved

program

the

module

and

referenced by another. Global symbols are preserved in the
module and are not resolved until
the object modules are
into an executable program by the linker.

Program Sections
sections (.PSECT)
program

developer.

defined program
the assembler.
Through

—-- The
within
In

program

assembler
creates
a
number
of
program
a module, according to directives by the

addition,

section

object
1linked

sectioning

virtual memory
allocation
established by the program

any

placed

the

code

that

precedes

the

BLANK

program

developer

the

first

section

controls

the

of
a
program.
Any program
attributes
section directive are passed on to the

linker.
Thus
program
sections
can
be
declared
as
read-only,
non—-executable, etc. Refer to the VAX-11] MACRO Language Reference
Manual for an explanation of the various program section attribute
functions.
In the diagnostic
section.

programs,

each

5-1

test

given

separate

program

5.2

OVERVIEW OF

The

macrodiagnostic

written

VAX-1l1l

supervisor)

which

are

native

assembled

Each

program

sections

format

MACRODIAGNOSTIC

programs

and

code.

and

routines

set of

supervisor.

contains

that

are

the

and

one

conventions

Note

PROGRAM

diagnostic
the

supervisor

programs

These modules are

separately

module

the
Each

consists of modules.

program.

the

THE

1linked

program

organized

that

separate

then

them

described

the

This

MACRODIAGNOSTIC

section

PROGRAM

describes

the

LISTING

program

1linker

this

The

common

interact

are those assembled by the MARS assembler and linked by
linker
in compatibility mode.
The
format
will
change
native assembler and linker are used.
5.3

the

files,

sections.

according

enable

listings

are

(and

with

chapter

the cross
when
the

DESCRIPTION

1listings

general

terms.

Illustrations and examples are taken from the MBA RH788
program. The formats of the other listings are similar.

diagnostic

Each

program

created
the

listing

the

program

begins

linker

constitute

with

user

information

program.

The

separate

the

rest

and

modules

listing.

The

called the header, defines symbols and labels
routines
that
are
called
by other modules.
The
follow contain the test routines.
User
Information -- The
beginning of the listing,

link

map

that make
first

module,

and provides
modules which

user
information,
which comes
includes the following items.

the

Program identification
Copyright statement
Program abstract
Hardware and software requirements
Prerequisites to running the program
Load and start instructions

Program description
History of program maintenance

Link Map -- The link map shows the virtual
the
total
program
image
in
the
program

synopsis.

Figure

5-1

shows

this

synopsis

memory allocation of
section
allocation
for the MBA diagnostic

listing.

The

program

according

attributes

program

section

the

and

section.

allocation

order
the

The

synopsis

which

base,

end,

base

lists

the

program

sections

they appear

in memory.

A list

and

are

for

address

1is

1length

the

virtual

given

address

each

the

first location in each program section assigned at link time. This
number must be added to the relative addresses given in the module
listings
to
determine
the
wvirtual
addresses
of
specific

instructions
the

base

because
the

the

program

assembly

section.

5-2

addresses

are

all

relative

VIRTUAL

MEMORY

THIS

- VIRTUAL

MEMORY

STACK SIZE

VIRTUAL

12843

BLOCK

LIMITS

USED

_—e
N e
e

LINKER

HOLES

BYTES

RYTES
BYTES
BYTES

HOLES

OF
OF
OF
NF

182

HOLES
HOLES

SECTION

CSTSTCNT>?
2

CARGLIST>1
<SBUFFERS>
SCLEANUP>:
<DISPATCH>S
CDISPATCH_
X>3
<HEADER,CODE>:
CINITIALIZE>:
CSUMMARY>s
<TEST

ARNARSFF

ApARRUAR

173
T7R |

fea132

Qra132

BYTES
BYTES
BYTES

ALLOCATION

Wy ly
apgya

SYNOPSIS!?

RASE

END

LENGTH

,
WRT
,NOWRT

pooepgra
20201208

AERRONDQ

pe000000

,NOWRT

Q204284

prgn028
22000287

nA020082
eoe00004
PARR0000
20001831
PAAAO3IA8

ATTRIRUTES

<$ABSS>
<SSHEADER>:
ABS

Np200

427s2

NAME

X4,6

268

NUMBER OF P=SFECTS DEFINED?
NUMBER OF GLORAL SYMBOLS:
PROGRAM

VERSION

apvTo

8
12
16
2»
24
32

FXERLTM

212%¢&
BYTES

OF
OF

"ESCAA

20«SEP=T78

Se3

(BYTES)?:

HOLES
HOLES
HOLES

(OCTAL)t

(BYTES):

LARGEST FREE HOLE SIZE?
NUMBER OF HOLES FREES
47

IMAGE

DYNAMIC MEMORY AVAILABLE
MEMORY

CROSS

DONE

PAGES):

IDENTIFICATIONS

DYNAMIC

WAS

LIMITS:

(PDEC,

DISK

ALLOCATION

021>

<TEST_r@2>:
<TEST_ ee3>:
STEST,CRu>}
<TEST _@G05>:
<TEST_0rb6>:
<TEST_ 007>:
<TEST
_ 008>
<TLST_ 029>
STEST_ P10>3
<TEST_ Q2t1>:
CTEST_ 012>
CTEST 213>
<TEST_ 014>
€TEST 215>

<TEST _Dle>:
STEST 017>

NORPIC,
NOPIC,
NOPIC,

USR,

CO\,

ARS,

EXE,
RD
RD
LCL,NOSHR,NOE
XE,
RD
LCL,NOSHR,NOEXE,
LCL,NOSHR ,NQEXE,NORD

NOPIC,

USSR,

CON,

FEL,

LCL)NOSHR,

NOPIC,

USSR,
USSR,

CON,
(CON,

REL,

NOPIC,

JSR,

REL,

NORPIC,

SR,

coN,

NOPIC,

USR,

NOPIC,
NOPRIC,

USR,

SR,

NOPIC,
NOPIC,
NOPIC,

'SR,
''SR,
U8R,

CON,
CON,
CON,

REL,
kel
,

NOPTC,

USF,

NOPIC,

ISR,

NOPIC,

USSR,

SQPIC,

USSR,

NOPIC,

ISR,

NOPIC,

NOPTC,

USSR,
USR,

-USR,

CON,
CON,

ARS,

FEL,

O0OVR,

ExE,

REL,

CON,

EXYE,
LCL,NOSKR,
LCL,NOSHR,NOEXF,
ExF,
LCL,NOSKHR,
LCL,MOSHR,NOEYE,
LCL,NOSHR,MNOEXE,
EXE,
LCL,~OSHR,

HFEL,

COM,

LCL,NOSHR,

REL,

LCL,KOSHR,

CON,

REL,

rONn,

EXE,

s NOWRY

Q0002200

ARARRAZ00

2Pa00288

BBAA1ABS
PRPPA1ELS
P0RB25FF
APRAA266F
PRAA2BUF

WRT

,NOWRTY

20021 ARC

WRT

¢a002002

WRT

0P2226007

,NOWRT

22202670

RD
KD
RD
RD

,MOWRY
,NOWRT
,
WRT
,
WRT
,NOWRT

Q20202850
2000Q2A00
0@2@2E3C
20203294
222a3220

RD
~RD

pPe2867
PPAR2E3A

200023091

220n0600

rac@oe7e
280001E0

peeoeos18
200003438
A00Ba256

LCL,NOSHR,

EXE,
EXFE,
FXF,

,NOWRT

20003400

A0CP3698

2R22829C

REL,

LCL,NOSHR,

EXE,

,NOWRY

2ORrQ@380Q

20020188

CON,

REL,

,NOWRT

20103400

REL,

LCL,NNSHR,
LCL, NOSHR,

EXE,

CON,

FD
RD
RD

,MNOwWRT
,NOWRT
,NOWRY

QR2PQu2en
222044002
20004600

A0AP3987
2APRU1S2
BRDRU2AT

22203290

P000000A

2eQ2335S

eaven1se

a@rae7s3

220000A8
CANRAIE
APRALTT3 Apeee174

KFL,

€L, MNOSHFR,

ExE,
EXE,
EXF,

CON,

REL,

LCL,MNOSKHR,

EXE,

,NOWRY

202204802

PRAARSLIFC

HSR,

conN,

HEL,

LCL,MOSHR,

EXE,

,NOWRT

PP20520Q

CON,

RPEL,

,MCWRT

2Q425CaQ

ARORBSADY ‘eaoensDs

CON,

HEL,

€OV,

LCL, NOSHR,

LCL,NOSHR,

EYE,

CON,

REL,

LCL,NOSHR,

WS8R,

COMN,

REL,

EXE,

,MNOWRT

2002680272

NCPIC,

SR,

CON,

EXF,

,MOWRT

20QpeCee

NORIC,
NORIC,
NOPIC,

118R,
JS®e,
USR,

CON,
coN,
CON,

Felo,

LCL, NOSHR,
LCL, NOSH®,
LCL,HOSHR,
LCL,NOSHR,
LCL,"0SHR,

ExE,

,NOWRY

200@70020

EXF,

,NOWRT

22407800

NOPIC,

USSR,

CN0M,

NOPTIC,

USP,

NOPIC,

USR,

NORPIC,

wEL,

REL,
ReEl,

2EL,

POABLSE

PB000B9FD

v2ARRSENR

anpan2ecC

A2AALTOD

PAeUBT79E

AARBOASY
PRABRGF2F
AEOBT6HLS

Pea08330

EXE,

,NOWRT

R0727C0OR

NORATAE
B@RBBFFC

FXE,

,NOwWRY

Q20290002

A2AN91SA8

ereeaasa
28080616
t300022F
0OOBI3FD

P30071159
TK-1118

Figure

5-1

Program

RH780

(MBA)

Portion

Section

Diagnostic

5-3

the

Synopsis,

Program

The

link

map

also

1lists

the

global

symbols

and

their

assigned

Note that symbols used as labels point to routines

values.

diagnostic

supervisor,

their

values

are

over

in the

10000.

Figure 5-2 shows a portion of the global symbol
absolute program section in the header file of the

table for the
MBA diagnostic

program.

The

link map

part

the

listing

created

not a part of the actual program in memory.
first

file

the macrodiagnostic

of
a

Module -- Like all
module begins with

Header
header

Statement,

and a

Revision

program

the

linker,

but

It always precedes the

listings.

the modules in the
Contents,
Table of

program, the
Copyright
a

History.

The declarations section in the header module contains global
symbol definitions for register bit names, data patterns, masks
referenced by the program, and Macro definitions. This section
constitutes the beginning of the program code. The own storage
section in the header module contains program labeled data, such
statements,
format
and
text
program
and
addresses,
drive
as
containing

the

ASCII texts of error and

status messages.

The header module also contains code that generates the hardware
report and print routines,
and software parameter tables,

initialization and clean up routines, and interrupt and exception

service

routines.

The assembler prints a symbol table and a program section synopsis

for

the

entire module

following

the

last program section

in the

module.

Test Modules -- The remaining modules in the program contain the
tests, which are the main body of the program. Each module begins

with

Table

Maintenance
definitions.

provided by the
each

test

Contents,

History.
A symbol

assembler

module.

Statement,

and

Program

macro
with
begins
code
program
The
table and program section synopsis are

Notice

following
that

each

section.

5-4

the

last program section for

test

begins

new

program

*ww FILE:s

Seq,
0

ESCAA1,0RJy1

NAME
€,

ABS

TITLE®

RH7BO, HFADER

ALIGNMENT
>

BYTE

IDENTs

RASE
@

5,3 20P=SEP=1978

END

11104

LENGTH

AAAAARCD ARQAPARRA 2PNRAGND
GLORAL

SYMBOLS

DEFINED:e

SENV

PRR2RRQY

$MO

A202D0A1

ASSA

AASS

RRAGAASS

ADAPTER,_ CODE

QrARRR2n

ALL

M0OAASSA

ALL,ONES

QARAFFFF

ASR,OFFSET

ATTENTION

AAARAYY b

Reeiaone

ATA

BLKSCSBI

PeARBO1C

ATTN
BLKSND,COMD

2402418
{earaapn

pecnceel
LT

RR?

BCR
BRQ

2anviuaL2
NQPAPA1S

22022210
20000016

BR1

VR0 1

8RY
BR7

npeeRRaty
eceed3a17

AYTER2
CAR
CRTED_READ, DATA

DATA_XFER_DONE
DISABLE_LOG

DPE
DRIVE_OFFSET
DRV, INITMASK
DTE
DVA
ERR

FaoF

BRS
BYTE®

NAFFaRep

RYTEZ

N200AR1C
20209020

ARARATAR
PAPRARAN

BYTE,COUNT_MSK

@00RFF@Q
BOAGFFFF

DATA_XFER_ABRT

20001000

LLLLECT

aepp229a

DATA_XFER_LATE

0Q¢PPARQD

pMD

DEFAULTY

aeReanpy

poce

P2Qea800

Ae2122
ARAPERGR
ARPARABA
peAARAN2

ERL

DR
DRV_ERRMASK
NS, M8k
DT, BUSY

80002000

eR0A4N0R

ERR, CONF

ARAGAAL A

ENABLE_PS

2200 Pr2N8

P0020820

EXT _REG_OFFSETY

FATL

NORQFF

NARAGAL3

HP® A, CHANNEL

Arpaang 4

HPER, DRIVE

ArACANR 2

HPSQ_DEVICE

eAR23200

IMAPP

NPT, NEVICE

Qveaa01D

0000024

HPSL IIRVEC

deRrPR24

IMRCP

A0R8

PUA2AQ1E

aee2823

ILF

aeeeae1c
80020001

HP$A,DEVICE

HPSL, VECTOR
IMBDP

INVRT MA,CPAR

4reen9en

INVRT MR, DPAR

-A00A0012

BARLRAAPD

LOWBITS MSK

I0,PAGE

BAARAATZF

MAINT,MODE

BUIFFFFF

MAP

QPAAC22A

MAP,PTR_ MSK

PATTRN

MAP, OFFSET

A2R20809

MASS,CNTRL,PE

MAP PE

0rP20000

MASS,CTOD

MASS_ECP

AAAL AAQ

AORALRR

HPSR,SLAVE

IPLR

MAP

LILITLL
OFFFFBFF

00022004

INT (SEQ, TIMEOUT napanla2

70200002

P02A0R1
4

FERR

@Q@anaqu

MANUAL

eoeceean

nNeR
DRIVE SEL _MSK
NRY
DT,ABQORT

nARADA21

INTERRUPT ENBLE

pa2000a4

fRRRNJ10
geruons8n
enran1180
22001000

HP$8, BR

HPE$B, TR

Jgoenoon

PgPRAFAAF

FORCE_MEMERR

200213
@e000e!
6

@AMAPAFF

FFRaaren

CPF
CSP

RR3

BR6
BYTE1

INVRT _MAP, PAR

INVALID

MASS,DATA_PE

80200218

p2C02a1F
20002000
200003000
ace0200s

enaoeale

00 IFERD
paeeeo4e

. AR0PA08A

MASS,EXCP

222400

AARUQADN
ABANAM D

MBDIB, SEL
MBE_CR1

22802000

MBE _ER

MASS wCLK
MERE, ASR
MBE DRR

MASS_FATL

MBE
MBE , CR?2

APA802AR
NA0AR0QTS
A000p214
22R0QYN8

MBE, DTR

20020218

MBE, SR

NARNAARY

MBE , MR

2002081 C

MASS_,RUN

MOL

NEXUS OFFSET
NIBRBLE?

NIRBLES

NON_XIST, DRIVE

AAAAPAAC

MELK

2PA31000

puannnng

»SR

AAAA20009
AOPRRAFAQ

MIRRLED
NIRRLES

PAFRR20D

NIRBLFG

MBRE

PARAM

MISSED, XFER

FROPAA1A

MULT,
TX

AUNANAQF
ACAAF 3N

NIBBLEY
NIBBLE4

NIBBLE?Y

aoaendae

PN2QRR87
22020100
p8areean
200200FQ

e@eFee0p
FA2@80000

occC
PF_FIELD

0no40v@0

NONP

vApraeL9
PrRL0R9

APAGAARA

aneeean
ARQ0v0R1Ss

Are02e0n

PAGE_ BYTE_ MSK
PGM_INIT

@@20R1FF

PIP

oPY
PF WINTH
POWER , DOWN

AUBrrpAQ

POWER_UP

L IULLITY

NO,RESP_ CONF

4aea2eeo

20000001

TK-1119

Figure

5-2

Global

Symbol

Absolute

PSECT

Portion

Table
of

the

for

the

Loader
File of the RH784 (MBA)
Diagnostic Program

5-5

DIAGNOSTIC PROGRAM AND SUPERVISOR INTERACTION

5.4

Whether a diagnostic program is executed in the user mode or in
the standalone mode,

supervisor

its relation to the diagnostic

basically that shown in Figure 5-3. Once a diagnostic program has
been loaded and the diagnostic supervisor has been loaded and
started, program control moves to the boot routine of the
supervisor.

and

sets

routine

This

the

checks

routine clears vector

flags,

mail boxes,

The boot

registers to a known state.

processor

space,

determine

operator

the

whether

typed

has

Control C and sets up a map of memory and I/0 addresses creating

P?¢

and

block

and

routine.

page

the

tables.

process

initializes

then

control

block,

the CLI

system

then calls

and

The begin routine changes the processor mode
prompt

the

control

the

begin

to kernel

and calls

ready for

(the command flag should be set). The CLI types out the

symbol,

DS>,

indicating

that

the

supervisor

commands. When the operator types in a command (e.q. START), a
parser routine in the supervisor is activated to decode the
command and call the requisite action routines, clear the command
flag, and then call the dispatch routine.

The dispatch routine forms the heart of the supervisor. It begins

by clearing the error count and setting the pass zero flag and
then calls the initialization routine in the diagnostic program to
be

executed.

The initialization routine initializes the unit under test and
sets up conditions in the CPU and on the SBI which are necessary
to the diagnostic program. The initialization routine then
questions the operator concerning the unit to be tested, creates a
hardware parameter table (P Table), tests for end of pass, and

returns control to the dispatch routine in the supervisor.

The dispatch routine then calls the first test. At the end of each
test, control returns to the dispatch routine. At the end of the
last test in the program (or the last test selected by the
operator), the dispatch routine 1in the supervisor calls the
initialization

routine

determines whether

or not

the

program.

diagnostic

This

routine

the end of the current pass has been

reached.

If the end of the current pass has not been reached, the

called,

beginning another

first test routine in the dispatch section of the supervisor is
test sequence.

the

end

the pass

has been reached, the program calls the end of pass routine in the
supervisor.

The end of pass

routine

in the

supervisor

determines whether

not the last pass to be run has been completed. If so, the cleanup
and summary routines in the diagnostic program are called, the CLI

command mode is set, and control passes to the begin routine which
calls the CLI. The CLI prints out the DS> prompt symbol and waits
for operator

input.

5-6

DIAGNOSTIC

SUPERVISOR

DIAGNOSTIC

PROGRAM

DIAGNOSTIC

SUPERVISOR

START

[ =

BOOTSTRAP

PROGRAM

—

CALL SERVICE @

FIRST

ROUTINES

TEST

AND SUPER

RETURN FROM

SERVICE

INIT ROUTINE

ROUTINES

|
ROUTINE

CALL SERVICE
TEST N

PASS

ROUTINES

RETURN FROM

L__J SERVICE

FIRST

ROUTINES

(COMMAND
MODE)

—t——

BEGIN

D OF PASs OUTRNE

YES

]

COMMAND LINE
INTERPRETER

ROUTINE

CLEAN UP

| ____ROUTINE
|

{CLI)

SUMMARY

| _ _ROUTINE_
WITH

OR
DISPATCH

INTERRUPTED
TEST ROUTINE

PROGRAM INIT R(;U—TIN—E
BUWLD P

|G, e

NEXT PASS

TABLES,
INITIALIZE
DEVICE TO BE

GO TO BEGIN

SERVICE

SYSTEM

ROUTINE

ROUTINES

;

(PRINT, ETC.)

GEEES

L|
CALL CLI

ROUTINE TO
INITIALIZE

FIRST TEST

aEEED

TESTED

YES

\“/

CONTINUE

YES

RETURN TO TEST

L-S

SET COMMAND
|
£

CONTINUE

START
RESTART

TK-0507

Figure
and

5-3

Diagnostic

Program

Supervisor
Interaction

If the last pass has not been completed, the end of pass routine

checks to see whether the operator has typed control C.

If the

Control C flag is set, control returns to the CLI. Otherwise, the

end of pass routine calls the begin routine in the supervisor to

initialize the system and initiate the next pass of the diagnostic

program.

Note that when the operator types Control C, he does not cause an

interrupt routine to be called. The Control C merely sets a flag.
The status of the flag is checked periodically when the tests in

the diagnostic program call various service routines and at the
end

pass.

ANALYSIS OF A SAMPLE TEST: RH78¢ (MBA) TEST 3, SUBTEST 1

5.5

Listing Column Format Description
5.5.1
Figure 5-4 shows the program listing for the MBA RH789 diagnostic

program (ESCAA), test 3, subtest 1. The sixth column from the left
contains the relative address of each instruction. These numbers
begin at © with the beginning of each program section. Note that
the

(36080_.

address

offset

containing

section

program

the

Test

found in the link map, must be added to the relative

addre%g to find the virtual memory address of the instruction.
seventh

The

the

from

column

contains

1left

the

1listing

line

numbers. These numbers begin at @ for each module of the program.

Note that the line number increments for each line of the source
module. The sixth column shows the program counter, containing the

relative address. The relative address increases according to the

amount of memory space required for the instructions and operands.

Line

numbers

The

eighth

lines entered by the program

are present only for

developer. Macro expansions do not have line numbers.
programmer

column

from

the

left

as symbolic addresses.

contains

labels

used

by the

The ninth column from the left contains instruction mnemonics and

Macro

calls.

Note

that

(line

317).

Macro

calls

themselves

assembly

time,

the

require

memory space (the relative address does not change), and that in
the Macro expansion which follows, the line number 1is not
incremented

assembler

program

responds to the Macro calls, expanding the Macro according to the

definition listed at the beginning of the file.

Column ten contains operands for those instructions contained in

column nine; and it contains instruction mnemonics and parameters
for the Macro expansions.

The eleventh column from the left contains operands from the Macro
expansions.

Column

five

contains

the

codes

contained in columns seven and eight.

5-8

(hex)

for

the

instructions

Ru780,TESTS
04
.

TEST 21

11=JANe 1978

INITIALIZATION TEST
229C
n29c

284

SSBTTL

SSSSATTL

288 3((3))
286 SRGNTEST

1€

aepanane
2003

DATA

ekyc

po2n
na2n

PRAARADAPEF

294

THIS TEST CHECKS FOR STYUCK AT ZERO BITS IN THE RHT88 CONTROL REGISTER
A CHECK 18 ALSO MADE TO INSURE THAT THE REGISTER WILL CLEAR VIA
THE DeINPUTS OF THE CONTROL REGISYER PLIP/FLOPS,

nege

298
296

297

Y022

298

MOVL

nn29

306

ERRPREP RHCR,M8G,1,FMT_CONTR
REG,S$A0,L_
MSG

4029

nege

309

#ode

318

1p8)

311

0aSa

©nes

one8
wo6A

206C

noecC

340
3 TEST
e
_

108

343

314

MOVAL

FMT

318
316

CR(R2)

208
R4

SERRHARD. S

PREPARE

PUSHAT

108
CALLG

1MS,

ewDSSCKLOOP

CALLG

$8S,

e¥DSSENDSUA

318

208

SCKLOOP

319

INIY
WRITE

READ

3
3

SKIP IF NO ERRORS
CLEAR EXPECTED RESULTS

0p8Y

1
3

$1,LUN, MIR,PRINT SBE
MIR

HANDLE

ERROR

ONE’S

VIA

0°8

FROM

INPUTS

CONTROL

REGIST

O#DSSERRMARD
s

SCOPE

(LOOP?

SENDSUB,

73,81,
X8

»P8F

LISTING

INST

LINE

MNEMONICS

OPERANDS

AND

FROM MACRO

SPECIFIER

OPCODE | NUMBER

(DECIMAL) | MACROS

PROGRAM

EXPANSIONS

MACRO

COUNTER

EXPANSIONS

1(HEX)

LABELS

AND

COMMENTS

OPERANDS

3 CLEAR VIA D INPUTS

#1
#33M,

ADDRESS

#¥DSSBGNSUA

CR(P2),R3

BEOL
CLARL

317

8$8S,

$PGM_INIT,CR(R2)

#°XE,CR(R2)

LUN

RH788

CONTRL REG,REG, STRING

81sL

MOV

INST

#1,REG.NO

MOVZBL

CLRL

OPERAND

MOVZBL

PUSHL
CALLS

OPERAND

MOVE

$BGNSUB

SPECIIFIER
1

PUSHAL

EXTENSION

DeINPUTS

RWCR, M8G,REG, _NAME

PUSHL

(HEX)

THE

CLEARING VIA DeINPUTS

EXTENSION

ADR,R2

LILIET'S
14
FR
pa8a

VIA

CALLG

0e8F

SPECIFIER

CLEAR

21
Q4

AAARANAA’EF

OPERAND

BIT,

2072

PORY

OPERAND
SPECIFIER

EACH

Ap78

f28F

809ANARN
OF

.
RH,CUR

wnde

eagF

INTO

T3.811¢

13
D4

3
g
sem

n@38

ONE®S

EACH BIT IN THE CONTROL REGISTER
ERROR IF SELECTED BIT I8 NOT SET

unly

WRITE
WRITE
REPORT

MOVAL

2003000R°8F

307
38

ALGORITHMg

ALY
F

2000°C2

TEST

302
3ey
304

AOPATCe

POAADANR*OF

DESCRIPTIONt

na22
Rl.r-¥]

AQANAGAN’EF

20000RAR*9F

MASK

3
3
3

0200ANAR*9F

AOAANAARTER

ARGUMENT TABLE TERMINATOR,

291
292
293

D046

ARARAARNEF

ENTRY

TEST

neg2
¥
na22

BIZ'YY
hWAUG

ABNOPARAALEF

ap22

1D
S4

ZFwer>

299

anamec?

TEST

321

3100

PRAPAANAEF

?000°Cc2

[

nna2

PACARBORTEF

«LONG
JWORD

AR22

PARAAAANTEF

POQPAANRCEF

CDEFAULT,ALLY>

nnee

PRARNARACEF

TEST>,<PAGE>

290

np22
22

TESY

8AQ

289

7022

9
(3)

NOWRT

z49¢

288

URR2

SAQ

PAGE,

Page

287

*a2?2

TEST_ 383,

MACRO X0,3=¢

G033

TEST,. 00321

an22

003, <CONTROL

+POECT

nai1e
291¢C

ViXeiy

<CONTROL REGISTER SAQ TEST>
«8BTTL
TEST 33
CONTROL REGISTER

e29c
ge1c

13306841

TK-0736

Figure

5-4

Diagnostic
Subtest

RH780

Program
1,

(MBA)
Test

Listing

5-9

Columns

one

through

contain

operand

within

four

contain

the

hexadecimal

one

and

code

for

the

operands specified in columns ten and eleven. Columns two and four
specifiers.

Columns

three

contain

operand

specifier extensions. Numbers followed by an apostrophe (e.g.,
go00000ed"') are the machine code for symbolic operands. They are
modified
by
the
1linker
at 1ink
time.
(MARS
is
a
one
pass
assembler.
Forward
references, with the exception of branches
link

sections,

and

symbols

global

until

resolved

cannot

time.)

The twelfth column contains comments describing the functions
the instructions. Each comment is preceded by a semicolon.
5.5.2

Analysis Of Typical

311

mask.

Its value

according
end

the

mask

provided.

(00000001)

module.

Lines

#PGM.INIT

test.

Its value

destination

the

symbol

for

the

can be found in the symbol table at the
the

symbol

(offset from the MBA base register)

MBA under

bits

sets

instruction

BISL

The

Line

(00000004)

for

the

relative

address

of the control register of the
is also listed

in the

symbol

zero

table. This value is added to the contents of R2, the base address
of the MBA under test, to produce the physical address of the

control

setting

bit

Line

that

317 --

zero

The

INIT,

bit

thus

sets

is a

Macro call.

indicates

the

function

the

that

performs.

SERRHARDS,

instruction

comment,

are

line

arguments

317,

used

the

The

call.

symbols

The

five

lines that follow line 317 show the expansion of the Macro. These
instructions push the arguments on the stack and call the
DSSERRHARD subroutine in the supervisor, which sets the error flag
and prints an error message based on the stored arguments.

5-10

5.6

5.6.1
Each

(MBA)

RH780

Diagnostic

test

provided
depends
and

RH784

SAMPLE

Detailed

SUBTEST

(Direct

I/0)

Flow

by
on

test

DIAGNOSTIC

a
given
diagnostic
program
relies
on
subroutines
the diagnostic supervisor. The diagnostic program thus

the

supervisor

sequencing

for

services

functions.

The

well

operator

initialization

should

be
able
to
references and subroutine calls back and forth between the
diagnostic program being run and the supervisor in order to use
the listings.

The

general
strategy
used
throughout
the
diagnostic
programs
involves writing and then reading back data directly
(with MOVE
instructions)
in order
to exercise the logic circuits or device
functions
under
test.
Data
retrieved
is
compared
with data

expected.

If the comparison indicates a failure, an error
routine
takes
appropriate
action
and
sends
a
message
to
the
operator.
Subroutine 1 of test 3 of the MBA diagnostic is representative of
this
strategy.
This
subtest
determines
whether
the
control
register of the MBA under test can be cleared after each bit in

the

has

been

set.

When

the diagnostic supervisor calls test 3 of the MBA diagnostic,
the
test
initialization code moves the base
address of the MBA
under test to general
register 2.
This register
is then used
to
index
specific
MBA
registers.
The
ERRPREP
Macro
then
stores
information concerning test 3 in a buffer area for use
in error

messages.

Subtest

begins

supervisor,
point,
look

with

shown

call

the

DS$BGNSUB

entry

Figure

5-5.

order

point

find

this

the

entry

in the global
symbol
table
in
the
program
link map
(Figure
5-6).
DSS$SBGNSUB
equals
00010830,
an
address
in
the
supervisor. Note that the first two characters of the symbol
(DS)
indicate that the symbol
points into the diagnostic supervisor.
The global symbol table in the 1link map for the supervisor
shows
that the entry module
(ESSAAll)
defines the symbol
(contains the
code
for
the
entry
point)
(Figure
5-7).
The
names
of
the
supervisor
modules
suggest
their
functions
(e.g.,
entry,
loop,
print).
The

DS$BGNSUB

RBGNSUB,

module

sequence

call

return

the
for

entry

shown

point
in

contains

Figure

supervisor

5-8.

(Figure

correct

order.

routine,

which

only one
This

5-9).

instruction,

subroutine

RBGNSUB

A discrepancy

to the CLI.
If the
subroutine calls the KB-CHECK

checks

causes

displays an error
subtest sequence is

the

jump

the

subtest

subroutine

message,
correct,

and
the

1loop
to

then to
RBGNSUB

routine to check for Control
C.
If
the
operator
has
typed
Control
C,
control
returns
to
the
CLI.
Otherwise,
control
returns
to
subtest
1
which,
at
this
point,
begins testing the MBA logic.

5-11

DIAGNOSTIC
SUPERVISOR

ENTRY

ROUTINE

I
$DS GNSUB
RO UTINE

SUBTEST

MODULEl

OF MBA

UNDER TEST

ERROR

LoOP

MODULE

CALL BGNSUB

PRINT ERROR

THE MBA

TO CONTROL

ENTRY

MODULE] |

CONT ROL

HARD

RERR HARD

—

MODULE

RINGLBELLAG
IFBELL FL

I STORE ERROR INFORMATION

SET

DSSPRINTF

— .

:
RPRINTF

ENTRY

MODULE
——

MODULE

RPRINTOUT

PRINT ERROR
MESSAGE

!
TEST3

SUBROUTINE

LUN #
MIR MODULE
FAILURE

ol |

vo| 1

I YES _~ L 0oP AFTER
ERROR CALL
'

|
| I

CORRECT

NOJ| |

SAVE PC

| I I

CALCULATE

ZEROS

CALL ERROR ROUTINE

——

MODULEr

READ

SET ERROR FLAG

ERROR

l I

FIRST

CLEAR

DS$ERR

INTERPRETER

YES

WRITE ONES

L= ]
LINE

INITIALIZE

RETURN TO SUBTEST

COMMAND

IRCKLOOP
|ROUTINE

CALL CKLOOP

l
l

MESSAGE,
CALL CLI

DS$CKLOOP

PREPARATION

(45"

SEQUENCE

MODULE

ENT
MODULE I

BASE ADDRESS

MBA RH780
DIAGNOSTIC PROGRAM

DIAGNOSTIC SUPERVISOR

SETUP N

CALL TESTg

DISPATCH

MODULE

MBA RH780
DIAGNOSTIC PROGRAM

LOOP

YES

I
I
|
I

LOOP ADDRESS

RETURN TO
I

BEGINNING OF

SUBROUTINE 1

REND SUB

SUBROUTINE

I l
'

l l

CALL

DS$ENDSUB
TK-0506

Figure 5-5

Diagnostic

Subtest

RH780

(MBA)

Program Test
1,

Flowchart

MIR MDP
MIR MSI
MS 1

MCP MSI
MCP, MDP

0@4PA66E=R
PIQARTR4=R

MIR _MDP

QA@OAAA{CeR

MSR,SNAP

MSI

MCP

MSI

MIR _MCP,
MDP

NO,UNITS
AST, INITY
REG_NO
RH@

RH3

RH&
RHCR _MSG
RHMAPR MSG

@22209A8=R

MIR MS]
MIR, MST MCP

AREPP6AR=R
QRQen741=R

MST, MCP

MIR,MSI, MCP
MIR MSI_MDP_MCP

©Z@7@AB2=R

BRANVAS9eR

MST, MIR

MST MCP, MIR

@Z20029C3=R

APQCGABA=R

MSI _MIR_MCP

PONRO9EA=R

An@R22B3=k
NUMBER_ RUFFER
"NBN1953=Rk REC, MG
720020548eF
REG_STRING

AcOPA2F2«R

NODRIVE

PAAPPSU2eR
PPRAA1BF{=R
@ePPnSUuC=R

PACAG2ER=R

PTBASE
REG, _NAME
REPORT,BUFFER

C22002BY=R
P20A0544=R
2020034pe=R
000002 295=R

NAPRAB28D=R

RHI

A¢A0Q299«R

PP0PA291eR

RH14

RH2

P7222Q229DeR

PAAPP2A5«R

RH7?

RHS

23Q21910eR
@20n1942«R

PCARZ2A9=R

RHCSR_ MSG
RHSP
_ MSG

RHBCR, MSG

@A 1915«R
@2nn1924=R

222021933«R

RHDR_MSG
RHVAR_MSG

2202193B=R
P000192B=R

PCR20P2A1=R

RH,ADR,TARLE
RH_TRLVL

QPR0P28DeR

RH, RRLVL

AP0PQ2AD=R

00V

SFY

SAB MSG

QPP 1ABS=R

AABI1BCE=R

SUFFIX, PTR

ARARASS4eR

TEMP

TIMOUY_ RET,_ PC

PRAVA2ET=R

UNEXPECTED

PPQRARR2

P, TABLE

TIMOUT
EVT FLAG 2000@2E6~R

WAIT, TIME

ACBRR2EC=R

P2AE=R

<SHEADER> ¢

PAGE

PRAPA2AR PPORAN2BY

< LAST>

PAGE

PAGPBERD QQPPBLHRE QAPARRAD

CSTSTCNT>t

LONG

Qar2A284

€$ABSS>

BYTE

UARARANY APPNARAR AArALRRAR
GLOBAL

DSSABORT

DSSCNTRLC

GGOIGGZQ

BG910978

CQRAVA2B4

SYMBOLS

eeR123n42

era1npBe

reo10100

DSSENDPASS

DSSERRMARD

DSSGETMEM

DSSINLOOP
DSSMOVPHY

DSSPRINTSB
DSSPRINTX
DSSSETIPL

DSSSHOCHAN

DSSWAITUS

SYSSBINTINM
SYSSCLREF
SYSSGETCHN:
SYSsaIow
SYSSSETIMR
SYSSWFLAND

ergieace

20212p9n
AQ0170AQ
a0Q12a58

DSECKLOOP

ona100C8

20020288=«R
P00818D9=R
2A002055C=R

PP0018EU=R

CPVARAND

DSSCVTREG

DSSELOGON

RH,CUR,ADR
SA41,MSG

DEFINED1=

DSE®ASKADR
DS®ASKSTR
DSSBREAK

DSSERRDEV

DSSERRSYS

2000P6D2=R
2PQGQ@773=R

DSSESCAPE

DSSASKDATA

geoie080e

DSEASKVLD
DSSCANWAIT

eee10788
eeeipo7e

DSSCLRVEC

A0010168

DSSELOGOFF

oepi10108

pes1ncye

NSSENDSUB

angileadDa

DSSERRSOFT

eP21095n

oee10e38

DSSGETBUF

2po10008

poeio120

Pa012132

DSSGPHARD

20012048
aeni1@a148

peo12218

DSSMMOFF
DSEMOVVRTY

DSEINITSCH

ece1n158
poaiatue

DSEMMON
DSSPARSE

eeaieise
eeoi1p088

PeA130ES

D8SRELBUF

Pen10128

DSSRELMEM

02010138

PeR100ES
ea210178
0Ba1@190

22210068

2rP108258
era10298
oeaia4cCa
aea10209
povia4L2e
0R21024R8

<DISPATCH>]

LONG

<DISPATCH_ X>1

LONG

DSEPRINTF

peeleoro

DSESETMAP

eonie18d

DS$SUMMARY

0210028

SyssaLLOC

SYSSCANCEL
SYsspaLLoc
SYSSGETTIM
SYSEREADEF
SYSSSETPRT

SYSSWFLOR

00710238

@eN10260
pea10208
Q0214378
20310300
Aea1043e
orad1n49@

AQAN6TA

APAR26T70

QACEORQD

20002867

PACANQLS

DSSPRINTS

eo21017e0

oroi1e0F8

DS$SETVEC

eor10160

DSSWAITMS

ooo10060

SYS$ASSIGN

peo10250

SYSSCANTIM
SYSSDASSGN
SYS$Ql0
SYSSSETEF
SYSSWATITFR

20010268
P0o102ER
nQB103C8
vopiedLee
00010478

TK-1120

Figure
in

the

5-6

DS$BGNSUB Listed
Symbol Table in the

ESCAA

Link

5-13

Map

1I-ESSAA=4, 24

Map

30=AUG=1978

DMA13(34n,421ESSAA EXEPUeT

SyraoL

VALUE

DEFINED BY

STovoeoeBDe®

L X

XX )

DRASUCB?
DRASUCBY

PPN 1BYEB=R
202 1B588eR

DSSABORTY

PIN10P20=R

ENTRY, ESSAALL

DSSABORTWAIT
DSSAB,BPTINSY
DS$AQ, SSEND
DSSAG, SYSSRY

”AQ10073«R
0P012FCBeR
PDINTFFeR
2201920R=R

ENTRY_ESSAALY
DEBUG,ESSAAS
ENTRY_ ESSAALL
ENTRY ESSAALY

DSSASKDATA
DSSASKLGCL
DS$ASKSTR
DSSASKVLD

VP 10080=R
PAP{AR98=R
ANR193AQ=R
NAA1708BeR

ENTRY_ ESSAALL
ENTRY_ESSAALL
ENTRY_ESSAALL
ENTRY, E8SAALY

DSSAA_BPTADDR

DSSASKANR

DS$aX, SOFTPCB
DS$A_PRGBGN

SSBREAK
DSSCANWATT
DSSCHANNEL
DssckLoOP

DsscL!

DSSCLRVEC

PNA12FDBeR

*2210090eR

AIBGIETNO=R
22049200

Juuu%agion

P1310088«R
200170 70=R
YAR1A180=R
AN010040=R

A¥A1388%«R

N7H19168«R

I0BASE_ ESSAAYLY
10BASE_ESSAA4LS

KERN

SSAAIS

ENTRY ESSAA

ENTRY_ESSAALY
ENTRY_ESSAALL
ENTRY
_ ESSAALL

ERROR_ESSAAL?

LoOP

KERNEL _ESSAA1LS
KERNEL ESSAALS

MEMMGT _ESSAA1B
LOOP

DSSGA

27013588«R

SCB,ESSAA2S

DS$GA,_PBASE

OSSGA,TBITVEC

DS§GB, BYTEBUF

ENTRY, ESSAALL
ENTRY_ ESSAALL

KERNEL ESS8AA1S

PARAM ESSAALS

P0013190-R

DSEGETBUF
DSSGEYDATA
DSSGETLOGICAL

P2210120R
20210080«R
00010098eR

DSSGETVIELD

P0010088«R

DSSGL _ BUFCNY
DSSGL_ BUFLEN

ENTRY_ ESSAALY

P2013S68«R

20010090«R

200100A2eR

P0212E08eR
20013188«R

DISPAT _ESSAALR

VERSION, ESSAA3S

SCR, ESSAARY

DSSGETADDRESS

DSSGETSTRING

ENTRY, ESSAALY

20013584<R

P3213S8CeR

UBAINT _ESSAASS

DISPAT, ESSAALD

ENTRY
_ ESSAALY

2N013168eR
20213164=R

APT

CLOCK_ESSAAS

KERNEL ESSAA1LS

A1 0AD8=R

DSSGA,LASTADR
D8SGA, LOOPADR

LOAD ESSAALG

APT

FLAGS ESSAALUY

AAR180DA=R

DS$GA, CHMKVEC

DEVALC_ESSAA4D

DEBUG_ESSAAS

DSSERRSOFT

QAd@13160eR

]

CANCEL _ESSAA3?

ASTDEL ESSAA1Y

PASSGN,ESSAAZS

CHMK ESSAAY
10POST ESSAAS2

CHANNEL _ESSAA3
SCB,ESSAA2S

DSSERRNARD

DS$GA, CHKLPPC

START,ESSAA2S

DEVICE ESSAA9
ASSTGN ESSAAZSG

MEMMGT,ESSAALB

ENTRY_ESSAALL

20@1318C=R

MEMMGT _ESSAA18

DEVICE,_ESSAAS

ArA10AC8=R

BREAKVEC

LOOP

SCBLESSAAR3

DSSERRDEV

DS&GA, BUFPTR

Sequence
PAGE

ESSAALS

CHANNEL,ESSAA3
START,ESSAA2S

ENTRY ESSAAL}

ENTRY_ESSAALY
ENTRY_ESSAALL
ENTRY ESSAALY

P0R100CR=R
P78190S0-R

ERROR,ESSAAL2

DEBUG, ESSAAS

CLI_ESSAAS

Ve 10028«R
AARIAB10-R
woe10038«R

DSSERRSYS
DSSESCAPE

GIOREQ,ESSAAS]

ENTRY_ESSAAL]

DSSDOSUMMARY
DSSENDPASS
DSSENDSUR

P1016621=R

Frame L1

SCB_ESSAA23
LODMAP ESSAA4T
SCB,ESSAA23

LOOP
TOSRAM,_ESSAAL®

KERNEL _ESSAALS

KERNEL ESSAALS

ENTRY _ESSAA1LY

DSSENTRY

{

X@§,20

,,,

PARAM, ESSAALQ

KERNEL

Fiche

ENTRY_ ESSAAL]

nAAInaT78=R

20A19080=R

DEVICE_ESSAA9
DEVICE ESSAAS
ERROR,ESSAAL2
FRKCTL ESSAA4L

DEBUG,ESSAASB

DSSCNTRLC

DSSCVTREG

REFERENCED

LINKER

29131

SCB, ESSAA2Y

CHMK

ESSAAU

KERNEL _ESSAALS

CONSOLE

ENTRY_ESSAALL
ENTRY_ESSAALY
ENTRY_ESSAALL

PARAM,ESSAAL9

ENTRY _ESSAALY

ENTRY ESSAALY

ENTRY_ESSAALYL

BUFFER_ ESSAA2
KERNEL _ES8SAALS

START, ESSAAZRS

DEVICE_ESSAA9

PARAM,ESSAAL9
MEMMGT _ESSAA1S

PARAM,ESSAALS

PARAM,ESSAAL9
PARAM,ESSAALS
KERNEL _ESSAALS

MEMMGT ESSAA18

PARAM,ESSAAL9

PRINT
TK-1121

Figure
in

the

5-7

DSS$BGNSUB

Symbol

Supervisor

Listed

Table

Link

Map

5-14

the

11
10

I1»ESSAA=U, B4
ENTRY_ESSAALY
Pe=08

ENTRY POINTS TO THE DIAGNOSTIC SUPERVISOR,
DIAGNOSTIC AND STARLET SERVICE ENTRY VECTORS,
22-AUG=1978
ENTRY POINTS TO THE DIAGNOSTIC SUPERVISOR,
nale

171

2932

172

2030

amid " 174
PARCARDACEF

NRABPQARTEF

AACABADREF

¢230

176

+ WORD

332
FA3A

177
178

JMP

RBGNSUB

oe3a

182

JMP

RENDSUB

Haan

18%

184

JALIGN

QUAD

2602

~"ALQ
wun

1RS DSSCKLOOP:?
186
WORD

*Me>»

;s CHECK LOOP ENRTY POINT,
3 ENTRY MASK

#9342

187

RCKLOOP

HaU8

1R8

yA48
2048

189
19¢

ABAR

f0aQ

QU8

ensn
“0Se

K»aAsSa
¢ase

53452
"Egs8

A0008
30
24

2020
17

20@0°
AOPBONA2°EF

191

Jmp
LALIGN
DSSINLOOPS?

192

LWORD

JmMp

FMo»

19%
194

+ALIGN

QUAD

195 DSSESCAPE1?
196
. WORD

RESCAPE

199

JALIGN

QuAD

221

. WORD

mey»

JALIGN

QUAD

@aSA
2¢5D

202
2¢3

AQSE

274

QASE

22s

CA6n

227

ASBW
RET

KB, CHECK

206

DSSWAITMSs

«WORD

JMP

DSXEWATITMS

JALIGN

QUAD

2ge2

208

PAGA

209

0068

210

@ReB

212

nnes

SMe»

JmMp

198

24? DSSBREAKS

NP6n

RINLOOP

197

0758

9nsS8

QUAD

211

DSSWAITUS::

« WORD

me»

@06A
na7Te

213
214

JMP

DSXSWATTUS

naTa

216

JALIGN

QuUAD

215s

anTe

217

$O78

229

20078

An78

w270
w872
AR78

@27A

218
219

DSSCANWATITS?

DSSABORTWATIT:

«WORD
JMP

EMe>
DSXSCANWAIT

221

<ALIGN

QUAD

223

.VECTOR

DSXSCNTRLC

224

Jmp

DSXSCNTRLC+2

222 DSSCNTRLCSS

MASK

SMe»

2QT@

APARQARRACEF

ENTRY

o ¥ORD

BEGIN SUBTEST ENTRY POINT,

181

POPe
GALPNANACEF

180 DSSENDSUB::

2208
APAAPAOAEF

“Me»

7338

WASA

FFAZ®

<ALIGN QUAD

2000

PAZA

Sequence 3528
Page
6
Cte)

PROGRAM CONTROL SERVICES,

175 DS$SBGNSUB:?

2030

NPRAJBAQ°EF

4,2.1

Fiche 3 Frame J9
VAXeii MACRO X8,3=6

wAza

For/a

ANARAAARCEF

08322106

;

END SUBTEST ENTRY POINT,
ENTRY

MASK

LOOP

ENTRY

ENTRY MASK

POINT,

¢+ ESCAPE ENTRY POINT,
1 ENTRY MASK

H
3

BREAK FOR DYNAMIC

CHECK

WAIT MILLISECONDS

SERVICES.,

t SAVE NO REGISTERS
KEYBOARD

ENTRY POINT,

ENTRY MASK

WAIT MICROSECONDS ENTRY POINT,

CANCEL WAIT ENTRY

3 ENTRY MASK

POINT,

1 ENTRY MASK

s *x10078

TK-1122

Figure

5-8

Entry

DS$BGNSUB

Point

5-15

I7-ESSAA=y,
Y
Msp
OMALt[340,401ESSAA,EXEs
46T

I0=AUG«1978

SYMBOL

VALUE

DEFINED BY

REFERENCED BY

..--..

[ X

LA 2

L L

PREADVBLK

28Rr17170=R

PRYSC,

ANA3AA0Y

RBREAK

RckLOOP
RCTRLC

P2215394=R
PUA1SOSBeR

. READVBLK

1SAT

buR

CONSOLE

SYSVECTOR

LOOP

PARAM,ESSAATY

LooP
KERNEL _ESSAALS

PAR17170=R

CONSOLE

B0R152CER

LO0P

REKRDEV

A3n1436F=R

ERROR_ESSAAL?

RERRHARD

PAN14859=R

ERROR,ESSAL12

RERRSOFT
RERRSYS
RESCAPE
RGETADDRESS

AAU108U3eR
PAB1UBBReR
APR1524C=R
@NN1SSFE=R

FRROR_ESSAA12
ERROR_ESSAAL12
LooP
PARAM, FESSAA19

RGETSTRING

PYA1STT79eR

PARAM, ESSAA19

RGETDATA
RGETLOGICAL

RGETVIELD
RGPHARD
RINLOOP

RPTEADR

RTYPEMSG

Sct_BasE
SCB_IMAGE

RIN1S47CeR
BAN156A2«R

RAA1SSUY=R
PMN15RBBeR
PPY153BCeR

P2217C61=R

AIN1SDRbeR

24 K

ENTRY,FE

ENTRY

ESSAA

ENTRY

ESSAATL

ENTRY, ESSAALL
ENTRY_ESSAALY

PARAM ESSAALS
PARAM _ESSAA19
L0oP

ENTRY_ ESSAALY
ENTRY, ESSAALL
ENTRY_FSSAALY

MEMMGT _ESSAALS

QIOFNT ESSAASZ

CLI_ESSAAS

DISPAT_ESSAALD

SCB,ESSAAZ]

STARY _ESSAAZS

SGNSGL MPAGEDYN
SS$_ARDRT

PAARAAY D
#331C3IEN=R

ASTDEL ESSAAL
CLOCK, ESSALs
KERNEL _ESSAALS
KERNEL ,FSSAALS

@ru{C3CC=R
pUPrAR2C

KERNFL FS8SAA1S
SYSVECTOR

MEMMGT ,ESSAALS
TMDRVR ESSAASY

S§$ ACCVID
888 ,B8ADPARAM
S$S$,BREAK

AAAAAARC
PaAQANALY
PUNAaYLY

SYSVECTOR
SYSVECTOR
SYSVECTOR

ACPFDT_ESSAA3S
ACPFDT_ESSAA3S
DEBUG,_ESSAAB

88, CANCEL
88$,CMODSUPR

AYArA8IP
2A02B41C

SYSVECTOR
SYSVECTOR

CANCEL _ESSAAZY
DERUG,ESSAAS

AAGANL24
AAAGRL2C
NAA3ZRRA 1

SYSVECTOR
SYSVECTOR
SYSVECTOR

DEBUG,ESSAAS8
DERUG _ESSAAS
DERUG _ESSAAS

SYSVECTOR

CONSOLE

SS$ , CTRLERR
SSS

DATACHECK

SS$_DATAOVERUN
SS§ _DEVFOREIGN

SS8 _DEVNOTMOUNT

888 DEVCFFLINE

88§ _DRVERR
SSS_ENDOFFILE
SS$ _ENDOFTAPE

AZEIA6S 1

PURURESY

BARAARSC
@0n2p83A
prAR@an6d

ASTDEL _ESSAA]L

SYSVECTOR

SCB_ESSAA2S
KERNEL
_ ESSAALS
CLOCK_ESSAAG
KERNEL ESSAALS

DBDRVR_ESSAA39
TMDRVR, ESSAAST

DBDRVR_ESSAA3S

SYSVECTOR
SYSVECTOR

TMDRVR ESSAAST
TMDRVR_ESSAASY
ACPFDT _ESSAA3S

SYSVECTOR

ACPFDT _ESSAA3S

SYSVECTOR

GIOREG, _ESSAAS]

SYSVECTOR
SYSVECTOR

DEBUG_ESSAAS

QIOREG, ESSAAS]

DMDRVR,_ESSAASI

DRDRVR,ESSAASY

DMDRVR,ESSAASS

DRORVR, ESSAASY

DMDRVR_ESSAAS3

DRDRVR,ESSAASY

ICPOST _ESSAAS2

TMDRVR ESSAAST

DMDRVR ESSAASY

aau2paTC

PANAN8TA
A2000878

I0OPOST _ESSAAS2

MEMMGT ESSAA1LS
MEMMGT _ESSAA18

SYSVECTOR

PARAM_ESSAAL9

SCR,ESSAARS

CHMK ESSAAL

26AAAGBY

PRAAAPBC

ENTRY_ESSAALL

WA318AEA=R
PAPRAVE Y

S§8 , CONTROLC

ENTRY, ESSAALY
ENTRY_ESSAALY
ENTRY_ESSAALY
ENTRY ESSAALL

SCH$QAST
SEC, TICK

8S$,CMODUSER
Ss§ Compar
SS$ , CONTINUE

ENTRY, ESSAALL

PARAM, ESSAALY
PARAM,ESSAAL9

SYSVECTOR

QIO ESSAAR?

ASTDEL _ESSAAY

A9IP3INc

PAGE

ENTRY_ESSAALL

APN1B9FU=R

SS$ BUFRYTALT

Sequence

SCHSASTDEL

SGNSC, IRPCNT
SGNSGL , TRPCNT

Frane
E2

DER!IG, FSSAAR

KERNEL _ESSAALS
SCB_ESSAA23

APR18A13=R

X@2%1,20

,,,

NPALESRAR
P2A16807%=R

SCHSNEW| VL

Fiche

QIN,_ESSAA22

LINKER

09131

DBDRVR_ESSAAZY
TMDRVR ,ESSAAST

ACPFDT _ESSAAZS
TMDRVR_ESSAASY

TK-1123

Figure

the

5-9

RBGNSUB

Symbol

Diagnostic

Table

Supervisor

5-16

Listed

Link

Map

in the

Subtest

zero

the

initializes
control

the

MBA

under
the

test

writing

initialization

bit.

one
The

bit

subtest

then writes ones to the control register, writes zeros, and then
reads the
register.
If
2zeros are not returned
from the control
register,
the
subtest calls
the
DSSERRHARD entry point
in
the
supervisor. The DSSERRHARD code is in the supervisor entry module,
ESSAAl]l (see the supervisor link map). DSSERRHARD causes a jump to
RERRHARD, which is located in the error module of the supervisor.
RERRHARD

sets

the

error

flag,

flag

set,

and

calls

the

DS$S

entry

this

one

points,

rings

the

DSS$SPRINTF

bell

entry

located

the

point.

the

bell

entry

error

the

other

module

and

contains only a jump instruction.
The jump transfers control to
the RPRINTF routine in the print module
(see the supervisor link
map).
print

RPRINTF,
in turn, calls the RPRINTOUT routine, also in the
module. This routine prints out a message on the operator's

terminal
number

indicating
(LUN)

RPRINTOUT

RERRHARD,

the

wunder

test

test,

and

subtest

and

the

numbers,

failing

the

logical

module

name

unit

(MIR).

returns
control
to
RPRINTF,
which
returns
control
which returns control to ESCAA test 3, subtest 1.

At this point, the testing and error reporting portions of subtest
1l have been completed.
The subtest then calls DSS$SCKLOOP
(in the
control module of the supervisor). This entry point causes a jump
to the RCKLOOP subroutine, which is located
in the loop module.
Unless the loop and error flags are both set, control returns
the subtest, which in turn calls DS$ENDSUB in the supervisor

terminate
If

the

subtest

loop

and

start

the

error

flags

are

both

subtest.
set,

the

loop

address

calculated
and
the
RCLKLOOP routine causes
a
jump back
to
the
beginning of subtest 1, at label 10$. Note that if the loop is the
first loop after the error call, the test and subtest numbers are
checked. If one of these numbers is wrong, control returns to the
subtest as if the loop flag were not set.
After the first 1loop,
the subtest will be repeated continually.
5.6.2
RH788 Diagnostic Sample
The
error
messages
generated

Error Message
by the
RH788

diagnostic

vary,

depending
on
the
type
of
error
detected
and
the
type of
the
failing
test.
However,
in
all
cases
the
error
message
will
identify the failing module (or bus signal) and the nature of the
failure. Expected and received data are printed when meaningful.
For example, if bit 2 (IE) of the MBA control register is set, the
error

message

printed

will

look

5-17

that

shown

Figure

5-14.

**xkxx***MATNDEC
PASS

TEST

HARE

ERROR

ZZ-ESCAA-5.0

SUBTEST

WHILE

TESTING

RH780

ERROR
MBA:

DIAGNOSTIC-5,0%**kxkk*

1-JUN-1978

FAILING

10:53:30.70

MODULE:

MIR(M8276)

(RHCR)=00000004
EXPECTED:

ZERO

RECEIVED:

XOR:

I1E

TK-0780

Figure

5-10¢

ESRCA

Sample

Error

Listing

Use the test, subtest, and error number to look up the relevant
~code in the program listing. Notice that test 3, subtest 1, error
1
is
the
portion
of
the
program
discussed
in
the
previous
paragraph.
The program sets the maintenance bit
in
the
control
register. It then writes ones to the control register, clears the
register, and reads the register. Since bit 2 is stuck at one, the

received data

and

the expected data do not match.

After
listing
the
failure,
the
program
continues
with
succeeding tests. The operator may, at this point, shut down
computer
to
change
the
MIR
board
as
directed,
or
use

diagnostic
the

supervisor

failure

5.7

commands

set

up a

(DIRECT

Detailed Flow
5.7.1
The RP@X/DCL Repair Diagnostic

(ESRCA)

peripheral

that

diagnostic

programs

cluster

diagnostic

accesses

registers on

the

unit

bit

instructions

and

the

programs,

the

channel

services

initializing

disabling

diagnostic

the

interrupts,

determining

adapter

However,

I/0.

repair
the

the

diagnostic

with move

RPOX/DCL

and

repair

the MBA diagnostic on services

supervisor.

aborting

error

representative

direct

particular,

perform

such

function,

setting map registers,

and

SAMPLE SUBTEST

test directly,

like.

supervisor

channel,

wuse

I/0),

RP@X/DCL

under

diagnostic relies more heavily than
provided

scope loop and monitor

closely.

RPAX/DCL REPAIR DIAGNOSTIC

set

the
the
the

uses

functions
enabling

defeating

parity,

the

as
and

and

status.

For example, when the dispatch routine in the supervisor calls the
first test in the RPOX/DCL repair diagnostic,
the test routine

gets the address of the device under test and then,
of arguments, calls for channel
entry point in the supervisor.

passing a list

services through the DS$SCHANNEL
Figure 5-11 shows the code for

test 1, subtest @, errors 1-3. Figure
DSSCHANNEL calls
DSXSCHANNEL,
which
subroutine,
which
builds
a
channel
5-18

5-12 shows the subtest flow.
in turn,
calls the BLDCDB
data
block
containing
the

WYFE

pOPPRQI0

DATA, 20113

VOFE
nlve

p@ae
D8

1102
eled

TEST, 00113

€109

wloF

200N °CF
0000400

CJ')

00000000
° 9F

VOVRVOVB°EF

22020000
*9F
edop2e0a’EF

61-S

MOVL

91t}

TEST

ENTRY

PUSHAQ

CH_STATUS

PUSHL

#72

PUSHL

w113

w119

DRIVE

CALLS

#4,

0123

a0
07

DD
DO

¥129
«128

00008000 EF
24

PUSHL

00
FB

w120
0133

PUSHL
CALLS

148
109

PUSHL

213a

1ia
111

BBC

DRIVE
%4, ®#DSSCHANNEL

#CHSSV MBACPE,CH,STATUS, 208
3

et42

PUSHL

w144

PUSHAL

W=MSG, MCPE

2000°CF

PUSHL

W#SDRIVE

PUSHL

#SER

CALLS

¥33SM,

PUSHL
CALLS

DRIVE
%1, #NDSSSHOCHAN

0NVBA0QDEF

DD
FB
FA

#4155
@158
0162

21
aF

PI8B
11

2c
2y

@14C

v1eD

016D

117

w17S

118

w17S

RR AT

2081

CALLG

BRW

A RN RN R AN RN

B8C

1283,

OwDSSERRHARD

ewDSSCKLOOP

TEST 0201,.X

AN RN AN

PUSHL

@177

PUSHAL

W=MSG_NED

¥17B
®17F

PUSHL
PUSHL

w*DRIVE
#SER

00URAAVD’EF
"1

DO
FB

2000002007
9F

FFeB CF

2157

198
195

B19E

{, SUBTEST @,
CALLS
$0S,_SHOCHAN,S
PUSHL
CALLS

12p

$08, CKLOOP

121

$08_ EXIT

w19t

CALLG

R RNRIRNNRAARRRRANRR

CHECK

FOR

NONeEXIST,

DRIVE

,WSDRIVE,w*“MSG,
NED

D0
DD

TEST

)

#¢

tyy

R AR AR

#CHSSV MBANED,CH, STATUS, 258

$DS_ERRHARD,S

119

y EXIT TEST |

AR NA RN N RN R AR

FEBF CF

geeoooRe’9F

CHECK FOR CONTROL BUS
ERROR

@008 °CF

ul8l
v181
4188
1188

PARITY

133 TEST {, SUBTEST 0, ERROR |

O1leA

174

ADDRESS

®9

Ui14E

DRIVE’S

GET

#CHCS_ STATUS

MASK

CH_STATUS

TERMINATOR

OMDSSCHANNEL

TABLE

RPCS1(R2),R3
3 GET CONTROL/STATUS
$DS,_CHANNEL,S
DRIVE,CHCS_STATUS,STATUS
,CH,
PUSHAR

w42

0141

MOVL

ARGUMENT

#CHCS,_INITA

PUSHL

0000000 °EF

opeooeeR’9F

oooeeeRe’9F

1081t

“l120
#123

FED®

08000000
°kF

196

JWORD
FMe>
W BASE_ADDRESS,R2

aovaoece’9F
eAea0eee’SF

LLONG

ERROR 2
#3$M, SwDSSERRMARD
DRIVE
DRIVE
#{, owDSSSHOCHAN

108

143,

#wDSSCKLOOP

TEST
BRA

TEST

001 . X

sy 'EXIT

TEST

1
TK-1124

Figure

5-11

ESRCA

RP@X/DCL

Test 1, Subtest 4,
Program Listing

DIAGNOSTIC SUPERVISOR

ESRCA

RPOX/DCL REPAIR
TEST I, SUBTEST O

( START )
Y

GET ADDRESS

DISPATCH
ROUTINE

ENTRY MODULE

OF DRIVE
UNDER TEST

CHANNEL MODULE

l BLDCDB ROUTINE -I I

| |
HARDWARE |11
I GeT
P-TABLE

DS$ CHANNEL

GET
UNIT #

CALL

DS$CHANNEL
(INIT)

ERROR

NO
l I
| BUILD CHANNEL

INDICATE

DATA BLOCK

|B ||

SUCCESS

FUNC

STATUS

INITA

| GET
STATUS
OF DEVICE CHAN.
I

Figure

5-12

ISNEITTMBA

SYSTEM

] a

U
ESRCA

RP@X/DCL

Repair

Flowchart

TK-0747

Diagnostic

(Sheet

5-20

Test

Subtest

DIAGNOSTIC SUPERVISOR

ESRCA
RPOX/DCL REPAIR

TEST |, SUBTEST O

READ RPCS1

OF DRIVE

CALL

DS$ CHANNEL

(STATUS)

DS$ERRHARD

(PRINT ERROR

TYPE)

ERROR1 VES

CONTROL

BUS PARITY
ERROR

DS$SHOCHAN

(SHOW MBA

REGISTERS)

ERROR 2

NON-

EXISTENT

DRIVE

DS$CKLOOP

(LOOP
IF LOOP

FLAG SET)

AND SO ON

DISPATCH

ROUTINE

(CALL NEXT TEST)
TK-0748

Figure

5-12

ESRCA

RP@X/DCL

Repair

Flowchart

Diagnostic

(Sheet

5-21

Test

Subtest

P-Table
and

address,

determines

and

the

whether

adapter

the

address;

channel

clears

MBA

the

flag

word;

UBA.

When

control returns to the DSXS$SCHANNEL routine, the function argument
passed from the calling program (ESRCA)
is evaluated, activating
one of
several
function subroutines.
In this case,
the
INITA
subroutine

sets

the

initialization

bit

the

MBA

control

Control

the

then

RPCS1

returns

(control

the

status)

calling

program

(ESRCA),

unit

which

under

reads

test with a

MOVE
instruction
(direct
I/O).
The
test
routine
then calls
DSSCHANNEL again, this time passing a different function argument

(CHCS$ STATUS).
The
DSXSCHANNEL
routine
1is
executed
again,
activating the CHC$ STATUS subroutine which stores the unit and
adapter

status

the

location labeled

CH_STATUS.

Then when control returns from the DSXS$SCHANNEL routine to the test
routine, the data in location CH STATUS is compared, bit by bit,

with

expected

data

patterns.

If an

error

detected,

the

test

routine calls a series of supervisor
routines
(DSSERRHARD,
DS$SHOCHAN,
DSSCKLOOP,
and
DISPATCH)
to
print
out
error
information,
loop if the 1loop flag
is set,
and
return to
the
dispatch routine if the loop flag is not set.

5.7.2

Test

RPPX/DCL Repair Diagnostic Sample Error Message

subtest

detects

this

control

bus

failure

by test,

program

error

1 of

the RP@PX/DCL diagnostic

parity failures on the

failure,

subtest,

the

error,

Massbus

error

failing

identifies

(Figure 5-11).

unit,

When the

the

identifies

message

and

error

type.

addition, the message includes an MBA channel status dump, showing
the

contents of the pertinent registers,

Bit

control

Other

the
the

status

set,

indicating

error message formats display expected

error

and

the

relevant

failing

registers

Disk

the

Detailed

Flow

Reliability

queue

instructions

directly

the

Massbus

(as

I/0

the

Diagnostic

MBA

and

(QUEUE

program

diagnostics.

read

and

received data and

I/O),

SAMPLE SUBTEST

the RP@X/DCL,

depending on

test.

DISK RELIABILITY DIAGNOSTIC

5.8.1

the

in Figure 5-13.

parity error.

contents of

5.8

The

as shown

write

diagnostic

(ESRAA)

Instead

peripheral

does),

the

representative

performing

device

program

move

registers

builds

argument list containing device and transfer parameters and
pointing to the data to be transferred and the function to be
performed. The program then calls the queue I/0 services of VMS or
the diagnostic supervisor.
In this way, the program transfers
information to and from the peripheral device under test without

the channel,
the device,
use of
exclusive
requiring
computer system. Figure 5-14 shows the listing for ESRAA

subtest

@, error 12, the first of the data transfer tests.

5-15 shows the program flow for

the same routine.
5-22

or the
test 1,

Figure

PROGRAM:

ZZ-ESRCA RPPX/DCL

DIAGNOSTIC,

REV

4.1,

TESTS.

TEST

1l: QUALIFICATION TESTS
kkkkkkkk
ZZ-ESRCA RP@X/DCL

PASS

TEST

DEVICE

FATAL

MBA

CHANNEL

SUBTEST

WHILE
STATUS

DIAGNOSTIC

ERROR

TESTING

DBA@:

CONTROL

POOB0020 (X);

MBA CR:[20010004]

Bose0008
(X) ;

MBA SR: [20010008]

00820000 (X) ;

MBA VAR: [2001000C]
MAP(80)
:

4.1

kkkkkkkk

BUS

(8:26:20.26

PARITY

ERROR

DETECTED

DUMP

MBA CSR: [20010000]

MBA

1@-MAR-1978

POBBB200
(X) ;

MCPE

Pe000800 (X);

MBA BCNT: [20010010]

Po00PB0a (X);
TK-1265

Figure

5-13

ESRCA

Sample

5-23

Error

Message

LZ=ESRAA=S,
2

DATA

TRANSFER

5,2

DATA

TRANSFER

7345

109
312
311
3t2
313
314
318
316
317
3118
319

©»IAsS

32e

325

3InS

w3us
1315
“30s

23ug
r3as

#3238

a32s
n30S
wiaNg
039S
1345
N32%
n32S

©? 305
3328

Sé6

2305
1348

(32D

12
B2

32!

7323

79 AB

2S AB

2QA°8F

POORBRRLI°EF

241F

B8F
09

P0Q0MAN]1 °EF

1215 8F

9A
91

309
311

2319

341

&i32C
w»32E
033s
©341

NUMBER

CYLINDERS

MAXIMUM

NUMBER

0OF

TRACKS

MAXIMUM

MUMRER

SECTORS

CURRENT

CYLIMDER

NUMBER

3 R9 = CURRENT TRACK NUMBER
s
1

R10

R11

= DEVICE CHARACTERISTICS POINTER

jee

181%:

182%:
19081

CURRENT

SFCTOR

NUMBER

MOVZWL
MOVZBL
MOVZBL
cMPR

OSKCSw_CYLNDR(R11),RS
DSKDCER_TRACK(R11),R6
DSKDCSB, SECTOR(RI1),R7?
$RMR3, DSKDCSB_ TYPE(RIL)

;
g
3
3

PICK UP
PICK UP
PICK UP
IS THIS

BNEQ
MOVW

1818
#LSTSECT _RM,e

3
$

NOPE
GET LAST

1828

SKIP

LASTSW, _SECTOR

LASTSw, SECTNR

MOV W

BLSTSECT PP,=

CLRL

CLRL
CLRL

BRB

MOVL
AOBLED

LAST

MAXIMUM NO OF CYLINDERS
MAXIMUM NUMBER OF TRACKS
MAXIMUM NUMBER OF SECYORS
AN RMO3?
SECTOR

IN CYLINDER

SECTOR FOR RP

¢t

CLEAR LONG WORD BUFFER INDEX

R8
R1O

:
¢t

CLEAR CURRENT CYLINDER
CLEAR CURRENT SECTOR

¥PATTERN],BUFFERY [RO]
3127,Rq,190%

t
s

WRITE PATTERN
WRITE S12 BYTES

MOVL

QIOPTRLIST[R2),R4

MQve
MOV
MOV

R9,QI0SB TRACK(RY)
R12,0108B,SECTOR(RY)
R8,0T08W_ CYLNDR(RY)

3
3
s

WRITE TRACK VALUE
WRITE SECTOR COUNT
WRITE CYLINDER
:

MOVL
MOVB

Q0% Pe(RY)
EF.LISTIR2],QINS _EFN(R4) 3 WRITE EVENT FLAG NUMBER
YI0E WRITEPBRLX,=
3 SET FUNCTION 3 WRITE
NI0S FUNC(R4Y)
)

11374

2383
384
+387

438E

359

w395
v3ios

362
361

2371
v374

APVOPAAATEFUR

0020200720 °9F

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238E

7€
TE
7€

52
S8
59
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oD
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90
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AJAe

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Sa

FB
E9

J3A3
A3AA

Q178

ARPRANANTEF L2

Q387

23AD
¢3RO

238»

13R7

365

k7Y
367

0002RP0N°GF

387

s2
ac

DF
DF
Db
DD

ulPF
a3C1
w3Ct
#3Ct
a3CY
03CD
*3CF

0301
4301

AAAQPBAPCEF
WAARZAAAEF

pra8

Disk

MOVAL
MOVL

MOvVL

3 BEGIN AT LAST TRACK

BUFFER]1,QI08 _ P1(R4)
$512,Q0108, P2(RY)

DSKDB PTRLIST{R2),=

RLBC
208¢%¢

BRwW

CALLS

Rp, 205%

(SP),

,R2,BLANK,e

PUSHAL

BLANK

PUSHL

R2
BEER

PUSHL

369

$0S . CKLOOP
CALLG

2058
205%,

@3IEN

372

3E3

371

RRW
buRS
$DS,CKLOOP
CALLG

+3E3

2128y

Reliability
@,

TEST

§,

CHECK

FOR

°*C

ISSUE QIO REQUESY
BRANCH IF ND ERRRORS
CMECK BAD BLOCK FILE

BRANCH IF NOT
3

##DSSBREAK

DUMP STATUS
PUSHAL
DUMP_STATUS

WRITE DIAGNOSTIC BUFFER ADDRESS

s GET NEXT BLOCK

ERROR

303

;

RETRY

REPORT

IN BAD BLOCK FILE

CHECK FOR “C

WRITE

COMMAND

(RY4),G*SYSSQIOW
CaLLG
(R3),2108
3 BRANCH IF SUCCESS

$NS,EPRHARD,S

#2,CHECK BLOCK

(YT

t0IO0W,
G (R4)

BLEBS

TO QIO ARGLIST

RS,=(SP)
R9,=(SP)
R1A,=(8P)

$DS BREAK
CALLG

3168

POINTS

s PUT BUFFER ADDRESS IN QI0 ARGLIST
3 WRITE BYTE COUNY

$DS BREAK
CALLG
(5P), #xDSSBREAK
$SQIOW,
G (RY)
]
:
G SYSSQIOW
(RUY,
CALLG
aLes
(R3),210%
3
CHECK _BLOCKS
R2,R8,R9,R10
¢+
PUSHL
R2

w3DA

(ESRAA) Test 1, Subtest
Error 12 Listing
5-24

2ras

#1,06,R9

MOVw
Move
»Ova

362
363
364

(4)

’

sSUBL3

349

’

347

3s5@
351
3152
353
3154
35S
356
357
358

198

USAGE:

346

3¢

5-14

MAXIMUM

349

236C

Figure

A34e

R®

wlaa
0382
235a

gdgaAvR’9F

nDe
0E
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aaaa’ca

REGISTERS

€3

2362
367

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Page

AND READS

344

20202

WRITES,WRITECHECK,

348

202uAANQ’QF

MULTI«SECTOR

nv3du

0GPRNAAN9F

BEGIN

4342

348

Sequence

¢t

AAMD°CU

Frame D16

20CA2UAR°EF4Q
WRGAAGBYCEF
24201200 8F

0MCANR2°EF

MACRO X0,3=6

29AA°CY

0020072

a2
343

VAXe{]

SA
59

1C
20

339

10:52344

s4é

336
337
338

3ag

D4
DO
F3

54
A4
a4

321
322
323
324
3125
326
327
328
329
330
331
332
333
334
318

4324

1]
P0QQ@ABU’EF
U2 ASTPAASTN BF
Sa
ROAAYRTF B8F
EC

31-AUG»1978

TESTS

Bk¥2.3-1

Fiche

TESTS

ESRAAB
QA TESTS QUALIFICATION TESTS 2Z-ESRAAS,0

SUBTEST

CALLS

#838M,

275%
205%,

ERROR

DUMP STATUS

O¥DSSERRMARD

##DSSCKLOOP
3
o¥DSSCKLOOP

3
GET

LOOP
BLOCK

TK-1127

VMS

AND
DIAGNOSTIC

SUPERVISOR

DISK RELIABILITY ESRAA TEST 1,
SUBTEST O, (ERROR 12) DATA TRANSFER
TESTS

SET POINTERS

START

TO CYLINDER
O
SECTOR
O
LAST TRACK

DETERMINE NUMBER

OF CYLINDERS

TRACKS
:

\Qi/J

SECTORS

BUILD G170

DETERMINE DRIVE

ARGUMENT LIST-

TYPE

BUFFER ADDRESS

BYTE COUNT

I
I

COMMAND

INTERPRETER

LINE

TRACK SECTOR

WRITE PATTERN 1

(A570A570)

CYLINDER

INTO A BUFFER

ADDRESS

512 BYTES

EVENT FLAG #

DIAGNOSTIC BUFFER

FUNC = WRITE

Ql/O SERVICES

WRITE PATTERN 1 TO

FIRST CYLINDER

ISSUE

FIRST BLOCK LAST

TRACK

Q1’0

REQUEST

LOAD DIAGNOSTIC
BUFFER

LOAD 1/0 STATUS

BLOCK (10SB)

SUCCESS

ISOB

YES

CONTENTS

NORMAL

FAILURE

DS$CKLOOP

CONTINUE WITH

{

PART

OF TEST 1

(READ PATTERN

JUST WRITTEN)
TK-0682

Figure

5-15

ESRAA Test

(Sheet

Subtest

5-25

Error

Flowchart

ESRAA DISK RELIABILITY

VMS

AND

DIAGNOSTIC

——_—

] el
LOCK

SUPERVISOR

ROUTINE

M oeresr |

)

SECTOR
ROUTINE

READ

BAD BLOCK
FILE

SUCCESS

HAVE

FIRST 5 SECTORS

BEEN READ

GET (NEXT)

COMMAND

ADD2TO

WORD FROM

SECTOR
COUNTER

BAD BLOCK

LINE

FILE

INTERPRETER
NO

END OF

9T-§

ISSUE

BAD BLOCK

Q1/0 REQUEST

(RETRY)

Q I/0 SERVICES
WRITE PATTERN 1
LOAD 10SB

_
LAST

SECTOR

AND DIAG BUFFER

DUMP STATUS
PRINT ERROR MSG

BAD BLOCK

OF CYLINDER,

NO
DSS$SERRHARD

YES

FILEIS

TRACK. SECTOR

WITH ITEM FROM
BAD BLOCK

l
—

DS$CKLOOP

J
L
Figure

Subtest

5-15

ESRAA Test

@, Error 12 Flowchart
(Sheet 2 of 3)

VMS AND DIAGNOSTIC

ESRAA

SUPERVISOR

DISK RELIABILITY

SET POINTERS
FOR NEXT

BLOCK

A 4

STATUS

DUMP

.
PRINT

COMPLETION
TIME

COMMAND

YES

LINE

INTERPRETER

DISPATCH
ROUTINE

TK-0584

Figure

5-15

ESRAA

Test 1, Subtest @,
(Sheet 3 of 3)

5-27

Error

Flowchart

The

first

test,

supervisor,

various

when

sets

drive

is called

pointer

commands

(drive

the

the dispatch routine
I/O

clear,

status

seek,

offset, and reset). Test 1 then performs an
before beginning the data transfer tests.
In

the

write

the

data

the

then

the

disk

portion

the

data

pattern

(AS570A570)

loaded

into

argument

pack

builds

the

drive

under

target

diagnostic

function

block

the

buffer

disk

address,

performed.

Then,

The

area

containing

the byte count of the data

the

test.

buffer

1list

test

oscillating

tests

pack

the

data

after

tests

memory.

the

address

(track,

checking

block

program
the

data

the location
cylinder),

number,

for

test

written

The

sector,

flag

NOP,

sets

first

event

in the

seek

program

to be transferred,

the

and

recalibrate,

transfer

disk

buffer,
of

transfer

block

Control

and

the

program calls SYSSQIOW.
If

the

program

being

run

the

user

mode

(VMS

being

run

the

standalone

similar

routine

the

SYSSQIOW

routine

then places

mode,

supervisor.

the

SYS$SQIOW

environment),

If the program is

the call to SYSSQIOW invokes a routine in VMS.

call

builds

invokes

I/0O packet

from the parameters passed from the diagnostic program and then
(if
in VMS)
checks the privilege of the calling process
(the
diagnostic supervisor)
through internal data structures. The
by

device

completion

driven

the

event

flag).

status

message

the

examines

diagnostic

1/0 packet

interrupt

post

When

routine

then

adapter

(on

performs

MBA

stored

and

I/0O

the

loads

into

post

final

UBA)

event

completes
the

the

and

1I/0

waits

setting

function,

for

the

formulates

I/0

packet,

and

loads

the

contents.

The

the

I/O post queue

request

diagnostic

the

adapter

processing

I/0

for processing

flag,

registers,

status

drive

inserted

in a queue

the

(indicated

driver

and

with

initiate

clears

function

the

that

(IOSB),

posting

I/0

controller

buffer

the packet

routine,

and a

requested.

processing

contents,

and

The

I/O

device

and

with

buffer

software

sets

status

the

event

flag.

With

the

control.
(IOSB)

event

The

completed

flag

set,

diagnostic

determine

whether

successfully.

the

calling

program
The

then

not

IOSB

has

program

checks

the

(ESRAA)

I/0O

the

requested

the

format

shown

16 15
STATUS

BYTE COUNT

DEVICE-DEPENDENT DATA
TK-0743

Figure

5-16

1I/0

Status

Block

5-28

Contents

Block

function

5-16.

resumes

Status

(for disks)

was

Figure

the

low

order

the

test

indicating

bit

success,

the

(label

the

210$),

where

reads the data just written
If

the

low

order

bit

CHECKBLOCK routine
located

the

IOSB

the

blocks

program

GETBBFSECTOR

routine

(refer

the

all,

the

returns

queue

the

IOSB

1is

set,

loop

flag

and

then

calls

the

to the next

routine

I/0 request is retried.

set,

the

Figure

(module

1link

load block sector on the disk pack.
at

the

not

module

the

read

tests

code

turn,
be

a branch

reliability
calls

longword

portion

to the disk pack.

the

(refer

load

first

program does

map).

5-18)

control

If the load
block

which

This

(Figure

If the load

test

5-17),

the

routine,

which

block

test

disk

1in

reads

the

where

the

file cannot

file has been read

successfully, the routine checks through the item in the file to
see if the address of the block which cannot be written to is
already noted in the load block file. If so, the load block file

OK,

and

control

access

the

next block

list,

and

attempt

returns
on

again

calls

write

the

test

the disk,

SYS$QIOW,

pattern

If the

failing block address

calls

the

into

which

builds

sets

new queue

pointer

I/0

previously

explained,

the

is not

block

listed

the

in the load

argument

disk.

block

file,

the CHECKBLOCK routine returns control to test 1 which, in turn,
issues a second queue I/0 request (after checking for Control C).
If the request fails again
(IOSB status code = @), the
program
status

DSSERRHARD

block

information.

checks

the

each

into

the

queue

(read

routine

in the

supervisor,

and

diagnostic

buffer

contents

After

detecting

loop flag.

I1/0 request

block on

the

successfully,
the

block

disk

just

the

failure

loop flag

indefinitely.
pack until

before

going

written,

finds

beginning

5-29

this

set,

Otherwise,

label

dumps

other

type,

the

one

check

which

and

the

program

repeats

program checks

that

the

error

210$).

can

write

function

I12-ESRAAS,2

ESRAAG MAP, BB

5,0

BAD

BLOCK

FILE

ROUTINES

“AP RAD BLOCKS ZZ-ESRAASS,D

BAD

BLOCK

FILE

200713029
Av29Q
BFFC

2900
eang

24922
wwed

20UPR@3IA’EF
2030 PAN°9F
18

070080AG°9F
20000070 °9F

Se
s3

24
2%

sS4

Seé

"o
40

2A20e
Q@0E
aa1s

148

BLRS

“a18

149

$DS_ERRSYS,S

PUSHAQ
PUSHL

CALLS

#4,

w218

PUSHL

21
A
w320

PUSHAL
PUSHL

DD
F8

eun23

242C

AC
AC

9A
9A

A33
a3y

3IC

2038

TEST

SUBTEST

2%t

153

MOVZBL

CALLG

ONDSSERRSYS

(AP),

exDSSABORT

PICK

MOVZBL

TRACK(AP),R3

PICK

TRACK

CYLINDER(AP),R4

OPTF

154

¢+

PICK

CYLINDER

MOV

LUNCAP), RS

56
a2

D4
9A

PICK

143
BpYS

LOGICAL

158
156

CLRL

CLEAR

MovzeL

#2,R7

158

MOVve

DSKDC_GWDLIST+u[RS],R8

“psSp

PUSHL

@048

157

PUSKH

PUSHL
CALLS

Ré
42,GETBRF SECTOR

s
;s

PUSH SECTOR
READ BAD BLOCK

163

BLBS

Rp, SCAN

BRANCH

CMPB

#8,R6

HAVE

TAKE

ADD

wYs”
2pS2

159
160

Se¢

4apns4

weSB

161

162

@26t

164

BEQL

CHECK

wueld
adeeb

165
166

ADDL

#2,R6

PR6A

167

7068

168

2aeR

169

*ved

172

NUMBER

OFFSET

ADDRESS OF DRIVE

CHARACTERISTICS

BLOCKZX

SUCCESS
FIVE

FAJLURE
2

108

#%8,Ré

CHECK

PUSHL

PUSH

LUN

SECTOR

8R8

20¢%

CONTINUE

SECTORS

BEEN

EXIT

SECTOR

MOVZBL

SECTOR

FIRST

RRB

SCANg

108

LUN

READING

INITIALIZE

SECTOR

BLOCK READ

COUNTER

FROM PREVIOUS

EsF

171

PUSHL

PUSH

1974

2¢78

172
173

CaLLS
BLBC

¥#2,GETBAF SFCTOR
RO, U408

;s
¢+

READ NEXT SECTOR
IF FAILURE TRY NEXT BLOCK

DA
Rl
13

aA@7E
7086
¢8R

175
176
177

#ATR

Q8D

174

MCVZIBL

228

178

#2,R7

IGNORE

MOVL

@RBF POINTER{R7),R2

PICK

#=1,RE

CHECK

BEQL

40%

EOF

CMPW

Re, Ry

CYLINDERS

#2990

179

w92

180

CMPZYV

BNEG

AR9S

Ing

#0097

181

BNEQ

108

;

THEN

#499

182

cMPZV

#24,%8,R@,R3

5@
16

+79¢C
¢A9E

183

BNEG

RAAD

$DS_ RELBUF,S

THEN

184

vAAQ

~9AR
uasa

ARy

18%

11
F3

284
17Be
WARND
ueRE

186
187

INg e

13
8BF
c9
we

1RA

4rse

ADDL

Sé

HACY

1R9

¢0nCs

190

zaC?

191

CHECK

cMPB
BLSS
RLOCKZX?

D4
a4

Ing

PUSHL
PUSHAQ
PUSHL

wAC?

192

EAC9

193

wCe

194

WL A

198§

WACA

196

$AC A

197

2uCA

198

#1,BRBF

POINTER

¥
#3,

MOVZIBL

AND

ADBLEG

#127,R7,228

CLRL

THWE

FILE

BLOCK

FILE

MATCH

BRANCH

TRACKS

DON®T

MATCH

BRANCH

#9
BBF_POINTER

CALLS
#1,R9

BRB

BAD

ITEM

SECTOR

DON’T

IF SECTORS DON®T MATCH

DD
FB

THEN

21
”3

END

TRY

WORDS

FILE

dA22CAINTEF

LONG

29302002 °9F

TWO

BAD BLOCK

#16,%8,R9,R2

wvean

FIRSY
FOR

LOOP

NUMBER

CMPW

READ?

COUNTER

-1

AIBNAIA’FFUT
FFFF 8F
31

AANQ2ATF

INDEX

PICK UP

NnD
pD

HESE

INITIALIZE

UNIT

COUNTER

;

SS
56

SECTOR

1282

SECTOR

ce
11

sS4

#E$M,

MOVZwL

22
E8

sS7

enDSSGETYBUF

SECTOR(AP),R2

59
1)

SUCCESS?

BBF_POINTER

$DS_ABORT

Sé

BUFFER

PPPPOQCAEF

ALLOCATE

CALLS

150
151
152

;

MSG_ _NOMEM
LUNCAP)
SSER
ERROR 1

PUSHL

125

9028
92cC

167
-]

o LUN(CAP)
,MSG _NOMEM

231

POINTER

RA, 2%

58S

#1,BBF

PUSHL
PUSHL

2paC

Secguence
Page

“M<RP,R3,R4,R5,RE6,R?,R8,R9,R10,Ri1>

AA200UBPL°EFUS

BOPARPCACEF

+WORD

$DS, GETRUF,_S

26 AC

146
147

FR
E8

Frame L13
X@,3=6

(3)

24
52

Fiche 1
VAXe1f MACRO

(2351123}

144 +«PSECTY
CODES
145 CHECK_BLOCK1

ARYA0AQQ EF
28

31=AUGe1978

ROUTINES

exDSSRELBUF

CHECK,_ BLOCKX

INDICATE

EXIT

ALL

SUCCESS

BLOCKS

SECTOR

NOT

CHECKED

#2,R6

BUMP

Re,DSKDCEB, SECTOR(RB)
12%

¢
:

CHECK FOR LAST SECTOR
CONTINUE READING IF NOT

COUNTER

ELSE

EXIT

INDICATE

INDEX

AND

LOOP

TWO

LAST

SECTOR

FAILURE

CHECK
, BLOCKX:
RET

«SBTTL

GETBRF_SECTOR

ROUTINE
TK-1126

Figure

Routine

5-17

Code

5-30

CHECKBLOCK

2BCA

Se
53
54

OAVRUINRUEF
Y2

evee’cy

ARRARIRQNPEF

eaaa’cy

[e-S

273

274
27s
276
277
278
279
289
281
2R

pe
70
DE
a3

*ACC

BAANCAIRPCEF

WODF
WREL

2aca

72D ].)

e68
269
270
271
272

4erc

GANA

NAES
“WAES
WAED

AR’ cy

HWOFS

NeNa

Y
POORAVARPEF

ANFRA
012y

GETBBF,SECTOR::

LUNCAP),R2

Mova

DSKOC_QWDLIST+4[R2],R3

MOVAL

11 2A

2112

“c
AROABNR

2117

c83

“118

WOLIBNARPEFG2

284

*123

28§

MOVAQ

“128

286

“wi2F

MovL

287

$O10W,
G

136
*137

288
289

THE

POINTER

WRITE

}
;

WRITE

<=«

RIOPTRLIST[R2),RA

MOvVL
BRISL

LOGICAL

POINTER

TRACK

UNIT

LOCAL

RS,QI08,I0SR(RY)

(RY)
CALLG

RET

PUT, BADBLK

_
(R4),G"SYSSQIOW

BUFFER

WRITE

ADDRESS

SECTOR

BYTE

WRITE

PICK

ROUTINE

;

PICK

WRITE

t
:

CHARACTERISTICS
QIO

ARGLISY

READ

INTO

READ

COUNT

EVENT
QIO

ISSUE

@10

ARGLIST

IN QIO

ARGLISY

FLAG

PTR

y WRITE ASSIGNED CHANNEL

¥10S,READPBLK, QTOS_FUNC(RU)
j WRITE READ PHYSICAL
¥108M_INHERLOG,QIOS,FUNCCRU)
5 INWIBIT ERROR LOG

10STATUS,BLOCK[R2],RS

NUMBER

YO DRIVE

WRITE CYLINDER TO READ

Q10S, CHAN(R®), Q108 CHANCRY)

MOVL

«SBTTL

#512,0108,P2(R4)

EF.LIST[R2),0108, EFN(R4)

MOVL

1 2F

PICK

SECTOR
01088,
(AP
SECTORCR
),
Y)

MOVL

QIOSW,_CYLNDR(RY)

BBF _POINTER,GIOS,PI(R4)

MOVA

P0002VAQ°GF

#1,08KDCSW,CYLNDR(R3),=

MOVZWL

WPAPAPRAOACEFYD

QIOSB, TRACK(RY)

MOvL

;

#1,08KDCSB, TRACK(R3),

SUBW3

ARGLIST,R4

susR3

“M¢R2,R3,R4,R5,RE>

«WORD
MOVL

I0SB

CODE

ADDRESS

108B ADORESS

QIO

FUNCTION

REQUEST

INTO QIO ARGLIST

EXIT

TK-1125

Figure

5-18

GETBBFSECTOR

Routine

Code

5.8.2

Test

Disk Reliability Program Sample Error Message

Subtest

Error

12 of the disk reliability program

identifies bad blocks, on the disk pack under test, that are not

in Figure 5-19
entered in the bad block file. The message shown
numbers. The
error
jdentifies the failing test, subtest, and
ers (MBA
regist
l
message also includes a dump of the channe
registers in this case) and the RM@3 registers.

register are set,
Notice that bits 12 and 15 of the RMERl
er is @. The bad
indicating a data check error. The startingas cylind
by the contents
shown
block is located in sector 1, on track 4,
of the RMDA registers.

TEST 1: QUALIFICATION TEST
DRA1l QA BEGUN AT 2-FEB-1979 14:26:18.54

Y TESTS ** ESRAA *% ——- 5,2 khkkkkkkk
VAX DISK RELIABILIT
ERROR 12 2-FEB-1977 14:26:20.52

Kk kkkhk

PASS 1 TEST 1

SUBTEST #

HARD ERROR WHILE TESTING DRAl:
FUNCTION INITIATION SUMMARY:

FUNCTION ATTEMPTED: WRITE DATA

BUFFER ADDRESS RANGE:

FROM: 00000388

ATTEMPTING BYTE COUNT WAS: 512
STARTING DISK ADDRESS:

CYLINDER: @

TRACK: 4

TO: 000060587

SECTOR: @

FUNCTION ABORT SUMMARY:

000
UNDEFINED SYSTEM STATUS VALUE = po000
; ADAPTER CODE = 20 (X)
90000020
:
MBACSR
MBACR
MBASR

MBAVAR
MBABCR
MBAFMAP
MBAPMAP
RMCS1

:
:

20000004
30002009

@830

09008388
00800000
8OG0OBET
80000 0OF2

:
:
:
:

RMDS

RMMR

RMER1
RMAS

@028

; MWR, MSCLK

0000

9401
2814

:
:

RMSN

8846

2000

RMOF

RMDC

RMHR

RMMR 2

RMER2

RMEC1
RMEC?2

:
:

; DVA, FUNCTION = WRITE DATA

; MOL, DPR, DRY, vV

RMDA
RMDT

RMLA

PAGE BYTE ADDRESS = 188 (X)= 0000 (X
; MAP POINTER = #1(X),= @888
(X), SBI BYTE COUNT
COUNT
BYTE
US
MASSB
;
BIT 2, BIT 1, BIT @
5,
BIT
6,
BIT
7,
BIT
; BIT 31,
4, BIT 1
BIT
5,
BIT
6,
BIT
; BIT 31, BIT 7,

11Co

80080

; IE
; DT_COMP

0040

1890
2000

13FF

0000

#9836
2000

: DCK
;

; TRACK = P4 (D), SECTOR = g1(D)
; MOH, DRQ, DRIVE TYPE = RM@3
; SECTOR = @1(D)
; SERIAL NUMBER = 8846 (X)
; FMT22, ECCI
; DESIRED CYLINDER = 000604 (D)
;
; CNT/CYL, BUS IN LINES = 1FF(X)
;

; BURST LOCATION = #836 (X)
; ERROR BURST = 08008 (X)

Figure 5-19 ESRAA
sample Error Listing

5-32

TK-1237

CHAPTER

CPU

The

CPU

cluster

exerciser

programs

(ESKAX,

ESKAY,

and

the

common

all

three

pPackage

ESKAZ).

instruction
programs.

test

ESKAX,

done

contains
set

test,

the

tests.

timer

The

cluster

mode

clock

exceptions

return

halts

cluster

exerciser

control

first

and

exit
second

tests
the

and

the

memory

set
tests.
of the three

will

programs

fatal

not

test,
mode

the

three

and

test

failures;

error

map

messages:
and

code

the

classes

The

first
ESKAY,

instruction

test

types

errors).

quick

program

program,

Figure
6-1
programs.

handle

module

common

the

This

management

interrupts;

from

native

separate

are

package.

The

corresponding

(resulting

(CITS),

program,

exerciser

diagnostics

three

entry

allocations

exerciser

of
the

module

PACKAGE

consists

exerciser.

instruction

providing

unexpected

SBI

contains

the memory

errors,

the

and

ESKAZ

compatibility

showing

and

the

EXERCISER

modules,

services

verify
portion
of
the
cluster
includes the compatibility mode
part

Two

CLUSTER

safe

for

the

easy to follow as the code
for other diagnostic programs.
However,
the error messages which
the
programs
generate
are
detailed
and,
for
the
most
part,
self-explanatory.
The operator should understand the genera
l

structure

each

use

the

all

test and the error message formats
in order
to
facilities
provided
by
the
cluster
exerciser

programs.

6.1

CONTROL MODULE
control module in the cluster exerciser progra
ms serves as
interface between the programs and the diagnostic supervi
sor.
module performs the following functions:
The

Program

initialization

Execution

out

pass,

all

module

errors

exist

Initialization
variables
Set

tests

and

all

When

the

exception,

control
it

and

out

up
one

for

detects
error

6-1

pass

message

reinitialization

of
all
unexpected).

module

prints

summary

fielding

(expected

clean

twice

vectors

handling
Proper

and

unexpected
as

end

pertinent

exceptions

the

interrupt

message

the
The

shown

each

control

exception

interrupts

interrupt
in

Example

6-1.

ESKAZ

(MEMORY MANAGEMENT

AND

ESKAY

ESKAX

PDP-11 INSTRUCTIONS)

(NATIVE INSTRUCTIONS)

(QUICK VERIFY)

ESKAXO00
10236
CONTROL

ESKAX00
10236
CONTROL

ESKAXO1
18000
CITS

TIMER AND CLOCK TESTS

MEMORY

3822

10000

ARITHMETIC, LOGIC. AND

MANAGEMENT
ESKAZO2

TEST 01

ESKAYO2, TEST O1

COMPATIBILITY MODE

FIELD INSTRUCTION

ESKAX02, TEST 1

ESKAY 03, TEST 02

BRANCH, CRC, AND

QUEUE

COMPATIBILITY
INSTRUCTIONS
13500

ESKAZO3
TEST 02

gggzw EXIT

ESKAYOS, TEST 04

BRANCH. CRC, AND

FIRST PART DONE

ESKAX04, TEST 2
'

QUEUE

ESKAYO6, TEST 05
OPERAND SPECIFIER

FLOATING POINT DEPENDENT
ESKAY 07, TEST 06

DECIMAL STRINGS
ESKAY 08, TEST 07

EDITPC OPERATORS
ESKAYO09, TEST 08

SB!

VERIFICATION

17155

ESKAXO0S5, TEST 03

CHARACTER STRING
INSSTRUCTIONS
ESKAY10, TEST 09

PRIVILEGED INSTRUCTION
EXCEPTION, ESKAY11, TEST 10

MEMORY VERIFY
ESKAX06, TEST 04
TK-0737

Figure 6-1

CPU Cluster Exerciser Package Memory Allocation
6-2

hkdkdokkk

CPU CLUSTER EXERCISER -- 9.0

PASS

HARD

ERROR

TEST

UNEXPECTED
ERROR$

WHILE

TESTING

ERROR
CPU:

EXCEPTION

SERVICE

ROUTINE

EXCEPTION

00000030

SUBTYPE#

SUBTEST

00000001

VECTOR#

PSL

khkkkkkk

00000006

83Cg0000
0000110D

Example

6-1

Unexpected

Exception

Error

Message

Refer to Chapter 2 of the VAX-11 KA780 Centra
l Processor Technical
Description
for
a
discussion
of
vectors
and
subtypes.
When
the
machine check vector is asserted,
the exception handler attempts
to log out relevant status registers
on the stack before pushing
two longword parameters
(summary and length)
on the stack
(Table
6-1).
In addition, the subtypes for vector
4
(machine check)
are

listed

Table

6-1

Summary

6-1.

Summary Parameter,

Length

Parameter

for

Vector

Parameter

Subtype

Byte

Read

Timeout/SBI

TBUF

Parity

CP Cache

Instruction

Buffer

TBUF

Parity

Instruction

Buffer

Read

Data

Instruction

Buffer

TBUF

Parity

Instruction

Buffer

Read

Data

Read

Cache

Read

Parity
Data

Error

Fault

Substitute

Parity

Fault

Error

6-3

Fault

Error

Timeout/SBI

Confirmation

Error

Fault

Substitute
Error

Fault

Substitute

Confirmation

Fault

Fault
Fault

Table

6-1

Summary Parameter,

Length Parameter

for Vector 4

(Cont)

Summary Parameter
Subtype

Byte

Fo@

CP Read Timeout/SBI Error Confirmation Abort

CP TBUF Parity Error

CP Cache Parity Error Abort

CP Read Data

Parity

Error Abort
Abort

Substitute Abort

(Not Supposed To Be Here) Abort

Byte

This byte will be a nonzero value if a CP timeout

or CP error confirmation interrupt is pending.
Bytes

These two bytes must be

zero.

Length Parameter
Byte

The number of bytes

logged

out

are

exclusive

this parameter.
Byte

1--3

These three bytes must be

zero.

When an unexpected interrupt or exception occurs, information is
pushed on the stack by the exception handler as shown
6—20

6-4

in Table

Table

6-2

Information

by
Mnemonic

Meaning

SP:

Length

CPU

Bus

Stack

Address

Parameter

Summary

CES

Pushed on the
Exception Handler

the

Parameter

Error

Trapped

Status

acC

UPC

Virtual Address/
Virtual Instruction
Buffer Address
D

Interface
Data

Between

Paths

and

(Bytes

Memory

TBER®

Translation

Error

TBER1

Translation

Error

Buffer

TIME.ADDR

PARITY

Cache

SBI.ERR

SBI

Parity

Error

pPC
PSL

Note

that

handler.
accessed.

information

The

EIH

module

the

must

stack

not

saved

breakpointed

before

the

exception

this

data

(CITS)

COMMON INSTRUCTION TEST SERVICES MODULE

6.2

module

This

implement a

consists

table-driven

test method

for

that

routines

software

group

a majority of

the

VAX-11

instruction set. CITS interprets the contents of a specially coded

test table and executes tests of VAX-1l1l instructions. CITS is also
function and memory
part done
first
the
of
tests
for
used
management. A copy of each of these test instructions is coded in
executed,

the

test

data

the

Before

(RN).

mode

deferred

placed somewhere

instruction

test
in

memory,

and

1is

the

registers are loaded with the addresses of that test data. After
the test instruction is executed, the contents of the registers

and the contents of the test data area of memory are checked.

There are four main routines in CITS that do the work of executing
tests: CITS DECODE, CITS SETUP, CITS EXECUTE, and CITS CHECK.
6.2.1

This

and

CITS DECODE

routine

generates

other

the

for

directions

entry,

table

test

one

decodes

three

table

routines

cases,

use.

into

the

These directions are lists of addresses and other variables placed
in the parameter blocks of the CITS data area.
CITS SETUP

6.2.2

CITS SETUP moves the test data from the common data pool

The

buffer.

operand

location

the

operand buffer

1is

data

are

the data

standard

referenced during execution of the test instruction. The locations

used

background

destination

for

A5,

hexadecimal

pattern,

operand, whether source or destination,
by

each

with

byte.

each

Also,

is preceded and followed
CITS_SETUP

pattern.

background

the

longword

filled

loads

registers R@P--R6 with the operand addresses to be used by the test
instruction.

PC and

initial

The

PSL calculated

by CITS DECODE

are

PSL

and

pushed on the stack by CITS SETUP along with a return address. The
return

address

save

a routine

the

exerciser's

points

the

result

registers.

6.2.3

CITS EXECUTE

enables

CITS EXECUTE

exception

handler

react

properly for the current test. It passes the address of a CITS
unexpected exception handler and enables validation of the

exception of trace trap being tested,
executes

REI

start

the

test.

from

the

console.

1if any. CITS EXECUTE then

A NOP

instruction precedes

the

REI and can be used for scope sync if the microbreak address is
set

correctly

When

the

test

instruction

finishes, the test subroutine returns to a result-saving routine.

The PSL and registers R@--R6 are saved in the execution parameter

s the exception handler Interface Data
block, as are the contentof
Block

(IDB).

Also

saved

indication

instruction branched, if it is a branch instruction.

6.2.4

CITS_ CHECK

CITS CHECK checks

the

results

checks the source operands
directions and addresses

instruction

and background
its
into
put
6-6

whether

the

and

also

execution,

pattern. It uses the
parameter block by

CITS_DECODE

exceptions

control

(whether

registers

R@--R6,

CITS_CHECK

also

make

sure

CITS

checking.

an
and

memory

checks

that

exception
the

the

checks

happened

data.

longword

background

branches,

and

When
before

pattern

the

checking

memory

and

each

after

has

not

PSL,

right

PC),
data,

operand

been disturbed.

CHECK keeps a list of all errors found during one
test case.
This complete list will be typed out when the test
module using
CITS makes the $DS ERRHARD call to the diagno
stic supervisor.

6.2.5

CITS_ SUBTEST

CITS_SUBTEST

most

tests

table,
order

the

calling
and

CITS

6.2.6.1

Message
is

extended

error

numbers;

the

preceding

four

supervisor

printout

for

that

case

addresses

CITS

routine

that

processes

CITS

error

routines

reporter

used

complete

Subtest

and

the

referenced;

examples

executes

supplies

number;

the
proper
necessary.

when

NOP

test,

subtest, and error
code
of
the
failing

operand

detailed

Troubleshooting
a

test

data;

Features

instruction

etc.

Refer

interpretation.

just

SCOPE

before

the

SYNC

REI

instruction.
Putting
the
microaddress
of
8E
into
register
21
will
cause
a
sync
pulse
to
be
generated
microsequencer board (M8235) each time a NOP is execute
d.

To loop on a

failure with SCOPE SYNC,

>>>

START

/ID

SET

DS>

START

—-

the

ID
on

Bus

the

perform the following steps:

10000

(DIAGNOSTIC

DS>

test

Messages

test

6.4.2

CITS_EXECUTE

CITS.

Heading -A standard
diagnostic
supervisor
(by
the
supervisor).
That
is
followed
by
an

typed

instruction;
Paragraph

control

call

the

Error

heading

subtest

that

the

calling

6.2.6

6.2.6.2

common

SUPERVISOR

STARTUP)

IE1,LOOPD
/TEST:

(WHERE

'N'

FAILING

TEST

NUMBER)

ETC.

Halt

Before

the

test-case

(CITS

CASE)

content

executed.

the
is

Failing

Test

Case

-executing
always

CASE HALT.

incremented

This

-- At

1loop,

these

the

and

beginning
case

compared

are

equal,

number
with

HALT

the

feature allows the operator to stop before
execution
of
a
particular
case,
in
order
to
examine
registers,
e.g.,
deposit
the
hex
case
number
into

CASE_HALT.

needed,
Then

Run

the

test

until

use CONTINUE until

either

set

breakpoint

6-7

the

halt

you get to
or

the

deposit

executed.

(If

right subtest.)
byte

zero

HALT)

You

have

CITS

SYNC

and

now stopped

type

CONTINUE

just

before

to get

the

REI

instruction
of
interest.
Use
the
console
whatever operation you wish to perform and
desired.
,

that

the

HALT.

test

to
set
continue

up
as

Figure 6-2 shows the sequence of events followed by CITS in the
execution of
ESKAY@3,
test
2,
the arithmetic,
logic,
and field
instruction
test module.
6.2.6.3

Unexpected
Exceptions
in
exception
occurs
during
a
test,

CITS

containing

error

exerciser

the

case

exception

number

handler.

and

the

This

-If
an
unexpected
will
print
a
header

CITS

printout

information

£from

the

only occurs while CITS

is handling unexpected exceptions, i.e., only during the execution
of
the
five
1instructions
before
the
test
1instruction
and
approximately through
the
three
instructions
after
it
(Example
6-2). If an exception occurs outside of that set of instructions,
then the error typeout is not handled by CITS and will not have a
case number heading.

kkk*%k*%

CPU

PASS

HARD

ERROR

TEST

ERROR

TEST

SUBTEST

TESTING

ERROR
KA@:

CASE NUMBER:

—-

9.0

*xkkkkkk

INSTRUCTION

TEST

ERROR

EXCEPTION

00000004

SUBTYPE#

EXERCISER

00000001

VECTOR#

PSL

WHILE

UNEXPECTED

ERROR$#

CLUSTER

00000000

(QOl1FOQEQD

00000003

Example

Refer

unexpected

6-2

Example

Unexpected

6-1

exception

Exception

(Paragraph
error

message

6.1)

CITS,

for

format.

Error

Message

explanation

the

‘

6.2.6.4
Result Register Errors -- If the contents of any of the
registers R@--R6 are not as expected,
CITS prints out
initial,
expected, and actual values, as shown in Example 6-3.

6-8

DIAGNOSTIC
SUPERVISOR

ESKAY 03

START
CASE =
CASE +1

COMMAND LINE
INTERPRETER
YES

DEPOSIT

OO0 IN CITS
SYNC (HALT)

INIT

CITS DECODE
(DECODE CASE)

'
DISPATCH
ROUTINE

i
CITS -

SETUP

—

TEST 2

CITS EXECUTE

'
CITS -

SUBTEST

STEP

THROUGH

INSTRUCTION

CASE =0

REI, POP PC,
POP PSL, EXECUTE
INSTRUCTION

RETURN FROM
EXECUTION

CITSCHECK

ERROR

YES

ERROR

MESSAGE

NO
TK-0755

Figure
Test

6-2
Case

Execution
in

6-9

ESKAY@3

PASS 1

kkkkkkkk

CPU CLUSTER EXERCISER -- 9.0

kkkkkkkk

ERROR 17

SUBTEST 4

TEST 2

HARD ERROR WHILE TESTING KA@: INSTRUCTION TEST ERROR
? ERROR IN TEST CASE NUMBER: 17
? REGISTER CONTENTS ERROR

INITIAL

EXPECTED

ACTUAL

poP05404

po0038040

P00038840

90005414

po038000

p0008000

po0@P5418

0p000000

0o000000

Poo00000

00005476

p0005476

gooBB000

p0000000

Po000000

- R5

goe00000

0o0P0000

po0000300

000000080

00000000

go000000

Example 6-3

Initial data

shows

the

Result Register Errors

values

start of the instruction.

loaded

into

the

registers

the

If the longword
6.2.6.5 Leading or Trailing Background Errors -- chang
ed during
is
nd
opera
an
before or the longword after
1longword
the
means
g
Leadin
error.
execution, CITS reports the
ecimal
Hexad
.
data)
the
than
ss
before the data (lower addre

AS5A5A5A5 is the standard background pattern.

—-- When CITS detects a data error, part of
Data Errors
in the
the error typeout is an operand number. That is, ta number
the
of
order
o-righ
left-t
the
to
g
range 1 to 6 correspondin
instruction
operands for the instruction. For example, in a MOVL
ation
destin
the
and
1
d
operan
called
be
the source longword will

6.2.6.6

longword

operand 2.

access
If the incorrect operand is not of a writable or modifiable
read-only

type, then the error message includes the statement:
operand overwritten.

error
If the incorrect operand is writable or modifiable, thenle the
6-4).
message includes the statement: incorrect result (Examp

6-10

*k*k****

CPU

PASS

TEST

HARD

ERROR

CLUSTER

SUBTEST

WHILE

ERROR

INCORRECT

EXERCISER

TEST

TESTING

CASE

RESULT

KA@:

NUMBER:

OPERAND

EXPECTED

ACTUAL

Co000009

40000000
Example

Example
errors,

6-4
the

ERROR

6-4

—--

9.f

*%kkkxx

INSTRUCTION

TEST

ERROR

190

CITS

Detects

Longword

Data

Error

shows incorrect longword data. For word and byte
format is the same except that a word is typed as

data
four

hex
digits,
and
a
byte
as
double-floating word typeout,

two
hex
digits.
In
a
quadword
or
the lowest addressed longword is the
first line of data typed. That is the longword containing the sign
and the exponent for the double-floating case.
(In
the quadword
case,
the
sign
is
in the longword typed on the second
line of

data,

Example

**k*k*%%*

CPU

PASS

HARD

ERROR

6-5.)

CLUSTER

TEST 2

SUBTEST 1

WHILE

ERROR

2?2

INCORRECT

EXERCISER —-

TESTING

KA@:

OPERAND

EXPECTED

ACTUAL

00000000

996740D6

PO000000

8 6A2E99E

Errors
etc.)

ERROR 91

IN TEST CASE NUMBER:
RESULT,

in
are

Example

6-5

string

data

displayed

9.0

CITS

*kkkkkisx

INSTRUCTION

TEST

ERROR

91
2

Detects

(character
Example

6-6.

Quadword

string,
:

Data

packed

Error

decimal

string,

*kk%kk*%%*

CPU

PASS

HARD

ERROR

TEST

CLUSTER

SUBTEST

WHILE

ERROR

INCORRECT

EXERCISER ——

TEST

TESTING

CASE

RESULT,

ERROR
KA@:

.« .ASA5%39%4E39...
FROM

START

Example

Each
only

byte

TEST

ERROR

ACTUAL

BYTES

EXPECTED

**kkkk*x

INSTRUCTION

NUMBER:

OPERAND

STRING

6-6

CITS

Detects

String

Data

Error

typed as two hexadecimal digits.
The expected data
the good value of the byte that did not compare. The
data shows five bytes of the result string.
The beginning

shows

actual

of the string is to the left, the end is to the right. The left
hand
two
bytes
(four
digits)
are
good
result
data;
the
byte
between asterisks (*)
is the one that failed to compare; and the

right
two
bytes
are
the
start of the
rest of the
(uncompared)
string.
The last line
tells how far
from the
beginning
of
the
string the bad byte is.

6.2.6.7
PSL
Errors
-Result
PSL
errors
are
typically
wrong
condition codes. The condition codes are the right-hand hex digit
of the PSL. The E in the second from right-hand digit indicates
that
the
decimal
overflow,
floating
underflow,
and
integer
overflow traps are enabled (Example 6-7). This condition is always
true

when

the

*#kkkkk**

CPU

PASS

HARD

ERROR

RESULT

test

TEST

CLUSTER

WHILE

TEST

PSL

instruction

EXERCISER

SUBTEST

TESTING

CASE

ERROR
KA@:

NUMBER:

being

—-

9.0

executed.

**kkkk**

INSTRUCTION

TEST

ERROR

EXPECTED

ACTUAL

PO1FPOES

PO1FOQE]
Example

6-7

6-12

PSL

Error

ERROR

6.2.6.8
branch,

Branch
failure

Errors
-When
testing
to branch when expected or

expected

produces

**%kkk%x

CPU

PASS

HARD

ERROR

)

ERROR

TEST

EXPECTED

message

CLUSTER

TEST

BRANCH

KAg:

NUMBER:

DIDN'T

Exception

message

error

trap

fails

CPU CLUSTER

PASS

HARD

ERROR WHILE

)
)

TEST

ERROR

INCORRECT

*kkkdsk#

INSTRUCTION

6-8

Branch

Trace

TEST

ERROR

Error

Trap

Errors

produced

occur

all.

EXERCISER -~

SUBTEST

TEST

TESTING

CASE

NUMBER:

EXCEPTION

expected

exception

PBOBA25F5

PB0602566
EXCEPTION

ACTUAL

PO1FBOBES

PO1FOBE4

Example

the

6-9

both

exception.

a valid

trace

**kkkkk

INSTRUCTION

TEST

ERROR

Exception

Error

PSL

EXPECTED

Example

9.§

ACTUAL

INCORRECT

ERROR

KAQ:

EXPECTED

time

6-8.

The PC and PSL of expected exce
ptions and trace traps are
checked.
If an error is detected, a messa
ge like that in
Example 6-9 is typed.

¥*kk%x*x*

—-

Example

HAPPEN

Expected

trace

Example

6.2.6.9

that

ERROR

TESTING

CASE

EXERCISER

SUBTEST

WHILE

instructions
that
may
a branch taken when not

6-9

the

Expected

and

the

Example 6-10
trap occurred.
6-13

PSL

were

only

the

incorrect

PSL

was

the

wrong

time

the

CPU CLUSTER EXERCISER —-— 9.§

#%*x%**k%
pPASS 1

ERROR 127

SUBTEST 2

TEST 2

*&k&kk¥x

HARD ERROR WHILE TESTING KA@: INSTRUCTION TEST ERROR
?2 ERROR IN TEST CASE NUMBER: 127
? INCORRECT TRACE TRAP PSL

EXPECTED

ACTUAL

PO1FQOF @

PO1F@OF8
Example 6-19

Trace Trap Error

If the extended error printout
6.2.6.10 Extended Printout --addit
ional data will be typed out
flag is enabled, the following
on error detection (Example 6-11).
[1.]

INITIAL CONDITIONS:

PC 0#0@8@4873

PSL @01F@OFF

OP CODE —-- 74 WITH REGISTER INDIRECT OPERANDS
[2.]

[3.]

INITIAL REGISTERS R@-R6:

POBOACOH4

PO0POBACl4

000

9B0BAC2D

PPIGBAC39

000

00000000

SOURCE OPERAND DATA:
OPERAND

FFFEAFFF
FFFFFFFF

OPERAND 2
FF

OPERAND

Poe04080
00000000

Example 6-11

Extended Printout
6-14

Notes

for

Example

6-11.

This

is the first line of the extended typeout. PC is
the
location of the test instruction, which can be examined
if the user wants to see the hex code.

PSL

the

value

the

PSL

before

exXecuted.

CODE

the

example

of
2.

The

INITIAL

the

test

was

executed.

These

All

the

REGISTERS

the

actual

registers

source

(read

OPERANDS

has

instruction

are

the

value
EMODD.

INDIRECT

operand

hex

the

instruction

instruction,

means

that

address

which

has

operand

the

typeout

tells

where

were

memory

when

addresses

contents

listed

above

the

the
the

the

address

etc.
operands of
instruction

pointed

(2).

modifiable)

operands

Longword

are

typed.

Formats:

Byte

Word
Longword

XXXX
XXXXXXXX

Quadword

XXXXXXXX

Low Address

XXXXXXXX

High

Strings

XX,

Left

XX,

side

the

preceding

VAX-11/780

example

Longword

XX,...,XX
printout

Long
strings
are continued

the

Address

lowest

are

printed

for

lines

have

the

Architecture Handbook

many

following

the

further

help.)

Operand

MULR

(RO)

Double

Operand

FFFFFFFF

MULRX

(R1)

Operand

Byte

MULD

(R2)

Double

00000000

The

and

5th

Operands

4th

Operand

INT

(R3)

Operand

FRACT

(R4)

are

address

bytes
as

per

byte.
line and

needed.

operands.

(Refer

instruction

card

for

FFFEAFFF
00004080

Destinations:

Long
Double

6.2.7
How To NO-OP a Test Case
If
it
is
necessary
to
bypass
a
test
case
while
waiting
hardware ECO or a microcode ECO, refer to Example 6-12.

6-15

for

105

INSTRUCTION

: OPERANDS
:SUB: 0

2C9

950
951
952
953
954

2C9

955

2C9

91-9

;CASE

; SUBD2
e

2C9
2C9

946
947
948
949

2C9
2C9

2C9

P8FQ9D62

2C9

28
g1
g1

2CC

;DIF: 1.0
;CONDITION

I_SUBD2,

EXP-DIF:
INITIAL:

CODES
CC_NzVC,

CC_

¢,

D12,

~ .BYTE I SUBD2, <-C<I_SUBD2>>,
.BYTE

2CD

.BYTE DP D2

2CE

.BYTE

DP D2

6-12

Case

Example

D12

Instruction

105

SUBD2

l.0
EXPECTED:

1111
D8

D2,

DP D2

0009

<I16*<CC_NZVC&15>+CC_@&15>>

Load

ESKAX.EXE

Look

Set

the

the base address of the PSECT <. BLANK
.> in the 1link
map of this program for the module that has
the data for the
test case to be No-Oped.
console

base

VALUE)
.

Find

the

line

sure

you

are

'Examination

Count

the

bytes.

2C9

number

That

the

right

test

right

place

(Example

location

single

bytes

would

for

2C9)

this

that

case

value

and

(i.e.,

examine

Example

6-12,

2C9

Set

the

relocation

should

following

give

the

where

back

0).

6.3

make

@8F@9D62.

line

that

has

three

example.

303FC,

6-12).

Deposit a new longword, at the address just examined,
the count from the pPreceding step follow
ed by @3FcC.

examined.

2C9

zero

the

when

made

address

finished

just

(i.e.,

ESKAX DESCRIPTION

6.3.1
This

Compatibility Mode Entry/Exit Module (ESKAX@2, Test 01)
tests
the
conditions
generated
when
the
central

module

processor

enters

conditions

and

leaves

functions

the

are

compatibility

mode.

tested.

The

following

ESKAX

Test 1, Subtest 1 -- This subtest performs
illegal entries
in compatibility mode expecting and checking for reserved
operand
faults.
The
bit
settings
in
the
PSL
that
will
cause
reserved

operand

faults,

shown

Table

attempt

enter

6-3

Reserved

PSL

Operand Faults and PSL
Compatibility Mode Entry

Bit/s

DV<7>

Nonzero

FU<S6>

Nonzero
Nonzero
Nonzero

CUR

MOD<K25:24>
PRV MOD<23:22>

Not

IS<26>

Nonzero

FPD<K27>
in

Table

6-3

Bit

Condition

IV<5>
IPL<20:16>

conditions

mode,

The

compatibility

6-3.

Nonzero
are

tested

6-17

one

time.

Settings

are

The following two examples are typical of ESKAX test 1,

subtest _,

messages.

error

*xkkx%kx*

PASS 1

CPU CLUSTER EXERCISER —— 9.@

TEST 1

SUBTEST 1

ERROR 2

HARD ERROR WHILE TESTING CPU:

**%kkkx%

21:25:41.22

19-JUN-1977

EXCEPTION

INCORRECT

FROM

ILLEGAL

ENTRY

VECTOR

TYPE CODE

EXPECTED PC

ACTUAL PC

PSL ENTRY

MNEMONIC

NONE

g@e0a7D74

PeP@7D76

83CPPA8A

Example

ESKAX Test

Subtest

TEST

SUBTEST 1

ERROR 2

HARD ERROR WHILE TESTING CPU:

Error

khkkkkhk

CPU CLUSTER EXERCISER -- 9.0

kkkkkkkk
PASS

6-13

19-JUN-1977

21:25:53.04

EXCEPTION PC FROM CM ILLEGAL ENTRY
INCORRECT

VECTOR

TYPE CODE

EXPECTED PC

ACTUAL PC

PSL ENTRY

MNEMONIC

NON

gaa@7D74

@@9087D54

83CPA040

Example 6-14
Interpretation of

ESKAX Test 1, Subtest 1,

Example

Error 2

6-13.

is the reserved operand fault vector expected.

The

EXPECTED and ACTUAL PCs are self-explanatory.

There is no type code pushed on the stack.
state of

the

PSL to cause the

DV is the PSL bit that was nonzero

ESKAX Test 1,

Subtest

(Table 6-3).

2 -- Compatibility mode trap

upon a valid entry into compatibility mode

Table 6-4

fault was 83C@0g0d84.

instructions

(Table 6-4).

Compatibility Mode Trap Instructions
Op code

Mnemonic

200003

BPI

pa00a4

I0T

104000

EMT+0@

104400

TRAP+0
6-18

—-

mode

Compatibility

reserved

into compatibility mode

HARD

valid

entry

6-5).

Op code

Mnemonic

000000

HALT

000001

WAIT

P00035

RESET

000230

SPL

306400

MARK

@75000

FADD

875010

FSUB

275020

FMUL

@75030

FDIV

170000

FP11

Error Messages

kkkkkkkk

CPU CLUSTER EXERCISER -- 9.0

TEST 1

SUBTEST 2

ERROR WHILE

TESTING

PASS 1

upon

Compatibility Mode Reserved Instructions

Table 6-5

Typical

(Table

instructions

ERROR 3
CPU:

khhkkhkk

19-JUN-1977

EXCEPTION

PSL

21:29:30.40

FROM COMPATIBILITY

INCORRECT

MODE TRAP

VECTOR

TYPE CODE

EXPECTED PSL

ACTUAL PSL

TRAP

MNEMONIC

83Co0000

83C00002

2003

BPT

Example

6-15

ESKAX Test

6-19

Subtest

Error

Akkkdhkx

CPU

PASS

HARD

ERROR

MODE

TRAP

TEST

CLUSTER

SUBTEST

WHILE

TYPE

TESTING

CODE

*kk%kx***
1

HARD

ERROR WHILE

MODE

TRAP

TEST

19-JUN-1977

kkkkkkkk

EXCEPTION

PSL

21:29:42.21

FROM

COMPATIBILITY

PSL

ACTUAL

6-16

83C0P00B02

ESKAX

Test

EXERCISER

SUBTEST

TESTING

PSL

ERROR
CPU:

Subtest

9.0

19-JUN-1977

TRAP

MNEMONIC

go04

IOT

Error

*kkkkkk*

EXCEPTION

PSL

21:29:54.02

FROM

COMPATIBILITY

INCORRECT

VECTOR

TYPE

CODE

EXPECTED

PSL

ACTUAL

83CP0000
Example

Interpretation

type

6-17

Referencing

IOT
code

show

Subtest 3 -(PSL<4>) set
for
for

pushed

Chapter

shown

This
upon

Subtest

and

TRAP

MNEMONIC

8800

EMT

Error

well

TRAP vector

typecode

the

the
of

expected.

stack.

system

reference

indicates

equivalent

the

hex

ACTUAL

PSLs

are

self-explanatory.

subtest tests the T-bit trap by
entry into compatibility mode:

that

does

not

that

does

trap.

having

trap

NOTE

IOT

manual
fault.

the

octal

the

T-bit

6-4).

instruction
instruction

Both

6-16

that

(Table

EXPECTED

Test

compatibility mode

code

SPL

83C00002

ESKAX

Example

the

would

a.
b.

CPU:

EXPECTED

CPU CLUSTER

PASS

ERROR

9.0

83C00000
Example

INCORRECT

VECTOR

EXERCISER

and

cases

NATIVE mode.

6-20

are

serviced

Typical

Message

Error

kk*%k**x*

CPU CLUSTER EXERCISER —-

PASS

TEST

SUBTEST

HARD

ERROR WHILE

TESTING

ERROR 4
CPU:

9.0

**kkkxkx

19-JUN-1977

T-BIT

TRAP NOT

EXPECTED EXC

VECTOR

TYPE CODE

MNEMONIC

@BCO

NONE

TST RO

Example 6-18

ESKAX

Test

Interpretation of Example 6-18

21:32:86.80
TAKEN

Subtest

Error

(this printout

for Case

B):

This instruction, which was to execute and then
T-bit trap, was 'TST R@' with TRACE PENDING prior
execution (PSLKLTP>).

take a
to its

The

is the vector expected

to field the T-bit trap.

type

the

hex

equivalent

code

the

pushed

octal

code

for

'TST R@'

BC@.

stack.

Subtest 4 -- This subtest performs an RTT/RTI instruction with the

T-bit set in the PSW image on
from the stack by the RTT/RTI.
Typical

Error

khkkkkkx

the

which

popped

Messages

CPU CLUSTER EXERCISER --

TEST

stack,

PASS

SUBTEST 4

HARD

ERROR WHILE

TESTING

ERROR 3
CPU:

9.0

kkkkikkk

19-JUN-1977

21:33:43.60

FROM RTT TRACE

TRAP

INCORRECT

VECTOR

TYPE

NONE

CODE

Example

EXPECTED

g00068508
6-19

ACTUAL

gP0B8408

ESKAX Test

6-21

Subtest

TRAP

MNEMONIC

P00 6

RTT

Error

*kk%k***

CPJ CLUSTER

PASS

HARD

ERROR WHILE

TEST

EXERCISER

SUBTEST

TESTING

ERROR
CPU:

—-

9.0

19-JUN-1977

FROM

***%kk*%

RTI

21:33:54.7¢

TRACE

TRAP

INCORRECT

VECTOR

TYPE

NONE

CODE

*«

Interpretation
UunwNn
-

ACTUAL

00008508

Example

EXPECTED

6-20

type

The
The

RTT
hex

Test

000 2

Subtest

to field the
the stack.

instruction was under test.
equivalent of the octal code
and

MNEMONIC

Error

RTI
3

6-19

the vector expected
code is pushed on

EXPECTED

TRAP

PPo08408

ESKAX

Example

ACTUAL

PCs

are

T-bit

for

RTT

trap.

self-explanatory.

Subtest 5 -- This subtest performs checking of 0dd Address errors
while in compatibility mode. This is accomplished by executing a
PDP-11 MOV instruction with unaligned SRC and DST operands.
Typical

Error

kkkkkkkk

Messages

CPU

PASS

HARD

ERROR

TEST

UNALIGNED

CLUSTER

SUBTEST
TESTING

SOURCE

CONTENTS

TYPE

CODE

ERROR
CPU:

9.0

19-JUN-1977

ODD

EXPECTED

6-21

CPU CLUSTER

PASS

HARD

ERROR WHILE

TEST

VAL

ACTUAL

SOURCE

VECTOR

TYPE

TESTING

ERROR
CPU:

CONTENTS

CODE

21:35:17.19

TRAP

CAUSED

VAL

Subtest

MNEMONIC

17DF

UNALIGNED

—-

9.@

19-JUN-1977

ODD ADDRESS

TRAP

Error

****k¥k*
21:35:29.58

TRAP

CAUSED

CHANGE

EXPECTED

Test

EXERCISER
5

ADDRESS

PO OE

ESKAX

SUBTEST

khkkkkkk

CHANGE

20 0A
Example

UNALIGNED

WHILE

VECTOR

***kk*k%*

EXERCISER

VAL

ACTUAL

VAL

200K

TRAP

MNEMONIC

17DF

UNALIGNED
DST

Example

6-22

ESKAX

Test

6-22

Subtest

Error

Interpretation

type

The

the

position

The

the

hex

under

6-22

compatibility mode

code

caused
4.

Example

6
of

the

expected.

stack.

destination

address

boundary

failure.

equivalent

test

pushed

TRAP vector

17DF

the

octal

code

(this

translates

VALUES

are

for

the

instruction

@13737

PDP-11

code)
.

EXPECTED

and

ACTUAL

self-explanatory.

NOTE

Subtest

JSR

R4,

Typical

trap

neither

SRC

nor

performs

This

with

subtest

destination,

checking

illegal

i.e.,

or
RS

Messages

CPU

PASS

TEST

HARD

ERROR

TRAP

INCORRECT

CLUSTER

TYPE

EXERCISER

SUBTEST

WHILE

VECTOR

TESTING

CODE

ERROR
CPU:

EXPECTED

9.0

19-JUN-1977

PSL

6-23

ESKAX

Test

HARD

ERROR

TRAP

INCORRECT

TEST

SUBTEST

WHILE

VECTOR

TYPE

TESTING

CODE

ERROR
CPU:

EXPECTED

PSL

83CO0000
Example

6-24

PSL

Subtest

9.0

6-23

INSTRUCTION

TRAP

MNEMONIC

p044

JMP R4

19-JUN-1977
FROM

21:36:43.64

ILLEGAL

ACTUAL

Error

kkkkkkkk

PSL

83000000

ESKAX Test

21:36:32.03

ILLEGAL

83D000P0D

CPU CLUSTER EXERCISER --

PASS

FROM

kxkkkhkk

ACTUAL

83C00000
Example

kkkkhk*k

Address

should change, since
should
not
go
to

Error

kkkhkkkk

0dd

DST initial values
the
instruction
completion.

instructions
JMP

Subtest

INSTRUCTION

TRAP

MNEMONIC

39045

JSR

Error

(R5

DST)

Interpretation of Example 6-24
1.

A type code

The instruction that failed was the JSR R4, RS5.

The hex
is

the

vector

expected

equivalent

pushed

for

field

the

stack.

the octal

TRAP.

code of

this

instruction

@965.

EXPECTED

and

ACTUAL

PSLs

are

self-explanatory.

ESKAX@2
(test 1) is executed in the user mode for test purposes.
However, the module is serviced in the kernel mode, and control is
returned to the kernel mode on completion of the module.
The operator should note that testing of the T-bit operation with
servicing done in the compatibility mode has not been covered.

6-24

6.3.2
First Part Done Test (ESKAX@4, Test 2)
First
Part
Done
(FPD)
is
the
name
of bit
27
in
the
PSL.
It
provides
a
facility
for
interrupting
certain
potentially
1long
executing instructions during processing and resuming them later.
Only a
few
instructions
are
interruptable
in
this
sense.
Most
instructions
acknowledge
interrupts
before
their
execution,
or
acknowledge them in mid-operation by backing up to the beginning
and pretending that they have not yet started. A few instructions,
however,

are
potentially so
lengthy that
this
is
not
feasible.
These are the character and decimal string instructions,
POLYF,
POLYD, and CRC. Each of these instructions writes a control block

into
the
general
registers.
Should
an
interrupt
be
requested
during processing, the current state of the operation (i.e., what
it
is doing
and
how far
it has gotten)
can be saved
in this
control block to be retrieved after the interrupt is processed.
The instruction then sets FPD in the PSL,
and acknowledges the
interrupt. Upon return from the interrupt, the FPD bit is set in
the PSL, so that rather than restarting, the instruction restores
its state from the point at which it was interrupted.

6.3.2.1

Possible

implementing

restore
a

the

First

state anywhere

fault)

and

operation

Part

Done

Failures

FPD capability must

it does

anywhere

some

cases

able

for

interrupts.

complex,

and

The

microcode

correctly save

a memory reference

checks

and

(which may cause
The

state

possible

the

that

the

microcode does not save or restore everything correctly.
If the
instruction is later resumed, the state of the machine e.g., 1in
the
form
of
contents
of
general
registers,
may well
have
been
changed by the instructions executed in the interim, and will thus
be incorrect. This will cause unpredictable results, most likely
in the form of incorrect data written, wrong lengths and wrong
condition codes, and will be easy to detect.

The

instructions may also

and

failing

registers

are

instruction.

checking
still

set

FPD.

used

This

fail
This

by saving
would

arguments

condition

will

the

interrupt

routine

clear,

the

original

arguments

6.3.2.2

First

Part

Done

Test

in
be

state

normally

(perhaps

appear

the

are

modified

restarting

detected

make

correctly)

when

certain

the

that

the

test

FPD

timer

unchanged.

Procedures —-

The

interval

used
to
generate
interrupts
during
the
testing
of
each
instruction,
in order to check the microcode and
the taking of
interrupts.
Although each
instruction
is
interrupted
constantly

during

execution,

After

having

been

eventually

tested

with

run

completion.

interrupts,

the

instruction's

ability to handle page faults is tested. An instruction may have
up to six operands; twelve pages are set up to hold them, allowing
each operand to be placed near an independent page boundary. When
the
instruction
begins
execution,
each
page
is
1invalid.
As
it

attempts

access

its

operands,

6-25

the

instruction

1is

repeatedly

faulted.

Each
fault
validates
the
page
referenced,
so
that
the
instruction progresses, but this alone does not ensure that it is
tested fully. As each page is referenced
(and faulted)
the first

time,

all

process

only
As

the

tests

once,

other
all

the

test

example,

pages

the

holding

cases.

operands

Since

each

instruction manages

consider

the

testing

are

page

made

has

invalid.

first

This

reference

finish.
an

instruction

with

two

string
operands
and
instruction accesses

one
non-string
operand
in
which
the
the
non-string
operand
first,
and
then

processes

(e.g.,

the

strings

CMP3).

First,

the

non-string

operand

is referenced, faulting the page containing it. Upon restart, the
instruction
fetches
the non-string operand without problem,
and
begins processing the strings. Since each operand is located just
before a page boundary, the strings will cross the boundaries. As
the instruction progresses, it will attempt to reference the first

page of the first operand, the first page
the second page of the first operand, and

of the second operand,
the second page of the

second
operand.
Because
faulting
in
a
page
signals the test to invalidate all the other

string
6-6.

Page

references

and

validations

Table

Page

Faulting with

Page

6-6
Page

Page

for
the
first
time
pages, however, the

proceeds

First

shown

Part

Done

Table

;All

the

FAULT

;The

first

\'4

I
I

I
FAULT

I
I

;and
;The

is made valid.
first page of operand

;faulted

;Page
;3 is

\'
I

FAULT
\"
\"
I
I
I
I

I
I

\'
\'

I
I

FAULT
\'4
\'
\'
\'

\"
I
FAULT

I
I
I

FAULT

\'s

pages

start

page

in,

and

invalid.

faulted

the

rest

2 is
out.

1 is refaulted, and page
left valid.
;String 1 processing reaches
;page 2, all others faulted.
;Page 1 is not needed now, but
;Ppage 3 still is needed.
;String
2
reaches
1its
second
ipage

;faulting

page

for

first

;time.

I
I

FAULT
\'

I
I

\';
A

;Page
2
is still
needed,
;is faulted back in.

\'4

; The

instruction

CITS

routines

The

first

part

done

test

execute,
and
check
instructions to test,

the
and

uses

the

results
the data

is completed.
set

up,

of
instruction
tests.
with which to test them,

The
are

stored in a table. The table entries
they begin as shown in Table 6-7.

6-26

and

are

variable

help

length,

and

Table

«.BYTE

.BYTE

2
@

.BYTE

The

6-7

First

Part

Done

Test

Table

Entries

;the op code of the test instruction
;the op code's complement
;initial condition codes
;resultant condition
;operand specifiers

faulting

Section

uses

codes

the

Interface

communicate with the exception and
of the IDB is shown in Table 6-8.
Table

6-8

First

T-Bit

Exception

Count

Subtype

PSL of

exception

User

Block

handler.

Done

Format

Part

IDB

and

(IDB)
The

format

State
Bits

exception

PSL of
PC

Data

interrupt

latest
latest

T-bit

service

Number

T-bit

trap
trap

routine

arguments

address

(zero)

The service routine address points to the code that implements the
faulting algorithm. The exception type and subtype are
loaded with
the values for translation-not-valid faults.

This

test

Control

also

Block

interfaces

(TCB).

Table

6-9

The

with

TCB

First

the

format

Part

CITS
is

Done

routine

shown

TCB

Test

Unused

Exception

Subtype

Operand

address,

Operand

address,

Operand

address,

Operand

address,

Operand

address,

Operand

address,

6-27

through

Table

General

Current

Table

6-9.

Format

Address
T-bit

trap

Test

The

current

The

TCB

instructions.

table

test

Table 6-10.

Table 6-18

First

Part Done TCB Passed

test

table

shown

CITS_REDECODE

and

CITS DECODE

passed

the

into

points

address

’

CITS DECODE

TCB:

TCB_INST ADDR:

. LONG

;current

;unused

TCB_T BIT:
TCB_SUBTYPE:
TCB_EXCEPTION:

.BYTE
.BYTE
.BYTE

g
@
/)

TCB_OPERANDS:

.BLKL

Typical

Error

;optional operand addresses

Message

*xkkkkkkk

ERROR

TESTING

WHILE

19-JUN-1977

ERROR 212

SUBTEST #

TEST 2

PASS 1

CPU CLUSTER EXERCISER -- 9.0

*hkkkhkk

HARD

.BYTE

test table address

;trace trap expected flag
;exception subtype
;expected exception vector

CPU:

unexpected

21:41:22.03
of

type

fault

occurred.

Fault code

Referenced address

PSL

goo0s0000

@PB1F7F8

g00@33DDY

00000 0EB

Table

Test

number

case

TCB's address

Test table address

Current entry address

@o08a8F9C

paaaoATC

g@eaeATIC

Example 6-25

Interpretation of

ESKAX Test

Subtest

Error

212

Example 6-25

The printout is representative of the first part done test, which
interfaces to the CITS portion of the program for its data pool as
follows.

This

test

format

interfaces

is shown

with

CITS

in Table 6-10.

through

the

TCB

whose

In this example, the first address of the TCB is 8F9C.

current

test

The

starting

address

longword of the

table

The

TCB)

A7C.

6-28

the

address

(which

1is

test

table

within

is given as A7C.

the

first

CITS

contains

number

cases

(or

distinct

Table

represents

BASE

Table

represents

DECIMAL

Table
Table

3
4

represents
represents

summary

First

Done

are

using

The

address

for

DATA CASE

The

address

the

€.

Table

DATA

execution
is
Table 6-10).

Examination
CURRENT

the

from

CASE

this

contains

for

our

table

far

the

data.

A7C.

(whose

ADDRESS

concerning

A7C.

BLOCK

format

guiding

locations

this

shown

starting

(in

this

the

instruction

case

A7C)

with

the

will

under

test

above

give

test

lst

byte

the

2nd

byte

the

3rd
4th

byte
byte

is
is

the
the

INITIAL condition code (N,Z,V,C).
RESULTANT condition code (N,Z,V,C).

The

bytes

The
number
instruction

where:

follows:

CITS

CONTROL

B8F9C

ENTRY

information

address

using

table

data)

presented

follows.

are

instructions

information

Test

starting

each

pieces

instructions
EDIT PC instructions
FPA instructions

the

Part

tables;

code

of the test instruction.
code's complement.

represent

of
operand
under test.

operand specifiers.
specifiers
depends
on

the

The
starting
address
of
the
area
where
the
test
instruction is placed (residing) while undergoing test is
the PC of 3DD@.

6-29

A Second Error Message

**kk&¥¥a

kkkk%k%%*

CPU CLUSTER EXERCISER -- 9.8

Fault Code

Reference address

PSL

Po000000

@PPL1FFF8

90@83DDO

PP3O30EB

Table number

Test case

pASS 1 TEST 2 SUBTEST # ERROR 213 19-JUN-1977 21:41:22.03
HARD ERROR WHILE TESTING CPU: Page fault on non-test instruction.

TCB's address

Test table address

Current entry address

@e008F9C

gaeaoeATC

00008 BATC

Example 6-26

ESKAX Test 2, Subtest @, Error 213

Interpretation of Example 6-26

The REFERENCE ADDRESS of 1FFF8 represents the address which caused
the FAULT CODE of #@.

The breakdown of the FAULT CODE is as follows:
Bit Position

Meaning

)

g =

1 =

@ =

1 =

translation not valid

access control violation

fault occurred during virtual reference to the

PTE of the stored process virtual address

read access

write or modify access

begins by setting up the test
The interrupts portion of the testCITS
routines named CITS DECODE
instruction and data, using the
and CITS_SETUP.

PSL of the test
CITS_SETUP returns with the PC and initiala copy
of the test
test saves
instruction on the stack. The
ess may
progr
its
instruction's PC and general registers, So that val timer service

be observed. Then the test jnitializes the inter
routine.

6-30

then

sets

instruction,
Since

the

timer

which

state

interrupt

and

interrupted

the

executes

REI

the

test

immediately.

instruction

contained

the

registers,

if
they
are
unchanged
since
the
previous
1interrupt,
the
instruction has not progressed.
This condition
results
from
interrupting
too
soon.
In
this
case,
the
interval
timer
is
increased, and the test instruction is resumed.

the

other

instruction
Next,

modify

case,

has

when

divide-packed

the

state

the

instruction

wait

time,

When

the

checked

test

interrupts

test

instruction

and

There

are

Class

Unexpected

Class

Exception

begins.

four

the

instruction

any errors

instruction

internal

test.

and

Once

general

instruction

any

under

started,

and

the

progressed.

are

classes

that

The

timer

instruction

has

been

then

set

changed,

might
up

the

attempt

used

for

the

new

results

are

resumed.

completed,

been

tried,

selected,

errors

that

exceptions
or

executed

registers

test

have

1is

have

the

reported.

faults

table

registers

interrupt

the

and

may

the

entry

testing

the

that

occur.

interrupts.

identifier

reports,

which

simply

state

ERROR

These

occur

testing

TEST

CASE

NN.

when

exception

instruction,

and

interrupt

they

the

exception

report.

They

exist

the

test

the

exception

test

errors

Class

case
--

instruction
tested
in

which

Instruction

testing.
ESKAY®@5

are

solely

occurs

immediately

inform

the

during

the

followed

operator

occurred.

describe

incorrect

results

from

The instructions tested are a subset of those
TESTOP4
and
ESKAY@6 TESTHAS5,
so
that
the

instruction test errors are identical between those tests and this
test,

ESKAX@4

TEST@2.

This

data

6-31

module

ESKAX@3
FPD DATA.

Class

—-

These

errors

are

first

part

numbers

208

through

done

specific

(Example

6-27).
They

have

error

specific information,
The interpretation of

209.

Each

reports

the table number, and the test
table numbers is as follows:

Table Number

Meaning

Floating-point

test

case

error

number.

table

Decimal string test table

EDITPC

Floating-point

test

(Executed

table

test

with

table

FPA

enabled

FPA

table

exists)

The

test

indicate

case
a

single

kkkkkk***
PASS

HARD

ERROR

number

indexes

into

—-

9.0

2067

CLUSTER

EXERCISER

SUBTEST

#§

WHILE

appropriate

test.

CPU

TEST

the

TESTING

ERROR
CPU:

**kkkki
.

EXPECTED

TIMER

INTERRUPTS

DIDN'T

OCCUR.

VALUE

PASSES

-30

TABLE

NUMBER

TEST

CASE

115

TCB'S

ADDRESS

TEST

18E0

TABLE

ADDRESS

CURRENT

9F6
Example

OF6

6-27

ESKAX

Test

6.3.3

SBI Verification Module

The

verification

SBI

diagnose faults on
will differentiate

caused

isolate

the

selection

nexus.
the

ENTRY ADDRESS

test

the SBI
between

The

Subtest

(ESKAX@5,

error

Test

Error

207

and partially
nexus connected to it.
Error reports
faults on the SBI proper
and
faults

appropriate

designed

printouts

repair

problenmn.

6-32

exercise

will

1level

serve

diagnostic

guides

further

With

the

will

exception

the

reproducible via

mode

For

1interval

timer

asynchronous

operation of

interrupts

from

the

interactive

looping.
the

setup

subtest,

errors

interactive mode, due to the

exerciser,

only

errors

introduced

are

guaranteed

from

further

reproducible.
Note

that

the

point

test

failing

before

devices

failure.
UBE

verification

SBI

that

MBA or

test

checkout

nexus

the

failing

The

SBI

checkout,

the

for

deselected

that

MBE

checked

are

This means

can

MBEs

the

composed

UBEs

testing

UBA fails

attached

UBA

checkout

SBI

can

sustain

and

that

interrupts

following

configuration

Verifies
data

SBI

can

sustain

and

that

interrupts

that

occur

data

each

transfers

MBA checkout -- Verifies

are

not

parts.

each

the

that
at

the

UBA

incurring

proper

each

transfers

occur

selected

without

the

errors

BR level.

selected

MBA

without

incurring

proper

BR level.

the

errors

SBI interaction -- Verifies that all UBAs are capable
block data transfers in a controlled sequential mode
operation.

capable

completion

MBE

sustaining
without

checkout

selected

that

data

are

and

interrupting

SBI

Checkout

all

transfers

existing

and

UBEs

of
of

are

interrupting

errors.

-- Verifies

MBAs

in a

accessed.

UBE checkout -- Verifies

6.3.3.1

an MBA or

UBA.

Verifies

that

capable

all

existing

sustaining

completion without

Subtest
—--

The

SBI

data

MBEs

for

transfers

errors.

checkout

subtest

will

perform reads and writes to the configuration
register of
each
nexus on the SBI as defined by the hardware P-Table. This subtest

will set up the Hardware Interrupt Request Table
(HIRT), which
will contain an entry for each UBA and/or MBA responding to a read
of its configuration/status register. This table will be used by
all subtests within the SBI verification test. A nexus that does
not respond will not be entered into the HIRT and, therefore, will
not be used in the following subtests. No response from a nexus is
treated

error.

6-33

The SBI checkout subtest uses
check
the
validity
of
the
receiving nexus on the SBI.
The

primary

with

manner

purpose

this

the CPU silo comparator register to
commands
and
responses
from
the

subtest

SBI.

will

detailed

check

that

error

information

the

provide

isolate

printed

selection
of
the
proper
diagnostic,
further isolate the fault.
~

will

which

the

field

faults

aid

may

user
such a

the

user

the

then

run

Silo

Compare
Servicing
-The
silo
compare
service
routine
will
read
back
the
SBI
silo
and
compare
the
contents
with
the
arguments
supplied
in
the
1IDB

(interface data
block).
Null
cycles between command
issue
and
read
reply
are
checked
for
continuity
of
function,
i.e.,
TR
1lines
not
continually
asserted.
No
checking will be made for the number of null cycles.
On

completion

status

set
and
the
stack
if
it

interrupt
compare
A

return

causing

silo
be

read

back,

the

checked

for

clear.

appropriate
information
is
set.
The
fault
bit

silo

this

the
will

then

compare

will

made

routine

will

bit

The

error

will

placed

will

reset

the

CPU

SBI

flag

will

the

set.

cleared

and

the

invocation

the

SBI

error
The

silo

cleared.

bit

fault

the

point

executed.

6-34

interrupt

6.3.3.2
UBAs

UBA Checkout

that

exist

checkout

subtest.

Each

will

UBA

access

from

memory

space.

This

subtest
1.
2.

the

set

SBI

will

DDP and

and

check

the

correct

The

map

Purging

data

can

operates
to

are

being
can

only be

qualified

wraparound
will

mode

run

for

the

SBI

that

into

SBI

result

mapped

UBA capabilities.
operational.

initiated

by the
accessed.

accessed

adapter

and

used

correctly.

nonexistent

error

been

space

following

vector

registers

memory

paths

subtest will

have

operate

Unibus

Interrupts

read

BDP1l

—- This

HIRT

the

correct

Subtest

the

sequence

Unibus
and

memory

space

causes

the

interrupt.

The

subtest
will
autosize
the
Unibus
memory
and
set
the
map
register disable portion of the Unibus Adapter Control
Register
(UACR) for use by other subtests within the SBI verific
ation test.

Faults
to

detected within this subtest will cause the
disqualified from further
use by any other
SBI verification test.

the

UBA
Interrupt
Servicing
-Adapter are serviced by this

Interrupts
routine.

generated

UBA

under

test

subtest

within

Unibus

the

The

routine will compare the configuration regist
er and the Unibus
Adapter
Status
Register
(UASR)
with
arguments
supplied
in
the
Service Data Block (SDB). If there are any
differences, they will
be pushed on the error stack and the error flag will
be set. For
an invalid map register type
interrupt, the failed mapped entry
register

will

SSYN

timeout,

the

with

the

The

AEIL

the

transfer

vehicle

IPL

level

which

SDB

compared

failed
entry.

(Additional
at

with

the

Unibus

SDB

address

entry.

Also,

will

for
be

Unibus

compared

Exception

the

or Interrupt Longword)
is used as
indicate to the
interrupted program the
interrupt occurred.

6.3.3.3
MBA Checkout Subtest - This subtest is run only on
MBAs
that exist in the HIRT and have been qualified
by the SBI checkout
subtest.
Each

MBA

set

operate

maintenance

6-35

mode.

This subtest checks the following MBA capabilities.
1.

Initialization

interrupts.

clears

registers

and
-

does

not

cause

DT BUSY can be set and causes no interrupts.

PGE can be set and causes an interrupt.

Read and write transfers operate correctly; on completion

data

read

transfer,

DONE

set

and

causes

interrupt.

MBA under test to be
Faults detected within this subtest cauée thesubte
st within the SBI

disqualified from further use by any other
verification test.

MBA Interrupt Servicing -- Interrupts generated by the Massbus
adapter are serviced by this routine.

This routine compares

supplied in the SDB.

the

status

indicate
If there are any differences, the SDB + 2 will be set to
appropriate

error and the error information will be put into the
slots in the Master Control Space (MCS).

6.3.3.4

up for
SBI Interaction Subtest —-- After the UBAs are set
types are

wraparound operation, the following data transfer
initiated.
1.

2.
3.
4.
5.

read

word

write byte
write word
modify byte
modify word

the
6.3.3.5 UBE Checkout Subtest -- This subtest determines
adapter
number and location of Unibus exercisers for each Unibus
the UBE
ed,
detect
are
faults
no
If
and checks each as it is found.
is entered in the HIRT and the qualify bit will be set.

Only qualified UBAs are used during this subtest. If none exists,
the subtest will be skipped.

UBAs are set up with two map registers pointing

SBI memory

space. One map uses the Direct Data Path (DP@) and the d.other uses
buffered Data Path One (DP1l). All interrupts are enable

Autosizing
exerciser.

used to determine the location of a Unibus

6-36

Each

exerciser

checked

for

ability to execute

ability

the

following

DATO,

interrupt

DATI
BR

two

capabilities:

functions,

levels

through 7

following

function.
If

any

the

HIRT.

UBE

the

above

Interrupt

address

Servicing

are

passed

bit

interrupt handler.
four functions.
1.

conditions

the

from

UBE

the

BRRVR

the

master

value

read,

not

and

BRRVR

entered

UBA

base

exception

and

then

the

following

call

routine.

(error

error

type

set

the

routine performs the

Examine

bit

the

met,

contents

test

address from
BRRVR value.

control

registers,

the error

bit)

vector

CR1l.

information

CR1

flag.

the

and

Clear

CR2,

and

the

the error

bit.

supplied

the

bit

1is

set,

contents

the

stack

and

error

Return.

MBE Checkout

6.3.3.6

is present
Each

set

not

Derive the UBE
low word of the

push

The

the

addition,

UBA service
2.

into

Subtest —-- This

subtest determines

an MBE

for each MBA that has been previously qualified.

exerciser
1.

read

write

Additionally,

will

checked

for

the

following:

transfers
transfers.

the MBA

is checked

for whether

Attention

Massbus exception can be set which causes an

any

the

HIRT.

can

above

set

which

conditions

6-37

causes

not

met,

interrupt.

the

MBE

interrupt.
not

entered

Typical

Error

*k%%kkxk*
PASS

Messages

for

the

SBI

Verification

CPU CLUSTER EXERCISER —- 9.0
TEST

SUBTEST

HARD ERROR WHILE TESTING

ERROR

UBA:

Module:

**kkxkkk%

19-JUN-1977

21:53:25.06

INVALIDATED MAP REGISTER ACCESS

' ERROR: DESTINATION OVERWRITTEN
ADD

ACCESS

NEXUS

201009F8

*kkk**%x*
1

60006000
Example

PASS

ADD

6-28

ADD

FUNC

EXP

60006819

WRITE

25255252

ESKAX

Test

ADD

TEST

SUBTEST

ERROR

ACCESS

NEXUS

ADD

EXP

60010000
Example

kkkkhhx %k
1

Error

21:57:03.12

MBA WRITE

6-29

DATA

ACT

[ESKAX

Test

Subtest

CPU CLUSTER EXERCISER -- 9.0
TEST

SUBTEST

ERROR

DATA

po0082400
3,

Error

kkkkkkkk

19-JUN-1977

21:57:13.07

MBA WRITE

RESULT

ADD ACCESS

NEXUS ADD

EXP DATA

ACT DATA

60012400

60012000

0002000

00003000

Example

6-38

ESKAX

Test

6-38

Subtest
‘3,

Error

DATA

24255252

**%xkxx%

19-JUN-1977

Po002000

HARD ERROR WHILE TESTING MBAl:

ERROR:

ACT

RESULT

6001049

PASS

Subtest

CPU CLUSTER EXERCISER —- 9.@

HARD ERROR WHILE TESTING MBAg:

ERROR:

DATA

Interpretation of Example 6-28
These

printouts

are

typical

ESKAX Test

The

nexus

address

60006000.

the

UBA.

physical

connection

the

SBI.

where:

nexus

defined

this case the

nexus

Since the SBI deals in 30-bit addresses,
18-bit
Unibus
addresses must
be
translated
to
3@0-bit
SBI
addresses.
This function is performed by the Unibus adapter through

one

Table

the

496

UBA

memory

map

Table 6-11

1
2
3

800
804
848
8@C

810

495

FBC

FC@

example
of

FFC

given,

the

address

the

MR ADDRESS

(using

Table

600606818.

6-11)

tells

working with the map register

for

Unibus memory,

One

512

bytes.

Unibus

memory page

equals

Each

UBA

physical

has

starting

associated

Unibus

address as

follows:

UBA Number

Physical

]

20100000

20140000

2
3

20180000
201C0000

From

6.3.3.7

The underlined

that

are

page 4.

The function performed was a write.

UBA

Reserved

.
the

shown

Offset from the
UBA Base Address

Unibus Adapter Map Register Address Offsets

Unibus Memory Page

portion

registers,

6-11.

Example

6-28

under

test.

EXPECTED

and

Memory Verify

the

Starting

ADDRESS

ACTUAL

with

2010@9F8,

indicating

self-explanatory.

(ESKAX@6 TEST@4)
6-39

space

Address

ACCESSED

DATA are

address

—- Not yet

implemented.

6.4

ESKAY

6.4.1

Interval

(ESKAY@2

TEST@1)

This

module

interval
exerciser

tests

1Interval

Subtest

can

Typical

Error

k*k*kk**
1

HARD

and

the

interval

Day

Clock

timer

Verification

and

the

day

timer
is
used
extensively
throughout
package during interactive operation.

6.4.1.1

PASS

Timer

The

enable
cleared.

and

bit

ERROR

the

SUBTEST

WHILE

Example

ERROR

TESTING

6-31

CPU:

ESKAY

18-JUN-1977
INTERRUPT

06:38:085.10

ENABLE

transfer

Typical

TEST

HARD

ERROR

*kkkkk**
1

HARD

ERROR

COUNT

CLUSTER

Subtest

bit

the

read

EXERCISER

Error

also

SUBTEST

ERROR

——

a
the

performed.

18-JUN-1977

****kk*x

TESTING

CPU:

XFER

BIT

STUCK

Example

6-32

ESKAY

Test

Subtest

TEST

interval

WHILE

CPU

PASS

CAN'T

Messages

CPU

PASS

contents

the

Error

**%%k%%k*

Test

BIT

subtest checks that the transfer bit (bit @4)
status
register
can
be
set,
thus
activiating
register.

that

status

This

transfer
of
the
current interval

check

control

***xxx##

CLEARED

Subtest 2 -the
control

The

cluster

Message

CPU CLUSTER EXERCISER —- 9.0
TEST

clock.
the

Functions

interrupt

set

Module

CLUSTER

EXERCISER

SUBTEST

WHILE

TESTING

ERROR
CPU:

—-

9.0

18-JUN-1977

XFER

FROM

6:39:58.61
1

Error

****kkk*

@#6:39:58.61

INTERVAL

INCORRECT

Example

6-33

ESKAY Test

6-40

Subtest

Error

INTERVAL

Subtest 3 -- The single clock bit
(bit 5)
in the control status
register can be set, thus causing the current interval register to
advance by one.
The

test

also

*kkk*k%x*

checks

that

CPU CLUSTER

PASS

HARD

ERROR

TEST

TESTING

PROPERLY

Example

Subtest 4 -the
current
read/write
next

single

EXERCISER

SUBTEST

WHILE

the

6-34

ERROR
CPU:

ESKAY

unit

comprised
register,

bit

——

18-JUN-1977

SINGLE

Test

This test floats a
interval
register.

interval

clock

read

the

current

Typical

interval

the

CLOCK

@6:43:14.82

BIT

Subtest

NOT

Error

*kk*k*k**

Error

PASS

HARD

ERROR

COUNT

EXPECTED

through a field of zeros in
medium
of
transfer
is
the
of the current interval register and the
respectively.
Since
the
next
interval

interval

possible

is
detected in
the
failure

that

Message

CPU
TEST

FUNCTIONING

one
The

zero.

Akkkkkis

originated

CLUSTER

SUBTEST

WHILE

RESULT

00000004

EXERCISER
4

ERROR

TESTING

CPU:

RECEIVED

RESULT

——

9.0

18-JUN-1977

ADJACENT

Q0000006
Example

6-35

ENTRY

*kkkkkk#

©£6:44:31.89

STICKING

INTERVAL

VALUE

200000084

ESKAY

Test

Subtest

Error

Interpretation
1.

The

ENTRY

into

the

The

EXPECTED

content

be
3.

The

after

VALUE

of 00000004 represents the
interval register (hex 19).

RESULT

the

RECEIVED

current

transfer
RESULT

@@@@0004

interval

represents

complete.

self-explanatory.

6-41

value

(hex

loaded

what
1A)

the

should

Subtest 5 -- This subtest checks the carry bits of the current
interval register. This is accomplished by preloading the next
interval register with the value to force the carry, transferring
this to the next interval register, and then single-clocking to
force

the

Typical

carry expected.

CPU CLUSTER EXERCISER —— 9.0

xkk**x**%

TEST 1

PASS 1
HARD

Message

Error

SUBTEST 5

WHILE

ERROR

PROCEEDING PROPERLY

ERROR 1
CPU:

TESTING

**kkkiks

18-JUN-1977
INTERVAL

TIMER

EXPECTED RESULT

RECEIVED RESULT

ENTRY VALUE

00000002

00000001

Po000001

Example 6-36

TEST 1

PASS 1

ERROR

HARD

PROCEEDING

SUBTEST 5

WHILE

COUNTING

NOT

ESKAY Test 1, Subtest 5, Error 1l

CPU CLUSTER EXERCISER -- 9.§

kk%kk*kx*

£6:45:50.65

ERROR 1

TESTING

CPU:

**¥**&x%

18-JUN-1977

INTERVAL

@6:45:50.65

TIMER

COUNTING

NOT

PROPERLY

EXPECTED RESULT

RECEIVED RESULT

ENTRY VALUE

p0000004

00000003

g0000003

Example 6-37

ESKAY Test 1, Subtest 5,

Error 1

Interpretation of Example 6-36

The ENTRY VALUE of 00000001 represents the value loaded

The EXPECTED RESULT of 00000002 represents what the
content of the current interval register (hex 1A) should
be after the transfer is complete and the single clock

into the next interval register

(hex 19).

bit has been ticked once.

The RECEIVED RESULT is self-explanatory.

6-42

Subtest

status

This

subtest
will

checks

set

occurrence

The

are

error

messages

kkkkkkkk
PASS

that
the

before

HARD
ERROR
OVERFLOW

SUBTEST

WHILE

Example

kkkkkkkhk
1

HARD

ERROR

TEST

bit

the

current

pPrevious

interrupt

ERROR

TESTING

6-38

~--

9.0

18-JUN-1977

CPU:

control
interval

has

been

ESKAY

SUBTEST

#6:53:13.11

REQUEST

NOT

Test

ERROR

Fhkkhkkk

INTERRUPT

CPU CLUSTER EXERCISER --

PASS

error

self-explanatory.

CPU CLUSTER EXERCISER
TEST

the

case

Subtest

9.0

TESTING

CPU:

ERR

NOT

Example

6-39

ESKAY

Test

SET

khkkkkdk

18-JUN-1977

WHILE

Error

SET

FROM

Subtest

#6:53:13.11
UNSERVICED

OVERFLOW

Error
2

Subtest 7 -- This subtest checks the run bit of the
control status
register with the interrupt enable bit
not set
(i.e., a check of
no interrupt capability).
Typical

Error

**kk%kxk*

Message

CPU

PASS

HARD

ERROR

TEST

CLUSTER

EXERCISER

SUBTEST

ERROR

—-

18-JUN-1977

WHILE

TESTING

CPU:

ERR

BIT

Example

6-4@

ESKAY

Test

Subtest

SET

**kkkkkax

Subtest

@6:53:13.11

SHOULD

NOT

Error

8 -- This subtest checks the run bit of
the control status
register with the interrupt enable bit set, a check
of interrupt
capability. A check is also made
to verify that the
interrupt
is
enabled at IPL 24
(hex 18).

6-43

Typical

Error Message

CPU CLUSTER EXERCISER -- 9.0

kkkkkkhk

PASS 1

ERROR 2

SUBTEST 8

TEST 1

khkkhkkk

#6:55:56.48

18-JUN-1977

HARD ERROR WHILE TESTING CPU: INTERRUPT OCCURRED AT OTHER THAN IPL
24

IPL WAS

Example 6-41

ESKAY Test 1, Subtest 8, Error 2

Interpretation of Example 6-41

The

IPL WAS

would

indicate

IPL

at what

interrupt did occur (if other than IPL 24).

6.4.1.2

Day Clock Function

Typical

Error Message

the

level

Subtest 9 -— This subtest checks the ability of the timeso.of day
register to advance from a known state, given 20 ms to do

CPU CLUSTER EXERCISER —- 9.0

*kkk*k***

PASS 1

TEST 1

SUBTEST 9

ERROR 1

**X**&¥ix

$6:58:26.79

18-JUN-1977

HARD ERROR WHILE TESTING CPU: TIME OF DAY CLOCK NOT INCREMENTING
Example 6-42

ESKAY Test 1, Subtest 9, Error 1

time of day
Subtest 16 -- This subtest checks the ability oftwothediffe
rent and

unique values.

Typical

Error Message

xk%%%k%%x%*

pASS 1

CPU CLUSTER EXERCISER -— 9.0

TEST 1

SUBTEST 14

ERROR 2

***xx&x%

18-JUN-1977

©£6:59:43.78

HARD ERROR WHILE TESTING CPU: DOUBLE LOADING OF TIME OF DAY NOT
CORRECT

EXPECTED RESULT

AAAAAAAC

‘

RECEIVED RESULT

1ST LOAD

2ND LOAD

AAAAAAAA

55555555

AAAAAAAA

Example 6-43

ESKAY Test 1, Subtest 10, Error 2
6-44

Subtest 11 -- This subtest
the time of day register.
Typical

Error

**kk*%kx*
1

HARD

ERROR

TEST

CLUSTER

EXERCISER

SUBTEST

WHILE

TESTING

RESULT

RECEIVED

FFFFFFFE

—--

ERROR

CPU:

EXPECTED

for

any

stuck-at-zero

Example

6-44

9.f

RESULT

ENTRY

67:80:30.34

STICKING

TIME

Test

Subtest

11,

Error

Subtest

12 -- This subtest checks the Carry bits
of
register. This is accomplished by preloa
ding the
register with the value to force the
Carry, and then
Carry bit in approximately 14--15 ms.

PASS

HARD

ERROR WHILE

EXERCISER

SUBTEST

TESTING

RESULT

——

ERROR

CPU:

RECEIVED

P0000002

9.0

Interpretation

TIME

RESULT

of day
expecting a

DAY

@7:85:82.22

COUNTING

NOT

ENTRY

into

the

The

EXPECTED

The

Test

Subtest

of #@0000081 is
of day register.
RESULT

after

the

initial

RECEIVED
test

VALUE

12,

Error

initially

6-45

In addition, the
day register.

VALUE

time

PROCEEDING

00000001

ESKAY

Example

The

expected

6-45

time

***xxxx

18-JUN-1977

P0000001
Example

time

the

PROPERLY

EXPECTED

DAY

FFFFFFFD

ESKAY

CPU CLUSTER

VALUE

day

TEST

*kk*kkk#

18-JUN-1977

ADJACENT

FFFFFFFF

kXk*%**%*

bits

Message

CPU

PASS

checks

the

time

RESULT

checks

for

what

00008082
of

day

the

load.

final

loaded

wvalue

approximately

sel f-explanatory.
stuck-at-zero

6-45

bits

the

time

Logic,

Arithmetic,

6.4.2

(ESKAY@3, Test 02)

This module

tests

the

Field

and

integer

Instruction

arithmetic,

Test

Module

and

field

logical,

are. CITS performs all
instruction microcode and associated hardw
rns,
of the functional control, building expected datathepatte
ts.
resul
executing the instructions to be tested, and checking

The following two printouts are typical of error reports coming
from this test.

One shows a result PSL error.

The second shows incorrect operand result contents.
khkkkkkk
CPU CLUSTER EXERCISER -- 9.0
*hkhhkkk
b.

PASS 1

TEST 2

ERROR 1

SUBTEST 1

6-AUG-1978

11:34:41.92

HARD ERROR WHILE TESTING CPU: INSTRUCTION TEST ERROR
2 ERROR IN TEST CASE NUMBER: 1
?

RESULT

PSL

ERROR

EXPECTED

ACTUAL

GOOBOBES

g00000E]L

INITIAL CONDITIONS:

00@#@4958 PSL 0Q000BQEF

OP CODE -- 90 WITH REGISTER INDIRECT OPERANDS
INITIAL REGISTERS R@--R6:

@O0 OAED A | R1l

@@0@BAEBD

Pe000000

00000000

go000000

00000000

SOURCE

OPERAND DATA:

OPERAND 1
@5

Example 6-46

ESKAY Test 2, Subtest 2, Error 1

6-46

kkk%kkk**

CPU CLUSTER

PASS

HARD

ERROR WHILE

TEST

ERROR

INCORRECT

TEST

EXERCISER

SUBTEST
TESTING

CASE

RESULT,

CPU:

OPERAND

ACTUAL

00004300

p0004304

00000000

***kkkk*

6-AUG-1978

INSTRUCTION

TEST

000P46FA

CODE

PSL
6C

OOOOBOOEF

WITH

INDIRECT

OPERANDS

CONDITIONS:

POOBAEGL

000BAEBD

Po0B0000

PPO0B000

00000000

P0000000

OPERAND

ERROR

SOURCE

11:35:27.25

CONDITIONS:

INITIAL

ERROR

NUMBER:

EXPECTED

INITIAL

——

OPERAND

DATA:

21
Example

6-47

ESKAY

Test

6-47

Subtest

Error

Interpretation of Example 6-47
1.

The

CVTBD

instruction

the

defines

code

under

test

(you can know this by simply looking up the given

op code on a coding card).

The general format of this instruction
looking at the code card) is as follows:

The

form of

OPERANDS

INDIRECT

WITH REGISTER

statement

that the

from

dst.wy

scr.rx,

op code

(again

instruction being

the

tested

indicates

is CVTBD

(R1).

(Rg),

NOTE

All instruction testing is set up so
that the first operand always uses R#,

operand

second

initial

The

always

uses

uses R2,

etc.

conditions

always

operand

R1l,

third

and

PSL

should

self-explanatory.

The TEST CASE NUMBER of 31 shows nothing more than how
far into the current test table we are, i.e., 30
instruction types were tested up to this point with no
errors.

intents and purposes, you can ignore this number.

For all

indication of INCORRECT RESULT, OPERAND 2
The error
states that the final contents of the destination operand
were wrong. OPERAND 2 is shown above as (R1l).
The

SOURCE OPERAND DATA of

The

INITIAL

memory

REGISTERS

use

for

the

R@--R6

is self-explanatory.

specify

instruction.

the

this

addresses
case,

CVTBC

(AE@4), (AE@D).
NOTE

R2 through R6 contain @s since the CVTBD
instruction uses only two operands.

Finally, the EXPECTED value of 43¢¢ and the ACTUAL value
of

4304.

If you examine the content of AE@D

(/W)

it should contain

4304.

Example 6-48 is another form of printout similar to the preceding
two examples with a twist. An unexpected exception occurred during
the testing of an instruction.

6-48

kkkkkkkk

CPU

PASS

HARD

ERROR WHILE

TEST

CLUSTER

ERROR

SUBTEST

TEST

6-AUG-1978
TEST

11:34:42.57

ERROR

EXCEPTION

00000001

00000 QAEB
00004933

INITIAL
PC

INSTRUCTION

CPU:

NUMBER:

9.0

00000034

SUBTYPE#

ERROR

khkkkkkk%k

00000001

VECTOR#

PSL

TESTING

CASE

UNEXPECTED
ERROR#

EXERCISER

CONDITIONS:

000304930

OP CODE --

PSL

000OQAOED

8E WITH REGISTER INDIRECT OPERANDS

INITIAL REGISTERS

R@--R6:

GO0 PAED 4

@00 PAEGD

000006000

00000000

00003000

20000000

SOURCE

OPERAND

DATA:

Example

6-48

ESKAY Test

6-49

Subtest

Error

Interpretation of

Example 6-48

The

unexpected
exception
occurred
through
VECTOR
34
(Paragraph
2.7
of
the
KA780 Central Processor Technical
Description
lists
VECTOR
34
as
the
ARITHMETIC
TRAP
vector).

The

SUBTYPE

INTEGER

informs

OVERFLOW

Processor Technical

The

ERROR
1
is
1 printout

The
rest
Printouts

6.4.3
Not yet

Branch,

Floating-Point
Test 5)
and

check

accelerated

reserved

KA780

was

Central

Queue

those

than
a
report.

existing

the

repetition

the

as
outlined
for
the
two
same breakdown applies).

Test Module

(ESKAY@4,

Test

@3)

execution

are

instructions.

The
for

and

both

the

Test

Module

(ESKAY#8S5,

Test

basic

floating-point

instructions

and

instructions.

Arithmetic

and

exceptions

also

MULL2

test

Instructions

floating-point

operand

instructions

and

condition

the

implemented.

6.4.4
ESKAY@®6,
4

of
the
printout
is
preceding (i.e., the

CRC,

the

Description).

nothing more
of the header

ERROR

the

that

2.7

The PC of 4933 and PSL of EB are
time of the exception occurrence.

Tests

you

(Paragraph

tested.
and

pertaining

Since

MULL3,

floating-point
test

6-50

the

FPA

tests

accelerator

floating-point

takes

part

also

check

turned

the

these

off

for

- Typical

Error Messages for Test 4

kkk%**%%

CPU CLUSTER EXERCISER
TEST

HARD

ERROR

PASS

RESULT

SUBTEST

WHILE

TEST

PSL

TESTING

ERROR
CPU:

CASE NUMBER:

(ZZ-ESKAY)
2

—-

9.0

20-FEB-1978

INSTRUCTION

TEST

*ikkkkksx

11:26:00.00
ERROR

ERROR

EXPECTED

ACTUAL

PO1FQOE3

@B1FO0E]

INITIAL CONDITIONS:
PC

00004429

PSL

@O1FOOEF

OP CODE

4F WITH REGISTER

INITIAL

REGISTERS

INDIRECT

OPERANDS

R#--R6:

POBBACO4

POGOACLOD

PEBOAC1C

P0000000

00000000

go000000

SOURCE

OPERAND

DATA:

00084080

OPERAND

000084080

OPERAND

PO000000
Example

6-49

ESKAY

Test

6-51

Subtest

Error

*hkkkihk

CPU CLUSTER EXERCISER

PASS

TEST

HARD

ERROR WHILE

ERROR

RESULT

SUBTEST

TEST

TESTING
CASE

ERROR

CPU:

NUMBER:

ACTUAL

PA1FABES

POLFPOE4L

20-FEB-1978

INSTRUCTION

TEST

khhdhikx

11:26:00.00

ERROR

CONDITIONS:

00004695

CODE

PSL
71

0Q1F@POEB

WITH

INITIAL REGISTERS

INDIRECT

OPERANDS

R@--R6:

POBOACHA

POBOACL4

00000000

00008000

PoB000000

gaoavoso

00000000

SOURCE

9.0

ERROR

PSL

EXPECTED

INITIAL

(ZZ-ESKAY)

OPERAND

DATA:

go004080
PO000000

OPERAND

P000B4089

20000000
Example

6-50

ESKAY Test

6-52

Subtest

Error

k*k%*k*%*
PASS

CPU CLUSTER EXERCISER
TEST

SUBTEST

ERROR

V)
o

HARD ERROR WHILE TESTING CPU:

ERROR

RESULT

TEST

CASE

NUMBER:

—- 9.@

20¢-FEB-1978

ACTUAL

@O1FBOES

PO1FOOED

11:26:00.00

INSTRUCTION TEST ERROR

CONDITIONS:

p0P0@4873

CODE

PSL @Q1FQQEF

-- WITH

INITIAL

REGISTERS

INDIRECT

OPERANDS

R@--R6

AO0OACOH4

POAOACL4

g330AC1D

@09 OAC2D

0P BAC39

00000000

P00000600

SOURCE

**kkkkkx

ERROR

PSL

EXPECTED

INITIAL

(ZZ-ESKAY)

OPERAND

DATA:

FFFE4FFF
FFFFEFFF

OPERAND 2
FF

OPERAND

00004080
00000000
Example

6-51

ESKAY Test

6-53

Subtest

Error

A lengthy detailed description of this type of error report has
been
supplied
in
Paragraph
6.4.2.
Using
that
description
as
a
reference,
interpretations
of
the preceding
three
error
reports
follow.
Interpretation

The

instruction
ACBF

Example

being

(R#),

6-49

tested

(R1l),

(R2),

displacement

BREAKING DOWN FURTHER-ACBF (AC@4), (AC10), (AC1C),
BREAKING

ACBF

DOWN

4?8@,

limit
Interpretation

The

instruction
CMPD

Example

source
Interpretation

Going

through
EMODD
EMODD

6-50

(R1)
FURTHER--

(AC1l4)

DOWN

4080,

displacement

index

tested

DOWN

(AC@4,

BREAKING

CMPD

fli

addend

(R@),

BREAKING

CMPD

FURTHER--

4?8@,

being

displacement

FURTHER--

4080

destination
Example

similar
(R@),

6-51

analysis

(R1l),

(R2),

integer,

FFFEAFFF

FFFFFFFF,

fraction

g00B4080

FF,

P00000080,

floatingpoint multiplier

integer,

multiplicand

floating-point

multiplier

6-54

extension

fraction

Error Messages for Test

Typical
kkkkk***

CPU

PASS

HARD

ERROR

CLUSTER

TEST 5

EXERCISER

SUBTEST 2

WHILE

TESTING

CPU:

ERROR IN TEST CASE NUMBER:

INCORRECT

TRAP

(ZZ-ESKAY)

ERROR 7

TRACE

5
--

9.8

28-FEB-1978

INSTRUCTION

TEST

*kkkkiks

11:26:00.00
ERROR

PSL

EXPECTED

ACTUAL

@O1FOOFS

GO1FO0F4

INITIAL CONDITIONS:
PC

00004695

PSL

@O1F@OFB

OP CODE -- 71 WITH REGISTER INDIRECT OPERANDS
INITIAL

REGISTERS

R@§--R6:

QBB OACO4

POBOACL1 4

Ré

po000000

P0000000

00000000

P0000000

00000000

SOURCE

OPERAND

DATA:

00004080

po0000a0
OPERAND

00004080
000000080

Example

4-52

ESKAY Test

6-55

Subtest

Error

*kk*k*%*

CPU CLUSTER

PASS

HARD

ERROR

TEST

SUBTEST

WHILE

TEST

CASE

ACTUAL

FFF849FF

PO0A3F80

PC:

@@#009A87

00004080

0000C040

kkkxkikk

CPU

PASS

HARD

ERROR

TEST

WHILE

TEST

TESTING

CASE

ACTUAL

00004040

00004000

00000000

P0000000

PC:

@0@@9B11

0000C000

FFFF4D7F

(O0O0EGBD

Example

6-54

20-FEB-1978

FLOATING

NORMALIZE

R@,

R2,

Test

ERROR
CPU:

NUMBER:

EXPECTED

ADD3

hkkkkkk#
11:26:00.00

SUBTEST

Subtest

(ZZ-ESKAY)

Error

9.0

101

20-FEB-1978

FLOATING

NORMALIZE

100

kkdkkkkk
11:26:00.00

SUBTEST

161

R@,

ESKAY

9.f

108

EXERCISER

SUBTEST

——

113

ESKAY

CLUSTER

CPU:

ADDF3

6-53

(ZZ-ESKAY)

ERROR

NUMBER:

EXPECTED

TESTING

Example

EXERCISER

R2,

Test

6-56

Subtes8,
t

Error

101

The

interpretation

given

for

Example

Examples

differ

6-53

from

and

the

Both

Example

6-52

6-54

are

standard

printouts

give

operands,

i.e.,

ADDF3

R2, R4
R2, R4

R@,

ADD3

R@,

The

operand

for

CITS

The

data

EXPECTED

contents

the

6.4.5

Operand

that

FLOATING

listed

directly

data

(R4,

SUBTEST

follows:

instructions

ACTUAL

NORMALIZE

under

test

under

the

both

cases

already

and

TEST

their

reference

definition,

specifies

Floating-Point

Test

operand).

Specifier

Dependent

and

the
the

(ESKAY®7,

Decimal

module

string

Strings Module (ESKAX@8, Test 7)
tests
the
microcode
and
hardware
used

execution.

Interpretation

The

implemented.

6.4.6

This

and

destination

Test 6)
Not yet

similar

printouts as

statements.

6-47.

error

Example

for

decimal

6-55

printouts

coming from this test are designed like those
of test 5. An overall interpretation has already been describe
d in
the test 2 writeup.

Analysis

ADDP6

should

(R@),

(R1),

with ADDRESSES

6.4.7
This

DATA

instruction

(R2),

addladdr 1

addllen

OPERAND

show the

(R3),

shown

test

(R4),

add2addr J

add2len

REFERENCED

under

(R5)

sumaddr

sumlen

under

indicated.

INITIAL REGISTERS

EDITPC Operators Module (ESKAY@9,
module tests the EDITPC microcode and

6-57

Test 8)
associated

R#--R6

hardware.

and

Error

Typical

CPU CLUSTER EXERCISER (ZZ-ESKAY)

#%%*%k%%*

SUBTEST 2

TEST 7

PASS 1
HARD

Message

ERROR WHILE

ERROR 26

TESTING CPU:

INCORRECT

TRACE

TRAP

11:26:00.00

TEST ERROR

? ERROR IN TEST CASE NUMBER:
?

20-FEB-1978

INSTRUCTION

*¥*kkkiks

—- 9.0

PSL

EXPECTED

ACTUAL

PB1FOQF8

0O1FO0F0D

INITIAL CONDITIONS:
PC

00084585

PSL

Q@lF@OFF

OP CODE -- 21 WITH REGISTER INDIRECT OPERANDS
INITIAL REGISTERS

R@--R6

PP OACE4

R1l

000 OACOE

@gegoAC1B

POBOAC25

PPABGAC35

PO@OAC3F

P00000020

SOURCE

OPERAND

DATA:

OPERAND 1
26089
OPERAND

12,

56,

34,

78,

77,

OPERAND 3
POOE
OPERAND

¢e,

ee,

oo,

OPERAND

77,

PO1F

Example

6-55

ESKAY Test
6-58

Subtest

Error

Error Message

Typical
*kk*k%k*

CPU CLUSTER

PASS

TEST

HARD

ERROR

RESULT

SUBTEST

WHILE

EXERCISER

TESTING

PSL

CPU:

—-

PO1F@OES

PO1lFOBE4

2@-FEB-1978

INSTRUCTION

TEST

00008485A

CODE

11:26:00.00

ERROR

~--

PSL

OO1F@OEB

38 WITH

REGISTERS

INDIRECT

OPERANDS

R#--R6:

PBOBOBACOA4

00 PACOE

PP0OAC1E

POBOAC2F

00000000

PoOAA000

po0000080

OPERAND

**&xkkxx

CONDITIONS:

SOURCE

9.0

ERROR

ACTUAL

INITIAL

ERROR 48

TEST CASE NUMBER:

EXPECTED

INITIAL

(ZZ-ESKAY)

OPERAND

DATA:

PO00F

OPERAND

oo,

090,

09,

OPERAND

40,

43,

49,

00,

96,

00,

25,

94,

9F,

46,

106,

Example 6-56

ESKAY

6-59

Test

Subtest

Error

Interpretation

The

error
described

Example

6-56

printouts coming from
in Paragraph 6.4.2.

this

test

are

designed

those

Therefore, analysis should show the instruction under test to be
(R3)

(R2) ,

(R1),

(R@),

EDITPC-

srclen

pattern

dstaddr

srcaddr
with ADDRESSES

REFERENCED

6.4.8

shown

under

INITIAL

REGISTERS

R#--R6

and

indicated.

OPERAND DATA as

Character

String

Instructions

Test

Module

(ESKAY1@,

Test

'git yet implemented.
6.4.9

Not

Privileged

Instruction

Exception

Test

(ESKAYll,

Test

10)

implemented.

yet

6.5

ESKAZ DESCRIPTION

6.5.1

Memory Management

Test

Module

(ESKAZ@3,

Test

The
object
of
this
test
is
to
test
memory management
on
a
VAX-11/780 CPU. Memory management is that part of the CPU which
checks protection on memory references, performs virtual to
physical

(with

address

the

translation,

modify

unaligned

data

bit

monitors

the

references.

page

These

updates

table

functions

are

many different

kinds of

references

see that

reading

the

correct

defined

as:

contents

detecting

the

first

codes)
and

The
of

and

address

test

addresses
a

page,

unaffected,

failure,

the

test

issues

write

failure

symptom

the

under

test,

organized

Valid

that

and

surrounding

expected

unexpected

six

and

tested

data,
if

error

fault,

subsections,

report

wrong

the

bit

required.

data,

each

making

Working

leaving

the

the failure

received

memory

resolves

they work.

setting

faulting

and

Upon

containing

condition

(instruction

etc.).

testing

some

area

functionality.

read and write -- The intent is to quickly verify
the basic functions work. Longword aligned reads and

writes

are

System).
and

(e.g.,

circumstances

memory management
1.

writing

adjacent

pages

entry),

performed

This

writing,

space,

modify

process
physical

translation

each

address

performs
address

buffer

bit.

6-60

space

initial

translation

1loading,

(P@,

checks of

and

each

setting

Pl,

and

reading
address

the

Length
register boundary checks
References
are made
just before and just beyond each of the
length boundaries
to

verify

Page

Table

changes
It

length

Entry

boundary checks.

(PTE)

privilege modes

makes

code,

the

references

and

combinations

pages

with

access

kernel,

the PTEs both
privilege checks.

Size with PTE
varied
from
combinations.

references

varying

the

valid

-- The
quadword

to
-

Page boundary checks -- The
position of the access with
are varied.

attempts

mapped

combinations
byte

with
make

PTE

6-61

the

super,
with

subsection

and

each

user.
access

invalid,

size
and

of the
tried

with

of
respect

combinations

This

and

size

instruction

protection

exec,

verify

access

is
PTE

the access and
the
to
a page boundary

buffer

referenced

This

subsection

references

page.

while

6.5.1.1

Memory Management Test General Flow

Initialization -- Three buffer areas are requested from the
supervisor, one each from P#, Pl, and system spaces. A control
block (BVAS) is loaded with their addresses, and with the
addresses of three other buffer areas, which are on the last page
in each

space.

Execution of Subsections -- A loop selects and executes each of
the subsections, as follows.

Select an SCC —-- The entry in the subsection description
table associated with the current subsection is selected.
It includes a pointer to a Setup Command Chain (SCC).
There is an SCC for each subsection. The execution
section includes six nested loops, varying access size,
address space, and operand alignment. The SCC contains
start and end limits for these loops. For instance, the

SCC for the fourth loop, page boundary checks, specifies
varying access size from byte to quadword, varying the
offset from a page boundary from 8 bytes before through 1

byte after the page boundary, and varying address space
from P@ to

Create

system.

defaults

Defaults

provided

are

variables not specified in the SCC.

for

any

Execute subsection -- A procedure is called that will
make test references, varying each reference variable
specified in the SCC across the range.

Clean up -- At the end of the test, all buffers are returned and
control returns to the dispatch routine in the supervisor.
6.5.1.2

Memory Management Test, Subsection Flow

Loop start -- All reference parameters that will vary are loaded

with initial values specified in the SCC.

of
Execute —-- The test reference described by the current state
'
all the reference variables is made.
ter
Increment -- The next value of the most rapidly varying parame
initial

is loaded. If its range has been covered, it is set to its

value and the next variable is changed.

ted
Loop —-- If the slowest varying reference parameter has comple
next
the
ise,
Otherw
te.
comple
is
tion
its range, the subsec
reference is made.

6.5.1.3

Test Reference Execution

Initialize -- The control blocks for this section (MRDB and TCB)

are

set

Decode

up.

-- A CITS

instruction.

(CITS DECODE)

6-62

called

decode

the

test

Simulate
results

Setup

-are

The

test

loaded

Another

CITS

the
data
areas,
instruction.
Map

the

variables

The

reference

into

the

routine

general

address

the

controlling

MRDB.

(CITS

simulated,

SETUP)

test

page

and

reference

and

called

stack

validity and

the

for

mapped

Remap

and
Data

test

the

The

result

test
test

address

maps

Check
-CITS
instruction.

Loop -- The flow
buffer states.

reference

are

setup

and

is reset
checked.

called

Return.

6-63

test

to verify
simulated

made.

mapping

copied

CHECK

from

the

according

-- A probe is made to the test addre
ss in order
mapping,
and
the
results
are
compared
with
the
results.

the

initialize

accessibility.

Probe

Execute

expected

check

repeated

for

allow

the

all

results

various

access,

the

translation

Typical

Error

#kkk%x%x%%*

pASS 1

Messages

CPU CLUSTER EXERCISER —— 9.0

****¥x&%

ERROR 20212

28-MAY-1978

TEST 1

SUBTEST 1

HARD ERROR WHILE TESTING CPU: LENGTH REGISTER BOUNDARY
ERROR OCCURRED DURING: ACCESS OR ACCESS CHECK
ERROR: PAGE TABLE ENTRY WAS MODIFIED

TESTED

PSL

MODE

ACCESS

ADDRESS

PRV

CUR

TYPE

SIZE

8000 1FF8

M-BIT

ACCESS

VALUE

CODE

STATE

00000098

0003

VAL

CLR

NO NO

ADDRESS

@@@1F43C

SYS BASE
REG

V-BIT

PTE

SPTEl:

ALLOWED

PROTEC-

PTE

TION

SYS LENGTH

REG

QOB1F 400

po000022

EXP DATA

ACT DATA

PTE MODIFIED

00000098

pPe00098

SPTE1l:

Example 6-57

ESKAZ Test 1, Subtest 1, Error 20212

6-64

khkkkkkkk

CPU
TEST

CLUSTER

PASS

HARD

ERROR WHILE

ERROR

OCCURRED

ERROR:

MODIFY

EXERCISER

SUBTEST

TESTING

DURING:

BIT

ERROR

CPU:

ACCESS

20213

LENGTH
OR

khkkkkkk*k

9.0

28-MAY-1978

ACCESS

BOUNDARY

CHECK

ERROR

TESTED

PSL

MODE

ACCESS

TESTED

OPERAND

ADDRESS

PRV

CUR

TYPE

SIZE

INSTR

NO.

6013001F8

MOV

PTE

PROTEC-

V-BIT

M-BIT

ACCESS

ALLOWED

TION

SPTEl:

ADDRESS

VALUE

CODE

STATE

(Q0@1F480

00000094

0002

VAL

SET

RW NO

0002

VAL

SET

T-BUFF

STATE

MISS

PPTEl:

(Q001F200

00000094

HIT

SYS

BASE

SYS

LENGTH

REG

POB1F400

00000022

BASE

LENGTH

REG

7FCO1A0Q0

001000
0F

EXPECTED

PTE

STATE
SET

SPTE1l:

Example

6-58

ESKAZ

Test

6-65

Subtest

Error

2@213

Interpretation of
1.

First,

Example

discussion

All error
follows:
de.

6-57

numbers

The

1left

test

where

ERROR

consist

byte

(2)

the

error

28212
3

bytes

defines
was

the

with

breakdown

within

the

location

encountered

where,

Subtest

1--6

Subsection
examples

The

middle

the

byte

test

defined

prior

(Paragraph
(#2)

the

indicates

time of

the

preceding

6.5.1).
the

action

being

taken

error

wiau

SETUP

PROBE/PROBE CHECK
ACCESS/ACCESS CHECK

W HHR

where,

ACCESS

DATA

FINAL

SETUP

CHECK

The right byte (12)
is indicative of the error itself
(it is used by the test software to determine what
gets printed at error report time).
So,
the
REGISTER

ERROR number
tells
BOUNDARY subsection

(62),

CHECK

MODIFIED

when

got

us
that
we
were
in
the
LENGTH
(2)
performing an ACCESS/ACCESS

message

saying

PAGE

TABLE

ENTRY

WAS

the

test

(12).

The

ADDRESS

UNDER

TEST was

8@0Q0@1FF8.

The
PREVIOUS and
time are shown as

CURRENT
K K

MODES

where,
K

Kernel

E
S

=
=

Executive
Supervisor

User

6-66

the

PSL

The ACCESS occurring at the time of the error
R

is shown as

where,

Read

W = Write
M = Modify

The

SIZE of

the

access

shown as

where,

Longword

Byte

= Word

Quadword

A discussion of

the

line labeled

SPTEl follows.

In
the
given
example
we
have
only
one
1line
of
information, but depending on the set of circumstances
there can be more than one line (as shown in Example
6-58).

The

lines

and

combinations

that

can

appear

are

follows:

SPTEl:

Page

1 system page

Page

1 processor

SPTE2:

Page

PPTE2:

Page

PPTEl:

table

2 system page table
page

table

2 processor page table

where,

Page 1 = page number of the address of the lowest byte of
the reference address as determined by either the Base
Virtual Address (BVA) or, if the position is negative, by
the BVA + position.
Page

the

page.
NOTE

A
reference may
be
either
entirely
within PAGE 1 or PAGE 2, or it may cross
over.

our

example,

the

PAGE

ACCESSED.

6-67

system

page

table

being

The PHYSICAL ADDRESS of the PTE is 1F43C.
NOTE

The

PTE

all

the

wvirtual

medium

translation

addresses

addresses.

physical

“

The

PTE

VALUE

The

PTE

content

Page

Frame

represents

the

comprises
Number

(PFN)

contents

Modify

bit

Bit

Protection

Bits

Vvalid -- Bit

the

PTE

98.

fields.
--

This is the upper 21 bits
the base of the page.

Bits

<20:00>

the

physical

address

<26>
<30:27>

<31>

The PROTECTION CODE for the page accessed was 3.
10.

Chapter

analysis

ease

of
of

the

VAX-11

protection

System Reference Manual
code

gives

meaning.

the strain of searching through the VAX-11] System
Manual, the protection code breakdown is shown

Reference
under

ACCESS

ALLOWED
as R,

NO,

This

states

that

the

being

and

cannot

kernel

mode,

page
be

NO,

NO.

accessed

any

can

READ

other

mode.

NOTE

A W under this column
would
indicate
that the page can be written in a given
mode.
11.

The

state

the

wvalid

bit

(V-BIT)

VAL

where,

12.

VAX =

1 (valid)

INV =

The

(invalid)

state

the

modify

bit

where,
CLR

(no

SET =

(modify)

modify)

6-68

(M-BIT)

CLR

13.

The content of
content of the

the SYSTEM BASE REGISTER was 1F40@
SYSTEM LENGTH REGISTER was 22.

and

the

These 13 items represent the SETUP portion of the error
report
(i.e., what were all the initial conditions, or
states, at the time of the error).
The

SYS

parts

BASE

REG

the

ADDRESS
value,
additionally as

If bit
31
includes
Pl

BASE

The

SYS

SETUP.

clear

REG

and

printouts

function

other

bit

printouts

3¢

always

occur

the

TESTED

will

occur

set,

the

message

clear,

the

message

LENGTH

REG

If bit 31
includes

clear

LENGTH

BASE

LGTH

one
or
two
follows:

REG

14.

and

bit

REG

ERROR

portion

the

the ERROR:
PAGE TABLE
showing
the
EXPECTED

printout

shows

further

proof

ENTRY WAS MODIFIED statement by
and
ACTUAL
DATA
and
the
PTE

MODIFIED.

Example

6-58

additional
the

error.

The

new

1is

similar

information which

items

Example

TESTED INSTR is
The OPERAND NO.

The

6-58

Example

HIT

a MOV
in question

translation buffer

state

=
=

except

that

the

are:

where,

MISS

6-57

reflects circumstances at

6-69

(i.e.,

(TB-STATE)

the

DST).

listed

shows

time of

6.6

COMPATIBILITY MODE

6.6.1
Most

INSTRUCTION

TEST

(ESKAZ@3,

TEST

Instructions Tested
of

the

hardware
are
modes (Figure

instructions

provided

exercised
using various
6-3). These instructions

START

the

compatibility

data
patterns
and
are listed in Table

mode

address
6-12.

)

SUBTEST
SETUP

j¢&—RN:

SUBTEST
INSTRUCTION

VERIFY

ERROR

LOOP

GO TO
NEXT
SUBTEST
TK-1200

Figure

6-3

Compatibility

Mode

Instruction

Structure

6-70

Module

Subtest

Table

6-12
Compatibility
Mode
Instructions
Provided
Compatibility Mode Hardware and Exercised by ESKAZ Test 2
Op

Code

(8)

Mnemomic

Code

(8)

Mnemonic

.355DD

ADC (B)

pA331DD

.@6SSDD
.363DD

ADD

@@ 4RDD

ASL (B)

JSR

. 1SSDD

.362DD
.4SSDD

ASR (B)
BIC (B)

. 5SSDD

BIS(B)

.354DD
.361DD
.364DD

MOV (B)
NEG (B)

JMP

ROL (B)
ROR (B)

. 3SSDD

BIT (B)

493-3777

1000060-3777

BRANCHES (*)

BRANCHES (**)

.0020R
POdAA6

.350DD
. 2SSDD

CLR(B)

@7 7RNN

SOB

CMP (B)

.851DD
240-277

COM(B)

16SSDD
A33033DD

SUB
SWAB

CND

A0367DD

.853DD

SXT

DEC(B)

.352DD

.357DD

TST (B)

INC(B)

@T74RSS

XOR

CODES (***)

RTS
RTT

.356DD

SBC (B)

where,

(*)=BR,

BNE,

(**)=BPL,

(***)=CLC,

BEQ,

BMI,

CLV,

BGE,

BVC,

CLZ,

BLT, BGT, BLE
BCS, BHI, BLOS,
CLN, cCC, SEC, SEV,

BCC,

BHIS,

SEZ,

BLO
SEN,

ScCC

The instructions provided by the compatibility mode hardware that
have not yet been included in this test are listed in Table 6-13.
Table

6-13

Compatibility Mode
Op

Code (8)

Instructions
Mnemonic

@7 2RSS

ASH

@73RSS

ASHC
DIV

@71RSS

1865SS

MFPD
MFPI

@065SS
1466DD
@06 6DD

MTPD
MTPI

@78RSS

MUL

6-71

Not

Yet

Tested

NOTES

1is

instruction

test

always

The

The error is always tagged EN.

The

tagged

IN.

return

always

tagged

point
RN.

than

one

BN,

etc.

looping

verification

for

subtest,
single
a
in
made
entries to subsequent checks
tagged

AN,

If more than one error

subsequent
E2N,

E3N,

errors

are

the
are

is included,
tagged

EIN,

etc.

" The RTI instruction provided by compatibility mode hardware is not
in this module. The compatibility mode entry/exit module
tested
tests this instruction thoroughly.

(ESKAX@2, Test #1l)

6.6.2

Compatibility Mode Test Error Message Format

The following header is printed when an error is detected.
(PC)

(PSW)

(R1)

(SP)

(R2)

(R4)

(R3)

Interpretation of Compatibility Mode Test Error Message Format
(PC)

Indicates the content of the program counter at the time
of the error call. This is normally an address that is
used to locate the error call statement in the failing
subtest.

(PSW)

(SP)

Indicates the content of the processor status word at the

time of the error call.

Indicates the

time of

The

the

content of

the

stack pointer

error.

error

call

NOTE

will

twice.

6-72

push

the

stack

(R6)

at the

(R1)

Indicates a mnemonic of the instruction under test

e.g., MOVB, ASL

(R2)

et al.

double-operand

instructions,

R2 normally

and double-operand

instructions,

R3 contains

For

single- and

For

single-

the

test

contains the destination address.

(R3)

what the result

(destination operand)

instruction

was

actually was after

executed.

For single- and double-operand instructions, R4 contains

(R4)

what

the

result

(s/B) .

some

cases,

the

(destination

error

operand)

should

information

may

have

been

from

that

have

been

deviate

previously described but the program annotation for those subtests

will

describe

the

meaning

those

entries

The error call statement

that

redefined.

is encoded to print only the

relative to the particular function being tested.

of the

Print all 7 columns

ERROR

ERROR1

only column

ERROR3

columns

ERRORS

columns

Print columns 1,

ERROR2

ERROR4

Print columns 1,

Print columns

ERRORG6

Sample Error Message Explanation

6.6.3

PASS

error calls is shown below.

information

Interpretation

TEST

SUBTEST

208

HARD ERROR WHILE TESTING CPU:

COMPATIBILITY MODE

(PC)

(PSW)

(SP)

(R1)

(R2)

(R3)

(R4)

@0008DDYJ

P00000034

@00 BA5AA

MOV

Pe0004A008

Q0000000

PO@BFFFF

Example

6-59

ESKAZ

Compatibility Mode

6-73

Test

Error

Interpretation of

8DD@
4

Example

6-59

Represents

the

Represents

the

content

the

last

the

error
of

call

the

PSW

the

listing.

prior

the

error

mode

stack

call.

AS5AA

Represents
pointer

position

MOV

400

Represents
portion of

the

Represents

the

instruction

execution.

Represents

what

00a0

FFFF

have

The

listing

page.

The

clue

that

the

laid

operator

MOV instruction

address

actual

used

the

content

destination

mode

the

destination

after

SUBTYPE

destination

was

executed.

should

printed at the top of each
the
program
1listing
for

Instruction Module Assumptions

(SPL)

Used

program

(IOT)

Used

the

description
of
208
shows
that
a
MOV
source mode 2 and destination mode 3.

Compatibility Mode

Appears

test.

the

Four compatibility mode trap instructions
execution of this test, as follows.
SUBTYPE
SUBTYPE

under

out with a subtitle
can
look
through

268.
The
subtest
instruction is tested with

1.
2.

PDP-11

failed

the MOV instruction

subtest

6.6.4

the

MOV instruction.

been after

(R6).

are

end

subtest

used

control

the

indicator.

NOTE
as

SCOPE

(EMT)

Used

statement

error

listing.

report

indicator.

NOTE

Appears

ERROR

statement

1in

listing.
4,

SUBTYPE
4

(TRAP)

Appears

Used

TRAP

NOTE
+
XX

listing.
It

PSW

reference

indicator.

statement

assumed
that
the
test
performing
the
exercising
of
compatibility mode entry/exit conditions has been executed prior
to
this
test,
in which
event,
the
compatibility
mode
trap
instructions have been checked out.

6-74

APPENDIX A

GLOSSARY

OF DIAGNOSTICS

SOFTWARE

TERMS

absolute

(ABS) -- A program section (psect) attribute. An absolute
psect contains only symbol
definitions.
It does not contribute
binary code to the image. Therefore,
it must have a zero-length
memory allocation. The converse is relocatable (REL).
access

mode

Any

the

four

processor

access

modes

software executes. Processor access modes are, in order,
to
least
privileged
and
protected:
kernel
(mode
@),

(mode

1),

When

the

complete

supervisor
processor
control

(mode

2),

kernel

of,

and

user

mode,

(mode
the

responsibility

which

from most
executive

3).

executing

for,

the

software

system.

has

When

the

processor is in any other mode, the processor
is inhibited from
executing privileged instructions.
The processor status longword
contains the current access mode field. The operating system uses

access modes

the

context

user

runs

protection

process.

levels

for

software

user

For

example,

and

which

the

processor

read,

write,

mode

the

executing

executive

1in
executive modes
and
is most protected.
The
command
is
less protected
and
runs
in
supervisor
mode.
The

kernel
and
interpreter
debugger

define

protected

runs

than

normal

programs.

access

type

—-

The

way

Access

types

alignment
based.

address

allocate

exclusive
device is

use. A user process can allocate a device
not allocated by any other process.

The

device

are:

accesses

operands.
branch.

boundary

which

reserve

particular

allocation
-The number
of
bytes of
program section to a particular module.
alphanumeric character -a--z), a dollar sign
($),

modify,

An
an

program

memory

upper or lower
underscore
(),

instruction.

address,

section

unit

for

only when

that

device

contributed

case
or a

and

letter
(A--2Z,
decimal digit

ancillary control
process
(ACP)
-- A process
that
acts
as
an
interface between user software and an I/0 driver. An ACP provides
functions supplemental to those performed in the driver, such as
file and directory management.
argument —-- An independent value within a command statement that
specifies
where,
or
on
what,
the
command
will
operate
(e.g.,
address, data).

A-1

argument

pointer

contains

the

procedures

General

address

initiated

the

using

(R12).

the

base

the CALL

convention,

argument

1list

for

instructions.

assign
a
between a

channel
-- To establish the necessary software linkage
user process and a device unit before a user process can

transfer

any

the

system

data

from

assign

channel

that

device.

and

the

user

system

process

returns

requests

channel

number.
assembler

program

operations
correspond
language code.
asynchronous

to
be

system

that

translates

directly

trap

(AST)

source

machine

language

code,

codes,

into

software-simulated

a user-defined service
routine.
ASTs
notified asynchronously, with respect

enable
to its

whose

object

interrupt

a user process to
execution, of the

occurrence of a specific event.
If a user process has defined an
AST routine for
an event,
the
system
interrupts
the process and
executes
the
AST
routine
when
that
event
occurs.
When
the
AST
routine exits, the system resumes the process at the point where
it was interrupted.
attributes
programmer

—-- Various characteristics that
to each psect in a module (e.g.,

can be
ABS).

assigned

base register
—-- A general register used to contain the address
the entry in a list, table, array, or other data structure.
block

specified
bytes for

bytes

The

smallest

addressable

device can transfer
most disk devices).

used

store

logically

processing

information

breakpoint

diagnostic
breakpoint,

1In

(i.e.,

unit

process

diagnostics,

supervisor.
When
control returns to

status,

control

address

temporary data

that

control,

assigned

lower

(also

addresses,

called

stack

and

popped

off

other

through

(usually

the

larger)

area.

call frame -- A standard data structure built on the stack
a procedure call,
starting from the
location addressed by

the

contiguous
contiguous

the
PC
equals
the
value
the diagnostic supervisor.

storage

block).

boot (bootstrap) -- A program that loads another
program into memory from a peripheral device.
buffer

data

in an I/0 operation
(512
2. An arbitrary number of

the

during

return

from

during
FP

the

procedure

frame).

channel -- A logical path connecting a user process to a physical
device
unit.
A
user
process
requests
the
operating
system
to
assign a channel to a device so that the process can transfer data
to or from that device.

A-2

command

file -- A

file containing

command

strings.

command
interpreter -Procedure-based code to
receive,
syntax
check,
and parse commands typed by the
user at a terminal or
submitted in a command file.
command parameter -- The positional operand of a command delimited
by spaces, such as a file specification, option, or constant.
command

string

line,

set

continued

lines,

normally

terminated by typing the carriage return key containing a command,
and

optionally,

information

modifying

the

command.

complete

psect

command string consists of a command; its qualifiers, if any; its
parameter
(file specifications, for example), if any; and their
any.

qualifiers,

concatenate

(CON)

program

section

attribute.

psects of
the same
assigned contiguous
Each module can specify

name yet
addresses

from different
in the virtual

concatenated,
all
modules are to be

space.

address
The

linker

performs

The

contributions.

the

necessary

alignment

base

padding

=zero

resulting

the

alignment.

independent

1is

bytes

between

concatenated

psects is according to the greatest alignment granularity of all
the
contributions
to
the psect.
For example,
1if the greatest

alignment

granularity of

page-aligned;

although,

condition

others

word-aligned,

all

some

contributors

may

page,

the

psect

declared

byte-aligned,

etc.

exception

condition

detected

and

status

word

wants

the

software.

condition

codes

condition

handler

Four

bits

the

processor

procedure

that

indicate the results of the previously executed instruction.

when

execute

condition

condition
operating

exception

occur,

handler.

When

perform

some

system

may

handler
the

does

exception

the

initiates

condition

the

act

and

condition

process

occurs.

operating

finds

the

handler

change

system

immediately.

then continue

for

The

the

handler,

situation

execution

system

exception

searches

condition

the

When

condition

that

caused

the

process

that incurred the exception condition. Condition handlers execute
in the context of the process at the access mode of the code that
incurred the exception condition.

context switching -- Interrupting the activity in progress and
Context switching occurs as one
switching to another activity.
process after another is scheduled for execution. The operating

system

saves

hardware

PCB

the

using

interrupted
the

save

another process's hardware
load

process

execution.

context

process's

process

hardware

context

instruction,

its

loads

PCB into the hardware context using the

instruction,

and

schedules

that

process

for

cylinder
surfaces

-The
tracks
of a disk pack.

default

supplied

Assumed

value

the

same

radius

when

not
specifically
override
the
normal
fields in a file specification that the
specification

not

disk
-- The
system disk
to
files that
the operator creates,
by
whenever
a
file
specification
in
a

all

command

system

recording

qualifier

function;

fills

does
also,

when

the

complete.

default

name

which
the
system
writes
all
default.
The default is used
command
does
not
explicitly

device.

delimiter

character

within
member

a command or data
of the string.

device

The

general

name

connected to the processor
or
transmitting data.
Card

are examples
disk devices

interfaces

symbol

string.

used

However,

for

any

separate

limit

the

delimiter

physical

terminus

items
not

1link

that is capable of receiving, storing,
readers,
line
printers,
and
terminals

of record-oriented devices. Magnetic tape devices and
are examples of mass storage devices.
Terminal 1line

and

interprocessor

links

are

examples

communications

devices.

device

interrupt

levels

devices,

—--

through

23.

controllers,

interrupt
Device

and

received

interrupts

can

interrupt

priority

requested

only

memories.

device name -- The field
in a file specification that identifies
the
device
unit
on
which
a
file
1is
stored.
Device
names
also
include the mnemonics that identify an I/0 peripheral device in a
data
transfer
request.
A
device
name
<consists
of
a
mnemonic
followed
followed

from

direct

following

I/0

program
on

by
a
controller
by a unit number

fields.

mode

addresses

support

from

identification
letter
(if
applicable),
(if applicable).
A colon
(:)
separates

the

access

device

operating

peripheral

registers
system

devices

directly,

which

without

the

relying

drivers.

drive
-The
electro-mechanical
unit
of
a
mass
storage
device
system on which a recording medium (disk cartridge, disk pack, or
magnetic tape reel) is mounted.
driver

The

set

mask

system

code

that

handles

physical

I/0

device.
entry

word

(1)

whose

bits

represent

the

registers

saved or restored on a subroutine or procedure c¢call using the call
and return instructions, and (2) which includes trap enable bits.
entry

point

call.

entry

point

contains

location
an

entry

that

can

mask

and

mask.

A-4

specified

exception

the

enables

object
known

the

event
-- A
change
in
process
status
or
an
indication
of
the
occurrence of some activity that concerns an individual process or
cooperating processes. An incident reported to the scheduler that
affects a process's ability to execute. Events can be synchronous
with
the
process's
execution
(a
wait
request,
or
they
can
be

asynchronous

(I/0

completion).

wake

page

fault.

request,

event

flag

cleared
that

flag.

process

—--

normal

many

event

used

cluster

detected

branch,

flag

occurrence
are

examples

the

events:

that

swapping,

can

set

event

associated

with

synchronize

activities

processes.

event

jump,

flow

the

flags

among

interrupt or
the

bit

Event

exception

indicate

Some

case,

instruction

the

or call

hardware

(other

instruction)

execution.

than

that changes

exception

always

caused by the execution of an instruction or set of instructions,
while
an
interrupt
1is
caused
by
an
activity
1in
the
system
independent of the current instruction. There are three types of
hardware

exceptions:

traps,

attempts

traps;

compatibility

execute

faults,

privileged
mode

execution; and arithmetic
divide-by-zero.

and

reserved

faults;

traps

such

aborts.

Examples

instruction;

breakpoint

overflow,

are:

trace

instruction

underflow,

and

exception
condition
—-- A
hardwareor
software-detected
event
(other
than
an
interrupt
or
Jjump,
branch,
case,
or
call
instruction)
that
changes
the
normal
flow
of
instruction
execution.
exception

searches

dispatcher

for

condition

operating

handler

system

when

occurs.
If
no
exception
condition, the image that

handler
incurred

is
found
for
the exception

executable

program

section

(EXE)

contains only

instructions.

linker

this

separate

instructions

uses

verification
executable

This attribute

from

read-only

attribute

the

transfer

an
exception
is terminated.

attribute.

and

that

The

read/write

psects

must

present

The

the
an

psect.

execution

executive

—--

run in a
file for

process.

The

generic

name

for

the

collection

included in the operating system software that provides
control and monitor functions of the operating system.

logical

psect

data.

and

executable image -- An image that is capable of being
process. When run, an executable image is read from a

file -physical
as disk
assigned

that

condition

provides the capability

gathering

address

procedure

exception

procedures
the

basic

A
1logically
related
collection
of
data
treated
as
a
entity that occupies one or more blocks on a volume such
or magnetic tape.
A file can be referenced by a name
by the
user.
A file normally consists of one
or more
records.
A-5

file specification
medium.

frame

pointer

contains

the

unique

General

base

name

for

most

address

the

file

mass

storage

(R13).

convention,

recent

call

frame

the

stack.

global symbol -- A symbol defined in a module that is potentially
available for reference by another module.
The 1linker resolves
(matches
references with
definitions)
global
symbols.
Contrast
with local symbol.

granularity -- The alignment of a contribution to a psect on a
boundary. The alignment granularity may be byte, word, quadword,
or

page.

home

block

image

bound

together

identification,
An

block

image

the

consists

the

executable,

sharable,

index

—--

file

index

file

that

contains

procedures

and

data

The

linker.

and

file

There

are

three

that

interrupt

call

instruction

process

event

executing

when

FILES-11

volume

that

(other

than

that

changes

Interrupts

the

exception

are

interrupt

the

contains

the

enables

the

branch,

normal

generally

external

occurs.

Jjump,

flow

the

interrupt stack —-- The system-wide stack used when executing
interrupt

process

kernel

with

service context.

context

mode;

kernel

At any time,

executing

system-wide

privileges,

current mode
bits
context-switched.

been

images:

system.

instruction)

execution.

volume

have

types of

access information for all files on the volume and
operating system to identify and access the volume.

case,

the

such as volume label and protection.

the

user,

interrupt

indicated
PSL.

The

the processor

supervisor,

service

the

executive,

context

interrupt

in an

is either

operating

stack

and

1is

not

I/0 function code - A
6-bit
value
specified
in
a
queue
I/0
request system service that describes the particular I/O0 operation
to

performed

library

file
the

(e.g.,

—--

modules

linked

commands

read,

direct

same module

write,

rewind).

access

file

containing

one

type.

group

independent

commands

connected

together
(linked)
so
as
to form a single executable 1list
commands. Once initiated, the entire linked command list may
executed without further operator intervention.

of
be.

linker -- A program that reads one or more object modules created
by language processors and produces an executable image file, a
sharable image file, or a system image file.

linking

—-

modules

used

The

resolution

create

external

image;

references

the

between

acquisition

object

referenced

library routines, service entry points, and data for the
and the assignment of virtual addresses to components of an

image;
image.

link map

total

the

link

program

map

image.

shows

The

the

virtual

map

link

program section allocation

memory

found

allocation

program

listing

the
in

synopsis.

literal -- An operand which
is used
immediately,
without being
translated to some other value. An operand which specifies itself.
literal

argument

statement
local

that

specifies

symbol

that defines

it.

Symbols

global

symbols

independent

symbol

are

value

within

command

itself.
that

not

1is

meaningful

identified

considered

1local

only

language

the

module

processor

symbols.

1language

processor
resolves
(matches
references
with
definitions)
1local
symbols. They are known to the linker and cannot be made available
to another object module. They can, however, be passed through the
linker to the symbolic debugger. Contrast with global symbol.

logical
using

block
the

—--

block

(device-oriented)

address

The

comprise

blocks

starting

volume-relative
that

with

logical

mass

the

block

storage

device

rather

than

address

virtual
volume

module

programming

part

allows

separate

parts

mount
a
physical

volume
unit on

the

data

(file-relative)

address.

1labeled

1language

system
functions
protection and the

program

assembled

development
and

large

(an

operand

—-

unit.

programs

Modular

which

-To
logically
associate
a
volume
with
the
which it is loaded
(an activity accomplished by

activity

routines.

accomplished

object module -- The binary output
the assembler or a compiler, which

by an

processor

that
include
the
operating system's

system software at the request of an operator).
place a magnetic tape or disk pack on a drive and

on-line

sequentially

-A
statement
that
requests
a
generate a predefined set of instructions.
management
-The
hardware's page mapping and
image activator and pager.

physical

are

macro

memory

identified
the

value

(address

of
is

data)

instruction.
A-T7

Or,
to load or
place the drive

system operator).

a language processor
used as input to the
that

operated

on,

such as
linker.
or

with,

overlay

(OVR)

overlayed,

all

program

section

attribute.

psect

contributions

the

address.
The
1length
of
the
psect
contribution.
All contributions to
the same alignment.

have

1is the
size
an overlayed

psect

the

same

1is

base

of
the
1largest
psect must have

page -—- A set of 512 contiguous byte locations used as the unit of
memory
mapping
and
protection.
Also,
the
data
between
the
beginning of a file and a page marker,
between two markers,
or

between

page

in
of

a marker and

frame

number

the

(PFN)

end

of a

The

file.

address

the

physical memory. The high-order 21 bits
the base of a page make up the PFN.

page

table

location

entry

and

(PTE)

status

The

data

page

first

the

structure
virtual

byte

physical

that

address

page

address

identifies
space.

the

When

virtual page is in memory, the PTE contains the page frame number
needed to map the virtual page to a physical page. When it is not
in memory, the PTE contains the information needed to locate the
page

secondary storage

(disk).

parameter

-- A parameter is the object of a command. It can be a
file specification, a keyword option, or a symbol value passed to
a command procedure.
In diagnostics,
parameters are
usually

operator-supplied
concerning

devices

parameter

switch

preceded
parser

into

-- A

slash

dquestions

asked

program

tested.

command

qualifier.

diagnostics,

(/).

procedure

structural

physical

answers
to

that

breaks

down

the

components

address

used

hardware

command

forms.

address

The

identify

location in physical memory or on directly addressable secondary
storage devices such as disks. A physical memory address consists
of a page frame number and the number of a byte within the page. A
physical disk block address consists of a cylinder or track and
sector

number.

physical

its

block

physical

block

(device-oriented)

(volume-relative)

virtual

mass

storage

address

device

rather

(file-relative)

referred

than

1logical

address.

position independent code
(PIC) -- A program section attribute.
The contents of the psect do not depend on a specific location in
virtual
memory.
The
converse
1is
nonposition
independent
code
(NOPIC)
.

A-8

priority
level

The

rank

assigned

activity

that

determines

service.

For

System

example,

when

resources,

several

jobs

service

the

first.

Jjob

with

the

highest

priority

Program

section

module.

number

directives
precedes

—--

program

portion

the

(psect)

program

developer.

first

defined

program

the

sections

program

section

Through

program
sectioning
the
memory
allocation
of
a

virtual

established

linker.

the

Thus,

nonexecutable,

for

program

the

etc.

the

diagnostic

See

prompt

programs,

program's

program
program.

any

placed

each

typed

MACRO

test

out

are

passed

declared
Language

code

that

the

BLANK

the

Reference

Manual

only,

section

given

read

program

response

action.

controls
the
program
attributes

Any

various

Creates

according

developer

directive

can

VAX-11]

thé

section.

operator

for

receives

assembler

module,

addition,

section

sections

functions.

assembler.

program

explanation

The

within

its

contend

attribute

separate

and/or

program

request

for

qualifier -- A portion of a command string
that modifies a command
verb or command parameter by selecting one
of several options. A
qualifier,
if present,
follows the
command verb or
parameter
to
which
it
applies
and
is
in
the
format:
/qualifier:option.
For
example,

COPIES

the

command

qualifier

given

file

printed.

queue

list

queue

I/0

program
system

radix

the

The

calls

commands

mode

driver

diagnostic

base

readable

(RD)

psect

read

can

of
A

the

record

collection

A logical
determined
by

record

record-oriented

device.

"PRINT

that

the

jobs

access

routines

number

section

can

wants

length

which

use.

data

whose

operating

contents

converse

items

any

The

VMS

currently

adjacent

the

data.

the

processed.

transfer

The

copies

devices

attribute.

time.

/COPIES:3",

three

peripheral
provided

system

execute

user

waiting

supervisor

program

(NORD)
.

unit.

string

indicates

the

nonreadable

treated

significance

the
programmer. A
physical
record
is
a
device-dependent collection of contiguous bytes
such as a block on
a
disk,
or
a
collection
of
bytes
sent
to
or
received
from
a

relocatable
(REL)
-- A pProgram section attribute. The psect
must
be assigned a base address by the linker.
This psect can contain
code and/or data.
A-9

script file —-- A line-oriented ASCII file that contains a list of

commands.

section -- A group of tests in a diagnostic program that may be
by the operator.
selected

sector -- A portion of a track on the surface of a disk. On a
VAX-11 system, each track on a disk is normally divided into 22
sectors.

semantics -- The interpretation of and relation between commands

or command symbols.

sharable image -- An image that has all of its internal references
resolved, but which must be 1linked with an object module(s) to

d.
produce an executable image. A sharable image cannot be execute
of
y
1librar
a
n
contai
to
used
be
can
A sharable image file
by
section
global
a
as
ed
install
be
can
routines. A sharable image
the

system manager.

stack -- An area of memory set aside for temporary storage, or for

interrupt service linkages.

procedure and

A stack uses the

last-in, first-out concept. As items are added to (pushed on) the
stack, the stack pointer decrements. As items are retrieved from
(popped off) the stack, the stack pointer increments.

stack frame -- A standard data structure built on the stack during
FP
a procedure call, starting from the location addressed by theure.
proced
from
return
a
during
off
popped
to lower addresses, and
Also

called

call

frame.

stack pointer -- General register 14 (R14). SP contains the
fined
address of the top (lowest address) of the processor-de
stack
e
possibl
five
the
of
one
access
will
stack. Reference to SP
upt,
interr
or
user,
isor,
superv
ive,
pointers: kernel, execut
stack
pt
interru
and
mode
current
depending on the value in the
bits in the Processor Status Longword

(PSL).

standalone mode -- A diagnostic program environment in which the
VMS
program and the diagnostic supervisor run without the when
l
termina
console
the
use
must
r
operato
The
operating system.
running diagnostics in the standalone mode, and no other users
have

access

the

system.

symbolic argument -- An argument within a command that refers to
another value.

The
syntax -- The rules governing a command language structure. gful
meanin
form
to
d
ordere
are
s
way in which command symbol
statements.

syntactic unit -- An

item contained within

(e.g., an argument, a qualifier).

A-10

a command

statement

system

image

storage

when

the

test

function

time

unit

that

-recording
--

is read
started up.

diagnostic

the

statement

occurred.

track

trap

image

system

portion

stamp --

event

The

exception

program

memory

that

from

checks

hardware.

A
collection
of
surface of a disk.
An

into

the

time

blocks

condition

that

day

which

single

occurs

secondary

specific

radius

the

end

one

the

instruction that caused the exception. The PC saved on the stack
is the address of the next instruction that would normally have
been executed.
All
software can enable and disable some of the
trap

conditions

unit record
printer.

with

device

stack

UUT

for

the

each

(unit

device

such

To remove call
nested
procedure

call

frame.

under

test)

being

tested

virtual

block

number

and

card

reader

The

first

block

frames from
calls
using

content

The device or
portion
diagnostic program.

number

used

storage device.
The number is
a
1logical
(volume-oriented)

address.

hardware

mass
than

instruction.

line
|

unwind the call stack
tracing
back
through
content

single

file

identify

physical

always

stack

by
current

the

stored

file-relative

the

computer

block

address

rather

(device-oriented)

virtual

one.

block

number

writable

(WRT)

psect

can

-- A

program

modified

section

execute

attribute.

time.

(NOWRT) .

A-11

The

converse

content
is

the

nonwritable

VAX-11/780 DIAGNOSTIC SYSTEM

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