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AA-5578A-TC

November 1978

420 pages

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18MB

Document:	RSX-11M System Logic Manual Volume 1
Order Number:	AA-5578A-TC
Revision:	0
Pages:	420
Original Filename:	http://bitsavers.org/pdf/dec/pdp11/rsx11m_s/RSX11M_V3.1_Dec77/RSX11M_V3.1_SysLogicManVol1_197811.pdf

OCR Text

November 1978

RSX-11M
System Logic Manual
Order No. AA-5579A-TC

VOLUME 1

RSX-11 M V3.1

To order additional copies of this document, contact the Accessories and
Supplies Group, Product Line 86, Digital Equipment Corporation, Cotton
Road, Nashua, New Hampshire 03060.

digital equipment corporation · ma\:lnard. massachusetts

First Printing,November 1978
The information in this document is subject to change without notice
and should not be construed as a coilUl\itment by Digital Equipment
Corporation. Digital· Equipment Corporation assumes no responsibility
for any errors that may appear in this document.
The software described in this document is furnished under a license
and may only be used or copied in accordance with the terms of such
license.
No responsibility is assumed for the use or reliability of software on
equipment that is not supplied by DIGITAL or its affiliated companies.

@ 1978 by Digital Equipment Corporation

The postage-prepaid READER'S COMMENTS form on the last page of this
document requests the user's critical evaluation to assist us in preparing future documentation.
The following are trademarks of Digital Equipment Corporation:

DIGITAL
DEC
PDP
DECUS
UNIBUS
COMPUTER LABS
COMTEX
DDT
DECCOMM
ASSIST-11
VAX
DECnet

DECsystem-lo
DECtape
DIBOL
EDUSYSTEM
FLIP CHIP
FOCAL
INDAC
LAB-8
DECSYSTEM-20
RTS-8
VMS
IAS

2/79-14

MASS BUS
OMNIBUS
OS/8
PHA
RSTS
RSX
TYPESET-8
TYPESET-11
TMS-11
ITPS-10
SBI

CONTENTS
VOLUME I

Page
PREFACE
CHAPTER

xvii.
1
1.1
1.2
1.3
1.4
1. 4 .1
1. 4. 2
1. 4. 3
1. 4. 4
1. 4.5
1. 4. 6
1. 4. 7
1.5
1. 5.1
1.5. 2
1.5. 3
1. 5. 4
1.5 .5
1. 5. 6
1.5. 7
1. 5. 8
1.6
1. 6. l
1. 6. 2
1.6.3
1. 6. 4
1. 6.5
1. 6. 6
1. 7
1. 7 .1
1. 8
1. 8.1

1. 8. 2
1. 9
1. 9.1
1. 9. 2

1.10
1.10 .1
1.11
1.11.1
1.11. 2
1.11. 3

IN'I'RODUC'I'ION 'I'O THE RSX-llM V3.1 OPERATING
SYSTEM EXECUTIVE
RSX-UM SYSTEM
SYSTEM GENERATION
MAJOR COMPONENTS OF RSX-UM
MEMORY
Memory Partitions
Partitions In Mapped And Unmapped Systems
Partition Types
Subpartitions
Memory Structure
Example Of A 16K Unmapped System
Example Of A Mapped 124K-word RSX-llM
System
'I'ASK PROCESSING
Task States
Fixed '!'asks
Priority
Round-robin Scheduling
Checkpointing
'I'ask Swapping
'I'he Shuffler Task
Extended Logical Address Space
RSX-llM IN'I'ERRUP'I' PROCESSING
Interrupt Vectors
System. Stack
Processor '!'raps
E.xternal Interruptions
Interrupt And Trap Vector Locations
System '!'raps
EXECUTIVE DIRECTIVES
Event Flags
'I'HE MCR INTERFACE
Privileged Commands
External Scheduling Of 'I'ask Execution
TERMINAL OPERATION
Attached Terminals
Slave Terminals
MULTIUSER PROTECTION
Public And Private Devices
SYSTEM MAINTENANCE
Error Logging
Diagnostic Tasks
Power Failure Restart

iii

1-1
1-1
1-1
1-2
1-2
1-2
1-3
1-3
1-4
1-4
1-7
1-9
1-11
1-11

1-12
1-12
1-13
1-13
1-14
1-15
1-15
1-17
1-17
1-17
1-18
1-18
1-19
1-19
1-20
1-25
1-26
1-26
1-27
1-27
1-27
1-28
1-28
1-28
1-28
1-28
1-29
1-30

CONTENTS (Cont.)

Page
CHAPTER

CHAPTER

MEMORY RESOURCE ALLOCATION

2-1

2.1
2.1.1
2.1. 2
2.1. 3
2.1. 4
2 .1. 5
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.s
2.2.9
2.2.10
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2.4
2.4.1
2.4.2

INTRODUCTION
Memory Addressing
Memory Management - An Overview
Virtual And Logical Addresses
Task Wi:ndows
Regions
MEMORY AL:LOCATION
Checkpointing
Disk Swapping
Shuffler (Memory Compaction)
The Loader (the System Loader Task)
The $NXTSK Routine
Routines That Call $NXTSK
Routines That $NXTSK Calls
$FNDSP Routine
$ICHKP Routine
$TSTCP Routine
MEMORY ALLOCATION FLOW DIAGRAMS
$ALCLK Logical Flow Diagram
$ALOCB Logical Flow Diagram
$CHKPT Logical Flow Diagram
$DECLK-$DEPKT-$DEACB Logical Flow Diagram
$FNDSP Logical Flow Diagram
$ICHKP Logical Flow Diagram
$NXTSK Logical Flow Diagram
$TSTCP Logical Flow Diagram
Loader Logical Flow Diagram
Shuffler Logical Flow Diagram
MEMORY ALLOCATION DATA STRUCTURES
Partition Control Block (PCB)
Task Control Block (TCB)

2-1
2-1
2-2
2-2
2-4
2-8
2-10
2-10
2-12
2-13
2-15
2-17
2-18
2-22
2-22
2-23
2-23
2-24
2-25
2-26
2-28
2-30
2-35
2-36
2-37
2-42
2-43
2-51
2-61
2-61
2-65

INTERRUPT PROCESSING

3-1

3.1
3.2
3.2.1

INTRODUCTION
INTERRUPT MECHANISMS
Hardware Interrupt Mechanisms - Review
and overview
Executive and Stack Processing
INTERRUP'I' PROCESSES
The INTSV$ Macro
External Interrupt from the Task
State ($STKDP=l)
External Interrupts from the System
State ($STKDP < =O)
Processor Traps from the Task State
( $STKDP < =1)
Processor Traps from the System State
( $STKDP < =O)
Powerf ail Processing
Processing Within Interrupt Routines
Fork Processing
Exiting the System State
Interrupt Processing Code
Interrupt Processing Summary

3.2.2
3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
3.3.7
3.3.8
3.3.9
3.3.10
3.3.11

3-1
3-1

3-1
3-2
3-2
3-3
3-4
3-5
3-7
3-9
3-11
3-12

3-13
3-15
3-17
3-19

CONTENTS (Cont. )

Page
CHAPTER

PRIVILEGED TASKS

4-1

4.1

4-1
4-1
4-2
4-4

4.2.5

INTRODUCTION
PRIVILEGED TASKS
Privileged Task Hazards
Specifying a Task as Privileged
Writing a Privileged Task
The $SWSTK Routine Described - Unmapped
and Mapped Systems
Task Mapping

MCR INTERFACE

5-1

5.1
5.1.1

5-1

5.1. 2
5.1. 3

MCR - MONITOR CONSOLE ROUTINE
Structure and Operation Environment
of MCR
The Terminal Driver and MCR Initiation
MCR Operation

I/O PROCESSING

6-1

6.1
6.2
6.2.1
6.2.3
6.3
6.4

IMPLEMENTATION
RSX-llM I/0 DATA STRUCTURES
The Device Control Block (DCB)
The Unit Control Block (UCB)
The Status Control Block (SCB)
QUEUE I/0 DIRECTIVE PARAMETER BLOCK
QIO DIRECTIVE LOGICAL FLOW

6-1
6-1
6-2
6-2
6-2
6-3
6-5

MODULE DESCRIPTIONS

7-1

7.1

CHAPTER ORGANIZATION
Module Name
Macro Library Calls
Entry Points
Calls
Entry (input) Conditions
Exit (output) Conditions
EXECUTIVE MODULE DESCRIPTIONS
BFCTL Module
CORAL Module
CRASH Module
CVRTM Module
DRABO Module
DRASG Module
DRATX Module
DRCIN Module
DRCMT Module
DRDAR Module
DRDCP Module
DRDSP Module
DREIF Module
DREXP Module
DRGCL Module
DRGLI Module

4.2
4.2.1
4.2.2
4.2.3
4.2.4

CHAPTER

6.2.2

CHAPTER

7 .1.1
7.1.2
7 .1. 3
7 .1. 4
7 .1. 5
7 .1. 6
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.S

7.2.6
7 .. 2.7
7.2.8
7.2.9

7.2.10
7.2.11
7.2.12

7.2.13
7.2.14
7.2.15
7.2.16

4-1

4-5
4-10

5-2
5-3
5-5

7-1
7-1
7-1
7-2
7-2
7-2
7-2
7-2
7-2
7-4
7-6

7-7
7-7
7-8
7-8
7-9
7-11
7-12
7-13

7-14
7-15
7-17
7-18
7-19

CONTENTS (Cont. )

Page
7.2.17
7.2.18
7.2.19
7.2.20

7.2.21
7.2.22
7.2.23
7.2.24
7.2.25
7.2.26
7.2.27
7.2.28
7.2.29
7.2.30
7.2.31
7.2.32
7.2.33
7.2.34
7.2.35
7.2.36
7.2.37
7.2.38
7.2.39
7.2.40

7.2.41
7.2.42
7.2.43
7.2.44
7.2.45
7.2.46
CHAPTER

ORGPP Module
ORGSS Module
ORGTK Module
DRGTP Module
ORMAP Module
DRMKT Module
DRPUT Module
ORQIO Module
DRRAS Module
DRREG Module
DRREQ Module
ORRES Module
DRSEO Module
DRSST Module
ERROR Module
INITL Module
IOSUB Module
LOAOR Module
LOWCR Module
PARTY Module
PLSUB Module
POWER Module
QUEUE Module
REQSB Module
SSTSR Module
SYSCM Module
SYSOF Module
SYSTB Module
SYSXT Module
TOSCH Module

7-19
7-20
7-21

7-21
7-22
7-29
7-31

7-33
7-34
7-36
7-39
7-40

7-42
7-45
7-47

7-49
7-50
7-62

7-62
7-63

7-64
7-66

7-67
7-69

7-77
7-80

7-82
7-83

7-83
7-89

DATA AREAS ANO CONTROL BLOCKS

8-1

8.1

INTRODUCTION
SYSTEM POINTERS AND LINKAGES
Device Control Block Pointer ($DEVHD)
Unit Control Blocks
Status Control Block (SCB)
Partition Control Block (PCB) Pointer
Task Ccmtrol Block (TCB) Pointers
($TSKHD And $ACTao)
Reschedule Pointer ($RQSCH)
Current Task Pointer ($TKTCB)
Loader Pointer ($LDRPT)
Task Termination Task Pointer ($TKNPT)
Free Storage Block Pointer ($CRAVL)
Fork Queue List Pointer ($FRKHD)
Clock Queue Pointer ($CLKHD)
Current Task Header Pointer ($HEADR)
Examples Of System Linkages
Interrelationship Of The DCB, UCB,
And SCB
I/O CONTROL BLOCK LINKAGES
CONTROL BLOCK OFFSET DEFINITIONS
Asynchronous System Trap Control
Block (ASTCB)

8-1
8-1

8.2
8.2.l

8.2.2
8.2.3

8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9

8.2.10
8.2.11
8.2.12
8.2.13

8.2.14
8.2.15
8.3

8.4
8.4.1

8-4
8-4
8-5
8-5

8-5
8-6

8-6
8-6
8-6
8-6
8-6
8-6
8-7

8-7
8-24

8-26
8-29
8-29

CONTENTS (Cont.)

Page
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.4.9
8.4.10
8.4.11
8.4.12
8.4.13
8.4.14
8.4.15
8.4.16
8.4.17
8.4.18
8.4.19
8.4.20
8.4.21
8.4.22

CHAPTER

Clock Queue Control Block (CQCB)
Communications Control Block (CCB)
Device Control Block (DCB)
Error Message Block (EMB)
File Control Block (FCB).
Get Command Line Control Block (GCML)
Hardware Definitions
Interrupt Transfer Block (ITB)
Logical Assignment Control Block
Partition Control Block (PCB)
Region Definition Block (RDB)
Status Control Block (SCB)
Snap Block
Task Control Codes
Task Control Block (TCB) And Status
Definitions
Task Header
Task Image File Label Block
Task Termination Notification Message
Codes
Unit Control Block (UCB)
Volume Control Block (VCB)
Window Definition Block (WDB)

8-31
8-32
8-34
8-36
8-37
8-38
8-39
8-40
8-41
8-41
8-43
8-44
8-46
8-47
8-47
8-49

a-so

8-51
8-51
8-56
8-56

CROSS-REFERENCES

9-1

9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9

EXECUTIVE MODULE TO ROUTINE CROSS-REFERENCE
RSX-llM EXECUTIVE GLOBAL CROSS-REFERENCE
MCRMU GLOBAL CROSS-REFERENCE
MCRMU SEGMENT CROSS-REFERENCE
SYS GLOBAL CROSS-REFERENCES
SYS SEGMENT CROSS-REFERENCES
BIGFCP GLOBAL CROSS REFERENCES
BIGFCP SEGMENT CROSS-REFERENCES
CONDITIONAL ASSEMBLY PARAMETER TO MODULE
CROSS-REFERENCE
MODULE TO CONDITIONAL ASSEMBLY PARAMETER
CROSS-REFERENCE

9-1
9-18
9-30
9-41
9-42
9-54
9-54
9-69

9.10

vii

9-69
9-75

CONTENTS
VOLUME II

Page
APPENDIX A
A.1
A.1.1
A.1.2
A.1.3
A.1. 4
A.1.5
A.1.6
A.1.7
A.1. 8
A.1.9
A.1.10
APPENDIX B
B.1
B.1.1
B.1.2
B.1. 3
B.1.4
B.1.5
B.1.6
B.1. 7
B.1.8
B.1. 9
B.1.10
B.1.11
APPENDIX c
C.1
C.1.1
C.1. 2
C.1.3
C. l. 4
C.1.5
C.1.6
C.1. 7
C.2
C.2.1
C.2.2
C.2.3
C.2.4
C.2.5
C.2.6
C.2.7

RSX-llM SUPPORTED DEVICES

A-1

RSX-llM DEVICE SUPPORT
Processors And Options
Card Readers
Co:rmnunications
Data Acquisition
Disk Devices
Laboratory/industrial Control
Printers
Tape Devices, Magnetic
Tape Devices, Paper
Terminals

A-1
A-1
A-2
A-2
A-2
A-3
A-3
A-4
A-4
A-5
A-5

CODING STANDARDS AND CONVENTIONS

B-1

CODING STANDARD INTRODUCTION
Line Format
Conunents
Naming Standards
Symbols
Program Modules
Formatting Standards
Program Source Files
Forbidden Instruction Usage
Reco:rmnended Coding Practice
PDP-11 Version Number Standard
Co-routines

B-1
B-1
B-1
B-2
B-3
B-5
B-9
B-11
B-11
B-12
B-12
B-14

MACRO EXPANSIONS

C-1

COMMAND STRING INTERPRETER MACRO EXPANSIONS
CSI$1 Macro
CSI$2 Macro
CSI$SW Macro
CSI$ND Macro
CSI$SV Macro
LDRO$ Macro
CSI$ Macro
DIRECTIVE MACRO EXPANSIONS
ABRT$C Macro
ABRT$S Macro
ABRT$ Macro
ALTP$C Macro
ALTP$S Macro
ALTP$ Macro
ALUN$C Macro

C-1
C-1
C-1
C-2
C-3
C-3
C-4
C-4

viii

c-s

C-5
C-6
C-6
C-6
C-7
C-7
C-8

CONTENTS (Cont. )

Page
c.2.a
C.2.9
c.2.10
C.2.11
c.2.12
C.2.13
C.2.14
C.2.15
C.2.16
C.2.17
C.2.18
C.2.19
C.2.20
C.2.21
c.2.22
C.2.23
C.2.24
C.2.25
C.2.26
C.2.27
C.2.28
C.2.29
C.2.30
C.2.31
C.2.32
C.2.33
C.2.34
C.2.35
C.2.36
C.2.37
C.2.38
C.2.39
C.2.40
C.2.41
C.2.42
C.2.43
C.2.44
C.2.45
C.2.46
C.2.47
C.2.48
C.2.49
C.2.50
C.2.51
C.2.52
C.2.53
C.2.54
C.2.55
C.2.56
C.2.57
C.2.58
C.2.59
C.2.60
C.2.61
C.2.62

c-a
C-9
c-10
c-10
c-10
C-11
C-11
C-12
C-13
C-13
C-14
C-14
C-15
C-15
C-15
C-16
C-16
C-17
C-17
C-18
C-18
C-19
C-19
C-19
C-20
c-20
C-20
C-21
C-21
c-21
C-22
C-22
c-22
C-23
C-23
C-24
C-24
C-24
C-25
C-25
C-25
C-26
C-26
C-27
C-27
C-28
C-29
C-29
C-30
C-30
C-31
C-32
C-32
C-32
C-33

ALUN$S Macro
ALUN$ Macro
ASTX$C Macro
ASTX$S Macro
ASTX$ Macro
CINT$C Macro
CINT$S Macro
CINT$ Macro
CLEF$C Macro
CLEF$$ Macro
CLEF$ Macro
CMKT$C Macro
CMKT$S Macro
CMKT$ Macro
CSRQ$C Macro
CSRQ$S Macro
CSRQ$ Macro
DECL$C Macro
DECL$S Macro
DECL$ Macro
DIR$ Macro
DSAR$C Macro
DSAR$S Macro
DSAR$ Macro
DSCP$C Macro
DSCP$S Macro
DSCP$ Macro
ENAR$C Macro
ENAR$S Macro
ENAR$ Macro
ENCP$C Macro
ENCP$S Macro
ENCP$ Macro
ERR$ Macro
EXIF$C Macro
EXIF$S Macro
EXIF$ Macro
EXIT$C Macro
EXIT$S Macro
EXIT$ Macro
EXTK$C Macro
EXTK$S Macro
EXTK$ Macro
GLUN$C Macro
GLUN$S Macro
GLUN$ Macro
GMCR$C Macro
GMCR$ Macro
GPRT$C Macro
GPRT$S Macro
GPRT$ Macro
GSSW$C Macro
GSSW$S Macro
GSSW$ Macro
GTIM$C Macro

CONTENTS (Cont.)

Page
C.2.63
C.2.64
C.2.65
C.2.66
C.2.67
C.2.68
C.2.69
C.2.70
C.2.71
c. 2. 72
C.2.73
C.2.74
C.2.75
C.2.76
C.2.77
C.2.78
C.2.79
C.2.80
C.2.81
C.2.82
C.2.83
C.2.84
C.2.85
C.2.86
C.2.87
C.2.88
C.2.89
C.2.90
C.2.91
C.2.92
C.2.93
C.2.94
C.2.95
C.2.96
C.2.97
C.2.98
C.2.99
c.2.100
C.2.101
c.2.102
C.2.103
C.2.104
C.2.105
c. 2.• 106
C.2.107
C.2.108
C.2.109
c.2.110
c.2.111
c.2.112
C.2.113
c.2.114
C.2.115
C.2.116
C.2.117

C-33
C-34
C-34
C-35
C-36
C-37
C-37
C-37
C-38
C-38
C-39
c-39
C-40
C-40
C-41
C-41
C-42
C-42
C-43
C-43
C-44
C-44
C-45
C-45
C-46
C-46
C-47
C-47
C-48
C-48
C-49
C-49
C-50
C-50
C-51
C-51
C-52
C-52
C-53
C-53
C-54
C-54
C-55
C-56
C-56
C-57
C-57
C-58
C-58
C-59
C-59
C-59
C-60
C-60
C-61

GTIM$S Macro
GTIM$ Macro
GTSK$C Macro
GTSK$S Macro
GTSK$ Macro
IHAR$C Macro
IHAR$S Macro
IHAR$ Macro
MOV$ Macro
MRKT$C Macro
MRKT$S Macro
MRKT$ Macro
MVB$ Macro
OFF$ Macro
QOPB$S Macro
QDPB$ Macro
QIO$C Macro
QIO$S Macro
QIO$ Macro
QIOW$C Macro
QIOW$S Macro
QIOW$ Macro
R50$ Macro
RCVO$C Macro
RCV0$S Macro
RCVO$ Macro
RCVX$C Macro
RCVX$S Macro
RCV.X$ Macro
ROAF$C Macro
RDAF$S Macro
ROAF$ Macro
RFA$ Macro
RQST$C Macro
RQST$S Macro
ROST$ Macro
RSUM$C Macro
RSUM$S Macro
RSUM$ Macro
RUN$C Macro
RUN$S Macro
RUN$ Macro
RVP$ Macro
SOAT$C Macro
SDAT$S Macro
SDAT$ Macro
SETF$C Macro
SETF$S Macro
SETF$ Macro
SFPA$C Macro
SFPA$S Macro
SFPA$ Macro
SPNO$C Macro
SPNO$S Macro
SPNO$ Macro

CONTENTS (Cont. )

Page
C.2.118
C.2.119
C.2.120
c.2.121
c.2.122
C.2.123
C.2.124
C.2.125
C.2.126
C.2.127
C.2.128
C.2.129
C.2.130
C.2.131
C.2.132
C.2.133
C.2.134
C.2.135
C.2.136
C.2.137
C.2.138
C.3
C.3.1
C.3.2
C.3.3
C.3.4
C.3.5
C.3.6
C.3.7
C.3.8
C.3.9
C.3.10
C.3.11
C.3.12
C.3.13
C.3.14
C.3.15
C.3.16
C.3.17
C.3.18
C.3.19
C.3.20
C.3.21
C.4
C.4.1
C.4.2
C.4.3
C.5
C.5.1
C.5.2
C.5.3
C.5.4
C.5.5
C.5.6
c.5.7

SPRA$C Macro
SPRA$S Macro
SPRA$ Macro
SROA$C Macro
SRDA$S Macro
SRDA$ Macro
SVDB$C Macro
SVDB$S Macro
SVOB$ Macro
SVTK$C Macro
SVTK$S Macro
SVTK$ Macro
WSIG$C Macro
WSIG$S Macro
WSIG$ Macro
WTL0$C Macro
WTLO$S Macro
WTLO$ Macro
WTSE$C Macro
WTSE$S Macro
WTSE$ Macro
EXECUTIVE MACRO EXPANSIONS
CALL Macro
CALLR Macro
CRASH Macro
DIRSV$ Macro
DRSTS Macro
GTUCB$ Macro
INTLB Macro
INTSE$ Macro
INTSV$ Macro
MFPS/MTPS Macros
RETURN Macro
SAVNR Macro
SCBLB Macro
SETO Macro
SOB Macro
STD Macro
STFPS Macro
STST Macro
SWSTK$ Macro
LDD Macro
LDFPS Macro
FILES-11 HEADER OFFSETS MACRO DEFINITIONS
FHD01$ Macro
FHDOF$ Macro
HMBOF$ And HMB01$ Macros
FILE CONTROL SERVICES MACRO EXPANSIONS
BDOFF$ Macro
CBYTE$ Macro
CLOSE$ Macro
CMOV$2 Macro
CMOV$B Macro
CMOV$W Macro
CWORD$ Macro

C-61
C-61
C-62
C-62
C-63
C-63
C-64
C-64
C-65
C-65
C-66
C-66
C-67
C-67
C-67
C-68
C-68
C-69
C-69
C-70
C-70
C-71
C-71
C-71
C-72
C-72
C-72
C-72
C-72
C-73
C-73
C-74
C-74
C-74
C-74
C-75
C-75
C-75
C-75
C-75
C-76
C-76
C-76
C-76
C-76
C-77
C-78
C-79
C-79
C-80
C-80
C-80
C-80
C-81
C-82

CONTENTS (Cont.)

Page
C.5.8
C.5.9
C.5.10
c. 5 .11
c.5.12
C.5.13
C.5.14
C.5.15
C.5.16
c.5.17
C.5.18
C.5.19
c.5.20
C.5.21
c.5.22
C.5.23
C.5.24
C.5.25
C.5.26
C.5.27
c.5.28
C.5.29
C.5.30
C.5.31

C.5.32
C.5.33
C.5.34
C.5.35
C.5.36
C.5.37

C.5.38
C.5.39
C.5.40
C.5.41
C.5.42
C.5.43
C.5.44
C.5.45
C.5.46
C.5.47

C.5.48
C.5.49
C.5.50
C.5.51
C.5.52
C.5.53
C.5.54
C.5.55
C.5.56
C.5.57
C.5.58

C.5.59
C.5.60
C.5.61
C.5.62

OEF$G Macro
DEF$I Macro
DEF$L Macro
DEF$N Macro
DEFIN$ Macro
OELET$ Macro
FCSBT$ Macro
FCSMC$ Macro
FDAT$A Macro
FDAT$R Macro
FDBDF$ Macro
FDBF$A Macro
FDBF$R Macro
FDBK$A Macro
FDBK$R Macro
FDBSZ$ Macro
FDOP$A Macro
FDOP$R Macro
FDRC$A Macro
FDRC$R Macro
FDOF$L Macro
FDOFF$ Macro
FDSOF$ Macro
FINIT$ and FSRSZ$ Macros
FSROF$ Macro
GET$ Macro
GET$R Macro
GET$S Macro
NBOF$L Macro
NBOFF$ Macro
NMBLK$ Macro
OPEN$ Macro
OPEN$A Macro
OPEN$M Macro
OPEN$R Macro
OPEN$U Macro
OPEN$W Macro
OPNS$A Macro
OPNS$M Macro
OPNS$R Macro
OPNS$U Macro
OPNS$W Macro
OPNT$D Macro
OPNT$W Macro
OFID$ Macro
OFID$A Macro
OFID$M Macro
OFID$R Macro
OFID$U Macro
OFID$W Macro
OFNB$ Macro
OFNB$A Macro
OFNB$M Macro
OFNB$R Macro
OFNB$U Macro

xii

C-81
C-81
C-81
C-82
, C-82
C-82
C-82
C-84
c-85
C-85

C-85
C-85
C-86
C-86
C-86

C-86
C-87

C-87
C-87
C-87

C-88
C-88
C-89
C-90
C-90

c-·91
C-91
C-91

C-91
C-92

C-92
C-93
C-93

C-93
C-93
C-94

C-94
C-94

C-94
C-94
C-94

C-95
C-95
C-95
C-95
C-95

C-96
C-96

C-96
C-97
C-97
C-97

C-97

CONTENTS (Cont. )

Page
C.5.63
C.5.64
C.5.65
C.5.66
C.5.67
C.5.68
C.5.69
C.5.70
c. 5. 71
C.6
C.6.1
C.7
C.7.1
C.7.2
C.7.3
C.7.4
C.7.5
C.7.6
C.7.7
C.7.8
C.7.9
C.7.10
C.7.11
C.7.12
C.7.13
C.7.14
C.7.15
C.8
C.8.1
C.8.2
C.8.3
c.8.4
C.8.5
C.8.6
C.8.7
C.8.8
C.8.9
C.8.10
C.8.11
C.8.12
C.8.13
C.8.14
C.8.15
C.8.16
C.8.17
C.8.18
C.8.19
C.8.20
C.9
C.9.1
C.9.2
C.9.3
C.9.4
C.9.5

OFNB$W Macro
PUT$ Macro
PUT$R Macro
PUT$S Macro
RAD50$ Macro
READ$ Macro
TRUNC$ Macro
WAIT$ Macro
WRITE$ Macro
NETWORK SYMBOL DEFINITION MACRO
COMDF$ Macro
PROGRAM LOGICAL ADDRESS SPACE EXTENSION
MACRO EXPANSIONS
ATRG$ , ATRG$C, and ATRG$S Macros
.BLK., • BLKB., and .BLKW • Macros
CRAW$ , CRAW$C , CRAW$S Macro
CRRG$ , CRRG$C , and CRRG$S Macros
DTRG$, DTRG$C, and DTRG$S Macros
ELAW$ ' ELAW$C I and ELAW$S Macros
GMCX$, GMCX$C, and GMCX$S Macros
GREG$, GREG$C, and GREG$S Macros
MAP$, MAP$C, MAP$S Macros
RDBBK$ Macro
RREF$, RREF$C, and RREF$S Macros
SREF$, SREF$C, and SREF$S Macros
SRRA$, SRRA$C, and SRRA$S Macros
UMAP$, UMAP$C, and UMAP$S Macros
WDBBK$ Macro
RELATIVE FILES MACROS - EXPANSIONS
RCLOS$ Macro
RFD BT$ Macro
RFIND$ Macro
RFOF$L Macro
RFOFF$ Macro
RGET$ Macro
ROPN$ Macro
ROPN$A Macro
ROPN$M Macro
ROPN$R Macro
ROPN$U Macro
ROPN$W Macro
ROPS$A Macro
ROPS$M Macro
ROPS$R Macro
ROPS$U Macro
ROPS$W Macro
RPORT$ Macro
RPRTC$ Macro
RPUT$ Macro
QIOMAC - QIOSYM MACRO DEFINITIONS
DRERR$ Macro
FILIO$ Macro
.IOER. Macro
IOERR$ Macro
.QIOE. Macro

xiii

C-97
C-97
C-98
C-98
C-98
C-99
C-99
C-99
c-99
C-100
c-100
C-101
c-101
c-102
c-102
C-103
C-104
C-104
C-105
C-105
C-106
C-107
C-107
C-108
C-109
C-109
c-110
c-110
c-110
c-110
C-111
C-111
C-111
c-112
c-112
c-112
c-112
C-113
C-113
C-113
C-113
C-113
C-113
C-114
C-114
C-114
C-114
C-114
C-115
C-115
C-116
C-117
C-117
C-120

CONTENTS (Cont. )
Page
C.9.6
C.9.7
C.9.8
C.9.9
C.10
c.10.1
c.10.2
C.10.3
C.11
C.11.1
c.11.2
C.11.3
C.11.4
c.12
c.12.1
C.13
C.13.1
APPENDIX D
D.1
APPENDIX E
E.l
E.2
E.3
E.3.1
E.3.2
APPENDIX F
F.l
F.2
F.3
F.4
F.5
F.6
F.7

QIOSY$ Macro
SPCIO$ Macro
UMDIO$ Macro
.WORD. Macro
SNAP CONTROL BLOCK AND SNAPSHOT DUMP MACROS
SNAP$ Macro
SNPBK$ Macro
SNPDF$ Macro
STATE AND KEYWORD TABLE GENERATION MACROS
!STAT$ Macro
MTRAN$ Macro
STATE$ Macro
TRAN$ Macro
SUBMIT FILE TO PRINT SPOOLER (PRT .•• )
MACRO (PRINT$)
PRINT$ Macro
SET/GET SYMBOL (TTSYM$) MACRO E~PANSIONS
TTSYM$ Macro

C-128
C-128
C-129
C-129

LISTING OF CONDITIONAL ASSEMBLY PARAMETERS

D-1

LISTING OF CONDITIONAL ASSEMBLY PARAMETERS

D-1

GENERAL :FAULT ISOLATION

E-1

INTRODUCTION
FAULT CLASSIFICATIONS
SERVICING FAULTS
Gathering Pertinent Fault Isolation Data
Tracing Faults

E-1
E-1
E-1
E-3
E-4

SYSTEM TUNING

F-1

HARDWARE CONSIDERATIONS
MEMORY LAYOUT
EXECUTIVE SOFTWARE OPTIONS
FILE SYSTEM OPTIONS
HELPFUL HINTS
SOME USEFUL COMMANDS
A USEFUL TOOL

F-1
F-1
F-2
F-3
F-4
F-5
F-8

INDEX

C-120
c-121
C-123
C-124
C-124
C-124
C-124
C-125
C-125
C-125
C-126
C-126
C-127

Index-1

FIGURES

FIGURE

1-1
1-2
2-1
2-2
2-3
2-4

Sample Unmapped 16K System Memory Layout
Example of a Mapped 124K RSX-llM System
Memory Management - Virtual to Logical
Address Space Relationship
Routines That Call $NXTSK
$ALCLK Logical Flow Diagram
$ALOCB Logical Flow Diagram

xiv

1-8
1-10
2-5
2-19
2-25
2-26

CONTENTS (Cont. )

Page
2-5
2-6
2-7
2-8

2-9
2-10
2-11
2-12
2-13
2-14

3-1
3-2
3-3

3-4
3-5
3-6

4-1
4-2

4-3
4-4
4-5
5-1
5-2
5-3
5-4
6-1
6-2
8-1
8-2
8-3
8-4
8-5
8-6

8-7
8-8
8-9
8-10

8-11
8-12
8-13
8-14
8-15
8-16

8-17
8-18
8-19

$CHKPT Logical Flow Diagram
$DECLK-$DEPKT-$DEACB Logical Flow Diagram
$FNDSP Logical Flow Diagram
$ICHKP Logical Flow Diagram
$NXTSK Logical Flow Diagram
$TSTCP Logical Flow Diagram
Loader Logical Flow Diagram
Shuffler Logical Flow Diagram
Partition Control Block
Task Control Block
INTSV$ Macro Expansion
Example of a Driver Using $INTSV
Example of Use of $DIRSV by the $EMTRP
Routine
Stack State Upon Entry into Directive
Processing
Example Driver Interrupt Routine
Interrupt Flow of Control
User Task in Unmapped System
4K Nonprivileged User Task Mapping in a
PDP-11/70
SK Nonprivileged User Task Mapping in a
PDP-11/70
SK Nonprivileged Task Mapping in a PDP-11/70
Using PLAS Directives
Privileged Task Mapping
MCR Tree Structure
Input Buff er
Function Table Entry
Parser Table Entry
Queue Directive Parameter Block
QIO Directive Processing
Linked Lists on RSX-llM
Overview of :RsX-llM System Control Blocks
Example of PCB Listings
Example of a Partition Wait Queue
Example of a PCB List for Checkpoint Files
Example of a System Task Directory (STD)
and Active Task List
Simplified User-Controlled Partition TCB,
Task Header, and PCB Relationship
TCB, Task Header, and PCB Relationships
in a System-Controlled Partition
Example of an AST Queue
The Loader Queue
Send/Receive Data Queue
Send/Receive by Reference Queue
The Clock Queue
The Fork Queue
Example of DCB, SCB, UCB, LCB Relationship
Logical Assignment Control Block (LCB) List
MCR Queues
Pre-allocated I/O Packet Queue
Task Termination Notification (TKTN) Queues

2-28
2-30
2-35
2-36
2-37
2-42
2-43
2-51
2-63
2-66
3-6
3-6
3-8
3-10
3-14
3-18
4-11
4-12
4-13

4-14
4-15
5-2
5-6
5-7
5-8
6-3
6-6
8-2
8-3
8-8
8-9

8-10
8-11
8-12
8-13

8-14
8-15
8-15
8-16

8-16
8-17
8-18
8-19
8-20
8-21
8-22

CONTENTS (Cont. )

Page
0-20
8-21
0-22
8-23
8-24

B-1
E-1
E-2
E-3

E-4
E-5

Dyn.amic Storage Region Free Block Queue
DHll Terminal I/O Data Structure
RKll Disk I/O Data Structure
I/O Data Structure for Two RKll Disk
Controllers
I/O Data Structure
Difference Among Global and Local
Symbols
Task Header on an Unmapped System
Task Header on a Mapped System
Stack Stl::-ucture: Internal SST Fault
Stack Structure: Abnormal SST Fault
Stack Structure: Data Items on Stack

xvi

8-23
8-24
8-25
8-25
8-27
B-3

E-5
E-5
E-6
E-7
E-8

PREFACE

MANUAL OBJECTIVES AND READER ASSUMPTIONS
This manual is intended for the experienced system programmer:
one
who is familiar with RSX-llM operation and has an acquaintance with
the RSX-llM Executive code.
The
manual
presents
information
tutorially.
However, the manual also contains a great deal of
cr~ss-reference information for very experienced programmers
who may
not need the tutorial information.
The System Logic Manual primarily discusses the Executive.
However,
cross-references for MCR and File Control Processor are also included.

PREREQUISITE MANUALS
The reader and user of this manual is expected
understood the contents of the following manuals:

have

read

and

Introduction to RSX-llM
IAS/RSX-11 MACR0-11 Reference Manual
RSX-llM Executive Reference Manual
RSX-llM Task Builder Reference Manual
RSX-llM Guide to Writing an I/O Driver
RSX-llM Operator's Procedures Manual
RSX-llM System Generation Manual

THE STRUCTURE OF THE LOGIC MANUAL
VOLUME 1
Chapter 1 - Introduction
Chapter 1 presents a general description of the RSX-llM V3.l
system for those who may need a fundamental introduction. This
chapter expands much of the material found in Introduction to
RSX-llM.

xvii

Chapter 2 - Memory Resource Allocation
Chapter 2 describes Memory Management and the important routines
that
allocate
memory
resources.
Specifically, Chapter 2
describes the Loader, the Shuffler,
$NXTSK,
$CHKPT,
and
associated routines~
Chapter 3 - Interrupt Processing
Chapter 3 describes Executive interrupt and fork processing. The
important interrupt routines are described. A figure along with
supporting text describes the code path followed by the interrupt
and fork routines that a sample driver uses.
Chapter 4 - Privileged Tasks
Chapter 4 describes the purpose of privileged tasks, their use
and the cautions concerning their use, the use of $SWSTK (switch
stack), and mapping for both privileged and nonprivileged tasks.
Chapter 5 - MCR Interface
Chapter 5 describes the function of the MCR interface, the MCR
Dispatcher, and how MCR processes a command line entered at a
terminal.
Chapter 6 - I/O Processing
Chapter 6 discusses the internal processing of the QIO directive.
Chapter 7 - Module Descriptions
Chapter 7 contains brief descriptions of the modules that make up
the Executive. Entry points, inputs, outputs, and exit status of
the modules are also described.
Chapter 8 - Data Areas and Control Blocks
Chapter 8 contains figures that show various system linkages in a
generalized form.
Important functions of the Device Control
Block, Unit Control Block, and Status Control Block are also
discussed. Also shown are all the bit definitions for the system
control blocks.
Chapter 9 - Cross-references
Chapter 9 contains important cross-references, created by the
CREF program, that you can use to find your way through the
system listings. The references include:
For the Executive:
•

Module-to-routine cross-references

•

Symbol-to-module cross-references

For MCRMU (multiuser MCR):
•

Symbol-to-module cross-references
CREF program)

•

MCRMU segment cross-references

•

SYS symbol-to-module cross-references

•

SYS segment cross-references

xviii

(created

the

For the File Control Processor (BIGFCP) :
•

Symbol-to-module cross-references

•

BIGFCP segment cross-reference

Chapter 9 also contains cross-references between
Executive
modules and conditional assembly parameters that these modules
contain.
VOLUME 2
Appendix A - RSX-llM Supported Devices
Appendix A contains a list of devices supported by RSX-llM V3.l.
Appendix B - Coding Standards and Conventions
Appendix B contains an explanation of the coding standards and
conventions that RSX-llM follows. Appendix B also describes the
Executive's use of co-routines by
explaining
an
example
co-routine from Executive code.
Appendix C - Macro Expansions
Appendix C contains the expansions of all the macros used in
system code.

the

Appendix D - Listing of Conditional Assembly Parameters·
Appendix D lists all the conditional assembly parameters
their meanings.

and

Appendix E - General Fault Isolation
Appendix E contains a generalized
isolation for RSX-llM.

approach

Appendix F - System Tuning
Appendix F contains many ideas
system performance.

can

xix

that

help

program

you

fault

improve

CHAPTER l

INTRODUCTION TO THE RSX-llM V3.1 OPERATING SYSTEM EXECUTIVE

This introduction is a tutorial for those who are beginning to learn
the RSX-llM Executive internal logic. However, this manual assumes
that you have at least read and understood the RSX-llM Introduction,
the RSX-llM Operator's Procedures Manual, the RSX-llM Task Builder
Reference Manual, and the RSX-llM System Generation Manual.
If you
are familiar with the RSX-llM Executive or you are an experienced
system programmer, you may want to begin this manual with Chapter 2,
which assumes that you have a basic knowledge of the Executive and
describes the memory structures of RSX-llM.

1.1

RSX-llM SYSTEM

RSX-llM is a real-time operating system.
This means that RSX-llM
responds quickly to input conditions or input data. RSX-llM is also a
multiprogramming system. This combination allows real-time activity
(for example, process control) to occur along with program development
(interactive te~minals) and other user jobs. At one extreme, RSX-llM
can be a dedicated process control system, and at the other, a system
for developing and running applications programs.

1.2

SYSTEM GENERATION

RSX-llM offers a wide range of services and utilities from which to
choose.
Each installation selects from these options to shape its
version of RSX-llM according to the processor and
peripherals
available and the purpose of the system.
You perform a system
generation (SYSGEN) process to select these options.
Every installation intitially receives
an
RSX-llM
system
on
distribution media.
You run this system and use its resources to
generate a target system configured to your installation's needs.
System generation is done in two phases.
During the first phase
SYSGEN defines and assembles the Executive (the kernel or "brain" of
the operating system that responds to external requests) by conducting
a dialogue with you.
Query programs pose questions at a terminal.
Your answers to the auestions determine the Executive service options,
processor options, and peripheral devices to be incorporated into the
system. During the second phase, SYSGEN builds the Executive,
allows
you to define memory structures called partitions, and builds and
installs the system programs.
You complete the SYSGEN process by saving and bootstrapping the new
system.
Saving a system means writing the image of an RSX-llM system
that has been resident in main memory into the system image file from

1-1

INTRODUCTION TO TBE RSX-llM V3.l OPBRATIRG SYSTEM EXECUTIVE
which it was bootstrapped. You do this with the Save command, which
saves the image to allow a hardware bootstrap or the Boot command to
later reload and restart the system.
You bootstrap (boot) a system by either using the switches on the
processo.r control panel or using the Boot command. The Boot command
bootstraps a system that exists as a system image file on a Files-11
(the RSX-llM file structure) volume. The Boot command immediately
terminates the system in operation and starts another.
The Save
command, the Boot command, and the process of booting a system with
the switches are all described in the RSX-llM Operator's Procedures
Manual.
To change either the hardware or software configuration of an
installation, you must perform another system generation~ The RSX-llM
System Generation Manual describes the system generation process in
detail.

1.3

MAJOR COMPONENTS OF RSX-llM

RSX-llM requires
components:

1.4

the

organized

interaction

the

following

•

Memory resource management. Memory is the processor storage
medium in which loaded user programs, the Executive , and
control blocks of data reside. Much of the Executive's work
involves memory resource management and control.

•

Task scheduling and processing.
Tasks are system or user
programs that perform needed functions and manipulate data to
achieve some goal. The Executive controls task processing and
handles specific requests issued by the tasks~

•

Interrupt processing. The Executive processes synchronous and
asynchronous events that occur as a result of task processing.
Examples of these events include software
errors,
I/O
completion, illegal instructions, and power failure.

MEMORY

1.4.l

Memory Partitions

A partition is a continuous area of memory in which executable
programs called tasks can be run. The typical memory organization
consists of an area for the Executive and areas for system- or usercontrolled partitions. A partition has the following characteristics:
•

A name

•

A defined size

•

A fixed base address

•

A defined type

1-2

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
1.4.2

Partitions In Mapped And Unmapped Systems

RSX-llM runs on almost all models of the PDP-11 processor. The PDP-11
addressing scheme allows a program to address directly only 32K words
of memory. For larger memories, DIGITAL has a KT-11 Memory Management
Unit
(hardware)
available for all models of the PDP-11 except the
PDP-11/03/04/05/10/20 processors. The KTll Memory Management Unit
associates addresses expressed in programs ("virtual" addresses in the
range 0 to 32K) with actual locations in
memory
("physical"
addresses).
Physical addresses c~n range from Oto 124K words on all
processors other than the PDP-11/70.
Physical addresses on
a
PDP-11/70 can range from 0 to l920K words.
Mapping is the process that associates virtual addresses with physical
addresses.
Therefore, a PDP-11 system that includes a KTll Memory
Management Unit is called a mapped system.
Conversely, systems
without a KTll are called unmapped systems. In a mapped system, a
task can be installed in any system partition or user partition large
enough to contain it.
In an unmapped system, the task is bound to
physical memory and must be installed in the partition that starts at
the same memory address as the partition for which it was built.
Whether a system is mapped or unmapped affects the way in which you
create tasks. Before a compiled program (object code) can be run, it
must be processed by the Task Builder program (linker).
The Task
Builder produces a task image that runs in a memory partition.
If a system is unmapped, you must specify to the Task Builder the base
address of the partition in which the task is to be run. You cannot
run the resulting task in a partition that has a base address
different from the address you specified to the Task Builder.
In a mapped system, however, every task (other than a privileged task
mapped
into the Executive)
has a virtual base address of O.
Transparently to the user, the KTll maps the virtual addresses of a
task to the actual physical addresses in which the task resides. A
task in a mapped system can therefore run in any partition large
enough to contain it.
You need not rebuild nonprivileged tasks in a mapped system when
true because
physical
partition
boundaries
move.
This
is
nonprivileged, tasks on a mapped system run at a virtual base address
of O, rather than at a physical base address.
If you move the symbols that are referenced in the code, you must
rebuild privileged tasks in either system because they are linked to
the Executive symbol table file.
You may be required to rebuild
nonprivileged tasks only if you change any of the task's attributes
such as checkpointability. The task's attributes can be changed when
you use the Install command to install the task. You use the Task
Builder to establish the attributes when building a task. Consult the
RSX-llM Task Builder Reference Manual for a comprehensive discussion
of task attributes and associated Task Builder switches.
See the
RSX-llM Operator's Procedures Manual for a description of the Install
command.

1.4.3

Partition Types

RSX-llM supports two types of partitions in which tasks can execute:
l.

System-controlled

User-controlled
1-3

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
In a system-controlled partition, the Executive allocates available
space to accomodate as many tasks as possible at any one time. This
allocation may involve shuffling resident tasks to arrange available
space into a continuous block large enough to contain a requested
task. The Shuffler, which is a privileged task and a SYSGEN option,
sh~f f les
the tasks and memory space to make th~ needed space for the
requested task.
Only mapped systems
support
system-controlled
partitions.
A user-contrplled partition is exclusively allocated to one task at a
time.
Both mapped and unmapped systems support this type of
partition.

1.4.4

Subpartitions

You can subdivide a user-controlled partition into as many as seven
nonoverlapping subpartitions.
Like its parent main partition, a
subpartition can contain only one task at a time.
Because the
subpartitions occupy the same physical memory as the main partition,
tasks cannot be simultaneously resident in both the main partition and
one of its subpartitions.
However, because each subpartition can
contain a task, up to seven tasks can potentially run in parallel
within a main partition.
The purpose of subpartitioning is to reclaim large memory areas in
unmapped systems. For example, when a large task that requires a main
partition is either no longer active or can be checkpointed (written
out
to
a
disk
to make room for a higher priority task),
subpartitioning allows a number of smaller tasks to use the partition
space.

Memory Structure

1.4.5

RSX-llM memory in a typical system can be divided into
parts:
•

the

following

The Executive, which consists of:
- Trap vectors. The trap vector area contains the hardware
and interrupt vectors;
it requires 128 words. During
SYSGEN, you can expand this area to 256 words.
- System stack. The system stack area is an internal storage
area for Executive use. The Executive uses it for nesting
interrupts, saving registers and data, and internal calls.
The stack requires 60 to 110 words depending upon options
selected at system generation time.
- System common data. This area contains system pointers that
are filled in during system generation and used by the
Executive and privileged tasks during execution.
- The Executive code. The Executive coordinates and manages
system resources and processes specialized system functions.
System generation options determine the size and abilities
of the Executive.

1-4

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
- Dynamic Storage Region (DSR).
The Executive continually
uses temporary storage in memory. The Executive acquires,
uses, and then returns the memory that it used to the
available memory pool. If a given Executive service routine
requests dynamic storage and it is
unavailable,
the
Executive informs the user task, which usually waits for
some memory to become available. The size of this region is
important.
If it is too small, long waiting periods or
system deadlocks can occur. If it is too large, fewer tasks
can fit into the remaining memory. The size of the region
is a system generation parameter.
You can extend the initial allocation of dynamic storage on
line by issuing the MCR command, Set /Pool, from the
console. However, the use 0£ this command is limited in
that this expansion can occur only into space that is not
being used. This space, if it exists, is between the
Dynamic Storage Region space and the first partition of
memory.
•

Device drivers:
You can include three
SYSGEN: •

drivers

the

Executive

during

A disk driver

A cassette, DECtape, magtape, line printer, or floppy disk
driver

A terminal driver

In general, Executives larger than SK contain additional
resident drivers which you include during system generation.
Some drivers can be made loadable; that is, they reside on
disk and are loaded into memory when they are needed.
Therefore, loadable drivers save memory space because they
occupy memory only when needed and they do not occupy
Executive virtual address space.
•

Loader:
The Loader is a task that runs in its own partition, which is
resident in the Executive. Thus, it can run in parallel with
system and user tasks.
The Loader,
which
is
device
independent:

Loads tasks upon initial load requests

Writes checkpointable tasks to disk
checkpointing, in this chapter)

Reloads previously checkpointed tasks when memory becomes
available, allowing them to actively compete for processor
resources.

when

required

(see

MCR and TKTN tasks:
- The Monitor Console Routine (MCR) processes system commands
that you enter at a terminal. These commands are directed
to the MCR processor.
MCR either executes the commands
itself, or activates a system or user-written task that can
service the commands.

1-5

INTRODUCTION TO TBE RS:X-llM V3.l OPERATING SYSTEM EXECUTIVE
- The Task Termination Notification Task (TKTN)
functions:
·

performs

two

It prints out messages and tries to print the contents
of the registers of a task that has been aborted due to
an error.

It prints out messages for device drivers.

Ideally, TKTN runs either in a partition in which all tasks
are checkpointable or execute quickly, or in its own
partition. The reason for this is that TKTN must be in
memory in order to print messages.
If TKTN cannot get
memory space to execute, the Executive queues up messages to
TKTN, thereby using up Dynamic Storage Region space. It is
conceivable that all the Dynamic Storage Region could be
used up for this purpose~
this would cause the system to
hang up.
•

The file system:
Files-11 is a system of formatting files that are held on
volumes. Files-11 volumes are magnetic media (tapes or disks)
that have been specially formatted by the MCR command,
Initialize Volume.
Volumes that are not properly formatted
are considered to be "foreign." RSX-llM includes a file
exchange utility that translates files in DIGITAL's DOS or
RT-11 format into Files-11 format.
Your tasks that run on RSX-llM access data within files on
Files-11 volumes through the use of two sets of subroutines:
•

File Control Services (FCS)

•

Record Management Services (RMS)

Both FCS and RMS provide the ability for your tasks to perform
record- or block-I/O operations on Files-11 volumes. FCS and
RMS are system interfaces between the I/O programs that you
write and the files on the Files-11 volumes that you want to
access. These interfaces provide device independence and
allow you to take advantage of different methods of file
organization.
FCS imposes a single logical organization on your files. This
logical
organization
is
called
the
seouential
file
organization and FCS imposes it on all files -regardless of
medium.
In contrast to FCS, RMS provides three
sequential, relative, and indexed.

file

organizations

The MACR0-11 I/O programming that you do differs between FCS
or RMS. Therefore, you must become familiar with the contents
of the manuals that describe each one. The respective manuals
are:
For FCS:
•

IAS/RSX-11 I/O Operations Reference Manual

•

RSX-llM I/O Drivers Reference Manual

1-6

INTRODUCTION TO TBE RSX-UM V3.-l OPERATING SYSTEM EXECUTIVE
For RMS:
•

Introduction to RMS-11

•

IAS/RSX-llM RMS-11 MACRO Programmer's Reference Manual

The Files-11 Ancillary Control Processor (FllACP) is a group
of Executive subroutines that process and control the I/O
control structures and devices for RMS or FCS. The Executive,
FCS,
and
RMS
use FllACP;
however, its operation is
transparent to you.
FllACP is available in three versions. The first and smallest
(FCPNMH.TSK) requires 2K of memory. FCPNMH does not support
multi-header files or RMS record blocking.
The
second
(FCP.TSK)
requires
2.SK of memory.
The third version
(BIGFCP.TSK) requires from 4.SK to SK of memory.
You select
these versions during SYSGEN. The RSX-llM System Generation
Manual fully describes these versions, the reasons for their
use, and the methods of installation.
•

The print spooler:
The print spooler task (PRT) speeds up the operation of
MACR0-11, the Task Builder, and compilers because they do not
have to wait for I/O to complete on the relatively slow line
printer.
Instead, the listing files are written to a disk.
Subsequently, PRT prints the files as they appear in a queue.
Any task that uses the line printer to print files may use the
print
spooler.
For
example,
the
RSX-llM Peripheral
Interchange Program (PIP) can optionally use the PRT task to
print files.

•

User task partitions
User tasks run in the rema1n1n9 memory in the
memory
structure.
The partitions and tasks can be configured to the
system user's requirements.

1.4.6

Example Of A 16K Unmapped System

Figure 1-1 illustrates the memory layout of a sample 16K unmapped
system.
The Executive region, which requires SK, consists of the
Executive and the user-controlled main partition named SYSPAR.
This
partition contains the file system (FCPNMH), the Monitor Console
Routine (MCR) , and the Task Termination Notification routine (TKTN) •
The file system is checkpointable and has a lower priority than MCR or
TKTN. Therefore, if the file system is running and a system user
requests MCR, the Executive checkpoints the file system and loads and
starts MCR.

1-7

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE

BYTES
100000(8)

WORDS
16K

SUBA

PAR8K -- USER-CONTROLLED
MAIN PARTITION WITH 3
SUB-PARTITIONS

SUBB

SUBC

40000(8)
USER-CONTf30LLED PARTITION:
FCPNMH - FILE SYSTEM
MCR - MONITOR CONSOLE ROUTINE
TKTN -TASK TERMINATION NOTIFICATION ROUTINE

SYSPAR

30100(8)
OSR

DYNAMIC STORAGE REGION

----------~OSK PAR

SYSTEM DISK DRIVER

SECPAR

LINE PRINTER AND DEVICE DRIVERS

SYSTEM TABLES (SYSTB)
EXECUTIVE CODE
TASK LOADER
SYSTEM COMMON DATA
SYSTEM STACK
TRAP VECTORS

EXECUTIVE

Figure 1-1

Sample Unmapped 16K System Memory Layout

1-8

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
The user area contains a user-controlled main partition named PAR8K,
SK in length. PARSK contains three subpartitions, named SUBA, SUBB,
and SUBC. Language processors and the Task Builder use the SK
partition for program preparation. These programs usually have a low
priority and may be checkpointable.
The three subpartitions are available for real-time tasks.
the main partition is checkpointed if:
•

It is checkpointable

•

Another higher
subparition

priority

task

needs

the

A task

partition,

If tasks occupy the partitions SUBA, SUBB, SUBC, and SYSPAR and the
tasks are ready to run, the Executive gives CPU resources to the task
with highest priority.

1.4.7

Example Of A Mapped 124K-~ord RSX-llM System

Figure 1-2 is an example of a large mapped system.
Besides the Executive, the system contains DRVPAR, which is a
system-controlled partition for loadable device drivers including the
terminal driver. Loadable drivers residing on a disk are loaded by a
user command when they are needed.
SYSPAR is a 2K user-controlled partition that contains the Monitor
Console Routine Multi-user (MCRMU) task, TKTN, and the Shuffler task.
The Shuffler is discussed later in this chapter.
FCPPAR is a 6K p~rtition for the primary file coRtrol system, BIGFCP.
The GK size is sufficient to allocate approximately 50 file control
blocks (FCBs) •
All other tasks run in the system-controlled GEN partition.

1-9

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE

WORDS
124K

BYTES
400000(8)

SYSTEM CONTROLLED
GENERAL PARTITION
(GEN)

USER TASKS

200000(8)

32K

FILE SYSTEM PARTITION BIG FILE SYSTEM (BIGFCPI

FCPPAR

·-

26K

150000(8)
LOADABLE DRIVERS

DRVPAR
22K

130000(81

SYSPAR

120000(81

20K

EXECUTIVE PARTITION AREA MCRMU, TKTN, AND SHUFFLER
DYNAMIC STORAGE REGION
(TYPICALLY 4K - 6KI

DSR

.... - - -- --- ---TASK LOADER
SYSTEM TABLES
EXECUTIVE CODE
SYSTEM COMMON DATA
SYSTEM STACK
TRAP VECTORS

Figure 1-2

Example of a Mapped 124K RSX-llM System

1-10

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
1.5

TASK PROCESSING

To make a task known to the Executive, you install it.·
When you
install a task (by issuing the Install command: see the RSX-llM
Operator's Procedures Manual), the system records a number of task
parameters in a system-resident table called the System Task Directory
(STD). The recorded parameters include the name and size of the task,
the disk address at which the task's image starts, and the address of
the Partition Control Block (PCB) of the partition in which the task
is to run.

1.5.1

Task States

An installed task is defined as a task that has an entry in the STD.
It is neither resident in memory nor competing for system resources.
The Executive considers it to be dormant until a running task or a
command issued from a terminal requests the Executive to activate it.
The Executive therefore recognizes two task states:
•

Dormant. A dormant task is one that has been installed
an entry in the STD) , but has not been requested to run.

(has

•

Active. An active task is an installed task that has been
requested to run. It remains active until it exits, or gets
aborted. It then returns to the dormant state.
An active task can be in one of two substates, ready-to-run or
blocked.
1.

Ready-to-run. A ready-to-run task competes with other
The
tasks for CPU time on the basis of priority.
ready-to-run task having the highest priority obtains CPU
time and thus becomes the current task.

Blocked. A blocked task is unable to compete for CPU time
for synchronization reasons or because a needed resource
is not available.

The distinction between dormant tasks and active tasks is important in
a real-time system. A dormant task uses little memory: and yet when
the task is needed to service a real-time event, the Executive can
quickly and efficiently introduce it into active competition for
system resources. An installed task's STD entry enables this quick
response because it contains all the parameters the system needs to
retrieve the requested task.
Note that the number of installed,
dormant tasks ·can, and usually will, far exceed the number of active
tasks.
When the Executive receives a request to activate
nonresident task, it performs a series of actions:

dormant

•

It allocates the required memory resources on the basis of the
task's priority.

•

It brings the task into memory.

•

It places the task in active competition for system
with other resident tasks.

resources

If tasks fully occupy the partition in which a task is installed and
no resident task can be checkpointed (see Checkpointing in this
chapter), the task is placed in a queue by priority with other

1-11

INTRODUCTION TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
activated tasks,
partition.

1.5.2

each

waiting

for space to become available in its

Fixed Tasks

A task can be loa<led and locked into its partition. Such a task is
called a fixed task·.
The Fix command (see the RSX-llM Operator's
Procedures Manual) allows you to fix a task in memory. The Executive
services subsequent requests to run the task more quickly because the
task is resident in memory and does not have to be loaded from the
disk before it can run. The system can fix a task in memory only when
the partition in which it is to be fixed becomes available.
Fixed tasks remain physici!lly in memory even after they finish
execution. Therefore, the Executive does not have to reload them when
they are again requested to run. However, tasks that can be fixed in
memory must have re-entrant code if it is to be reused by another
program or system user. Re·-entrant code must be used because the task
cannot be allowed to change its own internal data base if another
program uses it. Only an Unfix or Remove command can free the memory
that the task occupies.
NOTE
See the RSX-_l_l_M...__o.....,,,.p_e_r_a_t_o_r~'-s..__P_r_o~c-e_d_u_r_e_s_
Manual for the Fix, Unfix, and Remove
commands.
The following restrictions apply to tasks that
memory:

1.5.3

•

You must first install the task.

•

You cannot fix an active task.

•

You cannot fix a checkpointable task.

you

want

fix

Priority

Active tasks compete for system resources on the basis of their
relative priorities. The Executive gives control of the processor to
the active task that has the highest priority and that also has access
to all the other resources it needs. When this task becomes blocked
(while waiting for I/Oto complete, for example), the Executive looks
for another task to use the processor. The chosen task is again the
one that has the highest priority and has access to all the resources
it needs.
You initially assign a default priority to a task when you task-build
it.
This priority is a number between 1 and 250 (decimal)~ higher
numbers indicate higher priority. Later, you can change the priority
when you install the task;
or the system can change the priority
while the task is running (see Swapping).
In an RSX-llM installation that mixes real-time applications with less
urgent work, higher priority numbers should be assigned to the
real-time tasks. This assignment ensures that the Executive gives
processor time to the real-time tasks ahead of the others. Text

1-12

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
editors are an example of real-time tasks, because they must respond
within a short time period. Text editors, commonly used for program
development or text processing, spend a large part of their time
waiting for terminal I/O to complete and are therefore out of
competition for processor time. However, when the I/O operation ends,
the terminal needs a rapid response. To get the higher response, the
installation system manager can assign to text editors a higher
priority than that of more processor bound tasks like the Task Builder
or Assembler.
·

1.5.3.1 Establishing Task Priority - You can establish task priority
when you use the Task Builder to build a task from an object module.
See the RSX-llM Task Builder Reference Manual for a description of the
priority option.

1.5.3.2 Installed Priority - When you install a task using the
Install command, you can specify a priority different from the one
that you specified when you built the· task. The priority specified in
the Install command overrides the priority that was specified for the
task in the Task Builder command.
See the RSX-llM Operator's
Procedures Manual for a complete description of the Install command.

1.5.3.3 Altering Priority - You may want to alter a task's priority
after it is installed.
The Alter command provides a way to change
priority. With the Alter command you can change the task's static
installed priority or change the task's running priority. However,
you can make these changes only if the system supports the Alter
Priority directive. See the RSX-llM Operator's Procedures Manual for
a complete description of the Alter command.

1.5.4

Round-robin Scheduling

When numerous competing memory-resident tasks have equal priorities,
the Executive tends to give processor time more often to those tasks
that appear first in the System Task Directory (STD) queue.
Entries
with equal priorities normally appear in the STD in the order in which
the tasks were installed. Therefore, the Executive favors tasks that
were installed first.
To avoid this problem, RSX-llM provides a
system generation option called round-robin scheduling.
Round-robin
scheduling uses an algorithm that periodically rotates the execution
of tasks of equal priority in the STD. The overall effect is that
processor
time
is distributed more evenly among tasks.
Each
equal-priority task has its turn toward the head of the STD queue.

1.5.5

Checkpointing

In a programming system where many tasks of equal or different
priorities are competing for memory space and system resources, the
Executive must have a method of distributing processor usage and
resources to all the tasks.
The RSX-llM Executive uses a process
called checkpointing to allocate system resources among tasks. ·The
Executive uses task priority as the basis for the checkpointing
scheme.

1-13

INTRODUCTION TO THE R:;x-llM V3.l OPERATING SYSTEM EXECUTIVE
In some instances, an actiVf! task cannot get into memory and compete
for processor resources because the partition in which it was
installed is fully occupied. If the partition contains a task that
has a lower priority and is checkpointable, the Executive moves that
task out of memory and writes it on a disk to make room for the higher
priority task. When the high priority task is finished, the Executive
reloads the low priority task, which is now on the disk, to allow it
to continue processing from the point at which it was interrupted.
This roll-out, roll-in process is called checkpointing.
RSX-llM
supports
checkpointing
in
both
user-controlled
and
system-controlled partitions. The objective is to avoid preempting a
lower priority task, unless a higher priority task can be brought in
to make use of the freed memory. This optimizes the use of system
resources while maintaining a priority scheduling discipline.

1.5.5.1 Disk Space for Checkpointing - To
checkpoint
a
task,
checkpoint space equal to the size of the partition that contains the
task must be available on disk.
(Checkpoint space contains the
checkpointed task while a higher priority task executes.) You can
allocate checkpoint space eithe~ statically when building the task, or
dynamically at run time. You can use both kinds of checkpointing to
balance the advantages and disadvantages of the different allocation
methods.
When you use the Task Builder to create a task from an object module,
you can request checkpoint space allocation in the task image file on
the disk~
this is the same disk as the one on which the task resides.
The task image file is the executable task on the disk. While the
task is running, its checkpoint space is always allocated on disk,
whether or not the Executive actually checkpoints the task.
You can use disk space more efficiently if you allocate checkpoint
space dynamically. Instead of reserving disk space equal to the size
of each checkpointable task, you can create one or more checkpoint
files on disk to contain all checkpointed tasks. The size of the
files depends on an estimation of the checkpoint space required at any
given time.
When the system allocates checkpoint space dynamically,
tasks need not be built as checkpointable. Instead, you decide if a
task can be checkpointed when the task is installed. You create a
checkpoint file, independent of individual tasks, by issuing the ACS
(Allocate Checkpoint Space) command from the terminal. Then, when the
Executive needs to checkpoint a task, it writes the task out into the
available space in the checkpoint file.
A drawback to dynamic
allocation of checkpoint space is that space in a checkpoint file may,
at times, be filled. However, system performance may be improved if
the checkpoint file is on a fast disk.
See the RSX-llM Operator's Procedures
Checkpoint Space (ACS) command.

1.5.6

Manual

for

the

Allocate

Task Swapping

The Executive must deal with the situation that occurs when several
active tasks with equal priorities compete for partition space in
memory. A task cannot normally cause the Executive to checkpoint
another task with the same priority.
Therefore, a task of eaual
priority cannot get into memory.
The Executive includes a task
swapping algorithm that uses checkpointing to allow tasks of equal
priority to successfully compete for memory.

1-14

INTRODUCTION TO THE RSX-llM VJ.1 OPERATING SYSTEM EXECUTIVE
Swapping is a variation of checkpointing that enables the Executive to
checkpoint tasks with equal priorities in and out of memory. Swapping
does not work, of course, unless the tasks are checkpointable.
When
an eligible task begins to.run, the Executive adds a number to the
task's normal running priority. This number is called the swapping
priority and is used for swapping only. The old running priority
still exists. As the task runs, the Executive decrements the swapping
priority.
Eventually, the sum of the decremented swapping priority
and the task's running priority causes the running task to have a
priority (for swapping) less than. that of a competing task. When this
occurs, the Executive checkpoints the running task to make room for
the competing task. The Executive then places the checkpointed task
in the queue of active tasks that are competing for memory.
The
swapping priority does not affect task scheduling or I/O dispatching,
which are governed solely by the task's running priority.

1.5.7

The Shuffler Task

In trying to accommodate the execution of as many tasks as possible,
the Executive moves tasks in and out of memory depending up~n
available space, priority, etc.
This operation can result
in
fragmented memory, a situation in which many small tasks occupy memory
with unused spaces in between. Taken individually, these spaces may
not be large enough to allow large tasks to be loaded and executed.
The Shuffler task, a system generation option, solves this problem by
performing memory compaction in a system-controlled partition.
The Shuffler starts at the beginning of the
system-controlled
partition and tries to move (shuffle) all tasks that are sitting above
a gap of free space down to the base of the free space.
When
possible,
it also checkpoints any tasks that it encounters that are
waiting for terminal input.
If there are some tasks still actively competing for memory in the
partition, the Shuffler creates an ascending, priority-ordered list of
the tasks in the partition. If the sum of the free space now in the
partition and the space occupied by the low priority, checkpointable
tasks in the partition is enough to allow the waiting task to run, the
Shuffler checkpoints the lower priority tasks. The Shuffler then
compacts memory again to make room for the waiting task.

•

The foregoing Shuffler action should result in all free space being at
the top of the partition.
However, there may be additional holes
below tasks because some things
(drivers aAd regions) cannot be
shuffled. These additional holes cannot be reclaimed.

1.5.8

Extended Logical Address Space

An RSX-llM task specifies an address in a 16-bit word.
The largest
address that can be expressed in a 16-bit word is 65,536 bytes or
32,768 words (commonly referred to as 32K words). To avoid limiting
the effective size of a task to only 32K words, a task can use
overlays that you define when you use the Task Builder to build the
task.
Another option is that the task can use memory management
directives to access greater amounts of memory.

1-15

INTRODUCTION TO TSE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
1.5.8.1 Overlays - An overlaid. task has parts called segments.
The
segments are the parts that overlay one another. The segments are
also sometimes called overlays. The root segment, which is always in
memory and never overlaid, and one or more overlay segments compose an
overlaid task. The overlay segments can be read into memory as
required.
However, all the segments in memory at one time cannot
exceed 32K words.
See the RSX-llM Task Builder
description of overlay segments.

Reference

Manual

for

complete

1.5.8.2 Memory Management Directives - Memory management directives
allow task segments residE~nt in memory to access more than 32K words
of physical memory. The memory management directives, a subset of the
Executive directives, use the KTll hardware to map task addresses to
different logical areas within the task. Instead of displacing task
segments in memory, the task can reside entirely in memory and map its
virtual addresses to different physical addresses.
RSX-llM defines three kinds of address space:
•

Physical address space. Physical address space consists
the physical memory in which tasks reside and execute.

•

Logical address space. Logical address space is the total
amount of physical address space to which the task has access
rights.

•

Virtual address space. Virtual address space corresponds to
the 32K of addresses that the task can explicitly specify in a
16-bit word.
If a task does not use memory management
directives, its logical and virtual address spaces directly
correspond one to the other. However, if the task uses these
directives, it can map its virtual addresses to different
parts of its logical address space.
The net effect is to
allow a task's logical address space to exceed 32K.

The memory management directives also allow a task to
expand
dynamically its logical address space. In other words, a task can
access logical areas that are not part of its static task image (the
executable task produced by the Task Builder). A task can issue
directives that create a new region of logical space and then map a
range of virtual addresses to the newly created region. A task can
also map its virtual addresses to logical areas that belong to another
task.
The mapped area then becomes part of the former task's logical
address space.
The ability to create and map to a new region allows tasks to
communicate with one another by means of shared regions. For example,
at run time a task can create a new region of logical space, into
which it writes a large amount of data. Any number of tasks can then
access that data by mapping a range of their virtual addresses to the
region. Another benefit of mapping to different regions is an ability
to use a greater number of common routines.
Tasks can map to the
required routines at run time, rather than link to them when the tasks
are built by the Task Builder.

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INTRODUCTION TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
1.6

RSX-llM INTERRUPT PROCESSING

The RSX-llM system recognizes two kinds of hardware interrupts:
processor traps and external interrupts~
Processor traps occur
synchronously1 that is, the same sequence of instructions causes the
same processor trap to occur at the same place and time in the
program. Processor traps usually have a cause originating from within
the processor.
See Processor Traps, in this chapter, for the causes
of processor traps. External interrupts, which are usually caused by
I/O devices, are asynchronous in that they may occur anywhere or at
any time in the program's execution.
Programs that use input and output routines would spend most of their
time waiting for I/O devices to complete their operations if it were
not for the program interrupt facility of RSX-llM.
The program
interrupt facility allows asynchronous events, such as I/O completion,
to interrupt the running program so that a routine can service the
interrupting device. An interrupt is analagous to a subroutine jump.
However, to preserve program integrity, interrupts are allowed to
occur only after the completion of an instruction and before the start
of the next instruction.
As an example of the program interrupt facility, programs can continue
operation after starting a device, then allow the device to interrupt
when it is ready to signal the program about its resulting status.
The addresses of the interrupt processing routines must be made known
to the Executive.
These addresses are called interrupt vectors and
they are in the Executive's low memory area.

1.6~1

Interrupt Vectors

Each peripheral device controller in the RSX-llM system has a hardware
pointer to its own pair of memory words. These words are located in
the low memory of the Executive. One word contains a vector (address)
for the device's interrupt service routine. The vector may be an
entry point address or an Interupt Control Block address.
If this
vector is an entry point address, it becomes the contents of R7 the
program counter or PC word) when the service routine begins its
execution.
For loadable drivers, the vector points to an Interrupt
Control Block.
The other word is the processor status (PS) word.
It contains
mode and the priority of operation for the interrupt routine.
hardware saves the status of the interrupted program (the PC and
before the interrupt routine begins its processing.

the
The
PS)

The Executive has an area called a stack in which it saves status,
register contents, parameters, or any other data that it may need.

1.6.2

System Stack

RSX-llM maintains a push-down stack using general register 6, which is
the stack pointer or SP. External interrupts, subroutine calls, and
processor traps use this stack to save program status.
When an
interrupt occurs, the hardware first saves the current processor
status word (PS) and the program counter (PC) on the stack.
It then
uses the new PS and PC from the trap and interrupt vector area in low
memory, and begins processing the interrupt routine that handles that
particular interrupt.
A return from interrupt (RTI} instruction
restores the original PS and PC values from the stack, thereby
restoring the original interrupted program.
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INTRODUCTION TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
1.6.3

Processor Traps

A variety of errors and programming conditions cause the processor to
trap to a set of fixed locations. These locations contain th~ PC and
PS for the trap processing routines.
Processor traps include the
following:
•

Power failure

•

Odd addressing errors

•

Stack errors

•

Timeout errors

•

Non-existent memory errors

•

Memory parity errors

•

Memory management violations

•

Floating point processor exceptions

•

Use of reserved instructions

•

Use of the T-bit in the PS word

•

Use of the IOT, EMT, and TRAP instructions

Processor traps cannot be masked off. That is, when they occur, the
processor immediately enters the trap sequence of pushing the current
PS and PC onto the current stack, retrieving the new PS and PC from a
specific hardware trap vector, and executing the code that begins at
the location specified by the trap vector.
Although there are several processor traps (see Interrupt and Trap
Vectors, below), the trap of main interest is the emulator trap. The
EMT instruction causes the emulator trap. This instruction calls the
Executive whenever a user task has an Executive directive written into
it that requests the Executive to perform some specific function (see
Executive Directives below)n

1.6.4

External Interruptions

External interrupts are hard-wired into one of four priority levels of
the processor (labeled 4 to 7, with 7 being the highest priority).
These interrupts are maskable in that they can cause an interrupt only
if the priority level held in the processor status word is less than
the priority of the interrupting source. When an interrupting device
causes a new priority level to be loaded from its vector PS word,
interrupts at the same or lower levels are blocked out.
The system,
however, remembers that the interrupts occurred and it processes them
in turn by priority.
Certain traps, however, cannot be masked by the priority field in the
PS word. These traps are: parity error, memory management violation,
stack limit yellow, power failure
(power down), and floating-point
exception.

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INTRODUCTION TO TBE RSX-llM Vl.l OPERATING SYSTEM EXECUTIVE
1.6.S

Interrupt And Trap Vector Locations

The following chart shows some of the interrupt and trap vectors used
by RSX-llM interrupt . and trap processing. The PC for the interrupt
routine is taken from the specified memory location.
The next word
contains the new PS word.
Memory
Location

Interrupt and
Trap Vector

000
004
010
014
020
024
030
034

Reserved for DEC use
CPU errors
Illegal and reserved instructions
Breakpoint trap (BPT)
Input/output trap (IOT)
Power fail
Emulator trap
TRAP instruction

244
250

Floating-point error
Memory management

For a complete list of vectors,
Handbook.

1.6.6

see

the

pertinent

PDPll

Processor

System Traps

System traps are transfers of control
(also
called
software
interrupts) that provide tasks with another means of monitoring and
reacting to events. The Executive initiates system traps when certain
events occur. The trap transfers control to the task associated with
the event and gives the task the opportunity to service the event by
entering a user-written routine.
There are two distinct kinds of system traps:
•

Synchronous System Traps (SSTs). SSTs detect events directly
associated with program instruction execution.
They are
"synchronous" because they always occur at the same point in
the program when previous instructions are repeated. For
example, an illegal instruction causes an SST to occur.

•

Asynchronous System Traps (ASTs).
ASTs detect significant
events that occur asynchronously to the task's execution:
that is, the task has no direct control over the precise time
that the event occurs. For example, the completion of an I/O
transfer may cause an AST to occur.

To use the system traps, a task issues system directives that
establish entry points for user-written service routines. Entry
points for SSTs are specified in a single table. AST entry points are
set by individual directives for each kind of AST. When a trap
occurs, the task enters the appropriate routine via the specified
entry point.
Debugging aid programs (On-line Debugging Tool and Executive Debugging
Tool) can be entered from points, which are called breakpoints, that
you insert into a memory-resident task.
These breakpoints cause a
breakpoint trap that transfers execution to the debugging aid program.
The debugging aid, by means of its own table of trap vectors, can

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INTRODUCTION TO THE RSX-llM VJ.l OPERATING SYSTEM EXECUTIVE
execute special processing for certain SSTs that can occur. The
IAS/RSX-11 ODT Reference Manual discusses the On-line Debugging Tool
in detail.
The Executive Debugging Tool (XDT) is described in the
RSX-llM Guide to Writing an I/0 Driver.

1.7

EXECUTIVE DIRECTIVES

An Executive directive is a request from a task to the Executive to
perform
an
indicated
operation.
A programmer uses Executive
directives to control the execution and interaction of tasks.
Executive directives enable tasks to perform
following:

functions

such

•

Obtain task and system information

•

Measure time intervals

•

Perform I/O operations

•

Manipulate a task's logical and virtual address space

•

Suspend and

•

Request the execution of another task

•

Exit from a task

~esume

the

execution of tasks

System directives allow tasks to exploit some major system
including the following:
•

Event flags

•

System traps

•

Extended logical address space

functions,

RSX-llM MACRO programs execute Executive directives by using macro
calls and the EMT 377 instruction. FORTRAN uses DIGITAL-supplied
library routines to use the directives.
You should always use macro calls instead of directly executing the
directive.
Then, if system changes are made in the directive
specifications, you need only to reassemble the program rather than
edit the source code.
Listed below is a brief summary of the directive functions that are
possible for RSX-llM. For a complete description of RSX-llM Executive
directives, see the RSX-llM Executive Reference Manual.
Task Execution Control Directives
Abort Task

Causes the Executive to terminate the
execution of the task named in this
directive.

Cancel Time Based
Initiation Requests

Causes
the
Executive
to
cancel
all
time-synchronized
initiation
requests for the execution of the task
named in this directive, regardless of
the source of each request.

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INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
Task Exit

Informs the Executive that the task
issuing the Exit has completed its
execution. Unless the exiting task is
fixed, its memory is freed for use by
other tasks.

Extend Task

Causes the Executive to modify the
size of the task that issues this
directive by a positive or negative
number of 32-word blocks.

Request Task

Causes the
Executive
to
request
immediate execution of the task named
in the directive.

Resume Task

Causes the Executive to resume the
execution of a task that has issued a
Suspend directive.

Run Task

Causes the Executive to schedule the
execution of the task named in this
directive at a time specified in terms
of a time period from the issuance of
the directive.

Suspend

Causes the
Executive
to
suspend
execution of the task that issued the
suspend until
explicitly
resumed,
either by a Resume directive from
another task or the MCR
command,
Resume.

Task Status Control Directives
Alter Priority

Causes the Executive to change the
running priority of the installed and
active task named in this directive.

Disable Checkpointing

Causes the Executive to make the task
that issues this directive no longer
checkpointable.

Enable Checkpointing

Causes the Executive to
previously
issued
Checkpointing directive.

nullify the
Disable

Informational Directives
Get Partition Parameters

Causes the Executive to fill a 3-word
buffer, which is specified in this
directive, with parameters related to
the memory partition specified in this
directive or related to the task that
issues this directive.

Get Region Parameters

Causes the Executive to fill a 3-word
buffer, which is specified in this
directive, with region parameters.

Get Sense Switches

Causes the Executive to return the
settings of the 16 console switches to
the task that issues this directive.

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INTRODUCTION TO THE RSX-llM V3.1 OPERATING SYSTEM EXECUTIVE
Get Task Parameters

Causes the Executive to fill a 16-word
buffer with parameters related to the
task that issues this directive.

Get Time Parameters

Causes the Executive to return the
current time parameters (year, month,
day, hour, minute, second, tick and
ticks/second) of the task.

Event-associated Directives
Clear Event Flag

Causes the Executive to clear an event
flag specified in the directive and
return the previous polarity of the
flag.

Cancel Mark Time Requests

Causes the Executive to cancel MARK
TIME requests that have been made by
the task that issues this directive.

Declare Significant Event

Causes . the Executive to declare a
significant
event.
The Executive
scans the STD for the highest priority
task capable of execution. It then
saves the context of the currently
executing
task
and
starts
the
execution of the new highest priority
task.

Exitif

Causes the Executive to cause an exit
of the task that issues the directive
if, and only if, a specified event
flag is clear.

Mark Time

Causes the Executive to declare a
significant event after the expiration
of the time interval specified in the
directive.
If
an event flag is
specified in the directive, it is
cleared when the directive is issued
and set when the significant event
occurs.
If an Asynchronous System
Trap (AST) entry point address is
specified in the directive, an AST
occurs at the time of the significant
event.

Read All Event Flags

Instructs the Executive to return to
the task that issued this directive
the polarities of all 64 event flags
in a 4-word buffer.

Set Event Flag

Causes the Executive
to
set
an
indicated event flag and return the
previous polarity of the indicated
flag
(without a declaration of a
significant event).

Wait For Significant
Event

Causes the Executive to suspend the
execution of the task that issues the
directive until the next significant
event occurs.

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INTRODUCTION TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
Wait For Logical Or Of
Event Flags

Causes the Executive to suspend the
execution of the task that issues the
directive until one or more specified
event flags of a group of event flags
is set.

Wait For Single
Event Flag

Instructs the executive to suspend the
execution of the task that issues the
directive until an event flag that is
specified in the directive is set.

Trap-associated Directives
AST Service Exit

Causes the Executive to terminate the
execution of the AST service routine.

Disable AST Recognition

Causes the Executive to disable AST
recognition for the task that issues
this directive. The ASTs are queued
and
only
their
recognition
is
inhibited.

Enable AST Recognition

Causes the Executive to enable AST
recognition for the task that issues
this directive.

Specify FPP Exception AST

Informs
the
Executive
that
the
specified AST routine within the task
is to begin execution whenever
a
floating-point
processor
exception
occurs,
or
that
floating-point
processor exception ASTs are no longer
wanted.

Specify Power Recovery
AST

Informs
the Executive whether or not
power recovery ASTs are wanted for the
task that issues this directive. If
the ASTs are wanted, this directive
indicates
where control is to be
transferred when the AST occurs.

Specify Receive Data AST

Informs the Executive whether or not
receive data ASTs for the task issuing
this directive are wanted.
If the
ASTs are wanted, task execution is
transferred to the address of the AST
service routine within the task when
data is placed in the task's receive
queue.

Specify Receive By
Reference AST

Informs the
Executive to transfer
control to an address in the task
specified in the directive when the
Receive-by-Reference AST occurs, or
that receive-by-reference ASTs are no
longer desired for the task
that
issued this directive.

Specify SST Vector Table
For Debugging Aid

Specifies the address of a table of
synchronous
system
trap
service
routine entry points for use by ODT or
other debugging aids.

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INTRODUCTION TO TBE R.SX-llM V3.l OPERATING SYSTEM EXECUTIVE
Specify SST Vector Table
For Task

Informs the Executive that the task
that issues this directive contains a
table of addresses of service routines
to be executed upon task trap or fault
conditions.

I/O and Intertask Related Directives
Assign LUN

a
Causes the Executive to assign
physical device unit to a logical unit
number (LUN). The LUN, device name,
and device unit number are specified
in this directive.

Connect To Interrupt
Vector

Causes the Executive to allow a task
to process hardware interrupts by a
routine specified in the directive.
The Interrupt Service Routine (ISR)
must be in the task's own space.

Get LUN Information

Causes
the
Executive
to
return
information regarding the logical unit
specified in the directive to the task
that issues this directive.

Get MCR Command Line

Causes the Executive to transfer an
MCR (terminal) command line to the
task that issues this directive.

Queue I/O Request

Causes the Executive to queue an I/O
request for the issuing task. This
request is queued by priority for a
logical unit which is assigned to a
physical unit. An event flag, an AST,
and
an
I/O status block may be
specified
as
I/O
completion
indications.

Queue I/O Request
And Wait

Similar to the queue I/O
request
directive except for one aspect.
The
Queue I/O Request And Wait directive
specifies an event flag
and
the
Executive executes an implied Wait For
Single Event Flag directive.

Receive Data

Informs the Executive that the task
that issues this directive is ready to
receive data (in a 13-word data block)
that has been sent from another task
by means of the Send directive.

Receive Data Or Exit

Causes the Executive to attempt to
receive data (dequeue a 13-word data
block) for the task that issues this
directive.
If no data is received,
the task that issues this directive
exits.

Send Data

Causes the Executive to declare a
significant event and to queue the
13-word block of data that the task
named in this directive is to receive.

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INTRODUCTION TO THE RSX-llM V3.1 OPERATING SYSTEM EXECUTIVE
Memory Management Directives
Attach Region

Causes the Executive to attach the
task that issues this directive to a
static common region or to a named
dynamic region.

Create Address Window

Causes the Executive to create a new
virtual address window by allocating a
window block from the header of the
task that issues this directive and
establishing the
window's
virtual
address base and size.

Create Region

Causes the Executive to create
a
dynamic region in a system-controlled
partition and, as an option, attach it
to
the
task
that
issues
this
directive.

Detach Region

Causes the Executive to detach the
task that issues this directive from
the previously attached region that is
specified in this directive.

Eliminate Address Window

Causes the Executive to delete an
existing address window, unmapping it
first if necessary.

Get Mapping Context

Causes the Executive to return
a
description
of
the
current
window-to-region mapping assignments.

Map Address Window

Causes the Executive
to
map
an
existing window to an attached region.

Receive By Reference

Causes the Executive to dequeue the
next
packet
in
the
receive-by-reference queue of the task
that issues this directive.

Send By Reference

Causes the Executive to insert
a
packet containing a reference to a
region into the receive-by-reference
queue of a receiver task that is
specified in this directive.

Unmap Address Window

Causes the Executive to unmap the
window
that is specified in this
directive.

1.7.1

Event Flags

The execution of certain directives causes significant events to
occur.
In fact, most significant events are caused, either directly
or indirectly, by system directives.
A significant event occurs when a task issues a system directive that
implicitly or explicitly suspends a task's execution, or when an
external interrupt occurs that can affect a task's execution.
Event
flags are associated with significant events. When a significant
event occurs, the event flag indicates the specific cause of the
significant event.
1-25

INTRODUCTION TO THE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
The Executive uses significant events and event flags to manage task
execution.
However, tasks can also use significant events to
coordinate internal task activity and to communicate with other tasks.
For example, a task can issue an Executive directive to associate an
event flag with a specific significant event. When that event occurs,
the Executive sets the associated flag. Therefore, by testing the
state of the flag, a task can determine whether or not the event has
occurred.
Sixty-four event flags are available to enable tasks to distinguish
one event from another.
Each event flag has a corresponding event
flag number. The first 32 flags are local to each task and are set or
cleared as a result of each task's requirements. The second 32 flags
are common to all tasks and are therefore called global or common
event flags.
Global flags can be set or cleared as a result of any
task's operation. Tasks use global flags to communicate with other
tasks because one task cannot refer to another task's local flags.
Eight of the local event flags and eight of the common event flags are
reserved exclusively for the Executive.

1.8

THE MCR INTERFACE

You communicate with RSX-llM by entering commands at a terminal.
The
terminal driver directs the commands to the Monitor Console Routine
(MCR) processor. The MCR processor either executes the commands
itself, or it activates a system or user-written task that can service
the commands.
MCR commands allow you to:
•

Start up-the system

•

Manage peripheral devices

•

Control task execution

•

Obtain system and task information

•

Activate system or user-written tasks that request input
the terminal

from

The MCR commands that control task execution are
particularly
significant to system pe!rformance.
You must use an MCR command
(Install) to install a task into the system. Therefore, you establish
the base of installed tasks, which the Executive, other installed and
active tasks, and further MCR commands can manipulate.

1.8.l

Privileged Commands

To restrict the use of commands that directly
affect
system
performance, RSX-llM considers some MCR commands and command options
to be privileged. You can issue a privileged command only from a
privileged terminal.
In multiuser protection systems, individual
users are either privileged or nonprivileged~ when a user logs on,
the terminal assumes the privilege status assigned to that user's
identification code (UIC) • A ·user can issue an MCR command at a
privileged terminal to modify the privilege status of any other
terminal connected to the system. If multiuser protection support is
not included during system generation, all terminals are privileged.

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INTRODUCTION TO TSE RSX•llM V3.l OPERATING SYSTEM EXECUTIVE
1.8.2

External Scheduling Of Task Execution

An important MCR function is the external scheduling of
task
execution.
This type of scheduling works in conjunction with the
Executive's priority driven internal scheduling of active tasks.
You
can include time parameters with the command that activates an
installed task. The time parameters request the Executive to run a
task:
•

At a specified time from the current moment

•

At a specified time from clock unit synchronization

•

At an absolute time of day

•

Immediately

All of these time options are available with or without periodic
rescheduling. RSX-llM also supports an unlimited number of programmed
timers for each task in the system. The user task can create its own
timer, which the Executive then decrements at regular intervals. When
the timer reaches zero, the Executive sets an event flag or generates
an Asynchronous System Tra~ (AST) that passes control to the task at a
prespecified address.

1.9

TERMINAL OPERATION

In RSX-llM, a variable number of terminals can operate concurrently.
In addition, each terminal operates independently of others in the
system to allow each to run a different task.
In a system that
supports multiuser protection, a user must log onto a terminal before
issuing further commands. In other RSX-liM systems, a user can issue
commands whenever the terminal displays an appropriate prompt.

1.9.l

Attached Terminals

RSX-llM allows tasks to request input from a terminal. To ensure that
a
requesting task receives input intended for it, the task usually
attaches to the terminal. While the task is attached, the terminal
directs all input to the attached task, with one exception. The
exception is a control C character (the C key pressed while pressing
the CTRL key), which gains the attention of the MCR processor. An
attached terminal ensures that a soliciting task properly receives its
input;
but it also allows a user to interrupt the task's control of
the terminal to communicate with MCR.
Note that attaching to the
terminal is a function of the task rather than of a user.
Some applications may require that a user be denied access to MCR but
allowed access to a specific task only. In this case, a task can
attach to the terminal with a special subfunction.
The subfunction
causes the system to generate an AST for the attached task whenever
someone enters unrequested input, including CTRL/C, at the terminal.
However, making the terminal a slave terminal is another way of doing
this.

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INTRODUCTION TO TBE R.SX-llM VJ .1 OPERATING SYSTEM EXECUTIVE
1.9.2

Slave Terminals

When your installation needs to dedicate a terminal exclusively to one
or more tasks, you issue· an MCR command (or a task issues a special
I/O function) that sets the terminal to slave status. The difference
between a slave terminal and an attached termipal is that the system
ignores all unsolicited input, including CTRL/C, that is entered at a
slave terminal.
Until you issue another MCR command to delete the
slave status, the terminal can only be used to communicate with the
task soliciting input from the terminal. An I/O function issued by a
task can also delete the slave status of the terminal.
Slave
terminals are often dedicated to real-time applications.

1.10

MULTIUSER PROTECTION

Multiuser protection, a system generation option, allows an RSX-llM
installation to monitor and control individual users of the system.
Individual users are either privileged or nonprivileged.
The system
manager,
who
is
the
one assigned responsibility for system
configuration and operation, assigns a user identification code (UIC)
to each user, which determines the user's privilege status. When
logging onto a terminal, the user supplies a last name or UIC and a
password.
If the user gives a name, the system finds the associated
UIC. The system then checks that the password matches the last name
or UIC, and sets the terminal to privileged or nonprivileged status,
according to the user's UIC.

1.10.l

Public And Private Devices

In a multiuser protection system, some commands allow you to do things
that are not allowed in systems without multiuser protection. For
example, the Allocate command allows you (or any user) to allocate a
device (a disk drive) as your private device: allocating the device
prevents other nonprivileged users from accessing it.
A nonprivileged user can access a private device that he has allocated
to
perform MCR functions that are normally privileged.
These
functions include preparing a disk or magnetic tape for use by the
RSX~llM file system.
To complement the private device feature, multiuser protection allows
the system manager or privileged user to declare certain devices to be
public. Public devices cannot be allocated to individual users.
By
declaring a line printer to be public, for example, the system manager
can ensure that all users have access to that commonly used output
device.

1.11

SYSTEM MAINTENANCE

1.11.l

Error Logging

RSX-llM provides an error logging facility as a system generation
option for systems that are 24K words or larger. The error logging
facility monitors the hardware reliability of an RSX-llM system:
it
continually detects and records information about disk, DECtape,

1-28

IRTRODOCTIOR TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
magtape, and memory errors as they occur, regardless of whether or not
the
error is recoverable.
The Executive automatically retries
recoverable errors. However, you might be unaware that the error
occurred.
Therefore, at user-determined intervals, a formatting task
can be run to generate individual error and summary reports on some or
all of these errors.
·
Please note that only the following four types of errors are loggable:
•

Device errors (disks, magtapes, DECtapes)

•

Undefined interrupts

•

Timeout

•

Memory parity errors

In summary,
functions:

the

error

logging

facility
as

performs

occurs

(done

the

following

Executive

•

Detects a hardware error
modules)

•

Gathers information about the error

•

Stores the information in a file

•

Formats the information to produce an error report

Control of the facility is shared between routines in the Executive
and specific error logging tasks. These routines and tasks interface
with each other to carry out the four operations described above.
You can generate a wide variety of error reports. Among many options,
you can specify a report that covers only a certain time period, a
certain device or group of devices, or perhaps a certain type of
error.
You can also request a report that contains only information
on individual errors, one that contains only summary information, or
one that contains both kinds of statistics.
Because the error log files may be written to a removable volume, an
operator can generate the reports either on site or at any other
RSX-llM installation that supports the error logging facility.

1.11.2

Diagnostic Tasks

RSX-llM also provides a group of diagnostic tasks which you can
incorporate into the Executive support at system generation time. A
diagnostic task tests a specific device to identify the source of any
errors. RSX-llM diagnostic tasks test for malfunctions on most disks,
DECtapes, magnetic tapes, and terminals. The tasks are simple to use
and require little memory space.
When used in connection with error logging reports, the diagnostic
tasks can significantly reduce system downtime. The system manager
should regularly generate error reports to check
on
hardware
performance.
When a number of errors indicates that a particular
device is beginning to malfunction, the manager can run the diagnostic
task for the erring device to help isolate the source of the errors.
Each diagnostic task has two modes of operation:
customer mode and
service mode.
In customer mode, the user activates the appropriate

1-29

INTRODUCTION TO TBE RSX-llM V3.l OPERATING SYSTEM EXECUTIVE
task, which then runs to completion and reports its findings.
(Because the tests destroy any data resident on the device being
tested, only authorized users should be allowed to run diagnostic
tasks.) Service mode is intended for use by DIGITAL Field Service
engineers. Service mode allows the user to modify the test content
initially
and
to interrupt the running test to make further
modifications.

1.11.3

Power Failare Restart

RSX-llM can execute a power failure restart that smooths
out
intermittent short-term power fluctuations with little loss of service
or data. Power failure restart functions in four phases:
power begins to fail, the CPU traps to the Executive,
• When
which stores volatile register contents, thereby bringing
system operations to a controlled halt.
•

When power is restored, the Executive again receives
and restores the preserved state of the system.

•

The Executive then schedules all device drivers that were
active at the time of the power failure at their power-fail
entry points. Drivers have the option of being scheduled one
of two ways:
1.

Whenever power fails

Only when power fails while the driver is servicing an I/O
request

The drivers can then make any necessary restorations of
(repeat an I/O transfer, for example).
•

control

state

The Executive then determines if any user-level tasks have
requested notification of power failure by issuing a system
directive requesting an AST on power recovery. The Executive
initiates ASTs for any tasks that have requested them.

1-30

CHAPTER 2
MEMORY RESOURCE ALLOCATION

2.1

INTRODUCTION

Chapter 2 contains information about how the Executive manages,
structures, allocates, and deallocates memory resources in RSX-llM.
Any discussion of memory functions in RSX-llM necessarily overlaps the
closely related functions of task management and processing. However,
this discussion emphasizes memory allocation, deallocation,
and
management to allow a more logical and coherent presentation of memory
in RSX-llM.
The functions of the core allocation routines, the Shuffler and the
Loader,
are part of Executive memory management. However, the term
"memory management" also refers to the KTll Memory Management Unit,
which is hardware and not software.
The use of the term "memory
management" has been avoided in this manual where confusion between
the Executive's role and the hardware's role in memory management
would arise. At the end of this chapter, flow diagrams show important
processes that the Executive performs to allocate and manage memory.

2.1.1

Memory Addressing

Because of the 16-bit word size of the PDP-11, an RSX-llM task can
have an address no larger than 177777(8) (an addressing range of 32K
words for nonprivileged tasks).
In RSX-llM, you can use a task that
contains overlays to avoid limiting its size to its addressing range.
An overlaid task contains segments -- a root segment that is always in
memory, and any number of other segments that are loaded into memory
when required. When task segments are not in memory, they reside on
disk.
Large task segments that are in memory may not be able to
access large amounts of disk-based data because the data may not fit
into the available memory with the task. A heavily overlaid task that
transfers large amounts of data to another task via disk incurs a
throughput penalty because of the many I/O transfers needed to move
segments in addition to those I/O transfers needed by the task's
function.
The combined size of an overlaid task's segments may exceed 32K, which
is ~he limit imposed by 16-bit addressing. Normally, the sum of task
segment sizes in memory is 32K or less.
However,
a non-privileged
task can exceed the 32K physical size imposed by the 16-bit address
structure by using the memory management programmed logical address
space
(PLAS)
directives.
Combining the PLAS directives with
memory-resident overlays is an effective way to avoid throughput
problems caused by many I/O transfers. With this combination, I/O
transfers occur to move only data to another task and,
because the
entire task is in memory, all or most of the task segments do not have
to be loaded or unloaded during task execution.

2-1

MEMORY RESOURCE ALLOCATION
Task throughput can be faster if all or a greater portion of the task
is resident in memory during task execution. RSX-llM contains a group
of memory management directives that provide the task with this
capability.
The
directives
overcome the 32K word addressing
restriction. They allow the task to change the physical memory
locations referred to by a given range of addresses. Using these
directives, a task can increase its execution speed by reducing its
disk I/O requirements at the expense of increased memory requirements.
The memory management directives that a task can use for expanding the
32K range of accessible addresses are:
CRRG$

Create Region

ATRG$

Attach Region

DTRG$

Detach Region

CRAW$

Create Address Window

ELAW$

Eliminate Address Window

MAP$ -- Map Address Window
UNMAPS -- Unmap Address Window
SREF$

Send by Reference

RREF$

Receive by Reference

GMCX$

Get Mapping Context

GREG$

Get Region Parameters

The use of these directives is fully described in the RSX-llM
Executive Reference Manual. The RSX-llM Task Builder Reference Manual
describes overlay structures and overlaid tasks.

2.1.2

Memory Management - An Overview

In a mapped system, the KTll Memory Management Unit associates task
addresses with available physical memory.
This process, which is
transparent to the user, is called mapping. Addresses used within a
task are virtual addresses and their correspondence to actual physical
memory addresses is known to the KTll unit only.
However, memory
management directives can. control and manipulate the KTll, which
physically performs the address mapping.
A privileged task can address all of available memory by directly
using the KTll Memory Management Unit. There is some danger in doing
this because the programmer must be very certain that the task does
not corrupt system space, system routines and data (for instance, the
Executive itself, its pool space, or the I/O page), or other tasks.

2.1.3

Virtual And Logical Addresses

Virtual and logical addresses, and virtual and logical address space
are concepts that provide a basis for understanding the functions
performed by memory management directives and the use of task windows.

2-2

MEMORY RESOURCE ALLOCATION
•

Physical addresses
Memory is
divided
into
discrete
addressable parts called bytes. They are numbered according
to their position in memory. Therefore, the lowest byte is O
and the highest byte is whatever the upper limit of memory may
be for a particular system1 for example, 32K, 64K, etc.
The
assigned number is called the physical address.
A task contains virtual addresses (for example, O through
2200).
The · Task Builder relocates the task's virtual
addresses in an unmapped system by a number represented by the
base address of the partition in which it is installed. After
installation, the task's addresses refer to logical addresses
of memory, which always correspond to the same physical memory
in an unmapped system (unless you change the partition or task
code}.
Therefore, the addresses have an actual one-to-one
relationship to physical memory. The same relationship exists
any time the task is in memory. The logical addresses may not
be from 0 through 2200.
For example, after the task is
installed in the partition, the task's virtual address 0 may
become logical and physical address 17000 because the Task
Builder added in the offset, which is equal to the partition
base address. In a mapped system, the virtual addresses
remain the same but the logical addresses may change due to
Executive
processes
(checkpointing,
swapping,
etc.).
Therefore, the logical addresses do not always refer to the
same physical memory. If the task uses memory management
directives, the logical addressing can be changed by the task
to include any part of physical memory that it is allowed to
access.

•

Virtual addresses
A task's virtual addresses are the
addresses within the task. The PDP-ll's 16-bit word length (a
mapped system) imposes the address range of 32K-words on the
virtual addresses.
Therefore, these task addresses could
include addresses zero through 177777(8) depending on the
l~ngth
of the task. However, in a system that uses the KTll
(mapped system), these task addresses may not be the same as
the actual addresses of the memory in which the task resides.
The KTll Memory Management Unit maps the task's virtual
addresses to the log~cal addresses of memory.

•

Virtual address space -- A task's virtual address space is
that space encompassed by the range of virtual addresses that
the task uses. With the CRAW$ memory management directive, a
task can divide its virtual address space into segments called
virtual address windows. By using address windows, you can
manipulate the mapping of virtual addresses to different areas
of physical memory (see Virtual Address Windows below).

•

Logical addresses -- A task's logical addresses are the actual
physical memory addresses that the task can access.

•

Logical address space -- The task's logical address space is
the total amount of physical memory to which the task has
access rights. The physical memory represented by the logical
addresses may or may not be continuous. In other words,
though a task's virtual addresses may be continuous, its
logical address space may be divided among non-adjacent parts
of physical memory. Using the CRRG$ (Create Region) memory
management directive, you can divide the task's logical
address space into various areas called regions. Each region
is a continuous block of memory1 however, the regions may not
be adjacent.

2-3

MEMORY RESOURCE ALLOCATION
If the capabilities of the memory management directives were not
available, a nonprivileged task's virtual address space and logical
address space would directly correspond. That is, a single virtual
address would always point to the same logical location. Both types
of address space would have a maximum size of 32K. However, you can
use directives to assign a range of virtual addresses (a window) to
different logical areas (regions), thereby extending a task's logical
address space beyond 32K words.
Figure 2-1 shows a virtual address in a user task translated into a
logical address in physical memory by the KTll Memory Management Unit.
The paragraphs following Figure 2-1 briefly describe the task virtual
space, memory management, and task logical space relationships. A
complete discussion of tasks, task windows, and regions can be found
in the RSX-llM Task Builder Manual. Task mapping is also discussed in
Chapter 4, Privileged Tasks.

2.1.4

Task Windows

Referring to Figure 2-1, which illustrates a mapped system, you can
observe that a large 32K user task contains three distinct areas of
continuous space called "windows". When referring to task windows (a
file window is a similar but slightly different concept) the term,
window, is a construct that encompasses and defines an area of
continuous, virtual, progr·am space in the task. Windows must have a
specified size and starting address. The window size can be from 32
words to 32K-32 words and windows must start on a 4K address boundary.
Figure 2-1 shows three windows that are not continuous in the task's
virtual address space.
However, the space within each window is
continuous. In this task, the size of window O is llK; the size of
window 1 is llK;
and the size of window 2 is SK. The concept of
windows exists for the following specific reason.
By using the concept of windows and the Memory Management directives,
a nonprivileged task can access a larger logical memory space than
that implied by the 32K virtual addressing range and normally
accessible by the 16-bit address. A task can, in fact, only access
32K of memory at one time. However, a nonprivileged task can change
its access to logical addresses (real, physical memory). The area
that your program accesses can be changed by the program during
program execution.
The process of accessing different logical areas
of memory is called "mapping". By referring to Figure 2-1, you can
see that Window 1 in the t:ask is mapped to Static Common Region 1 in
physical memory. The Window 1 mapping can be changed by the task to
map to Static Common Region 0 in physical memory. In effect then,
though a task is limited to a range of 32K virtual addresses, a task
can access all the physical memory available to it (determined by the
way that you set up the mapping) by changing the mapping of its
windows to different logical addresses. Figure 2-1 provides a visual
description of the concept of mapping to different logical addresses.

2-4

PHYSICAL MEMORY

KTl 1 MEMORY MANAGEMENT UNIT

1 BLOCK (32WORDS)
VIRTUAL ADDRESS SPACE
OF 32K USER TASK
1 to 128 BLOCKS/PAGE
VA

I APF I
13 12

APF
SELECT

6 5

1 PAGE = 32 TO 4K-32 WORDS

DIB
L

3:
tZJ

APR
USER

KERNEL

ACTIVE PAGE REGS

PAR

14K

PAF

WINDO=~

4K
-----HEADER

PAF

)II
~
~

)II

t-3

t-4

tKAPRORUJ
~

PBN

]

18-BIT PHYSICAL ADDRESS

TASK REGION
WINDOWO

J
"EXECUTIVE
(NOT SHOWN FULL SIZE)

Figure 2-1

!;tj

tZJ

Cf.l

tZJ

(

CONTAINS
3 WINDOW BLOCKS

STATIC COMMON REGION 0

0
Cl

11 USER
OOKERNEL
DETERMINED BY

...

PDR

~
~

!;tj

l
1

PAR

PAF

IV
lJl

PDR

TASK
LOGICAL
ADDRESS
SPACE

Memory Management - Virtual to Logical Address Space Relationship

MEMORY RESOURCE ALLOCATION

Figure 2-1 shows a task that has three windows. One of the windows
can map to two different logical areas of memory. Window O in the
task maps to the task region. The t~sk region is llK in size and this
size corresponds to the size of Window O in the task. The task reqion
contains the task root and header. The program cannot change this
mapping because window 0 is a default of the Task Builder and must
contain the root and headeru If no windows were specified, the Task
Builder would create Window 0 for the entire task to map to its own
logical space in memory. Window 1 maps to Static Common Region 1.
Window 1 and Static Comm<>n Region 1 are both llK in size. The task
can change the mapping of Window 1 to map to Static Common Region o.
Observe here that the task <:an access llK more physical memory than it
occupies. In other words, i~ task of this size (32K), without windows,
can access 32K of memory. The task that is illustrated can access 43K
of memory.
The last window, Window 2, •:iccesses the Dynamic Common
Window 2 and the Dynamic Common Region are 8k in size.

Region.

Both

Note that the spaces that exist between the windows in the illustrated
task do not ref er to any logical memory address because no window
(mapping) exists for those spaces.
The discussion now proceeds to setting up the task's windows.
done by defining task window blocks to the Task Builder.

This is

To manipulate virtual address mapping to various logical areas, the
programmer must first divide a task's 32K of virtual addres~ space
into segments. These segments are task (virtual address) windows.
Each window encompasses a 1:::ontinuous range of virtual addresses. The
first address of the window address range must be a multiple of 4K
(the first address must begin on a 4K boundary) because of the way
that the KT-11 Memory Management Unit uses Aetire Page Registers
(APRs). The number of windows defined in a task can vary from l to 7.
Window 0 is not available to non-privileged tasks. The size of each
window can range from a minimum of 32 words to a maximum of 32K minus
32 words.
A task that includes directives that dynamically manipulate address
windows must have task window blocks set up in its task header as well
as Window Definition Blocks in the code for use by the Create Address
Window directive.
The Executive uses task window blocks to identify
and describe each currently existing window. When linking the task,
the programmer specifies the number of window blocks to be set up by
the Task Builder. The number of blocks should equal the maximum
number of windows that will exist concurrently while the task is
running.
A window's identification is a number from O to 7, which is an index
to the window's corresponding window block.
The address window
identified by 0 is the window that always maps the task's header and
root segment. The Task Builder creates window O, which the Executive
uses to map the task. No directive should specify window O.
When a task uses memory management directives, the Executive views the
relationship between the task's virtual and logical address space in
terms of windows and regions. Unless a virtual address is part of an
existing address window, the address does not point anywhere. This is
a point to watch when setting up windows with the Create Address
Window directive (CRAW$). Similarly, a window can be mapped only to
an area that is all or part of an existing region within the task's
logical address space.

2-6

MEMORY RESOURCE ALLOCATION
Once a task has defined the necessary windows and regions, the task
can issue memory management directives to perform operations such as
the following:

• Map a window to all or part of a region.
a window from one region in order to map it to another
• Unmap
region.
a window from one part of a region in order to map it to
• Unmap
another part of the same region.
NOTE
It is currently possible for a task with
outstanding I/O to unmap from a region
although it cannot detach from a region
under
this condition.
Because this
feature may be impossible to support in
future releases of the system, DIGITAL
recommends that users consider carefully
before designing an application based on
this ability.

2.1.4.l Task Window Block - A task that includes Memory Management
directives to manipulate address windows must have window blocks set
up in the task header. The Executive uses the task window blocks to
identify and describe each currently existing window. When linking
the task you must specify the number of window blocks to be set up by
the Task Builder.
To do this, you specify a number in the WNDWS
options of the Task Builder to define the number of windows to be used
(in addition to the default window, Window 0). The Task Builder
reserves space in the task header for window blocks - one block for
each window. The Task Builder always reserves at least one block (for
Window 0) as a default.
The label block group in the task header contains the number of task
windows.
The word where this number is found is L$BWND. The number
that is contained here does not include windows for libraries.
The variable part of the task header contains the window blocks.
You
must specify window size, address limits, etc.
(see Window Definition
Block). However, task window blocks are filled in by the Executive
when it obtains the information that you have described in the Window
Definition Block (WDB) and Region Definition Block (ROB).
Note that
the RSX-llM Executive Reference Manual contains all the information
that you need to establish address windows, regions, and their
respective blocks in your code. Also, the RSX-llM Task Builder Manual
contains a description of the task header.

2.1.4.2 Window Definition Block (WDB) - The Window Definition Block
is a coding structure that you must create by using the WDBDF$ and
WDBBK$ macros if you are using MACR0-11. You can create this block
with an 8-word integer array if you are using FORTRAN. The Window
Definition Block defines all the parameters that your code, the

2-7

MEMORY RESOURCE ALLOCATION
Executive, and the Task Builder
Definition Block contains the:
•

need

to use windows.

The Window

Window's base APR:
APRO • Virtual base address O
APR! • Virtual base address 4K
APR2 • Virtual base address SK

APR7 = Virtual base address 28K
•

Size of the window in 32-word blocks

•

Region ID of the region to map

•

Offset within region to be mapped in 32-word blocks

•

Window status word bit definitions

•

Send/Receive buffer virtual address

The window's base APR and the size of the window are information that
the Executive needs. The region ID relates the window to the Region
Definition Block (ROB) which is also created by ydu.
The offset
within the region determines where the mapped area starts within the
region. You can change the offset to move the area that is mapped
within the region. The RSX-llM Executive Reference Manual contains a
complete description of creating and using the WDB and the ROB.

2.1.5

Regions

A task's current window-to·-region mapping context determines the part
of the task's logical address space that the task can access at one
time. A task's logical address space can consist of various types of
region:

•

Task Region -- The task region is a continuous block of memory
in which the task runs.

•

Static Common Region -- A static common region is an area
defined
by
an operator at run time or during system
generation; for example, a global common area.

•

Dynamic Region
A dynamic region is a region created
dynamically at run time by using the Create Region (CRRG$)
memory management directive in the task.

Tasks refer to a region by using a region ID, which the Executive
returns to the task after the task creates the region. The Executive
returns the region ID in the R.GID field of the Region Definition
Block that the user must create before using the Create Region
directive. Region ID 0 always refers to a task's task region.
All
other region IDs are actually addresses of the attachment descriptor
maintained by the Executive in the system's dynamic storage region.
Figure 2-1 shows a sample collection of regions that could make up a
task's logical address space.
A task's logical address space can
expand and contract dynamically as the task issues the appropriate
memory management directives. The header and robt segment are always
part of the task region. Therefore, the task header and root segment
always use window 0 (UAPR 0) and region o. Because a region occupies
a continuous area of memory, each region is shown as a separate block.
2-8

MEMORY RESOURCE ALLOCATION
2.1.5.1 Shared Regions - Address mapping not only extends a task's
logical address space beyond 32K words, it also allows the space to
extend to regions that have not been linked to the task at task-build
time.
One result is an increased potential for task interaction by
means of shared regions. For example, a task can create a dynamic
region to accomodate large amounts of data. Any number of tasks can
then access that data by mapping to the region. Another result is the
ability of tasks to use a greater number of common routines. Tasks
can map to required routines at run time, rather than link to them at
task-build time.

2.1.5.2 Attaching to Regions - A task attaches to a region to make
that region a part of the task's logical address space. A task can
map only to a region that is part of the task's logical address space.
There are three ways to attach a task to a region:
1.

All regions that are linked to a task at task-build time
automatically attached.

A task can issue a directive to attach itself
static common region or a named dynamic region.

A task can request the Executive to attach any region within
its own logical address space (other than its task region) to
another specified task.

are
named

Attaching identifies a task as a user of a region, and prevents the
system from deleting a region until all tasks have been detached from
it.
(It should be noted that fixed tasks do not automatically become
detached from regions upon exiting.)

2.1.5.3 Region Protection - A task cannot indiscriminately attach to
any region. The following criteria determine how tasks can attach to
regions outside their logical address space:

•

Each region has a protection mask to prevent unauthorized
access.
The mask indicates the types of access (read, write,
extend, delete) allowed for each category of user (system,
owner,
group,
world).
The Executive checks that the
requesting task's User Identification Code (UIC) allows it to
make
the
attempted access.
The attempt fails if the
protection mask denies that task the access it wants.

•

When a task creates a dynamic region, it may or may not give
that region a name. If the dynamic region is named, any task
can map to it as long as it knows the name and there is no
protection violation. If a dynamic region is unnamed, a/task
can map to the region only if the task that created the
dynamic region issues a Send By Reference directive addressed
to the requesting task.

task can issue a Send By Reference directive to attach any
• Any
region (except the task region) to another specific task. The
reference sent includes the access rights with which the
receiving task attaches to the region. The sending task can
only grant access rights that it has itself.
•

Any task can map to a named static common region
there is no protection violation.

2-9

long

MEMORY RESOURCE ALLOCATION
2.1.S.4 Region Definition Block (RDS) - You must create the Region
Definition Block for each dynamically created region with the RDBDF$
and RDBBK$ macros if you are using MACR0-11. You can create the ROB
with an 8-word single-precision array if you are using FORTRAN.
The ROB contains the:
•

Region ID

•

Region size in 32-word blocks

•

Region name (in RADSO)

•

Name of the partition (in RADSO) in which to create the region

•

Region status word

•

Region default protection

The RSX-llM Executive Reference Manual· contains a complete description
of creating and using the ROB.

2.2

MEMORY ALLOCATION

This section contains a te~:tual discussion of the major functions and
units of memory allocation.
These are: checkpointing, swapping,
memory compaction (the Shuffler), and loading (the Loader task). Flow
diagrams of the major routines that are involved in these processes
are included at the end of the memory allocation section.
This section also includes flow diagrams of the
$NXTSK, and related routines called by $NXTSK.

2.2.l

Loader,

Shuffler,

Checkpointing

RSX-llM supports checkpointing in both user- and system-controlled
partitions.
The objective of checkpointing is to prevent lower
priority tasks from using main memory and thereby preventing its use
by higher priority tasks.

2.2.l.l Checkpointing in Oser-controlled Partitions - Checkpointing
in a user-controlled partition occurs under one of two conditions:
•

A task requires the user-controlled main partition and has a
higher priority than any other task currently occupying it or
any of its subpartitions.
Furthermore, all the occupying
tasks must be checkpointable and have checkpointing enabled.
If all of these conditions are met, the Executive checkpoints
all the tasks that occupy the partition and gives control of
the partition to the higher priority task.

•

A task requires a subpartition of the user-controlled main
partition
and a lower priority task occupies the main
partition or the subpartition into which the task is to be
loaded.
Furthermore,
the
occupying
task
must
be
checkpointable and have checkpointing enabled. If all these
conditions are met, the Executive checkpoints the task that
occupies the partition and gives control of the subpartition
to the higher priority task.
2-10

MEMORY RESOURCE ALLOCATION
2.2.1.2 Checkpointing in System-controlled Partitions - Checkpointing
in a system-controlled partition occurs as the result of a memory
allocation failure. That is, the Executive tries to allocate a
continuous section of a system-controlled partition to a task and it
cannot find an unoccupied memory area of sufficient size.
In this
case, the Executive re-examines the list of allocated areas in the
partition to determine whether it can form a free space of sufficient
size by checkpointing one or more neighboring tasks.
As with
user-controlled partitions, each task considered for checkpointing
must be of a lower priority, it must be checkpointable, and it must
have checkpointing enabled.
The Executive scans the list of allocated areas in the partition
looking for a series of neighboring tasks, possibly separated by gaps
of free space, where each task satisfies the checkpoint criteria.
If
the sum of the memory occupied by such a series of tasks and gaps
satisfies the memory reguirement for the higher priority task, the
tasks are checkpointed and the higher priority task is allocated the
released memory. If such a series of neighboring tasks cannot be
found and memory compaction was generated for the system, the
Executive calls the Shuffler task to try to bring in the highest
priority waiting task.
The Shuffler does this by compacting memory
and checkpointing a sufficient number of lower priority tasks that are
not necessarily neighbors in the partition.
The checkpointing algorithm does have a limitation, however.
If a
large task is checkpointed and memory becomes fragmented by some
smaller higher priority tasks, the smaller tasks block the large task
from executing.
The larger task can continue to be blocked until
memory becomes free again by tasks exiting or being shuffled.

2.2.1.3 Checkpointing During Terminal Input
Wait - Checkpointing
during terminal input wait, a SYSGEN option, allows checkpointable
tasks to be checkpointed while they are waiting for terminal input.
This feature allows more copies of terminal I/O-bound tasks (for
example, text editors) to run than normally could be run in a given
amount of memory. This option frees memory for the long time periods
while a user is thinking or between keystrokes. This is important for
text editors that normally run at a high priority.
When the terminal driver dequeues a terminal input request for a
checkpointable task that ·has checkpointing enabled, is not at AST
state, and has ASTs enabled, the task is stopped from further
execution.
Thus, even if the task has not entered a wait state for
the terminal input, its execution immediately stops when the request
is dequeued by the terminal driver.
When a task is stopped in this manner, its effective priority within
its partition drops to zero.
(Its actual priority never changes.)
Therefore, lower priority tasks ready to run can cause a higher
priority task that is waiting for terminal input to be checkpointed.
When the terminal input to the checkpointed higher-priority task is
completed, the Executive removes the stop condition and the task can
be brought back into memory. If necessary, the Executive displaces
lower priority tasks to make room for it.
Normally, a task that was checkpointed for terminal input is not
brought back into memory until its terminal request is satisfied.
This is true even if memory becomes available during the wait.
The
only way the task can execute further, prior to the completion of the
terminal input, is to receive an AST.

2-11

MEMORY RESOURCE ALLOCATION
2.2.2

Disk Swapping

Disk swapping allows more tasks of equal priority to alternate the use
of memory into which they cannot be loaded simultaneously. Swapping
is accomplished by varying task priorities so that tasks of the same
priority checkpoint each other periodically. Checkpointing is the
only Executive feature required for swapping to operate.
Swapping does not affect the basic checkpointing algorithm
as
described
under
Checkpointing.
For example, a task can only
checkpoint another task of lower priority, never one of equal or
higher priority.
However, when swapping is enabled, the priority of
tasks resident in memory varies with time (the installed priority of
tasks remains unchanged - the swapping priority is for swapping only).
The task's priority with respect to all of the other system resources
does not change.
Two SYSGEN parameters control the swapping algorithm:
•

Swapping interval. This parameter
(S$$WPC) determines how
often the Executive scans the partition lists to modify the
swapping priority of resident tasks.
A typical swapping
interval might be about one-half second and is entered during
SYSGEN as 30 (for 30 ticks or one-half second).

•

Swapping priority range.
This parameter
(S$$WPR)
is the
absolute value of the range through which a task's priority
varies from its installed priority. A typical value is 5.
This value would cause a task's memory priority to vary from
P+S to P-5, where P is the priority set for the task when it
was installed. The installed priority is in the word, L$BPRI,
in the task image label block. The swapping priority is in
the byte, H.SPRI, in the task header.

The key element of the swapping algorithm is the H.SPRI byte in the
task's header, which is that task's swapping priority. The symbol,
S$$WPR, is equated to the swapping priority range that is specified
during SYSGEN.
In a swapping system, each time a task is read into
memory as the result of an initial task load or checkpoint read,
the
swapping priority byte in the task header is initialized to +S$$WPR
(yielding a memory priority of the running priority plus the swapping
priority).
On the occurrEmce of each swapping interval, the swapping
priority of each resident task is reduced by one until it reaches
-S$$WPR (yielding a memory priority of the running priority minus the
swapping priority). The Executive determines whether a nonresident
task should checkpoint a resident task by comparing the running
priority of the nonresident task with the sum of the running and
swapping priorities of the resident task. If a possibility exists
that checkpointing within a main partition might occur based on the
new priorities, the Executive executes its partition allocation
algorithm for that main partition.
The following points should be
parameters:

considered

when

specifying

swapping

•

The swapping interval should be approximately five times the
round-robin scheduling interval. Round-robin scheduling is a
SYSGEN option that periodically rotates the execution of tasks
of equal priority that are in the System Task Directory (STD).

•

From the time a task is loaded into memory, the average time
(in clock ticks - 1 tick=l/60 of a second for a line frequency
clock (1/50 of a second for 50 cycle machines) it takes for a
task of the same running priority to checkpoint it is roughly
equal to the product of the two swapping parameters.
2-12

MEMORY RESOURCE ALLOCATION
•

Tasks of the same running priority tend to get the same amount
of time in memory. Tasks whose running priorities differ by
less than the swapping range tend to receive different amounts
of time in memory with the higher priority tasks getting much
more time. When many tasks compete for memory and they are of
different
priorities, excessive checkpointing can occur.
Therefore, tasks that use the swapping algorithm should have
the same priority.

•

In a system that supports checkpointing during terminal input,
terminal input is also a factor in causing checkpointing to
occur. Editors and other interactive tasks normally should
run at a higher priority than more compute-bound tasks. The
higher priority increases the
terminal
response
time.
Otherwise, the editor would have to compete with other tasks
(for example, utilities) most of which run at a priority of
50.
However, when an editor is waiting for terminal input,
any lower priority task can checkpoint it.
As soon as its
input is complete, the editor can come back into memory by
checkpointing the lower priority task. It is possible in a
highly interactive system for the naturally high checkpoint
rate to eliminate the need for the Executive swapping code to
service many tasks of equal priority.

2.2.3

Shuffler (Memory Compaction)

$NXTSK, which is an Executive routine, attempts to find space in a
partition for each waiting task. $NXTSK requests the Shuffler task
after an allocation failure within the system-controlled partition
takes place. The Shuffler receives no information from the Executive
when it begins execution: it merely begins examining the partitions
in the system starting from the beginning each time it i~ run. When
the Shuffler encounters a system-controlled partition, the Shuffler
makes two passes through the PCB list of subpartitions in an attempt
to make room for the task or tasks in the main partition wait queue.
In its first pass, the Shuffler attempts to remove all the holes in
the partition. In addition, tasks that are stopped for terminal input
are unconditionally checkpointed, if checkpointing during terminal
input is included (a SYSGEN option).
Tasks that have been fixed in memory can be shuffled.
However, the
following
occupants of a system-controlled partition cannot be
shuffled. For this reason, these memory residents cause free space to
be fragmented in the partition.
•

Loaded device drivers

•

Tasks that are connected to the ICS/ICR-11 or UDC-11 drivers

•

A task whose partition was previously marked by the Shuffler
as having a long outstanding I/O and whose I/O count has yet
to drop to zero. Typical examples of this case are:
- Tasks that issued terminal reads and cannot be checkpointed
- LPAll or tasks that have synchronous functions
being
serviced
- Tasks using the Connect to Interrupt Vector directive

•

Tasks that have been aborted and
because of a memory parity error

•

Dynamically-created common regions

2-13

fixed

the

Executive

MEMORY RESOURCE ALLOCATION
When such a partition is encountered, the Shuffler treats the start of
the
subpartition
as
the
end
of
an area within the main
system-controlled partition. It treats each area as though it were a
separate main partition. The tasks that occupy an area are shuffled
until only one hole remains in the area.
In its second pass, the Shuffler creates a list of all the tasks that
occupy an area of the main partition.
This list is in reverse
priorit:y order. The Shuffler then examines this list in an attempt to
find tasks that the waiting task can checkpoint. The Executive
routine ($TSTCP) determines if the waiting task can checkpoint the
task that owns the partition, which is the "owner task". If this scan
of the list indicates that the sum of space available from holes and
checkpointable tasks is sufficient for the waiting task, the Shuffler
scans the list a second time to checkpoint (using $ICHKP) as many
owner tasks as necessary.
To shuffle a task, the Shuffler first "freezes" the task in memory to
prevent it from being checkpointed.
Then, using the Executive
routine, $BLXIO, it moves the task image in the partition.
The
Shuffler executes this move while in system state (thus preventing
context switching) and it does the move in 256.-word
blocks.
Therefore, QIO speed optimizations with a large BLXIO transfer vector,
a SYSGEN option, increases the response time for a very high priority
real-time task.
through
the
The Shuffler's algorithm consists of two
passes
system-controlled partition:
it executes the steps in each pass
iteratively until the partition reaches a stable state.

2.2.3.1 The Shuffler's First Pass - In the first pass, the Shuffler
starts at the beginning o:f the system-controlled partition and tries
to move (shuffle) all tasks that are positioned above a gap of free
space down to the base of the free space. When possible, it also
checkpoints any tasks it encounters that are waiting for terminal
input. Task shuffling occurs in the following steps:
•

The Shuffler blocks the task from further
allocates the free space below the task.

•

If necessary, the Shuffler waits for the task's outstanding
I/O count to reach zero by checking it at intervals of
approximately one-eighth of a second. If the task I/O count
does not drop to zero in about one-half of a second, the
Shuffler marks the task's partition as having long-outstanding
I/O, deallocates the free space below the task, and restarts
its first pass scan of the partition.
The Executive clears
the task's partition long-outstanding I/O indicator when it
reduces the task's I/O count to zero.

•

If the task's I/O count drops to zero within one-half of a
second, the Shuffler moves the task down to the base of the
free space. The speed of this move increases if the QIO speed
optimizations were included during phase 1 of SYSGEN and a
large BLXIO transfer vector was allocated.

•

After the Shuffler completes the move, it unblocks the task to
allow further execution and then it deallocates free space
(now above the task).

2-14

execution

and

MEMORY RESOURCE ALLOCATION
When the Shuffler completes its first pass, all free space in the
partition has been merged into one hole at the top of the partition.
However, there may be additional holes below those tasks that cannot
be shuffled.

2.2.3.2 The Shuffler's Second Pass - If the Shuffler completes its
first pass and some tasks are still actively competing for memory in
the partition, the Shuffler executes its second pass algorithm.
In
the second pass, the Shuffler creates an ascending, priority-ordered
list of the tasks in the partition.
It then uses this list to
determine if the size of the waiting task is less than the sum of the
free space in the partition and the size of one or more of the lower
priority tasks that can be checkpointed. If the waiting task's size
is less than this sum, the lower priority tasks are checkpointed. The
Shuffler then restarts its first-pass algorithm to accumulate the
freed-up space and allocate it to the waiting task.
If tasks that
cannot be shuffled fragment the system-controlled partition, the
Shuffler executes the second-pass algorithm once for each fragment of
the partition.
The RSX-llM philosophy
of
checkpointing
in
system-controlled
partitions avoids preempting memory unless it can actually be used.
When the Shuffler is active but not actually executing - for example,
waiting for task I/O or a checkpointing operation to complete - it
places itself in a state in which it may be checkpointed by any task.
No lower priority task is checkpointed unless it is known beforehand
that enough continuous space can be made available to load the higher
priority task. The one exception is a checkpointable task waiting for
terminal input. This task is swapped out unconditionally to make room
for other tasks whenever the Shuffler is activated. It is not brought
back in until the terminal input request is completed.
If the Shuffler completes its second pass without finding space for
the waiting task, it searches for the next system-controlled partition
in the system and exits if none exists.

2.2.4

The Loader (the System Loader Task)

The Loader, which
functions:

resident

RSX-llM

system

task,

has

three

Reading a task, which is either about to start
is being fixed, into memory

executing

Performing a checkpoint write of a task image from memory
disk

Performing a checkpoint read of a task image from
memory (resuming checkpointed tas~s)

The Loader has the single objective of emptying its receive
tasks waiting for its attention.

disk
queue

into
of

The Loader's receive queue, which consists of a list of TCBs,
is
ordered by priority.
When $NXTSK or one of its associated routines
determines that action by the Loader is required, the TCB of the task
to be moved to or from the disk is placed in the Loader's receive
queue and the Executive requests Loader execution. After it has begun

2-15

MEMORY RESOURCE ALLOCATION
executing, the Loader examines two bits in the task status word of
each TCB: the swap bit and the out-of-memory bit.
These bits
determine the Loader's action. The interpretation of these bits is as
follows:
Swctp Bit
(TS.CKP)

Out-of-Memory Bit
(TS.OUT)

Action

The task is read back
into
memory from its checkpoint area.

The task is written from memory
into its checkpoint area.

The task is read into
from its load image.

Illegal combination

memory

When the Loader removes the next entry from its queue, it assumes
memory is available if the task is about to be read (it has been
allocated by $NXTSK). After the Loader writes a task into its swap
area, it calls the release partition routine that in turn calls $NXTSK
to select the next task that will occupy the partition.
The Loader performs several other functions associated
tasks to and from disk. These tasks include:

with

moving

Task Load and Checkpoint Read
•

Copy the task header into the Dynamic Storage Region

•

Initialize task swapping priority

•

Declare receive and receive-by-reference ASTs for the task
the appropriate queues are not empty

Checkpoint Read Only
•

Release space held by the task
space file

within

dynamic

checkpoint

Map the task's address windows to the task
static commons

image

and

attach

the

task's

Task Load Only
•

Checkpoint Write Only
•

Deallocate the Dynamic
header

Storage

•

Place the task's TCB in the partition wait queue

•

Release the partition previously owned by the task.
results in a call to $NXTSK to reallocate the partition.

2-16

Region

copy

This

MEMORY RESOURCE ALLOCATION
2.2.5

The $NXTSK Routine

$NXTSK is a routine in the Executive module, REQSB. $NXTSK works with
both user- and system-controlled partitions and takes a single input:
the PCB address of the partition to be reallocated.
$NXTSK examines
all the TCBs in the partition wait queue of the specified PCB and
attempts to find space in the partition for each waiting task.
When
all TCBs in the queue have been examined, a return to the caller is
executed.
·
$NXTSK is called by routines
partition
to the highest
partition.

that need partitions;
priority task waiting

it assigns a
to occupy the

The inputs and functions of $NXTSK are listed in the following text.

2.2.5.l $NXTSK Inputs - The only input to $NXTSK is the address,
which is in register O, of the PCB of the partition to assign.

2.2.5.2

$NXTSK Functions - $NXTSK has five possible functions:

The partition is not currently busy and a task is waiting to
occupy the partition.
$NXTSK assigns the partition to the
waiting task and places a request on the Loader queue to load
the task.

The partition is currently occupied by a task that is either
of higher priority than all the waiting tasks or is not
checkpointable. In this situation, $NXTSK cannot assign the
partition to another task.

The partition is currently occupied by a lower priority
checkpointable task.
$NXTSK places a request in the Loader
queue to checkpoint the task that owns the partition.

The highest priority task waiting to occupy the partition
needs the main partition that is currently occupied by one or
more tasks that are either of higher priority or are not
checkpointable.
In this situation, $NXTSK cannot assign the
partition to another task.

The highest priority task waiting to occupy the partition
requires the main partition that is currently occupied by one
or more checkpointable tasks of lower priority.
$NXTSK
places a request in the Loader queue to checkpoint each task.

2.2.5.3 $NXTSK Operation in a User-controlled Partition - If the
partition
being reallocated is a task partition, $NXTSK first
determines if the requested space in the partition is unused.
If it
is, the task is assigned the space and a request to read the task into
memory is issued to the Loader.
If the space is being used by another task, $NXTSK calls $TSTCP to
determine if the task or tasks occupying the partition can be
checkpointed by the requesting task. If the task or tasks can be
checkpointed by the requesting task and if checkpointing will produce
enough space for the requesting task, $NXTSK calls $ICHKP to initiate
a checkpoint of the task or tasks that occupy the space.

2-17

MEMORY RESOURCE ALLOCATION
When the Loader completes the checkpoint write of the tasks that
occupy the partition, it calls $NXTSK again to allow the requesting
task to find the newly vacated space in the partition.

2.2.5.4 $NXTSK Operation in a System-controlled Partition - If the
partition being reallocated is a system-controlled partition, $NXTSK
calls $FNOSP to find a·hole in the partition large enough for the
requesting task.
If such a hole is found, $NXTSK assigns to the
requesting task as much of the space in the hole as it requires, and
issues a request to the Loader to read the task into memory.
If $NXTSK cannot find a satisfactory hole, it searches for a
contiquous combination of holes and checkpointable tasks large enough
to form a single hole large enough for the requesting task.
$NXTSK
calls $TSTCP to determine if the memory resident task or tasks can be
checkpointed by the requesting task. If such a combination is found,
$NXTSK calls $ICHKP to initiate a checkpoint of each task in the
potential hole. $NXTSK then returns to the caller, relying on the
Loader to call it again when checkpointing is complete.
Finally, if no combination of contiguous holes and checkpointable
tasks can be found, and if the Shuffler is installed, $NXTSK requests
execution of the Shuffler.

2.2.6

Routines That Call $NXTSK

Examining the routines that call $NXTSK yields information on the
circumstances under which reallocation of a partition occurs. Figure
2-2 shows that such routines tend to fall into two groups.
Routines
in the first group call $NXTSK directly (1 through 5 and A through G
in Figure 2-2). Routines in the second group call routines A through
G. Whe numbers and letters in Figure 2-2 are an index into a table of
short routine descriptions that follow the Figure.

2-18

MEMORY RESOURCE ALLOCATION
IOSUB
OROCP

RATX
$DRATX

$DRECP

$LOAOR

$0RSRF

$0ETRG

$0EMB

ORABO
8

$DRA80

$DR EXT

$0RREO

DR EXP

OREIF

$0REXT

$LOAD A

$DRATX

$0RSND

LOADR

$LOAOR

261 $L~R I

$EXROP

ORATX

LOA OR

REOSB

ERROR

$10FIN

$SSTXT

OREIF

DR RAS

OR REG

ORREO

$0RATP

$DREXP

OR MAP

OREIF

LOAOR

IOSUB

OR RES

TOSCH

201 $C~T I

$CKINT

$NXTSK

$EXROF
$EX RON

REOSB
$ABTSK

$ABCTK

$0ASTT

$RLPAR

$0ASTT
REOSB

$RLPR1

$STPTK

$TSKRT

$ST PCT

$TSKRP
$TSKRQ
TOSCH

---SWAP

Figure 2-2

Routines That Call $NXTSK

2-19

$10ALT
$1000N

SYSXT

SSTSR

TOSCH
31

$DIRXT

MEMORY RESOURCE ALLOCATION
2.2.6.1 Routine Description - The numbers and
letters
in
the
following text are keyed to the numbers and letters in Figure 2-2.
1.

$DRATX - DRATX Module - AST exit directive
Calls $NXTSK if task is stopped at task state.

$DRECP - DRECP Module - Enable Checkpointing directive
Calls $NXTSK when checkpointable task enables checkpointing

$DREXP - DREXP Module - Extend Task directive
Returns to $NXTSK to reallocate the partition after
the P.SIZE word in the task's PCB.

$DRATP - DRRES Module - Alter Task Priority directive
Calls $NXTSK to recallocate the partition due to changed
priority.

$IOFIN - IOSUB Module - I/O finish
Calls $NXTSK after completion of what has previously been
An I/0 operation is
declared
a long-·outstanding I/O.
declared a long I/O by the Shuffler if the operation does not
finish in 1/2 second.

changing

task

Routine that calls $IOFIN:
6.

$IODON/$IOALT - IOSUB Module - I/O done
Calls $IOFIN unconditionally. Most drivers call
$!ODON, or $IOFIN.

$IOALT,

$ABTSK - REQSB Module - Abort task by TCB address
Calls $NXTSK after the task has been marked for abort.
Routines that call $ABTSK:

$DRABO - DRABO Module - Abort Task directive
Calls $ABTSK to actually abort the task.

$LOADR - LOADR Module - Task Loader
Calls $ABTSK if a disk read error occurred while
task.

reading

$ABCTK - REQSB Module - Abort current task
Calls $ABTSK to abort task.
Routines that call $ABCTK:
11. $DRATX - DRATX Module - AST Exit directive
Calls $ABCTK when address check of task stack fails:
$ABCTK aborts the task and the next AST is not acted
upon.
12. $DREXT - DREIF Module - Exit directive
Calls $ABCTK if task is already marked for abort.
13. SSTXT - SSTSR Module - Common SST processing routine
Calls $ABCTK if task has no SST vector.
14. $DIRXT - SYSXT Module - Directive exit (context switch)
Call $ABCTK if address check of task fails.

$DASTT/$QASTT - REQSB Module - Declare or Queue (non-I/O) AST
to task.
$QASTT calls $NXTSK if task is not stopped:
$DASTT calls
$QASTT.

2-20

MEMORY RESOURCE ALLOCATION
Routines that call $DASTT:
16. $DREXT - DREIF Module - Exit directive
Calls $DASTT to act upon floating-point,
receive ASTs on task exit.

powerfail,

and

17. $DRSRF· - DRMAP Module - Send-by-Reference directive
Calls $DASTT to act upon receive-by-reference AST
receiver. ·

for

18. $ORSND - DRRAS Module - Send Data directive
Calls $DASTT to act upon receive AST for receiver.
19. $LOAOR - LOADR Module - Task loader
Calls $DASTT for receive and receive-by-reference ASTs if
task queues are not empty when task is brought into
memory.
Routine that calls $QASTT:
20. $CKINT - TOSCH Module - Clock interrupt service routine
Calls $QASTT when mark time request has expired.
D.

$RLPAR/$RLPR1 - REQSB Module - Release partition
Calls $NXTSK to allow next highest priority task
partition.

occupy

Routines that call $RLPAR/$RLPR1:
22. DREXT - DREIF Module - Exit directive
Calls $RLPAR when task exit is complete.
23. $DETRG - DRREG Module - Detach Region directive
Calls $RLPR1 when a dynamic common regilJn with a "delete
on last detach" attribute is detached by the last task
and is deallocated from a system-controlled partition.
24. $LOADR - LOADR Module - Task loader
Calls $RLPAR upon completion of a checkpoint write
task.
E.

$STPCT/$STPTK - REQSB Module - Stop (current) task
Calls $NXTSK after setting task's stop bit.
Routine that calls $STPCT/$STPTK:
26. $LOADR - LOADR Module - Task loader
Calls $STPCT to set its own stop bit when waiting
work.
Note: Many privileged system tasks call $STPCT.

for

$TSKRT/$TSKRP/$TSKRQ - REGSB Module - Request task execution
Calls $NXTSK to force reallocation of task's partition, if
task is not fixed or active.
Routines that call $TSKRT/$TSKRP/$TSKRQ
28. $DRREQ - DRREQ Module - Task Request directive
Calls $TSKRP to request desired task.
29. $QEMB - ERROR Module - Queue error message block
Calls $TSKRT to request error logger to run.

2-21

MEMORY RESOURCE ALLOCATION
30. $EXRQP/$EXROF/$EXRQN
REQSB Module
Execute
task
request
Calls $TSKRT after clearing task's stop bit on internal
executive request of task (TKTN, LOADR, etc).
31. $CKINT - TOSCH Module - Clock interrupt service routines
Calls $TSKRT to carry out a schedule request after a
clock queue has expired.
G.

2.2.7

SWAP - TOSCH Module - Disk swapping algorithm
Calls $NXTSK during scan of all partitions in system.
is called:

$NXTSK

•

Whenever a system-controlled partition is encountered

•

Whenever the swapping priority of a task is reduced

Routines That $NXTSK Calls

2.2.7.1 $CBKPT Routine - $CHKPT checkpoints a task. When an Executive
routine calls $CHKPT, all the conditions necessary for a task to be
checkpointable have been met. If dynamic allocation of checkp6int
space has been selected as a SYSGEN option, $CHKPT searches the
checkpoint files for available space by using the $FNDSP routine.
If
this search fails, or if dynamic allocation of checkpoint space was
not a selected option, $CHKPT determines if checkpoint space is
allocated within the task's disk image file.
If checkpoint space is
found in either the dynamic checkpoint space or the task image file,
$CHKPT issues a checkpoint request to the Loader and requests
execution of the Loader.
If no checkpoint space can be found, $CHKPT requests the TKTN task
print a message that so informs the user.

The method used ~Y the Executive to allocate space within the
checkpoint file is identical to the method used to allocate space
within a system-controlled partition.
In both cases, a main PCB
describes the overall area of allocation (main partition or entire
disk file) and a sub-PCB describes a single fragment of the area
(sub-partition for the task or portion of the checkpoint file reserved
for one task image). In addition, both algorithms use $FNDSP to find
a hole of the required size within the area described by the main PCB.

2.2.8

$FNDSP Routine

$FNDSP tries to find space in a PCB list in a system-controlled
partition for a PCB. It searches through the list until it finds a
large enough hole. If it finds a large enough hole, $FNDSP links the
PCB into the list. If it does not find a hole, $FNDSP sets the C-bit
before returning to the calling routine.

2-22

MEMORY RESOURCE ALLOCATION
2.2.9

$ICBKP Routine

Other routines call $ICHKP to begin the checkpointing process for
task that owns a partition. $ICHKP has three possible functions:

If the task is already being checkpointed, $ICHKP immediately
executes a return to the calling routine.

If the task is being read into memory or has outstanding I/O,
$ICHKP marks the task for checkpointing. If the task is
being read into memory, the Loader detects that the task is
marked
for
checkpointing
when the read is done and
immediately checkpoints the task.
If the task has I/O
outstanding, $IOFIN in the IOSUB module is entered when the
I/O is complete. $IOFIN detects the checkpoint request and
checkpoints the task.
However, terminal I/O that has been
buffered is not included in the I/O count of a task.

If neither 1. nor 2.
checkpoint the task.

2.2.10

above are true, $ICHKP calls $CHKPT to

$TSTCP Routine

Other routines call $TSTCP to determine if a task that owns space in a
partition (owner task) can be checkpointed by a task that is
requesting space in the same partition (requesting task).
There are
two conditions that must be met before the requesting task can
checkpoint the owner task.
First, the owner task must be eligible for checkpointing.
eligible for checkpointing if:
•

It is neither fixed nor being fixed

•

It was taskbuilt or installed as checkpointable

•

It does not have checkpointing disabled

task

The second condition for checkpointability is that the requesting task
must have a default priority higher than the effective priority of the
owner task.
Two factors may make the effective priority of a
memory-resident task different from its default priority:
1.

Tasks that are stopped, or that are stopped for terminal
input and do not have outstanding ASTs, have an effective
priority of zero.

In a system that includes the disk swapping of equal or
nearly equal priority tasks, the effective priority of a task
that is in memory is the sum of its default priority (from
the TCB) and its swapping priority (from the task headerl.

If these two conditions are met, the calling routine is informed that
the requesting task can checkpoint the owner task. Note that the
presence of outstanding I/O belonging to the owner task is not
detected by this routine.

2-23

MEMORY RESOURCE ALLOCATION
2.3

MEMORY ALLOCATION FLOW DIAGRAMS

Memory allocation within partitions is managed by two types of
routines in RSX-llM. Routines in the first group detect the presence
of conditions that indicate reallocation of space within a partition
is necessary.
Routines in the second group (headed by the $NXTSK routine) find or
create space for a · task within a partition, and load the task into
that space. In other words, the first group of routines determines
when memory allocation should take place and the second group of
routines does the reallocation.
This flow diagram section contains flow diagrams of $NXTSK and the
routines that it invokesu
It also contains flow diagrams of the
Loader, Shuffler, $ALOCB, and $DEACB.

2-24

MEMORY RESOURCE ALLOCATION
2.3.1

$ALCLK Logical Flow Diagram
REFERENCES:
SALCLK:
ALLOCATES A CLOCK
QUEUE BLOCK FOR A
CLOCK QUEUE ENTRY.
$ALPKT:
ALLOCATES A BLOCK FOR
A SEND OR 1/0 REQUEST
QUEUE ENTRY.

SA.,_L_C_L...,K...
:: _ _ _ _ _ _ _ _ _ _ -

PICK UP LENGTH OF
CLOCK BLOCK.

C. LGTH

I. LGTH

10$
SALPKT

;..SA_L-.P_K_T_ _ _ _ _ _ _ _ _ _ -

GET LENGTH OF 1/0
PACKET.

0------""'"------- - - - - - - - -

$ALOCB
FIGURE 2-4

CALL $ALOCB.

------------- IF BLOCK ALLOCATED,
RETURN TO CALLER.
OTHERWISE, TRAP TO SET
DIRECTIVE STATUS
(DRSTS).

Figure 2-3

$ALOCB

- - - D. RS1
$ALO CB
FIGURE 2-4

$ALCLK Logical Flow Diagram

2-25

MEMORY. RESOURCE ALLOCATION
2. 3. 2

$ALOCB Logical Flow I>iagram

REFERENCES:
----------·-.-.-- - - - -

- - - - SYSCM,$CRAVL,$PKAVL

$ALOCB BEGINS WITH A
REFERENCE TO $CRAVL IN
SYSCM. $CRAVL·2 CONTAINS
A 3 USED TO ROUND A
REQUEST UP TO THE NEXT
4-BYTE BOUNDARY. (A
REQUEST FOR 10. BYTES GETS
12 BYTES.) $CRAVL IS THE
LIST HEAD FOR THE LIST
OF DYNAMIC FREE MEMORY
BLOCKS. $CRAVL + 2 IS ZERO
BECAUSEITISTHELENGTH
OFTHEFREEBLOCKREPR&
SENTEO BY $CRAVL THERE
ARE TWO ENTRY POINTS:
$ALOCB ANO $ALOC1. $ALOC:B
MAKES USE OF PRE·
ALLOCATION OF 1/0 PACKETS,
A SYSGeN OPTION. $ALOC1
ALLOCATES BLOCKS FROM
DYNAMIC MEMORY OTHER
THAN THAT POINTED TO BY
$CRAVL

$ALOCB::

] - - - - - - - - - - $CRAVL

POINT TO ALLOCATION
MASK WORD ($CRAVL·2).
ROUND TO NEXT 4·BYTE
BOUNDARY.

IS REQUEST G LENGTH?

=:J----0

:RT 2

PART2

Figure 2-4

$ALOCB Logical Flow Diagram (Part 1 of 2)

2-26

MEMORY RESOURCE ALLOCATION
PART 1

REFERENCES:

----------- DOES REQUEST SIZE•
PREALLOCATED BLOCK?

- - - - I. LGTH

PART2

IF PRE-ALLOCATED BLOCK
AVAILABLE:
UNLINK PACKET,
SUBTRACT ONE FROM
NUMBER OF PACKETS,
RETURN

IF PRE·ALLOCATEO BLOCK
NOT AVAILABLE:
POINT TO $CRAVL·2
$ALOC1::
ROUND TO NEXT 4·BYTE
BOUNDARY.

5$
30$

ZERO LENGTH REQUEST?

PART2

11J$

3(1J$

LAST BLOCK?

PART2

10$

BLOCK BIG ENOUGH?

PART2

LINK BLOCK IN CHAIN.
CALCULATE AND RECORD
REMAINING SIZE.

30$
RETURN TO CALLER

Figure 2-4

$ALOCB Logical Flow Diagram (Part 2 of 2)

2-27

MEMORY RESOURCE ALLOCATION

2.3.3

.$CBKPT Logical Flow Diagram

$CHKPT::
REFERENCES:

___________
FD-----!':~:DIX
..
USE SAVNR CO-ROUTINE
TO SA VE R4 AND R5.

--<J

CLEAR CHECKPOINT ALLOCATIOJ- FAILURE.

·- -

8: CO-ROUTINES

~~~~~.

T.ST2
$ALOCB, P.SIZE

ATTEMPT TO ALLOCATE PCB.

------P-CB_A_L_L~O-C_A_T-ED-7----~~~T1
.-------i..-----·-- - - - - - - - - $CFLPT
ALLOCATION SUCCESSFUL.
CALCULATE NUMBER
OF BLOCKS NEEDED IN
DYNAMIC CHECKPOINT
FILE.
POINT TO DYNAMIC
CHECKPOINT FILE LISTHEAO

10$

ANOTHER CHECKPOINT
FILE EXIST?

30$

~ PART 2

DEALLOCATE CHECKPOINT]- -

$DEACB

- - T2.CAF, T.ST2

PCB.

----------------20$

SET DYNAMIC CHECKPOINT
SPACE ALLOCATION FAILURE
]
IN TASK'S TCB

PART2

Figure 2-5

$CHKPT Logical Flow Diagram (Part 1 of 2)

2-28

MEMORY RBSOORCE ALLOCATION

PART 1
REFERENCES:

r------------.- ---------IS CHECKPOINT SPACE
ALLOCATED WITHIN TASK'S
DISK IMAGE FILE?

T3.CAL, T.ST3

60$

PART2

- - - - - - - - - - - - - - - - - - - - - - - - $TKNPT
REQUESTTKTN TO PRINT
T. STAT
MESSAGE ABOUT ALLO·
$EX RON
CATION FAILURE.

26$
RETURN TO CALLER THROUGH
SAVNR CO-ROUTINE.
3(1$

------------.- - ALLOCATION IN FILE
TURNED OFF?

- - - - - - - - P. REL
10$
PART 1

- - - - - - - - - - - - - - - - - - - - - ---$FNDSP
CALL $FNDSP TO FIND
OUT IF ENOUGH SPACE
EXISTS TO CONTAIN
IMAGE OF THIS TASK.

1(1$

SPACE IN FILE?

PART 1

50$
------------- - - - SET CHECKPOINT IN
PROGRESS BIT

- - ----TS. CKP, T. STAT

-------------- - - - PLACE TCB OF TASK TO BE
CHECKPOINTED IN LOADER
QUEUE AND CALL LOADER
VIA $LOADT AND
$EXROP

- - - - - - $LOADT
$LDRPT
$EXROP

Figure 2-5

$CHKPT Logical Flow Diagram (Part 2 of 2)

2-29

MEMORY RESOURCE ALLOCATION
2.3.4

$DECLK-$DEPK'l'-$DEACB Logical Plow Diagram

REFERENCES:

$DECLK::
DEALLOCATES A CLOCK
QUEUE BLOCK.
$DEPKT::
DEALLOCATES A SEND
OR 1/0 REQUEST
BLOCK.
$DEACB::
DEALLOCATES ASTOR·
AGE BLOCK (PACKET)
FROM A LIST OF PRE·
ALLOCATED PACKETS
FROM POOL SPACE.
OPERATIONAL IF PREALLOCATED 1/0 PACKETS
ARE AVAILABLE (Q$$0PT
OPTION IN SYSGEN).
OTHERWISE, $DEAC1::
IS USED.
$DEAC1::
DEALLOCATES A STORAGE
BLOCK FROM DYNAMIC
MEMORY OTHER THAN POOL
SPACE. IF A LOWER OR
HIGHER ADJACENT B'LOCK
IS FREE, THE BLOCKS ARE
MERGED TO PRODUCE ONE
FREE BLOCK.

------------- - - - - - - - - -- $DECLK::

PICK UP LENGTH OF
CLOCK BLOCK.
BRANCH TO SDEACB.

Figure 2-6

C. LGTH, $DEACB

$DEACB
PART2

$DECLK-$DEPKT-$DEACB Logical Flow Diagram (Part 1 of 5)

2-30

MEMORY RESOURCE ALLOCATION

REFERENCES:
$DEPKT::

. . . .PICK
--- - - - - - - - - - - - - - - - - - - - - - t. LGTH
UP LENGTH OF 1/0
PACKET.

,______...______.,._ - - - - - - "!'"9---$0EACB::

$CR~VL

(SEE $CRAVL DISCUSSION IN
$ALOCB LOGICAL FLOW DIAGRAM)

POINT TO ALLOCATION
MASK WORD ($CRAVL

-2)
ROUND LENGTH TO NEXT
4-BYTE BOUNDARY.

8(1$

LENGTH• '1?
NO BLOCK TO RELEASE.

PARTS

- - - - - - - 1.LGTH
3G$

LENGTH= 1/0 PACKET LENGTH?

PART3

---------------- - - - MAXIMUM NUMBER OF
PACKETS ALLOCATED?

$PKMAX

30$
PART3

INCREMENT COUNT OF
AVAILABLE PACKETS BY 1.

LINK PACKET INTO LJST

RETURN TO CALLER.

Figure 2-6

$DECLK-$DEPKT-$DEACB Logical Flow Diagram (Part 2 of 5)

2-31

MEMORY RESOURCE ALLOCATION

$0EAC1::

TO~

REFERENCES:

ROUND LENGTH
4-BYTE BOUNDARY~

~RETURN

LENGTH• Q?~TO CALLER

30$
SAVE ADDRESS OF LISTHEAD
ON STACK (IF ERROR
CHECKING, R$$DER. IS
OPERATIONAL).

40$
GET ADDRESS OF CURRENT
BLOCK ANO NEXT BLOCK.

NEXT BLOCK

QI~ 50 $

(END OF CHAIN~PART 3

NEXT BLOCK ADDRESS
HIGHER OR EQUAL?

50$
NEXT BLOCK ADDRESS
LOWER. ADD SIZE
TO ADDRESS OF THIS
BLOCK TO GET ADDRESS
OF POSSIBLE NEXT BLOCK.

PART4

Figure 2-6

$DECLK-$DEPKT-$DEACB Logical Flow Diagram (Part 3 of 5)

2-32

MEMORY RESOURCE ALLOCATION

PART3

REFERENCES:
--------------- ILLEGAL ADDRESS?

--------------- - -

CARRY STAT

CRASH

- - -

-- -

#$CRAVL

56$

DEALLOCATION IN EXEC POOL?

PART4

DEALLOCATION IN FRONT
OF START OF FREE SPACE?

CRASH

DEALLOCATION PAST END
OF EXEC POOL?

CRASH

56$
COMPARE CALCULATED ADDRESS
TO ADDRESS OF NEXT BLOCK

90$

NEXT ADDRESS LOW?

PARTS

60$
NEXT ADDRESS NOT EQUAL?

PART5

ADDRESS OF NEXT FREE
SPACE EQUALS END OF
THIS BLOCK. MERGE
BLOCKS AND ADJUST
LINK.

PART

Figure 2-6

$DECLK-$DEPKT-$DEACB Logical Flow Diagram (Part 4 of 5)

2-33

MEMORY RESOURCE ALLOCATION

PART 4
REFERENCES:

68$
COMPARE ADDRESS AND L'ENGTH
OF PREVIOUS FREE BLOCK To·
ADDRESS OF BLOCK BEING
RELEASED.

DEALLOCATION JN

POOL7

exec

-> ~:s:- -

F-r~

#$CRAVL

65$
IF BLOCK BEING
RELEASED IS
ADJACENT TO PREVIOUS
BLOCK, MERGE BLOCKS
ANO ADJUST LINKS.

7fJS

OTHERWISE, SET SIZE
OF BLOCK BEING RELEASED.
POP LISTHEAD ADDRESS
OFF. STACK.

SGS
RETURN
--,
___
___J
90$
IF NEXT ADDRESS LOWER
THAN SIZE OF BLOCK TO
BE DEALLOCATED, NEXT
BLOCK BETTER BE AT
END OF LIST.

END OF LIST?

===1---8

CRASH

6(1$
PART 5

Figure 2-6

$DECLK-$DEPKT-$DEACB Logical Flow Diagram (Part 5 of 5)

2-34

MEMORY RESOURCE ALLOCATION
2.3.S

$PNDSP Logical Plow Diagram

REFERENCES

$FNOSP::

- - - - - - - - - - - - - - - - - - - - - - - - P.REL,P.SUB
GET STARTING ADDRESS
OF MAIN PCB, HIGHEST
ADDRESS IN LAST PARTITION.

1(1$
GET ADDRESS OF NEXT
PCB.

NEXT PCB EXIST?

PART 1

- - - - - - - - - - - - - - - - - - - - - - - - P.REL
CALCULATE SIZE OF HOLE .

I-- -T:J:~~

..__ _
is_H_o_L_E_B_IG
....
E-No_u_G_H_?_ _...

CALCULATE ADDRESS OF
NEXT HOLE

10$

P.size

P. SIZE

PART 1

20$
------------ CALCULATE SIZE OF LAST HOLE.

-- -

- -

- - - - P. REL
P.SIZE

4(1$

HOLE BIG ENOUGH?

PART1

30$
. . . - - - - - - - - - - - - - - - - - - - - - - - P.REL
HOLE BIG ENOUGH WAS
P.SUB
FOUND FOR REQUESTING
TASK. LINK PCB INTO
LIST.
40$

RETURN TO CALLER.
C·BIT • 1 IF HOLE
NOT FOUND.

Figure 2-7

$FNDSP Logical Flow Diagram (Part 1 of 1)

2-35

MEMORY RESOURCE ALLOCATION
2.3.6

$ICBKP Logical Flow Diagram

$1CHKP::
REFERENCES:
-

-TS.OUT, T.STAT

IS TASK TO BE CHECKPOINTEO
BEING READ INTO MEMORY?

20$
PART 1

-TS.CKP, T.STAT

30$

IS THE TASK ALREADY
BEING CHECKPOINTEO?

PART 1

SET A CONDITIONAL SCHEDLJ- -

$SETCR

REQUEST TO ALLOW NEXT
TASK ON ACTIVE TASK LISI
(ATL) TO RUN.

·-------------------20$

DOES TASK BEING CHECKPOINTEO HAVE 1/0 IN PROGRESS?

PART 1

JUMP TO $CHKPT TO CHECl<:-1
POINT TASK.
~

:--1 - - - - - - - - TS.CKR, T.STAT

20$

SET CHECKPOINT. REQUES'~

RETURN TO CALLING ROUTl;:J

Figure 2-8

$ICHKP Logical Flow Diagram (Part l of l)

2-36

MEMORY RESOURCE ALLOCATION
2.3.7

$NXTSK Logical Flow Diagram
REFERENCES:
SNXTSK::

---------------... -

P.MAIN

P.WAIT

GET PCB ADDRESS OF MAIN PARTITION
TO BE REALLOCATED.

10$
FIND TCB ADDRESS OF FIRST TASK
IN PARTITION WAIT QUEUE.

20$
100$

TCB FOUND?

PART7

--TASK STOPPED WITHOUT PENDING
ASTS7

T.ASTL

40$
PART3

21$

-- 110$
PARTS

SYSTEM·CONTRO LLED PARTITION?

PS.SYS
P.STAT

P.BUSY

T.PCB

50$
PART4

MAIN PARTITION BUSY?

GET REQUESTED SUB-PARTITION
ADDRESS.

PART2

Figure 2-9

$NXTSK Logical Flow Diagram (Part 1 of 7)

2-37

MEMORY. RESOURCE ALLOCATION
REFERENCES:

------....i----·---------------P.BUSY
IS REQUESTED SUB-PARTmON
BUSY?

30$
PART3

,,.2ss
_ _ _ _ _ _....__ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ P.WAIT
REQUESTED SUB-PARTITION IS FREE.
REMOVE TCB OF REQUESTED TASK
FROM PARTITION WAIT QUEUE.
SET PARTITION BUSY FLAG.
PLACE TCB OF REQUESTED TASK
IN LOADER QUEUE AND REQUEST
LOADER.

CONTINUE TO SCAN

PAATI~ 111$

WAIT QUEUE.

Figure 2-9

$QRMVT
T.PCB
P.BUSY
SLOADT

___J

l__/ PART 1

$NXTSK Logical Flow Diagram (Part 2 of 7)
REFERENCES:

AEQUESTEO SUB-PARTITION IS BUSY-I

WAS MAIN PARTITION REQIJESTED?

-------------------

DETERMINE IF OWNER TASK CAN BE

CHECKPOINTED.

P.BUSY

50$

PART4

P.TCB
$TSTCP

IF OWNER TASK CANNOT BE CHECKPOINTED: GO TO NEXT TASK IN
PARTITION WAIT QUEUE ANO
CONTINUE CHECKING ALLOCATION.

20$
PART 1

$1CHKP

CHECKPOINT OWNER TASK.

40$
GO TO NEXT TASK IN PARTITION
WAIT QUEUE ANO CONTINUE
CHECKING ALLOCATION.

Figure 2-9

20$
PART 1

$NXTSK Logical Flow Diagram (Part 3 of 7)

2-38

MEMORY RESOURCE ALLOCATION
51$

REFERENCES:

MAIN PARTITION IS BUSY: LOCATE
FIRST SUB-PARTITION.
61$
- - - - - - - - - - - - . . - - - - - P.BUSY
IF SUB·PARTITION IS BUSY:
P.TCB
CHECK IF OWNER TASK CAN BE
$TSTCP
CHECKflOINTED.

TASK CHECKPOINTABLE?

1fl0S
PART7

NEXT SUB-PARTITION EXIST?

71JS
. . - - - - - - - - - - - - , . . - - - - - - P.BUSY
KEEP CHECKING BUSY SUB·
STSTCP
PARTITIONS AND CHECKPOINTABLE
P.SUB
TASKS. IF PARTITION BUSY AND
P.TCB
CAN BE CLEARED OF TASKS
OR PARTITIONS NOT BUSY,
$1CHKP
THE SPACE IS AVAILABLE.

101$
PART7

Figure 2-9

$NXTSK Logical Flow Diagram (Part 4 of 7)

11GS

REFERENCES:

RE·ALLOCATION OF SPACE IN
A SYSTEM CONTROLLED PARTITION.

----------------------·T.PCB
GET ADDRESS OF REQUESTING
TASK'STCB.

-------------------- FIND .SPACE IN PARTITION FOR
TASK.

$FNDSP

15G$
PART6

WAS SPACE FOUND?

GO REQUEST LOADER TO LOAD
TASK.

25$
PART1

Figure 2-9

$NXTSK Logical Flow Diagram (Part 5 of 7)

2-39

MEMORY RESOURCE ALLOCATION

REFERENCES:

150$
BEGIN SEARCH OF HOLES AND
ADJACENT CHECKPOINTABLE
TASKS LARGE ENOUGH FOR
REQUESTED TASK.

..
1_a0_s_ _ _ _ _ _ _ _,_ _ _ _ _ _ -

-- -

- - P.REL
P.SUB
P.TCB
$SHFPT
$EXRQN

GET PCB ADDRESS OF SUB.. PARTITION
AT END OF HOLE. IF END OF HOLE,
ALSO END OF SYSTEM CONTROLLED
PARTITION, REQUEST EXECUTION
OF SHUFFLER ANO RETURN TO
CALLER, OR RETURN TO CALLER
IF SHUFFLER NOT PRESENT.

SHUFFLER OR CALLING ROUTINE
(RETURN THROUGH SAVNR)

- - - - - - - - - - - - - - - , - - - - - - - - PS.ORV
PS.COM
SUB-PARTITION OWNED BY
166$
P.STAT
LOADED DRIVER OR DYNAMIC
PART7
COMMON?

--------------- OWNER TASK CHECKPOINTABLE?

- - •$TSTCP
165$
PART7

PART7

Figure 2-9

$NXTSK Logical Flow Diagram (Part 6 of 7)

2-40

MEMORY RESOURCE ALLOCATION

REFERENCES:

165$
RESET .SIZE ANO STARTING ADDRESS
OF HOLE AND SCAN PARTITION
AGAIN.

160$

P.REL
P.SIZE

PAAT6

170$
P.SUB
P.MAIN
P.SIZE

TASK IS CHECKPOINTABLE.
CALCULATE NEW HOLE SIZE.

HOLE LARGE ENOUGH FOR
REQUESTED TASK?

160$
PART6

200$
A COMBINATION OF HOLES AND
CHECKPOINTABLE TASKS WILL
YIELD A BIG ENOUGH HOLE.

$1CHKP
P.SUB
P.TCB

CHECKPOINT TASKS.

RETURN
THROUGH
SAVNR

Figure 2-9

$NXTSK Logical Flow Diagram (Part 7 of 7)

2-41

MEMOR'.f RESOURCE ALLOCATION
2. 3. 8

$TSTCP Logical Flow :Diagram

REFERENCES:

$TSTCP::

-----------·---....., -

- -

- - - -

IS TASK STOPPED OR STOPPED
FOR TERMINAL INPUT ANO WITHOUT PENDING ASTs.

- - -

T2.STP

T.ST2

T.ASTL

PART1

----------,-----

S$$WPR, TS.CKP,
TS.CKR, TS.OUT,
T.STAT

4$
PART 1

TASK IN MEMORY?

- - - - - - - - - - - - -..... -

-- -

T.PCB, P.HDR,
H.SPRI, T.PRI

T.PRI

T2.CKD, T2.CHK,
T2.FXD, T2.HLT,
T.ST2

INCLUDE SWAPPING PRIORITY
FROM TASK HEADER IN COMPUTATION OF EFFECTIVE PRIORITY OF TASK.

4 _s_ _ _ _ _ _....__ _ _ _ __, r-

10$

IS OWNER TASK PRIORITY LESS THAN
REQUESTED TASK PRIORITY.

PART1

5$
OWNER TASK MAY BE C H : : - - i
POINTED BY REQUESTED~

----------·---_, -

IS OWNER TASK CHECKPOINTABLE?
(INSTALLED CHECKPOINTABLE,
HAVE CHECKPOINTING ENABLED,
IS NOT FIXED OR BEING FIXED.)

10$
PART 1

20$

RETURN TO CALLING

RO~

10$
TASK OWNING PARTITION NOT
CHECKPOINTABLE SET C-BIT.

Figure 2-10

20$
PART1

$TSTCP Logical Flow Diagram (Part 1 of 1)

2-42

MEMORY RESOURCE ALLOCATION
2.3.9

Loader Logical Plow Diagram

REFERENCES:
,.s_L_o_A_o_R·_.: - - - - - - - - - -.... SWITCH TO SYSTEM STATE.
GET NEXT TCB FROM LOADER QUEUE ..

----------------. IF TCB NOT FOUND, STOP LOADER.
WAIT FOR NEXT REQUEST.

-$SWSTK, $TKTCB, T.RCVL
$QRMVF

-$STPCT

10$
- - - - - - -.....- - - - - - - . -

CHECKPOINT WRITE?

TS.OUT, T.STAT

30$

---------------..,-- COPY TASK HEADER IMAGE
IN OSR TO TASK HEADER IN
TASK.

-T.PCB, P.HOR, P.REL
T.OFF, KISAR6, H.WNO
W.BLVR, H.DSW, H.HOLN

30$
- - - - - - - - - - - - - - - . . , -- -- RETURN TO TASK STATE. GET
ADDRESS OF TASK TCB. ASSUME
READ FUNCTION.

_ _ _ _ _ _ _......__ _ _ _ _ _..,_ - - - -

-LDRTK, T.PCB, T.STAT
ID.ALB. LDRFC

-TS.OUT, 10.WLB, LDRFC

IF CHECKPOINT WRITE, SET
WRITE FUNCTION.

,..s_0s_ _ _ _ _ _.....__ _ _ _ _ _.., __ -- -- -- -LDRBF, A.REL, P.SIZE,
SET STARTING ADDRESS OF
TRANSFER. COMPUTE SIZE OF
TRANSFER ALLOWING PLAS
TASK SIZE TO BE GREATER
THAN 32K. DETERMINE DEVICE
TO BE USED IN TRANSFER. ASSUME
TRANSFER DEVICE IS TASK'S LOAD
DEVICE.

T.OFF, T.LBN, T.LDV

PART2

Figure 2-11

Loader Logical Flow Diagram (Part 1 of 8)

2-43

MEMOR~~

RESOURCE ALLOCATION

PART1

REFERENCES:
-

- -- $---TS.CKP
69
PART2

CHECKPOINT REQUEsn

------------.....---------

-·----------------·--- -

- --

HAS DYNAMIC CHECKPOINT
SPACE ALLOCATION FAILURE
OCCURRED FOR THIS TASK7

-T2.CAF, T.ST2

56$
PART2

--------------- -

-- -

POINT TO CHECKPOINT PCB.
SET RELATIVE BLOCK NUMBER
IN FILE. SET LBN TO LBN OF
CHECKPOINT FILE.

--T.CPCB, P.REL, P.MAIN

60$
PART2

.------------·---t---------56$

-T.MXSZ

CHECKPOINT SPACE IS IN TASI<
FILE. GET PARTITION SIZE AND
CALCULATE STARTING LBN
OF CHECKPOINT AREA.

60$

-------

-SHEAOR, H.LUN

ASSIGN LOADER LUN1 TO TRANSi"
FER DEVICE. LOCK OUT INTERRU

-P.REL, TS.CKP

65$

GET PARTITION ADDRESS.
CHECKPOINT REQUEST?

PART3

-------------------PART3

Figure 2-11

Loader Logical Flow Diagram (Part 2 of 8)

2-44

MEMORY RESOURCE ALLOCATION
PART2
REFERENCES:

- - - - - - -T.OFF
CALCULATE OFFSET TO TASK
IMAGE.

65$
------

LDRLN, UISAR8

DETERMINE TRANSFER SIZE.

70$
------OIRS
EXECUTE 1/0.

------CARRYSTAT
TRANSFER FAILURE BECAUSE
OF NO POOL SPACE.

75$
PART 3

------IOSB

LAST TRANSFER? OR ERROR?

SGS
PART3

65$
PART3

SUCCESSFUL TRANSFER

75S
- - - - - -WSIGS

70$
PART 3

WAIT FOR SIGNIFICANT EVENT.

SGS
------PS,SSWSTK
ALLOW INTERRUPTS. SWITCH
TO SYSTEM STATE.

------TS.OUT
TASK IN MEMORY?
IF NO, CHECKPOINT
WRITE JUST COMPLETED.

110S
PART 5

-------IOSB
SUCCESSFUL WRITE?

90S
PART4

PART4

Figure 2-11

Loader Logical Flow Diagram (Part 3 of 8)

2-45

MEMORY' RESOURCE ALLOCATION

PART3
REFERENCES:

r-----------·---- - - ---

-TS.OUT, $0EACB,
$QINSP, SRLPAR,
P.WAIT, P.MAIN

SET TASK OUT OF MEMORY
DEALLOCATE DSR COPY OF TASK
HEADER. INSERT TASK TCB IN
PARTITION WAIT QUEUE.
CALL $RLPAR TO RELEASE
PARTITION.
DONE.

90$
- - - - - - - - - - - - - - -------T.NCWF,$HEADR,
H.LUN, $DVMSG,
TS.CKP, T.STAT
SET CHECKPOINT WRITE FAILURE.
GET LOADER HEADER POIN'TER.
GET UCB ADDRESS OF WRITE
ERROR. OUTPUTWRITE ERFIOR
MESSAGE.

r-------...._---·---------- 95$

-T2.CAF, T.ST2

$LOADR::
PART 1

SPACE IN CHECKPOINT FILE
EXIST?

96$

USE SAVNR TO SAVE R4 AND RS.
OELINK CHECKPOINT PCB FROM
CHECKPOINT FILE LIST. DE:ALLO·
CATE CHECKPOINT PCB.

IF CHECKPOINT FILE EMPTY
ANO NO LONGER IN USE,
REQUEST TKTN TO PRINT
"CHECKPOINT FILE NOW
INACTIVE".

Figure 2-11

$LOADR::
PART 1

Loader Logical Flow Diagram (Part 4 of 8)

2-46

MEMORY RESOURCE ALLOCATION

REFERENCES:

110$

------------- TASK READ OR CHECKPOINT
READ JUST COMPLETED.
MAPAPR6 TO REAL TASK
HEADER.

- -

P.REL, KISAR6 (M$$MGE)•
T.OFF, KISAR6 (P$$LAS)

- - - - - - - - H.IPS, 1058

120$

SUCCESSFUL READ?

115$

PARTS

H.NLUN, W.BLGH

SALOCB, $TKWSE

P.HDR

SET NUMBER OF TASK LUNs
TO ZERO.

120$

ALLOCATE SPACE FOR TASK
HEADER IN DSR. IF CANNOT
BE DONE, WAIT FOR SIGNIFICANT EVENT ANO RETURN TO 84$.

130$

J
SAVE ADDRESS OF COPY OF
HEADER IN TASK'S PCB.

H.HDLN, H.GARD, H.WND,
H.NLUN,

SET UP TO COPY TASK
HEADER FROM TASK TO
DSR.

140$

- - - - - - - T.STAT

COPY TASK HEADER FROM
TASK TO DSR.

TS.OUT

CLEAR TASK OUT OF MEMORY BIT
TO NOTE TASK IN MEMORY.

c!J

PART6

Figure 2-11

Loader Logical Flow Diagram (Part 5 of 8)

2-47

MEMORY RESOURCE ALLOCATION

PARTS

REFERENCES:
P.HDR, S$$WPR, H.SPRI
GET TASK HEADER ADDRESS.I
INITIALIZE SWAPPING PRIORl:J

-----J

H.WND,$MAPTK

MAP TASK'S FIRST ADDRESS

WINDOW•
..___________________
__

INVALID TASK IMAGE

OR~-

READ ERROR?

H.IPS, IOSB

18G$

PART B

CHECKPOINT READ?

TS.CKP

150$
PARTS

ATTACH-TASK TO STATIC COMMON 1. REGIONS SPECIFIED AT TASK
BUILD.

149$

rs TASK BEING Frxeo rN MEMORY?

H.WND, LDRBK, T.ATT,
AS.RED, W.BLPO, AS.WAT,
$CRATT, $TKWSE, $SWSTK,
W.BATT

I -I :>

JUS~ -

T2.BFX, T.ST2

170$
PART7

$Bl LOS

BUILD A STACK FOR TASK
STARTING ANO PLACE TASK ON
ACTIVE TASK LIST.

15"$

COMPLET~.

CHECKPOINT READ
DEALLOCATE CHECKPOINT
SPACE FROM CHECKPOINT FILE.
DEALLOCATE CHECKPOINT PCB.

PART7

Figure 2-11

Loader Logical Flow Diagram (Part 6 of 8)

2-48

MEMORY RESOURCE ALLOCATION

REFERENCES:

156$
. . - - - - - - - - - - - - - - - -... HAS A CHECKPOINT OF THE TASK
BEEN REQUESTED?

--- -

-TS.CKR

16'1$
PART7

-·TS.CKR, $CHKPT

GET ADDRESS OF TASK TCB.
CHECKPOrNT THE TASK.

16'1$

.......~---- 169$
PART7

DOES TASK ALLOW SEND OR
SEND·BY·REFERENCE?

----------------- ANYTHING IN TASK'S RECEIVE
QUEUE?

-- -

- 165$
PART 7

-------------------- DECLARE RECEIVE AST.

165$

-T3.NSD, T.ST3

-T.RCVL

----H.RCVA,$DASTT

- - -T.RRFL

169

ANYTHING IN RECEIVE-BY-REFERENCE QUEUE?..__,..

PART7

----------------.....-- DECLARE RECEIVE-BY-REFERENCE
AST.

-- -

- H.RRVA, $DASTT

- - --T2.BFX, T2.FXO

RETURN-ENO OF LOADER
RETURN TO $LOAOR::
170$

TASK FIXED IN MEMORY. CLEAR BEING
FIXED FLAG. SET TASK FIXED IN
MEMORY FLAG.

l
RETURN-END OF LOADER.
RETURN TO $LOADR::

Figure 2-11

Loader Logical Flow Diagram (Part 7 of 8)

2-49

MEMOR!' RESOURCE ALLOCATION

REFERENCES:

18G$

TASK UNSUCCESSFULL V READ~

- - - - - - - - - - - T 2 . B F X , TS.EXE

CLEAR TASK BEING FIXED FLAG.
NOTE TASK NOT IN EXECUTION.

I
DO HOUSEKEEPING-CLEAR:
ATTACHMENT DESCRIPTOR
ADDRESS,
NUMBER OF LUNs,
RECEIVE-BY-REFERENCE
CONTROL BLOCK ADDRESS,
FLOATING-POINT SAVE
POINTER,
RECEIVE CONTROL BLOCK
POINTER,
FLOATING-POINT CONTROL
BLOCK POINTER,
POWERFAIL CONTROL
BLOCK POINTER.

- - - - - - - - - - - U I S D R 0 , H.NUN, H.RRVA,
H.FPSA, H.GARO, H.PFVA

I
CHECKPOINT READ DONE?

1--

PLACE TASK ON ATL.

,--5;;,;----SACTTK
PARTS

187$

- - - - - - - - - - - - T S . C K P , TS.CKR, S.CCRF

- - - J -J
NOTE CHECKPOINT READ
FAILURE OCCURRED.

190$

ABORT
TASK.
·------ - - - ] , - - - - - - - - - - - $ABTSK
...

_ _J
RETURN· LOADER DONE.
RETURN TO $LOAOR::

Figure 2-11

Loader Logical Flow Diagram (Part 8 of 8)

2-50

MEMORY RBSOORCB ALLOCATION
2.3.10

Shuffler Logical Flow Diagram
,,,,.....----....- INITL:

- - SHUFFLER INITIALIZATION CODE· ALLOCATE
PCB ANO CLOCK BLOCK

REFERENCES:

.-.-------------.- SWITCH TO SYSTEM STATE VIA
CALL $SWSTK, INITL

-- -

- -

- $SWSTK

$SWSTK

,------------..- ALLOCATE A CLOCK QUEUE
BLOCK VIA CALL $ALOCB FOR
MARK TIME REQUESTS.
ALLOCATE A PCB.

- C.LGTH
$ALOCB
P.LGTH, PCBAD

SSHUFL::

ALLOCATIONS SUCCESSFUL?

.,..._ _ _ _...,....__ _ _ _ _ _ - -

DEALLOCATE POSSIBLE CLOCK
QUEUE BLOCK. WAIT FOR
SIGNIFICANT EVENT.

$SHUFL::
..--------------.- -- SWITCH TO SYSTEM STATE
(CALL SSWSTK, $SHUFL) CLEAR
LOCAL SCHEDULE REQUEST
FLAGS.

- -CLKAO

INITL:

$DECLK
$TKWSE

- - - -

- - -$SWSTK
$SHUFL
ROSCH, RQSCH1

START SCAN OF PARTITIONS
IN SYSTEM.

PART2

Figure 2-12

Shuffler Logical Flow Diagram (Part 1 of 11)

2-51

MEMORY RESOURCE ALLOCATION

PART 1

PASS1:

REFERENCES:

CGET ADDRESS OF NEXT

~CB.

ANY MORE PCBs7

~ EXIT:

~PARTS

15$

IS TASK STOPPED?

----T2.STP T.ST2
16$
,

--------------.------------

PART2
----T.ASTL
15$
PART2

TASK HAVE QUEUED ASTl

]

16$

----TCBAD
P.REL
16$ THROUGH $40 CHECKS, SAVES,
AND ADDS HOLE SIZES. IF PARTITION IS IMMOBILE, SHUFFLER SETS
SCHEDULE REQUEST (LOCAL) AND
CHECKSNEXTPCa

SAVE WAITING TCB ADDRESS.
GET MAIN PARTITION PCB
ADDRESS. GET BASE ADDRESS
OF INITIAL HOLE.

r::.:
20$

J-------P.SUB

~PCB AT END OF HOLE, IF ANY.

PCB FOUND?

- . --(CHECK IF SECOND PASS
PASS 2:
IS REQUIRED)

--------------.------------

PARTS

PART3

Figure 2-12

Shufller Logical Flow Diagram (Part 2 of 11)

2-52

MEMORY RESOURCE ALLOCATION

PART2
REFERENCES:

,....--------------. -- CHECK IF PARTITION CAN BE
SHUFFLED.
UNSHUFFLABLE:
LIBRARY OR COMMON BLOCK,
PARTITION MARKED NOT
SHUFF LAB LE,
LOADED DRIVER,
MARKED BY SHUFFLER
FOR LONG 1/0.

PS.COM, PS.NSF, PS.ORV,
PS.LIO, P.STAT

TS.CKR, TS.CKP, TS,OUT,

ROSCH, P.REL. P.BLKS

40$

SHUFF LAB LE?

PART4

•

CHECK IF OWNER TASK CAN BE
SHUFFLED.
IMMOBILE TASK:
TASK CHECKPOINT REQUESTED,
TASK BEING CHECKPOINTED,
TASK OUT OF MEMORY.

50$
TASK IMMOBILE?

PART4

- - - - - - - - - - - - - - - . -- -- -SET SCHEDULE REQUEST FOR THIS
PARTITION (CHECK LATER).

PART4

Figure 2-12

Shuffler Logical Flow Diagram (Part 3 of 11)

2-53

MBMORf RESOURCE ALLOCATION

PART3

REFERENCES:

4G$

-----P.REL,P.BLKS
20$
PART2

CALCULATE BASE OF NEXT HOLE.

----

T2.CHK

55$

IS TASK CHECKPOINTABLE?

PART4

- - - - - T2.STP

IS TASK STOPPED FOR TERMINAL

75$

1/0?

PARTS

56$
IS SUBPARTITION AT BASE OF
CURRENT HOLE (FROM 40$
OR 16$).
IF SO; NO NEED TO SHUFFLE
OWNER TASK. IT'S REALLY
NOT A HOLE.

-----P.REL

40$
PART4

SAVE CURRENT TASK STATUS.
FREEZE TASK IN MEMORY.
GET ADDRESS OF DUMMY PCB
(FROM INITL:). GET ADDRESS
OF TASK PCB.
COPY TASK PCB.
LINK DUMMY PCB INTO PCB
CHAIN.
SET 5 IN WAIT COUNT FOR

- - - - TSKST, T2.CKD, TS.CKP
PCBAD, P.REL, P.BLKS,
P.SUB, WAITCT, RETURN

SHUFFL:
PART 1

1/0.
RETURN TO USER STATE.

Figure 2-12

Shuffler Logical Flow Diagram (Part 4 of 11)

2-54

MEMORY RESOURCE ALLOCATION

REFERENCES:

POINT TO TCB ANO CALL $CHKPT
TO CHECKPOINT OWNER TASK.
SET LOCAL RESCHEDULE REQUEST
FLAG, ROSCH, TO RECHECK THIS
PARTITION LATER.

EXIT:

T.ST2, $CHKPT, ROSCH

$TXTCB, $CLKHD, CLKAO

RQSCH1

PASS 1:
PART2

END OF PCB SCAN. REMOVE SHUFFLER
CLOCK QUEUE ENTRY IF ONE EXISTS.

MKTIM:
PART5

WAS PARTITION SCHEDULED TO
BE RECHECKED?

CLKAD,$0ECLK,PCBAO
~LGT~$0EACB,$0REXT

CALL $DECLK TO DEALLOCATE
SHUFFLER CLOCK BLOCK.
DEALLOCATE DUMMY PCB.
EXIT.

MKTIM:

C.CSTP, CLKAD, $TKPS
$CLI NS. $STPCT

BUI LO CLOCK QUEUE ENTRY FOR
1/8 SEC. WAIT. INSERT ENTRY IN
CLOCK QUEUE. SHUFFLER STOPS
$SHUFL::
PART 1

ITSELF FOR 1/8 SECOND.
RETURN TO $SHUFL::

Figure 2-12

Shuffler Logical Flow Diagram (Part 5 of 11)

2-55

MEMORY RESOURCE ALLOCATION

PASS 2:
At this point, if no reschedule request has been posted for this partition, the following conditions are valid:.
There is at least one task in the wait queue. The Executive cannot fit the first one in by checkpointing neighboring tasks.
The only place a hole can exist is before the end of a partition or before a partition that cannot be shuffled (hereinafter
referred to as a driver partition).
No tasks in the partition are in the process of being checkpointed.
The following code gets in the next waiting task by checkpointing lower priority tasks and shuffling. No tasks are
checkpointed unless it is absolutely certain that by doing so the next waiting task will fit. This code refers to an area of the
main partition, preceded by the beginning of the main partition or a driver partition and followed by a driver partition or
the end of the main partition, as a section.
The following code determines the number of lowest priority tasks in a section that can be checkpointed to allow the
waiting task to fit. The Executive's task swapping algorithm is also included in this determination.
The key to the swapping algorithm is the swapping priority byte in the task header (H.SPRI). This byte is initialized to
+S$$WPR each time a task is read into memory and TOSCH decrements it periodically as the task resides in memory. The
Executive routine, $TSTCP, adds the swapping priority to the priority byte in the TCB of the task in memory when
determining if a nonresident task may checkpoint that task. In this pass, if there is a task that is not stopped in the wait
queue of the current main system-controlled partition, the Shuffler forms a linked list, one section at a time, of all tasks in
that section by increasing priority (weighted by the swapping priority). As soon as the Shuffler forms this linked list, the
priority bytes in the TCBs are reset to their original values. Traversing this list, the Shuffler accumulates the sizes of all
tasks checkpointable by the waiting task until sufficient size is found or the list is exhausted. The Shuffler adds the
accumulated size to the size of the hole at the end of the section. If enough space is found the task(s) are checkpointed.

PART7

Figure 2-12

Shuffler Logical Flow Diagram (Part 6 of 11)

2-56

MEMORY RESOURCE ALLOCATION

PARTS

REFERENCES:

- - - - - - - - - - - - - - - - - - - - -ROSCH
PASS 1:
PAAT2

IS THIS PARTITION Rl:SCHEDULED?

-------------------- GET ADDRESS OF WAITING TCB.
START PCB LIST SCAN.

-TCBAD

35$
PART7

PIW'--------------'- - - - - - -P.SUB
POINT TO NEXT PCB. IF ENO OF PCB
LIST, GO CHECK NEXT MAIN PCB.

PASS 1:
PART2

1ii5---------------- - - - -

-APRIL

45$
PARTS

CLEAR AVAILABLE SPACE COUNTER.
CLEAR REVERSE PRIORITY LISTHEAD.

4..G,..$...__ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ PS.COM, PS.NSF, PS.ORY
PS.LIO. P.STAT

50$

PARTITION SHUFFLABLE?

PARTS

. - - - - - - - - - - - - - - - - _ _ - - - _P.HOR, P.TCB, H.SPRI,
T.PRI
POINT TO TASK HEADER AND
TCB. ADO IN SWAPPING PRIORITY.

..,$-------------- - - ---

41
,.

POINT TO NEXT IN LIST.
ANY MORE IN LIST?

-APRIL

42$
PARTS

_ _ _ _ _ _ _...__ _ _ _ _..,.._ - - - TASK IN PARTITION LOWER IN
PRIORITY?

-T.PRI

41$
PART7

PARTS

Figure 2-12

Shuffler Logical Flow Diagram (Part 7 of 11)

2-57

MEMORY RESOURCE ALLOCATION

PART7

42$
REFERENCES:
LINK PARTITION TASK I N T ]
LOWER PRIORITY CHECK··
POINT LIST.

45$

.-so.._____________... - - - - - - - - - - - P . R E L , P.MAIN, P.SIZE
P.PP.IL

END OF AREA BOUNDED BY
UNSHUFFLABLE SUBPARTlTION OR END OF PARTITION HAS
BEEN REACHED. PASS 1 OF
SHUFFLER PLACED ONLY HOLE
IN THIS AREA AT END OF AREA.
COMPUTE HOl.E SIZE. BEGIN
SCAN OF REVERSE PRIORITY
LIST.

70$

GETNEXTTCBINLIST.W~ 3GS

~PART7

ONE FOUND?

- - - . - - - - - - - - - - - T . P C B , P.HDR, H.SPRI
T.PRI, $TSTCP
READ JUST TASK'S PRIORffY.
CAN OWNER TASK ON THE RE·
7<1$
VERSE PRIOR ITV LIST BE
PARTS
CHECKPOINTED BY THE
WAITING TASK?
1

- - - - - - - - - -

PART9

Figure 2-12

Shuffler Logical Flow Diagram (Part 8 of 11)

2-58

MEMORY RESOURCE ALLOCATION

PARTS
REFERENCES:

------------- ADO SIZE OF THIS CHECK·
POINTABLE TASK TO THE
SUM OF SPACE AVAILABLE.

P.SIZE

• T.PCB, P.SIZE

70$

CAN WAITING TASK FIT?

CHECKPOINTING THIS TASK WILL
M~.KE ENOUGH ROOM. SAVE
POINTER TO THIS TCB. START RE·
SCAN OF LIST.

PARTS

75$

CAN NEXT TASK BE CHECK·
POINTED BY WAITING TASK?

APRIL

$TSTCP

ICHKP

75$
PART9

INITIATE CHECKPOINT OF OWNER
TASK.

75$

ENOUGH CHECKPOINTING DONE?

PART9

·ROSCH

RESCHEDULE (ROSCH) THIS
PARTITION FOR LATER CHECKING.

80$
ADJUST TASK PRIORITIES
(SUBTRACT SWAPPING PRIORITY)
OF REST OF TASKS IN LIST.

PASS 1:
PART2

Figure 2-12

Shuffler Logical Flow Diagram (Part 9 of 11)

2-59

MEMORY RESOURCE ALLOCATION

SHUFFL:

REFERENCES:
PCBAO, $SWSTK, P. TCB

~
~

SWITCH TO SYSTEM STATE
EXAMINE TASK TO BE SHUF

I.
DOES TASK HAVE OUTST A

NOING

1--1 N>-;;;-T.IDC
PART 10

1/0?

SET LOCAL NO-RELOCATIOf
HAS SHUFFLER WAITED 1/2
FOR 1/0 TO FINISH?

---ROSCH1
EXIT:
RETURN TO
SHUFFL:

RESCHEDULE SHUFFLER ANO
IN 1/8 SEC.

139$
RETURN TO TASK
RETURN TO 117$.

117$

STAT~

___J

:-:::::-i----- - - - A.REL, P.SUB, P.BLKS

SET LIMITS OF TASK IMAG:.:::::.:J

120$

..--s"""'w--1..TC_H.....,.T~O--S...Y~ST~E~M-ST_A_T""'E'....- - - - - - - -

- -SSWSTK, $BLXIO

MOVE TASK IMAGE. CLEAR
LOCAL NO-RELOCATION FLAG.
125$

- - - - ----P.REL
ADJUST TASK PCB TO REFLECT
SHUFFLE.

PART 11

Figure 2-12

Shuffler Logical Flow Diagram (Part 10 of 11)

2-60

MEMORY RESOURCE ALLOCATION
PART 1CI

REFERENCES:

.-1-.35-.S...__ _ __.._ _ _ _ _--.-·-

-TS.CKP, T.STAT, TSKST

CLEAR CHECKPOINT IN PROGRESS.
RESTORE TASK STATUS•

...--------------.- - - - IF 1/0 STILL TO BE DONE,
SET LONG 1/0 BIT,
RETURN TO USER STATE,
GO TO $SHUFL

$SHUFL::
PART 1

--------------,----- IF 1/0 NOT STILL TO BE DONE,
GET ADDRESS OF MAIN
PARTITION PCB AND
CALL $NXTSK TO
REALLOCATE PARTITION.

Figure 2-12

2.4

-PS.LIO, P.STAT

--P.MAIN, $NXTSK

$NXTSK;:

Shuffler Logical Flow Diagram (Part 11 of 11)

MEMORY ALLOCATION DATA STRUCTURES

The two fundamental data structures that are used by the Executive
during memory allocation are the Partition Control Block (PCB) and the
Task Control Block (TCB).
They are both included here for your
reference while you follow the operations of the flow diagrams.

2.4.l

Partition Control Block (PCB)

The PCB serves
routines:

three

major

functions

the

memory

allocation

The PCB contains the starting address and length of the
or subpartition it represents.

The PCB of a main task partition or a system-controlled
partition contains busy flags and is the listhead of a linked
list of subpartition PCBs.
This allows the Executive to
determine the availability of space within a partition.

The main partition PCB serves as the listhead for a linked
list called the partition wait queue.
Tasks that are
competing for space in the partition and are out of memory
have their TCBs linked into this list.

2-61

main

MEMO:RY RESOURCE ALLOCATION

A partition or subpartition may be created in three ways:
1.

By a VMR or MCR S·et command

By the Executive in a system-controlled partition

By the Loader task when loading
system-controlled partition

device

driver

into

Whenever a partition is created, a PCB is allocated from the Dynamic
Storage Region. The PCB is then filled with the starting address and
length of the partition and is linked into the appropriate system
lists.
Partition Control Block, Figure 2-13, describes the
in the Partition Control Block.

2-62

fields

contained

MEMORY RESOURCE ALLOCATION

PARTITION CONTROL BLOCK (PCB)

P.LNK
P.PRI

LINK TO NEXT PARTITION PCB.
P.IOC

P.NAM

PRIORITY OF PARTITION; 1/0 AND
1/0 STATUS BLOCK COUNT.
PARTITION NAME IN RAD6G.

P.SUB

POINTER TO NEXT SUBPARTITION.

P.MAIN

POINTER TO MAIN PARTITION.

P.HDR

POINTER TO HEADER CONTROL
BLOCK (IF M$$MGE NOT DEFINED).

P.REL

STARTING PHYSICAL ADDRESS
OF PARTITION.

P.BLKS/P.SIZE

SIZE OF PARTITION IN BYTES.

P.WAIT

PARTITION WAIT QUEUE LISTHEAD.

P.SWSZ

PARTITION SWAP SIZE.

P.BUSY (2 BYTES)

PARTITION BUSY FLAGS.

P.OWN/P.TCB
P.STAT
P.HDR
P.PRO
P.ATT

TCB ADDRESS OF OWNER TASK.
PARTITION STATUS FLAGS.
POINTER TO HEADER CONTROL BLOCK
(IF M$$MGE IS DEFINED).
PROTECTION WORD FOR P$$LAS
(DEWR, DEWR, DEWR, DEWR).
ATTACHMENT DESCRIPTOR LIST HEAD
(FOR P$$LAS).

Figure 2-13 Partition Control Block (Part l of 2)

2-63

MEMORY RESOURCE ALLOCATION

Partition Status Word Bit Definitions
PS.OUT•'B'lOOOOO
Partition is out of memory
PS.CKP•'B'40000
Partition checkpoint in prograss
PS.CKR•'B'20000
Partition checkpoint is requested
PS.CHK•'a-• 10000
Partition is not checkpointable
Partition is fixed
PS.FXD•'B'4000
Parity error in partition
PS.PER•'B'2000
Marked by shuffler for long
PS.LIO•'B'lOOO
I/O

PS.NSF='B'400
PS.COM•'B'200
PS.PIC•'B'lOO
PS.SYS='B'40
PS.DRV='B'20
PS.DEL•'B'lO
PS.APR='B'7

Partition is not shufflable
Library or common block
Position independent library or common
System controlled partition
Driver is loaded in partition
Partition should be deleted
when not attached
Starting PAR number mask

Attachment Descriptor Offsets
A.PCBL:'L'.BLKW l
A. p RI : I L I • BLK B 1
A. IOC: 'L' • BLKB 1
A• TCB : I L I • BLKW 1
A.TCBL:'L'.BLKW l
A.STAT:'L'.BLKB 1
A.MPCT:'L'.BLKB 1
A• PCB : ' L I • BLKW 1
A• LGTH : I B' •

PCB attachement queue thread
word
Priority of attached task
I/O count through this descriptor
TCB address of attached task
TCB attachment queue thread
word
Status byte
Mapping count of task through
this descriptor
PCB address of attached task

Attachement Descriptor Status Byte Bit Definitions
AS.DEL='B'lO
AS.EXT•'B'4
AS.WRT='B'2
AS.RED='B'l

Task has delete access
Task has extend access
Task has write access
Task has read access

Figure 2-13 Partition Control Block (Part 2 of 2)

2-64

MEMORY RESOURCE ALLOCATION
2.4.2

Task Control Block (TCB)

The TCB contains three major kinds of information:
1.

Links and listheads to other control blocks or queues

Pointers related
Executive

Three words of status information

task

execution

and

needed

the

Other information includes:

• Task priority
• I/O pending count
• Task name
• Task local event flags
• Task default priority
• Task image size
Figure 2-14, Task Control Block, describes

Block.

2-65

the fields

in the Task Control

MEMORY RESOURCE ALLOCATION
UTIL.ITY LINK WORD.

T.LNK

T.PRI

T.IOC

TASK PRIORITY: 1/0 PENDING COUNT

T.CPCB

POINTER TO CHECKPOINT Pee·

T.NAM

TAStC NAME IN RAD5G.

T.RCVL

RECEIVE QUEUE LISTHEAD.

T.ASTL

AST QUEUE LISTHEAD.

T.EFLG

TASK LOCAL EVENT FLAGS
1-32.

T.UCB

UCB ADDRESS FOR PSEUDO
DEVICE "Tl"

T."rCBL

TASK LIST THREAD WORD.
FIRST STATUS WORD (BLOCKING BtTS).
SECOND STATUS WORD
(STATE BITS).

T.STAT
T.ST2

THIRD STATUS WORD
(ATTRIBUTE BITS).

T.ST3

TASK'S DEFAULT PRIORITY.

T.LBN

LBN OF TASK LOAD IMAGE.

T.LDV

UCB .ADDRESS OF LOAD DEVICE.

T.PCB

PCB ADDRESS OF TASK PARTITION.

T.DPRI

T.ATT

MAXIMUM SIZE OF TASK IMAGE
(MAPPED SYSTEM)
ADDRESS OF NEXT TASK IN ACTIVE
LIST.
ATTACHMENT DESCRIPTOR
LiSTHEAD·

T.OFF

OFFSET TO TASK IMAGE IN PARTITION.

T.MXSZ
T.ACTL

RESERVED

l
T.RRFL

T.SRCT

SREF WITH EFN COUNT IN ALL
RECEIVE QUEUES.
RECEIVE BY REFERENCE LISTHEAO.

*OR LINK TO ITBS FOR TASKS CONNECTED TO INTERRUPTS.

Figure 2-14 Task Control Block (Part 1 of 2)

2-66

MEMORY RESOURCE ALLOCATION
Task Status Definitions (* • statement true when bit is on)
F.irst Status Word (Blocking Bits)
TS.EXE•'B'lOOOOO
TS.RDN=-'B'40000
TS.MSG•'B'20000
TS.NRP•'B'lOOOO·
TS.RUN•'B'4000
TS.OUT•'B'400
TS.CKP•'B'200
TS.CKR•'B'lOO

Task not in execution *
I/O run down in progress *
Abort message being displayed *
Task mapped to nonresident partition *
Task is running on another processor *
Task is out of memory *
Task is being checkpointed *
Task checkpoint requested *

Task Blocking Status Mask
TS.BLK•'B'TS.CKP!TS.CKRITS.EXElTS.MSG!TS.NRP!TS.OUT!TS.RDN
Second Status Word (State Bits)
T2.AST•'B'l00000
T2.DST•'B'40000
T2.CHK•'B'20000
T2.CKD='B'l0000
T2.BFX•'B'4000
T2.FXD='B'2000
T2.TIO•'B'l000
T2.CAF='B'400
T2.HLT=-'B'200
T2.ABO='B'l00
T2.STP•'B'40
T2.STP•'B'20
T2.SPN•'B'l0
T2.SPN='B'4
T2.WFR='B'2
T2.WFR='B'l

AST in progress *
AST recognition disabled *
Task not checkpointable *
Checkpointing disabled *
Task being fixed in memory *
Task fixed in memory *
Task is engaged in terminal I/O *
Dynamic checkpoint space allocation
failure *
Task is being halted *
Task marked for abort *
Task stopped *
Task stopped *
Saved TS.SPN on AST in progress
Task suspended *
Saved TS.WFR on AST in progress
Task in waitfor state *

Third Status Word (Attribute Bits)
T3.ACP='B'l00000
T3.PMD='B'40000
T3.REM='B'20000
T3.RPV='B'l0000
T3.MCR='B'4000
T3.SLV='B'2000
T3.CLI='B'l000
T3.RST='B'400
T3.NSD='B'200
T3.CAL='B'l00
T3.ROV='B'40
T3.NET•'B'20

Ancillary control processor *
Dump task on synchronous abort
Remove task on exit *
Task is privileged *
Task was requested as external MCR
function *
Task is a slave task *
Task is command line interpreter *
Task is restricted *
Task does not allow send data
Task has checkpoint space in task
image
Task has resident overlays
Network protocol level

Figure 2-14 Task Control Blocks (Part 2 of 2)

2-67

CHAP1'ER 3
INTERRUPT PROCESSING

3.1

INTRODUCTION

This chapter discusses the internal operation of the RSX-llM interrupt
mechanisms.
Flow diagrams of important routines are included in this
chapter.

3.2

INTERRUPT MECHANISMS

RSX-llM is a priority driven, multiprogramming, real-time operating
system.
As
with any such system, its principle function is
multiplexing the sharable resources among competing tasks.
The
multiplexing itself is made possible by the interrupt system of the
hardware that causes control to be taken away from user tasks and
given to the Executive. It is during this period of interrupt control
that the Executive makes decisions about granting use of shared
resources.
Understanding the interrupt mechanism is fundamental to
understanding the Executive. Once this is understood, the knowledge
serves as a framework for describing the operation of Executive
subsystems (drivers, I/O, etc.) and the system as a whole.

3.2.1

Hardware Interrupt Mechanisms - Review and Overview

The PDP-11 family of computers has two classes of interrupts:
1.

Processor traps

External interrupts

Processor traps cannot be masked (blocked) in any way by altering the
priority of the processor. When p~ocessor traps occur the processor
enters the trap sequence of pushing the PS and PC onto the current
stack (system or user) and retrieving the PS and PC from the proper
hardware trap vector. If no other interrupts are pending when this
occurs, the processor then begins at the location specified by the
trap vector. A table of trap vectors starts at location 0 in low
memory and extends to location 774(8). However, RSX-llM does not use
locations 0 and 2 as vectors. Processor traps include the:
Breakpoint trap (BPT) instruction
Emulator trap (EMT) instruction
Input/Output Trap (IOT) instruction
TRAP instruction

3-1

INTERRUPT PROCESSING

11/40 floating-point exception fault
Odd address
Power fail
Illegal

instructi~n

External interrupts are hardwired to one of the four bus request
levels of the processor. These interrupts are generally associated
with I/O devices and are maskable. They can only cause an interrupt
when the priority in the Processor Status Word (PS) is less than the
priority of the interrupting source. Thus, by setting the processor
priority in a trap vector PS word to an appropriate level, interrupts
equal to or below that priority are locked out.
Every device that causes an interrupt has an associated trap vector in
the vector table located in lower memory. However, not all devices
cause interrupts, therefore, those devices do not have associated trap
vectors.

3.2.2

Executive and Stack Processing

All the vectors in the trap vector table must be initialized properly
so that when a processor trap or interrupt occurs, an Executive
interrupt routine obtains control of the processor.
On an unmapped PDP-11, only one stack exists.
This stack must be
multiplexed to service the user tasks and the Executive. Having only
a single stack also implies a single processor state.
The Executive
must simulate a two state system. A single word, the stack depth
indicator ($STKDP) is used to control this simulation.
On a mapped system, there are two stacks system stack.

the

user

stack

and

the

When the word, $STKDP, is egual to 1 the system is running in the user
state: when it is zero or less, it is in the system state. All stack
multiplexing is accomplished by testing the contents of this word.
Note that the priority set in the PS word for user tasks (both
privileged and unprivileged) is O, and for Executive routines, when
running interruptable, is either 0, 7 or the level at which the
interrupt was taken. These priorities play an important part in the
goal
to
operate
the
Executive
and its associated routines
non-interruptable for as short a duration as possible.
Describing the
RSX-llM
interrupt
mechanism
involves
several
interrelated routines, and it may be necessary for you to read the
following section twice before the process becomes completely clear.

3.3

INTERRUPT PROCESSES

The RSX-llM interrupt machinery involves
routine types:

the

following

routines

Interrupt processor (both external interrupts and traps):
The Interrupt Save Routine ($INTSV):

3-2

INTERRUPT PROCESSING
The Directive Save Routine ($DIRSV);
The Interrupt Exit Routine ($INTXT)1
The Directive Exit Routine ($DIRXT);

and

The Fork Processors ($FORK,$FORKO,$FORK1).
For resident drivers only, the device interrupt vector must be
initialized when defining data structures, and not dynamically. This
practice makes the driver code independent of device register address
assignments and of the actual location of the interrupt vector. The
driver data structure must include a
storage
assignment
and
initialization for the interrupt vector with the priority set to PR7.
Writers of loadable drivers do not initialize the device interrupt
vector. The vector is dynamically established by Load when the driver
is loaded. When a driver is unloaded, Unload sets the vector to the
system nonsense interrupt entry point.
Driver interrupt processing routines are entered directly from the
vector and usually use the INTSV$ macro for state switching services:
at the completion of these services, the interrupt routines are again
given control to complete the interrupt service. The exit routines
$INTXT and $DIRXT restore the state prior to switching to the system
state, control the unnesting of interrupts, and make checks on the
state of the system (for example, is it necessary to redispatch the
processor).
The Fork processing routines linearize access to shared
system data bases. The details of all these routines are discussed
later in the text.

3.3.1

The INTSV$ Macro

INTSV$ is a system macro that minimizes coding differences between
loadable
and
resident
drivers.
INTSV$ contains conditionally
assembled code to handle:
1.

Single or multiple controllers

Loadable or resident drivers

Mapped or unmapped systems

This macro is required for loadable drivers on mapped systems, because
interrupts from hardware devices must be processed in kernel address
space. In particular, the decoding of the PS word and the call to
$INTSV must be done before entering the driver. Thus, a call to the
Executive routine $INTSV within a loadable driver is illegal, and the
MCR Load function returns an error if loading is attempted.
When the INTSV$ macro is used for a loadable driver in a mapped
system, the Load function allocates a block of dynamic memory in
kernel address space to contain the interrupt coding.
This block,
called the Interrupt Control Block (ICB), also contains coding to:
1.

Save the kernel mapping (APRS)

Load APRS to map the driver

Transfer to the driver

Restore the mapping after return

3-3

IRTERROPT PROCESSING
The Load function also sets up the controller's
that hardware interrupts point to the ICB.

interrupt

vector

Finally, the use of the INTSV$ macro in a loadable driver on a mapped
system requires that the symbol LD$xx (where xx is the 2-character
device mnemonic) be defined either in the driver source or the
assembly prefix file RSXMC.MAC.

3.3.1.1

INTSV$ Macro Format - Tne format of the INTSV$ macro is:

INTSV$ xx,pri,nctlr[,pssave,ucbsave]
where:
xx

is the 2-character device mnemonic.

pri

is the priority of the device (the priority
would be used in a call to $INTSV).

nctlr

is the number of controllers the driver services.

pssave

is an optional argument specifying a variable in
which to save the PS word. If omitted, a variable
named TEMP is used.

ucbsave

is an optional argument specifying a block of
contiguous
words
in
which to retrieve the
interrupting device's UCB address. If omitted, a
block of contiguous words named CNTBL is used.

Outputs:

is the controller index, only if nctlr is
than 1.

is the UCB address.

that

greater

Example:
INTSV$ PP,PR4,P$$Pll

3.3.2

External Interrupt from the Task State ($STKDP•l)

The vectors in lower memory contain a PC unique to each interrupting
source, and a PS set with a priority of PR7. Hence, when an external
interrupt occurs, the hardware pushes the cu·rrent PS and PC onto the
current stack (in this case the task's stack) and loads the new PC and
PS (set at PR7) from the appropriate interrupt vector. The interrupt
routine then starts executing with interrupts locked out. Interrupt
routines may, in fact, be executing in one of three states:
1.

At PR7 with interrupts locked out;

2,.

At the priority of the interrupting source; thus,
levels greater than the source are permitted, or

At Fork level which is at PRO.

interrupt

By internal convention, processing in the PR7 state is limited to
lOOus.
If processing can be completed in this time, then the
interrupt routine simply RTI's; the interrupt has been processed and
dismissed with minimal overhead.

3-4

INTERRUPT PROCESSING
If the interrupt routine requires additional processing time (but does
not intend to alter a shared system data base) it uses the INTSV$
macro. The priority at which the caller is to run is included in the
INTSV$ macro or the call to $INTSV.
With loadable drivers the
Interrupt Control Block calls $INTSV. Therefore, the driver cannot
use a CALL to $INTSV; it must use the INTSV$ macro.
The interrupt save routine, $INTSV, uses the priority specified in the
INTSV$ macro l\ne (the interrupting source priority) to set up the
interrupt routine. At this point in the process, the interrupt
routine is interruptable by devices with priorities higher than that
of the interrupting source. The $INTSV routine then conditionally
switches to system state if the processor is not already in system
state.

3.3.2.l

$INTSV Routine - The $INTSV algorithm is:

$INTSV:

Push RS and R4 onto the current stack.
Decrement stack depth indicator, $STKDP.
Is the stack depth indicator =O?
Save the current
Set up the
M$$MGE) •

System

No;

go to l.

task's in this case) stack pointer.
stack

pointer

(switch

stacks

not

Load the new processor priority as specified by the caller.
Return to caller.

Note:
The stack depth indicator, $STKDP, is zero only after
from the user state to the system state occurs.

the

transition

The JSR RS,$INTSV instruction pushes RS on the stack prior to entering
the $INTSV routine.
Pushing of R4 and RS is done to free these
registers for routines processing external interrupts.
It is an
internal programming convention that assumes these routines will not
require more than two registers to accomplish their functions.
If
they do, they must save and restore any additional registers they use.

3.3.2.2 INTSV$ Macro - The interrupt save macro, INTSV$,
shown in Figure 3-1.

3.3.3

expands

External Interrupts from the System State ($STKDP <•O)

The code on this interrupt path is identical to that discussed in
External Interrupt from the Task State. However, it is not necessary
for the task to switch states when the INTSV$ macro is used.
The
current stack is the system stack, and when $INTSV tests the value of
the stack depth indicator, $INTSV bypasses saving the SP and switching
the stacks.
After $INTSV saves R4 and RS on the system stack, it
returns to the driver interrupt routine.

3-S

IRTERROPT PROCESSING
.MACRO INTSV$ DEV,PRI,NCTRLR,PSWSV,UCBSV
.IF NDF L$$DRV 1 M$$MGE 1 LD$'DEV
.IF GT NCTRLR-1
.IF B <PSWSV>
MFP·S TEMP
.IFF
MFPS PSWSV
.ENDC
.IFTF
JSR R5,$INTSV
.IF OF L$$SI1
.WORD PRI
.IFF
.WORD AC<PRI>&PR7
.ENDC

.IFT

.IF B <PSWSV>
MOV TEMP,R4
.IFF
MOV PSWSV,R4
.ENDC
BIC U 77760 ,R4
ASI, R4
.ENDC
.ENDC
GTUCB$ UCBSV,NCTRLR
.ENDM
Figure 3-1

INTSV$ Macro Expansion

; **-$PPINT-PC11 PAPER TAPE PUNCH CONTROLLER INTERRUPT ROUTINE
;-

$PPINT::
INTSV$
MOV
MOVB
MOV
MOV
BMI
SUB
BCS
TSTB
BPL
CLRB

BR
30$:
40$:
50$
60$:

65$:
70$:

CALL
MOVB
JMP
INC
CLR
CALL
MOV
MOV
MOV
SUB
MOV
TST
BPL
MOV
CALL
BR

PP,PR4,P$$Pll
U.SCB(RS) ,R4:
S.ITM(R4) ,S.CTM(R4)
S.CSR(R4) ,R4:
(R4)+,U.CW3(R5)
60$
#1,U.CNT(RS)
50$
U.CW2(R5)
30$
(R4)
40$
$GTBYT
(SP)+, (R4)
$INTXT
U.CNT(RS)
-(R4)
$FORK
U.SCB(RS) ,R4
S • PKT ( R4 ) , RJ.
I.PRM+4(Rl) ,Rl
U.CNT(RS) ,Rl
US .SUC&377 ,RO
U.CW3(R5)
70$
UE. VER&377 ,RO
$!ODON
PP IN I

;;;REF LABEL
;;;GENERATE INTERRUPT SAVE CODE
;;;GET ADDRESS OF SCB
;;;RESET TIMEOUT COUNT
;;;POINT R4 TO CSR
;;;SAVE STATUS
;;;IF MI, ERROR
;;;DECREMENT CHARACTER COUNT
;;;IF CS, THEN DONE
;;;CURRENTLY PUNCHING TRAILER?
;;;IF PL NO
;;;LOAD NULL INTO OUTPUT REGISTER
;;;BRANCH TO LOAD IT
;;;GET NEXT BYTE FROM USER BUFFER
;;;LOAD BYTE INTO OUTPUT REGISTER
;;;EXIT FROM INTERRUPT
;;;RESET BYTE COUNT
;;;DISABLE PUNCH INTERRUPTS
;;;CREATE SYSTEM PROCESS
;POINT R4 TO SCB
;POINT Rl TO I/O PACKET
;AND PICK UP CHARACTER COUNT
;CALCULATE CHARACTERS TRANSFERRED
;ASSUME SUCCESSFUL TRANSFER
;DEVICE ERROR?
;IF PL NO
;UNRECOVERABLE HARDWARE ERROR CODE
;INITIATE I/0 COMPLETION
;BRANCH BACK FOR NEXT REQUEST

Figure 3-2 Example of a Driver Using $INTSV
3-6

INTERRUPT PROCESSING
3.3.4

Processor Traps from the Task State ($STKDP<•l)

when a processor trap occurs from the task state, the hardware pushes
PS, PC, and initiates the routine specified in the associated hardware
trap vector. If an Executive directive causes the trap, EMT 377, the
Directive Parameter Block (DPS) or its address was pushed onto the
user task's stack prior to the issuance of the EMT.
Also, the task can caus·e a processor trap by issuing the SWSTK$ macro.
See Chapter 4 for an explanation of the SWSTK$ macro.
The trap routine, running at PR7, immediately calls the routine $DIRSV
(Directive Save}, which has the following algorithm:
$DIRSV:

Push RS and R4 onto current stack
Decrement stack depth indicator.
Is the stack depth indicator

<~o?

No, go to 1.

Save current task's stack pointer.
Set up system stack pointer (switch stacks if not M$$MGE}.
l.

Push R3, R2, Rl, RO onto current (system} stack.
Load new processor priority as specified by the caller.
Return to caller.

The $STKDP check is made to improve crash analysis;
no other
decisions are made in $DIRSV because all processor traps, with the two
exceptions of the Trap instruction or Powerfail, occur from the task
state.
The exceptions are handled on exit. All registers are saved;
the need for only two registers, RS and R4 is assumed only for
routines processing external interrupts. As with $INTSV, the priority
at which the caller expects to run immediately follows the call.
All
processor trap routines, however, run interruptable.
Only one processor trap can be queued for processing in the system at
any point in time (ignore, for the moment, the two exceptions we have
noted). Because the processor trap occurred in task state, entrance
to the Executive occurs only when the Executive is idle. While in the
system state, only external interrupts can occur. If processor traps
occur, then either they are valid exceptions, or the system itself has
faulted and shuts down.
Once a valid processor trap is pending, it is processed to completion
before any other system routine is given access to any shared system
data base. This strict sequentiality is accomplished with the two
exit routines $INTXT, $DIRXT and the fork processors ($FORK, $FORKO,
and $FORK1).

3.3.4.l Example use of $DIRSV - Figure 3-3 shows
Emulator Trap (EMT} processing routine, $EMTRP.

3-7

the

code

for

the

IRYERROPT PROCESSING

EMT TRAP PROCESSING ROUTINE
THIS ROUTINE IS ENTERED VIA THE VECTOR AT LOCATION 30 WHEN AN EMT
INSTRUCTION IS EXECUTED. THE ROUTINE IS ENTERED IN SYSTEM STATE.
IF THE STACK DEPTH IS NOT 0 AFTER THE DIRSV$ MACRO EXECUTES,
THE SYSTEM CRASHES.
$EMTRP::DIRSV$
.MACRO DIRSV$
JSR R5,$DIRSV
.ENDM
TST
$STKDP
BNE
70$
MOV
@$HEADR
(R3)+,{R3)+
CMP
(R3)+,RS
MOV

111SAVE REGISTERS AND SET PRIORITY

;WERE WE AT STACK DEPTH +l
;IF NE 0 - NO - CRASH SYSTEM
;GET SAVED STACK POINTER
;POINT TO USER PC WORD.
:GET ADDRESS OF EMT +2

.IF DF M$$MGE
MFPI
CMP
BNE
MOV

-{RS)
U04377, (SP)

80$
U, {SP)

:GET DIRECTIVE WORD
:DIRECTIVE EMT 377?
:IF NE 0 -NO;SET SUCCESSFUL DIRECTIVE STATUS

.IFF
CMP
BNE
MOV

U 0 4 3 7 7 , ·• (RS )

80$

U,-(SP)

:DIRECTIVE EMT 377
;IF NE 0 -NO:SET SUCCESSFUL DIRECTIVE STATUS

.IFTF
MOV
MOV
BIC
CLR

fUSRPS,R5
R3, (RS)+

.IF

DF M$$MGB

MOV
MOV
TST
BEQ
CMP

$HEADR,R5
H.WND{RS),RS
W. BLVR+2 {RS)
8S$

(SP) , {R3) +

{RS)

:POINT TO LOCAL DATA
;SAVE ADDRESS OF USER PS
:CLEAR CARRY IN USER PS WORD
;INDICATE NO BYTES

80$:

{SP) , #104376

;POINT TO CURRENT TASK HEADER
;POINT TO NUMB&R OF WINDOW BLOCKS
;CURRENT TASK MAPPED TO EXEC
;IF EQ 0 -NO;IS THIS A CALL TO $SWSTK

(RS),#104376

:IS THIS A CALL TO $SWSTK

85$
$SWSTK
$EMSST

;IF NE 0 -NO;PROCESS CALL TO $SWSTK
:PROCESS SST FAULT

.IFF
CMP
.ENDC

85$:

BNE
JMP
JMP

Figure 3-3

Example of Use of $DIRSV by the $EMTRP Routine

3-8

INTERRUPT PROCESSING
$DIRSV::MOV
DEC
BNE
MOV

R4,-(SP)
$STKDP
10$
SP,@$HEADR

111SAVE R4
:;1SET PROPER STACK DEPTH
:1:IF NE, DON'T SWITCH STAC~S
::;SAVE CURRENT SP

.IF NDF

M$$MGE

MOV

i$STACK,SP

;;;LOAD SYSTEM STACK POINTER

#0
R3,-(SP)
R2,-(SP)
Rl,-(SP)
RO,-(SP)
(RS)
$DIRXT

:;;ALLOW INTERRUPTS
:SAVE REGISTERS R3-RO ON STACK

.ENDC
10$:

MTPS
MOV
MOV
MOV
MOV
CALL
BR

Figure 3-3 (Cont.)

3.3.5

;

;CALL SYNCHRONOUS TRAP ROUTINE
;EXIT FROM TRAP

Example of Use of $DIRSV by the $EMTRP Routine

Processor Traps from the System State ($STKDP <=0)

Only two processor traps are valid from the system state:
the Trap
instruction and Powerfail. If any other processor trap occurs while
in the system state, the system's operation is aborted or XDT,
the
Executive debug tool, is entered if it is present.

3.3.5.l Processing for Trap Instructions
Occurring
in
System
State - The Executive uses the trap instruction as a core saving
technique in returning status following the execution of an Executive
directive.
The EMT 377, which is the processor trap used to initiate
directives, causes entry into the directive dispatcher ($EMTRP)
which
in turn calls $DIRSV.
See Figure 3-3. On return from $DIRSV, but
before calling the directive processing routine, the
directive
dispatcher pushes a value of +l onto the system stack, and clears the
C bit in the PS word stored on the user's stack. It then calls the
proper directive processing routine to execute the directive. Figure
3-4, Stack Stack Upon Entry into/Directive Processing, shows the state
of the user and system stacks for both the unmapped and mapped systems
at the time entry is made to the routine that processes the issued
directive.
The directive processing routine now carries out its function, and in
so doing is free to alter any shared system data base, because no
other routine can gain access to a shared data base until the
directive processing routine is completed. This arrangement of the
stack and interface between the directive dispatcher and the directive
processors has two advantages:
1.

The normal return for all but a few directives is a +l status
and carry clear.
This means the directive routines can
return to the dispatcher with an RTS;
thus the return path
is one word rather than the two needed if a JMP is employed:
this scheme probably saves 100 words in
the
RSX-llM
Executive.

Internal Executive routines can call the directive processing
routines without using an EMT.

3-9

INTERRUPT PROCESSING
UNMAPPED SYSTEM
USER'S STACK

SYSTEM STACK

DPB

TOS ....,_ _ _R4
_ _ _ _..

RETURN AODR
TOS

MAPPED SYSTEM
USER'S STACK

SYSTEM STACK

Tos~-~l._____o_P_e____.J

PS
PC
RS
R4
R3
R2
Rl
RO
+l
RETURN ADR
TOS

Figure 3-4

Stack State Upon Entry into Directive Processing

If a directive processing routine needs to return a status other than
+l, and have the carry stat clear, the routine replaces the +l on the
stack with the value it intends to return and then executes an RTS.
Now to the use of the Trap instruction within the Executive.
If a
directive processing routine must return a status other than +l and,
in addition have the carry stat set, or cleared, based on the status
value returned, it then uses the Trap instruction with the value of
the status to be returned in the low order byte of the instruction.
When the trap processing routine is entered, it immediately checks for
stack depth=O, and if 0, proceeds to reset the stack for correct
exiting from a directive processing routine. The low order byte of

3-10

INTERRUPT PROCESSING
the trap instruction itself overlays the +l status currently on the
stack1
this value is tested and, if minus, the carry stat is set in
the user task's PS word. If plus, the carry stat is left cleared.
After this processing, the exiting code of the directive dispatcher is
entered just as if the directive processing routine had executed an

RTS.

If the initial test for a stack depth indicator of 0 fails, the trap
processing routine calls $DIRSV. This call is logically incorrect if
the stack depth indicator was less than zero. This programming error
is recognized on exit.
On return from $DIRSV, the trap processing
routine checks the stack depth indicator, and if it is not zero, the
system crashes.
Note that directives are legitimate only from the task state (stack
depth indicator•!) so that during directive processing, the stack
depth indicator is always O. Interrupts that occur in system state
disappear from the stack before the directive processing sequence
resumes following an interrupt. Hence, even though the stack can grow
while a directive processing routine is in control, this growth is
transparent to the routines. Stating it from a different perspective,
interrupts are permitted but the directive processing routine that is
in control is unaware of them.
Thus, directive processing routines have three
status:

methods

returning

For the normal return carry clear and
they use an RTS.

status

equal

For carry clear and status other than +l, they overlay the +l
status on the stack with the desired status value (status
value is at 2(SP)) and RTS.

For carry clear or set, and status of one byte, they use the
trap instruction.
This requires more overhead than 1 and 2
above but saves memory, and, of course is the required return
mechanism if carry is to be set.

+l,

Together, these return mechanisms from directive processing routines
save between 200 and 300 words in the RSX-llM Executive as compared to
returning via jump instructions.

3.3.6

Powerfail Processing

When a power failure occurs, the power failure trap processing
routine, PDOWN:
in the POWER module, is entered. This routine
saves the state of the system, sets up a new power failure trap-vector
PC for use when power is restored, calls the user's powerfail routine
if it's defined, then halts.
On restoration of power, the state of the system at the time the
failure occurred is restored, the $PWRFL flag is set indicating that a
power failure has occurred, the reschedule pointer $ROSCH is set, and
the clock is re-enabled. Then, the restoration code issues an RTI,
which results in the resumption of the processing that was in progress
when the power failure occurred. The specific processing to reflect
the occurrence of a power failure does not occur until either
Directive Exit is entered or the clock interrupts. In any event, this
processing is part of Directive Exit and is discussed under Directive
Exit.

3-11

INTERRUPT PROCESSING
Note that power failure processing is not asynchronous.
As much as
1/60 of a second could elapse following restoration before the power
failure is acted upon.
The records and logic needed to provide
asynchronous power failure processing are simply too large for a
system with the memory objectives of RSX-llM.

3.3.7

Processing Within Interrupt Routines

In this section, we detail the events that take place following
interrupt entry up to the point where the Executive is ready to return
control to the task state.
Once the Executive is entered via an interrupt (regardless of the
state it is in when the interrupt occurs) it does not again return to
the task state until all system related processing for that interrupt
has been completed.
A single interrupt in the task state causes transfer into the system
state where the system remains until the interrupt is processed. But
while in the system state, repeated interrupts can occur.
This
implies a fixed interrupt depth of one for the task stack (requiring a
task to provide a stack of at least four words in an unmapped system),
and implies a variable interrupt depth for the system stack.
Because multiple interrupts can occur in the system state, RSX-llM
resolves both of these logical difficulties by strictly linearizing
interrupt processing and access to internal data
bases.
The
mechanisms employed to accomplish this linearization are the system
stack, fork processes, and the associated fork list.

3.3.7.1 Queuing Interrupts on the System Stack - In the system state,
the system must operate interruptable as much of the time as possible.
Three possible conditions can exist when the system itself runs
non-interruptable:
1.

The most recent interrupt is being processed at level ~R7 and
the driver interrupt routine has not yet returned to an
interruptable state.

The interrupt routine has dropped from level PR7 to the level
at which the interrupt occurred. Priority levels, equal to
or less than the priority of the interrupting source are
locked out.

The system is updating a critical list whose consistency can
only
be
maintained by a non-interruptable instruction
sequence. There are two such lists, and we will discuss them
shortly.

In the sections External Interrupts from the Task State and Processor
Traps from the Task State, we examined the code sequence for
processing external interrupts and processor traps, as well as the
stack additions that occurred during their processing. Interrupt
stacking in the system state occurs based principally on hardware
interrupt levels. Thus, if a level PR4 interrupt is being processed,
a level PRS, PR6, or PR7 interrupt can potentially interrupt this
processing and cause context to be stacked and control given to the
higher level interrupt routine.

3-12

INTERRUPT PROCESSING
3.3.8

Fork Processing

Once a driver interrupt routine passes from a non-interruptable to an
interruptable state by using a call to $INTSV or the INTSV$ macro,
processing is at the same level as the priority of the interrupting
source.
However, along any given interrupt path, more processing is
of ten required than the minimum non-interrUptable code sequences in
the
Executive
permit.
Along this path the allowable maximum
non-interruptable processing time is SOOus.
~hus,
a scheme is
required to split interrupt processing routines further, such that
part of their execution runs interruptable to any interrupting source.
The mechanism for achiev~ng this split is called fork processing.
First, and most important, fork processing linearizes access to system
data bases. Thus eliminating unwanted recursion and untimely updates
of these data bases. A list associated with fork processing, the Fork
List, is the method the system uses to linearize data base accessing.
Driver and system interrupt routines are required
following internal conventions:
1.

Use of any registers except R4 and
registers be saved and restored.

Non-interruptable
instructions.

All modifications to system data bases must
fork process.

processing

must

adhere

requires
not

that

the
these

exceed

twenty

via

done

Along an interrupt path, control can be taken from a routine only due
to a higher priority interrupt pending in the hardware. As discussed
previously, these interrupts are kept track of on the system stack.
When an interrupt routine needs to transfer from a non-interruptable
to an interruptable state, or modify a system data base, it must call
$FORK.
$FORK, however, cannot be called directly from an interrupt
routine1 it must first switch to system state by calling $INTSV and
then calling $FORK.
By virtue of calling $FORK, the routine is now interruptable and its
access to system data bases is strictly linear. The Fork List is a
list of system routines, usually I/O drivers, waiting to complete
their processing, in particular, waiting to access a shared system
data base.
When the $FORK routine returns to $INTX1 after placing the fork block
in the fork list, $INTX1 and $DIRXT remove the stacked items for the
driver interrupt routine. In effect the fork list is a secondary
interrupt queue (stack) whose members are processed FIFO, and obtain
processing time only if the system stack is empty.
Note that the context saved for a caller of $FORK depends on which
entry point is called ($FORK or $FORK1), and the context saved is all
that is needed to restart routines on the fork list.
Figure 3-5 Example Driver Interrupt Routine shows the expansion of the
INTSV$ macro and the call to $FORK.

3-13

INTERRUPT PROCESSING
;+
; $XXINT DISK CONTROLLER INTERRUPT ROUTINE
;-

INTSV$

40$:
50$:

TSTB
BEQ
MOV
MOV
MOV
BMI
BIT
BNE
TST
RETURN
MOV
CALL

DK,PR5,R$$Kll

;;;SAVE REGISTERS AND SET PRIORITY

.MACRO INTSV$ DEV,PRI,NCTRLR,PSWSV,UCBSV
.IF NDF L$$DRV 1 M$$MGE 1 LD$'DEV
• IF GT NCTRL:R-1
.IF B <PSWSV>
MFPS TEMP
.IFF
MFPS PSWSV
.ENDC
.IFTF
JSR R5,$INTSV
.IF DF L$$SI1
.WORD PRI
.IFF
.WORD AC<PRI>&PR7
.ENDC
.IFT
.IF B <PSWSV>
MOV TEMP,R4
.IFF
MOV PSWSV,R4
.ENDC
BIC U 77760, R4
ASL R4
.ENDC
.ENDC
GTUCB$ UCBSV,NCTRLR
.ENDM
;;;DRIVE RESET IN PROGRESS?
RTTBL+l(R4)
50$
;7;IF EQ NO
;;;SAVE CONTROLLER INDEX
R4,-(SP)
;;;GET ADDRESS OF SCB
U.SCB(R5) ,R4
;;;GET CONTENTS OF CSR
@S.CSR(R4) ,R4
40$
;;~IF MI DRIVE RESET ERROR
;;;DRIVE RESET COMPLETE?
#20000,R4
;;;IF NE YES
40$
(SP)+
; ; : CLEAN· STACK

....
,,,

(SP)+,R4
$FORK

;;1RESTORE CONTROLLER INDEX
iiiCREATE A SYSTEM PROCESS

CONTROL IS REGAINED AT THIS POINT WITH ALL INTERRUPTS ALLOWED
;-

51$:

MOV
MOV
MOV
MOV
MOV
BITB
BNE

R4,R3
;COPY CONTROLLER INDEX
U.SCB(R5) ,R4
;GET ADDRESS OF SCB
S.CSR(R4),R2
;GET ADDRESS OF CSR
#IS.SUC&377,RO ;ASSUME SUCCESSFUL TRANSFER
S.PKT(R4) ,Rl
;GET I/O PACKET ADDRESS
#IQ.UMD,I.FCN(Rl) ;DIAGNOSTIC FUNCTION EXECUTED?
130$
;IF NE YES

Figure 3-5

Example Driver Interrupt Routine

3-14

INTERRUPT PROCESSING
3.3.8.l $FOR.IC - $FORK is in the file SYSXT. A driver calls $FORK to
switch from a partially interruptable level (its state following a
call on $INTSV) to a fully interruptable level.
Notes:
1.

$FORK cannot be called unless $INTSV has been previously
called.
The fork-processing routine assumes that $INTSV has
set up entry conditions.

A driver's current timeout count is cleared in calls to
$FORK.
This
protects the driver from synchronization
problems that can occur when an I/O request and the timeout
for that request happen at the same time. After a return
from a call to $FORK, a driver's timeout code will not be
entered.
If the clearing of the timeout count is not desired, a driver
has two alternatives:

Perform timeout operations by directly inserting elements
in the clock queue (refer to the description of the
$CLINS routine).·

Perform necessary initialization, including
clearing
S.STS in the SCB to zero (establishing the controller as
not busy), and call the $FORK1 routine rather than $FORK.
Calling $FORK1 bypasses the clearing of the current
timeout count.

The driver must not have any information on
$FORK is called.

the

stack

when

3.3.8.2 $FORK1 - $FORKl is the file SYSXT. A driver calls $FORK1 to
bypass the clearing of its timeout count when it switches from a
partially interruptable level to a fully interruptable level (refer
also to the description of the $FORK routine).
Notes:

3.3.9

For mapped systems with loadable driver support,
fork block is required for calls to $FORK1.

When a 5-word fork biock is used, the driver must initialize
the fifth word with the base address (in 32-word blocks) of
the driver partition. This address can be obtained from the
fifth word of the standard fork block in the SCB.

The driver must not have any information on
$FORK! is called.

the

stack

5-word

when

Exiting the System State

Two routines $INTXT (Interrupt Exit) and $DIRXT (Directive Exit)
result in the sequential removal of all items on the system stack,
followed by all items on the Fork List. The following text discusses
these two routines.
The Executive's objective is to return to the idle state as fast and
as efficiently as possible. It does this by servicing all routines on

3-15

INTERRUPT PROCESSING
the system stack first. These routines are usually running at some
level of non-interruptability.
When the system stack is cleared of
pending requests, the Executive then services the pending requests on
the Fork List.
When both the Fork List and system stack are empty,
the Executive either returns to the task state or if no task is
active, waits for work to do (idles).
$INTXT is transferred ~o by
that are running on the
interrupting source.

external interrupt processing routines
system stack at the priority of the

$DIRXT has the task of servicing the Fork List and, when the Executive
has no more work to do, restoring the task state. $DIRXT is entered
by trap routines, fork routines, and by $INTXT.

3.3.9.l

$INTXT Routine - The $INTXT algorithm is as follows:

$INTXT::

Lock out interrupts.

Is $STKDP=O?

No, go to 1.

Is Fork List empty (check $FRKHD)? No, reload
memory management is not defined and go to 1.

user

this

case)

Allow interrupts.
Store R3, R2, Rl, RO on the current (system
stack.

Execute $DIRXT (Directive Exit).
1.

Increment stack depth indicator.
Restore R4 and RS from current stack and RTI.

Notes:
Interrupts must be locked out to insure a consistent check of $STKDP
and the contents of the Fork List. The same type of lockout occurs in
directive exit. There are two non-interruptable code spans used to
check and update the Fork List. One is in $FORK, and one in $DIRXT.
The saving of R3 thru RO is preparatory to the jump to $DIRXT, which
expects these registers on the stack. Note that the path through the
Executive that finds both the Fork List empty and the stack depth
indicator equal to O is fairly common. This is the minimum overhead
path.

3.3.9.2

Directive Exit - The $DIRXT algorithm is as follows:

$DIRXT::

Lock out interrupts.
Check $FRKHD.

Anything in Fork Queue?

No, go to 1.

Remove entry from Fork Queue and update Fork
pointers.

Queue

listhead

Allow interrupts.
If memory management and loadable drivers are
APRS and map the driver.

3-16

defined,

save

INTERRUPT PROCESSIRG

Restore fork context (registers R4 and RS).
Restore APR5 if memory management is defined.
Call routine whose fork context was restored (CALL @-(R3)).
Go to $DIRXT.
1.

Is rescheduling required ($ROSCH
registers R0-R3 and 90 to 2.

No,

not•O)?

restore

Allow interrupts.
Is t.he power failure flag ($PWRFL) set?

Yes, go to 3.

Clear $ROSCH.
Save context of current task.
Locate a ready-to-run task.
Load and check context of new task.
Map windows of new task for
task privilege.

correct

mapping

determined

Go to $DIRXT.
2.

Restore task stack pointer (from @$HEADR to SP).
Increment stack depth indicator, $STKDP.
Restore R4 and RS from user stack and RTI.

Call power failure processing (CALL $POWER).
Go to $DIRXT.

Notes:
$DIRXT calls both waiting fork processes and the powerfail routine.
These routines terminate via an RTS instruction. On return $DIRXT
again cycles looking for work.
The task reschedule pointer, $RQSCH, controls the redispatching of the
processor.
It points to the location in the STD list where $DIRXT
should begin its scan for a task ready to use the processor.
$RQSCH is set when a change of state has occurred in the system that
might cause a task other than the one currently in control to obtain
processor time. Examples are I/O done, clock queue runout, or a task
doing an EXIT.
The word is reset by $DIRXT just prior to its
dispatching a new task.

3.3.10

Interrupt Processing Code

Figure 3-6 showe the driver and system interrupt code that is used in
processing interrupts.
The lines in Figure 3-6 shows the flow of
control from routine to routine.
The numbers associated with the
lines indicate the sequence of events.

3-17

SFC>RK:: llOV

llOV

CLRB
ADD

llOV
SfORKL llOV
SFORKO:: llOV
CLR

MFPS
MTPS
llOV
MOY
MTPS

R4,-ISPI
U.SClllR51.R4
S.C11AtR41
l!S.FRKffl,R4
ISPl+.IR41
RS.-IR41
ISl'l+.-IR41
-llMI

-151'1
#PR7
R4.-RKH0<2
R4.SFRKH0<2
ISl'I+

;SAllER4
;POINT TO COHTAOl.LER STAl\JS BLOCK
;DISAllLET-OUT
;POINT TO ENO OF FORK llLOCK
;!'UT SAVED R4 IN FORK llLOCK
;SAVE R5
;SAl/10 FORK PC
;"CLEAR LINK TO NEXT FORK llLOCK
;;;SAVE CURRENT l'ROC6liOft PftlORITY
;;;LOCK OUT INTERRUPTS
;;;LINK NEW ENTRY TO OLD LAST ENTRY
;:;SET ADDRESS OF NEW LAST ENTRY
;;;RESTORE PROC£SSOll PRIORITY

.IF OFCSSINT
RETURN
SFORK2:: TST
21R61
MTPS
151'1+

BNE
MOii
MOii

ADD

BR
110:

TST

R4.61R51
R6.R4
"6.R4
SFORKI
ISP!+

w
I

.......
Q)

Rl.-49'1

tlllil+.51'

fR6I

llOV

U~IH~5!.q.f.

SINTSC:: llOV
DEC
BNE
llOV

llOVB
TST
BPI.

160$

10$

MOii

;;;LOAD NEW PRIORITY
;;;CALL THE CALLER MCK

SFllKHD

•

IHI

--= ..-··

;;;UICI( OUT !NnRllUP1S
;;.:STACICDEl'tllZEROl
;;;IFtED-IT"SNOT
;;;ANYTMING IN FORK QUEUE
:;lf£QO-NO
;;;ALLOW!Nna..;SAYE Rl 'll!llOUGH 1111

R2,-15P1
111.-ISPI

R0.-1!1'1

IM.-151'1

;;;SAVE Rf

ISTKDP
111$
SP.-ADR

;;;-TOI STACKSI
;;;IFNEO-NO
;;;SAYE QJRRENT SP

IDIRXT:· llTPS

-1
IERKHD.Rl

. - - - - - - - - . .E

211$
lftllSCH.116

IFNOFMS$MGE

#RJ

ISTKDI'
IOI

Rl.-ISPI

llOV

S.PKTIR41,Rl
S.CSRIR41,R4
RXD61R41.1.PR1i'61Rll
ISl'l'.RJ
=INT£BL.IR41
SFORK--R4,R2
U.SCBIR&l.R4
S.CONCR41.Rl
IR21

llOV

lllC

CALL

.ENOC

.IF OF CSSINT

CALL
llOV

Dll.,PR~R$$Xll

llO\/
llOV
llOV
llOV
lllC

;;;FALL 'll!llOUGH TO SINTXT

SINTXT.: RETURN

;;;POINT JUST AFTER J.WIJ FORK BLOCK

L
1-·n··I

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ___,

-SXX>UNT - INTERRUPT ENTRY POINT
IMlS\1$
llOV

;;;FORK llLOCK ALREADY IN USE
":RESTORE PROCESSOR PRIORITY
;;;IF INUSE -llllANQI
;;.-sAllE R4 IN FORK llLOCK

10$

.:SSTACK..51"

;;;LOM>SYSTEllSTACIC POINTER

llOV
llOV
llOV
llOV

;;;LOCI( OUT INTEllllUl'lS

.;;;AHYnMIG •FORK OUEUU

;;;tfNEO-YES
;;;SCHEOUUNG REQUESTED_
;;;IFtEO-YES
;;;RESTORE 1111 'll!ROUGH R3

tsPl+.81

tSPl+.RZ

llOll

.ENOC
StNTS2:

tRIW+
RS

CALL

lllR!il+

;;;LOAD ISR PR-ITY
;;;$l(lP OVER UNUSED BYTE
;;.'CALL 1511

10$:

-INC

MOii

;;;RELOAD USER SP

ISTKDP
tSPl+.IM
tSPl+.Rli

;;;-NTSTM:ICOEPTH

IR31.IFRIOIO

;;;RElllOllE ENTllY
FOllK QUEUE
;;;lfllEO-llOllEEHTlllES
;;;RESET FOlllC QUEUE LISlHEAll
;;;ALLOW INftlllll.PIS
:l'OINTPASTSAVEllM

;;;RESTORE M -

.____ _ _ _ 2111:
MOii
: RT
I
.IF OF llSSMGE
JIESTOllE KENtfL APft 5
llOV

-·-

SINTXI

l lOV

JOI:

lllTPS
ADD

~$IN"IS\l::MOV
21:

...

#SFlllOIOP-2

#IO.R3

.IFOFLSSDRVMOii
MOii

IM,-csPI
ISTICOP

;;;SAYE R4
;;;lfNEO-NO

MOii

3$
SP.t1$HEAD11

~TCllSTACKSI

;;;LOAD SYSTEM SP

KISAllli.-tsPI

;SAVE-

lll3l.KISAll5

-THEORIVEll

- ----..
MOii

-CR31.IM
-IR31.Rli

CALL

;llESTOllEMMIOll&
;CALL fOllC ROUTINE

.IFT

.IF Df 1.#111
3$:

MTPS
CALL

IRlil
2lllil

Figure 3-6

;;;LOADtEWPRIORITY
;;.-CALL THE CALLER IACK

Interrupt Flow of Control

Rli

.lfTf

.If NDf llSSMGE

.tlSSTACK.sP

JOI

;;;EXIT F - INTERRIPT

DEC

llOV

lllHEADll.11'

.ENOC

t.t1PS
INC

"'
.,,~
.,,
~

.iFNDfKISARS.-ISPI
;;;SAVEKENtfLK.REL-XJ'SWIR61.KISARS;;.-UAP ISR .. KERNEL APR

csPl+.Rl

6&:

llOV
llOV

....
~

tSPl+.KISAll5

;llESTOllEAl'fti

IOlllXT

;TllYEllll-

.ENOC

"'mm....
~

INTERRUPT PROCESSING
3.3.11

Interrupt Processing Sammary

The following seven types of routines not only comprise the interrupt
system, but practically comprise the entire Executive itself:
External Interrupt Routines
Trap Routines
Interrupt Save
Directive Save
Fork and Fork Processes
Interrupt Exit
Directive Exit
External interrupts cause traps to external
routines which run in one of three states:
1.

Non-interruptable at PR7.
They run here when initially entered.

Interruptable by
source.

priorities

higher

interrupt

than

the

processing

interrupting

Both states 1 and 2 are linearized being queued and
from the system stack.
3.

dequeued

Fully interruptable as fork processes.

Trap routines, of which only one may occupy the system stack during
any given passage through the Executive, operate at priority level
zero, need never call Fork, and operate entirely from the system
stack.
Interrupt save is called by driver interrupt routines when they make a
transition from non-interruptable to interruptable.
Directive save is called by trap routines.
Fork creates a fork process for external interrupt routines.
Interrupt Exit unstacks waiting routines from the system
when the system stack is empty drops into Directive Exit.
Directive Exit gives control to waiting fork
power failure, and redispatches the processor.

processes,

stack,

and

processes

The Executive structure has a sequentiality which obviates the need
for any explicit synchronizing mechanisms.
Privileged tasks that
follow the internal conventions of the Executive are never concerned
with multiple-update of shared system data bases. While progressing
toward the idle state the Executive gives priority to routines on the
system stack, then to fork processes.

3-19

CHAPTER 4

PRIVILEGED TASKS

4.1

INTRODUCTION

This chapter discusses privileged tasks: what they are,
the
to the system that they present, and how they are mapped.

4.2

hazards

PRIVILEGED TASKS

A privileged task has a special access to memory locations and devices
that a nonprivileged task does not have.
Specifically, certain
privileged tasks can examine and use the values in system control
blocks.
These tasks can also examine and use Executive code. Also,
certain privileged tasks can directly access the device registers in
the I/O page.
A privileged task can read from or write to a volume
whether or not that volume is mounted
(via the Mount command)
or
allocated to another user. These abilities imply that a privileged
task has every ability that the Executive has, and, in fact, it does.
It may be helpful to conceive of the privileged task as part of the
Executive because certain privileged tasks are mapped with the
Executive and I/O page.
See Task Mapping in this chapter. As the
writer of a privileged task, you are obliged to take every precaution
so as not to damage the Executive, system, or user code and data.

4.2.1

Privileged Task Hazards

Privileged tasks are potentially hazardous to a running system.
A
privileged task can corrupt the system and disable devices. Bugs in
these tasks are obscure and difficult to find.
For these reasons, you
must be cautious when developing and running a privileged task.
Make certain that your privileged task has completed its operation
when you log off the system (say "BYE").
BYE does not abort
privileged tasks as it does nonprivileged tasks. BYE cannot abort a
privileged task because the privileged task may be in the process of
changing the system data base.
Therefore,
it must be allowed to
complete
its processing.
Also,
if the privileged task is in
system-state, BYE or no other task can execute until the privileged
task completes its processing while in system-state. However, when
the privileged task leaves system-state, BYE runs and logs you off the
system, leaving the privileged task still in operation.
If a processor trap occurs in a privileged task while the task is in
user-state, the Executive aborts the task. However, if the processor
trap occurs in the privileged task while the task is in system-state,
the system crashes. However, even while in user state the privileged
task that is mapped to the Executive can cause a system crash by

4-1

l~RIVILEGED

TASKS

incorrectly changing system data. Please note that a privileged task
in user-state should not be modifying system data.
Note that all tasks in an unmapped system can access all of memo~y.
The privileged or nonprivileged designation has no particular meaning
in an unmapped system. However, be just as careful about modifying
Executive, device, or user data in an unmapped system.

4.2.2

Specifying a Task as Privileged

To specify a task as privileged, you must use the /PR switch in the
Task Builder command line when you build your task. The RSX-llM Task
Builder Reference Manual describes the use of this switch.
You can
use one of three numeric arguments with the /PR switch: O, 4, or 5
(specifically as /PR:O, /PR:4, or /PR:S). The abilities and mapping
of the privileged tasks designated by these switch values are
described next.

4.2.2.l

/PR:O Privileged Task

Using the /PR:O switch causes the Task Builder to reserve user APAR 0
for mapping the task, which is the same as any other task. Virtual
address space begins at virtual address 0 and extends upwards as far
as 32K minus 32 words.
This task cannot access the Executive
routines, system data structures, or directly access the I/O page
because the Task Builder has not reserved APRs for these purposes.
However, a task mapped into APR 0 can access the I/O page through a
device common.
The RSX-llM Task Builder Reference Manual discusses
device commons. To do this,, you must build a device common that
occupie.s physical addresses on the I/O page. Then, when the task is
built, you associate the common with the task by using the COMMON= or
RESCOM= keyword.
There are four advantages to using a /PR:O task and having
into APR 0:

mapped

The task has more virtual address space available.
A task
mapped through APR .o that accesses the I/O page can be as
large as 28K words.

A device common provides you with the means to associate
symbolic names with physical addresses in the I/O page.

You can restrict the amount of space to which the task has
access on the I/O page.
When you specify an argument of
either 4 or 5 on the /PR switch, the Task Builder always
allocates the entire I/O page. However, a device common can
be as small as 32 words
expanding upwards
(in 32-word
blocks)
to 4K words. Therefore, your task needs access to
only the portion of the I/O page that it requires.
Thus,
there is less chance that the task will alter the wrong data
and destroy the running system.

A /PR:O task can write logical block I/O to a physically
mounted volume,
regardless of who issued the Mount or
Allocate command.
For example, the VMR task is a /PR:O task
and writes to mounted volumes during the SYSGEN process.
However, this advantage can be hazardous for obvious reasons.

4-2

PRIVILEGED TASKS
A /PR:O task runs in user state and cannot switch to system state.
Also, a /PR:O task is not mapped to the Executive. If you want to
write a privileged task that does I/O processing, it is to your
advantage to use the /PR:O switch for your task because there is less
chance of corrupting the Executive or system code and data.

4.2.2.2

/PR:4 Privileged Task

If you want your privileged task to map to the Executive and I/O page,
and your Executive is 16K or less, use the /PR:4 switch in the Task
Builder command line. If you specify /PR:4 for your task, the Task
Builder reserves APR 7 to map the I/O page and reserves APRs 0 through
3 to map the Executive as part of your task's virtual address space.
The /PR:4 switch can be used only if your Executive size is 16K or
less because the 16K Executive uses APRs 0 through 3 and your task is
assigned mapping that starts with APR 4. Therefore, the Task Builder
applies a bias of 100000 (16K decimal) to all virtual addresses within
the task.
This specific mapping of APRs O through 4 and 7 occurs
whether the task is in user- or system-state~
There is up to 12K words of virtual address space possible in a /PR:4
task.
The beginning of the task marks the end of the Executive code.
If the task is 12K words in size, the end of the task marks the start
of the I/O page. If the task is going to access the I/O page through
APR 7, the task cannot exceed the 12K limit. If the task does exceed
the limit, the Task Builder is forced to assign APR 7 to the task
code. When building the task, the Task Builder does not give you an
error message if your task exceeds the 12K limit. However, when you
install the task, the system task, Install, sends you the following
message:
"INS -- WARNING -- PRIVILEGED TASK OVERMAPS THE I/0 PAGE"
This message is a warning that your task will most likely hang
tries to access the I/O page.

A /PR:4 task can access all of the Executive, system control blocks,
and I/O page. It can use Executive routines and do logical block I/O
to a volume that is physically mounted on a device. Also,
the /PR:4
task can issue a $SWSTK macro to change from user- to system-state.
This allows the task to access the Executive or system code without
interruptions or fear of the data being changed while it is being
accessed. See $SWSTK in an Unmapped System or $SWSTK in a Mapped
System in this chapter.

4.2.2.3

/PR:S Privileged Task

If you want your privileged task to map to the Executive and I/O page,
and your Executive is between 16K and 20K, use the /PR:S switch in the
Task Builder command line. If you specify /PR:S for your task,
the
Task Builder reserves APR 7 to map the I/O page and reserves APRs 0
through 4 to map the Executive as part of your task's virtual address
space.
The /PR:S switch can be used only if your Executive size is
between 16K and 20K because the 20K Executive uses APRs O through 4
and your task is assigned APR 5.
(APR 5 may be used if the Executive
is less than 16K, but this wastes virtual address space.) Therefore,
the Task Builder applies a bias of 120000
(20K) to all virtual
addresses within the task. This specific mapping of APRs 0 through 5
and 7 occurs whether the task is in user- or system-state.

4-3

PRIVILEGED TASKS
There is up to SK words of virtual address space (12K if the I/O page
is overmapped) possible in a /PR:S task. The beginning of the task
marks the end of the Executive code. If the task is SK words in size,
the end of the task marks the start of the I/O page. If the task is
going to access the I/O page through APR 7, the task cannot exceed the
BK limit.
If the task does exceed the limit, the Task Builder is
forced to assign APR 7 to the task code. When building the task,
the
Task Builder does not give you an error message if your task exceeds
the BK limit. However, when you install the task, the system task,
Install, sends you the following message:

"INS -- WARNING -- PRIVILEGED TASK OVERMAPS THE I/O PAGE"
This message is a warning that your task will most likely hang
tries to access the I/O page.

A /PR:S task can access all of the Executive, system control blocks,
and I/O page. It can use Executive routines and do logical block I/O
to a volume that is physically mounted on a device. Also, the /PR:S
task can issue a $SWSTK macro to change from user- to system-state.
This allows the task to access the Executive or system code without
interruptions or fear of the data being changed while it is being
accessed. See $SWSTK in an Unmapped System or $SWSTK in a Mapped
System in this chapter.

Writing a Privileged Task

4.2.3

In addition to the privileged task mapping
previously,
take note of the following
privileged task:

and cautions mentioned
points when writing a

Task size is limited to BK if you have a 20K Executive and
12K if you have a 16K Executive. This limit occurs because
only two APRs are available for mapping your task with a 20K
Executive and three APRs with a 16K Executive.

Your privileged task is mapped with the Executive and I/O
page.
This mapping is done to allow your task to access the
Executive and I/O page registers
(APRs, device registers,
etc.).
You can refer to any area in the Executive or I/O
page by label or label and offset because you task build your
task with the Executive symbol table file and library. A
typical Task Builder command file is, for example:
PRIV/PR:S,PRIV/-SP=PRIV
[l,54]RSX11M.STB, [l,l]EXELIB/LB

UNITS=!
GBLDEF=OUTLUN:l
ASG=TIO:l

;DEFINE NUMBER OF LONS
;DEFINE LUN ON WHICH TO PRINT MESSAGES
;ASSIGN LUN TO DEVICE

In this command file, the Task Builder is informed that the
task has a privilege attribute of 5. Therefore, the task
uses APR 5. It also uses APR 6 if it is over 4K in length.
3.

When you use a privileged task, the Executive has dedicated
almost all the APRs to the necessary mapping for the
Executive, the I/O page, and your task. Your task can issue
PLAS directives to remap any number of these APRs to regions.
However, such remapping can cause obscure and difficult to
find system bugs.
Also,
be aware that when a directive
unmaps a window that formerly mapped the Executive or the I/O
page, the Executive restores the former mapping.
4-4

PRIVILEGED TASKS

A privileged task uses the $SWSTK macro when going from userto system-state.
(See $SWSTK in a Mapped System.) While in
system state your task can access the Executive and I/O page
without being interrupted by other tasks or system processes.
It would be prudent to limit the time that your task spends
in system state for the sake of other system users. Remember
that while in user-state your task can not only read, but
change the Executive or I/O page, if necessary. However, if
your task is interrupted while changing data in user state,
it may not finish its processing properly, thereby causing
obscure bugs. Allowing a task to manipulate the Executive
data base while in user-state is not a goal of RSX-llM.
Future releases of RSX-llM may prohibit this activity.

While in system-state, a privileged task can modify any
mapping registers to make them point to any desired area of
physical memory. For example, the system task, PMD, loads
the starting address of the task being dumped into KISAR6
(Executive APR 6). It then biases the addresses by 140000 to
force mapping through APR 6. The bias is 120000 for APR 5.
Note that by modifying APR 5 or APR 6 registers, it is
possible for a privileged task to unmap its task image.
Therefore, you must take care to avoid this. However, PMD is
only 4K words in size. Therefore, modifying KISAR6 cannot
cause PMD to unmap itself.

4.2.4

4.2.4.l

The $SWSTK Routine Described - Unmapped and Mapped Systems

SWSTK$ in a Mapped System

SWSTK$ - Used by privileged tasks to switch from user- to system-state
(described for a mapped system).
1.

TASK CODE

CALL SWSTK$,100$

RETURN
100$: •••

EXPANDS TO:
CALL $SWSTK,100$
EMT 376
.WORD 100$
PROCESS:
EMT puts current PS
and PC on stack, loads
PC from location 30
($EMTRP) and PS from
location 32 (PR7 defined as 340). Current PC points to .WORD
containing address of
100$:. EMT in a mapped
system causes switch
to system SP.

4-5

SYSTEM STACK
TASK PC
TASK PS

PRIVILEGED TASKS

2.~~
$EMTRP::DIRSV$
TST $STKDP

SYSXT

EXPANDS TO:
JSR RS, $DIRSV
Puts RS on stack.
RS then contains
return address of
the TST instruction.
Jumps to $DIRSV::

MOV SP,@$HEADR
MTPS #0
MOV R3,-(SP)
MOV R2,-(SP)
MOV Rl,-(SP)
MOV RO,-(SP)
CALL (RS)
BR $DIRXT

ORO SP
$EMTRP::OIRSV$
_._TST $STKOP
BNE 70$
MOV @$HEAOR,R3
CMP ( R3) +, ( R3) +
* MOV (R3)+,R5
MFPI -(RS)
CMP #104377,(SP)
BNE 80$

RS
TASK PC
TASK PS

SYSTEM STACK

PROCESS:

$DIRSV::MOV R4,-(SP)
DEC $STKDP

SYSTEM STACK

PROCESS EMT 376:

Save R4 on stack.
Decrement $STKDP.
Stack depth: user- or
system-state1
l•USER, 0 or less s
SYSTEM. Save current SP

r---

RO
Rl

(->) •

MTPS expands to:
CLRB @#PS
Clears first byte of PS
to allow interrupts.
Save R3 through RO
(R3)
on stack.
CALL (RS) expands:
JSR PC, (RS)
Puts PC on stack.
Puts return address in
RS into PC. Jumps to
TST following $EMTRP::.
PROCESS:

---

R3
R4
RS
TASK PC
TASK PS

SYSTEM STACK

Check for 0 $STKDP.
If not 0, crash.
Get saved task SP into R3.
Point to task PC in stack.
Get address of word after
$SWSTK into RS.
(PC saved
on stack after $SWSTK in
task. Back up RS to
check EMT. Check EMT.
If EMT 376, jump to $SWSTK.
If not, process SST.

PC
RO
Rl
R2
R3

80$:CMP (RS) ,#104376
JMP $SWSTK
85$:JMP $EMSST

R4
RS
TASK PC
(R3) __.....

* Task stack pointer (R3) shown at this point.

4-6

TASK PS

I---

PRIVILEGED TASKS

SYSXT

PROCESS:

$SWSTK:CLRB (R3)
MOV #KISAR6,RS
MOV UISAR6, (RS)
MOV UISARS,-(RS)
(16K cond)MOV UISAR4,-(R5)
MOV - ( R3 ) , RS
MOV ( RS ) + , ( RJ.)
MOV RS, (SP)
MOV -(R3) ,RS
MOV 12(SP),R3
CALLR @(SP)+

SYSTEM STACK

Clear byte 0 of task's PS word.
Move user APRs to Executive
APRs. Move user APR 4 if 16K
Executive. Get sav~d task SP
for PC. Put PC for return
to user task in R3. Put
task PC on system stack.
Restore RS. Restore R3.
CALLR expands:
JMP @(SP)+
Return to task instruction after $SWSTK to process system-state code.

TASK PC
PC

r--

RO
Rl
R2
R3
R4
RS
TASK PC

(R3)
6.

TASK CODE

TASK PROCESS:

CALL SWSTK$,100$
~···

RETURN
100$:

Do system-state processing. RETURN expands:
RTS PC
Pops stack and gets
saved PC to go back to
SYSXT at BR $DIRXT
instruction.

__, TASK PS

SYSTEM STACK

RO
Rl
R2
R3
R4
RS
TASK PC
TASK PS

SYSXT

PROCESS:
BR $DIRXT

$DIRXT::MTPS #PR7
MOV $FRKHD,R3
BNE
MOV $RQSCH, RS
BNE
MOV (SP)+,RO

Lock out interrupts.
Check forking.
Check rescheduling.
Restore RO - R3.
Make $STKDP = 1.
Restore R4, RS.
RTI pops saved PC and PS.
from stack •

MOV (SP)+,R3
INC $STKDP
MOV (SP)+,R4
MOV (SP)+,RS
RTI
4-7

i----

l»RIVILEGED TASKS
8•

TASK CODE

PROCESS:

SAVED PC----. WORD 100$
100$: code

Process at 100$ in
user-state.

4.2.4.2

SWSTK$ in an Unmapped System

SWSTK$ - Used by privileged tasks to switch from user- to system-state
(described for an unmapped system)
1 ..

§c CODE I

CALL SWSTK$,100$

RETURN
100$: •••

DRDSP

USER STACK

CALL $SWSTK,100$
EMT 376
.WORD 100$

TASK PC
TASK PS

PROCESS:
EMT puts current PS
and PC on stack, loads
PC from location 30
($EMTRP) and PS from
location 32 (PR7 defined as 340) • Current PC points to .WORD
containing address of
100$:. Still using user
SP at this point.
Switch to system SP.
PROCESS EMT 376:

$EMTUP: : DI RSV$
TST $STKDP

3.~~
$DIRSV::MOV R4,-(SP)
DEC $STKDP

EXPANDS TO:

MOV SP,@$HEADR
MOV #$STACK,SP
MTPS #0
MOV R3,-(SP)
MOV R2,-(SP)
MOV Rl,-(SP)
MOV RO,-(SP)
CALL (RS)
BR $DIRXT

EXPANDS TO:
JSR RS, $DIRSV
Puts RS on stack.
RS then contains
return address of
the TST instruction.
Jumps to $DIRSV::

USER STACK
RS

TASK PC
TASK PS

PROCESS:
USER
Save R4 on stack.
Decrement $STKDP.
Stack depth: user- or
system-state~

(->)

l=USER, 0 or less =
SYSTEM. Save current SP
(->). Load system SP.
MTPS expands to:
CLRB @#PS
Clears first byte of PS
to allow interrupts.
Save R3 through RO on
system stack.
CALL (RS) expands:
JSR PC, (RS)
Puts PC for return
to BR $DIRXT (*) for system
exit. Puts return address
in RS into PC. Jumps to
TST following $EMTRP::.
4-8

STACKS
SYSTEM

TASK PC

TASK PS

R2
R3

i---

PRIVILEGED TASKS

DRDSP
$EMTRP::DIRSV$
_....,. TST $ STKDP
BNE 70$
MOV @$HEADR,R3
CMP ( R3 ) + , ( R"J ) +
* MOV (R3)+,RS
CMP #104377,-(RS)
BNE 80$:
80$:CMP (RS),#104376
JMP $SWSTK
85$:JMP EMSST

PROCESS:
USER
Check for 0 $STKDP.
If not O, crash.
Get saved task SP into R3.
Point to task PC in stack.
Get address of word after
$SWSTK into RS. PC
(R3)->
saved on stack after $SWSTK
in task. Back up RS to
check EMT. Check EMT.
If EMT 376, jump to $SWSTK.
If not, process SST.

STACKS
SYSTEM

TASK PC

TASK PS

.._._

* User stack pointer (R3) shown at this point

SYSXT
$SWSTK:CLRB (R3)
MOV -(R3) ,RS
MOV (RS ) + , ( R3 )
MOV RS,-(SP)
MOV -(R3),RS
* MOV l2(SP) ,R3
CALLR @(SP)+

PROCESS:
Clear byte 0 of task's PS
word. Get saved task SP
for PC. Put PC for return
to user task in R3. Put task
PC on system stack. Restore
RS. Restore R3. CALLR
expands: JMP @(SP)+
Return to task to
instruction after
$SWSTK to process
system-state code.

STACKS
USER
SYSTEM
R4

TASK PC t----

TASK PC

TASK PS

Rl
R2
R3

* System stack pointer shown at this point
6.

ITASK CODE I
CALL SWSTK$,100$

---···
*

100$:

RETURN

STACKS

TASK PROCESS:
Do system-state processing
RETURN expands:
RTS PC
Pops stack and gets
saved PC to go back to
SYSXT at BR $DIRXT
instruction.

USER

SYSTEM

TASK PC

TASK PS

R2
R3

* System SP shown at this point

4-9

I-I-·

J?RIVILEGED TASKS
7.

[sYSXT

PROCESS:

BR $DIRXT

$DIRXT::MTPS #PR7
MOV $FRKHD,R3
BNE
.
MOV $ROSCH, RS
BNE
MOV (SP)+,RO
MOV (SP)+,R3
MOV @$HEADR,SP
INC $STKDP
MOV (SP)+,R4
MOV (SP)+,RS
RTI
8.

TASK CODE

SAVED PC ----.WORD 100$
100$: code

4.2.5

Lock out interrupts •
Check forking.
Check rescheduling.
Restore RO - R3.
Restore RO - R3.
Reload user SP.
Make $STKDP == 1.
Restore R4, RS.
RTI pops saved PC and PS.
from stack.

PROCESS:
Process at 100$ in
user-state

Task Mapping

Figure 4-1 shows the mapping
unmapped system.

nonprivileged

user

task

nonprivileged

task

mapped

Figure 4-3 shows the mapping of an 8K nonprivileged task in
system.

mapped

Figure 4-4 shows the mapping of an SK nonprivileged task
memory management (PLAS) directives in a mapped system.

that

uses

Figure 4-2 shows the mapping of
system.

Figure 4-5 shows an SK privileged task mapped into APRs 5 and 6.
The
20K Executive occupies 5 APRs, which leaves two APRs for the
privileged task and one for the I/O page. All the APRs are used by
the system in this example. The Executive copies what are normally
the Executive's own APRs (KISARO through KISAR4, and KISAR7) into what
is normally the user APRS (UISARO through UISAR4, and UISAR7). Thus,
the privileged task has access to the Executive and I/O page in either
user- or system-state.
These figures are presented in a sequential and logical way to allow
an easier understanding of privileged task mapping in the system.

4-10

PRIVILEGED TASKS
TASK VIRTUAL
ADDRESS SPACE

2K
PHYSICAL MEMORY

USER
TASK

170000 t-------------~

100000I.----------1Ir
r
EXECUTIVE

0-------------------'

• Location of task depends on partition location in unmapped system (PAR option of TKB)
• Base of task on 32-word boundary; length is a multiple of 32 words; highest virtual address= 28K
• Non-runable task -

resident library or global common - maximum size= 32K minus 32 words

• Unless you change parameters of task and task build again, task in unmapped system always loads into
the same location
• INSTALL calls $ALOCB to allocate TCB space. It then reads the first record of header label blocks, and
sets up data in the task header. It verifies that the task fits in the specified partition
• INSTALL sets load device and LBN in TCB. UCB address of load device is put in header of INSTALL as a
result of opening task image file. It then puts UCB address in TCB of task
• INSTALL: checks System Task Directory (STD) for task of same name; gets partition name from task
Label Block Group; searches for task partition; checks if task fits in partition
• INSTALL: checks Label Block Group for PLAS support, resident overlays; puts task offset in TCB, checks
if task is a common block, checkpoint file space, set priority in TCB, checks partition base address and
task starting address
• INSTALL fills in TCB with information from Label Block Group. When everything is done, TCB is in
STD
• When the task is executed, the Executive Loader loads task into correct partition and location. TCB is
put on Active Task List

Figure 4-1

User Task in Unmapped System

4-11

PRIVILEGED TASKS

• Nonprivileged user task uses User Active Page
Register 0 (APR 0), which is called UISARO in
the I /0 page.

TASK VIRTUAL
ADDRESS SPACE
007777 - - - - - - -

• User is aware of virtual addresses 0 - 07777 8
only.

4K
USER
TASK

002040

• INSTALL task maps this 4K task with APR 0
only, because task is only 4K. If it were bigger,
INSTALL would select needed number of
APRs (4K for each of 8 APRs - 32K maximum).
INSTALL determines into which partition task
is to go in mapped system and virtual address
for base of task (task may have a virtual section
at beginning of task code, making its real virtual
address different from its apparent virtual
address). Executive determines physical address
by information in task header and current system memory allocation. Executive puts this
address in APRO. After task is loaded, mapping
information is kept in Executive copy of task
header in DSR.

MOV LOC, R1

KT-11 MEMORY MANAGEMENT UNIT
APR1 (UISAR CHI

VIRTUAL ADDRESS
000

010000

12 11

100000

8 5

Iii

• Contents of APR 0 relocates whole task (MOV
instruction shown as part of task as an example).

PHYSICAL MEMORY

4K USER TASK
72040 ,___ _MOV
RI _ __,
67777
_ LOC.
__

}------i
I

EXECUTIVE
~~~~~~~~

Figure 4-2

72040

• Bits 13-15 of task virtual address selects APR 0.
If task were SK, two AP Rs would be used.
Virtual addresses in the task (bits 13-15) select
dynamically the APR from those assigned.
• KT-11 adds value in APR 0 (16 bits) to bits
6-12 of virtual address. KT-11 appends sum to
the low-order 6 bits of the virtual address to
produce 22-bit physical address.

4K Nonprivileged User Task Mapping in a PDP-11/70

4-12

PRIVILEGED TASKS

TASK VIRTUAL
ADDRESS SPACE

• User task shown has no memory management
directives.

37777 . - - - - - - - - -

8K
USER
TASK
21770 ~

-1- - - - - - - - - - . ,

f------------1

111n

• For example, APR 1 relocates address 21770
in the user task to physical address 121770.
Because the virtual address being translated is
over 4K and less than SK, the high-order three
bits of the address are 001. The three high-order
bits select APR 1. If the task were between
SK and 12K in size, virtual addresses between
SK and 12K would contain 2 in the high-order
digit and APAR 2 would be selected for these
addresses. This relationship of virtual addressing
to AP Rs continues up to 32K of virtual addresses.
Each APAR can contain a 4K relocation factor;
therefore, with 8 APARs, 32K of virtual
addresses can be relocated.

KT·11 MEMORY MANAGEMENT UNIT
VIRTUAL ADDRESS

APRs (UISAR 0-71
001
15 I

0001111
12

111000
8 5

I
3

------i----------1
1000

I
I

0700
15

L.--21

1217

• The virtual address limit of a user task in a
mapped system is 32K.

22-BIT PHYSICAL ADDRESS
121770 ...

.,
I

I
I

PHYSICAL MEMORY

137777

1--------------t- ------..J
8KUSERTASK

121no I-

1om1
70000

~i:s

EXECUTIVE

~~
0

• User task is SK in size. Because each APAR
maps 4K of memory, user task must use two
APA Rs.

• Without memory management directives, user
task without commons or resident libraries
occupies continuous physical address space in
memory. The task can only access that physical
memory to which the Executive maps it. This
physical memory is continuous and has a direct
one-to-one relationship to the tasks's virtual
addresses until the task exits or the Executive
checkpoints it. Of course, the Executive does
not move fixed tasks once they are loaded, but
they may be shuffled.
• Executive memory allocation routines determine
the physical base address of the user task when
the Executive Loader loads the task into memory. The base address is likely to change if
checkpointing or shuffling occurs.

Figure 4-3

SK Nonprivileged User Task Mapping in a PDP-11/70

4-13

PRIVILEGED TASKS
BK TASK
VIRTUAL ADDRESSES

TASK DATA
MAPPED TO
COM 1 -APR2

07777

f-- - - - - - - -· - - - -,

1----------TASK ROOT
ANDHEADERAPRO

o-------KT-11 MEMORY MANAGEMENT UNIT
APR1 (UISAR 0-71
7

~
I
I
I

--,
I

t:t:-' ..J

I
I

• Upper 4K of this task is defined as an address
window to access a region in memory.

·T

2[1------~-------1
o(

11 5

VIRTUAL ADDRESS

}--.J

1 -

r
I

• Window size can be 32 to 32K minus 32 words
and must start on a 4K virtual boundary.

~u --~~=5=J

[
21

22-BIT,PHYSIJL ADDRESS

• The Task Builder built this task with WNDWS
option 1; the Task Builder reserves two window blocks in Task Header. Window blocks
contain mapping information (see Chapter 2).
Window block 0 is for APR 0 mapping. TKB
always reserves one window block (window 0)
for mapping task header and root (in this case 0
to 7777). Window block 1 is for address window (APR 2} that PLAS directives use in the
task. However, a task may use more than one
address window for mapping when using PLAS
directives, but the number of windows to be
used must be specified to TKB when building
the task.

17777 - - - - - - -

,,,

[. ___~------------~-·rt::l~. ~i-:;--"

• The Executive maps both the task root and the
region into the GEN system-controlled partition.
You must specify the APR that the Executive
is to use for the region.

I
I

PHYSICAL MEMORY

I
I
I

BK REGION ICOMll
CURRENT MAPPING
BY MAP ADDRESS WINDOW
DIRECTIVE

I
I

I
~------J

• You must create Window Definition Block
(WDB) in your task (see Chapter 2 or RSX-11 M
Executive Reference Manual).

4KTASK ROOT
ANO HEADER

. . 1-------------~

,.(,

""""ve

• The Executive may map the region to a numerically lower physical location than your task and
the region and task root may or may not be contiguous in memory.

• You must create the Region Definition Block
(ROB) in your task (see RSX-11M Executive
Reference Manual).
• Your task must issue an Attach Region directive
to attach the region (COM 1) to your task.
• Your task must issue a Map Address Window
directive to map your task's window to the
region. In this directive, your task specifies the
offset into the region in which mapping begins.
This offset can be changed by issuing another
Map Address Window with the offset changed.
Doing this can move the window through the
whole region.
• These directives in combination with the Send/
Receive and Detach Region directives make it
possible for two tasks to transfer data to each
other through a region that they can both access
in common.

Figure 4-4 SK Nonprivileged Task Mapping
in a PDP-11/70 Using PLAS Directives

4-14

PRIVILEGED TASKS

PHYSICAL
ADDRESSES
177777
167777

__ _____
...._
l/OCODE

KT-11 MEMORY
MANAGEMENT UNIT

PHYSICAL MEMORY

APRs (UISAR 0-7)

1/0PAGE

COPY OF KISAR7
SK
PRIVILEGED
TASK

PRIV TASK 4-BK
PRIV TASK 0-4K
COPY OF KISAR4

BK
PRIVILEGED TASK

120000
3

COPY OF KISAR3

COPY OF KISAR2

COPY OF KISARO

COPY OF KISAR1

APRs (KISAR 0-7}
NOT USED NOW {

KISAR7 (1/0 PAGEi

MEMORY
OCCUPIED BY
TASKS AND
PARTITIONS

PHYSICAL
ADDRESSES
117777

KISAR4 16·20K
3

KISAR3 12·16K
KISAR2 B·12K

20K
EXECUTIVE

KISAR1
0

4-BK

Kl SARO 0-4K

20K
EXECUTIVE

MAPPING FOR SK PRIVILEGED TASK IN USER STATE AND 20K EXECUTIVE

PHYSICAL
ADDRESSES
177777 ----1/_0_C_O_D_E_ __
157777

KT-11 MEMORY
MANAGEMENT UNIT

PHYSICAL MEMORY

APRs (UISAR 0-7)

1/0 PAGE

NOT USED NOW
SK
PRIVILEGED
TASK
120000 - - - - - - - - - -

PRIV TASK 4·8K

PRIV TASK 0-4K

KISAR 0-4 AND

BK
PRIVILEGED TASK

7 COPIES NOT
USED IN SYSTEM
STATE BUT VALUES
STILL EXIST
APRs (KISAR 0·7)
KISAR7 (1/0 PAGE)

MEMORY
OCCUPIED BY
TASKS AND
PARTITIONS

PRIV TASK 4-SK
COPIED FROM UISAR 5 + 6
PHYSICAL

{

PRIV TASK 0-4K

ADDRESSES
------ 4
117777 - - - - - - - - 3

KISAR4 16·20K

1--------KISAR3 12·16K

KISAR2 8-12K

20K
EXECUTIVE

KISAR1

---------~------....

4-BK

KISARO 0-4K

0 ....

MAPPING FOR BK PRIVILEGED TASK IN SYSTEM STATE AND 20K EXECUTIVE

Figure 4-5

Privileged Task Mapping

4-15

20K
EXECUTIVE

CHAPTER 5
MCR INTERFACE

5.1

MCR - MONITOR CONSOLE ROUTINE

MCR is the collection of functions that make it possible to operate
and control the RSX-llM ~ystem from a terminal device. As the link
between the collection of services provided by RSX-llM and users who
want to make use of these services, MCR provides a number of commands
which you can execute by entering the command at your terminal.
The RSX-llM Operator's Procedures Manual describes
commands that you can use. They are listed as follows:
1.

ABO rt

ACS

ACTive

ALLocate

ALT er

ASsigN

ATL

BRK

CANcel

10.

CLQueue

11.

DEAllocate

12.

DEVices

13.

FIX

14.

HELP

15.

LUN

16.

OP En register

17.

PARtition definitions

18.

REAssign

19.

REDirect

5-1

all

the

MCR

MCR INTERPACE
20.

REMove

21.

RESume

22.

RUN

23.

SAVe

24.

SET

25.

TAsk List

26.

TASk list

27.

TI Me

28.

UN Fix

Services 29-39 run as tasks.
29.

BOOt

30.

BROadcast

31.

BYE

32.

DMOunt

33.

HELlo

34.

INTitvolume

35.

INS tall

36.

LO Ad

37.

MOUnt

38.

UFO

39.

UN Load

5.1.1

Structure and Operation Environment of MCR

MCR is an RSX-11 task that, typically, operates out of its own
partition.
MCR runs at a moderately high priority to be able to
service terminal input reguests. This priority value is typically
160. or, at least, higher than that of user tasks and utilities. MCR
is privileged and is usually stopped, though active, while waiting for
terminal input. MCR can be checkpointed and have checkpoint space in
its own task image.
MCR is a tree structured
schematically in Figure 5-1.

task,

and

its

structure

depicted

ROOT

I
DISPATCHER

PARSERS(l-3)
Figure 5-1

COMMAND FUNCTION PROCESSORS
MCR Tree Structure
5-2

MCR INTERFACE
The command function processors are those that process the first 16
console services listed in Section x.x.
The rema1n1ng console
services run as tasks and not as integral parts of MCR. MCR, in fact,
does not distinguish between these task functions and tasks that it
initiates as a result of recognizing an MCR request for functions
17-22 listed in Section 5.1. The console language syntax is defined
such that if the first three characters of an input line are not part
of the defined command language, then MCR attempts to initiate the
task named
••• xxx
Thus, the task named ••• JIM can be initiated by entering
JIM
to MCR, or by entering
RUN ••• JIM
to MCR.

5.1.2

The Terminal Driver and MCR Initiation

The terminal driver is intimately integrated into the operation of
MCR. Because RSX-llM accepts and acts upon unsolicited input from any
operator terminal, it is the function of the terminal driver to know
when it is receiving input destined for MCR.
When a character on an operator terminal is struck, the resulting
interrupt initiates the terminal driver.
(Remember the device is full
duplex and the keyboard cannot be locked to prevent input when the
device is, in fact, involved in an I/O operation.) The driver then
acts on the input as follows:
1.

[Check the device state]
Is the device busy.

No, go to 3.

[The device is busy]
If the driver was sending output (in an output state) when
the character was entered, an input request flag is set in
the appropriate UCB and the driver continues sending the
output
stream.
When the output request is finished,
processing continues at 5.
If the terminal was
accepted. Go to 6.

input

state . the

character

Note, if the device was not busy, the incoming
the first character of an input line.

character

[Device is not busy]

Was the input character a CTRL-C?
(CTRL-C is an explicit
requ~st
to communicate with MCR.) If the character was a
CTRL-C, the terminal driver executes a $FORK and execution
continues at 4.

5-3

MCR INTERFACE
If the first character is not a CTRL-C, a check is made to
see if the device is attached. If it is, MCR ignores the
character (unsolicited input to MCR on an attached device is
not permitted).
If the device is unattached then it is considered
beginning of unsolicited input to MCR. Go to 4.
4.

the

[Fork level processing]
The driver has transferred to fork level because it needs a
buffer, and it can only get a buffer at fork level (shared
system tables must be altered to obtain a buffer).
In
addition to getting a buffer, the fork level terminal
processing code must check for a rare race condition.
After the arrival of the CTRL-C (or a non CTRL-C character if
the terminal is not attached) and between the time the fork
is executed and control is regained in the driver, it is
possible that the device may have returned to the busy state.
This is because we may have just unbusied the device for a
previous request when the input interrupt occurred. The
interrupt code finds the device free and executes a fork.
But before control is regained at fork level, execution is
continued in the driver for the previous request. The driver
jumps to the initiator entry to propagate its execution and
. thus may find another waiting I/O request which it begins
processing because the device is free. Thus the fork routine
must recheck the state of the device.
If it is busy the
input is ignored and th• driver returns (exits) from fork
level. Otherwise, an attempt is made to obtain a buffer for
the unsolicited input.

[Buffer Acquisition]
·If the buffer acquisition attempt is unsuccessful, the driver
ignores the input and exits.
If a buffer is obtained, the driver sets up to start an
unsolicited input request by initializing various pointers
and setting the status of the controller and unit to busy.
If the initial input character was CTRL-C, then
MCR>
is echoed to signify an explicit
MCR.

request

Otherwise, the input character is stored in
and echoed on the initiating terminal.
The driver returns (exits) from fork level.

5-4

input
the

buffer

MCR INTERFACE
6.

[Character processing]
Once the terminal driver determines that input coming from an
operator
terminal
is
destined for MCR, it transfers
subsequent characters into the buffer acquired in Step 5. It
also echoes the incoming characters. The acceptance of input
ceases if:
a.

The buff er
characters)
device:

is filled (the buff er has room for 80
but the maximum accepted depends on the

72 for KSR
72 for VT05B

80 for LA30S
80 for LA30S
b.

An end of line character is entered.
line characters are:

The

valid

end

CTRL-Z
Carriage Return
ALT-Mode (codes 33, 175, and 176)
7.

[Interrupt from a character echo]
Is the device in input mode? If it is not, another character
is obtained from the user output buffer and it is echoed. If
the device is in input mode, end-of-line must be checked. If
it is not, the keyboard interrupt is re-enabled and exit from
the interrupt occurs. If end-of-line is detected, then the
fork process is called.

[End-of-line processing - fork level]
For unsolicited input, the UCB address and the terminating
character are deposited into the input buffer and the buffer
linked into MCR's input queue. MCR is then requested to run.
The driver itself clears control and unit busy and returns to
its initiator entry point.
For solicited input, I/O Done is called. First, the number
of characters entered is determined and the buffered input is
moved to the soliciting task's input buffer.
The driver
input buffer is released and I/O Done is called with the
second I/O status word equal to the number of bytes entered.
The left byte of the first I/O status word is set equal to
the terminating character and the right byte to +l.
The
driver then jumps to the initiator entry point to propagate
its execution.

5.1.3

MCR Operation

After the request of MCR by the driver, the file system is swapped out
and MCR is swapped in.
Control is passed to the MCR root segment
which calls the Dispatcher (DSPTCH) overlay. DSPTCH, via a privileged
subroutine ($SWSTK), switches to system state.
The call to this

5-5

MCR IN'TERFACE

routine includes a parameter which is the address where the caller
wants to return when it switches back to task state. The state
switching routine performs the switch and resumes processing in the
caller immediately followin9 the call. When $SWSTK is called, it sets
up an interrupt entry to thE! system. Interrupts are locked out while
it pushes the passed return address and the PS on the stack. $SWSTK
then calls interrupt save (~lINTSV). On return from interrupt save,
R3, R2, Rl, RO are pushed onto the stack and now the stack state
simulates that of an EMT. ~;swSTK now calls the caller who resumes
execution one instruction past the call to $SWSTK. When the calling
routine finishes, it returnH, which takes it back to $SWSTK.
$SWSTK
jumps to Directive Exit which redispatches the processor. The effect
of this is to resume the caller in task state at the passed return
address.
MCR now proceeds as
1.

follows~

[Request an unsolicited input queue entry]
The Dispatcher calls the queue removal routine ($QRMVF).
$QRMVF attempts to remove a buffer and deliver it to the
Dispatcher. If no buffer is available (carry set return from
$QRMVF) the Dispatcher exits.
The buffer is formatted as
shown in Figure 5-2.

~WORD

•

LINK TO
NEXT BUFFER

•r- WORD

•

UP TO 80 BYTES_._

UCB OF
INPUT DEV

Figure 5-2

Input Buffer

COMMAND INPUT

The queue empty condition never occurs on an initial call to
MCR, because MCR is not requested unless something is in the
queue. MCR remains; resident until it has processed all the
entries in the unsolicited input queue.
Note that the Dispatcher, during buffer requisition, is
operating at system level and all queue entries are done at
fork level. Thus the buffer removal process is linearized
with buffer item entry.
If DSPTCH gets a buffer, it saves the buffer address in a
memory location and does a return. This return takes DSPTCH
back to task state where the J?rocessing of the buffer begins.
2.

[Process a Buff er]
On return to task state, the
buff er and

Dispatcher

scans

through

Compresses out redundant spaces and/or tabs

Converts an Escape character to a Carriage Return

Truncates trailing spaces and/or tabs

5-6

the

MCR INTERPACE
If no line terminator is found in the buffer, the Dispatcher
inserts a CR as the 80th character. Finally the actual line
terminator (either CR or ESC) is saved so it can be restored
in the message if the message must be routed to a task other
than MCR itself.
The Dispatcher then converts the first three characters to
RADSO and begins to search two internal tables for an MCR
function with· a matching name.
3.

[Searching the function tables - Table descriptions]
MCR has two function tables1 one for
and one for non-privileged commands.

privileged

commands,

Privileged commands are those whose unrestricted use could
cause privacy violation or system failures and they can only
be executed from a privileged terminal. Privileged terminals
are identified by a bit in the UCB. These terminals are
established at SYSGEN or by the SET command.
Both tables contain a 5-word packet for each command in the
class (privileged or non-privileged). The packet appears in
Figure 5-3.

RADSO CMD NAME (3 CHARS)
INDEX INTO COMMAND OVERLAY
ADDRESS OF PARSER TABLE
RAD50 COMMON OVERLAY NAME
INDEX INTO COMMON OVERLAY
Figure 5-3

Function Table Entry

The table entries correspond to three overlay types:
l.

Command overlay

Parser overlay

Common overlay

The use of these overlay types is noted next.
Typically, any command that can be processed in a single
overlay and whose size is such that it requires all or nearly
all of the max overlay size (600 wds) is classed as a command
overlay.
Parsers for the commands are distinct entities and are
grouped into overlays.
Generally, a given parser services
more than one command but three parsers currently service all
the commands.
The parser entry is a pointer to a parser
table entry shown in Figure 5-4.

5-7

NCR INTERPACE

~DSO PARSER NAME (3-CHARS)
QNDEX INTO PARSER OVERLAY
Figure 5-4

Parser Table Entry

Because three parsers serv:lce all the commands it is more
economical in storage space to point to the parser table than
to include the name and the index in the main function table.
The index is used as the entry point into the parser where
the parsing for a given command begins. This is required
because a parser can, and generally does, contain parsers for
more than one command.
The common overlay is used when the processing for a command
is small enough to make it practical to group more than one
command into a single overlay.
This grouping saves space
since ten words are required by the Overlay Runtime System
for each overlay in a tree structure. The index serves the
same purpose as the index in a parser overlay.
Note that a command overlay also contains an index.
The
value of the command overlay index is generally zero. But to
maintain the coherence of the table processing commonality,
and to allow for flexibility, the index is included.
3a. [Look up and start a function
function]

other

than

MCR

internal

The Dispatcher then looks in the privileged command table for
a name which matches the first three characters in the input
buffer. This table contains all the privileged MCR commands.
Internally, privileged terminals are identified by a bit in
the UCB.
The bit is set at SYSGEN or from a privileged
terminal using the SET MCR command.
If the command is not found in the privileged command
the non-privileged command table is searched.

table,

MCR for multiuser-systems is called MCRMU. MCRMU is actually
two tasks:
••• MCR and ••• SYS.
The Dispatcher in MCRMU,
which is part of the MCR task, looks in a table to see if it
is to process the issued command. These commands are: LUN,
REA, REM, FIX, UNFIX, CANCEL, RESUME, and ABORT.
If the
command is not in this table, the Dispatcher looks in another
table to see if the task, ..•• SYS, processes the command.
If the name is not in either table, then the Dispatcher
prefixes three periods to the three buffer characters, and
using these six characters, searches the STD looking for a
match on the name. If it does not find the name it displays
an error message on the initiating terminal. If it finds the
name, it requests the function to run, supplying as an
argument to the requested task the UCB address that was in
the input buffer. The UCB address is inserted into the TCB
of the requested task as its TI (terminal input) pseudo

5-8

MCR INTERPACE
device.
If the attempt to request the task fails, an error
message is displayed, the buffer is released, and MCR exits.
Having discovered a non-internal MCR function, MCR must
prepare to pass the buffer, because the initiated task is
going to issue a Get MCR Command Line directive. To pass the
buffer, MCR uses three words in system common.
These words
are:
1.

The TCB address of the requested task

The address of the command buffer

The byte count of the number of input characters
buffer

the

MCR fills these words, making synchronizing checks that they
are free, because only one triplet exists for passing buffers
to a requested task. Thus, until the buffer is emptied,
other completed buffers in the queue are waiting.
Eventually, the requested task starts running, and issues a
Get MCR Command Line directive. The directive processing
then tests for a match on the TCB address in SYSCM and the
TCB address of the requesting task. If they match the buffer
is passed to the task by copying it into the DPB of the
directive.
The directive status is set to the byte count,
the buffer is released and the TCB address in the SYSCM
triplet is cleared.
The TCB address being zero is an
indication to MCR that the triplet is free.
3b. [Start an internal MCR function]
Once a name match has been found in the command table, the
Dispatcher copies words 1, 2, 4 and 5 of the function table
entry and both words of the parser table entry for this
command into the MCR root segment. Now the Dispatcher scans
the function table entry as follows:
Jc. If a parser exists, go to 4. Otherwise, if a command overlay
exists go to 3d. If a command overlay does not exist, go to
5. Otherwise, abort the system.
3d. The Dispatcher forms the overlay name, constructs
the
required overlay information packet, and enters the root at
the point where overlay loading is performed.
4.

[Parser functions]
The selected pars~r parses the buffer and, if the parse is
successful, it Jumps back to the root to load the desired
function. If the parse fails, the parser deposits an error
number in the root and jumps to the entry $ERLD in the root
which loads the error overlay.
Ultimately the root initiates another routine,
error routine or the requested function.

either

the

[Function routines]
These routines may further check the input and find errors.
If errors are found, the function sets up the error routine
and jumps to the root to load an error overlay.
If it
succeeds, the function releases the buffer and enters the
root as the point where the root reloads the dispatcher.

5-9

MCR INTERFACE

[Error overlay]
The error overlay contains all error messages and the code
needed to format the error message from the error number
deposited in the root by the MCR component discovering the
error.

[Final Exit]·
The dispatcher calls the queue routine to obtain another
buffer1
if one is found, the cycle of name table scanning
resumes {starting at Step 2). If no buffers are waiting, MCR
exits.

5-10

CHAPTER 6
I/O PROCESSING

This chapter contains a description of QIO directive processing in the
form of a Logical Flow Diagram.

6.1

IMPLEMENTATION

The user interface to the RSX-llM I/O system consists of logical unit
numbers (LUNs) and a single active I/O directive, Queue I/O. (The
directives Assign LUN, Get LUN Info, etc.
do not initiate I/O
transfers.)
In RSX-llM all the preliminary processing antecedent to actually
queuing an I/O request is performed by the QIO directive processing
code that uses the I/O data structures.
This code calls ancillary
routines for centralized services. When a driver finally receives an
I/O order, it generally has very little to do other than set up the
status registers and issue the order.
Termination processing is equally modular and centralized. The driver
is entered, performs some cleanup operations, and calls centralized
routines for obtaining pending I/O orders, performing AST processing,
etc. The driver is only concerned with the most intimate and specific
details of the actual hardware interface in respect to the execution
and
completion
of
I/O
transfers.
Using this centralization
philosophy, RSX-llM keeps both driver size and non-interruptible
processing time small.

6.2

RSX-llM I/O DATA STRUCTURES

The static I/O data structures consist of three blocks:
1.

A Device Control Block (DCB)

A Unit Control Block (UCB)

A Status Control Block (SCB)

Although each serves a specific function, and the components of each,
in general, reflect these functions. The functional purpose of each
data structure is reflected by the units of information which compose
them. See Chapter 8, Data Areas and Control Blocks.

6-1

:c/o PROCESSING
6.2.1

The Device Control Block (DCB)

One device control block exists for each device type attached to the
system.
Its function is to describe the static characteristics of
both the controller and the units attached to the controller. All the
DCBs in the system are singly linked.
The DCB contains such
information as:
•

The device mnemonic (two ASCII characters)

•

The lowest and
controller type

•

The address of the first UCB

highest

unit

numbers

the

respective

• The length of each UCB
• The next DCB pointer

• The Legal Function Mask
• The Control Function Mask
• The No-Op'd Functior:t Mask
• The File Function Mask
• The pointer to the Driver Dispatch Table
For Loadable drivers, the pc>inter to the driver's driver dispatch
table (D.DSP) and the pointer to the driver's PCB (D.PCB) are altered
by Load and Unload.
The rest of these information fields are static and are used
principally by the Queue I/O directive processing code to prepare a
Queue I/O reauest for a device driver.
The details of Queue I/O
processing aie shown in Figure 6-2, QIO Directive Processing.

6.2.2

The Unit Control Block (UCB)

One unit control block exists for each physical device unit attached
to the system.
Many of its information fields are static and very
device dependent. The device independent parts of the UCB contain few
dynamic parameters.
For example, the redirect pointer reflects the
result of a Redirect MCR command.
The UCB contains device unit specific data, such as unit status,
physical unit number, and unit characteristics. See Chapter 8, Data
Areas and Control Blocks.

6.2.3

The Status Control Block {SCB)

One status control block exists for each device controller in the
system.
This is true even if the controller handles more than one
device unit (like the DK Controller). Line multiplexers such as the
DHll and DJll are considered to have a controller per line since all
lines may transfer in parallel.

6-2

I/O PROCESSING
Some of the information in the SCB is dynamic.
It
following information about the currently active unit:

contains

the

• The interrupt vector address
• The controller bus request priority
• Timeout counts (initial and current)
• The address of the Control Status Register

• The address of the current I/O Packet
• Storage for a Fork Block

• The I/O queue listhead
• The controller status (busy/idle)
• The controller index
The dynamic data in the SCB makes it possible to maintain control of
the current I/O in progress on the controller. The presence of Fork
Block storage in the SCB implies that a driver cannot call $FORK twice
for the processing at fork level on a given controller. The driver
for a specific device type never concerns itself with unwanted
recursion or multiple updates.
Once a driver is in a fork level
process, further I/O processing, which may involve updating a shared
data base, is automatically locked out by the Fork processing of the
system itself.

6.3

QUEUE I/O DIRECTIVE PARAMETER BLOCK

The Queue I/O directive requires a 12-word Directive
(DPB) as shown in Figure 6-1.
LENGTH

DIC

FUNCT CODE

MODIFIER

RESERVED

LUN

PRIORITY

EFN

Parameter

I/O STATUS BLOCK ADDRESS
ADDRESS OF AST ROUTINE

DEVICE
DEPENDENT
PARAMETERS

Figure 6-1

Queue Directive Parameter Block

6-3

Block

I/O PROCESSING
The parameters have the following interpretation.
DPB size (required):
The length of DPS in words.

For QIO always equal to 12 words.

DIC (required):
Directive Identification Code.

For QIO, the value is a 1.

Function Code and Modifier (required):
The code of the requested I/O function (0 through 31) and device
dependent modifier bits.
I/O function code definitions are in
the RSX-llM I/O Drivers Reference Manual.
Reserved:
Reserved byte:

must not be used.

LUN (required):
Logical Unit Number.
Priority:
Request priority.
Ignored by RSX-llM,
allocated for RSX-llD compatibility.

but

space

must

EFN (optional):
Event flag number.
I/O Status Block Address (optional):
This word contains a pc,inter to the I/O status block, which is a
4-byte device dependent I/O completion data packet formatted as:
Byte 0
I/O status byte
Byte 1
Augmented data supplied by the driver
Bytes 2 and 3
The contents of these bytes depend on the value
See the RSX-llM I/O Drivers Reference Manual.
AST Address (optional):
Address of an AST service routine.

6-4

byte

I/O PROCESSING
Device Dependent Parameters:
Up to six para.meters specific to the device.
example:

These may

be,

for

filled

with

Buffer address
Byte count
Carriage control type
Logical block number
Any optional parameters that are not specified
zeros.

must

Directive Parameter Blocks and their contents are fully described in
the RSX-llM Executive Reference Manual and the RSX-llM I/O Drivers
Reference Manual.

6.4

QIO DIRECTIVE LOGICAL FLOW

Figure 6-2 is a Lo9ical Flow Diagram of QIO directive processing. The
diagram shows the main stream of code flow through the DRQIO module of
the Executive.

6-5

I/O PROCESSING

REFERENCES:

SDROIO::

:-1-- - - - - - - - SAVE 1/0 FUNCTION cc~

CALL $MPLUN TO
MAP LUN TO UCB
ADDRESS.
IF LUN NOT ASSIGNED, SET D.RS5

(R3), (SP)

·----------

SMPLUN, D.RS6

_________________

1/0 OPERATION PENOING 0 3 - - - 8 ; : T

------------------- GET SAVED TASK
STACK POINTER.
BACK-UP TASK PC
TO RE-EXECUTE EMT.
CALL $TKWSE TO
WAIT FOR SIGNIFI·
CANT EVENT.

Figure 6-2

STKWSE

QIO Directive Processing (Part 1 of 24)

6-6

I/O PROCESSING

REFERENCES:

16$
------ -

- - - O.RS6, D.DSP

$CEFN

--- -

-- -

$ACHKW

-- -

------ -

- - - T.IOC

- - - $CEFI
$DRWFS

IF [)RIVER NOT
RESIDENT, SET
O.RS6.

CALL $CEFN TO CONVERT
EVENT FLAG NUMBER.
CLEAR SPECIFIED
EVENT FLAG.

l
CALl. $ACHKW TO
CHECK 1/0 STATUS
BLOCK ADDRESS.

~10

l
STATUS BLOCK

CALL $ALPKT TO ALLOCATE 1/0
PACKET ANO CLEAR RECORD
LOCKING ENTRY POINTER

-- -

$ALPKT,l.PRM

DREMENTl/O
IUESTCOUNT

IF FUNCTION IS 010
ANO WAIT, CALL
$CEFI TO CONVERT
FLAGi TO MASK
AND .ADDRESS;
CALL $DRWFS TO
PUT TASK IN WAIT
STATE.

---- -

0
PART3

Figure 6-2

QIO Directive Processing (Part 2 of 24)

6-7

I/O PROCESSING

PART2
REFERENCES:

T.PRI
....._ _ _F-IL_L_l_N_l_/O_P_A_C_K_E_T_._ ] - -

J----------

$RELOC

_ _ _C_A_L_L_S_R_E-LO_C_T_O
___
RELOCATE 1/0 STATUS
BLOCK ADDRESS.
..

J---------J----------

$10KIL
$0EPKT
$10FIN

KILL, CALL $10KIL
---IF-FU_N_C_T_l_O_N-IS-1/_0
__
TO FLUSH 1/0 QUEUE.
SET SUCCESSFUL
DIRECTIVE STATUS.
..

10 KILL, CHECK
----IF_F_U_N_C_T-IO_N_N_O_T_ _
ACCESS RIGHTS
TO DEVICE.

U.OWN, US.PUB, U.ST2
STKTCB, T.UCB, T3.PRV,
T.ST3

"'"

____________]--B

.._

ACCESS ALLOWED?

IEPRI
PART 12

ILLEGAL FUNCTION?

PART4

Figure 6-2

QIO Directive Processing (Part 3 of 24)

6-8

I/O PROCESSING

PART3

REFERENCES:

_ _ _ _ _ _...__ _ _ _ _ _ -

US.OFL, U.ST2

U.CW1

US.MNT, US.FOR,
U.STS

IS DEVICE OFF LINE 7

IEOFL
PART 12

CONTROL FUNCTION?

FCCTL
PART9

IS FUNCTION NO-OP ?

ISSUC
PART12

---------------.- -

IS DEVICE MOUNTABLE?

---------------. IS DEVICE MOUNTED
AND NOT FOREIGN?

80$
PART6

- 60$
PARTS

70$

ACP FUNCTION?

PARTS

SET UP TO EXECUTE CODE
FOR SPECIFIC ACP

PART 13

Figure 6-2

QIO Directive Processing (Part 4 of 24)

6-9

I/O PROCESSING

DEVICE IS NOT
MOUNTED OR
MOUNTED AS FOREIGN.

REFERENCES:

__r-;\. PART
75$
----i..:../
5

ACP FUNCTION?

FCTRN (PART II)
(TRANSFER FUNCTION)

70$
DEVICE MOUNTED A N I J
NOT FOREIGN BUT NO'T
ACP FUNCTION

75$

IEPRI (PART 12)
(PRIVILEGE VIOLATION)

Figure 6-2

QIO Directive Processing (Part 5 of 24)

6-10

I/0 PROCESSIRG

REFERENCES:
80$
DEVICE NOT .
MOUNTABLE.

FCTRN
PART?

ACP FUNCTION?

THIS MUST BE A FILE
STRUCTURED FUNCTION
FOR A NON·FILE
STRUCTURED DEVICE
AND MUST BE A READ
OR WRITE VIRTUAL
ALL OTHER FUNCTIONS
WOULD BE ILLEGAL
OR NO·OPS.

r--------------. --- - - - - - - -

10.ALB, l.FCN, I.PAM

_ _ _ _ _ _...__ _ _ _ _ _ _ _ -

10.RVB

ASSUME FUNCTION IS
READ VIRTUAL

-- -- -

FCTRN
PART?

IS IT READ VIRTUAL?

SET FUNCTION TO
WRITE LOGICAL BLOCK

PART7
FCTRN

Figure 6-2

QIO Directive Processing (Part 6 of 24)

6-11

I/O ·PROCESSING
PARTS

REFERENCES:
FCTRN
- - - - - - - - - - U.CTL,UC.LGH
CALL SACHKB TO
ADDRESS CHECK
BUFFER.
CHECK BUFFER
]
ALIGNMENT.

------------------ALIGNMENT

ERROR'~
~~PART11
IEBYT

ERROF~_r;-\.

ADDRESS CHECK
IESPC
ZERO LENGTH BUFFER?~~--i....:._/ PART 11

CALL
____
_ $RELOC
_ _ _TO
_] - - RELOCATE USER
BUFFER.
...

$RELOC

$MPPHY

l______r-:-\. 20$

VIRTUAL 1/0

__________
F_u_N_CT~1_o_N_1___ ~ PART7

CALL $MPPHY TO M A I ] - -

TO 18-BIT PHYSICAL
ADDRESS.

"-----------~------

20$

SET UP RELOCATION
BIAS AND DISPLACEMENT
ADDRESS.

FCXFR
PART9

Figure 6-2

QIO Directive Processing (Part 7 of 24)

6-12

I/O PROCESSING

PART 4 AND 11

REFERENCES:
SDRQRQ

- - - - - - - - - - - - -... - - - - - - - - - - u.sce, UC.QUE, U.CTL
QUEUE PACKET BEFORE
CALLING DRIVER?

_ _ _ _ _ _...__ _ _ _ _ _ -

10$
PARTS

-- $QINSP

_, -

CALL SQINSP TO
QIO PACKET IN
DEVICE QUEUE

10$
_ _ _ _ _ _...__ _ _ _ _ _ MAP DRIVER.
GET ADDRESS OF
DRIVER DISPATCH
TABLE. CALL
DRIVER INITIATOR.

KISAR6, D.PCB, P.REL
D.DSP, D.VINI

_ _ _ _ _ _...__ _ _ _ _ _ _ -

KISAR5

RESTORE APR 5

RETURN

Figure 6-2

QIO Directive Processing (Part 8 of 24)

6-13

I/O PROCESSING
REFERENCES:
FCCTL
FUNCTION IS CONTROL
FUNCTION. COPY
REMAINDER OF DPB.

MOUNTABLE DEVICE?

J
]=-0 ~
!i'T

:--,- -

U.CWl

US.MNT, US.FOR, U.STS

~ :P~I- -

STKTCB. T3.PRV0 T.ST3

MOUNTED AND NOT FOREIGN~ !~T g

POINT TO CURRENT TASK
TCB. TASK PRtVILEGED?

1..:../ PART 12

------------..--------10$
INSERT PARAMETER
1 INTO 1/0 PACKET
PARAMETER LIST.

FCXFR
INSERT PARAMETERS
2 THROUGH 6 INTO
1/0 PACKET
PARAMETER LIST

IS THIS DIAGNOSTIC
FUNCTION?

PART10

Figure 6-2

OIO Directive Processing (Part 9 of 24)

6-14

I/O PROCESSING
PART9
REFERENCES:

--------------- -

- - - 10$
PART 10

10.ATT

-------------- -- -

- - - 10$
PART 10

10.0ET

ATTACH FUNCTION?

DETACH FUNCTION?

-------------.- DEVICE ATTACHED
FOR DIAGNOSTICS?

- - IEPRI
PART 12

US.UMD, U.ST2

-------------.- CALL SACHCK TO ADDRESS
CHECK REGISTER BUFFER

$ACHCK

-----------------------cs
IESPC
PART 11

ADDRESS CHECK FAIL?

------------- CALL SRELOC TO RELOCATE
REGISTER BUFFER

10$
------------- -

-- -

SRELOC

- - - FCXIT
PART 12

10.LOV

LOAD OVERLAY FUNCTION?

-------------- -

- - - FCXIT
PART 12

U.CW1

$TKTCB, T. LDV

MOUNTABLE DEVICE?

------------- GET CURRENT TASK
TCB ADDRESS AND
UCB ADDRESS OF LOAD
DEVICE.

PART 11

Figure 6-2

OIO Directive Processing (Part 10 of 24)

6-15

I/O PROCESSING

PART 10

REFERENCES:

-· -

$MPLNO

T.LBN

CALL SMPLND TO MA
TO ACTUAL UCB
ADDRESS•

.__________________

MATO~ IEOVR

LOAD DEVICE
SPECIFIED UDB7

___r--L..I PART 11

GENERATE LOGICAl:---i- BLOCK NUMBER

__J

PARTS
$0RORQ

IESPC

IEOVR

IEBYT

IECMN

Figure 6-2

QIO Directive Processing (Part 11 of 24)

6-16

I/O PROCESSING

REFERENCES:
IEPRI
-------------. --- -

SET PRIVILEGE VIOLATION CODE

- - - IECMN
PART 11

IE.PAI

IE.IFC

FCXIT
CLEAN STACK ANO RETRIEVE
1/0 PACKET ADDRESS

SORQRQ
PARTS

IEIFC
-------------. SET ILLEGAL FUNCTION CODE

I D
-

PART11
-

- - IECMN
PART11

IE.OFL

- - - IECMN
PART 11

is.sue

I D

.__sE_T_o_e_v_i_cE_o_F_FL_l_N_E_sT_A_T_u_s__

ISSUC
-------------. SET SUCCESSFUL
COMPLETION CODE

IECMN

..._----------------IEOFL
----------------. -

IENOO
- - - - - - - - - - - - - - - - - - - - - - - IE.NOD
SET NO BUFFER
IECMN
AVAILABLE CODE
PART 11
IEBAO
-------------.. -

IENLN
-------------. - -

....._s_ET-BA_D
__
PA--RA_M_E_T_E_R_c_o_o_E___

IEALN
------------- SET FILE ALREADY
ACCESSED CODE

- - IECMN
PART11

IE.BAO

IE.ALN

IE.NLN

I D

SET NO FILE ACCESSED CODE
...__ _ _ _ _ _ _ _ _ _ _ _ _~

Figure 6-2

- - IECMN
PART 11

IECMN
PART11

QIO Directive Processing (Part 12 of 24)

6-17

I/O PROCESSING

PART4

REFERENCES:

IF FUNCTION CODE
LESS THAN 10, CRASH.
SHOULD NOT BE
PROCESSING HERE.

....____,
-------------- MOVE ADDRESS OF
POLISH DISPATCH
VECTOR TABLE, FCDSP,
INCREMENTED BY THE
FUNCTION CODE, INTO
R5 .

JUMP TO SPECIF IC
---------]- POLISH
ROUTINE
AND
EXECUTE IT.
..

------- POLISH
ROUTINES

MOV FCDSP(R2), R5

JM. P@(RS)+

POLISH ROUTINES
NOW SHOW IN
NUMERICAL SEQUENCE

10 =ILLEGAL FUNCTION
36 =ILLEGAL FUNCTION
37 •ILLEGAL FUNCTION

FCDSP:
.WORD FCIFC
FCIFC: .WORD IEIFC
]
------------

___}-0

12 =ILLEGAL FUNCTION
IF R$$LKL NOT DEFINED

IEIFC:

SET ILLEGAL FUNCTION
CODE.

POLISH ROUTINES
CONTINUE ON PART 14

IECMN
PART 11

--Figure 6-2

QIO Directive Processing (Part 13 of 24)

6-·18

I/O PROCESSING
REFERENCES:
FCDSP:
.--------------.WORD FCPKT
FCPKT: .WORD BDPKT

11 - FIND FILE NAME IN
DIRECTORY
13 - REMOVE FILE NAME
FROM DIRECTORY
14 - ENTER FILE NAME
IN DIRECTORY
23 - EXTEND FILE
25 - MARK FILE FOR
DELETE
26 - READ FILE ATTRIBUTES
27- WRITE FILE ATTRIBUTES
28- USER MAGTAPE CONTROL
FUNCTION

BDPKT:
BUILD AN 1/0 PACKET.
CALL OPPRM TO
INSERT OPTIONAL
FILE ID BLOCK.
OPPRM:

10$
CONTROL BLOCK
SPECIFIED?

- - - - - -.....- - - - - - - CALL $ACHCK TO
ADDRESS CHECK
BLOCK.

20$

THIS DISPATCH VECTOR
SEQUENCE USED BY:

$ACHCK

IESPC
PART 11

ADDRESS OK?

- - - - - - - - - - - - - - - - - - - - - - - $AELOC
CALL SRELOC TO
30$
RELOCATE BLOCK
ADDRESS.

20$
IEBAD
PART12

PARAMETER REQUIRED?

30$
RETURN TO INSTRUCTION
AFTER CALL TO OPRM

PART 16

Figure 6-2

QIO Directive Processing (Part 14 of 24)

6-19

I/O PROCESSING
PART 14

REFERENCES:
ATRBK:
HERE TO BUILD ATTRIBl;;-i
POINTER BLOCK".

__J

WAS AN A T T R I B U T E ] - - 0 MOVE3
DESCRIPTOR BLOCK
N
PART
SPECIFIED?

- - --------

I, LGTH,$ALOCB

SET LENGTH OF
SECONDARY
CONTROL BLOCK.
CALL $ALOCB TO
ALLOCATE THE BLOCI

.....__________________

~__r:"\.

IENOD
STORAGE AVAILABLE~ PART 12

~---------- MSTK,KISAR6

•
SAVE ADDRESS OF
BLOCK AND
CURRENT MAPPING

SET UP ATTRIBUTE
BLOCK POINTERS ANID
ADDRESSES.

CALL $ACHCK TO C H E < ] - -

$ACHCK

ADDRESS OF NEXT
ATTRIBUTE DESCRIPT<
BLOCK

------------...------

PART 16

Figure 6-2

QIO Directive Processing (Part 15 of 24)

6-20

I/O PROCESSING
PART 15

REFERENCES:

10$_ _ _ _ _...__ _ _ _ _ _ _ _ ,,,__

SET ADDRESS OF NEXT
ATTRIBUTE DESCRIPTOR.
ADDRESS CHECK OK?

$ACHCK

$RELOM

IESPC
PART 11

-------...------ CALL $RELOM TO
RELOCATE AND MAP
ATTRIBUTE DESCRIPTOR.

-- -

20$

END OF ATTRIBUTE
DESCRIPTOR BLOCK.

PART16

-------------- CALL $ACHCK TO
ADDRESS CHECK
ATT.RIBUTE BLOCK .

$ACHCK

. . - - - - - - _ . __ _ _ _ _ _ -

-- -

$RELOC

CALL $RELOC TO
RELOCATE ATTRIBUTE
BLOCK ADDRESS.

10$

ANY MORE SPACE IN
POINTER BLOCK?

PART 16

20$
CLEAN STACK. GET
ADDRESS OF NEXT
WORD IN 1/0 PACKET.
RESTORE CURRENT
MAPPING. RETRIEVE
ADDRESS OF NEXT
WORD IN DPB.

PART 17

Figure 6-2

QIO Directive Processing (Part 16 of 24)

6-21

I/O PROCESSING

PART 16

MOVE3:
INSERT EXTEND
CONTROL WORDS
AND ACCESS CONTROL
WORD IN 1/0 PACKET.

REFERENCES:

FILNM:
- - - - - -.....- - - - · - - - SET LENGTH OF
FILENAME BLOCK
AND CALL OPRM
(PART 15) TO INSERT
OPTIONAL FILENAME.
BLOCK

USE JMP @(R5)+
TO RETURN TO
NEXT WORD IN
VECTOR.

-OPRM (PART 15)

...__
FCDSP:
.WORD UNLXT
UNLCK: .WORD CKNLN

CKNLN:

]

THIS DISPATCH VECTOR
SEQUENCE USED BY:
12 - UNLOCK BLOCK

]-0
--1FILE ACCESSED ON
LUN?

JMP @(R5)+ TO NEXT
WORD.

1ENLN
PART 12

---

Figure 6-2

QIO Directive Processing (Part 17 of 24)

6-22

I/O PROCESSING
JMP@(R5)+ FROM CKNLN PART 17

REFERENCES:
UNLXT:
ADVANCE PACKET
POINTER. CLEAN UP
STACK, RESTORE R5.

FCCTL
PART9

r-------------- - - - - - - - FCDSP:

.WORD FCACC
FCACC: .WORD CKDMO

-16 - ACCESS FILE FOR READ
16-ACCESS FILE FOR READ
ANO WRITE
17 -ACCESS FILE FOR READ,
WRITE, AND EXTEND

CKDMO:
VOLUME MARKED FOR
DISMOUNT?

IEPRI
PART 12

JMP@(R5)+ TO NEXT
WORD IN VECTOR

FCCAW:

•••

. WOROCKALN

IEALN
PART 12

FILE ACCESSED ON LUN?

JMP@(R5)+ TO NEXT
WORD IN VECTOR

BO PKT
PART 14

FCCAW: .WORD CKALN
.WORD BDPKT

••
•
RETURN HERE
FROM BDPKT
SEQUENCE

JMP@(R5)+ AT END OF
BDPKT RETURNS HERE

PART19

Figure 6-2

QIO Directive Processing (Part 18 of 24)

6-23

I/O PROCESSING

PART 18

FCCAW: .WORD CKALN
.WORD BDPKT
.WORDCKRLK

CKRLK:
SET ACCESS/DEACCESS
PENDING INTERLOCK

REFERENCES:

J
J

...______
CKXIT:
REMOVE ADDRESS OF
SECOND LUN WORD.
REMOVE FUNCTION
CODE FROM STACK.
RETRIEVE UCB ADDRESS.
INCREMENT VOLUME
TRANSACTION COUNT.
EXIT POLISH ROUTINES.
FCDSP:

••
•

]---<J
-----D'

FCDAC: .WORD CKNLN
.WOAD BDPKT

JSR @(RS)+
FROM CKNLN
PART 17
BDPKT
PART 14

JSR @(RS)+
FROM BDPKT
PART 17

FCDAC: .WORD CKNLN
.WORD BDPKT
.WOAD CKRLK

CKRLK
PART 19

Figure 6-2

QIO Directive Processing (Part 19 of 24)

6-24

I/O PROCESSING

REFERENCES:
FCOSP:
-------------- .WORD FCRVB
FCRV'B: .WORD CKNLN.

•
••

- - - CKNLN
PART 17

21 - READ VIRTUAL BLOCK
32 - RECEIVE PROCESS IMAGE

JSR@(R6)+
FROMCKNLN
PART 17

FCRVB: .WORD CKNLN
.WORDCKRAC

CK RAC:
---------------- -- SET READ ACCESS
MASK WORD
CKWAC:
-------------- SET WRITE ACCESS
MASK WORD

-----WI.ADV

10$
PART20

- - -----Wl.WRV

10$
RETRIEVE ADDRESS OF
SECOND LUN WORD.
SET ACP VIRTUAL
FUNCTION FLAG.

DESIRED ACCESS
PERMITTED?

IEPRI
PART 12

RETRIEVE UCB ADDRESS.
EXECUTE AS TRANSFER
FUNCTION

FCTRN
PART7

Figure 6-2

QIO Directive Processing (Part 20 of 24)

6-25

I/O PROCESSING
REFERENCES:

____________________ 1--D

FCDSP:
- - - - - - - - - - - - - ·- .WORD FCWVB
FCWVB: .WORD CKNLN

__,

- - - - 22 -WRITE VIRTUAL BLOCK
CKNLN
31 -TRANSMIT PROCESS IMAGE
PART 17

•••

__________.....,___________ -(]

.._

FCWVB: .WORD CKNLN
.WORDCKWAC

JSR @(R5)+
FROM CKNLN
PART 17

CKWAC
PART 20
FCDSP:
- - - - - - - - - - - - - - - - - - - - - - - · - - - - - - - - - -24-CREATE FILE
.WORD FCCRE
CKDMO
.._
FCCRE: .WORD CKOMO
PART 18

t---D

_______________________,
••
•
FCC RE: .WORDCKDMO
.WORDCKACC

CKACC:

to-

-(]

JSR @(R5)+
FROM CKDMO
PART 18

to-

PART 21

l
ACCESS REQUESTED?

10$

l
POINT R5 TO #FCCAW

10$

T
JMP@(R5)+ TO NEXT
WORD

Figure 6-2

- - - - - - - - - - JUMP TO FCCAW (PART 18)
IF ACCESS REQUESTED.
IF ACCESS NOT REQUESTED,
JUMP TO FCPKT (PART 14).

QIO Directive Processing (Part 21 of 24)

6-26

I/O PROCESSING

REFERENCES:

I D

FCDSP:
--------------- -

.WORD FCCON
..____F_c_c_o_N_=_.w_o
__
R_o_c_K_o_M_o....,_...

33 -CONNECT TO PROCESS

CKDMO
PART1a

••
•

JMP@(R5)+
FROMCKDMO
PART 18

FCCON: .WORD CKDMO
.WORDCKALN

CKALN:
FI LE ACCESSED ON
LUN?

IEALN
PART 12

10$
JMP @(R5)+ TO
NEXT WORD

FCCON: .WORD CKDMO
.WORDCKALN
.WORDCKCON

••
•

CKCON:
,,,_
_ _ _ _ _ _ _ _ _ _ _....,.. -

JMP@(R5)+
FROM CKALN

- - CHECK CONNECT
PARAMETER BUFFER

GET LENGTH OF BUFFER
IN BYTES.

IESPC
PART 11

BUFFER 0 LENGTH?

CALL RQPRM TO
INTERPRET REQUIRED
BLOCK ADDA ESS

PART 23

Figure 6-2

OIO Directive Processing (Part 22 of 24)

6-27

I/O PROCESSING
PART 22

REFERENCES:

=1---D
-RQPRM:

SET REQUIREP
PARAMETER FLAG .

10$
PART 14

•••

10$

INSERT LENGTH OF
PARAMETERS ANO
COPY REMAINDER OF
PARAMETERS.

JMP @(R5)+ TO
NEXT WORD

RETURN FROM
OPPRM -10$
PART14

.____

••
•

--<J

FCCON: .WORD CKOMO ] .WORD CKALN
.WORDCKCON
.WORD CKRLK

JMP@(R5)+
RETURN
FROM CKCON
PART 22

FCOSP:

••
•
FCOIS: .WORD CKNLN
.WORDCKDIS

]---<J

JUMP @(R5)+5
RETURN FROM
CKNLN PART 17

CKDIS:

COPY FIRST P A R A M E T E R ] - - D 10$
INTO 1/0 PACKET
PART 23

••
•

PART 24

Figure 6-2

QIO Directive Processing (Part 23 of 24)

6-28

I/O PROCESSING

PART 23

REFERENCES:

•••

JMP@(R5)+
RETURN FROM
10$ PART 23

FCDIS: .WORD CKNLN
.WORDCKDIS
.WORDCKRLK

CKRLK
PART 19
FCDSP:
-------------- .WORD FCNCT
FCNCT: .WORD CKDMO

D
I
-------------------------

- - - -35 - NETWORK CONTROL
CKDMO
FUNCTION
·PART 18

•••

JMP@(RS)+
FROM CKDMO
PART 18

FCNCT: .WORD CKDMO
.WORDCKCON

CK CON
PART 22

FCNCT: .WORD CKOMO
.WORDCKCON
.WORD CKXIT

JMP@(RS)+
RETURN FROM
CKCON PART 22

CKXIT
PART 19

Figure 6-2

QIO Directive Processing (Part 24 of 24)

6-29

CHAPTER 7
MODULE DESCRIPTIONS

This chapter describes the modules, as individual units, that
the RSX-llM Executive programmtng functions.

perform

The modules are described in alphabetical order and the description of
a. new module always begins on a new page.

7.1

CHAPTER ORGANIZATION

The following information is presented in this chapter:
•

Module name

•

Macro Library Calls

•

Entry points {routines)

•

Function of this module or routines

•

Modules this module calls

•

Entry (input) conditions

•

Exit (output) conditions

The modules appear alphabetically and are grouped by system component.
Thus, this chapter describes the Executive modules, then the FCP
modules, and finally, the MCR modules1 all alphabetically.

7.1.1

Module Name

The module name starts the description of each module.
The name
always appears at the top of a new page following the description of
the previous module. A brief statement of the function of the module
is included here.

7.1.2

Macro Library Calls

These calls appear in the code listing after the copyright notice.
They are included here to show the data areas or control blocks to
which the module refers.

7-1

MODULE DESCRIPTIONS
7.1.3

Entry Points

The entry point is the globc!l label in the module to which program
control is transfered by another part of the program. It can also be
considered as the label of a routine within the module.
Statements
about the function of the routine are included here.

7.1.4

Calls

Included here are all the calls (using the CALL or CALLR macro) that
this routine executes. They are listed in order of appearance in the
code. Howev~r, they may appear more than once in the code.

7.1.5

Entry (input) Conditions

Entry conditions are those conditions set up by the routine that
called
this
routine or are present when this routine starts
processing. These parameters or conditions are in data areas or
registers in the form of data or addresses. The contents of these
registers or data areas may be altered by this routine.

7.1.6

Exit (output) Conditions

Exit conditions may be changed register contents, data area contents,
stack contents, or status indicators. Usually, the output is needed
by some other part of the system program.
However, the routine or
module may perform a function without producing anything that can be
defined easily as "output". In many of these cases, the routine
indicates that it completed its operation by altering the C-bit or
returning a directive status (for directive processing routines).

7.2

EXECUTIVE MODULE DESCRIPTIONS

7.2.l
BFCTL

BFCTL Module
The BFCTL module puts a byte or word into the user's
buffer or gets a byte or a word out of the user's buffer.
Also, moves data one byte at a time from place to place in
the memory of a mapped system.

Macro Library Calls
HWDDF$
Define hardware registers
Entry Point $GTBYT::
The GTBYT routine maps to the user buffer if Memory
Management is defined. GTBYT gets the next byte from the
user buffer and returns it to the caller on the stack.
After the byte has been fetched, $GTBYT increments the
next byte address.
Calls

None

7-2

MODULE DESCRIPTIONS
Input

RS • Address of the UCB that contains the buffer pointers.

Output

The stack contains the byte from the user buffer.

Note

All registers are preserved across the call.

Entry Point $PTBYT::
The PTBYT routine maps to the user buffer if Memory
Management is defined.
PTBYT puts a byte in the next
location in the user buffer and increments the next byte
address.
Calls

None

Input

RS = Address of the UCB that contains the buffer pointers.
Stack = Byte to be stored in the next location in the user
buff er

Output

$PTBYT removes the byte from the stack and stores it in
the user buffer. $PTBYT increments the next byte address.

Note

All registers are preserved across the call.

Entry Point $GTWRD::
Gets the next word from the user buffer and returns it to
the caller on the stack. After the word has been fetched,
$GTWRD calculates the next word address.
Calls

None

Input

RS = Address of the UCB that contains the buffer pointers.

Output

$GTWRD fetches the next word from the
returns it to the caller on the stack.

user

buff er

and

Stack = Next word of user buffer
Note

All registers are preserved across the call.

Entry Point $PTWRD::
The PTWRD routine puts a word in the next location in the
user buffer.
After storing the word, $PTWRD calculates
the next word address.
Calls

None

Input

RS = the address of
pointers.

the

UCB

Stack = Word to be stored in
buffer.

that
the

contains
next

location

Output

$PTWRD removes the word from the stack and
the user buffer.

Note

All registers are preserved across the call.

7-3

the

stores

buffer
of

the

M~DDOLE

DESCRIPTIONS

Entry Point $GTCWD::
The GTCWD routine gets the next word from the user control
buffer and returns it to the caller on the stack.
Calls

None

Input

RS • Address of the UCB that contains the buffer pointers.

Output

$GTCWD fetches the next word from the user control
and returns it to the calle~ on the stack.
Stack • next word of user buff er

Note

All· registers are preserved across the call.

buffer

Entry Point $BLXIO::
The BLXIO routine moves data within the memory of a mapped
system.
Calls

None

Input

RO = Number of bytes to move
Rl = Source APRS bias
R2 = Source displacement
R3 = Destination APR6 bias
R4 = Destination displacement

Output

After BLXIO finishes moving the data:
RO and RS are all tered
Rl and R3 are preserved
R2 points to the last byte of the source +1
R4 points to the last byte of the destination +l

7.2.2
CORAL

CORAL Module
This module contains the core allocation routines.
The
memory search algorithm looks for the first block of
memory that is available for allocation.
The size is
rounded upward to a multiple of four bytes.

Macro Library Calls
CLKDF$
Define clock queue control block offsets
PKTDF$
Define I/O packet offsets
Entry Point $ALOCB::
The ALOCB routine allocates a core buffer
$ALOC1::
The ALOCl routine allocates a core buffer
entry)
Calls

None

Input

(alternate

= Address 01: core allocation listhead -2 if entry is at

$ALOC1.
Rl = Size of the core buffer to allocate in bytes
Output

C = l if insufficient core is available
block
c = 0 if the block is allocated
RO = Address of. the allocated block
Rl = Length of the allocated block

7-4

allocate

the

MODULE DESCRIPTIONS
Entry Point $ALCLK::
The ALCLK routine allocates a core block for a clock queue
entry.
This routine stores the length of the clock block
in Rl.
Calls

None

Input

None

Output

If core is not available to allocate the block, $ALCLK
returns a
'D.RSl' directive status. If enough core is
available, $ALCLK returns the address of the allocated
block to the caller in RO.

Note

The ALCLK
routine.

routine

common

code

with

the

ALPKT

Entry Point $ALPKT::
The ALPKT routine allocates a core block for a SEND or I/O
REQUEST queue entry. $ALPKT stores the length of the I/O
Packet (I.LGTH) in Rl and calls $ALOCB to allocate the
block.
Calls

$ALOCB

Input

None

Output

If core is not available to allocate the block, $ALPKT
returns a directive status of 'D.RSl'. Otherwise, $ALKPT
returns the address of the allocated block to the caller
in RO.

Entry Point $DEACB::
The DEACB routine deallocates the core buffer.
$DEAC1::
The DEACl routine deallocates the core buffer
entry).

(alternate

DEAC inserts the Executive core block to be deallocated
into the free block chain by core address. If an adjacent
block is currently free, DEAC merges the two blocks and
inserts them in the free block chain.
Calls

None

Input

RO = Address of the core buffer to be deallocated
Rl = Size of the core buffer to deallocate in bytes
R3 = Address of core allocation listhead -2 if entry is at
$DEAC1

Output

DEAC merges the core block into the free block chain by
core address and agglomerates it with adjacent free
blocks.

Error

The system crashes if deallocation is attempted before the
front or past the end of the system pool.

Entry Point $DECLK::
The DECLK routine deallocates a core block that
for a clock queue entry.
Calls

None (branches to $DEACB)

7-5

was

used

MCtDOLE DESCRIPTIONS

Input

RO • Address of the core block to be deallocated

Output

DECLK deallocates the clock queue entry
agglomerates adjacent free core blocks~

core

block

and

Entry Point $DEPKT::
The DEPKT routine deallocates a core block that
for a SEND-or I/O REQUEST queue entry.

was

used

Calls

None

Input

RO • Address of the core block to be deallocated.

Output

The core block is deallocated.

Note

This routine uses the code in the DEACB routine.

7.2.3

CRASH

CRASH Module

This module is E!ntered via a JUMP whenever a fatal system
error is detected.
This routine dumps memory on a
DECtape, RKOS, TUlO or TU16. The first block of the dump
contains information about the state of the system at the
time of the crash. When the dump is finished, you may
reboot the system or re-execute the dump.
This module uses the following local data and routines:
CRSMSG:

MessagH: /CRASH -- CONT WITH SCRATCH
xxO/
where: xx = OT, DK, MT, or MM
$CRSBF:: Internal crash stack
$CRSST•• Top of crash stack
$CRSBN:: Starting device address
$CRSCS:: Checksum of device address
AGAIN:
Type a message and wait for the user
$CRSHT:: Wait for the user
$CRSUN:: Crash unit number
TYPE:
Type an ASCIZ message
CKSUM:
Verify checksum of device address
Dump the system image
DUMP:

MEDIA

Macro Library Calls HWDDF$
Define hardware registers
Entry Point $CRASH::
This is the system crash dump routine.
Calls

TYPE, CKSUM

Input

02(SP) = PS word at crash.
(SP) • PC word at crash.

Output

The internal crash stack and a core image of the system
(up to 128K) are dumped onto the crash dump device.

7-6

MODULE DESCRIPTIONS
7.2.4
CVRTM

CVRTM Modale
The CVRTM routine converts a pair
units to a clock ticks count.

time

interval-time

Macro Library Calls None
Entry Point $CVRTM::
Time interval-units pair to clock ticks count conversion
Calls

$MUL

Input

R3 = Address of the time interval pair.

Output

CVRTM returns the ticks count to the calling routine by
placing the high order part in RO and the low order part
in Rl. CVRTM advances R3 by 4, thus pointing past the
time interval-time units pair.
If the calling routine
specified an illegal time interval (greater than 15 bits)
or illegal time units (0 or greater than 4), CVRTM returns
a directive status of 'D.RS93'.

7.2.S
DRABO

D~BO

Module
The directive processing
module,
DRABO,
(aborts) the execution of a specified task.

terminates

Macro Library Calls ABODF$
Define task abort codes.
Entry Point $DRABO::
The DRABO routine aborts a specified task.
Calls

$ABTSK

Input

RO = Address of the TCB of the task to be terminated.
Rl = Address Of the task status word of the task to be
ended.
R2 = Address of the task status word of the current task.
R3 = Address of the last word in the DPB+2.
R4 = Address of the header of the current task.
RS = Address of the TCB of the current task.

Output

DRABO returns directive status (D.RS7) and PS to the task.
C = 0 if DRABO successfully completed execution.
DRABO returns a directive status of +l.

Also,

C = 1 if DRABO is rejected.
Directive status returned:
'D.RS7' if the specified task is not active
Note

DPB format:
WO.
WO.
WO.

Error

00
DIC(83.),DPB size(3.)
01 -- First half of task name
02 -- Second half of task name

Reason for abort (in S.CABO) is set into RO before calling
$ABTSK.
7-7

MODULE DESCRIPTIONS
7.2.6
DRASG

DRASG Module
The directive processing module, ORASG, assigns
unit to a logical unit number.

device

Macro Library Calls TCSDF$
Oef ine task control block offsets.
Entry Point $DRASG::
Assigns logical unit number (LUN)
Calls

$MPLUN, $MPLNO, $MUL

Input

R2 • Address of the task status word of the current task.
R3 • Address of the logical unit number in the DPS.
R4 = Address of the header of the current task.
RS • Address of the TCS of the current task.

Output

DRASG returns directive
routine.

status

and

the

calling

C = O if DRASG s:uccessfully completes execution.
ORASG retuirns a directive status of +l.

Also,

C = 1 if the DRJ\.SG directive routine is rejected.
Directive status returned:
'D.RS90' if a file is open or a unit is attached on
specifi.ed LUN.
'D.RS92' if a device or unit, or device and unit
invalid.
Note

the
are

The DPS format i.s:
DIC(7.),DPS size(4.)
00
LUN to be assigned
01
Name of device to be assigned
WO. 02
Unit number of device to be assigned
WO. 03
WO.
WO.

7.2.7
DRATX

DRATX Module
The directive processing module DRATX instructs the system
to end the execution of an asynchronous system trap (AST)
service routine. If another AST is queued and AST's are
not disabled, the next queued AST is immediately executed.

Macro Library Calls ASODF$
Define task abort codes
HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
Conditional Assembly Parameters A$$TRP
AST support
C$$CKP
Checkpointing support
D$$ISK
Non-resident task support
M$$MGE
Memory management
A$$CHK
Address checking

7-8

MODULE DESCRIPTIONS
Entry Point $DRATX::
The DRATX routine ends AST service.
Calls

$NXTSK, $ACHCK, $RELOM, $SETRT, $ABCTK

Input

R2
Rl
R4
RS

Output

DRATX returns a directive status and PS word to the task.

•
•
•
•

Address of
Address of
Address of
Addres·s of

the task status word of the current task
the last word in the DPB +2
the header of the current task
the TCB of the current task

C • 0 if the
DRATX
routine
successfully
completed
execution.
Also,
the DRATX routine restores the
status of the pre-AST state.
C • 1 if the DRATX routine is rejected.
Directive status returned:
'D.RS80' if an AST service routine
DRATX directive.
Note

did

not

execute

the

If an address check failure occurs
while
removing
arguments from the task stack, the issuing task is aborted
(S.CAST is placed in RO and $ABCTK is called).
The OPB format is:
WD. 00 -- OIC(llS.) ,DPB size(l.)
At issuance, the task stack contains:
14(SP) = (Unused)
12(SP) • (Unused)
lO(SP) = (Unused)
06(SP) =Event flag mask word.
04(SP) =Pre-AST task PS
02(SP) = Pre-AST task PC
OO(SP) =Pre-AST task directive status word

Error

7.2.8
DRCIN

Possible ABORT as described in above note.

DRCIN Module
The DRCIN module either connects or
disconnects
a
specified interrupt vector to an interrupt service routine
(ISR) in the task's own space.

Macro Library Calls HWDDF$
Define hardware registers
TCBDF$
Define task control block offsets
PCBDF$
Define partition control block offsets
ITBDF$
Define interrupt transfer block (ITB) offsets
Entry Point $DRCIN::
This routine connects a specified interrupt vector to an
interrupt service routine (ISR) in the task's own space.
DRCIN allocates a block of dynamic memory and sets up the
block as an interrupt transfer block (ITB). The !TB is
linked to the !TB list of the task with the listhead, a
single word,
in T.CPCB of the TCB.
DRCIN disables
shuffling and checkpointing for the task and sets up the
vector to point to the offset X.JSR in the ITB that
contains a subroutine call to the special interrupt save
routine $INTSC.

7-9

MODULE DESCRIPTIONS
Input

R2 •
R3 •
R4 •
RS •

Output

DRCIN returns d:lrective s.tatus and the PS to the task.

Address of the task status word of the current task
Pointer to WD. 01 in the DPB
Address of the header of the current task
Address of the TCB of the current task

C • 0 if DRCIN 13uccessfully completes
directive status of +l.

execution

with

c • 1 if execut:lon is unsuccessful.

Directive status returned:
D.RSl
An ITB could not be allocated (no pool space)
D.RSS
The function requested is disconnect and the task
is not the owner of the vector.
D.RS16 Issuing task is not privileged
D.RS17 The specified vector is already in use
D.RS19 The specified vector is illegal (lower than 60 or
higher
than the highest vector specified at
SYSGEN, or not a multiple of 4)
D.RS81 The ISR or disable-interrupt routine is not within
4K words from the specified base address
Note

The DPB format is:
WO. 00
DIC (1:29.), DPB size(7.)
WO. 01
Inter:cupt vector address
Base
WO. 02
address
mapping
of
and
for
ISR
disable-interrupt
routines.
Ignored in an
unmapped system.
WO. 03
Addre:ss of interrupt service .routine. If zero,
directive is "disconnect from interrupts" and
remaining arguments are ignored.
WO. 04
Address of disable interrupt routine
(Low lbyte) low byte of PSW to be set before
WO. 05
calling ISR
WO. 06
Addre:ss of AST routine

Entry Point $DISIN::
This routine disconnects a specified interrupt vector from
an interrupt service routine (ISR) in the task's own space
and deallocates the associated block of memory.
When disconnecting the last or only vector, DISIN clears
the checkpoint-disable bit (T2.CKD) and the no-shuffle bit
(PS.NSF). DISIN_does this regardless of what the state
was before vectors were connected or any change in state
while vectors were connected except if the task is marked
for abort. In this case it is not made shufflable.
The
1.

2.
3.

~outine

DISIN:

Removes the ITB from the ITB list starting in T.CPCB
of the task's TCB
Calls the user routine that disables interrupts and
that was supplied to DRCIN and to which the vector
was connected.
Restores the vector PC to point to the nonsense
interrupt routine

7-10

MODULE DESCRIPTIONS
4.
S.
6.

Removes the fork block of the ITB if it is in the
fork queue
Removes the AST block of the ITB if it is in the AST
queue for the task
Enables checkpointing for the task if this was the
only vector connected to the task and makes the task
shuf flable if the task runs in a system controlled
partition.
Deallocates the ITB

Input

Rl • Pointer to the interrupt transfer block (ITB)
RS • Pointer to task TCB

Output

C • 0 if DISIN successfully completes execution
C • 1 if the task is not the owner of the vector

Note

7 •2 •9
DRCMT

Registers RO, Rl, R2, and R3 are altered by this routine

DRCMT Mod·ale
processing
directive
DRCMT contains
the
following
routines:
Cancel·all mark time requests for the issuing
$DRCMT
task
$DRCSR
Cancel all schedule requests for a specified
task

Macro Library Calls CLKDF$
Define clock queue control block offsets
Entry Point $DRCMT::
The DRCMT routine cancels all mark time requests
issuing task.

for

the

Calls

None

Input

R2 = Address of the task status word of the current task
R3 • Address of the last word in the DPB +2
R4 • Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRCMT returns directive status and the PS to the task.
C = 0 with a directive status of +l

Note

This routine is also called from the EXIT
requires only RS to be loaded on entrance.
DRCMT shares common code with DRCSR.

directive

and

The DPB format is:
WO. 00 -- DIC(27.),DPB size(l.)
Entry Point $DRCSR::
The DRCSR routine cancels
specified task.
Calls

all

schedule

requests

$CLRMV - to remove periodic single-shot requests,

7-11

for

M•:>DULE DESCRIPTIONS

Input

RO • Address of the TCB for which to cancel schedule
requests
Rl = Address of the task status word of the task for which
to cancel schedule requests
R2 • Address of the task status word of the current task
R3 • Address of the last word in the DPB +2
R4 = Address of the header of the current task
RS • Address of the TCB of the current task

Output

DRCSR returns directive status and PS to the task.
c • O with a directive status of +l

Note

The DPB format is:
WO. 00
DIC(25.),DPB size (3.)
WO. 01
First half of task name
WO. 02 -- Second half of task name

7.2.10
DRDAR

DRDAR Module
The
directive
recognition of
task.

processing
module,
DRDAR,
disables
asynchronous system traps for the issuing

the
following
DRDAR contains
routines:
Disable AST recognition
$DRDAR
Enable AST recognition
$DREAR

directive

processing

Macro Library Calls TCBDF$
Define task control block offsets
Entry P-oint $DRDAR::
The DRDAR routine disables AST recognition.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB +2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRDAR returns directive status and PS to the calling task.
C = 0 if the DRDAR directive successfully
completes.
Also, DRDAR returns a directive status of +l.
C

= 1 if the DR.DAR routine is rejected.

Directive status returned:
'D.RS8' if AST recognition is already disabled.
Note

The DPB format is:
WD. 00 -- DIC(99.),DPB size(l.)

Entry Point $DREAR::
The DREAR routine causes the
system
to
recognize
asynchronous system traps for the issuing task. ASTs that
have been queued while AST recognition was disabled are
processed immediately.

7-12

MODULE DESCRIPTIONS
Calls

$SETRT

Input

R2 •
R3 •
R4 •
RS •

Output

DREAR returns directive status and PS to the task.

Address of the task status word of the current task
Address of the last word in the DPB +2
Address of the header of the current task
Address of the TCB of the current task

C • 0 if the DREAR routine successfully completes.
DREAR returns a directive status of +l.

Also,

c • 1 if the DREAR routine is rejected.
Directive status returned:
'D.RS8' if AST recognition is not disabled.
Note

7.2.11
DRDCP

The DPB format is:
WO. 00 -- DIC(lOl.),DPB size (1.)

DRDCP Module
The directive processing module, DRDCP, causes the system
to disable or enable checkpointing of the issuing task.
following
DRDCP contains
the
routines:
Disable checkpointing
$DRDCP
Enable checkpointing
$DRECP

directive

processing

Macro Library Calls TCBDF$
Define task control block offsets
Entry Point $DRDCP::
Disable checkpointing
Calls

None

Input

R2 = Address of
R3 = Address of
R4 = Address of
RS = Address of

Output

DRDCP returns directive status and PS to the task.

the task status word of the current task
the last word in the DPB +2
the header of the current task
the TCB of the current task

C = 0 if the
DRDCP
routine
successfully
completes
execution.
Also, DRDCP returns a directive status
of +l.

c = 1 if the DRDCP routine is rejected.
Directive status returned:
'D.RS8' if checkpointing is already disabled for
issuing task.
'D.RSlO' if the issuing task is not checkpointable.
Note

The DPB format is:
WO. 00 -- DIC(95.) ,DPB size(l.)

7-13

the

M0DULE DESCRIPTIONS
1

Entry Point $DRECP::
The DRECP routine enables
task.

checkpointing

the

Calls

$NXTXK

Input

R2 •
R3 •
R4 •
RS •

Output

DRECP returns directive status and PS to the task.

issuing

Address of the task status word of the current task
Address of the last word in the DPB +2
Address of the header of th·e current task
Address of the TCB of the current task

C • O if the
DRECP
routine
successfully
completed
execution.
Also, DRECP returns a directive status
of +l.
C = 1 if the ORECP routine is rejected.
Directive status returned:
'D.RS8' if checkpointing is already enabled.
Note

7.2.12
DRDSP

The DPB format is:
WD. 00 -- DIC(97.),DPB size(!.)

DRDSP Module
The DRDSP module is the directive dispatcher.
following
directive
processing
DRDSP contains
the
routines:
$TRTRP
The '!'RAP instruction traps to this routine
$EMTRP
The EMT instruction traps to this routine

Macro Library Calls HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
TCBDF$
Define task control block offsets
WDBDF$
Define user window definition block offsets
Entry Point $TRTRP::
During execution, a TRAP instruction traps to
this
routine.
TRTRP returns a directive status if the stack
depth is zero. Otherwise, TRTRP transfers control to the
EMT/TRAP syncht·onous system trap handling routine.
Calls

None

Input

2(SP) •PS word pushed by TRAP instruction
(SP) = PC worCI pushed by TRAP instruction

Output

TRTRP returns directive status in the stack if stack depth
is zero.

7-14

MODULE DESCRIPTIONS
Entry Point $EMTRP::
When an EMT instruction execution occurs, the trap occurs
to this routine.
EMTRP crashes the system if the stack
depth is not +l. If the stack depth is +l, EMTRP checks
the EMT instruction for the presence of code 377. If the
code was other than 377, EMTRP transfers control to the
EMT/TRAP SST handling routine. If 377 was present, EMTRP
processes the coded directive.
The following processing occurs within EMTRP.
The EMTRP routine:
1.
2.
3.
4.
5.

Calls $DIRSV (coroutine) to switch to system state and
save registers RO - RS.
Checks directive validity
(DIC odd,
size of DPB
valid).
Maps to DPB using KAPR6 if a mapped system is being
used.
Processes common functions if required (for instance,
masks).
Sets up the following registers prior to calling the
directive processing routine:
RS = Address of current task's TCB
R4
Address of current task's header
R3 = Address of the next word in the directive DPB
R2 = Address of second task status word of the current
task
Rl = Directive dependent
RO = Directive dependent
Calls the Directive Processing routine
Sets the DSW, gets cor~ect stack pointers,
and
restores registers.
Enters $DIRXT through $DIRSV which restores RO
RS
and exits.

6.
7.
8.

Calls

$ACHK2, $ACHKP, $CEFN, $SRSTD, $DIRSV, $SWSTK, $EMSST

Input

2(SP) = PS word pushed by the EMT instruction
(SP) = PC word pushed by the EMT instruction

Output

EMTRP crashes the system if the stack depth is not +l.
Otherwise, EMTRP gives control to the EMT/TRAP SST routine
or the specified directive routine.
If the EMT had a code
of 377, EMTRP gives control to the specified directive
routine.

Note

The stack depth ($STKDP)

7.2.13
DREIF

is defined in SYSCM.

DREIF Module
This is the EXIT directive processing module.
processing
directive
DREIF contains
following
the
routines:
End execution of issuing task if specified event
$DREIF
flag is clear
$DREXT
End execution of issuing task

7-15

MC)DOLE DESCRIPTIONS

Macro Library Calls ABOOF$
Define task abort codes
HOROF$
Define task header off sets
PCBDF$
Define partition control block offsets
PKTDF$
Define I/O packet offsets
TCBCF$
Define task control block offsets
Entry Point $DREIF::
This routine causes the system to end the execution of the
issuing task only if an indicated event flag is clear.
Calls

None

Input

RO • Event flag mask word
Rl = Event flag mask address
R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DREIF returns directive status and the PS to the task.

c = O if DREIF successfully completes processing.

c = 1 if DREIF is rejected.

Note

Directive status returned:
'D.RS22' if the specified event flag is set.
'D.RS97' if an invalid or no event flag number was
specified when DREIF was called.
The DPB format is:
WO. 00
DIC(53.),0PB size(2.)
WO. 01 -- Event flag number of event flag that must be
cleat'

Entry Point DREXT::
The DREXT routine causes the system to end
of the issuing task.

the

execution

Calls

$DRCMT, $DRSIN, $RLMCB, $DASTT, $ABCTK, $IOKIL, $ALOCB,
$DRQRQ, $ACTRM, $EXRQN, $TKWSE, $CSTA, $QMCRL, $RLPAR,
$DETRG, $DEACB, $CROSE, $QRMVF, $FINBF, $MPLNE,

Input

R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB +2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task
The dispatcher also calls this routine.
only RS need be loaded on entrance.

Output

The DREXT routine returns directive status and the
the task.
No other status is returned to the
routine ends the task's execution.

Note

When this occurs,

task

because

to
this

The DPB format is:
WO. 00 -- DIC(51.),DPB size(l.)
The DREXT routine contains a subroutine to empty a queue
(MTQUE:) and a coroutine to scan a logical unit table
(SCNLN:) •

7-16

MODULE DESCRIPTIONS
7.2.14
DREXP

DREXP Module
The DREXP module extends tpe partition by
negative increment.

positive

Macro Library Calls HWDDF$
Define hardware offsets
HDRDF$
Define task header offsets
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point the
$DREXP::
The DREXP routine causes the system to extend
partition of the issuing task by a positive or negative
amount.
Calls

$SETRT, $CHKPT, $MAPTK

Input

R2 = Address of the second task status word of the current
task
R3 = Address of the extend increment in the DPB
R4 = Address of the header of the current task
RS • Address of the TCB of the current task

Output

The DREXP routine returns directive status and the
the task.

C = 0 if the
DREXP
routine
successfully
completes
processing.
Also, DREXP returns a directive status
of +l.
C = 1 if the DREXP routine is rejected.
Directive status returned:
'D.RS8' under the following conditions:
• The task is not checkpointable and specified a positive
increment
• The task has a preallocated checkpoint space and is
trying to extend its space greater than the installed
size.
• The task is not in a system controlled partition.
'D.RS88' if the specified increment is invalid.
Note

The DPB format is:
WD. 00
DIC(89.) ,DPB size(3.)
WO. 01
Extend increment
WO. 02 -- Reserved

7-17

MODULE DESCRIPTIONS
7.2.15
DRGCL

DRGCL Module
The directive processing module, DRGCL, gets
command line or releases the MCR command buffer.

the

MCR

DRGCL contains
the
directive
processing
following
routines:
$DRGCL
Transfer a 1 through 80 byte command line to MCR
·function task
$RLMCS
Relea.se MCR ,command buffer
Entry Point $DRGCL::
The DRGCL routine causes the system to transfer a 1
through 80.
byte command line to the last MCR function
task requested by the dispatcher.
Calls

Calls a subroutine to search for the
the current task.

Input

R2 • Address of the task status word of the current task
R3 = Address of the 80. byte buffer in the DPS.
R4 = Address of the header of the current task
RS = Address of: the TCS of the current task

Output

DRGCL returns the directive
current task.

status

command

and

the

buff er

for

the

C = O if DRGCL successfully completed execution.
Also,
DRGCL returns a directive status equal to the length
of the cc>mmand 1 ine in bytes.
C = 1 if DRGCL does not complete execution.
Directive status returned:
'D.RS80' if the issuing task is not the last task that was
requested by the MCR dispatcher.
Note

The DPB format is:
WO. 00 -- DIC(127.) ,DPS size(41.)
WO. 01 through wo. 50 -- First through last
80. byte buffer

word

the

Entry Point $RLMCS::
The RLMCS routine releases the MCR command buffer.
Calls

$DEACS, 30$ (Subroutine to search for the
for the current task)

Input

RS = Address of the TCB of the current task

Output

If the command line currently in the MCR command buffer is
for the current task, RLMCS releases the buffer and clears
$MCRTN.

7-18

command

buffer

MODULE DESCRIPTIONS
7.2.16
DRGLI

DRGLI Module
The directive processing module, ORGLI, causes the system
to fill a six word buffer with 1nformation about a device
that is assigned to a specified LUN. If requests to the
device have been redirected, the information returned by
DRGLI pertains to the redirected device.

Macro Library Calls HWDDF$
Define hardware registers
Entry Point $DRGLI::
Puts logical unit
buffer.

number

information

into

six

word

Calls

$MPLUN, $ACHKP, $DIV

Input

R2 = Address of the task status word of the current task
R3 • Address of the LUN in the DPS
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

The DRGLI routine returns directive status and the
the task.
C = 0 if DRGLI successfully completes.
returns a directive status of +1.

Also,

DRGLI

C = 1 if DRGLI does not complete exection.
Directive status returned:
'D.RSS' if no device is assigned to the specified LUN.
Note

The DPB format is:
WD. 00
DIC(S.),DPB size(3.)
WD. 01
LON for which information is returned
WD. 02
Address of a six word buffer
WD.
WO.
WD.
WO.
WO.
WD.

7.2.17
DRGPP

00
01
02
03
04
05

The six-word buffer format is:
Name of assigned device
Unit number of assigned device and flags byte
First device characteristics word
Second device characterisitics word
Third device characteristics word
Fourth device characteristics word

ORGPP Module
The directive processing module, DRGPP, causes the
to fill a 3-word buffer with partition parameters.

system

Macro Library Calls PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $DRGPP::
The directive processing routine, DRGPP,
buffer with partition parameters.

7-19

fills

3-word

MODULE DESCRIPTIONS
Calls

$SRATT, $SRNAM, $ACHKP

Input

R2 •
R3 •
R4 •
RS •

Output

The ORGPP routine returns directive status and the
the task. ·

Address of the task status word of the current task
Address of the partition name in the OPB
Address of the header of the current task
Address of the TCB of the current task
PS

C • O if DRGPP successfully completed execution.
Also,
DRGPP returns a directive status equal to the
starting virtual address of the specified partition.
C • 1 if DRGPP is rejected.
Directive status returned:
'D.RS2' if the specified partition is not in the system.
Note

The DPB format is:
WO. 00
OIC(65.),DPB size(4.)
WO. 01
First half of optional partition name
WO. 02 -- Second half of optional partition name
WO. 03 -- Address of a three word buffer
The buffer format is:
WO. 00
Base address of the partition in 32 word blocks
WO. 01
Size of the partition in 32 word blocks
WO. 02 -- Partition flags word

7.2.18
DRGSS

DRGSS Module
The directive processing module, DRGSS, causes the system
to store the contents of the console switch register in
the issuing task's directive status word.

Macro Library Calls HWDDFS
Define hardware registers
Entry Point $0RGSS::
This routine ge·ts the sense switch information.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB +2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

The DRGSS routine returns the directive status and the
to the task.

C = 0 with a directive status eoual to the contents of the

console switch register.

Note

The DPB format is:
WO. 00 -- DIC(l25.) ,DPB size(l.)

7-20

MODULE DESCRIPTIONS
7.2.19
DRGTK

DRGTK Module
The directive processing module, DRGTK, causes the
to fill a 16-word buffer with task parameters.

system

Macro Library Calls HDRDF$
Define task header offsets
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $DRGTK::
This routine get.s task parameters.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the sixteen word buff er in the DPB
R4 = Address of the header of the current task
RS • Address of the TCB of the current task

Output

DRGTK returns directive status and the PS to the task.
C = 0 with a directive status of +l.

Note

The DPB format is:
WD. 00 -- DIC(63.) ,DPB size(2.)
WD. 01 -- Address of a sixteen word buffer
The buffer format is:
oo
First half of the name of the issuing task
WO. 01
Second half of the name of the issuing task
WD. 02
First half of the name of the task's partition
WO. 03
Second half of the name of the task's partition
we. 04
First half of requesting task's name
(not
supported)
we. 05
Second half of requesting task's name (not
supported)
we. 06
Task priority
WO. 07
Current task UIC
WO. 10
Number of logical units
WO. 11
Machine type indicator (not supported)
WO. 12
Standard flags word (not supported)
WO. 13
Address of task SST vector table
WD. 14
Size of task SST vector table in words
WO. 15
Size of task in bytes
WD. 16
Reserved
we. 17
Reserved

we.

7.2.20
DRGTP

DRGTP Module
The directive processing module, DRGTP, causes the system
to fill a specified 8-word buffer with the current time
parameters.

Entry Point $DRGTP::
The DRGTP routine fills an 8-word buffer with the
time parameters.
Macro Library Calla None

7-21

current

MODULE DESCRIPTIONS
Calls

$ACHKP

Input

R2 •
R3 •
R4 •
RS •

Output

The DRGTP routine returns directive status and the
the task.

Address of the task status word of the current task
Address of the second word in the DPB
Address of the header of the current task
Address of the TCB of the current task
PS

C • 0 if the
DRGTP
routine
successfully
completes
execution.
Also, DRGTP returns a directive status
of +1.
C • 1 if DRGTP does not complete execution.
Directive status returned:
'D.RS98' if the buffer is
addres:s space.
Note

outside

the

issuing

task's

The DPB format is:
WO. 00 -- DIC(61.) ,DPB size(2.)
wo. 01 -- Address of an eight word buffer
The buffer format is:
wo. 00
Year since 1900
WO. 01
Month of year
WD. 02
Day of month
WO. 03
Hour of day
WO. 04
Minute of hour
wo. 05
Second of minute
wo. 06
Tick of second

7.2.21
DRMAP

DRMAP Module
The directive processing
following routines:
$DRCRW::
$DRELW::
$DRMAP::
$DRUNM::
$DRSRF::
$DRRRF::

module,

DRMAP,

contains

the

Create an address window
Eliminate address window
Map window to region
Unmap address window
Send by reference
Receive by reference

These directive processing routines receive, as input,
pointers
to a window definition block.
The window
definition block serves as a communication area between
the issuing task and the Executive.

7-22

MODULE DESCRIPTIONS
The format of the window definition block is:
W.NAPR
W.NID

BASE APR

WINDOW ID

W.NBAS

VIRTUAL BASE ADDRESS (BYTES)

W.NSIZ

WINDOW SIZE (32W BLOCKS)

W.NRID

REGION ID

W.NOFF

OFFSET IN PARTITION (32W BLOCKS)

W.NLEN

LENGTH TO MAP (32W BLOCKS)

W.NSTS

STATUS WORD

W.NSRB

SEND/RECEIVE BUFFER ADDRESS (BYTES)

Macro Library Calls HDRDF$
Define header and window block offset
PCBDF$
Define PCB and attachment descriptor offsets
TCBDF$
Define TCB offsets
WDBDF$
Define window definition block offsets
Entry Point $DRCRW::
The DRCRW routine causes the system to allocate an address
window in the header of the issuing task. The routine
unmaps and eliminates overlapping address windows and,
optionally, maps the new window.
Calls

ELAW (to eliminate addr.ess window)

7-23

MODULE DESCRIPTIONS
Input

R2 •
R3 •
R4 •
RS •

Addre~s

of the task status word of the current task
Address of the window definition block
Address of the header of the current task
Address of the TCB of the current task

Input fields of the window definition block are:
W.NAPR • Base APR of region
W.NSIZ • Desired size of address window
W.NRID • ID of region to map or zero (0) for task region
( if WS • MAP = l)
W.NOFF • Offset within region to map (if WS.MAP • 1)
w.NLEN • Contains either length to map or zero (0) •
If
zero, W.NLEN defaults to the smaller of the
following: window size or size left in partition
(if WS.MAP = 1)
W.NSTS = Control information
WS.MAP = l if mapping is to occur
WS.WRT • 1 if mapping is to occur with write access
Output

The DRCRW routin·e returns directive status and the
the task.

C • 0 if DRCRW successfully

Also,

completes execution.
DRCRW returns a directive status of +l.

C = 1 if DRCRW does not complete execution.
Directive status returned:
'D.RS16' if the specified access is denied in the mapping
stage of execution.
'D.RS84' if an invalid APR and window size combination or
an invalid region and off set-length combination
was specified in the mapping stage of execution.
'D.RS85' if no window blocks are available for use.
'D.RS86' if an invalid region was specified in the mapping
stage of execution.
Output fields in the window definition block are:
W.NID = Assigned window ID
W.NBAS = Virtual base address of window
W.NLEN = Length actually mapped
W.NSTS = Indication of any changes in mapping status
WS.CRW = 1 if address window is successfully established
WS.ELW = l if any address windows were eliminated
WS.UNM = 1 if any address windows were unmapped
Note

The DPB format is:
WD. 00
DIC(ll7.),DPB size(2.)
WD. 01 -- Address of window definition block

Entry Point $DRELW::
The DRELW routine causes the system to eliminate the
specified address window, unmapping it first if necessary.
Calls

$SRWND, $UNMAP

7-24

MODULE DESCRIPTIONS
Input

R2 • Address of the task status word of the current task
Rj = Address of the window definition block
R4 • ·Address of the header of the current task
RS • Address of the TCB of the current task
Input fields in the window definition block are:
W.NID • ID of address window to eliminate

Output

The DRELW routine returns directive status and the
the task.

C = 0 if DRELW successfully completed execution.
Also,
DRELW returns a directive status of +l to the task.
C = 1 if DRELW is rejected.
Directive status returned:
'D.RS87' if an invalid address window was specified.
Output fields in the window definition block are:
W.NSTS = Indication of any changes in mapping status
WS.ELW = 1 if DRELW successfully eliminated the address
window
WS.UNM = l if DRELW found the address window already
unmapped
Note

The DPB format is:
WD. 00
DIC(ll9.),DPB size(2.)
WD. 01 -- Address of window definition block

Entry Point $DRMAP::
The DRMAP directive processing routine causes the system
to map the specified address window to an offset in the
specified region. DRMAP unmaps the window if necessary.
DRMAP first builds an image of a mapped window block on
the stack.
If DRMAP encounters no errors during this
process, DRMAP unmaps the corresponding
window,
if
necessary, and sets up the new window from the stack
image.
Calls

$SRWND, $SRATT, $UNMAP

Input

R2
Address of the task status word of the current block
R3 = Address of the window definition block
R4 = Address of the header of the current task
RS • Address of the TCB of the current task
Input fields in the window definition block are:
W.NID = ID of window to be mapped
W.NRID = ID of region to which to map. If W.NRID
mapping occurs to the task region.
W.NOFF = Offset within region to which to map
W.NLEN = Length to map. If 0, W.NLEN defaults to
size or the size left in the partition.
W.NSTS = Control information
WS.WRT = 1 if write access is desired

7-25

window

MCIDOLE DESCRIPTIONS

Output

The DRMAP routirte returns directive status and the
the task.

C • 0 if DRMAP s;uccessfully completes execution.
Also,
ORMAP returns a directive status of +l to the task.
C • 1 if ORMAP i.s rejected.
Directive status returned:
'D.RS16' if the desired access to the region is denied.
'D.RS84' if an invalid region and offset size combination
is spec:ified.
'D.RS86' if an invalid region ID is specified.
'D.RS87' if an invalid address window is specified.
Output fields in the window definition block are:
W.NLEN • Length actually mapped
W.NSTS • Indication of any changes in mapping status.
WS.UNM • 1 if the window was unmapped first
Note

The DPB format is:
WO. QO
DIC(l~~l.) ,OPB size(2.)
WO. 01 -- Address of window definition block

Entry Point $DRUNM
The DRUNM routine causes the system to unmap the specified
address window.
Calls

$SRWNO, $UNMAP

Input

R2 = Address of the task status word of the current task
R3 = Address of the window definition block
R4 • Address of the header of the current task
RS • Address of the TCB of the current task
Input fields in the window definition block are:
W.NIO • IO of the window to be unmapped

Output

ORNUM returns directive status and the PS to the task.
C • O if DRUNM successfully completes execution.
Also,
DRUNM returns a directive status of +l to the task.
C = 1 if DRUNM is rejected.
Directive status returned:
'D.RS8' if the specified address window was not mapped.
'D.RS87' if an invalid address window was specified by the
task.
Output fields in the window definition block are:
W.NSTS • Indicator of any changes in mapping status
WS.UNM = 1 if ORUNM successfully unmapped the window

Note

The DPB format is:
WO. 00
OIC(l23.),0PB size(2.)
WO. 01 -- Addres1s of window definition block

7-26

MODULE DESCRIPTIONS
Entry Point $DRSRF::
The DRSRF (Send by Reference) routine causes the system to
create a formatted packet that includes a reference to a
specified region and additional optional information which
is supplied by the issuing task. The sender task must
have the access specified in
the
reference.
The
referenced region is attached to the receiving task.
Calls

$CEFN, $ACHKP, $SRATT,
$DRDSE, $DEPKT

Input

RO • Address of the TCB of the receiver task
Rl • Address of the task status word of the receiver task
R2 = Address of the task status word of the current task
R3 = Address of the EFN number in the OPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

$ALPKT,

$CRATT,

$QINSF,

$DASTT,

Input fields in the window definition block are:
W.NRIO = IO of the region to be sent by reference
W.NOFF = Offset word passed without checking
W.NLEN = Length word passed without checking
W.NSTS = Allowed access (defaults to access of sender
task)
WS.REO = 1 if read access is to be allowed
WS.WRT = 1 if write access is to be allowed
WS.EXT = 1 if extend access is to be allowed
WS.DEL = 1 if delete access is to be allowed
W.NSRB = Optional address of
an
8-word
buffer
of
additional information
Output

The DRSRF routine returns directive status and the
the task.

C = O if DRSRF successfully completes execution.
DRSRF returns a directive status of +l.

Also,

C = 1 if the DRSRF routine did not complete execution.
Directive status returned:
'D.RSl' if DRSRF could not allocate a send packet or
attachment descriptor
'D.RS2' if an attempt is made to send to an ACP task
'D.RS16' if the desired access to the region is denied
'O.RS86' if an invalid region ID was specified
'D.RS97' if an invalid EFN number is specified
'D.RS98' if the address check of the window definition
block or send buffer fails
There are no output fields in the window definition block.
The format of the send by reference packet is:
WO. 00
Receive queue thread
WO. 01
TCB address if EFN was specified. zero if the
EFN was not specified.
WD. 02
EFN mask; first word of sender task name
WD. 03
EFN address: second word of sender task name
WO. 04
Region ID (attachement descriptor address)
WO. 05
Offset in region word
WO. 06
Length of map.word
WO. 07
Status word
WO. 08 through WD. 017 -- Contents of the send buffer

7-27

MODULE DESCRIPTIONS
Note

The DPB format is:
WO. 00
DIC(69.),DPB size(S.)
wo. 01
First half of receiver task name
WO. 02
Second half of receiver task name
WO. 03
Optional event flag to set when receive occurs
WO. 04
Address of the window definition block

Entry Point $DRRRF::
The DRRRF directive processing routine causes the system
to dequeue the next receive by reference packet in the
receive queue. DRRRF exits if there are no packets in the
receive queue and the sending task requested an exit.
Calls

$DRDSE, $SETM, $ACHKP, $QRMVF, $DEPKT, $DRMAP

Input

R2 = Address of the task status word of the current task
R3 = Address of the window definition block
R4 • Address of the header of the current task
RS = Address of the TCB of the current task
Input fields in the window definition block are:
W.NSTS • Control information.
WS.MSP = 1 if received reference is to be mapped
WS.RCX = 1 if task exit desired if DRRRF does not find
packet
W.NSRB = Optional address of 10-word buffer for additional
information

Output

The DRRRF routine returns directive status and the
the task.

C = O if DRRRF successfully completes execution.

c = 1 if DRRRF is rejected.
Directive status returned:
'D.RS8' if receive by reference entry is not in the queue.
'D.RS98' if the address check of the receive buffer fails.
Output fields in the window definition block are:
W.NRID = Assigned region ID of the referenced region
W.NOFF = Offset word specified by sender task
W.NLEN = Length word specified by sender task
W.NSTS = Status word specified by sender task
WS.RED = 1 if attached with read access
WS.WRT = 1 if attached with write access
WS.EXT = 1 if attached with extend access
WS.DEL = 1 if attached with delete access
WS.RRF = 1 if receive was successful
Note

The DPB format is:
WD. 00
DIC(81.),DPB size(2.)
WO. 01 -- Address of 10-word
information

buffer

for

additional

Entry Point $DRGMX::
The DRGMX directive processing routine causes the system
to return the mapping context of the task (to fill in a
given number of window definition blocks).
The total
number of window blocks is in the task header. DRGMX does
not return information on unused window blocks.

7-28

MODULE DESCRIPTIONS
Calls

$ACHKP

Input

R2 = Address of the task status word of the current task
R3 • Address of N window definition blocks
R4 • Address of the header of the current task
RS • Address of the TCB of the current task
There are no input fields in the window definition blocks.

Output

DRGMX returns directiv~/status and the PS to the task.
C • O if DRGMX successfully completes execution.
DRGMX returns a directive status of +l.

Also,

C • 1 if DRGMX is rejected.
Directive status returned:
'D.RS98' if the address check of the
terminator word fails.

window

blocks

plus

Output fields in each window definition block are:
W.NID = Address window ID of next ~stablished address
window.
W.NAPR = Base APR of the window
W.NBAS = Virtual base address of the window
W.NSIZ = Size of the address region
W.NRID = Region ID if mapped or unmodified
W.NOFF = Offset in region if mapped or unmodified
W.NLEN = Length of map if mapped or unmodified
W.NSTS = Necessary bits to restore mapping or O if not
mapped
WS.MAP = 1 if window is mapped
WS.WRT = 1 if window is mapped with write access
Note

7.2.22
DRMKT

The DPB format is:

we. 00
DIC(ll3.),DPB size(2.)
we. 01 -- Address of the N window definition blocks
DRMKT Module
This module processes the MARK TIME and RUN directives.
DRMKT contains
following
directive
processing
the
routines:
$DRMKT
Declare significant event at specified time
interval
$DRRUN
Generate a clock queue entry to request a task
at a specified time

Macro Library Calls CLKDF$
Define clock queue control block offsets

7-29

MC)DULE DESCRIPTIONS

Entry Point $DRMKT::
The directive processing routine, DRMKT, causes the system
to declare a significant event at a specified time
interval from issuing the directive. If an event flag is
specified at the time the MARK TIME directive is issued,
DRMKT clears the event flag immediately and then sets the
event flag at the time of the significant event.
If the issuing task specified an AST entry point, an
asynchronous trap occurs at the time of the significant
event.
The PS, PC, directive status word, and the
specified event flag number are pushed onto the stack when
the specified AST is processed.
Calls

$CVRTM

Input

RO •
Rl •
R2 •
R3 •
R4 •
RS •

Output

DRMKT returns directive status and the PS to the task.

Event flag mask word
Event flag mask address
Address of the task status word of the current task
Address of the third word in the DPB
Address of the header of the current task
Address of the TCB of the current task

C • O if DRMKT successfully completes execution.
DRMKT returns a directive status of +l.

Also,

C • 1 if DRMKT does not complete execution.
Directive status returned:
'D.RSl' if insufficient core is available to allocate
clock queue entry.
Note

the

The DPB format is:
WD.
WD.
WD.
WD.
WD.

00
01

02
03

DIC(23.),DPB size(S.)
Event flag number of event flag to be set
Time interval magnitude
Time interval units
AST entry point address

Entry Point $DRRUN::
The DRRUN directive processing routine causes the system
to generate a clock queue entry to cause a task to be
requested at a specified-delta time from issuance of the
directive
and,
optionally,
to
repeat the request
periodically.
Calls

$UISET, $CVRTM,, $ALCLK, $CLINS

Input

RO •
Rl •
R2 •
R3 •
R4 •
RS •

Address o:E
Address of
Address o:E
Address o:E
Address o:E
Address o:E

the TCB of the task to be run
the task status word of the task to be run
the task status word of the current task
the partition name in the DPB
the header of the current task
the TCB of the current task

7-30

MODULE DESCRIPTIONS
Output

The routine DRRUN returns directive status and the
the task.

C • 0 if DRRUN successfully completes execution.
Also,
DRRUN returns a directive status of +l to the task.
C • 1 if DRRUN does not complete execution.
Directive status returned:
'D.RSl' if insufficient core is available to allocate
clock queue entry.
Note

The DPB format is:
WD.
WD.
WD.
WD.

00
01
02
03

WD. 04
WD. OS
WD. 06
we. 07
WD. 10
WD. 11
WD. 12

7.2.23
DRPUT

the

DIC(l7.),DPB size (11.)
First half of task name
Second half of task name
Partition name {not supported but must
present)
Partition name (not supported but must
present)
Request priority (not supported but must
present)
Request UIC
Delta time magnitude
Delta time units
Reschedule interval magnitude
Reschedule interval units

be
be
be

DRPUT Module
DRPUT contains
the
following
directive
processing
routines:
$DRFEX
Enable or disable floating-point ASTs for task
$DRPUT
Enable or disable power recovery ASTs for task
$DRRRA
Enable or disable receive-by-reference ASTs for
task
$DRRCV
Enable or disable receive ASTs for task

Macro Library Calls HDRDF$
Define task header offsets
TCBDF$
Define task control block offsets
Entry Point $DRFEX::
The directive processing routine, DRFEX, causes the system
to record that floating-point ASTs are either desired or
not desired for the issuing task.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the AST address in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

7-31

lllODOLE DESCRIPTIONS

Output

DRFEX returns directive status and the PS to the task.
C • 0 if DRFEX successfully completed execution.
Also,
DRFEX returns a directive status of +l to the task.

C • 1 if DRFEX does not complete execution.
Directive status returned:
'D.RS8' if ASTs are already not desired
'D.RS80' if an AST routine issued this directive
Note

The DPB format is:
WO. 00 -- DIC(lll.),DPB size(2.)
WO. 01 -- AST entry point address or zero
DRFEX shares common code with DRRCV.

Entry Point $DRPUT::
The directive processing routine, DRPUT, causes the system
to record that power recovery ASTs either are desir.ed or
are not desired for the issuing task.
Input

R2 = Address of the task status word of the current task
R3 = Address of the AST address in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRPUT returns directive status and the PS to the task.
C =· O if DRPU'l~ succesfully completes execution.
Also,
DRPUT returns a directive status of +l to the task.
C = 1 if DRPU'l~ does not complete execution.
Directive status returned:
'D.RS8' if ASTs are already not desired
'D.RS80' if an AST routine issued the DRPUT directive.

Note

The DPB format is:
WO. 00 -- DIC(l09.),DPB size(2.)
WO. 01 -- AST entry point address or zero
DRPUT shares c:::ommon code with DRRCV.

Entry Point $DRRRA::
The directive processing routine, DRRRA, causes the system
to
record that receive-by-reference ASTs either are
desired or are not desired for the issuing task.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 • Address of the AST address in the DPB
R4 • Address of the header of the current task
RS = Address of the TCB of the current task

7-32

MODULE DESCRIPTIONS
Output

DRRRA returns directive status and the PS to the task.
C • O if DRRRA successfully completes execution.
Also,
DRRRA returns a directive status of +1 to the task.
C • 1 if DRRRA does not complete execution.
Directive status returned:
'D.RS8' if ASTs are already not desired.
'D.RS80' if an AST rou~~ne issued the DRRRA directive

Note

The DPB format is:
WO. 00
DIC(21.),DPB size(2.)
wo. 01 -- AST entry point address or zero

Entry Point $DRRCV::
The directive processing routine, DRRCV, causes the system
to record that receive ASTs either are desired or are not
desired for the issuing task.
Calls

$ALCLK, $DECLK

Input

R2 • Address of the task status word of the current task
R3 = Address of the AST address in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRRCV returns directive status and the PS to the task.
C = 0 if DRRCV successfully completed.
Also,
returns a directive status of +l to the task.

DRRCV

C = 1 if DRRCV does not complete execution.
Note

7.2.24
DRQIO

The DPB format is:
WD. 00
DIC(l07.),DPB size(2.)
WD. 01 -- AST entry point address or zero

DROIO Module
DRQIO contains
the
following
directive
processing
routines:
$DRQIO
Place I/O request in a queue of priority ordered
requests
$DRGRG
Place I/O packet in a controller queue

Macro Library Calls FllDF$
Define Files-11 control block offsets
HWDDF$
Define hardware registers
PKTDF$
Define I/O packet offsets
TCBDF$
Define task control block offsets
PCBDF$
Define partition control block offsets
Entry Point $DRQIO::
The direc~ive processing routine, DRQIO, places an I/O
request in a queue of priority ordered requests for a
device or unit specified by a logical unit number. If the
task specifies an event flag with a QIO and WAIT (QIOW)
directive, the task is put into a wait state to wait for
the specified event flag to be set upon the occurrence of
the significant event.

7-33

M;ODULE DESCRIPTIONS
Calls

$MPLUN, $TKWSE, $CEFN, $ACHKW, $ALPKT, $CEFI,
$RELOC, $ACHKB, $MPPHY, $IOKIL, $ACHCK, $MPLND

Input

R2 •
R3 •
R4 •
RS •

Output

DRQIO returns directive status and the PS to the task.

$DRWFS,

Address of the task status word of the current task
Address of: the I/O function code in the DPB
Address of the header of the cu~rent task
Address of the TCB of the current task

c • 0 if DRQIO successfully

completes execution.
Also,
DRQIO returns a directive status of +l to the task.

c • l if DRQIO is rejected.

Directive status returned:
'D.RSS' if the specified LON is not assigned.
Note

The OPB format is:
WD. 00
DIC(l./3.),DPB size(l2.)
WO. 01
I/O :Eunction code
WD. 02
LUN 1:.nd unused byte
WD. 03
Event flag number and priority
igno:ced)
Addr1ess of I/O status block
WD. 04
WD. 05
Addr•ess of AST service routine
WD. 06
Parameter 1
WD. 07
Parameter 2
WO. 10
Parameter 3
WO. 11
Parameter 4
WD. 12
Parameter 5
WO. 13
Parameter 6

(priority

Entry Point $DRQRQ::
The DRQRQ routine is called to insert an I/O packet in a
controller queue and call the driver to start.activity on
the device.
Calls

$QINSP, @D.VINI(RS) call to driver initiator or device
initiator, $DEPKT, $IOFIN, PPRM, $ALOCB, $ACHCK, $RELOM,
RQPRM

Input

Rl • Address of the I/O packet
RS = Address of the unit control block

Output

DRQRQ places the I/O packet in the
starts activity on the device.

Note

This routine destroys the contents of R4.

7.2.25
DRRAS

controller

queue

and

DRRAS Module
DRRAS contains
the
following
directive
processing
routines:
$DRREC
Process RECEIVE DATA and RECEIVE DATA OR EXIT
dirE!Cti ves.
$DRSND
Process SEND DATA directive.

Macro Library Calls HDRDF$
Define task header offsets
TCBDF$
Define task control block offsets

7-34

MODULE DESCRIPTIONS
Entry Point $DRREC::
This routine causes the system to dequeue a data block
from the issuing task's receive queue. If the issued
directive was RECEIVE DATA OR EXIT, the task exits if no
data is queued.
Calls

$ACHKP, $QRMVF, $DEPKT

Input

R2 • Address of the task status word of the current task
R3 = Address of the second word in the DPB
R4 • Address of the header of the current task
RS • Address of the TCB of the current task

Output

The DRREC routine returns directive status and the
the task.

C = O if DRREC successfully completes execution.
Also,
DRREC returns a directive status of +l to the task.
C = 1 if DRREC does not complete execution.
Directive status returned:
'D.RS8' if no data is queued in the task's receive queue.
Note

The DPB format is:
DIC(75. or 77.) ,DPB size(4.)
First half of the task name - Not supported but
must be present
WO. 02
Second half of the task name - Not supported but
must be present
wo. 03
Address of a fifteen word receive buffer

WO. 00
WO. 01

Entry Point $DRSND::
This directive processing routine causes the system to
queue a thirteen word data block in a specified task's
receive queue.
Calls

$ACHKP, $SETF, $ALPKT, $QINSF, $DASTT, $DRDSE

Input

RO = Address of the TCB of the receiver task
Rl = Address of the task status word of the receiver task
R3 = Address of the data block address in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRSND returns directive status and the PS to the task.
C = 0 if DRSND successfully completes execution.
Also,
DRSND returns a directive status of +l to the task.
C = 1 if DRSND does not complete execution.
Directive status returned:
'D.RSl' if insufficient core is available to queue the
data block.
'D.RS2' if the receiver task is an ancillary control
processor.

Note

The DPB format is:
DIC(71.) ,DPB size(5.)
WD. 01
First half of receiver task name
WD. 02
Second half of receiver task name
WD. 03
Address of thirteen word data block
WD. 04
Event flag number (optional)
WO. 00

7-35

MODULE DESCRIPTIONS
7.2.26
DRREG

DRREG Modale
The directive processing
following routines:
$DRCRR::
$DRATR::
$DRDTR::
$DETRG::

module,

Cre·ate a region
Att.ach a region
Detach a region
Det.ach a region
address

DRREG,

contains

attachment

the

descriptor

These directive processing routines receive, as input, a
pointer
to
a
region
definition block that is a
communication area between the issuing task and the
Executive.
The format of the region definition block is:

R.GID

REGION IO

R.GSIZ

SIZE OF REGION (32W BLOCKS)

R.GNAM

NAME OF REGION (RAD50)

R.GPAR

REGION'S MAIN PARTITION NAME (RAD50)

R.GSTS

REGION STATUS WORD

R.GPRO

PROTECTION CODE OF REGION

Macro Library Calls HDRDF$
Define header and window block offsets
PCBDF$
Define PCB and attachment descriptor offsets
RDBDF$
Define region definition block offsets
TCBDF$
Define TCB offsets
Entry Point $DRCRR::
This directive processing routine causes the
create a region and optionally to attach it.
Calls

$SRNAM, ATT, $ALOCB, $FNDSP

7-36

system

MODULE DESCRIPTIONS
Input

R2 •
R3 •
R4 •
RS •

Address of the task status word of the current task
Address of the region definition block
Address of the header of the current task
Address of the TCB of the current task

Input fields in the region definition block are:
R.GSIZ = Size of region to create
R.GNAM = N~me of re.gion to create or O for no name
R.GPAR • Name of system partition in which to allocate
region or z~:to (0) for main system partition of
task
R.GSTS = Control information
RS.NOL = 1 if region should not be deleted on last
detach
RS.ATT = 1 if created region should be attached
RS.RED = 1 if read access is desired on attach
RS.WRT • l if write access is desired on attach
RS.EXT • l if extend access is desired on attach
RS.DEL = 1 if delete access is desired on attach
R.GPRO = Protection code for region (DEWR,DEWR,DEWR,OEWR)
Output

DRCRR returns directive status and the PS to the task.
C = 0 if DRCRR successfully completed execution.
Also,
DRCRR returns a directive status of +l to the task.

c = 1 if DRCRR does not complete execution.
Directive status returned:
'D.RSl' if a PCB or attachement descriptor could not be
allocated
'D.RS16' if the desired access
is
denied
in
the
attachement stage
'D.RS84' if the specified partition in which the region is
to
be allocated does not exist, or if no
partition name has been specified and RS.ATT is
zero.
Output fields in the region definition block are:
R.GIO = Assigned region IO (RS.ATT = 1)
R.GSTS = Directive completion information
RS.CRR = 1 if region was created
Note

The DPB format is:
WO. 00
OIC(SS.) ,DPB size(2.)
WD. 01 -- Address of region definition block

7-37

MtODOLE DESCRIPTIONS

Entry Po.int $DRATR::
The directive processing routine, DRATR, causes the system
to attach the specified region to the current task.
Calls

$SRNAM, $CKACC, $CRATT

Input

R2 •
R3 •
R4 •
RS •

Address of the task status word of the current task
Address of the region definition block
Address of the header of the current task
Address of the TCB of the current task

Input fields in the region definition block are:
R.GNAM • Name of the region to which to attach or zero (0)
for task region
R.GSTS • Desired access to region
RS.RED = 1 if read access is desired
RS.WRT = 1 if write access is desired
RS.EXT = 1 if extend access is desired
RS.DEL = 1 if delete access is desired
Output

DRATR returns directive status and the PS to the task.
C = 0 if DRATR successfully completes execution.
Also,
DRATR returns a directive status of +l to the task.
C = 1 if DRATR does not complete execution.
Directive status returned:
'D.RSl' if an attachment descriptor cannot be allocated.
'D.RS84' if the specified region name does not exist.
Output fields in the region definition block are:
RaGID = Assigned region ID
R.GSIZ = Size of attached region

Note

The DPB format is:
WO. 00
DIC(57.) ,OPB size(2.)
WO. 01 -- Address of region definition block

Entry Point DRDTR::
The directive processing ~outine, DRDTR, causes the system
to detach the specified region, unmapping it if necessary.
Calls

$SRATT, $UNMAP

Input

R2 = Address of the task status word of the current task
R3 = Address of. the region definition block
R4 = Address of the headee of the current task
RS = Address of the TCB of the current task
Input fields in the region definition block are:
R.GID = Region ID of the region to be detached
R.GSTS = Control information
RS.MDL = 1 if region should be marked for delete on
last detach

7-38

the

MODULE DESCRIPTIONS
Output

DRDTR returns directive status and the PS to the task.
C • 0 if DRDTR successfully completes execution.
Also,
DRDTR returns a directive status of +l to the task.
C • 1 if DRDTR does not complete execution.
Directive status returned:
'D.RS16'if .an attempt is made to mark the region for
delete without delete access
'D.RS86' if an invalid region ID is specified or if an
attempt is made to detach region zero ( 0) •
Output fields in the region definition block are:
R.GSTS • Indication of any changes in mapping context
RS.UNM = 1 if any windows were unmapped

Entry Point $DETRG::
The directive processing routine, DETRG, detaches a task
from a region and deallocates the attachment descriptor.
The last time DETRG detaches the region it checks it for
deletion and calls $NXTSK if needed.
Calls

$QRMVT, $RLPR1, $DEACB

Input

RS = Address of attachment descriptor

Output

DETRG modifies RO, Rl, R2, and R3.
All other output is the same as the ORDTR routine.

7.2.27
DRREQ

DRREO Module
The directive processing module, DRREQ, causes the
to request the execution of a specified task.

system

Macro Library Calls TCBDF$
Define task control block offsets
Entry Point $DRREQ::
Request the execution of a specified task.
Calls

$TSKRP, $UISET

Input

RO • Address of the TCB of the task to be requested
Rl = Address of the task status word of the task to be
requested
R2 = Address of the task status word of the current task
R3 = Address of the partition name in the DPB
R4 = Address of the header of the current task
RS = Address of the TCff of the current task

7-39

MtDDULE DESCRIPTIONS

Output

DRREQ returns directive status and the PS to the task.
C • 0 if DRREQ successfully completes execution.
Also,
DRREO returns directive status of +l to the task.
C = 1 if DRREQ does not complete execution.
Directive .status returned:
'D.RSl' if partition control block cannot be allocated
'D.RS7' if specified task is already active

Note

7.2.28
DRRES

The DPB format is:
OIC(ll.),OPB size(7.)
WO. 00
First half of task name
WO. 01
Second half of task name
WO. 02
WO. 03
Partition name (not supported,
present)
WO. 04
Partition name (not supported,
present)
Request priority (not supported,
WO. 05
present}
Request UIC
WD. 06

but

must

but

must

but

must

DRRES Module
The directive processing module, DRRES, contains the
following directive processing routines:
$ORRES
Resume execution of a task that has issued a
suspend directive
$DRSPN
Suspend the execution of the task that issued
this directive
$DRATP
Change the task priority of the specified task

Macro Library Calls HORDF$
Define task header offsets
PKTDF$
Define I/O packet offsets
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $ORRES::
The directive processing routine, DRRES, causes the system
to resume the execution of a task that issued the suspend
directive.
Calls

$SETCR

Input

RO = Address of the TCB of the task to be resumed
Address of the task status word of the task to be
Rl
resumed
R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS == Address of the TCB of the current task

7-40

MODULE DESCRIPTIONS
Output

DRRES returns directive status and the PS to the task.
C • 0 if DRRES successfully completes execution.
Also,
DRRES returns a directive status of +l to the task.
C • 1 if DRRES is rejected.
Directive status returned:
'D.RS7' if .the specified task is not active
'D.RS8' if the specified task is not suspended

Note

Tne DPB format is:
WO. 00
DIC(47.),DPB size(3.)
we. 01
First half of task name
WD. 02 -- Second half of task name

Entry Point $DRSPN::
The directive processing routine, DRSPN, causes the system
to suspend the execution of the issuing task.
Calls

$SETRT

Input

R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRSPN returns directive status and the PS to the task.
C = 0 with a directive status of 'D.RS22'

Note

WO. 00 -- DIC(45.) ,DPB size(l.)

Entry Point $DRATP::
The directive processing routine, DRATP, causes the system
to change the task priority of the specified task.
Calls

$MPLNE, $ACTRM, $ACTTK, $QRMVT,
$0RMVF, $QINSP

Input

RO • Address of the TCB of the task to be altered
Rl = Address of the task status word of the task to be
altered
R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRSPN returns directive status and the PS to the task.

$NXTSK,

$DRDSE,

$QINSF,

C = fr if DRSPN successfully completes execution. Also,
DRSPN returns directive status of +l to the task.
C = 1 if DRSPN does not complete execution.
Directive status returned:
'D.RS7' if the task is not active
'D.RS95' if the new specified priority is invalid
Note

The DPB format is:
WD. 00
DIC(9.),DPB size{4.)
we. 01
First half of task name
WO. 02
Second half of task name
WD. 03
New priority

7-41

MCIDOLE DE.SCRIPTIORS

7.2.29
DRS ED

DRSBD Modale
The directive processing module, ORSEO, contains
following directive processing routines:
$ORCEF
Clear event flag
$CROSE
Declare a significant event
$DRRAF
Read ·all event flags
$DRSEF
Set event flag
$TKWSE
Task wait for significant event
$ORWSE
Wait t:or significant event
$0RWFL
Wait for LOGICAL OR of event flags
$DRWFS
Wait for single event flag

the

Macro Library Calls HORDF$
Define task header offsets
TCBOF$
Define task control block offsets
Entry Point $ORCEF::
The directive processing routine, ORCEF, causes the system
to report the polarity of an event flag and then clear the
event flag.
Calls

None

Input

RO = Event flag mask word
Rl = Event flag mask address
R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRCEF returns directive status and the PS to the task.
C = 0 with a directive status of 'O.RSOO' if the flag
clear or 'D.RS22' if the flag was set.

Note

was

The DPB format is:
WO. 00
DIC(31.),0PB size(2.)
WO. 01 -- Event flag number of flag to be cleared

Entry Point $DRDSE::
The directive processing routine, OROSE, causes the system
to declare a significant event.
This directive is also called as a subroutine.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRDSE returns directive status and the PS to the task.
C • 0 with a directive status of +l

Note

The DPB format is:
WO. 00 -- OIC(3S.) ,OPB size(l.)

7-42

MODULE DESCRIPTIONS
Entry Point $0RRAF::
The directive processing routine, ORRAF, causes the system
to fill a 4-word buffer with the task's local and the
global event flags.
Calls

$ACHKP

Input

R2 •
R3 •
R4 •
RS •

Output

DRRAF returns directive status and the PS to the task.

Address of the task status word of the current task
Addre•s of the buffer address in the OPB
Address of the header of the current task
Address of the TCB of the current task

C = 0 if DRRAF successfully completes execution.
Also,
DRRAF returns a directive status of +l to the task.
C • 1 if DRRAF does not complete execution.
Directive status returned:
'D.RS98' if the buffer is outside of
address space
Note

the

issuing

task's

The DPB format is:
WO. 00
DIC(39.),DPB size(2.)
WO. 01 -- Address of a 4-word buffer

Entry Point $0RSEF::
The directive processing routine, DRSEF, causes the system
to report on the polarity of an event flag and then set
the event flag.
Calls

None

Input

RO • Event flag mask word
Rl • Event flag mask address
R2 = Address of the task status word of the current task
R3 = Address of the last word in the DPB+2
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRSEF returns directive status and the PS to the task.
C = 0 with a directive status of 'D.RSOO' if the flag
clear or 'D.RS22' if the flag was set

Note

was

The DPB format is:
WO. 00
DIC(33.),DPB size(2.)
we. 01 -- Event flag number of flag to be set

Entry Point $TKWSE::
This routine is called from within the Executive to
execute a wait for significant event directive for the
current task. This routine shares code that is common
with the $DRWSE routine.
Calls

None

Input

None

Output

This routine executes the wait for significant
directive and returns to the calling routine.

7-43

event

MODULE DESCRIPTIONS
Entry Point $DRWSE::
The directive processing routine, DRWSE, causes the system
to suspend the execution of the issuing task until the
next significant event occurs.
Calls

$SETRQ

Input

R2 •
R3 •
R4 •
RS •

Output

DRWSE returns directive status and the PS to the task.

Address of the task status word of the current task
Address of the last word in the DPB+2
Address of the header of the current task
Address of the TCB of the current task

C • 0 with a directive status of +l
Note

The DPB format is:
WO. 00 -- DIC(49.),DPB size(l.)

Entry Point $DRWFL::
The directive p:cocessing routine, DRWFL, causes the system
to suspend the execution of the task that issued the
directive until any of the specified event flags become
set.
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the second word in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRWFL returns directive status and the PS to the task.

c = O if DRWFL :;uccessfully completes

execution.
Also,
DRWFL returns a directive status of +l to the task.

C = 1 if DRWFL does not complete execution.
Directive status returned:
'D.RS97' if ~n illegal event flag set or a zero (0)
flag mask is specified by the task.
Note

event

The DPB format :is:
WO. 00
DIC(43.) ,DPB size(3.)
wo. 01
Event flag set indicator
WO. 02 -- Event flag mask word
The event flag sets are:
Set O
Event flags l. - 16.
Set l
Event flags 17. - 32.
Set 2
Event flags 33. - 48.
Set 3
Event flags 49. - 64.

Entry Point $DRWFS::
The directive pirncessing routine, DFWFS, causes the system
to suspend the execution of the issuing task until a
specified event flag is set.
Calls

$SETRT

7-44

MODULE DESCRIPTIONS
Input

RO •
Rl •
R2 •
R3 •
R4 •
RS •

Output

The DRWFS routine returns directive status and the
the task. ·

Event flag mask word
Event flag mask address
Address of the task status word of the current task
Address of the last word in the DPB+2
Address of the header of the current task
Address of the TCB of the current task
PS

C • 0 with a directive status of +l.
Note

7.2.30
DRS ST

The DPB format is:
WD. 00
DIC(41.) ,DPB size(2.)
WD. 01 -- Event flag number of flag to wait for

DRSST Module
The directive pr~cessing module, DRSST, specifies SST
vectors of service routine entry points for use by
intra-task debugging aids or the issuing task.
processing
DRSST contains
the
following
directive
routines:
$DRSDV
Record address and length of a vector of SST
service routine entry points for debugging aid.
Record address and length of a vector of SST
$DRSTV
•ervice routine entry points for issuing task.

Macro Library Calls HDRDF$
Define task header off sets
Entry Point $DRSDV::
The directive processing routine, bRSDV, records the
address and length of a vector of SST service routine
entry points for use by an intra-task debugging aid (ODT) •
Calls

None

Input

R2 = Address of the task status word of the current task
R3 = Address of the second word in the DPB
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

DRSDV returns directive status and the PS to the task.
C = 0 if DRSDV successfully completes execution.
Also,
DRSDV returns a directive status of +l to the task.
C = 1 if DRSDV does not complete execution.
Directive status returned:
'D.RS98' if part of the vector is outside of the issuing
task's address space, a vector address of zero is
specified, or the vector size is greater than 31.·
words.

7-45

MIJDOLE DESCRIPTIONS

Note

The DPB format is:
WO. 00
DIC(l03.),DPB size(3.)
WD. 01 -- Address of the SST vector
WD. 02 -- Number of entries in the SST vector
The SST vector format is:
WD. 00
Traps to 4 (odd address, non-existent memory,
etc.)
WO. 01 -- Segment fault
execution
of
BPT
or
WD. 02 -- Trace trap CT-bit)
instruction
WD. 03 ~-- Execution of an IOT instruction
Execution of an illegal or reserved instruction
WD. 04
Execution of a non-RSX EMT instruction
WO. 05
Execution of a TRAP instruction
WD. 06
PDP 11/40 floating point exception fault
WO. 07

Entry Point $ORSTV::
The directive processing routine, ORSTV, causes the system
to record tha address and length of a vector of SST
service routine entry points for use by the issuing task.
Calls

$ACHKW

Input

R2 = Address of the task status word of the current task
R3 • Address of the second word in the DPB
R4 • Address of the header of the current task
RS • Address of the TCB of the current task

Output

DRSTV returns directive status and the PS to the task.
C • 0 if DRSTV successfully completes execution.
Also,
DRSTV returns a directive status of +l to the task.
C • 1 if DRSTV does not complete execution.

Directive status returned:
'D.RS98' if part of the vector is outside of the issuing
task's address space, a vector address of zero is
specified, or the vector size is greater than 31.
words.
Note

The DPB format is:
WO. 00
DIC(lOS.) ,DPB size(3.)
WO. 01 -- Addcess of the SST vector
WO. 02 -- Number of entries in the SST vector
The SST vector format is:
WO. 00
Traps to 4 (odd address, non-existent memory,
etc.)
WO. 01
SegmE!nt fault
WO. 02
Trace trap (T-bit) or exectution of a BPT
instt·uction
WO. 03
Execution of an IOT instruction
WO. 04
Execution of an illegal or reserved instruction
WO. 05
Execution of a non-RSX EMT instruction
WO. 06
Execi:ttion of a TRAP instruction
WO. 07
PDP 11/40 floating-point exception fault

7-46

MODULE DESCRIPTIONS
7.2.31
ERROR

ERROR Module
This is the error logging module.
the following routines:

This

module

contains

$ALEMB - Allocate an error message block
$ALEB1 - Allocate an error message block (alternate entry)
$BMSET - Set a driver's bit in the I/O active bit map
$DTOER - Device timeouts
$DVCER - Device error bit set
$DVERR - Device error bit set (temporary label)
NSIER: . - Nonsense interrupt error processing
$QEMB - Queue an error message block (EMB)
Macro Library Calls HWDDF$
Define CPU registers
CLKDF$
Define clock offsets and codes
HDRDF$
Define task header offsets
PCBDF$
Define partition offsets
PKTDF$
Define I/O packet offsets
TCBDF$
Define task control block offsets and codes
Entry Point $ALEMB::
Error serv1c1ng routines call this routine. It
$ALEB1::
counts the occurence of the error and tries to allocate a
core block from the pool. If the core block is allocated,
it fills in the error code, the time, and the error
sequence number. Otherwise, it sets the C-bit = l.
Calls

$ALOCB

Input

2(SP) =Error code
O(SP) =Return
Rl = Size of the EMB to allocate

Output

If the C-bit is 0:
(RO) = Address of the first unfilled byte
(Rl) = Address of the EMB
If the C-bit = 1, $ALEMB did not complete execution.

Note

$ALEMB destroys R2 and R3 when it calls $ALOCB.

Entry Point $BMSET::
This co-routine raises the processor priority to seven and
sets the mask in the SCB in $IOABM. It lets the calling
routine start the function, then allows interruptions.
Calls

@(SP)+ -- to call the calling routine

Input

R4 = Address of the SCB

Output

$IOABM is modified and priority 7 established.

7-47

MODULE DESCRIPTIONS
Entry Point $DTOER::
This is the error message block (EMB) formatting routine.
The driver recognizes timeout errors.
On the first
occurrence of an error, $DTOER attempts to log it.
If
errors occur on retries, they are not logged.
$DTOER pushes the error code EC.OTO on the stack, sets the
error in progress bit in the SCB, calculates the length of
the required EMB, and calls $ALEMB. If $ALEMB fails to
allocate a packet for any reason, $DTOER exits and $DVCER
clears the pointer in the SCB to the EMB.
Otherwise, $DVCER copies the saved $IOABM from the SCB to
the EMB and saves a pointer to the EMB in the SCB. $DVCER
puts the error information, including device registers,
into the EMB and executes a RETURN. The contents of the
CSR that is saved is unchanged from the time of timeout.
After the CSR is saved, device interrupts are disabled and
CPU priority is lowered to PRO.
Calls

None

Input

(R2) • Address of the CSR
(R4) • Address of the SCB

Output

C = 0 if the function was not a user-mode diagnostic
function.
The EMB is filled and the SCB contains a
pointer to it. The error in progress flag is set in
the SCB.
C = l if the function was a user-mode diagnostic function.
Only interrupt enable is cleared and the priority is
lowered to O.

Note

If the system supports diagnostics, Rl will be set to the
I/O packet address. If diagnostics are not supported, all
registers are cleared.

Entry Point $DVCER::
This is the EMEi formatting routine and it is used when the
device driver recognizes device error bit errors. On the
first occurencE~ of an error, $DVCER attempts to log it.
If errors occuc on retries, they are not logged.
$DVCER pushes the error code, EC.DVC, on the stack, sets
the error in progress bit in the SCB, calculates the
length of the required EMB, and calls $ALEMB.
If $ALEMB
fails to all<>cate a packet for any reason, $DVCER clears
the pointer in the SCB to the EMB and exits.
Otherwise, $DVCER copies the saved $IOABM from the SCB to
the EMB and sa,1es a pointer to the EMB in the SCB. $DVCER
puts the error
information,
including
the
device
registers, into the EMB and executes a RETURN.
Calls

$ALEMB

7-48

MODULE DESCRIPTIONS
Input

(R4} = Address of the SCB
After $DVCER fills the stack, the stack contains:
O(SP} =Error code
2(SP) = CSR address or O
4(SP} =Saved RO
6(SP) =Saved Rl
lO(SP) =Saved R2
12(SP) =Saved R3
14(SP) = Return

Output

If successful, the EMB is filled and the SCB contains a
pointer to it.
An error in progress bit is set in the
SCB.
Otherwise, the occurrence of the error is counted only.

Entry Point $NSO::through$NS7::
These are the nonsense interrupt identifier routines. One
of a group of 16 unused vectors points to each of these
routines. The vectors are sub-coded in the PS condition
codes.
Each routine consists of a CALL to NSIER: and a
word containing an indentifying number.
Entry Point $QEMB::
This is the common entry point for all EMBs. $QEMB queues
the EMB FIFO in the error queue. $QEMB awakens the ERROR
logger task if there are enough bytes of EMBs in the pool.
If the queue is empty, $QEMB makes a schedule request to
write a queued EMB within a time limit. Otherwise, $QEMB
executes a RETURN.

= Address of the EMB

Input

(Rl)

Output

None

Note

$QEMB destroys registers RO through R3

7.2.32
INITL

INITL Module
The INITL module contains the transfer point of the
resident executive. When the system is initially booted,
control transfers to this routine to initialize and start
up the system.
The INITL module contains the following labels:
Start of the system pool space
$POOL::
The log on message "RSX-llM V3.l BL",
SYSMG:
The system identification (4 bytes)
SYSID:
The
message:
/DEVICE
dduu:
NOT
IN
DEVMG:
CONFIGURATION/
OPMSG:
Subroutine to write a message to the system
console terminal
TRPRT:
Non-existent memory - trap routine
$SYBEG:: Beginning of dynamic storage region
$SYTOP:: Last address in the Executive

7-49

MODULE DESCRIPTIONS
The INITL routine resets the processor and saves
following information about the loading device:
• Unit number
• Logical block number (LBN) of load image
• Device name
• Length of load file

the

The INITL.module sets up the basic ope~ating parameters of
the
system
using conditional assemblies for Memory
Management, 11/70 Extended Memory Support, 11/70 Cache
Parity Support, and Real Time Clock for LSI-11.
Macro Library Calls HWDDF$
Define hardware registers
Entry Point $INITL::
This is the system start up and initialization routine.
Calls

$DIV, $DEACB

Input

None - Processor reset

Output

None - System operating parameters initialized

7.2.33
IO SUB

IOSDB Module
The IOSUB module contains the following routines:
$ACHKP
Address check parameter block
$ACHKW
Address check parameter block; word aligned
$ACHK2
Address check 2-byte directive parameter block
$ACHKB
Address check; byte aligned
$ACHCK
Address check; word aligned
$ASUMR
Assign UNIBUS mapping registers
$CEFN
Convert event flag number for directive
$CEFI
Convert event flag number for I/O
$DEUMR
Deassign UNIBUS mapping registers
$DQUMR
Dequeue from UMR wait
$DVMSG
De~ice message output
$GTPKT
Get I/O packet from request block
$BLKCK
Check logical block
$BLKC1
Check logical block (alternate entry)
$!ODON
I/O done
$IOALT
I/O done (alternate entry)
$IOFIN
I/O finish
$IOKIL
I/O ~:ill
$LCKPR
Lock and unlock processing routine
$MPLNE
Map logical unit number for exit
$MPLUN
Map logical unit number
$MPPHY
Map to physical address
$MPPKT
Map J:/O packet function
$MPUBM
Map UNIBUS to memory
$MPVBN
Map virtual block number
$RELOC
Relocate user virtual address
$RELOM
Relocate and map address
$RLCH
Release channel
$RQCH
Reauest channel
$SCDVT
Scan device tables
$SCDV1
Scan device tables (alternate entry)
$STMAP
Set up UNIBUS mapping address
$ECCOR
Common ECC correction code for RP04/RK06
$RELOP
Relocate UNIBUS phisical address

7-50

MODULE DESCRIPTIONS
$CRPAS
$MUL
$WTUMR
$DIV

Common register pass routine
Integer multiply magnitude numbers
Wait for change in UMR state
Integer divide magnitude numbers

Macro Library Calls FllDFS
Define window and lock block off sets
HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
PCBDF$
Define partition control block offsets
PKTDF$
Define I/O packet offsets
TCBDF$
Define task control block offsets
Entry Points $ACHKP::
Executive code calls these routines to check the address
$ACHKW::
of a task specified parameter block to ensure that the
$ACHK2::
block is within the task's address space and is correctly
aligned. If either check fails, the routines return a
directive status of 'D.RS98'.
Calls

$ACHCK, $RELOC

Input

RO = Starting address of the block to be checked
Rl = Length of the block to be checked in bytes

Output

These routines return a directive status of
the calling routine if either check fails.

Note

Registers RO and R3 are preserved across the call.

'D.RS98'

Entry Points $ACHKB::
Executive code calls these routines to check the address
$ACHCK::
of a block of memory to be sure it lies within the address
space of the current task.
Input

RO = Starting address of the block to be checked
Rl = Length of the block (in bytes) to be checked

Output

C = O if address check succeeded.
C = 1 if address check failed.

Note

Registers RO and R3 are preserved across the call

Entry Point $ASUMR
This routine assigns UNIBUS mapping registers (UMRs).
It
assigns a contiguous set of UMRs. For the sake of speed,
the link word of each mapping assignment block points to
the UMR address (2nd) word of the block, not the first
word.
A linked list of mapping
assignment
blocks
represents the current state of UMR assignment. Each
block contains the address of the first UMR assigned and
the number of UMRs assigned times 4. The blocks are
linked in the order of increasing first UMR address.
Calls

None

Input

RO = Address of a mapping register assignment block
M.UMRN(RO) =Number of UMRs required times 4

7-51

MODULE DESCRIPTIONS
Output

C • 0 if $ASUMR successfully assigned the UMRs.
All
fields of the mapping register assignment block are
initialized and the block is linked into
the
assignment list.
C • 1 if $ASUMR could not assign the UMRs.

Note

All registers are preserved.

Entry Points $CEFN::
Executive code calls these routines to convert an
$CEFI::
event flag number to an event flag mask word and event
flag mask address.
Calls

None

Input

RO = Event flag number to be converted
RS = TCB address of the task to which
applies

Output

the

event

flag

C = O if an event flag number was specified.
RO = Event flag mask word
Rl = Event flag mask address
C = 1 if no event flag number was specified.
RO = zero
Rl = zero
Directive status returned:
'D.RS97' if an incorrect event flag number is specified.

Note

If the $CEFI routine is called,
otherwise, $CEFN adds two to R3.

preserved;

Entry Point $DVMSG::
This routine queues a message to the task termination
notification task.
The messages are related to a device
failure or a checkpoint write failure occurring from the
loader.
Calls

$ALOCB, $EXRGF

Input

RO = Message number
RS = Address of the
applies

UCB

TCB

which

the

message

Output

$DVMSG calls $/~LOCB to allocate a four-word packet and
stores the message number (RO) in the second word and the
UCB or TCB address (RS) in the third word. $DVMSG threads
the packet in the task termination notification task
message queue.

Note

If the task termination notification task (SYSGEN option)
is not installed, or no storage can be obtained, $DVMSG
performs no function and returns to the calling routine.

7-52

MODULE DESCRIPTIONS
Entry Point $GTPKT::
Device drivers call this routine to dequeue the next I/O
request to be processed~
If the device controller is
busy, GTPKT sets the carry bit and returns to the caller.
If the device controller is not busy, GTPKT tries to
dequeue the next request from the controller queue.
If
$GTPKT cannot dequeue a request, it sets the carry bit and
returns to the caller. If the $GTPKT process succeeds,
$GTPKT sets the controller to busy and clears the carry
bit before returning to the caller.
Calls

$IOALT, $MPPKT, $EXRQP

Input

RS • Address of the UCB of the controller for which $GTPKT
will get a packet.

Output

C = 0 if $GTPKT successfully dequeued a packet.
Also,
$GTPKT returns the following contents of Rl through
RS:
Rl = Address of the I/O packet
R2 = Physical unit number
R3 = Controller index
R4 = Address of the status control block
RS = Address of the unit control block
C = 1 if the controller is
dequeued

Note

busy

request

can

The contents of R4 and RS are changed by this routine.

Entry Points $BLKCK::
I/O device drivers call these routines to check the
$BLKC1::
starting and ending logical block numbers of an I/O
transfer to a file structured device. If the range of
blocks is not correct, $BLKCK enters $IODON with a final
status of 'IE.BLK' and then a return to the calling driver
occurs at the driver's initiator entry point. If the
range of blocks is correct, $BLKCK returns to the calling
driver.
Input

Rl = Address of the I/O packet
RS = Address of the unit control block (UCB)

Output

If the check fails, $BLKCK enters $IODON
status of 'IE.BLK' and $IODON returns
driver at the initiator entry point.

with a final
to the calling

If the check succeeds, $BLKCK returns the following
contents of registers RO through R3 to the calling driver:
RO = Low part of logical block number
Rl = Points to I.PRM+l2 (low part of user logical block
number)
R2 = High part of logical block number
R3 = Address of I/O packet
Entry Point
$DEUMR::
This routine deassigns a contiguous block of UMRs. If the
mapping assignment block is not in the list, no action is
taken. For the sake of assignment speed, the link word
points to the UMR address (2nd) word of the assignment
block.
Calls

None

7-53

MtODOLE DESCRIPTIONS

Input

R2 • Pointer to assignment block

Output

None

Note

RO and Rl are preserved.

Entry Point $DQUMR::
Control is transfered here to see if a driver is waiting
for UMR assignemnt. $DQUMR calls the calling driver back
as a co-routine. When the calling driver issues a return
back to this routine, $DQUMR checks to see if any drivers
are waiting for UMRs. If so, $DQUMR restores the waiting
driver's context without actually de-queueing the mapping
assignment block and passes control back to the original
UMR assignment routine.
Input

(SP) = Return address to the driver's caller

Output

None

Entry Points $IODON::
I/O device drivers call this routine at the end of an I/O
$IOALT::
request to do final processing. $IODON sets the unit and
controller to idle and enters $IOFIN to finish processing.
Calls

$QEMB, $DEUMR, $FORKO

Input

RO = First I/O status word
Rl = Second I/O status word. If the entry to this routine
is at $IOALT, $IOALT clears Rl to signify that the
second status word is zero (0).
R2 • Starting and final error retry counts if this process
is the end of I/O on an error logging device
RS = Address of the unit control block of the unit being
completed
(SP) • Address of the driver's caller (for return)

Output

The unit and controller are set idle.
R3 = Address of the current I/O packet

Entry Point $IOFIN::
This routine is called to finish I/O processing in cases
where the unit and controller are not to be declared idle.
Calls

$SETF, $CHKPT, $NXTSK, $QINSF, $DEPKT

Input

RO = First I/O status word
Rl - Second I/O status word
R3 = Address of the I/O request packet

7·-54

MODULE DESCRIPTIONS
Output

$IOFIN:
1. Stores the final I/O status values in the I/O statu_s
block if one was specified
2. Decrements the I/O count and clears TS.RON in case the
task was blocked for I/O rundown.
3. Clears TS.CKR if it is set and initiates checkpointing
of the task.
4. Queues an AST for the task if an AST service routine
was specified. Otherwise, $IOFIN deallocates the I/O
packet.
S. Sets the event flag.

Note

$IOFIN destroys the contents of R4.

Entry Point $IOKIL::
This routine flushes all I/O requests for the current task
from a device queue and cancels the I/O operation in
progress for the current task.
Calls

$IOFIN, @D.VCAN(R2) - where
driver dispatch table

the

Input

RS = Address of the device UCB of the device for which
flush requests

Output

$IOKIL calls the driver at the cancel I/O operation
point with the arguments:
RO = Address of the current I/O packet
Rl = Address of the TCB of the current task
R3 • Controller index
R4 = Address of the status c6ntrol block
RS = Address of the unit control block

Note

$IOKIL destroys the contents of R4.

the

address

entry

Entry Point $LCKPR::
This is the lock/unlock processing routine. This routine
first determines if a file I/O request is to a shared
file. If it is, $LCKPR determines if the request is an
UNLOCK QIO or a virtual block I/O request. It then either
performs the unlock QIO
or
the
lock
processing,
respectively.
Calls

$ALOCB

7-55

MODULE DESCRIPTIONS
Input

The inputs for the main entry point, $LCKPR, are:
Rl • I/O packet. address of the request
Unlock processing: The section of $LCKPR that performs
the unlock ptocessing contains the following relevant
register contents:
RO • Unlock error status
Rl =- I/O packet. address
R2 • Address of the first lock block in the lock list
R3 • Pointer to current window
R4 = Byte count of current unlock request
Lock processi~g: The section of $LCKPR that performs the
lock processing checks for attempted lock overlaps, tries
to set the new lock, and performs the implied unlock.
If
a new lock request for an explicit unlocker is detected
that exactly matches an existing lock for that window in
both starting VBN and size, the lock block is reused. The
relevant registers contents for this part of $LCKPR are:
Rl = I/O packet address
R2 = Address of first lock block in lock list
R3 = Address of file window
R4 = Block count for current request
$LCKPR contains; an internal routine to check for exact VBN
and block count match. The inputs to this routine are:
Rl = I/O packet address
R2 = Lock block address
R4 = Byte count
The outputs of this routine are:
z = 1 if there is an exact match
z = 0 if there is no match
All· registers are preserved.

Output

The outputs of $LCKPR are:
C = O if no lock processing was required
C = 1 if an unlock was performed or an error
occured during the lock processing.
RO =- I/O status

Note

condition

Rl is preserved.

Entry Point $MPLNE::
These routines validate a logical unit number (LON) and
$MPLUN::
map the LUN into a UCB pointer. If the calling routine
specified an incorrect LUN, $MPLNE returns a directive
status of 'D.RS96'. If the LON is correct, $MPLNE maps it
and returns the pointer, which points to the LUN and the
UCB, to the calling routine.
Input

R3 = Address of the LON
R4 = Address of the header of the current task
RS = Address of the TCB of the current task

Output

Rl contains the address of the second LUN word in the task
header.
R3 is advanced by two (2).
C = 0 if a device is assigned to the specified LON.
RO = Address of the UCB of the assigned device
C = 1 if no device is assigned to
contains zero (0).
7-56

specified

LUN.

MODULE DESCRIPTIONS
Entry Point $MPPHY::
This routine maps a relocation bias and displacement
address to an 18-bit physical address. If the indicated
device is not a non~processor request (NPR) device, $MPPHY
returns the relocation bias and displacement address to
the caller. Otherwise, $MPPHY converts the relocation
bias and displacement address to an 18-bit physical
address and returns this address to the calling routine.
Calls

None

Input

Rl • Relocation bias
R2 • Displacement address
RS • Address of the unit control block

Output

If the device is an NPR device:
Rl = High order 2 bits of physical address in bits 4 and 5
R2 • Low order 16 bits of physical address
If the device is an NPR device on an 11/70:
Rl = High order 6 bits of physical address in high byte
R2 = Low order 16 bits of physical address
If the device is not an NPR device:
Rl • Relocation bias
R2 = Displacement address

Note

RO and R3 are preserved across the call.

Entry Point $MPPKT::
This routine maps a read or write virtual function in an
I/O packet to a read or write logical function. If the
current window does not map the virtual function, MPPKT
sets the C-bit and returns the partial mappping results to
the calling routine. If the window completely maps the
virtual function, $MPPKT stores the logical block number
in the I/O packet and converts the read or write virtual
function to its logical counterpart.
Calls

$MPVBN, $MPPHY

Input

Rl = Address of the I/O packet

Output

C = O if mapping was successful.
RO = Zero (0)
I.FCN+l(Rl) = IO.WLB or IO.RLB
I.PRM+lO(Rl) =High part of mapped LBN
I.PRM+l2(Rl) = Low part of mapped LBN
C = 1 if mapping failed.
RO = Number of blocks not mapped
R2 = High part of mapped LBN
R3 = Low part of mapped LBN

Note

Rl is preserved across call

Entry Point $MPUBM::
UNIBUS NPR device drivers call this routine to load the
necessary UNIBUS map registers to enable a transfer to
main memory on an 11/70 processor with extended memory.
Calls

None

7-57

MODULE DESCRIPTIONS
Input

R4 • Address of device SCB
RS • Address of device UCB

Output

$MPUBM loads th•! necessary UNIBUS map registers to
a transfer.

Note

enable

Entry Point $MPVBN::
This routine maps a virtual block number (VBN) to a
logical block number (LBN) by using a window block that
contains a set of mapping pointers.
Calls

None

Input

RO •
Rl •
R2 •
R3 •

Output

C • 0 if $MPVBN successfully maps the
Also:
RO • The number of unmapped blocks
R2 - High part of LBN
R3 • Low part of LBN

The number of consecutive bytes that must be mapped
Address of the window block
High part of VBN
Low part of VBN
VBN

the

c • 1 if $MPVBN could not map the VBN by using the

LBN.

window

block
Entry Point $RELOC::
This routine relocates a user's virtual address.
$RELOC
transforms a 16-bit user virtual address into a relocation
bias and displacement-in-block relative to APR6.
Calls

None

Input

RO • User's virtual address to be relocated

Output

Rl • Relocation bias to be loaded into PAR6
R2 • Displacement-in-block plus 140000 (PAR6 bias)

Note

RO and R3 are preserved across the call.

Entry Point $RELOM::
This routine transforms a 16-bit user virtual address into
a relocation bias and displacement-in-block relative to
APR6 and loads these values for access by the caller.
Calls

$RELOC

Input

RO = User's virtual address to be relocated

Output

RO • Displacement-in-block
$RELOM loads KISAR6 with the relocation bias

Note

R3 is preserved across the call.

7-58

MODULE DESCRIPTIONS
Entry Point $RLCH::
This routine releases a channel.
It sets the channel
status to idle and tries to dequeue the next driver
waiting to use the channel.
If no driver is waiting,
$RLCH returns to the calling routine. Otherwise, $RLCH
dequeues the driver, sets the channel status to busy,
calls the driver, and returns to the calling routine.
Calls

$0RMVF

Input

RS • Address of the unit control block

Output

$RLCH sets the channel status to idle and tries to dequeue
the next driver waiting to use the channel.
RO, Rl, and R2 are preserved across the call.

Note

$RLCH destroys the contents of R4.

Entry Point $ROCH::
This routine requests exclusive use of a channel. If the
channel is busy, $ROCH threads the calling driver into the
channel wait queue and returns to the routine that called
the driver.
If the channel is not busy, $ROCH sets the
channel status to busy and returns to the calling driver.
Calls

$QIN SF

Input

R4 = Address of status control block
RS = Address of unit control block
(SP) • Return address of calling routine
2(SP) =Return address of the routine that
calling routine.

Output

The calling driver
queue.

threaded

into

the

called

the

channel

wait

Entry Point $SCDVT::
This co-routine scans device tables for a calling routine.
$SCDV1::
For each UCB found, this co-routine calls the calling
routine and returns the UCB, DCB, and SCB addresses to it.
Calls

@(SP)+ (the calling routine)

Input

R3 = List pointer (if entry is at $SCDV1)

Output

C = 0 if the next device table entry is being returned
R3 = Address of the device control block (DCB)
R4 = Address of the status control block (SCB)
RS = Address of the unit control block (UCB)
C = 1 if no more entries exist in the device tables

7-59

MODULE DESCRIPTIONS
Entry Point $STMAP::
UNIBUS NPR device drivers call this routine to set up the
UNIBUS mapping address. $STMAP first assigns the UNIBUS
mapping registers (UMRs).
If the
UMRs
cannot
be
allocated, $STMAP places the driver's mapping assignment
block in a wait queue and returns to the driver's caller.
The assignement block will be dequeued eventually when the
UMRs are available and the driver will be remapped and
returned to with Rl through RS preserved and the normal
outputs of this routine.
$STMAP stores the driver's
context in the assignment block and the fork block while
it is blocked and in the wait queue. Once $STMAP places
the driver's mapping assignment block in the UMR wait
queue, it is not removed from the queue until the UMRs are
successfully assigned. This strategy assures that waiting
drivers are serviced FIFO and that drivers with large
requests for UMRs will not wait indefinitely.
Calls

$ASUMR, $WTUMR

Input

R4 = Address of the device SCB
RS = Address of the device UCB
(SP) = Return to driver's caller

Output

$STMAP sets up UNIBUS map addresses in the device UCB
moves the actual physical address to the SCB.

Note

Registers Rl, R2, and R3 are preserved across the call.

and

Entry Point $ECCOR::
This routine contains common error correction code (ECC)
for the RP04 and RK06. $ECCOR applies the ECC correction
algorithm and de~ermines if offset recovery is required
(if supported).
Calls

$RELOP

Input

Rl = Contents of error register
R2 = Control status register (CSR) address
R3 = Address of first ECC register
RS = UCB address

Output

R3 = Controller index
C = 0 if offset recovery is not required
RO = IS.SUC&377
Rl = bytes actually transfered
R2, R4, and RS are unmodified
U.BUF and U.BUF+2 are updated by a call to $RELOP
C = 1 if off set recovery is required
RO
Number of good bytes transfered
Rl - RS are unmodified

7-60

MODULE DESCRIPTIORS
Entry Point $RELOP::
This routine relocates a UNIBUS
KISAR6 bias and displacement.

physical

address

Calls

None

Input

RO • byte offset from address in U.BUF+l and U.BUF+2
RS • UCB address
U.BUF+l(RS) • High order bits of physical address
U.BUF+2(R5) • Low orde~bits of physical address

Output

KISAR6 • Calculated bias (mapped system)
Rl • Real address or displacement

Entry Point $CRPAS::
This is the common register pass routine.
$CRPAS passes
the
contents
of the device registers back to the
diagnostic task. This routine passes all registers in the
order in which they appear on the UNIBUS. $CRPAS uses the
error logging entries, S.ROFF and S.RCNT, in the status
control block. To use this routine, error logging must be
enabled.
Calls

None

Input

Rl = I/O packet address
R2 = Control status register address
R4 = Status control block address

Output

None

Note

RO and R2 are preserved.

Entry Point $MUL:
This is the integer multiply routine.
Calls

None

Input

RO = Multiplier
Rl = Multiplicand

Output

$MUL returns a doubleword result in RO and Rl.
part is in RO and the low part is in Rl.

Note

Registers R2, R3, R4, and
call.

are

~reserved

The

high

across

the

Entry Point $DIV::
This is the integer divide routine.
Calls

None

Input

RO = Dividend
Rl =r Divisor

Output

$DIV returns the quotient in RO and the remainder in Rl.

Note

Registers R2, R3, R4, and
call.

7-61

are

preserved

across

the

M()DULE DESCRIPTIONS
Entry Point $WTUMR::
This routine wa:Lts for a change in the UMR state.
It
stores Rl through R4 and the return PC in the mapping
assignment block and queues the block in the UMR wait
queue for a subsequent recall to the caller when the state
of the UMRs changes.
It is possible for the mapping
assignment block to already be in the wait queue. If it
is~ it can be at the head of the queue only.
Calls

None

Input

RO = Pointer to UMR assignment block

Output

$WTUMR queues the assignment block in the UMR·wait queue.
$WTUMR returns to the caller at system state with Rl
through R4 preserved.

7.2.34
LOA DR

LOADR Module
The LOADR module is a task that loads and checkpoints
nonresident tasks.

all

Macro Library Calls ABODF$
Define task abort codes
HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
PCBDF$
Define partition control block off sets
TCBDF$
Define task control block offsets
Entry Point $LOADR::
This task:
• Reads a nonresident task into memory and initializes it
for execution.
• Reads a previously checkpointed task back into memory
and restarts its execution.
• Writes a checkpoint image of a running task and frees
its partition.
$LOADR gets its input from a loader queue by a call to
$QRMVF. The loader queue contains a priority ordered list
of task TCBs. $LOADR removes the highest priority (the
first)
TCB from the queue and processes it. $LOADR
processes the TCBs in the queue in priority sequence.
Calls

7.2.35
LOWCR

SQRMVF, $STPCT, $DEACB, $QINSP, $RLPAR, $DVMSG, $ALOCB,
$TKWSE, $MAPTK, $CRATT, $SWSTK, $BILDS, $CHKPT, $DASTT,
$ACTTK I $ABTSK

LOWCR Module
The LOWCR module contains low core pointers, trap and
interrupt vectors, and the Executive stack area. This
module contains one executable statement - a JUMP to the
panic dump routine ($PANIC). The other statements define
the addresses of trap processing modules and low core
pointers.

7-62

MODULE DESCRIPTIONS
This file must be the first in the task builder command
file because it occupies locations starting at real
location zero.
The following low core pointers are contained
module:
• Address of directive status
• Directive status word
• FCS impure area pointer
• FORTRAN impure area pointer
• Overlay run time system impure area pointer

The system stack area contains a minimum of 40.

words.

Calls

None

Input

None

Output

None

7.2.36

PARTY Module

PARTY

this

Execution of this module occurs because of a memory parity
error interrupt.
Any error that occurs on the system
stack or in the Executive is a fatal error. A fatal error
halts the system and the message "***EXEC PARITY ERROR***"
is printed. Otherwise, the task occupying the memory in
which the error occurred is aborted and locked into memory
to prevent that portion of memory from being used again.
A message is printed to indicate that the task was
aborted.

Macro Library Calls ABODF$
Define task abort codes
HWDDF$
Define hardware registers
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block off sets
Entry Point PARER:
Memory parity error interrupt processing module
Calls

$ALEMB, $QEMB, $ABTSK

Input

None

Output

None

7-63

MODULE DESCRIPTIONS
Note

7.2.37
PL SUB

The error message block (EMB) format (for error logging)
for cache parity is:
WD. 00 - Link word
WD. 01 - Size= 37.*2
wo. 02 - Processor type/entry code • 002
WD. 03 - Minute/second
WD. 04 - Day /ho·ur
WD. 05 - Year/m·onth
WD. 06 - Error sequence number
WD. 07
Trap PC
we. 08 - Trap PS
WD. 09 - First word of task name
wo. 10 - Second word of task name
we. 11 - First word of partition name
we. 12 - Second word of partition name
WD. 13 - Partition base address
WD. 14 - Partition size
we. 15 to WD. 30 - Memory parity control status registers
(CSRs)
WC. 31 to WD. 36 - Cache parity CSRs

PLSUB Module
The PLSUB module contains the following program
address space subroutines:
$SRNAM
Search for a named partition
$CKACC
Check desired access
$CRATT
Create attachment descriptor
$SRATT
Search for attachment descriptor
$SRWND
Search for· specified address window
$UNMAP
Unmap address window

logical

Macro Library Calls HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $SRNAM: :
This routine searches :for a named par ti ti on and returns a
success or failure indication and a pointer to the PCB if
it finds the partition.
Calls

None

Input

R3 = Pointer to the double-word RADSO name

Output

C = 0 if SRNAM finds the named partition.
R2 = The PCB address
C = l if SRNAM does not find the name

7-64

MODULE DESCRIPTIONS
Entry Point $CKACC::
This routine checks if the desired access of a task to a
region is allowed. The bits in the protection word are
arranged in the following order:
WORLD, GROUP, OWNER ,.SYSTEM
15
0
The bits within each category in the protection
arranged in the follwing order:
DELETE

EXTEND

WRITE

READ

word

are

If a bit is set, the corresponding access is not allowed.
Calls

None

Input

RO • Desired access mask in the low four bits
Rl • Current UIC of the task
R2 • PCB address of the region

Output

CKACC changes the contents of RO and Rl.
CKACC returns a directive status of 'D.RS16' to the
calling routine if access to the region is not possible.

Entry Point $CRATT::
This routine creates an attachment descriptor
inserts it in the necessary queues.

block

Calls

$ALOCB, $QINSF, $QINSP

Input

R2 • PCB address of the region being attached to
R4 • Access code
RS • TCB address of attaching task

Output

C • 0 if CRATT successfully completes execution.
Rl = Address of the attachment descriptor block
CRATT changes the contents of RO

and

C • l if an attachment descriptor could not be allocated.
CRATT modifies RO and Rl.
Entry Point $SRATT::
This routine verifies that a valid region ID was passed in
a PLAS directive by searching for the corresponding
attachment descriptor in the
task
control
block's
attachment queue.
Calls

None

Input

R3 = Address of the region ID to be verified
task region)
RS = TCB address of the current task

Output

RS = Address of the attachment descriptor
SRATT returns a directive status of
attachment descriptor cannot be found.

7-65

(or

D.RS86

for

the

M:ODULB DESCRIPTIONS
Entry Point $SRWND::
This routine VE!rifies that the specified address window ID
corresponds to a valid established address window.
Calls

None

Input

R3 • Address of the address window ID
R4 • Address of the current task header

Output

R4 = Pointer to the specified window block
SRWND chages the contents of RO
SRWND returns a directive status
specified address window is invalid.

Entry Point $UNMAP::
This routine SE~arches for
specified address window.

and

D.RS87

conditionally

Calls

None

Input

R4 • Address of the window to be unmapped

Output

UNMAP modifies RO

the

unmaps

the

C = 1 if UNMAP sucessfully unmapped the address window

7.2.38
PO.WER

POWER Module
This is the powerfail recovery module. If power fails, the
POWER module saves the stack pointer, hardware registers
RO - RS, UNIBUS mapping registers, memory management
registers, floating point status, mode, and registers, and
the program interrupt request.
When power comes back on, POWER restores
all
the
registers, forces a schedule request for the null task,
increments the powerfail indicator, and executes an RTI
instruction.
The dispatcher then calls the
module to restart the system.
The POWER
routines:
PWBTM:
PWSTK:
PWVCT:
PDOWN:

module

contains

the

$POWER

routine

following

this

labels

and

This is the label of register storage area
This is the label of the stack pointer storage
area
Def inei; the powerfail vector
This r<>utine is entered when a power failure
interrupt occurs. This routine saves all volatile
machine registers, switches the power fail vector
to the power up routine (PUP:), and halts the
processor to await the power up interruption.

7-66

MODULE DESCRIPTIONS
PUP:

This routine is entered when a power up interrupt
occurs.
It
restores
all
volatile
machine
registers, forces a schedule request for the NULL
task, increments the powerfail indicator, and
executes an RTI instruction. The dispatcher then
calls the power recovery routine ($POWER::), which
is in
this
module,
to
re-instate
system
processing.
$POWER::Restart system processing

Macro Library Calls EMBDF$
Define error message block offsets
HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $POWER::
The dispatcher calls the POWER routine after the PUP
routine restores the volatile registers. The POWER routine
clears the power failure indicator and
declares
a
significant event. If the KWll-Y is supported, POWER
clears the clock error flags and energizes the output
relay. POWER then enables parity error interrupts, clears
the 11/70 parity control register, clears the memory error
register, declares power failure ASTs for task that are
active and in core, and performs a power failure recovery
for all active devices.
Calls

$CROSE, $ALEMB, $QEMB, $DASTT, @D.VPWF(R2)-where R2 is the
address of the device dispatch table

Input

$POWER calls the driver at the powerfail entry point
the following arguments:
R3 • Controller index
R4 • Address of the status control block
RS • Address of the unit control block

Output

None

7.2.39

QUEUE Module

QUEUE

with

The QUEUE module contains the following queue manipulation
routines:
$CLINS::
Clock queue insertion
$CLRMV::
Clock queue removal
$QINSF::
Queue insertion at end of list
$QINSP::
Queue insertion by priority
Queue MCR command line
$QMCRL::
Queue removal from front of list
$QRMVF::
Queue removal by TCB address
$QRMVT::

Macro Library Calls CLKDF$
Define clock queue control block offsets
TCBDF$
Define task control block offsets

7-67

M!ODOLE

DESCRIPTIONS

Entry Point $CLINS::
This routine makes an entry in the clock queue. The
routine inserts the entry in a way that allows the clock
queue to be ordered in ascending time sequence. Thus, the
entries at the top (or front) of the queue are the most
immminent.
Calls

None

Input

RO •
Rl •
R2 •
R4 •
RS •

Output

The clock queue entry is inserted in the clock
according to the time that it will become due.

Address of the clock queue entry core block
High order half of delta time
Low order half of delta time
Request type
Address 01: requesting TCB or request identifier
queue

Entry Point $CLRMV::
This routine rE~moves all entries for a specified
address and request type from the clock queue.

TCB

Calls

$DECLK

Input

R4 = Request type
RS • Address oJ: requesting TCB or system subroutine

Output

CLRMV removes all entries for the specified TCB address
and request type from the clock queue. If the request type
is not 'C.SYST", CLRMV releases the clock queue entry core
block.

Entry Point $QINSF::
This routine makes an entry in a first-in first-out list.
It links the entry to the end of the list. This routine
shares common c::ode with the $QINSP routine.
Calls

None

Input

RO • Address of the two-word listhead
Rl • Address of the entry to be inserted

Output

The entry is linked to the end of the queue.
RO and Rl are preserved across the call.

Entry Point $QINSP::
This routine inserts an entry in a priority ordered list.
QINSP searches the list until it finds an entry that has a
lower priority or it finds the end of the list. The new
entry is linked into the list at whichever of these two
points is appropriate.
Calls

None

Input

RO = Address of the two-word listhead
Rl = Address of the entry to be inserted

Output

QINSP links the entry into the list in priority order.
RO and Rl are preserved across the call.

7-68

MODULE DESCRIPTIONS
Entry Point $QMCRL::
This routine queues a command line for MCR.
Calls

$EXRQF

Input

Rl • Address of the command line control block

Output

Via the call to EXRQF, the command line is inserted into
the MCR command line list and MCR is requested to run.

Entry Point $QRMVF::
This routine removes the next (front) entry from a list.
The list organization may be either FIFO or by priority.
Calls

None

Input

RO • Address of the two-word listhead

Output

C • 0 if QRMVF removes the next entry from the list
Address of the entry removed
C • 1 if there are no entries in the list RO is
across the call

•

preserved

Entry Point $QRMVT::
This routine removes the next entry from a list that
matches a specified TCB address. The list organization may
be either in FIFO or in priority order.
Calls

None

·Input

RO = Address of the two-word listhead
Rl • Address of the TCB for which QRMVT searches

Output

C = 0 if QRMVT removes a matching entry from the list
Rl = Address of the entry removed
C = 1 if there is no entry in the list
TCB address

that

matches

the

RO is preserved across the call

7.2.40
REQSB

REQSB Module
This module contains the following task control routines:
Abort current task
$ABCTK
Abort task
$ABTSK
$BILDS
Build stack and initialize header
Put task in active task list
$ACTTK
Set conditional schedule request
$SETCR
$SETRQ
Set schedule request
Set schedule request for current task
$SETRT
Set event flag - ·
$SETF
$SETM
Set event flag
$DASTT
Declare AST trap
$DQAC
Dequeue AST block queued by $QASTC (called
from SYSXT only)
$QASTC
Queue AST to task
Queue AST to task
$QASTT
$SRSTD
Search system task dire~tory

7-69

MC>DOLE DESCRIPTIONS
$ACTRM
$STPCT
$STPTK
$RLPAR
$RLPR1
$NXTSK
$FNDSP

Remove task from the active task list
Stop current task
Stop task
Release task partition
Release partition
Assign next task to partition
Find space in partition control block

(PCB)

list:

$TSTCP
$ICHKP
$CHKPT
$LOADT
$EXRQP
$EXRQF
$EXRQN
$TSKRT
$TSKRQ
$TSKRP
$UISET
$MAPTK

Test if checkpoint should be initiated
Initiate checkpoint
Che<:kpoint task
Put task in loader queue
Executive request with
queue
insert
by
pri<>rity
Exe<:utive request with queue insert FIFO
Executive request with no queue insertion
Task execution request (default UCB)
Task execution request (UCB specified)
Task execution request (default UIC specified)
Establish default UIC and current UIC
Map task address window

Macro Library Calls HDRDF$
Define task header offsets
ITBDF$
Define interrupt transfer block offsets
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
Entry Point $ABCTK::
Abort current task
$ABTSK::
Abort task
These routines mark a task to be aborted and they force a
task's exit. They store the abort reason and the current
outstanding I/O count in the first task event flag word.
If the entry occurs at $ABTSK, Rl contains the address of
the TCB of the task to be aborted. If the entry occurs at
$ABCTK, the TCB address of the task to be aborted is moved
into Rl. Otherwise, the remainder of the two routines have
common code.
Calls

$SETCR, $NXTSK

Input

RO = Reason for the abort
Rl = Address of the TCB of the task
entry occurs at $ABTSK only.

aborted

These routines mark the task to
conditional schedule request.

aborted

and

Output

when
set

Entry Point $BILDS::
This routine sets up the task stack and initializes the
header. This routine is called prior to placing a task
into contention for ~he processor. This occurs when an
execution request is made for a task that is fixed in
memory or when a disk resident task has finished loading.
Calls

None

Input

= Address of the TCB of the task to initialize

7-70

MODULE DESCRIPTIONS
Output

$BILDS::
1 - Clears the task local event flags 1. through 32.
2
Sets up the current UIC in the header
3
Sets up task context (PC, PS, stack pointer) to cause
the task to start execution at its entry
4
Conditionally requests redispatching of the processor

Entry Point $ACTTK::
This routine puts an active task in the active task list.
Calls

None

Input

RO • Address of the TCB of the
active task list.

the

Output

ACTTK merges the specified task into the active task
by priority.

list

task

put

R3 is preserved across the call.
Entry Point $SETCR
Set conditional schedule request
$SETRQ
Set schedule request
$SETRT
Set schedule request for current task
These routines force redispatching of the processor from a
specified position in the active task list. If a previous
request was set, redispatching starts at whichever request
has the highest priority.
These routines share common code.
Calls

$DRDSE

Input

If entry occurs at $SETRT:
RS = Address of the TCB of the current task
If entry occurs at $SETRQ or $SETCR:
RO = Address of the TCB at which dispatching is to start

Output

These routines set a
redispatching of the
executed.

schedule request that forces a
processor when a system exit is

R2 and R3 are preserved across the call.
RO is preserved across the call if entry occurs at
or $SETCR.
Entry Point $SETF $SETM These routines set an
rescheduling.

event

the

required

Calls

CEFI, $DRDSE

Input

RO = Event flag number ($SETF) or event flag mask
only)
Rl = Event flag word address ($SETM only) set
RS = TCB address for which flag is being set

($SETM)

Output

RO = TCB address of the task whose flag was set

Note

R3 is preserved

7-71

flag

and

$SETRQ

MODULE DESCRIPTIORS
Entry Point $DASTT::
This routine declares a non-I/O related ast trap. It
examines the header of the specified task to determine if
the specified AST is enabled. If it is enabled, the AST is
declared.
Calls

None

Input

R4 • Offset into the task header to the AST control block
address
RS • Address of the TCB of the task for which the AST is
to be declared

Output

C • O if DASTT succeeded in setting up the
AST and declaring the AST
Rl • Address of the AST control block

task

for

the

C • 1 if the task is not setup for the specified AST

Note

DASTT alters the contents of R4 during execution

Entry Point $DQAC
This routine dequeues an AST
$QASTC

block

that

was

queued

Calls

None

Input

RO = Pointer to AST block

Output

A.CSL is set to one (1) to indicate that the AST block
free (not in AST queue)

Entry Point $QASTC
Queues an AST to a task. This routine is a variant of
$QASTT used by a task ISR which was specified in a CINT$
directive.
Calls

None

Input

RS = Pointer to fork block in ITB

Output

C = 0 if the AST is queued.
C = 1 if the AST address was not specified
call.

the

CINT$

If the AST block is already queued for
takes no action and returns C = O.

task,

$QASTC

Note

the

$QASTC alters RO, Rl, R2, and R3.
Entry Point $QASTT::
This routine queues an AST to a task and ensures that the
task will be scheduled and reconsidered for eligibility in
the partition.
Calls

$QINSF, $SETCR, $NXTSK

Input

RO = TCB address of the task to receive the AST
Rl = Address of the AST control block to be used

7-72

MODULE DESCRIPTIONS
Output

C • 0 if QASTT successfully completed execution
Rl is preserved across the call

Entry Point $SRSTD::
This routine searches the task directory for a task of the
specified name.
Calls

None

Input

R3 • Address of the task name for which to search

Output

c • o if SRSTD finds the task.
RO • Address of the TCB

C • 1 if SRSTD did not find the specified task
Rl, R2, and R3 are preserved across the call
Entry Point $ACTRM::
This routine removes a task (its TCB} from the active task
list.
Calls

None

Input

RO • Address of the TCB to be removed

Output

C • 0 if ACTRM succ.eeds in removing a matching entry
the list

from

C • 1 if there is no entry in the list
TCB address

the

that

matches

RO is preserved across the call
Entry Point $STPCT:: · Stop the current task
$STPTK::
Stop the task
These routines stop a
partition.

task

and

reallocate

the

task's

Calls

$SETCR

Input

RO • The TCB of the task to be stopped (if entry occurs at
$STPTK)

Output

None

Entry Point $RLPAR::
Release task partition
$RLPR1::
Release partition
This routine releases a partition owned by a task and
assigns the partition to the next highest priority task
waiting to occupy the partition.
Calls

None

7-73

MODULE DESCRIPTIORS
Input

RO • Address of the TCB of the owner task (if entry occurs
at $RLPAR)
Rl • Address of subpartition PCB to release (if entry
occurs at $RLPR1)
R3 • Address of main partition PCB (if entry occurs at
$RLPR1)

Output

The partition is released and assigned to the next highest
priority task waiting to occupy the partition.

Entry Point $NXTSK::
This routine assigns a partition to the
task waiting to occupy the partition.

highest

priority

Calls

$QRMVT, $LOADT, $TSTCP, $ICHKP, $FNDSP

Input

RO • Address of the PCB of the partition to be assigned

Output

Five outputs are possible:
1 - The partition is not currently busy and a task is
waiting _to occupy the partition. NXTSK assigns the
partition to the waiting task and places a request in
the loader queue to load the task.
2 - The partition is currently occupied by a task that is
either of higher priority than all waiting tasks or is
not checkpointable. In this case, the partition cannot
be assigned to another task.
3 - The partition is currently occupied by a
lower
priority checkpointable task. NXTSK places a request
in the loader queue to checkpoint the owner task.
4 - The highest priority task waiting to occupy the
partition requires the main partition while the main
partition is occupied by one or more tasks that are
either of higher priority or are not checkpointable.
In this case the partition cannot be assigned.
5 - The highest priority task that is waiting to occupy
the partition requires the main partition. One or more
tasks of lower priority that are
checkpointable
currently occupy the main partition. NXTSK places a
request in the loader queue to checkpoint each task.

Entry Point $FNDSP::
This routine finds space within a dynamically allocated
PCB list. The list represents the allocation state of a
system controlled partition or dynamic checkpoint file.
Calls

None

Input

R4 = Address of the PCB for which to find space
RS • Address of the main PCB in the list where space is to
be found

Output

C • 0 if FNDSP successfully allocated space and linked the
sub-PCB into the allocation list.
C = 1 if FNDSP was unsuccessful

Note

FNDSP changes the contents of RO, Rl, and R2.

7·-74

MODULE DESCRIPTIONS
Entry Point $TSTCP::
This routine checks the priority of the requested task
determine if the owner task should be checkpointed.
Calls

None

Input

Rl • Address of the TCB of the owner task
R4 • Address of the TCB of the requested task

Output

C • 0 if checkpoint should occur

C • l if checkpoint should not occur
Entry Point $ICHKP::
This routine starts the process of checkpointing a
The $CHKPT routine does the actual checkpointing.

task.

Calls

$SETCR

Input

Rl • Address of the TCB of the task to be checkpointed

Output

None

Entry Point $CHKPT::
This

rou~ine

checkpoints a task.

Calls

$ALOCB, $DEACB, $FNDSP

Input

Rl • Address of the TCB of the task to be checkpointed.

Output

$CHKPT:
1 - Sets the checkpoint flag in the task status word
2 - Places the task in the loader queue

3 - Requests the loader to checkpoint the task

Entry Point $LOADT::
This routine puts a task in the loader queue for an
initial load or a checkpoint operation. This routine
contains one instruction only, which moves the address of
the TCB of the loader into RO.
Calls

None

Input

Rl = Address of the task control block

Output

None

Note

This routine shares code
$EXRQN routines.

with

the

$EXRQP,

$EXRQF,

Entry Point $EXRQP::
Executive request with queue insert by priority
$EXRQF::
Executive request with queue insert FIFO
$EXRQN::
Executive request with no queue insertion
The Executive uses these routines when requesting
tasks.
Calls

$SETCR

7-75

and

all

MODULE DESCRIPTIONS
Input

Output

RO • TCB address of the task to be requested
Rl • Address of the packet to be queued to the
entry occurs at $EXRQP or $EXRQF)

task

(if

C • 0 if the request successfully completed execution.
C • 1 if the task was not requested and,
z • 0 if the PCB could not be allocated
z • l if the task is active, being removed, or being
fixed

Entry Point $TSKRT::
Task request (default UCB)
$TSKRQ::
Task request (specify UCB)
$TSKRP::
Task request (specify default UIC)
These routines request the execution of a task.
Calls

$ALOCB, $QINSP, $NXTSK, $BILDS

Input

RO = Address of the TCB of the task to be requested
Rl = Request UIC
R2 • UCB address if entry at $TSKRQ
R3 = Default UIC if entry at $TSKRP

Output

C • O if these routines successfully request the execution
of the task
C • 1 if the task was not requested
z = 1 if the task is active or is being fixed in memory
z • 0 if the PCB could not be allocated

Note

These routines share common code.

Entry Point $UISET::
This routine establishes the default and current
requested tasks in multi-user systems.

UIC

Calls

None

Input

Rl = Request UIC
R2 = Address of second status word of the current task
R4 = Address of the header of the current task

Output

C = 0 if UISET establishes the UIC
Rl = Current UIC
R3 = Default UIC

for

C = 1 if a nonprivileged task is trying to change the UIC
Entry Point $MAPTK::
This routine maps the first window block in a task's
header in a mapped system from the task's TCB and PCB.
Calls

None

Input

Rl = Pointer to the number of window blocks in the task
header
RS
Address of the task control block (TCB) for the task

Output

Rl = Address of the last PDR image in the task header

Note

MAPTK modifies the contents of R2.

7·-76

MODULE DESCRIPTIONS
7.2.41
SSTSR

SSTSR Modale
The SSTSR module contains the following synchronous system
trap service routines:
$EMSST::
Non-RSX EMT/TRAP instruction processing
$FLTRP::
Floating-point exception processing (11/40)
$FLTRP::
Floating-point exception processing (11/45)
$FPINT::
Programmed interrupt request entry point
$ILINS::
Illegal or reserved instruction processing
$IOTRP::
IOT instru~tion processing
$SGFLT::
Segment fault processing
$TRACE::
Trace (T-bit) or break point instruction (BPT)
trap processing
$TRP04::
Trap at 4 (odd address, non-existent memory,
etc.) processing
$SSTXT::
Common SST exit routine
The SSTSR module contains tbe following local data:
l - Floating point exception vector .WORD $FLTRP
.WORD PR7
.WORD $FPINT
.WORD PR7
2 - Floating point status and fork block
FLSTS: .BLKW 2
FLFRK: .BLKW 2
3 - Segment fault vector -

.WORD $SGFLT
.WORD PR7
Macro Library Calls ABODF$
Define task abort codes
HDRDF$
Define task header offsets
HWDDF$
Define harware registers
PKTDF$
Define I/O packet offsets
Entry Point $EMSST::
The directive dispatcher (DRDSP) transfers control to this
routine when the system executes a non-RSX EMT or TRAP
instruction. The machine state was saved before entry into
this routine occurs. EMSST sets up the EMT/TRAP code (low
byte of the instruction) to be passed to the user and
transfers control to the SST exit routine.
Calls

None

Input

RS·= Address of the EMT/TRAP instruction

Output

04(SP) =EMT/TRAP code multiplied by 2
02(SP) = SST code (SCEMT=EMT, SCTRP=TRAP)
OO(SP) =Number of bytes to be transfered
stack (6)

the

user

Entry Point $FLTRP::
The system traps to this routine when an 11/40 floating
point exception occurs. FLTRP saves the current machine
state and transfers control to the SST exit routine.
Calls

None

7-77

MODULE DESCRIPTIONS
Input

None

Output

02(SP) • SST code (SCFLT)
OO(SP) •number of bytes to be transfered

user

stack

(4)

Entry Points $FLTRP::
The system tra.ps to this entry point when an 11/45
floating point. exception occurs. FLTRP saves the floating
point exception and address registers and
posts
a
programmed inte!rrupt r1equest at priority level 1.
$FPINT::
Control returns to this entry point when the programmed
interrupt request, which was issued by FLTRP, is processed
by the system.
Calls

$INTSV, $FORKO, $DASTT

Input

The floating point exception register contains the reason
for the fault and the floating point address register
contains the address of the instruction that caused the
fault.

Output

The outputs are the saved floating point exception and
address registers and the posted programmed interrupt
request.

Entry Point $ILINS::
A trap occurs to this routine when the system tries to
execute an illegal or reserved instruction. This routine
saves the current machine state and transfers control to
the SST exit routine.
Calls

None

Input

None

Output

02{SP) • SST code {SCILI)
OO(SP) • number of bytes to be
stack (4)

Note

transferred

the

user

This routine shares common code with the $TRP04 routine.

Entry Point $IOTRP::
The system traps to this routine when it executes an IOT
instruction. If the stack depth is not +l, this routine
crashes the syE;tem via a jump to $CRASH. If the stack
depth is +l, this routine saves the current machine state
and transfers control to the SST exit routine.
Calls

None

Input

None

Output

The following arguments are set up on the current stack:
02{SP) • SST code {SCIOT)
00 {SP) • Numbe1:- of bytes to be transfered to the user
stack (4)

Note

This routine shares common code with the $TRP04 routine.

7-78

MODULE DESCRIPTIONS
Entry Point $SGFLT::
The system traps to this routine when a segment fault
occurs. SGFLT saves the current machine state, sets up SRO
through SR2 to be passed to the user, and transfers
control to the SST exit routine.
Calls

None

Input

None

Output

lO(SP)
06(SP)
04(SP)
02(SP)
OO(SP)

= Contents of SRO
= Contents of SR2

=Contents of SRl
= SST code (SCSGF)

=Number of bytes to
stack (10)

transfered

the

user

Entry Point $TRACE::
The system traps to this routine when a trace trap bit
(T-bit) occurs or when the system executes a breakpoint
trap instruction. This routine saves the current machine
state and transfers control to the SST exit routine.
Cal l's

None

Input

None

Output

02(SP) = SST code (SCBPT)
OO(SP) =Number of bytes to
stack (4)

Note

transfered

the

user

This routine shares common code with the $TRP04 routine.

Entry Point $TRP04::
The system traps to this routine when a trap at 4 occurs.
If a stack violation occurred (stack pointer=<400), this
routine crashes the system. Otherwise, this routine saves
the current system state and transfers control to the sst
exit routine (SSTXT).
Calls

None

Input

None

Output

02.(SP) = SST code (SCOAD)
OO(SP) =Number of bytes to be
stack (4)

Note

This routine shares common
(SSTXT) •

code

transferred
with

the

to
exit

the

user

routine

Entry Point $SSTXT::
This routine gets control to affect a synchronous system
trap (SST). If the current system stack depth is not zero,
this routine crashes the system. If the stack depth is
zero, the routine tries to execute an SST for the current
task. If the task does not have the appropriate SST vector
entry or this routine cannot push the SST parameters onto
the stack, this routine aborts the task. Otherwise, this
routine sets up the SST and executes a directive exit.
Calls

$ACHCK, $RELOM, $ABCTK

7-79

MODULE DESCRIPTIONS
Input

For a mapped system:
24(SP) =PS word saved by SST trap
22(SP) =PC word saved by SST trap
20(SP) •Saved RS
16(SP) =Saved R4
14(SP) =Saved R3
12(SP) =Saved R2
lO(SP) • Saved Rl
06(SP) = Saved RO
04 (SP) = SST pa:rameter (zero or more parameters may be
specified)
02(SP) = SST code
OO(SP) =Number of bytes to be transferred to the the user
stack
For a real memory system:
14(SP) =Saved R3
12(SP) = Saved R2
lO(SP) = Saved Rl
06(SP) •Saved RO
04(SP) = SST parameter (zero or
spec Hied)
02(SP) =SST code
OO(SP) =Number of bytes to be
stack

Output

7.2.42
SYSCM

parameters

transfered

The routine executes the specified
task.

SST

for

to
the

may
the

be
user

current

SYSCM Module
The SYSCM module defines common data areas that are used
by the system for storage of system data and pointers. The
module does not contain executable code~ it only defines
system data areas. The global areas defined in this module
are shown below. The null task control block areas in
SYSCM are unique for this TCB. Remaining areas, as noted,
are in the true! system common area
For the null task control block: (This TCB terminates the
system and active task lists. It must have a priority of
zero and always be blocked.)
SHEADR::
$CURPR::
$COMEF::
$SYSID::
$TKNPT::
$SHFPT::
$CKCNT::
$CKCSR::
SCKLDC::
$SYUIC: :
$EXSIZ::
$PWRFL::
$SIGFL::
$LOGHD::
$MCRCB::
$LSTLK::
$CRAVL::

T .I,NK - Pointer to current task header
T.IOC - Current task priority
T.'l~CB, T.NAM - Common event flags
T.NAM+2, T.RCVL - System identification
T.RCVL+2 - Pointer to TKTN TCB
T.ASTL - Pointer to shuffler TCB
T.ASTL+2 - Address of clock count register
T.EFLG - Address of clock control status
register
T.EFLG+2 - Clock load count
T.UCB - System UIC (54,l for mapped system,
50,l for unmapped system)
T.STAT - Address of last byte in Executive
T.ST2 - Powerfail recovery request flag
T.ST3 - Task waiting for significant event
T.NRPC - Logical device assignment list
T.LBN+l - MCR command block address
T.LDV - Lock word (TCB address of owner)
T.MXSZ - Active task list listhead

7-80

MODULE DESCRIPTIONS

(The labels that follow are in the system common area.)
Pointers:
$ACTHD::
$ABTIM::
$TKTCB::
$ROSCH::
$STKPD::
$DEVHD::
$MCRPT::
$ERRPT::
$CFLPT::
$INTCT::
$FRKHD::
$FMASK::
$PARPT::
$CLKHD::
$COPT::
$PARHD::
$LDRPT::
$TSKHD::

Active task list listhead
Absolute time counter
Current task TCB
Schedule re,quest TCB address
Stack depth indicator
First device control block
MCR TCB
Error logger TCB
First checkpoint file PCB
Clock interrupt ticks count
Fork queue listhead
System feature mask
Parity address vector table
Clock queue
Command output UCB
Partition list
Loader TCB
System task directory

Idle pattern:
$IDLCT::
$IDLFL::
$IDLPT::

Idle pattern count byte
Idle pattern flag byte
Idle pattern word

Days per month table:
$DYPMN::

February •••• January

Bit mask table:
$BTMSK::

Bit mask table

Online error logging data base:
$ERRHD::
$ERRLM::
$ERRSQ::
$ERRSV::
$ERRSZ::
$IOABM::

Error logging message queue listhead
Limit on resident error logging data
Universal error sequence number
Pointer to error file indentif ication
Resident bytes of error logging data
Devive I/O active bitmap

System bootstrap and save configuration vector:
$SYSIZ::

Size of memory in 32W blocks

Time Limit Parameters:
$TKPS::

Ticks per second

Current time vector:
$TTNS::

Tick of second

LIFO send and
parameters:
$PKAVL::
$PKNUM::

I/O

preallocation

list

pointer

Pointer to first packet in list
Number of packets currently in list

7-81

and

MODULE DESCRIPTIONS
$PKMAX::

Maximum number allowed in list

Global task size limit for extend task directive:
$MXEXT::

Initialize to no limit (or reference label)

UMR allocation listhead and wait queue listhead:
$UMRHD::

Mapping assignment block listhead

$UMRWT::

UMR wait queue listhead

Macro Library Calls HDRDF$
HWDDF$
TCBDF$

Define task header offsets
Define hardware registers
Define task control block offsets

Entry Point - None
Input - None

7.2.43
SYSDF

SYSDF Module
The SYSDF module globally defines the following:
V$$CTR, defining the highest vector address
S$$YDF, causing offset definitions from prefix files to be
listed
ITBDF$, defining ITB offsets and length
PCBDF$, defining PCB offsets and length
SCBDF$, defining SCB offsets
TCBDF$, defining TCB length
The following directive status codes:
D.RSl==-1. Insufficient dynamic core available to satisfy
request
D.RS2==-2. Specified task not installed in the system
D.RSS==-5. Unassigned LUN
D.RS6==-6. Driver not loaded
D.RS7==-7. Task not active
D.RS8==-8. Task not suspended, no data queued,
task
checkpointing already enabled or disabled, AST
recognition already enabled or disabled, AST
entry already unspecified
D.RSl0==-10. Issuing task not checkpointable
D.RS16==-16. Privilege violation
D.RS17==-17. Vector already in use (CINTS)
D.RS19==-19. Illegal vector (CINTS)
D.RS80==-80. Directive issued from AST routine, directive
not issued from AST routine
D.RS81==-Bl. Cannot map ISR or disable-interrupt routine
(CINTS)
D.RS84==-84. Alignment error
D.RSBS==-85. Address window overflow
D.RS86==-86. Invalid region ID
D.RS87==-87. Invalid window ID
D.RS90==-90. Specified LUN is locked in use
D.RS92==-92. Invalid device or unit specified
D.RS93==-93. Invalid time parameter
D.RS94==-94. Partition or region not in system
D.RS95==-95. Invalid priority
D.RS96==-96. Invalid LUN

7-82

MODULE DESCRIPTIONS
D.RS97••-97. Invalid EFN or required EFN not specified
D.RS98••-98. Part of DPB is outside of issuing task's
address space
D.RS99•=-99. Invalid DIC or DPB size
D.RS22=•2. EFN was set
D.RSOO••O. EFN was clear
Global conditional assembly definitions:
D$$YNM••O Globally define D$$YNM
if
dynamic
memory
allocation is present
M$$EXT••O Globally define M$$EXT if 11/70 extended memory
is present
M$$MGE•=O Globally define M$$MGE if memory management is
present
Macro Library Calls ITBDF$
Define ITB offsets and length
PCBDF$
Define partition control block offsets and length
SCBDF$
Define status control block offsets
TCBDF$
Define task control block offsets
Entry Point - None
Calls

None

Input

None

Output

None

7.2.44

SYSTB Module

SYSTB

This module defines the system tables.

Macro Library Calls HWDDF$
Define hardware registers
SCBDF$
Define SCB offsets
UCBDF$
Define UCB offsets
Entry Point $DEVTB::
This is the main entry point for the SYSTB
indicates the start of the device tables.
Calls

None

Input

None

Output

None

Note

SYSTB is generated by SYSGEN

7.2.45
SYSXT

module.

SYSXT Module
SYSXT performs system entrance, exit
and
processor
dispatching. SYSXT contains the following routines:
$DIRSV::
Directive save routine
$FORK::
Fork and create system process
$FORK1::
Fork and create system process
$FORK0::
Fork and create system process

7-83

l!IODOLE D:ESCRIPTIONS

$FORK2::
$INTXT::
$INTSC::
$INTSE::
$INTSV::
$INTXT::
$DIRXT::
$NSO:: -

$NONSI::

Fork routine to use with the CINT$ directive
Interrupt exit processing
Interrupt save (interrupt connected to via a
CINIT$ directive)
Interrupt save (error logging devices)
Interrupt save
Interrupt exit
DiI·ective exit
$NS7::Nonsense interrupt entry (if error logging
of undefined interrupts is not supported, all
unused vectors point to the nonsense interrupt
address).
Nonsense interrupt exit

Fork routines are entered via a CALL with the arguments:
R3 • Address of the beginning of the fork block+2
R4 = Restored from fork block
RS • Restored from fork block
Execute fork

routine:
(20$:) Removes entry form fork
queue, resets fork queue listhead, and allows
interrupts, restores registers R4 and RS,
calls the fork routine, and branches to $DIRXT
to try to exit again.

Rescheduling

or
powerfail
routine:
(40$:)
Allows
interrupts, tests for power failure. If power
failure, executes a CALL to $POWER for power
recovery and then branches to $DIRXT to try to
exit again. If not power failure, goes to
rescheduling routine.

RESCH:
$FINBF::
$SAVNR::
$SWSTK::

Rescheduling routine
Finish terminal input buffered I/O
Save non~volatile registers
Switch stacks

Macro Library Calls ABODF$
Define task abort codes
HDRDF$
Define task header offsets
HWDDF$
Define hardware regist:ers
PCBDF$
Define partition control block offsets
TCBDF$
Define task control block offsets
ITBDF$
Define interrupt transfer block offsets
Entry Point $DIRSV::
Directive level trap service routines call $DIRSV. The
stack depth is +l, thus a switch to the system stack is
always necessary. At the end of trap processing, a RETURN
is executed to exit from system code.
Calls

(RS) to call synchronous trap routine

Input

4(SP) =PS word pushed by trap
2(SP) =PC word pushed by trap
O(SP) =Saved RS pushed by "JSR R5,$DIRSV"

Output

$DIRSV pushes R4 onto the current stack and executes a
switch to the system stack. $DIRSV pushes R3 through RO on
the system stack, sets the new processor priority and
calls the calling routine.

7-84

MODULE DESCRIPTIORS
Entry Point $FORK::
An I/O driver calls this routine to create a system
process that returns to the driver at stack depth zero (0)
to finish processing. $FORK saves R4 in the controller
fork block. It points to the controller block, disables
timeout, and points to the end of the fork block.
Calls

None

Input

RS • Address of the fl,CB for the unit being processed

Output

None

Entry Point $FORK1::
This routine is an alternate entry to $FORK to create a
system process and save RS. This routirie consists of one
instruction "MOV RS,-(R4)" that follows in line with the
$FORK routine code.
Calls

None

Input

R4 • Address of the last word of a 3-word fork block

plus

RS • Data to be saved in the fork block
Output

None

Entry Point $FORKO::
The $FORKO entry point is a continuation of $FORK1 code.
$FORKO sets the fork PC, saves current processor priority,
locks out interrupts, and links the system process to the
fork queue. $FORKO then restores processor priority and
executes a RETURN if C$$INT is defined. If C$$INT is not
defined, the return is not executed and the code falls
into the $FORK2 routine.
Input

R4 = Address of the last word of a 2-word fork block

plus

Output

None

Entry Point $~0RK2::
$FORK2 is the fork routine for use with the CINT$
directive. $FORK2 tests to see if the fork block is
already in use (fork PC non-zero). If it is, $FORK2 clears
the stack and falls through to $INTXT, which executes a
return. Otherwise, $FORK2 saves R4 in the fork block,
points to the location just after the three word fork
block and branches to $FORK1. The combination of $FORK!,
$FORKO, and $FORK2 create a system process, link the new
fork entry in the fork queue, restore processor priority,
and end up at $INTXT for the RETURN.
Calls

None

Input

RS = Address of fork block in ITB

Output

If the fork block is not in use, $FORK2 saves R4 in the
fork block, puts a pointer in R4 to point just after the
3-word fork block, and clears the stack.

7-85

MC>DOLE DESCRIPTIONS

Entry Point $INTXT::
This is the interrupt exit routine. It contains only a
RETURN instruc•tion. A JUMP to this entry point causes an
exit from an interrupt.
Calls

None

Input

O(SP) • Interrupt save return address

Output

None

Entry Point $INTSC::
Interrupt save routine (for
interrupt
from
vector
connected to via a CINT$ directive). $INTSC saves R4 on
the stack and checks for $STKDP•O. If $STKDP•O, $INTSC
loads ISR priority, calls ISR, and branches to $INTX1 to
exit from interrupt. If $STKDP not = O, $INTSC saves stack
pointer in header, loads the system stack pointer, loads
ISR priority, calls ISR, and branches to $INTX1 for
interrupt exit.
Calls

@(RS}+ to call ISR

Input

None

Output

None

Entry Point $INTSE::
This is the interrupt save routine for error logging
devices. An interrupt service routine calls $INTSE when an
interrupt is not to be immediately serviced. $INTSE saves
R4 and thens loads R4 with the address of the SCB of the
controller that caused the interrupt. $INTSE then checks
if an error is already in progress. If not, $INTSE saves
the current I/O active bitmap and loads R4 with the
controller index. $INTSE code finishes in the $INTSV code
to execute an interrupt save.
Calls

None

Input

4(SP)
2(SP)
O(SP)
RS
2(R5}

Output

R4 = Controller index
The bit is cleared in the bitmap.

• PS word pushed by interrupt
= PC word pushed by interrupt
= Saved RS pushed by "JSR RS,$INTSE"
= Address of the SCB of interrupting controller
= New processor priority

Entry Point $INTSV::
This is the interrupt save routine. An interrupt service
routine calls this routine when an interrupt is not to be
immediately dismissed. $INTSV switches to the system stack
if the current stack depth is +l. When the interrupt
service routine is finished processing, it forks, jumps to
$INTXT, or executes a return.
Calls

2(R5) to call the caller back
(RS) to call the caller back if L$$SI1 is not defined

Input

4(SP) =PS word pushed by interrupt
2(SP) =PC word pushed by interrupt

7-86

MODULE DBSCRIPTIORS
O(SP) • Saved RS pushed by "JSR R5,$INTSV"
RS • New processor priority
Output

Switch to system stack if stack depth is +l
New processor priority is loaded

Entry Point
$INTX1::·
This is the interrupt exit routine. This routine is
entered from a return to exit from an interrupt. $INTX1
locks out interrupts and if the stack depth is not • O,
$INTX1 branches to $DIRXT to increment the stack depth and
restore registers R4 and RS; then, $DIRXT executes an RTI
instruction. If the stack depth is zero, $INTX1 checks for
entries in the fork queue. If the fork queue is empty,
$INTX1 branches to $DIRXT to increment the stack depth,
restore registers R4 and RS, and
execute
an
RTI
instruction. If the fork queue is not empty, $INTX1 allows
interrupts, saves registers RO-R3 on the current stack,
and proceeds to $DIRXT directive exit code.
Calls

None

Input

06(SP)
04(sp)
02(SP)
OO(SP)

Output

None

•PS word pushed by interrupt
=pc word pushed by interrupt
• Saved RS
• Saved R4

Entry Point $DIRXT::
This is the directive exit processing routine. A directive
processing routine or a trap service routine use a JUMP to
enter this routine for exit. If there are any entries in
the fork queue, $DIRXT removes the first entry and
executes the fork routine. If there are no entries in the
fork queue, $DIRXT checks to see if redispatching of the
processor is necessary. If not, $DIRXT restores RO-RS and
executes an RTI instrution. If processor redispatching is
necessary, the processor is redispatched and
$DIRXT
executes the exit sequence again.
Calls

@-(R3) to call fork routine
$POWER to call power recovery routine
$ABCTK to abort current task
$QRMVF to remove ast entry from queue
$ACHCK to address check stack space
$RELOM to relocate and map stack address
@(RO)+ or @-2(R0) to call dequeue subroutine
$DEACB to deallocate control block
$DREXT to force task exit

Input

Inputs for mapped system:
16(SP) =PS word pushed by interrupt or trap
14(SP) =PC word pushed by interrupt or trap
12(SP) = Saved RS
lO(SP) =Saved R4
06(SP) =Saved R3
04(SP) =Saved R2
02(SP) = Saved Rl
OO(SP) =Saved RO

7-87

MtODOLE DESCRIPTIONS

Inputs for unmapped system:
06(SP) •Saved R3
04(SP) • Saved R2
02(SP) • Saved Rl
OO(SP) •Saved RO
Output

For outputs of the $DIRXT routine, consult
processin~ logic diagrams in this manual.

the

interrupt

Entry Point $FINBF::
This routine finishes terminal input buffered I/O. It is
called to finish a buffered terminal input request that
has been placed in the AST queue.
Calls

$RELOC to relocate I/O status block
$IOFIN to finish I/O operation
$DEACB to deallocate input buffer

Input

RO = Address of I/O packet

Output

$FINBF transfers the buffered I/O to the
calls $IOFIN to finish the I/O request.

user

task

and

Entry Point $SAVNR::
This is a co-routine that saves registers R4 and RS.
Calls

@(SP)+ to call the caller

Input

R4 and RS, which are the registers to be saved.

Output

$SAVNR saves R4 and RS on the stack.

Entry Point $SWSTK::
A task calls this routine to switch to the system stack,
thus inhibiting task switching. The calling task must be
privileged if running in a mapped system and mapped to the
exec. Control is passed here from $DRDSP after the trap
has occured and $DIRSV has been called.
The calling sequence is:
EMT
376
Trap to $EMSST in DRDSP
.WORD
ADDR
Address for return to user state
Calls

@(SP)+ to call the calling routine

Input

R3 = Address of PC word of trap on stack +2
Inputs for a mapped system:
22(SP) = PS pushed by trap
20(SP) = PC pushed by trap
16(SP) = Saved RS
14(SP) = Saved R4
12(SP) = Saved R3
lO(SP) = Saved R2
06(SP) = Saved Rl
04(SP) = Saved RO
02(SP) = Return address for system exit
OO(SP) = 104376
Inputs for an unmapped system:
lO(SP) =Saved R3
06(SP) =Saved R2
O~(SP) =Saved Rl

7-88

MODULE DESCRIPTIONS
02(SP) • Saved RO
OO(SP) •Return address for system exit
Output

7.2.46
TOSCH

$SWSTK calls the·user back on the system stack with all
registers preserved. To return to task level the user
executes a return.

TDSCB Module
This module processes time dependent scheduling and device
time-outs.

Macro Library Calls CLKDF$
Define clock queue control block offsets
HDRDF$
Define task header offsets
HWDDF$
Define hardware registers
TCBDF$
Define task contiol block offsets
PCBDF$
Define partition control block offsets
Entry Point $CKINT::
A clock interrupt causes the system to enter this routine.
$CKINT calls $INTSV to save R4 and RS and increments the
interrupt count. If the result is non-zero,
$CKINT
executes a JUMP to $INTXT •. If the count is zero, $CKINT
calls $FORKO to execute fork and process clock interrupts.
Calls

$INTSV to save registers and set priority
$FORK0 to execute fork and process clock interrupts
UPTIM: - Update absolute and real time of day and date:
None
TDS: - Time dependent scheduling:
$EXRQN to clear stop bit and reallocate partition
Single-shot internal system subroutine (type 6 or 8):
@C.SUB{R4) to call system subroutine
Mark time request:
$SETM to set event flag
$QASTT to queue AST to task
Schedule request:
$TSKRT to request task execution
$DECLK to deallocate control block
$CLINS to reinsert entry in clock queue
@(SP)+ to get next UCB address
@D.VOUT(Rl): - Call driver at timeout entry point with the
arguments:
RO • Device timeout status "IE.DNR"
R2 = Address of device CSR
R3 • Controller index
R4 = Address of the status control block
RS • Address of the unit control block
ROBIN: - Executive level round robin scheduling
$DRDSE cause a redispatch of processor
SWAP: - Disk swapping algorithm: reduce
of resident tasks

7-89

sapping

priority

Mt)D1JLB DESCRIPTIONS

$NXTSK Reallocate partition

Input

TIMXT: - Exit time dependent scheduling if no
clock ticks remain
None

Output

none

7-90

unprocessed

CHAPTER 8

DATA AREAS AND CONTROL BLOCKS

8.1

INTRODUCTION

This chapter describes the system control block linkages and data
structures. The control blocks were taken from system code. However,
while transposing the system code into this manual, editorial changes
were made for the sake of appearance and clarity. The beginning of
the chapter describes system pointers and typical system linkages
followed by a discussion of I/O linkages as related to I/O drivers.
The remainder of the chapter contains the system control block offset
descriptions and describes the system control blocks and data areas in
alphabetical order.

8.2

SYSTEM POINTERS AND LINKAGES

Figure 8-1, Linked Lists on RSX-llM, describes the typical way that
control block lists are linked in RSX-llM. Figure 8-2, Overview of
RSX-llM System Control Blocks, contains an overview of the way that
RSX-llM system control blocks are linked together. This figure shows
the major system lists, list pointers, and linkages only.
More
detailed linkages and control block configurations are shown in
Figures 8-3 through 8-24.

8-1

DATA AllBAS ARD CONTROL BLOCKS

LISTS HEADED BY POINTER

[ POINTER 1J

-..

POINTER

-...

POINTER

• For an Empty List the Initial Pointer is 0. In any Case, the Last Pointer Is 0

LISTS HEADED BY LISTHEAOS

LISTHEAO

-..

WOROO
WORD 1

POINTER

t--

• For an Empty List the First Word of the Listhead is 0 and the Second Contains the Address of the First

Figure 8-1

Linked Lists on RSX-llM

8-2

DCB

$PARHD

LINK TO DEVICE DATA BASES
LINK TO PARTITIONS
CHAIN OF ALL TCBs
CHAIN OF ALL ACTIVE TASKS
RESCHEDULE POINTER
CURRENTTCB
LOADER
TASK TERMINATION
DYNAMIC STORAGE REGION
FORK LIST
CLOCK QUEUE

DCB

II L-JI '----'

---

I 111

DCB

L....,_J

1--.-.J

I UCB1 I

I SCB1

I I uce1 I

}

•FIG. 8-15
•FIG. 8-16

=
g;

STACK
PROG.

l'lll

t::
SCB

• FOR MAPPED SYSTEM
HEADER IS COPIED
TODSR

•FIG. 8-10

TCSOFTASK
TERMINATING
TASK

!
t"

s,.

•FIG. 8-19

•FIG. 8-14

tll

•FIG. 8-20

• BULLETED FIGURE REFERENCES REFER
TO RELATED DIAGRAMS.
•FIG. 8-3
•FIG. 8-4
•FIG. 8-6

•FIG. 8-8

Figure 8-2

Overview of RSX-llM System Control Blocks

DATA AltEAS AND CONTROL BLOCKS
8.2.1

Device Control Block Pointer ($DEVBD)

The location, $DEVHD, which is in SYSCM, contains the address of the
label, $DEVTB. $.DEVTB is the label of the first DCB of a list of DCBs
in the system.
produces SYSTB, which contains the DCBs, UCBs, and SCBs for the
system as well as the label, $DEVTB::. The Task Builder resolves the
references to the first DCB ($DEVTB) when it links SYSTB into the
Executive.

SY~GEN

The DCBs are linked by the :first word in each DCB, D.LNK.
D .LNK
contains the address of the next DCB in the chain. Typically, when
the Executive works with the DCB, R3 contains the address of the DCB.
To
access the next DCB, the Executive executes a MOV @R3,R3
instruction.
The DCBs and UCBs in SYSTB contain the logical name, logical unit
number, and device characteristics of the devices in the system. In
general, the DCB contains device-unit information common to all
device-units of the same type on a controller. This kind of structure
saves space because, otherwise, thi.s common information would have to
appear in the UCB for each device-unit.
The DCB contains the device name;
for example, the DCB for DKO:
contains "DK" in ASCII.
With one exception, there is only one DCB
with the name of a given device in it.
The exception occurs when
there is a DCB for every kind of terminal device controller in the
system (DL, DJ, DH, or DZ); however, they all contain the device name
"TT".
There are two types of DCB; one for real devices and one for pseudo
devices.
Nothing in the DCB denotes its use for a real or pseudo
device. However, the UCB associated with the DCB contains the bit,
DV.PSE, which identifies the associated device as a pseudo device.
An Executive co-routine, $SCNDT, is used to scan all the addresses of
the DCBs and UCBs in the system up to but not including the first
pseudo device. For example, the address of the DCB for TI: cannot be
found by using this co-routine.

8.2.2

Unit Control Blocks

A UCB exists for each device-unit on the system. D.UCB, which is a
word in the DCB, contains a pointer to the first UCB for that DCB.
There is at least one UCB for each DCB; however, there can be more
than one UCB for each DCB.
For an example of a DCB-UCB relationship, a system has four identical
disk drives on one controller.
The disk device-units would have
physical unit numbers from O through 3 and logical unit numbers from O
through 3. In this configuration, there is one DCB (all device-units
are the same), four UCBs (one for each device-unit), and one Status
Control Block (SCB) for the controller. In this example, only one
drive can be operated at a time.
For another example, a system has four identical disk drives1
two
connected to controller 0 and two connected to controller 1. The two
drives on controller 0 have physical unit numbers O and 1, and logical
unit numbers O and 1. The two drives on controller 1 have physical
unit numbers O and 1, and logical unit numbers 3 and 4.
In this
configuration, there is one DCB (all device units are the same), four
UCBs (one for each device-unit), and 'two seas (one for
each
8-4

DA'l'A AREAS AND CONTROL BLOCKS
controller).
In this example, two drives can operate in parallel as
long as they are on different controllers: that is, the drives with
logical unit numbers 0 and 2 or 0 and 3, or the drives with logical
unit numbers l and 2 or 1 and 3. ·
The UCB contains pointers and device status information.

8~2.3

Status Control Block (SCB)

There is one Status Control Block for each controller on the system
and it contains controller status information. The UCB points to the
related SCB. See the discussion that precedes the word and bit
definitions for the Status Control Block.

8.2.4

Partition Control Block (PCB) Pointer

$PARBO is the pointer to the first PCB in the chain of system PCBs.
System- and user-controlled partitions
examining the form of their PCB linkage.

can

differentiated

In a user-controlled partition PCB, P.LNK of this PCB points to the
first word, P.LNK, of the next subpartition PCB. P.SUB in the first
PCB also points to P.LNK of the next PCB.
P.MAIN, which is in
user-controlled partition and subpartition PCBs, points back to the
main partition PCB that heads the list of subpartition PCBs.
In a
user-controlled main partition PCB without subpartitions, P.SUB is O.
However, if the main partition has subpartitions, P.SUB in the last
~ubpartition PCB is zero.
This linkage is slightly different in system-controlled partitions.
The dynamically created subpartition PCBs are not linked by P.LNK;
only P.SUB points to the first word, P.LNK, of the next PCB in the
chain
of PCBs.
P.MAIN in each system-controlled partition or
subpartition points back to the main PCB.
In a PCB
for
a
system-controlled partition without dynamically created subpartitions.
P.LNK is O. If the partition has subpartitions, P.SUB in the last
subpartition PCB is O.
See Figure 8-3 for
partition list.

8.2.5

example

system-

and

user-controlled

Task Control Block (TCB) Pointers ($TSKHO And $ACTHO)

Task Control Blocks (TCBs) are listed in several lists.
One is the
System Task Directory (STD), a list (ordered by priority) of all
installed tasks. Another is the Active Task List
(ATL), a list of
tasks that are currently active.
The ATL is a subset of the STD;
therefore, TCBs that are linked into the ATL are also linked into the
STD.
$TSKHD points to the first TCB in the STD. The remaining TCBs in the
STD are linked by the word, T.TCBL. $TSKHD points to T.LNK in the
first TCB, T.TCBL in the first TCB points to T.LNK in the next TCB,
and so on.
$ACTHD points to the first TCB in the ATL. The word, T.ACTL, links
the remaining active task TCBs. T.ACTL in the last TCB word is O;
this indicates the TCB of the Null task.
8-5

DA'l'A AFtEAS ARD COR'l'ROL BLOCKS
The Partition Wait Queue is a list of TCBs of those tasks waiting to
use a given partition.
The word, P.WAIT, in the PCB points to the
first TCB in the Partition Wait Queue. T.LNK in the first TCB points
to the T.LNK word in the sec:ond TCB, T.LNK in the second TCB points to
the T.~NK word in the third TCB, and so on.

8 .2 .6

Reschedule Pointer

(~~RQSCB)

The reschedule pointer, $RQSCH, contains the address of the TCB of the
task to be rescheduled.

8.2.7

Current Task Pointer ($TKTCB)

The current task pointer, $~rKTCB, contains the address of the
the currently running task.

8.2.8

TCB

Loader Pointer ($LDRl?'l')

Normally, $LDRPT is the pointer to the TCB of the Loader task.

8.2.9

Task Termination Task Pointer ($TKNPT)

$TKNPT points to the TCB of the Task Termination Task.

8.2.10

Free Storage Block Pointer ($CRAVL)

$CRAVL.points to the first free block in a list of free storage blocks
in the Dynamic Storage Region. $CRAVL-2 is a word that contains a 3
and should never contain less than a 3. This number is one less than
the number of bytes in the smallest possible block obtainable from the
Dynamic Storage Region. This number 3 is a rounding factor. In other
words, the size of the smallest allocatable memory block is 4 bytes
and memory must be allocated in multiples of 4 bytes. Four bytes are
needed because every free memory block must contain a pointer to the
next block, followed by its own size in bytes. This information uses
up 2 words of the block.
Initially, the Dynamic Storage Region is a
However, it becomes somewhat fragmented
execution.

8. 2 .11

continuous
after the

memory area.
system begins

Fork Queue List Poi.nter ($FRKHD)

$FRKHD is a pointer to a list of seas in the fork queue.

8.2.12

Clock Queue Pointer ($CLKHD)

$CLKHD is a pointer to a list of 8-word clock queue control blocks.

8-6

DATA AREAS ARD CONTROL BLOCKS
8.2.13

Current Task Reader Pointer ($BEADR)

$HEADR points to the current task header. In a mapped system, the
Executive copies the task header into the DSR. Only privileged tasks
can access this copy7 the Executive refers to and modifies this copy
as execution proceeds. Therefore, the original header of the current
task may not contain valid information because the valid header is in
the DSR space.
Before the task is checkpointed, the Executive
replaces the original header with the copy in the DSR.

8.2.14

Examples Of System Linkages

Figure 8-3 contains an example
system-controlled partitions.
Figure 8-4 shows
partitions.

TCB

wait

PCB

linkage

queues

user-

and

Figure 8-5 shows checkpoint file PCBs with
task TCBs.

and

for

the

without

PCB,

and

system-controlled

Figure 8-6 shows an example of TCBs linked into a
Directory with some of the TCBs in the Active Task List.
Figure 8-7 shows a simplified linkage
header in a task partition.

user-

checkpointed
System

TCBs,

and

Task
task

Figure 8-8 shows a linkage of TCBs for resident and non-resident tasks
with their respective PCBs.
Figure 8-9 shows AST control blocks in the AST queue.
Figure 8-10 shows TCBs of tasks in the Loader queue.
Figure 8-11 shows Send/Receive data blocks queued to the receiver task
TCB.
Figure 8-12 shows
receiver task TCB.

Send/Receive-by-Reference

blocks

queued

the

Figure 8-13 shows the linkage of Clock Queue Control Blocks.
Figure 8-14 shows the linkage of the Fork Control Blocks.
Figure 8-15 shows an example of DCBs, SCBs, UCBs, and LCBs in system.
It also shows the linkage caused by redirected and reassigned devices.
Figure 8-16 Shows the Logical Assignment Control Block linkage.
Figure 8-17 shows the linkage of MCR queue entries.
Figure 8-18 shows the linkage of pre-allocated I/O packets.
Figure 8-19 shows Message Blocks in the Task Termination
(TKTN) queue.
Figure 8-20 shows the linkage
Storage Region.

the

8-7

free

blocks

Notification
the

Dynamic

DATA AltBAS ARD CONTROL BLOCKS
PARTITION LIST
SPAR HD

P. LNK

P.sus-e

==i
~

P.MAIN

I--'

P. LNK

r;:-

P.. SUB
P.MAIN

t--

P. LNK

P.SUB
P.MAIN

USER-CONTROLLED
MAIN PARTITION
WITHOUT SUBf'ARTITIONS

USER·CONTROLLED
MAIN PARTITION
WITH 2 SUBPARTITIONS

!-----"

P. LNK

P.SUB-cl
P.MAIN

P. LNK•G

P. LNK•?

P.SUB
P.MAIN

1---1
SYSTEM-CONTROLLED
PARTITION WITH
2 OYNAMICALLY
CREATED SUBPARTITIONS

P. LNK•?

P.SUB
P.MAIN

1--1
P. SUB•G
P.MAIN

1--

PCB'SOF DYNAMICALLY ALLOCATED
SUBPARTITIONS ARE CHAINED ACCORDING
TO THE BASE ADDRESSES OF THEIR SUBPARTITIONS

Figure 8-3

Example of PCB Listings

8-8

DATA AREAS AND CONTROL BLOCKS

- r--'""

P. LNK

.........

P. SUB

[

P.MAIN
P.WAIT

T. LNK

T. LNK•0

T.PCB

'---

T.PCB

r--

T. LINK

r--

T.PCB

WAIT QUEUE OF A
USER CONTROLLED

P. LNK

)o MAIN PARTITION

WITH ONE
SUBPARTITION

P. SUB-G
P.MAIN

P. LNK-G

P. SUB
P.MAIN
P.WAIT

T. LNK

...-

r--r-

T. PCB

T. LNK-G

T.PCB

WAIT QUEUE OF A SYSTEM
CONTROLLED PARTITION

.._

i....

P. SUB•0

P. SUB•0
r--

P.MAIN

>- WITH ONE TASK

P.MAIN

ALREADY RESIDENT
P. SUB-G

,--

P.MAIN

P. LNK•7
P. SUB-G
P.MAIN
.J

TCB'S OF WAITING TASKS ARE CHAINED ACCORDING
TO THE RUNNING PRIORITY OF THE TASKS IN
DESCENDING ORDER.

•

The main PCB always heads the Partition Wait Queue.
The
Partition Wait Queue contains TCBs both of tasks to be loaded
for the first time and of checkpointed tasks.
Figure 8-4

Example of a Partition Wait Queue

8-9

DATA l~RBAS ARD CONTROL BLOCKS

$CFLPT

P. LNK

P.SUB
P. MAIN-G

---

::::::;_

.--..i
P. SUB
P.MAIN

r---1
P. SUB
P.MAIN

1--

CHECKPOINT FILE
WITH 2 CHECKPOINTED
TASKS IN IT.

.__

..__

T.CPCB

P. LNK•G

CHECKPOINT FILE
CURRENTLY NOT USED

P. SUB•G
P. MAIN•IJ

•

PCBs for checkpoint files are allocated by the MCR command:
ACS devunit:

/BLKS=no.

of blocks

The PCBs are chained in the order of their allocation.
•

PCBs for checkpointed tasks are dynamically allocated whenever
the Executive checkpoints a task and are chained in ascending
order according to base disk address.
Figure 8-5

Example of a PCB List for Checkpoint Files

8-10

DATA AREAS AND CONTROL BLOCKS

$TSKHD

TCB

$ACTHD

( T. PAI

r--

248

T.TCBL
LT. DPRI 248
T.ACTL

>TceoF
(TYPICALLY)

LOADER TASK

r-~

TCB
$ROSCH1---1

,......

[ T. PAI

161J

T.TCBL
(T. DPRI 16G
T.ACTL

TCB
( T. PAI

r--

10G

T.TCBL
(T.DPRI 10(1

TCB
[ T. PAI
.........i

T. TCBL
[T. OPAi 60
T.ACTL

1----11--1

TCB
STKTCB ~
r--'

( T. PRI

135

T.TCBL
(T.DPRI
T.ACTL

50
1---'

TCB
[ T.PAI
T. TCBL•0
T.ACTL•0

Figure 8-6

• $TSKHD points to the start of the
STD.
• $ACTHD points to the start of the
ATL.
• $TKTCB points to the current task.
e $ROSCH points to where the Execut1' ve
starts scanning the ATL.
• A task is put into the STD by the
Install command and removed by the
Remove command.
• The STD is linked in descending
order
according to the default
priority.
• The ATL is linked according to the
running and default priority in
descending order.
• The default priority is defined when
the task is installed:
TKB-option PRI•n
INS f ilespec/PRI=n
RUN f ilespec/PRI=n
default•SO.
ALT taskname/PRI=n
• The running priority is defined by:
ALT taskname/PRI=n
ALT taskname/RPRI=n
ALTP$ directive
default: default priority
• The
round
robin
scheduler
periodically reorders the tasks of
the same numeric running priority
within the ATL1 it does not affect
the STD.
• The swapping algorithm does
not
affect the STD or the ATL.
• The following are pointers to TCBs
of special tasks:
$LDRPT points to the Loader TCB
$MCRPT points to the MCR TCB
$TKNPT points to the task
termination notification task
TCB
$SHFPT points to the shuffler
TCB
$ERRPT points to the error
logger TCB

}

TCBOF
NULL TASK

Example of a System Task Directory (STD) and Active Task List

8-11

DATA AFtEAS AND CONTROL BLOCKS

NON-RESIDENT
TASK

TCB

·r.PCB

PCB OF TASK
PARTITION
(MAIN OR SUBP}
P. TCB

r--1

~HOR

TCB
T.PCB

RESIDENT TASK

TASK
HEADER

Figure 8-7 Simplified User-Controlled
Partition TCB, Task Header, and PCB Relationship

8-12

DATA AREAS ARD CONTROL BLOCKS

r--

t::!=-1
P.SUB
P.MAIN

1-i
PCB OF
MAIN PARTITION

TCB
NON-RESIDENT,
NON-ACTIVE TASK

T.PCB

P. TCB•(I

!--'
P. HDR•0

i--i

TCB
T.PCB
P.SUB
P.MAIN
RESIDENT TASK

r-:::

"""'

1-i
t-+-

DYNAMICALLY
CREATED PCB
P. TCB
P.HOR

TASK
HEADER

n_ NON-RESIDENT,
ACTIVE TASK

TCB
T.PCB

P. SUB•?
P.MAIN

I'--'1-DYNAMICALLY
CREATED PCB

P.TCB

EACH ACTIVE TASK
HAS ITS OWN
DYNAMICALLY
CREATEO PCB.

P. HOR?

PCB'S OF RESIDENT
TASKS ARE CHAINED
ACCORDING TO THE
BASE ADDRESS OF
THEIR SUBPARTITION.

r--i

TCB .
T. PCB

f..,.J
P. SUB-G
P.MAIN

OTHER
RESIDENT
TASK

P. TCB

~
TASK
HEADER

t---

DYNAMICALLY
CREATED PCB
(LAST)

P. HOA

-.-

Figure 8-8 TCB, Task Header, and PCB
Relationships in a System-Controlled Partition

8-13

DATA AF~AS ARD CONTROL BLOCKS

TCB

T.ASTL

AST

ONTROL BLOCK
FOR
RECEIVE DATA

CONTROL BLOCK
FOR
MARK TIME

AST
CQINTROL BLOCK
FOR
If() COMPLETION

TASK
HEADER

AST

H. PFVA
H. PFVA•0
H. RCVA•0
H.RRVA,,. 0

AST

CINTROL BLOCK
FOR
E:CEIVE DATA

CLOCK QUEUE
CONTROL BLOCK
FOR

1/0 PACKET

MARK TIME

AST
CONTROL BLOCK
FOR
POWER FAILURE

•

AST control blocks are queued FIFO.

•

AST control blocks
for
power
failure,
floating-point
exception,
Receive
Data,
and
Receive-by-Reference are
allocated a length of C.LGTH•l6. bytes. They are deallocated
by the STRA$, SFPA$, SRDA$, and SRRA$ directives. Their
addresses are kept in the task header.
When an AST is
executed, the AST control block is inserted into the AST
queue. After the AST has been set up, the AST control block
address is again put into the task header.

•

The AST control block for Mark Time is allocated a length of
C.LGTH•l6. bytes by the MRKT$ directive and inserted into the
clock queue. When the mark time becomes due, the AST control
block is removed from the clock queue and inserted into the
AST queue. After the AST has been ~et up, the AST control
block is deallocated.

•

For the I/O completi.on AST, the I/O packet is taken and
inserted into the AST queue. After the AST has been set up,
the AST control block (I/O packet) is deallocated.
Figure 8-9

Example of an AST queue

8-14

DATA AREAS AND CONTROL BLOCKS

.,.

$LDRPT
TCBO F
LOAD ER ..TASK

LOADER
TCB

T.RCVt

TCB

TCB
T. LNK

TCB
T. LNK•IJ

T. LNK

TCBs OF TASKS TO BE LOADED OR ROLLED
OUT/IN ARE CHAINED ACCORD1NG TO THE
RUNNING PRIORITY OF THE TASKS IN
DESCENDING ORDER.

•

The Loader queue is headed by the TCB of the loader task and
contains TCBs of both tasks to be loaded the first time and
the task to be checkpointed.
Figure 8-10

,-1
I-

T.RCVL

-i

The Loader Queue

---

TCBOF
RECEIVER ~
TASK

-""'

'-i

•

Send/Receive data blocks are queued FIFO.

•

Send/Receive data blocks are queued by issuing the SDAT$
directive and dequeued when the RCVD$ or RCVX$ directives are
issued.
Figure 8-11

Send/Receive Data Queue

8-15

DATA l~REAS AND CONTROL BLOCKS

TCBOF

RECEIVER

TASK
T. RRFL

•

l -

~
-

Send/Receive-by-Reference blocks are queued FIFO.

blocks are queued by issuing the
• Send/Receive-by-Reference
SREF$ directive and dequeued when the RREF$ directive is
issued.

Figure 8-12
SCLKHD

-;:S:

i...-

C. LNK

Send/Receive by Reference Queue
•

The clock queue is linked in ascending
order according to the absolute time when
the events described by the Clock Queue
Control Block come due.

•

The 1-word counter, $ABTIM, is incremented
with each clock tick. Whenever it
overflows, the high-order word of the
absolute time in each clock queue is
decremented.
-

•

An event comes due when the high-order of
the absolute time in its Clock Queue
Control Block is 0 and the low-order
word of the absolute time is less than or
equal ·to the counter, $ABTIM.

•

The Clock Queue Control Block is
conditionally deallocated when the event
comes due dependent on the type of Clock
Queue Control Block:
Type 0 - Used as AST control block (if
specified), otherwise deallocated
Type 2 - Queued again
Type 4 - Deallocated
Type 6, 10, or 12 - Not deallocated

C. LNK

C. LNK•G

Figure 8-13

The Clock Queue

8-16

DATA AREAS ARD CONTROL BLOCKS

$FR KHO

•

Fork control blocks are queued FIFO

•

Fork control blocks are queued by issuing a $FORK, $FORK1 or
$FORK0 call; the control goes back to the next higher subroutine
level

•

Fork processes (instructions following the CALL $FOR Kn instruction
up to the next RETURN instruction) are executed before the system
goes back to user level the next time ($STKDP is changed from
fJ to 1)

FORK CONTROL BLOCK

POINTER TO NEXT FORK CONTROL BLOCK

START ADDRESS OF FORK PROCESS

SAVED RS

SAVED R4

RELOCATION BIAS OF FORK PROCESS
IN MAPPED SYSTEM WITH
....,------------------------------'LOADABLE DRIVER
12
SUPPORT ONLY

Figure 8-14

The Fork Queue

8-17

mm:;I
'DB'

DCB

IA~: I

rl9 ::~I
I

see

'LP'

SLNA
see

UCB
U.OWN=t

DSG

U.DCB

~I
(X)

.....
(X)

.DB1

0. Rf{)

'rA

U.OWN

~· U.DCB

L...IU:""REol

11 I

r:I

.DBI

to!

fJt1

~r.-,
$TT2

l'O

sn
"m

U.OWN=t

CB
~
U.RED
• LP REDIRECTED TO TT2

U.SCB

• SY REDIRECTED TO DBI

L. LNK
MP
L.UCB
L.ASG
......_

>'
ll!I

PARTIAL UCB
USES UCB FOR.

U.SCB

$LOG HD

LOCAL ASSIGNMENTS

Figure 8-15

~=G

L. LNK

L.UCB

LUCB

L.ASG
......_

LASG

v
LOGIN ASSIGNMENTS

_,,

L.UCB•I

L.ASG

GLOBAL ASSIGNMENTS

Example of DCB, SCB, UCB, LCB Relationship

DATA AREAS AND CONTROL BLOCKS

$ LOGHD

LOCAL

GLOBAL

LOGICAL ASSIGNMENT CONTROL BLOCK (LCB)

L. TYPE

LINK TO NEXT LCB

L. LNK

LOGICAL NAME OF DEVICE

L.NAM

TYPE OF ENTRY (0•GLBL) LOGICAL UNIT NUMBER

L. UNIT

Tl UCB ADDRESS

L.UCB

ASSIGNMENT UCB ADDRESS

L.ASG
L. LGTH

• An LCB is allocated by issuing an
{
ASN target device= logical device /LOGIN [/TERM• terminal] } command
/GBL
and deallocated by issuing an {
.
ASN • [logical device]
/LOGIN [/TERM= terminal] } command
/GBL
• There are three groups of logical assignments:
1. local assignments applying to one specific terminal only
2. login assignments applying to one specific terminal only where
a user is logged in, they are established either at login time
or when a login logical assignment command is issued
3. global assignments valid for all terminals in the system
•

LCBs are linked local assignments first, then login assignments and
global assignments at the end; within each group they are linked according
to the time the logical assignment was established

•

Logical assignments are resolved by scanning the linked list of LCB's
when a logical unit number is assigned to a physical device (at install
time or at run time when a ALUN$ directive is issued)

• Symbolic offset definitions In LCBD FS in [ 1, 1] EX EMC.M LB

Figure 8-16

Logical Assignment Control Block (LCB) List

8-19

DATA J~RBAS AND CONTROL BLOCKS

SM CR PT

....

T.RCVL

1----

SMCRCB

POINTER TO
NEXT BLOCK

UCB OF REQUESTING
TERMINAL

UCB OF REQUESTING
'---" TERMINAL

•

MCR queue entries are allocated in a length of 84. bytes (M$$CRB)

•

MCR queue entries are linked FIFO

•

Entries are inserted by the terminal driver whenever an unsolicited
input is completed or when a line is finished being typed in after an
MCR> 1>rompt that follows a control·C.

•

Entries are dequeued by the MCR root; internal MCR commands
are processed by the corresponding overlay segment; MCR queue
entries for external MCR commands are inserted into the following
queue

POINTER TO
NEXT BLOCK

UCB OF REQUESTING
TERMINAL

•

MCR queue entries in this list are dequeued when an external
MCR command (a task with a taskname ... XYZ) issues a GMCRS
directive; the contents of the entry is copied into the OPB of the
GMCR$ directive and the MCR queue entry is deallocated

Figure 8-17

MCR Queues

8-20

DATA AREAS AND CONTROL BLOCKS

~
$PKAVL

$PKNUM $PKMAX

POINTER TO FIRST 1/0 PACKET

MAX NO.OF
PACKETS
ALLOWED IN
LIST

·No. OF PACKETS
CURRENTLY
IN LIST

I-

•

Each preallocated 1/0 packet has a length ot 44 bytes.

• Preallocated 1/0 packets are provided - as long as
available - whenever $ALOCB is called and a core block
with a length of 44 bytes is requested.
• Preallocated 1/0 packets can and will be used for other
purposes also.

Figure 8-18

Pre-allocated I/O Packet Queue

8-21

DATA J.JU:AS ARD CONTROL BLOCKS

$TKNPT

T.RCVL

!---"""

.oj

POINTER TO
NEXT BLOCK

MESSAGE NUMBER

UCB/TCB ADDRESS

""
• The queue is linked FIFO
• An entry i11 made when the routine $DYMSG is called
As a second TKTN queue the active task list (ATL) is used.
There are two types of ATL entries significant for the TKTN:
• TCBs (with the TS.MSG bit in T. STAT and the T2. ABO bit in T. ST2 set)
of aborted tasks or an exited task with outstanding 1/0 in which case
T. EFLG

I current 1/0 count I abort message

• TCBs (with the T2. CAF bit in T. ST2 set and the T3. CAL bit in T. ST3 clear)
of tasks with a checkpoint allocation failure

Figure 8-19

Task Termination Notification (TKTN) Queues

8-22

DATA AREAS AND CONTROL BLOCKS

$CRAVL

LOW MEMORY

Figure 8-20

Dynamic Storage Region Free Block Queue

8-23

DATA Al~EAS ARD CONTROL BLOCKS

8.2.15

Interrelationship Of The DCB, UCB, And SCB

This section discusses the celationships existing among the DCB,
and sea.

UCB,

Figure 8-21 shows the data structure resulting from three LA36
DECwriters interfaced by means of a DHll multiplexer. The structure
requires one DCB, three UCBs, and three SCBs, because activity on all
three units can proceed in parallel.
Figure 8-22 shows the internal data structure for an RKll disk
controller with three units attached. Note that only one SCB exists
because only one of the three units can be active at any given time.
Figure 8-23 shows the data structure for two RKll disk controllers,
each of which has two drives attached. Here, there are two seas,
because both of the disk controllers can operate in parellel.
Taken together, Figures 8-21, 8-22, and 8-23 illustrate the strategy
underlying the existence of three basic I/O control block types.
There need be only one DCB for each device type. There may be one or
more seas, depending on the degree of parallelism that is desired or
possible: one for each device-unit, or one for each controller
servicing several device-units.
The number of UCBs and seas, and
their interrelationships, are uniquely determined by the hardware that
these data structures describe.
This data structure provides considerable flexibility in configuring
I/O devices, and, because of the control and status in the structures
themselves, substantially reduces the code requirements of
the
associated drivers.

DCB

UCB

1
SCB

Figure 8-21

1
SCB

SCB

DHll Terminal I/O Data Structure

8-24

DATA AREAS AND CONTROL BLOCKS

DCB

,
UCB

UCB

Figure 8-22

UCB

sea

RKll Disk I/O Data Structure

DCB

j_
UCB

UCB

see

Figure 8-23

I/O

Data Structure for Two RKll Disk Controllers

8-25

DATA AREAS AND CONTROL BLOCKS
8 •3

I/O CONTROL BLOCK LINK.i\GES

This section discusses all the I/O control blocks, in terms of their
linkage and use within the system. The following data structures make
up the complete set for I/O processing:
1.

Task Header

Window Block ·{WB)

File Control Block {FCB)

$DEVHD word, the Device Control Block (DCB), and
Dispatch Table (DDT)

Unit Control Block (UCB)

Status Control Block (SCB)

I/O Queue

Volume Control Block (VCB}

the

Driver

Figure 8-24, which provides the structure
for
the
following
discussion, shows all the individual data structures and the important
link fields within them. The numbers on the figure are keyed to the
text to simplify the discussion and to quide the reader through the
data structures.

8-·26

DATA AREAS AND CONTROL BLOCKS

TASK
HEAO'ER

SDEVHO::

(INSYSCM)

_
1

ocs

......

oca

......

oce

0 --- 0
DOT

INI

CAN
TIM

;o
UCBs

-o-ou

FORK
BLOCK

0l/OQUEUE

® VCB

FCB (INDEX)

--------,---.-w
. -e-(-vo_L_u_M~e~10~----------------'
MOUNTED

VOLUME

Figure 8-24

I/O Data Structure

8-27

DATA AREAS AND CONTROL BLOCKS
1.

The task header ls constructed during the task-build process.
In mapped systems, a copy of the task header (located in the
task's partition) is made in the Executive's Dynamic Storage
Region.
The Executive then uses this copy. To access the
current information in this copy, a task must be privileged
and mapped to the Executive.
The task header entry of interest, the Logical Unit Table
(LUT), is allocated by the Task Builder and filled in at task
installation. The number of LUT entries is established by
the UNITS• keyword option1 this number is an upp~r limit on
the number of device units a task
may
have
active
simultaneously.
Each LUT entry contains two words:
a pointer to
an
associated UCB, and a pointer to a Window Block. The first
word contains the address of the device UCB in the Executive
system tables that contains drive-dependent information. The
UCB address is set
during
task
installation
if
a
corresponding ASG• option is specified at task build time.
The UCB address can also be set at run-time with the Assign
LUN directive to the Executive.
The second word is a pointer to the Window Block if the
device is file structured. The Window Block pointer is set
when_a file is opened on the device whose UCB address is
specified by the first word. The Window Block pointer is
cleared when the file is closed.

A Window Block (WB) exists for each active access to files on
a mounted volume. It helps to speed up the retrieval of data
items in the file1
entries in a WB consist mainly of
pointers to contiguous areas on the device on which the file
resides. The driver is not concerned with the WB.

Each uniquely opened file on a mounted volume has an
associated File Control Block (FCB). The file system uses
the FCB to control access to the file.

$DEVHD is a word located in system common (SYSCM) and points
to a singly linked, unidirectional list of Device Control
Blocks (DCBs). Each device type in a system has at least one
associated DCB.
The DCB list is terminated by a O in the
link word.
Linked to each DCB is a Driver Dispatch Table (DDT), which is
part of the driver. The DDT contains the addresses of the
driver's four entry points that the Executive can call.

A key data structure is the Unit Control Block (UCB).
All
the UCBs associated with a DCB appear in consecutive memory
locations. During internal processing of a I/O request, most
drivers set RS to the address of the related UCB: it is by
means of pointers in the UCB that the driver can access other
control blocks in the data structure. In particular, the UCB
contains pointers to the DCB, SCB, VCB, and to the UCB to
which it may have lbeen redirected. If a Redirect command has
not been issued for the device-unit, the UCB redirect pointer
points to the UCB itself. When servicing a request for one
of its UCBs, the driver is unaware of whether I/O was issued
directly to its own UCB or to a UCB that had been redirected
to its UCB.

8-28

DATA AREAS ARD CONTROL BLOCKS
6.

One Status Control Block (SCB) exists for each controller in
the
system.
A
unique
SCB
must
exist
for
each
controller/device-unit capable of performing parallel I/O.
The SCB contains the fork-block storage required when a
driver calls $FORK to transfer itself to the fork processing
level.
The I/O request queue listhead is also contained in
the SCB. Generally, register R4 contains the address of the
SCB during processing of an I/O request.

The I/O queue is a list of control blocks called I/O packets
that QIO processing creates dynamically. Each time a task
makes an I/O r.equest, the Executive performs a series of
validity checks on the DPB parameters. If these checks prove
successful, the Executive generates a data structure called
an I/O packet. The Executive then inserts the packet into a
device-specific, priority-ordered list of packets called the
I/O queue. Each I/O queue's listhead is in the SCB to which
the I/O requests apply.
When a device driver needs work, it requests the Executive to
dequeue the next I/O packet and deliver it to the requesting
driver. Normally, the driver does not directly manipulate
the I/O queue.
However, an exception is the case where a
driver examines an I/O packet before it is queued, or in
place of having it queued. For the driver to accomplish this
examination, it must set the UC.QUE bit in the control byte,
U.CTL, of the UCB.
The most common reason for a driver to examine a packet
before queuing is that the driver employs a special user
buffer, other than the normal buffer used in a transfer
request.
Within the context of the requesting task, the
driver must address-check and relocate such a special buffer.

8.4

8.4.l

One Volume Control Block (VCB) exists for each mounted volume
in the system.
The VCB maintains volume-dependent control
information. It contains pointers to the File Control Block
(FCB)
and Window Block
(WB), which control access to the
volume's index file.
(The index file is a file of file
headers.) The WB for the index file serves the same function
as the WB for a user file. All unique FCBs for a volume form
a linked list emanating from the index file FCB. This
linkage helps to keep file access times short.
Further,
because the window that contains the mapping pointers is
variable in length, you can increase file access speed by
adding
more
access
pointers
to whatever extent the
application requires. However, greater speed requires more
main memory.

CONTROL BLOCK OFFSET DEFINITIONS

Asynchronous System Trap Control Block (ASTCB)

Defined by: .MACRO

PKTDF$,L,B,SYSDEF

Some positional dependencies between the DCB and the AST control block
are relied upon in the routine $FINXT in the module SYSXT.

8-29

DATA A:REAS ARD

.ASECT
.•177774
A.KSRS: 'L' .BLKW 1
A.DQSR:'L' .BLKW 1
.BLKW 1
A.CSL: 'L'
.BLKW 1
A.BYT: 'L'
.BLKW 1
A.AST: 'LI
.BLKW l
A.NPR: 'LI
.BLKW 1
A.PRM: 'L'
.BLKW 1

CONTROL BLOCKS

7Subroutine KISARS bias (A.CBL•O)
1Dequeue subroutine address (A.CBL•O)
1AST queue thread word
1Length of control block in bytes
1Nu1mber of bytes to allocate on task stack
1AST trap address
1Number of AST parameters
1First AST parameter

8.4.1.l I/O Packet Offset Definitions - QIO directive processing
constructs the 18-word I/O packet and places it in the driver I/O
queue. A call to $GTPKT subsequently delivers the packet to the
driver •
• ASECT
.•O
I.LNK:'L'
.BLKW 1

I.PRI:'L'

.BLKB 1

I.EFN: 'L'

.BLKB 1

I.TCB:'L'
I. LN2 : IL I

.BLKW 1
• BLKW 1

I.UCB:'L'

.BLKW 1

I • FCN : ' L I

•

I.IOSB: 'L'

BLKW 1

.BLKW 1
.BLKW 1
.BLKW 1

: I/i:'.> queue thread word
Links I/O packets queued for a driver. A
0 ends the chain. The listhead is in the
S1:B (S. LHD) •
7Request priority
Priority copied from the TCB of the requesting task.
1Event flag number
Contains the event flag number as copied
by QIO directive processing from the request·or 's DPB.
1TCB address of the requesting task
1Pointer to second LUN word
Contains the address of the second word of
the LUT entry in the task header to which
the I/O request is directed. For open
files on file-structured devices, this word
contains the address of the window block,
otherwise it is o.
1Pointer to unit control block that
contains the address of the redirect UCB
if the starting UCB has been subject to a
R•edirect command.
1I/O function code
C•ontains the function code for the I/O
r·equest.
:Virtual address of I/O status block
1I/O status block relocaton bias
:I/O status block address
I.IOSB contains the virtual address of the
I/O status block (IOSB) if one is specified
or O if one is not.
I.IOSB+2 and I.IOSB+4 contain the address
doubleword for the IOSB. In an unmapped
system, the first word is 0 and the sec1::>nd word is ·the real address of the IOSB.
In a mapped system, the first word contains
the relocation bias of the IOSB: the bias is
the 32-word block number in which the IOSB
starts. This block number is derived by
viewing available real memory as a collection of 32-word blocks numbered consecu-

8-30

DATA AREAS AND CONTROL BLOCKS

I .AST: 'L'

• BLKW 1

I • PRM: ' L '

• BLKW 1
.BLKW 6

I •ATTL• I B ' •

.BLKW 1

I.LGTH•'B'.

8.4.2

tively, starting with o. Thus, if the
IOSB starts at physical location 3210(8),
its block number is 32(8). See the RSX-llM
Guide to Writing an I/0 Driver for more
details.
;AST service routine address
Contains the virtual address of the AST
service. routine to be executed at I/O completion. If no address is specified, the
field contains o.
;Reserved for mapping parameter il
;Parameters 1 to 6 constructed from the last
6 words of the OPB. Note that if the I/O
function is a transfer, the buffer address
(the first DPB device-dependent paramenter)
is translated to an equivalent address
doubleword. Therefore, device-dependent
paramenter "n" is copied to I.PRM+(2*n)+2.
;User mode diagnostic parameter word
;Minimum length of I/O packet (used by
file system to calculate maximum
number of attributes)
;Length of I/O request control block

Clock Queue Control Block (CQCB)

Defined by:

.MACRO

CLKDF$,L,B

There are five types of clock queue control blocks. Each control block
has the same format in the first five words and differs in the
remaining three.
The following control block types are defined:
;Mark time request
;Task request with periodic rescheduling
;Single shot task request
;Single shot internal system subroutine
( ident)
;Single shot internal system subroutine (task)
;Clear stop bit (conditionalized on shuffling)

C.MRKT•'B'O
C.SCHO•'B'2
C.SSHT•'B'4
C.SYST•'B'6
C.SYTK•'B'8.
C.CSTP•'B'lO.

8.4.2.1

Clock Queue Control Block Independent Offsets

.ASECT
.•O
c .LNK: 'LI
C.RQT: 'LI
c. EFN: 'LI
C.TCB: IL'

.BLKW l
.BLKB 1
.BLKB 1
.BLKW 1

C.TIM:'L'

.BLKW 2

;Clock queue thread word
;Request type
;Event flag number (mark time only)
;TCB address or system subroutine
; identification
;Absolute time when request comes due

8-31

DATA AJtEAS ARD CONTROL BLOCKS
8. 4. 2. 2

Clock Queue Contrc>l Block - Mark Time Dependent Offsets

.•C.TIM+4
C.AST: 'LI
C.SRC: 'LI
C.DST: IL I

8.4.2.3

.BLKW 1
.BLKW 1
.BLKW 1

1Start of dependent area
1AST address
1Flag mask word for 'BIS' source
1Address of 'BIS' destination

Clock Queue Contro1l Block - Periodic Rescheduling Dependent Offsets

.•C.TIM+4
C.RSI: IL I
C.UIC: 'L'

8.4.2.4

.BLKW 2
.BLKW 1

1Start of dependent area
:Reschedule interval in clock ticks
;Scheduling UIC

Clock Queue Control Block - Single-Shot Dependent Offsets

.•C.TIM+4
.BLKW 2
.BLKW 1

8.4.2.5

:Start of dependent area
;Two unused words
:Scheduling UIC

Clock Queue Control Block - Single-Shot Internal Subroutine -Offsets

There are two type codes for this type of request:
Type 6: single shot internal subroutine with a 16-bit value as an
identifier.
Type 8: single shot internal
identifier.
.•C.TIM+4
C.SUB: 'LI
c .ARS: IL I
C.LGTH•'B'.

8.4.3

.BLKW 1
.BLKW 1
.BLKW 1

subroutine with a TCB address as an

:Start of dependent area
:Subroutine address
:Relocation base (for loadable drivers)
:One unused word
:Length of clock queue control block

Communications Control Block (CCB)

Defined by: .MACRO CUCDF$ X,Y
.ASECT
.=U.CW2+2
u .ACOR: Ix
u .NSYN: Ix
u .NSYC: Ix
.=U.VCB+2
U.PHDR: 'X
u .RCHK: Ix
u .QSYN: Ix
U.RCAC: 'X
u .RBUF: Ix
u .RCNT: Ix
u .SVC: Ix
u .TXCT: Ix
u .INTP: Ix
U.SYNC: 'X
u .MPN: Ix

.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 2
.BLKW 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1

:Position ACU at U.CW3 position
:ACU register address (at U.CW3)
:Number of syncs to issue
:Number of syncs issued
:Extend after VCB address
;End-of-transmit header check routine
:Address of redundancy check routine
:DQ sync buffer
:Redundancy check accumulator
:Receive buffer address
:Receive buffer count
:External receive interrupt service
:DQ transmit buffer count
:Internal receive interrupt service
:Current sync charecter
:Multipoint node number
8-·32

DATA AREAS AND CONTROL BLOCKS
U.RFRK: 'X
U.RFPC:'X
U.RFR5: 'X
U.RFR4: 'X
U.RFCT•'Y
.PSECT

.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
U.TXCT+l

;Receive fork block
;Fork PC
;Fork save RS
;Fork save R4
;DO receive fork count

U2.HDX='Y
U2.LIN•'Y
U2.CTS•'Y
U2.SWC='Y
U2.0NL•'Y
U2.HPT•'Y
U2.HRC•'Y
U2.RCV•'Y
U2.ACU='Y
02.MPT•'Y
U2.FTM='Y
U2.SFL='Y
02.RFK='Y
02.SYC='Y
U2.TXA='Y
U2.SNC•'Y
US.SYN='Y

100000
40000
20000
10000

;Set if running half duplex
;Set if physical link half duplex
;Set if clear to send expected
;Set if switched circuit
;Set if unit on line
;Set if DO has protocol option
;Set if controller does CRC
;Set if receiver active, half duplex
;Set if unit has ACU
:Set if operating multipoint
;Set if just initiated receive
;Sent final on last message
;Clear when primary fork free (DO)
;Bits used for receiver sync count
;Set if TX code active (DO)
;Set if sending syncs (DO)
;Set if device always sends sync

U3.LOK='Y
U3.RPD='Y
U3.RAC•'Y
o3.SND='Y

100000

8.4.3.l

4000
1000
400
200
100

40
20
10
4

2
1
1

;Software interrupt lockout (DA)
;Set when receive pending (DA)
200
:Set when receive in progress (DA)
1
;Set when in transmit mode (DA)
.MACRO CUCDF$ A,B
.ENDM
.ENDM
400

Communications Vector

Defined by: .MACRO CVCDF$ X,Y
.ASECT
.=V.IFWI
v .CPRT: Ix
v .CLON: Ix
v .CMPN: Ix
V.CSTS: 'X
V .CSTl: 'X
V.CNID: 'X

v .cues:' x
v .CMPL: Ix
V.CNPN: 'X
v .CMBC: Ix
v .CRED: Ix
v .CNHD: Ix
v .CTBL: Ix
v .CRBL: Ix
v .NXHD: Ix
v .CDBC: Ix
v .CIAO: Ix
v .CICT: Ix
v .CSAD: Ix
V.CSCT: 'X
v .CMXI: Ix
v .CMXO: Ix
v .CTDH: Ix

.BLKW l
.BLKB l
.BLKB l
.BLKW l
.BLKB 1
.BLKB 1
.BLKW l
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1

;Overlay from here on
;Protocol descriptor vector address
;CCP'S current LON for this node
;Multipoint node designator
;Protocol-oriented status
;Status extension
;Node ID number for next node over
;Current UCB for this VCB
;Multipoint table link word
:Next multipoint node in chain
;Multipoint half duplex count of bytes
;Redundancy check keyword
;Address of (new) header block
;Address of current AST block
;Address of current data block
;Next header buffer address
;Receiver data count, bytes
;Receive buffer address, enter transparency
;Receive data count, enter T.
;Receive buffer address, exit T.
;Receive buffer count, exit T.
;Max record size accepted, bytes
;Max record size can transmit
;Transmit data packet list head

8-33

DATA A:REAS AND CONTROL BLOCKS

· v .CTDT: 'X

v .CSTQ: Ix
v .CLMT: Ix
v .CTMA: Ix
v .CLMR: Ix
v .CRMA: Ix

V.CMCT: 'X
v .CRPC: Ix
V.CRPL: 'X
v .CRTM: Ix
v .CREP: Ix
V.CBCC: 'X
V.CDCC: 'X
v .CURH: Ix
V.COLE: 'X
v .COVR: Ix
V.CRST: 'X
V.CALF: 'X
v .CREA: Ix

.BLKW 1
.BLKW 2
.BLKB 1
.BLKB 1
.BLKB 1
.BLKB 1
.BLKW 2
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1

1Transmit data packet list tail
1Start mode pre-transmission queue
1Last message number transmitted
;Last transmitted message ACKed
1Last message number received
;Last received message ACKed
;Count of messages sent
;Consecutive rep count
;Consecutive rep limit
1Rep timeout value, ticks
1Rep count accumulator
;Header block check error count
;Data block check error count
;Unrecognized header error count
;Data late error count
;Transmitter overrun count
;Number of starts or restarts
;Number of system buffer allocation failures
;Contains NAK reason
;Unused

V.CTPN: 'X

.IF DF C$$ACU
.BLKB 12. ;Telephone number, this unit (ASCII)
.ENDC

V.CLEN: 'X

.BLKW 1

.PSECT
VS.SEL='Y
VS.FIN=-'Y
VS.REP•'Y
VS.RTR•'Y
VS.STK•'Y
VS.STR:a'Y
VS.ACKm'Y
VS.NAK•'Y
VS.MPT•'Y
VS.DIS='Y
VS.CTL='Y
VS.DAT•'Y
VS.SYN•'Y
VS.POL='Y
VS.ONL•'Y
VS.BOO='Y
VS.TRN='Y

8.4.4

;Communications VCB length

;Set if select other unit
;Set if final transmission
;Unit in REP mode
;Transmitter in retry mode
;Set if start ACK expected
;Start mode if set
;Set if should send ACK
;Set if should send NAK
;Set if link is multipoint
: (V.CSTl) Set link in dismount mode
;Set if have mastership, multipoint
;Set if data message
;Set if sync train required
;Poll next multipoint if set
;Related node is active
4
;Marked as boot channel
2
;Marked as DDCMP-only channel
1
.MACRO CVCDF$ A,B
.ENDM
.ENDM

100000
40000
20000
10000
4000
2000
1000
400
200
200
100
40
20
10

Device Control Block (DCB)

Defined by:

.MACRO DCBDF$,L,B

The Device Control Block (I>CB) describes the static characteristics
(rather than execution-time! information) of both the device controller
and the units attached to the controller. Most of the data in the DCB
is established in the assembly source for the I/O driver data
structure. The DCB is used by the QIO directive processing code in
the Executive, ~ather than by the driver. All the DCBs in a system
form a forward-linked list,. with the last DCB having a link of O. The
link word is D.LNK.

8-34

DATA AREAS AND CONTROL BLOCKS
At least one DCB exists for each type of device appearing in a system
(device type should not be equated with device-unit). Therefore, a
DCB has the device name in it1 for example, the DCB for DKO:
has
".ASCII /DK/" in it. In general, there is only one DCB containing the
name of a given device. However, in the case of the terminal driver,
a separate DCB exists for every kind of terminal device controller in
the system (DL, DJ, DH, and DZ), and each DCB contains ".ASCII /TT/".
For example, if there are terminals in a system, then there is at
least one controller and one DCB containing the device name "TT".
If
some of the terminals were interfaced via DLll-As and the rest via a
DHll, then there would be two DCBs1
one for all DLll-A-interfaced
terminals, and one for all DHll-interfaced terminals. They both would
contain the device name, "TT" •
• ASECT
.=O
D.LNK:'L'

.BLKW 1

D.UCB:'L'

.BLKW 1

D.NAM: 'L'

.BLKW 1

D.UNIT:'L'

.BLKB 1
• BLKB 1

D.UCBL:'L'

.BLKW 1

D.DSP:'l'

• BLKW 1

D.MSK:'l'

.BLKW 1
• BLKW 1
• BLKW 1
• BLKW 1
• BLKW 1
• BLKW 1
• BLKW 1
• BLKW 1

1Link to next DCB. A O in this field indicates the last (or only) DCB in the chain.
The driver links its DCB into the system
DCBs via the global label $USRTB on its
first DCB.
1Pointer to first Unit Control Block. All
UCBs, for a given DCB, are in contiguous
memory locations and must all be the same
length.
1Generic device name in ASCII by which
device units are referenced mnemonically.
1Lowest unit number covered by this DCB.
1Highest unit number covered by this DCB •
These two bytes represent the range of
logical units available to the user for
assignment. Typically, the lowest number is
0 and the highest is n-1, where n is the
number of device-units described by the DCB.
1Length of each unit control block in
bytes. The UCB can have any length to meet
the needs of the driver for variable
storage. However, all UCBs for a given DCB
must have the same length. The specified
length must include prefix words (U.LUIC and
U.OWN) if present.
1Pointer to driver dispatch table •
When the Executive must enter the driver
at any of the four entry points contained
in the driver dispatch table, it accesses
D.DSP, locates the address in the table, and
calls the driver at that address. A O
table address indicates that the (loadable)
driver is not in memory. If a driver does
not process a given function, it supplies a
return address. For more details see the
RSX-llM Guide to Writing an I/O Driver.
1Legal function mask codes 6-15.
1Control function mask codes 0-15 •
7NOP'ed function mask codes 0-15 •
1ACP function mask codes 0-15 •
1Legal function mask codes 16.-31 •
1Control function mask codes 16.-31 •
7NOP 1 ed function mask codes 16.-31 •
1ACP function mask codes 16.-31 •
The Executive uses these words to validate
and dispatch the I/O request specified
by a QIO directive.
8-35

DATA AREAS AND CONTROL BLOCKS
D.PCB: 'LI

8.4.4.1

.BLKW 1

Driver Dispatch Table Offsets

D.VINI•'B'O
D.VCAN='B'2
D.VOUT•'B'4
D.VPWF•'B'6

8.4.5

7Address of the driver's Partition Control
Block (PCB). This word is present in
the DCB only if the loadable-driver
SYSGEN option has been selected. It must
be initialized to O. The DCB can be
extended by adding words after D.PCB.
A PCB exists for every partition in a
system. MCR creates a PCB when the SET
/MAIN or SET /SUB commands are given. If a
driver is loadable, its PCB describes the
partition in which it resides.
The Executive uses D.PCB together with
D.DSP (the address of the driver dispatch
table) to determine whether a driver is
loadable or resident, and, if loadable,
whether or not it is in memory. For more
details see the RSX-llM Guide to Writing an
I/O Driver.

1Device initiator
7Cancel current I/O function
7Device timeout
;Powerfail recovery

Error Message Block (EMS)

Defined by: .MACRO EMBDF$,L,B
The following error codes are defined:
EC.INI='B'40
EC.DVC='B'l
EC.DTO='B'l40
EC.NSI='B'l41
EC.LOA='B'4
EC.UNL•'B'lO
EC.MPE•'B'2
EC.PWR='B'42

8.4.5.1

7Device error bit set
7Device interrupt timeout
;Undefined interrupts
;Driver load
;Driver unload
;Memory parity error
7Power fail

Error Message Block Independent Offsets

.ASECT
.=O
E.SIZE: 'L'
E.CODE: 'L'
E .TIME: 'LI
E .SEQ: 'LI
E.ABM:'L'

.BLKW 1
.BLKB 1
.BLKB 1
.BLKB 6
.BLKW 1
.BLKW 1

;Size of the EMB in bytes
;Error code
;RE!served
;Time of error-s,m,h,d,m,y
7SE~quence number
;Saved I/O active bitmap

8-36

DATA AREAS AND CONTROL BLOCKS
8.4.5.2

Error Message Block - Undefined Interrupt Offsets

.•E.ABM+2
E.VCTR: 'L'
E .LOST: 'L'
E .OPS:' L'
E.OPC: 'L'

.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1

1ID of vector trapped through
1Number of lost undefined interrupts
70ld PS preinterrupt
10ld PC preinterrupt

8.4.5.3 Error Message Block Timeout Offsets
.•E.ABM+2
E.RTRY: 'LI
E. IOC: 'LI

E.TASK:'L'
E.PAR:'L'
E.UIC: 'L'
E .UCB:' LI
E. FCN: IL I
E.PRM:'L'
E .RCNT: 'LI
E. REGS= I BI •
E.LGTH='B'.

8.4.S.4

.BLKB 2
.BLKB 1
.BLKB 1
.BLKW 2
.BLKW 1
.BLKW l
.BLKW 1
.BLKB 2
.BLKW 1
.BLKW 6
.BLKB 1
.BLKB 1

Errors

and

Device

1Low byte=left, hi byte=start
1Task priority
1I/O in progress count
1Task name
1Partition address
1Task UIC
:Device UCB address
1QIO function code
1Buffer mapping
:Parameters 1-6
1Number of device registers
1Reserved

Error Message Block - Driver Load and Unload

.•E.TIME+<9.*2>
E • WHY : I L '
• BLKW 1
.•.+2
E .NAME: IL I
.BLKW 1

8.4.6

Device

1Action code (load/unload)
1Device name (ASCII)

File Control Block (FCB)

.=O
F.LINK:
F.FNUM:
F.FSEQ:
F.FSQN:
F.FOWN:
F.FPRO:
F.UCHA:
F.SCHA:
F.HDLB:
F .LBN:
F.SIZE:
F.NACS:
F.NLCK:
F.STAT:
F.NWAC:

.ASECT
.BLKW 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 2
.BLKW 2
.BLKW 2
.BLKB 1
.BLKB 1

.BLKB 1
.BLKB 1
FC.WAC=lOOOOO
FC.DIR=40000

;FCB chain pointer
;File number
;File sequence number
;Not used
1File segment number
;File owner's UIC
;File protection code
:User controlled charact~ristics
1System controlled characteristics
:File header logical block number
1LBN of virtual block 1 if contiguous
:O if non contiguous
:Size of file in blocks
;No. of accesses
;No. of locks
;FCB status word
:Number of write accessors
;Status bits for FCB consisting of
;Set if file accessed for write
;Set if FCB is in directory LRU

8-37

Interrupt

DATA AllEAS AND CONTROL BLOCKS
FC.CEF•20000
FC.FCO=lOOOO
F.DREF:
.BLKW 1
F .DRNM:
.BLKW 1
F.FEXT:
.BLKW 1
F.FVBN:
.BLKW 2
F.LKL:
.BLKW 1
F.LGTH:

8.4.6.l

Window

.ASECT
.=O
W.CTL:

.BLKW 1

WI.RDV•400.
WI. WRV•lOOO
WI.EXT•2000
WI.LCK•4000
WI.DLK=lOOOO
WI.EXL=40000
WI.BPS=lOOOOO
W.VBN:
.BLKB 1
W.WISZ:
.BLKB 1
.BLKW 1
W.FCB:
.BLKW 1
W.LKL:
.BLKW 1
W.RTRV:

8.4.6.2

L.VBl:
L.CNT:
L.LGTH:

8.4.7

1Low byte = # of map entries active
;High byte consists of the following bits
Read virtual block allowed if set
Write virtual block allowed if set
Extend allowed if set
Set if locked against shared access
Set if deaccess lock enabled
Set if manual unlock desired
; Bypass access interlock if set
;High byte of 1st VBN mapped by window
;Size in rtrv ptrs of window (7 bits)
;Low order word of 1st VBN mapped
;File control block address
;Pointer to list of users locked blocks
;Offset to 1st retrieval pointer in window

Locked Block List Node

.ASECT
.=O
L.LNK:
L. Wil:

1Set if directory EOF needs updating
;Set if trying to force directory contig
1 Dii~ectory EOF block number
7lst word of directory name
7Pointer to extension FCB
1Starting VBN of this file segment
;Pointer to locked block list for file
;Size in bytes of FCB

.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1

;Link to next node in list
;Pointer to window for first entry
; High order VBN byte
;Count for entry

Get Command Line Control Block (GCML)

Defined by: .MACRO GCML$D GBL
G.ERR = S.FDB
G.MODE
G.ERR+l
G.PSDS = G.ERR+2
G.CMLD = G.ERR+6
G.ISIZ
16.
G.DPRM = G.ERR+G.ISIZ
G.SIZE = G.DPRM+6+S.FNB

;Error return code byte
;Status and mode control byte
;Prompt string descriptor
;Command line descriptor
;Size of impure area (PTRS, FLAGS,
; COUNTS, etc.)
;Default prompt string
;Buffer size

8-38

DATA AREAS AND CONTROL BLOCKS
G.MODE BIT DEFINITIONS
GE.COM • l
GE.IND • 2
GE.CLO • 4
GE.LC • 10
GE.CON • 20
GE.SIZ • 40

;Comment recognition
;Indirect file recognition
;Close command file before return
;Pass lower case characters
1Continuation lines allowed
1Buffer size

G.ERR VALUES
GE.IOR • -1
GE.QPR • -2
GE.BIF • -3
GE.MOE • -4
GE.EOF • -10.
GE.RBG = -40.

8.4.8

1I/O error
:Unable to open indirect file
;Bad indirect file name
1Maximum indirect file depth exceeded
1End of file
;Buffer size error (overflow)

Hardware Definitions

Defined by: .MACRO HWDDF$,L,B

8.4.8.1

Hardware Register Addresses and Status Codes

MPCSR='B'l77746
MPAR•'B'l72100
PIRQ•'B'l77772
PRO•'B'O
PRl•'B'40
· PR4='B'200
PRS•'B'240
PR6='B'300
PR7='B'340
PS='B'l77776
SWR='B'l77570
TPS= •·a' 177564

8.4.8.2

Extended Arithmetic Element Registera

AC='B'l77302
MQ='B'l77304
SC='B'177310

8.4.8.3

;Address of PDP-11/70 memory parity register
;Address of first memory parity register
;Programmed interrupt request register
;Processor priority 0
;Processor priority 1
;Processor priority 4
;Processor priority 5
;Processor priority 6
;Processor priority 7
;Processor status word
;Console switch and display register
;Console terminal printer and status register

.IF OF E$$EAE
;Accumulator
;Multiplier-quotient
;Shift count
.ENDC

Memory Management Hardware Register and Status Codes

.IF DF M$$MGE
KDSARO='B'l72360
;Kernel D PAR 0
KDSDRO='B'l72320
;Kernel D PDR 0
KISARO='B'l72340
;Kernel I PAR 0
KISAR5='B'l72352
;Kernel I PAR 5
KISAR6='B'l72354
;Kernel I PAR 6
KISAR7='B'l72356
;Kernel I PAR 7
KISDRO='B'l72300
;Kernel I PDR 0
KISDR6='B'l72314
;Kernel I PDR 6

8-39

DATA AltEAS AND CONTROL BLOCKS

KISDR7•'B'l72316
SISDRO•'B'l72200
ODSAR0=-'B'l77660
ODSDRO•'B'l77620
OISARO•'B'l77640
OISAR4•'B'l77650
UISARS='B'l77652
UISAR6•'B'l77654
UISAR7•'B'l77656
UISDRO•'B'l77600
UISDR4•'B'l77610
UISDRS•'B'l77612
OISDR6•'B'l77614
OISDR7•'B'l77616

;Ke1~nel I PAR 7
;Supervisor I PDR 0
; 0St!r 0 PAR 0
;Usur 0 PDR 0
;Usc~r I PAR 0
;Uscer I PAR 4
;Uscu I PAR 5
; Usier I PAR 6
;Osier I PAR 7
;Osier I PDR 0
; Us•er I PDR 4
; Us•er I PDR 5
; Osier I PDR 6
; Us·er I PDR 7

UBMPR•'B'l70200
CMOOE•'B'l40000
PMOOE='B'30000
SRO•'B'177572
SR3•'B'l72516
.ENOC

;UNIBUS mapping register O
;Current mode field of PS word
;Previous mode field of PS word
;Segment status register 0
;Segment status register 3

8.4.8.4

Feature Symbol Definitions

FE.EXT='B'l
FE.MUP='B'2
FE.EXV=='B'4
FE.ORV='B'lO
FE.PLA•'B'20
FE.CAL='B'40
FE.PKT=='B'lOO
FE.EXP=='B'200
FE.LSI='B'400
FE.CEX='B'20000
FE.MXT='B'40000
FE.NLG='B'lOOOOO
.ENOM
.ENOM

8.4.9

;11/70 extended memory support
;Multi-user protection support
;Executive is supported to 20K
;Loadable driver support
;PLAS support
;Dynamic checkpoint space allocation
;Preallocation of I/O packets
;Extend Task directive supported
;Processor is an tsI-11
;COM exec is loaded
;MCR exit after each command mode
;Logins disabled - multi-user support

Interrupt Transfer Block (ITB)

Defined by: .MACRO ITBDF$ IJ,B,SYSDEF
.IF DF A$$TRP
.MCALL PKTDF$
PKTDF$
.ENDC
.ASECT
.=O
x .LNK: IL I
X.JSR:'L'
X.PSW: 'L'

x. ISR: IL I
x. FORK: IL I

;Define AST block offsets

.BLKW l
;Link word for ITB lists starting in TCB
JSR RS,@#0 ;Call $INTSC
.BLKB 1
;Low byte of PSW for ISR
.BLKB 1
;Unused
.BLKW l
;ISR entry point (APRS mapping)
;Fork block
;Thread word
.BLKW l
; Fink PC
.BLKW l
.BLKW l
;S.aved RS

8-40

DATA AREAS AND CONTROL BLOCKS

x .REL: IL I
X.OSI: 'L'
X.TCB: 'LI

X.AST: 1l1

x. VEC: IL I
x. VPC: IL I
x .LEN: IL I

.BLKW 1
;Saved R4
.IF OF M$$MGE
.BLKW 1
;Relocation base for APR5
.ENOC
.BLKW l
;Address of DIS.INT. routine
.BLKW l
;TCB address of owning task
.IF NB SYSDEF
.IF OF A$$TRP
.BLKW 1
;A.DQSR for AST block
.BLKB A.PRM ;AST block
.ENDC
.BLKW 1
.BLKW 1

;Vector address (if AST support,
; this is first and only AST parameter)
;Saved vector PC
;Length in bytes of ITB

.ENDC
.PSECT

8.4.10

Logical Assignment Control Block

Defined by: .MACRO LCBDF$,L,B
The logical assignment control block (LCB) associates a logical
name with a physical device-unit. LCBs are linked together to
form the logical assignments of a system. Assignments may be on
a system-wide or local (terminal) basis •
• ASECT
.=-0

L.LNK:'L'
.BLKW l
L.NAM:'L'
.BLKW l
L.UNIT: 'L'
.BLKB 1
L.TYPE:'L'
.BLKB 1
L.UCB:'L'
.BLKW 1
L.ASG:'L'
.BLKW 1
L.LGTH='B'.-L.LNK
.PSECT

8.4.11

;Link to next LCB
;Logical name of device
;Logical unit number
;Type of entry (O=system wide)
;TI UCB address
;Assignment UCB address
;Length of LCB

Partition Control Block (PCB)

Defined by: .MACRO PCBDF$ L,B,SYSDEF
.ASECT
.=O
p .LNK: 'LI

.BLKW 1

P. PRI: 'L'
P.IOC: 'L'
p .NAM: IL I

.BLKB 1
.BLKB 1
.BLKW 2

;Link to next PCB. The PCBs are linked in
physical address order, highest to lowest.
If a main partition has subpartitions, they
are linked in the PCB chain off the main
partition in highest to lowest address
order. The last subpartition of a main
partition either ends the PCB chain or
links to the next main partition. A main
partition with no subpartition either links
to the next main partition or ends the
chain.
;Priority of partition
;I/O + I/O status block count
;Partition name in RAD50

8-41

DATA AREAS AND CONTROL BLOCKS
P.SUB: 'L'
p .MAIN: IL I

P.HDR: 'L'
p .REL: IL I

.BLKW 1

JPointer to next subpartition. Structured and
used similarly to P.LNK when manipulating a
chain of subpartition PCBs •
• BLKW 1
;Pointer to main partition. The backpointer
from a subpartition to its parent main partition •
• IF NB SYSDEF
.IF NDF M$$MGE
;Pointer to task header (unmapped system)
.ENDC
.IFTF
;Starting physical address of the partition •
• BLKW 1
The partition base relocation bias. In a
mapped system, P.REL is the bias; in an unmapped system, P.REL is the actual partition address.

P.BLKS: 'L'
P.SIZE: 'L'
p .WAIT: 'LI

.BLKW 1
.BLKW 2

P.SWSZ:'L'

.BLKW 1

p .BUSY: IL I

.BLKB 2

p .OWN: IL I
p .TCB: IL I

.BLKW 1

P.STAT: 'L'
P.HDR:'L'
P.PRO: 'LI

p .ATT: 'LI

;Size of partition in bytes
;Partition wait queue listhead (2 words). A
pointer to a list of tasks awaiting the use
of the partition. The list is ordered by
priority and is searched to determine which
task should be in control of the partition.
;Partition swap size (system-controlled
partitions only)
;Partition busy flags. The first byte, the
busy status, is the inclusive OR of the
state for the main partition and all its
subpartitions. The second byte, the busy
mask, contains a busy (1) or not busy (0)
setting for the main partition and its
seven subpartitions.
;TCB address of the task that owns the partition (owner task).
;Partition status flags

.BLKW 1
.IFT
.IF OF M$$MGE
.BLKW 1
;Pointer to task header (mapped system)
.ENDC
.BLKW 1
.BLKW 2

;Protection word [DEWR,DEWR,DEWR,DEWR]
;Attachment descriptor listhead

• IF NDF P$$LA.S
P.LGTH='B'P.PRO
;Le·ngth of partition control block
.IFF
P.LGTH='B'.
;Length of partition control block
.ENDC
.!FF
.PSECT

8.4.11.1

Partition Status Word Bit Definitions

PS.OUT='B'lOOOOO
PS.CKP='B'40000
PS.CKR='B'20000
PS.CHK='B'lOOOO
PS.FXD='B'4000
PS.PER='B'2000
PS.LIO='B'lOOO

;Partition is out of memory (l=yes)
;Partition checkpoint in progress (!=yes)
;Partition checkpoint is requested
; (!=yes)
;Partition is not checkpointable (!=yes)
;Partition is fixed (!=yes)
;Parity error in partition (!=yes)
;Marked by shuffler for long I/O (!=yes)

8-42

DATA AREAS AND CONTROL BLOCKS
PS.NSF•'B'400
PS.COM•'B'200
PS.PIC•'B'lOO

;Partition is not shuffleable (l•yes)
;Library or common block (!•yes)
;Position independent library or common
1 (l•yes)
;System controlled partition (!•yes)
1Driver is loaded in partition (l•yes)
;Partition should be deleted when not
1 attached (!•yes)
;Starting APR number mask

PS.SYS•'B'40
PS.DRV•'B'20
PS.DEL='B'lO
PS.APR•'B'7

8.4.11.2

Attachment Descriptor Offsets

.ASECT
.=O
A.PCBL: IL I
A.PRI: IL I
A. IOC: IL I
A.TCB: 'LI
A.TCBL: 'LI
A.STAT:'L'
A.MPCT: 'LI
A.PCB: IL I
A.LGTH•'B'.

8.4.11.3

.BLKW 1

1PCB attachment queue thread word
;Priority of attached task
1I/O count through this descriptor
;TCB address of attached task
;TCB attachment queue thread word
;Status byte
;Mapping count of task thru this
; descriptor
;PCB address of attached task
;Length of attachment descriptor

Attachment Descriptor Status Byte Bit Definitions

.PSECT
AS.DEL•'B'lO
AS.EXT•'B'4
AS.WRT='B'2
AS.RED='B'l

8.4.12

.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1

;Task has delete access (l=yes)
;Task has extend access (l=yes)
;Task has write access (l=yes)
;Task has read access (l=yes)
.ENDC

Region Definition Block (ROB)

Defined by: .MACRO RDBDF$ GBL
.MCALL .BLKW.,.BLK •
• BLK.
.BLKW. l,R.GID,GBL ;Region ID
.BLKW. l,R.GSIZ,GBL ;Size of region (32W blocks)
.BLKW. 2,R.GNAM,GBL ;Name of region (RADSO)
.BLKW. 2,R.GPAR,GBL ;Region's main partition name (RADSO)
.BLKW. l,R.GSTS,GBL ;Region status word
.BLKW. l,R.GPRO,GBL ;Protection code of region
.BLKW. O,R.GLGH,GBL ;Length of region definition block

8.4.12.l

Region Status word Symbols

.IF ION <DEF$G>,<GBL>
.GLOBL RS.CRR,RS.UNM,RS.MDL,RS.NDL,RS.ATT,RS.NEX
.GLOBL RS.DEL,RS.EXT,RS.WRT,RS.RED
.ENDC

8-43

DATA AFtEAS AND CONTROL BLOCKS
RS.CRR•AO<lOOOOO>
RS.UNM•A0<40000>
RS.MDL•""0<200>
RS.NDL•"'O<lOO>
RS.ATT•"'0<40>
RS.NEX="'0<20>
RS.DEL•""O<lO>
RS.EXT•""0<4>
RS.WRT•""0<2>
RS.RED•"'O<l>

8.4.13

;Region was successfully created
10ne or more windows were unmapped on a
; dE~tach
;Mark region for delete on last detach
;Created region is not to be marked for
; dE~tach
;Attach to created region
1 CrE!ated region is not extendable
;Delete access desired on attach
;Extend access desired on attach
;Write access desired on attach
;Read access desired on attach

Status Control Block (SCB)

Defined by:

.MACRO SCBDF$,1~,B,SYSDEF

The SCB defines the status 1Jf a device controller. The SCB is pointed
to by Unit Control Blocks (UCBs). One SCB exists for each device
controller in the system. This is true even if the controller handles
more than one device-unit (as in the case of the RKll Controller).
However, line multiplexers :3uch as the DHll and DJll are considered to
have one controller for each line because all lines may transfer in
parallel. As an example, where a group of terminals may be connected
to two controllers, a DLll·-A and a DHll, each terminal interfaced via
the DLll-A would have a SCB because each DLll-A is an independent
interface unit. The terminals interfaced via the DHll would also each
have an SCB because the DHll is a single controller but multiplexes
many units in parallel.
Most of the information in the SCB is dynamic, and is used by both the
Executive and the driver •
• ASECT
.=177772
S .RCNT: 'L'
S .ROFF: 'L'
S .BMSV: 'L'

.BLKB 1
.BLKB 1
.BLKW 1

S .BMSK: 'L'
s. LHD: 'LI

.BLKW 1
.BLKW 2

S. PRI: 'L'
S. VCT: 'L'

.BLKB l
.BLKB 1

S. CM:' L'

.BLKB 1

;Number of registers to copy on error
;Offset to first device register
;Saved I/O active bitmap and pointer to
the EMB
;Device I/O active bit mask
;Controller I/O queue listhead. The first
word points to the first I/O packet in the
queue and the second word points to the
last I/O packet in the queue. If the queue
is empty, the first word is 0 and the
second word points to the first word.
;Priority at which the device interrupts.
;Interrupt vector address divided by 4.
For loadable drivers, the MCR/VMR LOA[D]
function uses this field and the existence
of driver symbol(s) $xxINT, $xxINP, and
$xxOUT to initialize the device interrupt
vector.
;Current timeout count. RSX-llM supports
device timeout, which enables a driver to
limit the time that elapses between the
issuing of an I/O operation and its
termination. The current timeout count (in
seconds) is initialized by moving S.ITM
(initial timeout count) into S.CTM. The
Executive clock routines (in TOSCH) examine

8-44

DATA AREAS AND CONTROL BLOCKS

S.ITM: 'L'
s .CON: 'LI

.BLKB 1
.BLKB l

s .STS: IL I

• BLKB 1

S.CSR: 'L'

.BLKW l

s .PKT: IL

.BLKW l

s. FRK: IL I

the time, decrement it and, if it reaches O,
call the driver at its device
timeout entry point.
The internal clock count is kept in
1-second increments. Thus, a time count of
1 is not precise because the internal
clocking mechanism is operating asynchronously with driver execution. The minimum
meaningful clock interval is 2 if you
intend to treat timeout as a consistently
detectable error condition. Note, if the
count is O, that no timeout occurs1 a 0
value is, in fact, an indication that
timeout is not operative. The maximum
count is 255. You are responsible for
setting this field. Resetting occurs at
actual timeout or within $FORK.
1Initial timeout value
;Controller index. This is the controller
number multiplied by 2. Drivers that are
written to support more than one controller
use this byte. S.CON may be used by the
drfver to index into a controller table
that the driver creates and maintains
internally. Indexing the controller table
enables the driver to service the correct
controller when a device causes an
interrupt.
;Controller status (O=idle, l=busy) •
This is the interlock for marking a driver
as busy for a specific controller. It is
tested and set by $GTPKT and reset by

$IODON.

.BLKW 1
.BLKW l
.BLKW 1
.BLKW 1

;Address of the control status register
for the device controller. The driver uses
S.CSR to initiate I/O operations and to
access, by indexing, other registers related to the device that are located in
the I/O page. This address need not be a
CSR. It may only be a member of the
device's register set. It is accessed at
system bootstrap time to determine if the
interface exists on the system hosting the
Executive. The Executive uses S.CSR to set
the offline bit at bootstrap so that system
software can be interchanged between systems
without an intervening system generation.
Otherwise, it is only accessed by the driver
itself.
1Address of current I/O packet established by
$GTPKT. This field is used to retrieve the
I/O packet address upon the completion of
an I/O request. S.PKT is not zeroed after
the packet is completed.
;Fork block link word
;Fork-PC
;Fork-RS
; Fork-R4
The four words starting at S.FRK are used
for fork block storage when the driver establishes itself as a fork process. Fork
block storage preserves the state of the
driver, which is restored when the driver
regains control at fork level. This area
is used when the driver calls $FORK.
8-45

DATA A:REAS AND CONTROL BLOCKS

The fork block is 5 words long instead of 4 if two conditions are met:
1. Loadable drivers have been selected as
a SYSGEN option
2. The system is a mapped system
If these conditions are met, and the fork
block is 5 words long, you must not use
the fork block for any other purpose. In
other words, your driver may not share the
space reserved for the fork block. If it is
shared, the loadable driver's relocation
base will be destroyed. In addition, the
5-word fork block should always be part of
the SCB if the two conditions listed above
a.re met •
• IF NB SYSDEF
.IF OF L$$DRV & M$$MGE
.BLKW 1
1Fork driver relocation base
.ENDC
S.CCB: 'LI
S .MPR: 'L'

.BLKW 6

1Mixed MASSBUS channel control block
;11/70 extended memory UNIBUS device
C-block. Drivers use the 6 words starting
at S.MPR for non-processor request (NPR)
devices attached to a PDP-11/70 with 22-bit
addressing •

• IFF
.PSECT

8.4.13.1

Status Control Bl•ock Priority Byte Condition Code Status Bit Definition

SP.EIP•'B'l
SP.ENB•'B'2
SP.LOG•'B'4
SPARE=lO

8 .4 .13 .2

;Error in progress (l=yes)
1Error logging enabled [O=yes)
;Error logging available (l=yes)
;Spiue bit

Mapping Assignmen1t Block (for UNIBUS Mapping Register Assignment)

.ASECT
.=O
M.LNK: IL I
M.UMRA: 'L'
M.UMRN: 'L'
M.UMVL: 'L'
M.UMVH: 'LI
M. BFVH: IL I
M.BFVL: 'LI
M.LGTH•'B'.

.BLKW l
.BLKW l
.BLKW l
.BLKW 1
.BLKB l
.BLKB l
.BLKW 1

;Link word
;Address of first assigned UMR
;Number of UMR's assigned * 4
;Low 16 bits mapped by 1st assigned UMR
;High 2 bits mapped in bits 4 and 5
1High 6 bits of physical buffer address
;Low 16 bits of physical buffer address
;Length of mapping assignment block

.ENDC
.PSECT

8.4.14

Snap Block

Defined by: .MACRO SNPDF$ GBL
• IF ION <GBL>, <DJ~F$G>
.GLOBL SB.CTL,SB.DEV,SJ3.UNT,SB.EFN,SB.ID,SB.LM1,SB.PMD
.GLOBL SC.HDR,SC.LUN,SC.OVL,SC.STK,SC.WRD,SC.BYT
.ENDC

8-46

DATA AREAS AND CONTROL BLOCKS
SB.CTL •
SB.DEV •
SB.ONT •
SB.EFN •
SB.ID •
SB.LMl •
SB.PMD •
SC.HOR •
SC.LUN •
SC.OVL •
SC.STK •
SC.WRD •
SC.BYT •

8.4.15

0
2
4

6
""0<10>
""0<12>
""0<32>
1
2
4
""0<10>
""0<20>
"'0<40>

;Control word
;Device name
;Device unit number
;Event flag number
;Snapshot identification word
;First word of address limits
1 • RADSO /PMD ••• /
1Dump task header (including registers)
1Dump assigned LUN information
;Dump overlay structure information
;Dump task stack
;Send output in word/RADSO format
;Send output in byte/ASCII format

Task Abort Codes

Defined by: .MACRO ABODF$,L,B
NOTE: S.COAD-S.CFLT are also SST vector offsets
S.COAD•'B'O.
S.CSGF='B'2.
S.CBPT•'B'4.
S.CIOT='B'6.
S.CILI•'B'8.
S.CEMT='B'lO.
S.CTRP='B'l2.
S.CFLT•'B'l4.
S.CSST•'B'l6.
S.CAST•'B'l8.
S.CABO•'B'20.
S.CLRF•'B'22.
S.CCRF•'B'24.
S.IOMG='B'26.
S.PRTY•'B'28 •

;Odd address and traps to 4
;Segment fault
;Break point or trace trap
;IOT instruction
;Illegal or reserved instruction
;Non RSX EMT instruction
;TRAP instruction
;11/40 floating point exception
;SST abort - bad stack
;AST abort - bad stack
;ABORT via directive
;Task load request failure
;Task checkpoint read failure
;Task exit with outstanding I/O
;Task memory parity error
• ENDM

8.4.16

Task Control Block (TCB) And Status Definitions

Defined by: .MACRO TCBDF$,L,B,SYSDEF
T .LNK: IL I
T .PRI: IL I
T. IOC: IL I

T.CPCB: 'LI
T.NAM: 'LI
T.RCVL: 'L'
T.ASTL: 'LI
T.EFLG: 'L'
T.UCB: IL I
T.TCBL: 'LI
T.STAT: 'L'
T.ST2:'L'
T.ST3:'L'
T .DPRI: f LI
T.LBN: IL I
T .LDV: IL I
T.PCB: 'LI

.BLKW 1
.BLKB l
.BLKB l
.BLKW 1
.BLKW 2
.BLKW 2
.BLKW 2
.BLKW 2
.BLKW 1
.BLKW l
.BLKW l
.BLKW l
.BLKW 1
.BLKB l
.BLKB 3
.BLKW l
.BLKW 1

;Utility link word
;Task priority
;I/O pending count
;Pointer to checkpoint PCB
;Task name in RAD50
;Receive queue listhead
;AST queue listhead
;Task local event flags 1-32
;UCB address for pseudo device 'TI'
;Task list thread word
;First status word (blocking bits)
;Second status word (state bits)
;Third status word (attribute bits)
;Task's default priority
;LBN of task load image
;UCB address of load device
;PCB address of task partition

8-47

DATA AltEAS AND CONTROL BLOCKS

T.MXSZ:'L'
T.ACTL: 'LI

.BLKW 1
.BLKW 1

;Ma~imum size of task image (mapped only)
;Address of next task in active list

;START OF PLAS AREA
T.ATT: 'L'
T.OFF: 'L'

;Attachment descriptor listhead
;Offset to task image in partition
; Re~1erved
;SREF with EFN count in all receive
T.SRCT: 'L'
; queues
T.RRFL: 8 L'
.BLKW 2
;Receive by reference listhead
.IF NB SYSOEF
.IF NOF P$$LAS:
T.LGTH•'B'T.ATT
.IFF
;Length of task control block
T.LGTH•'B'.
.ENOC
T.EXT='B'O
;Length of TCB extension

8.4.16.l

.BLKW 2
.BLKW 1
.BLKB l
.BLKB l

Task Status Definitions

First Status word (Blocking Bits)
TS.EXE•'B'lOOOOO
TS.RON=-'B'40000
TS.MSG='B'20000
TS.NRP='B'lOOOO
TS.RUN='B'4000
TS.OUT•'B'400
TS.CKP•'B'200
TS.CKR•'B'lOO

;Task not in execution (l=yes)
;I/O rundown in progress (l=yes)
;ABORT message being displayed (l=yes)
;Task mapped to nonresident partition
(l=yes)
;Task is running on another processor
(layes)
;Task is out of memory (l•yes)
;Task is being checkpointed (l=yes)
;Task checkpoint requested (l=yes)

Task Blocking Status Mask
TS.BLK='B'TS.CKP!TS.CKR!TS.EXE!TS.MSG!TS.NRP1TS.OUT!TS.RDN
Second Status Word (State Bits)
T2.AST•'B'l00000
T2.0ST='B'40000
T2.CHK='B'20000
T2.CKD•'B'l0000
T2.BFX='B'4000
T2.FXD•'B'2000
T2.TIO•'B'l000
T2.CAF='B'400
T2.HLT•'B'200
T2.ABO='B'l00
T2.STP•'B'40
T2.STP='B'20
T2.SPN='B'l0
T2.SPN='B'4
T2.WFR='B'2
T2.WFR•'B'l

;AST in progress (l=yes)
;AST recognition disabled (l=yes)
;Task not checkpointable (l=yes)
;Checkpointing disabled (l=yes)
;Task being fixed in memory (l=yes)
;Task fixed in memory (l=yes)
;Task is engaged in terminal I/O
;DYN checkpoint space allocation failure
;Task is being halted (l=yes)
;Task marked for ABORT (l=yes)
;Task stopped (l=yes)
;Task stopped (l=yes)
;Saved TS.SPN on AST in progress
;Task suspended (l=yes)
;Saved TS.WFR on AST in progress
;Task in Wait For state (l=yes)

8-48

DATA AREAS AND CONTROL BLOCKS
Third Status word (Attribute Bits)
T3.ACP•'B'l00000
T3.PMD•'B'40000
T3.REM•'B'20000
T3.PRV•'B'l0000
T3.MCR•'B'4000
T3.SLV•'B'2000
T3.CLI•'B'l000
T3.RST•'B'400
T3.NSD•'B'200
T3.CAL•'B'l00
T3.ROV•'B'40
T3.NET•'B'20

8.4.17

1Ancillary control processor (l•yes)
:Dump task on synchronous abort (O•yes)
:Remove task on exit (l•yes)
1Task is privileged (l•yes)
;Task requested as external MCR function
(l•yes)
. ;Task is a slave task (l•yes)
:Task is a command line interpreter
(l=yes)
:Task is restricted (l•yes)
7Task does not allow send data
;Task has checkpoint space in task image
;Task has resident overlays
;Network protocol level

Task Header

Defined by: .MACRO HDRDF$,L,B
.ASECT
.•O
H.CSP: 'L'
H.HDLN: 'LI
H.EFLM: 'L'
H.CUIC: 'L'
H.DUIC: 'L'
H.IPS: 'L'
H.IPC: 'L'
H. ISP: 'LI
H.ODVA: 'L'
H.ODVL: 'L'
H.TKVA: 'L'
H.TKVL: 'L'
H.PFVA: 'L'
H.FPVA: 'L'
H.RCVA: 'L'
H.EFSV: 'L'
H.FPSA: 'L'
H.DSW: 'LI
H.FCS: 'L'
H.FORT: 'LI
H.OVLY: 'L'
H. VEXT: 'L'
H .SPRI: 'L'
H.NML: 'L'
H.RRVA: 'L'

.BLKW 1
.BLKW 1
.BLKW 2
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1

H.GARD:' L'
H.NLUN: 'L'
H.LUN: 'L'

.BLKW 3
.BLKW 1
.BLKW 1
.BLKW 2

H .WND: 'L'

8.4.17.l

.=O
W. BPCB: 'L'
W.BLVR: 'L'

:Current stack pointer
;Header length in bytes
1Event flag mask word and address
;Current task UIC
;Default task UIC
;Initial processor status word (PS)
;Initial p.rogram counter (PC)
;Initial stack pointer (SP)
;ODT SST vector address
;ODT SST vector length
;Task SST vector address
1Task SST vector length
;Power fail AST control block address
:Floating point AST control block address
;Receive AST control block address
:Event flag address save address
;Pointer to floating point/EAE save area
;Pointer to number of window blocks
;Task directive status word
;FCS impure pointer
;FORTRAN impure pointer
:Overlay impure pointer
;Work area extension vector pointer
;Priority difference for swapping
;Network mailbox LUN
:Receive by reference AST control block
; address
:Reserved words
;Pointer to header guard word
;Number of LUNs
;Start of logical unit table

Window Block Offsets
.BLKW 1
.BLKW l

;Partition control block address
;Low virtual address limit

8-49

DATA AJtEAS AND CONTROL BLOCKS
W.BHVR:'L'
.W.BATT: 'L'
W.BSIZ:'L'
w. BOFF: 'LI
W.BFPD: 'L'
W.BNPD: 'LI
W.BLPD: 'L'
W.BLGH: 'L'

8.4.18

.BLKW 1
.BLKW. 1
.BLKW l
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1

1High virtual address limit
1Address of attachment descriptor
1Size of window in 32W blocks
1Physical memory offset in 32W blocks
1First PDR address
1Ni.;1mber of PDRs to map
1Contents of last PDR
1Length of window descriptor

Task Image File Label Block

B.4.18.1

Resident Library Descriptor Offsets

Defined by: .MACRO LBLDF$ ,I. ,B
.ASECT
.•O
R$LNAM: 'L'
R$LSA: 'LI
R$LHGV: 'L'
R$LMXV: 'L'
R$LLDZ:'L'
R$LMXZ:'L'
R$LOFF: IL I

.BLKW 2
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW l
.BLKW 1
.BLKW 1

R$LWND: 'L'
R$LSEG: 'L'
R$LFLG: 'L'
R$LDAT: 'L'
R$LSIZ: 'LI

.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 3
.BLKW 0

B.4.18.2

.•O
L$BTSK: IL I

name
1Library starting virtual address
:Library address window 0 bound
1Library high virtual address limit
1Library load size (32W blocks)
1Library max. size (32W blocks)
1Library offset into partition (32W
1 blocks)
1Number of library address windows
1Size of library segment descriptors
1Library flags word
:Library creation date (yr., mo., day)
1Length of library descriptor

Library List Entry Flags

LD$ACC•'B'l00000
LD$RSV•'B'040000
LD$REL•'B'000004

B.4.18.3

1 RJ!~DIX-50. library

1 Ac:cess intent (l•RW, O•RO)
1APR reservation flag (l•APR reserved)
1PIC flag (!•position independant)

Label Block Offsets
.BLKW 2

1 RJ~DIX

SO task name
NOTE

Label block parameters between
this
offset and the start of the task library
descriptors must be identical in format
and
content
to a resident library
descriptor entry.
L$BPAR:'L'
L$BSA:'L'
L$BHGV: 'L'
L$BMXV: 'L'

.BLKW 2
.BLKW l
.BLKW 1
.BLKW 1

RADIX SO partition name
pStarting address of task
:Window O virtual address limit
1Task high virtual address limit
J'

a-so

DATA AREAS AND CONTROL BLOCKS
L$BLDZ:'L'
L$BMXZ:'L'
L$BOFF: 'L'
L$BWNO: 'L'
L$BSEG: 'L'
L$BFLG: 'L'
L$BOAT: 'L'
L$BLIB: 'L'
L$BPRI:'L'
L$BXFR:'L'
L$BEXT: 'L'
L$BSGL: 'LI

.BLKW 1
;Task load size (32W blocks)
.BLKW 1
;Task max. size (32W blocks)
.BLKW 1
;Task offset into partition {32W blocks)
.BLKW 1
;Number of task windows (less libraries)
.BLKW 1
;Size of task segment descriptors (bytes)
.BLKW 1
;Task flags word
.BLKW 3
;Task creation date {yr., mo., day)
.BLKW <7.*<R$LSIZ/2>>+1 ;Resident library entries
.BLKW 1
;Task priority
.BLKW 1
;Task transfer address
.BLKW 1
;Task extend size (32W blocks)
.BLKW l
;Relative block number of segment length
; list
;Relative block number of task image
L$BHRB:'L'
.BLKW l
; header
;Number of blocks in label
L$BBLK: 'L'
.BLKW 1
;Number of logical units
L$BLUN: 'L'
.BLKW l
.BLKW <512.-.>/2
L$BASG:'L'
.BLKW 0
;Start of device assignment tables
TS$PIC•'B'l00000
;Task is PIC (l=yes)
TS$NHO='B'040000
;No header in task image {l=yes)
TS$ACP='B'020000
;Task is ancillary control processor (l•yes)
TS$PMD='B'Ol0000
;Generate post-mortem dump {l=yes)
;Task is slaveable (l=yes)
TS$SLV='B'004000
TS$NSD='B'002000
;No send to task is permitted (l=yes)
;Task uses new network protocol (l=yes)
TS$NET='B'001000
;Task is privileged (l=yes)
TS$PRV='B'000400
;Task built in compatibility mode (l=yes)
TS$CMP='B'000200
;Task is checkpointable (O=yes)
TS$CHK='B'000100
;Task has resident overlays (l=yes)
TS$RES='B'000040
.PSECT

8.4.19

Task Termination Notification Message Codes

Defined by: .MACRO ABODF$,L,B
;Device not ready
;Device select error
;Checkpoint write failure
;Card reader hardware error
;Dismount complete
;Link down (networks)
;Link up (networks)

T.NDNR='B'O
T.NDSE='B'2
T.NCWF='B'4
T.NCRE='B'6
T.NDMO='B'8.
T.NLDN='B'l2.
T.NLUP='B'l4.
.ENDM

8.4.20

Unit Control Block (UCB)

Defined by: .MACRO UCBDF$,L,B
One UCB exists for each device-unit attached to a system.
In other
words, one UCB exists for each device-unit of each DCB. The UCB
defines the status of an individual device-unit, and is the control
block that is pointed to by the first word of an assigned LUN. The
UCBs associated with a particular DCB are contiguous in memory, have
the same length, and are pointed to by the DCB. UCBs associated with
different DCBs may have different lengths but are of the same length
for a specific DCB.
Much of the information in the UCB is static, though a few dynamic
parameters exist.
From the UCB, however, it is possible to access
most of the other structures in the I/O data base. In this sense, the
8-51

DATA AREAS AND CONTROL BLOCKS
UCB gives access to a large amount of dynamic data. For example, the
redirect pointer, which reflects the results of an MCR Redirect
command, is updated dynamically.
As with the DCB, most of the UCB is established in the assembly
source:
however, its contents are used and modif~ed by both the
Executive and the driver, though modification of a given datum is
usually done by either the Executive or the driver, but not both.
Because the UCB is the key control in the I/O data structures, access
to other I/O control blocks usually occurs via links implanted in the
UCB.
.ASECT
.~177774

U.LUIC: 'L'

.BLKW 1

U.OWN: 'L'

.BLKW 1

U.DCB:' L'

.BLKW 1

U.RED:' L'

.BLKW 1

u .CTL: IL'

.BLKB l

u .STS: IL'
U. UNIT:' L'

.BLKB 1
.BLKB 1

U. ST2: 'L'

.BLKB 1

U.CWl: 'L'

.BLKW 1

U.CW2:'L'

.BLKW 1

;LOGIN UIC - for terminal UCBs on multi-user
systems only
;The UCB address of the owning terminal for
allocated devices - multi-user system5
O•nly
;Back pointer to corresponding DCB
A.ccess to other control blocks in the I/O
data structure usually occurs via the UCB.
;Pointer to redirect unit UCB. initially
points to U.DCB. This field is changed
a.s the result of the Redirect command.
A.fter the command is issued, this field
points to the UCB to which this device-unit
has been redirected. The redirect
chain ends when this field points to U.DCB
field in the UCB in which it resides.
;Control processing flags (set at assembly
time). U.CTL and the function mask words
in the DCB drive QIO directive processing.
Any inaccuracy in the bit setting of U.CTL
produces erroneous I/O processing. See the
BSX-llM Guide to Writing an I/O Driver for
more details.
;Device independent unit status
;Physical unit number of device. If the
controller for the device supports only one
unit, the unit number is always O.
;Unit status extension
;First device characteristics word
This is the first word in a cluster of
device characteristics information. U.CWl
and U.CW4 are device independent. U.CW2
and U.CW3 are device dependent. The four
characteristic words are retrieved from the
UCB and placed in the requestor's buffer
upon issuance of a GLUN$ Executive directive. It is the responsibility of the
driver writer to supply the contents of
these four words in the assembly source of
the driver's data structure. See the
RSX-llM Guide to Writing an I/O Driver.
;Sicond device characteristics word. This
word is specific to a given device driver
and, with an exception, is available for
working storage or constants. The exception is for block-structured devices.
In this case, U.CW2 and U.CW3 may not be
used for working storage. In drivers for
block-structured devices (disks and
8-52

DATA AREAS AND CONTROL BLOCKS

U.CW3:'L'
U.CW4:'L'
U.SCB:'L'

.BLKW 1
.BLKW 1
.BLKW 1

U.ATT:'L'

.BLKW 1

U.BUF:'L'

.BLKW 1
• BLKW 1

U.CNT:'L'

.BLKW 1

U.VCB='B'U.CNT+4
U.CBF='B'U.CNT+2
U.UIC='B'U.CNT+<9.*2>
.PSECT

8.4.20.1

DECtape), these two words must be
initialized to a double-precision number
giving the total number of blocks on the
device. Place the high-order bits in the
low-order byte of U.CW2 and the low-order
bits in U.CW3.
1Third device characteristics word
;Fourth device characteristics word
1Pointer to SCB for this UCB. In general, R4
contains the value in this word upon entry
to the driver via the driver dispatch table
because service routines frequently ref erence the sea.
;Address of the TCB of the task attached to
to the unit.
;Relocation bias of current I/O request.
;Buffer address of current I/O request •
U.BUF labels two consecutive words that
serve as a communication region between
$GTPKT and the driver. If a non-transfer
function is indicated (in D.MSK), U.BUF,
U.BUF+2, and U.CNT receive the first three
parameter words from the I/O packet.
For transfer operations, the format of
these two words depends upon the setting of
UC.NPR in U.CTL. The driver does not format
the words; all formatting is completed before the driver receives control. For unmapped systems, the first word is O and
the second word is the physical address of
the buffer, For mapped systems, the UC.NPR
bit determines the format. UC.NPR is set
for an NPR device and reset for a program-tr ans fer device.
For more information, see the RSX-llM
Guide to Writin an I O Driver.
;Byte count o current I O request
Contains the byte count of the buffer
described by U.BUF. The driver uses this
field to construct the device address.
U.BUF and U.CNT keep track of the current
data item in the buffer for the current
transfer (except for NPR transfers). Because this field is being altered dynamically, the I/O packet may be needed to
reissue an I/O operation; for instance,
after a powerfail or error retry.
;Address of volume control block
;Control buffer relocation and address
;Terminal UIC (terminals only)

Device Table Status Definitions

Device Characteristics Word 1 (U.CWl) Device Type Definition Bits
DV.REC='B'l
DV.CCL='B'2
DV.TTY='B'4
DV.DIR='B'lO
DV.SDI='B'20
DV.SQD='B'40

;Record oriented device (l=yes)
;Carriage control device (l=yes)
;Terminal device (l=yes)
;File structured device (l=yes)
;Single directory device (l=yes)
;Sequential device (l=yes)

8-53

DATA ~.REAS ARD CONTROL BLOCKS
DV.MXD•'B'lOO
DV.UMO•'B'200
DV.SWL•'B'lOOO
DV.ISP•'B'2000
DV.OSP•'B'4000
DV.PSE•'B'lOOOO
OV.COM='B'20000
DV.Fll•'B'40000
DV.MNT•'B'lOOOOO

1 Ml!.SSBUS

d·evice (l•yes)
1User mode diagnostics supported (l•yes)
1Unit software write locked (l•yes)
1Ir.iput spooled device (l•yes)
1Send output to spooled device (l•yes)
1Pseudo device (l•yes)
1Device is mountable as COM channel
, (l•yes)
1 DE!Vice is mountable as Fll device
, (l•yes)
70uvice is mountable (l•yes)

Terminal Dependent CharactE!ristics word 2 (U.CW2) Bit Definitions
U2.0Hl•'B'lOOOOO
U2.0Jl•'B'40000
U2.RMT•'B'20000
U2.L8S=-'B'l0000
U2.NEC•'B'4000
U2.CRT•'B'2000
U2.ESC•'B'l000
U2.LOG='B'400
U2.SLV•'B'200
U2.0Zl='B'l00
U2.HLO•'B'40
U2.AT.•'B'20
U2.PRV•'B'l0
U2.L3S•'B'4
U2.VT5•'B'2
U2.LWC•'B'l

7Unit is a multiplexer (l=yes)
,unit is a OJll (l•yes)
7Unit is remote (l•yes)
7Unit is LA180s (l•yes)
JOO not echo solicited input (l•yes)
7Unit is a CRT (l•yes)
7Unit generates escape sequences (l=yes)
;User logged on terminal (O•yes)
7Unit is a slave terminal (l•yes)
;Unit is a DZll (l=yes)
JTerminal is in hold screen mode (l=yes)
;MCR command AT. being processed (l•yes)
7Unit is a privileged terminal (l•yes)
;Unit is a LA30S terminal (l=yes)
;Unit is a VTOSB terminal (l=yes)
, L<)wer case to upper case conversion
; (l•yes)

RH11-RS03/RS04 Characteristics word 2 (U.CW2) Bit Definitions
U2.R04•'B'l00000

;Unit is a RS04 (l•yes)

RH11-TU16 Characteristics Word 2 (U.CW2) Bit Definitions
U2.7CH•'B'l0000

;Unit is a 7 channel drive (l=yes)

Unit Control Processing Flag Definitions
UC.ALGa'B'200
UC.NPR='B'lOO
UC.QUE='B'40

UC.PWF='B'20

;Byte alignment of data buffers is allowed
(O•yes)
Word alignemnt is allowed (l=yes)
;Device is an NPR device (l=yes)
This word determines the format of the
2-word address in U.BUF.
;Call driver before queuing (l=yes)
If set, the QIO directive processor calls
the driver prior to queing the I/O packet.
The disposition of the I/O packet is the
driver's responsibility. Typically, an I/O
packet is queued prior to a call to the
driver, which later retrieves it by a call
to $GTPKT.
;Call driver at powerfail always (l=yes)
If set, the driver is always called when
power is restored after a power failure
occurs. Typically, the driver is called on
power restoration only when an I/O operation is in progress.
8-54

DATA AREAS AND CONTROL BLOCKS
UC.ATT•'B'lO

UC.KIL•'B'4

UC.LGH•'B'3

;Call driver on ATTACH/DETACH (!•yes)
If this bit is set, the driver is called
when $GTPKT processes an Attach/Detach I/O
function. Typically, the driver does not
get control for Attach/Detach requests and
the Executive performs the entire function
without any assistance from the driver.
1Call driver at I/O kill always (l•yes)
If set, the driver is called on a Cancel
I/O request even if the specified unit is
not busy. Typically, the driver is called
on a Cancel I/O only if an I/O operation
is in progress.
;Transfer length mask bits
These two bits are used to check
whether the byte count specified
in an I/O request is a legal buffer
modulus. See Guide to Writing an
I/O Driver manual.

Unit Status (U.STS) Bit Defintions
This byte contains device-independent status information.
US.MNT, and US.FOR apply only to mountable devices.
US.BSY=='B'200
US.MNT='B'lOO
US.FOR•'B'40
US.MDM•'B'20

US.MOM,

;Unit is busy (l=yes)
;Unit is mounted (O=yes)
;Unit is mounted as foreign volume (l=yes)
;Unit is marked for dismount {l=yes)

Card Reader Dependent Unit Status Bit Definitions
US.ABO='B'l
US.MDE='B'2

;Unit is marked for abort if not ready
; (l=yes)
;Unit is in 029 translation mode (l=yes)

FILES-11 Dependent Unit Status Bits
US.WCK•'B'lO
US.SPU•'B'2

;Write check enabled (l=yes)
;Unit is spinning up (l=yes)

Terminal Dependent Unit Status Bit Definitions
US.DSB='B'lO
US.CRW='B'4
US.ECH='B'2
US.OUT•'B'l

;Unit is disabled (l=yes)
;Unit is waiting for carrier (l=yes)
;Unit has echo in progress (l=yes)
;Unit is expecting output interrupt
; (l=yes)

LPSll Dependent Unit Status Bit Definitions
US.FRK='B'2
US.SHR='B'l

;Fork in progress (l=yes1
;Shareable function in progress (O=yes)

8-55

DATA J\REAS AND CONTROL BLOCKS

ANSI Magtape Dependent Unit Status Bits
US.LAB•'B'4

;Unit has labeled tape on it (l•yes)

Unit Status Extension (U.ST2) Bit Definitions
US.OFL•'B'l
US.RED•'B'2
US.PUB•'B'4
US.UMD•'B'lO

8. 4. 21

;Unit offline (l=yes)
;Unit redirectable (O•yes)
;Unit is public device (l•yes)
;Unit attached for diagnostics (l•yes)

Volume Control Blo·ck (VCB)

.ASECT
• =-0

V.TRCT:
V.IFWI:
V.FCB:
V.IBLB:
V.IBSZ:

.BLKW 1
.BLKW 1
.BLKW 2
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKB 1

V.FMAX:
V.WISZ:
V.SBCL:
V.SBSZ:
V.SBLB:
V.FIEX:

.BLKB 1
.BLKW 1
.BLKB 1
.BLKB 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKW 1
.BLKB 1

V.VOWN:
V.VPRO:
V.VCHA:
V.FPRO:
V.VFSQ:
V.FRBK:

.BLKB 1
.BLKW 1
.BLKB 1

V.LRUC:
V.STAT:
VC.IFW= 1
VC.BMW= 2
V.FFNU:
V.LGTH:

8.4.22

.BLKB 1

;Transaction count
;Index file window
;File Control Block listhead
;Index bit map 1st LBN high byte
;Index bit map size in blocks
;Index bit map 1st LBN low bits
;Max no. of files on volume
;Dflt size of window in no. of rtrv ptrs
;Value is < 128.
;Storage bit map cluster factor
;Storage bit map size in blocks
;Storage bit map 1st LBN high byte
;Default file extend size
;Storage bit map 1st LBN low bits
;Volume owner's UIC
;Volume protection
;Volume characteristics
;Volume default file protection
;Volume file sequence number
;Number of free blocks on volume high
byte
;Count of available LRU slots in FCB list
;Number of free blocks on volume low bits
;Volume status byte, containing the
following:
Index file is write accessed
Storage bit map file is write accessed
;First free index file bit map block
;Size in bytes of VCB

Window Definition Block (WDB)

Defined by: .MACRO WDGDF$ GBL

8-56

DATA AREAS AND CONTROL BLOCKS
8.4.22.l
.MCALL
• BLK.
.BLKB.
.BLKB.
.BLKW.
.BLKW.
.BLKW.
.BLKW.
.BLKW.
.BLKW.
.BLKW.
.BLKW.

8.4.22.2

Window Definition Block Offsets
.BLKW.,.BLKB.,.BLK •
l,W.NID,GBL
l,W.NAPR,GBL
l,W.NBAS,GBL
l,W.NSIZ,GBL
l,W.NRID,GBL·
l,W.NOFF,GBL
l,W.NLEN,GBL
l,W.NSTS,GBL
l,W.NSRB,GBL
O,W.NLGH,GBL

;Window ID
;Base APR
;Virtual base address (bytes)
;Window size (32W blocks)
;Region ID
;Offse~ in partition (32W blocks)
;Length to map (32W blocks)
;Window status word
;Send/receive buffer virtual address (bytes)
;Length of window definition block

Window Status Word Symbols

.IF IDN <DEF$G>,<GBL>
.GLOBL WS.CRW,WS.UNM,WS.ELW,WS.RRF,WS.648
.GLOBL WS.MAP,WS.RCX,WS.DEL,WS.EXT,WS.WRT,WS.RED
.ENDC
WS.CRW=""O<lOOOOO>
WS.UNM="'0<40000>
WS.ELW="0<20000>
WS.RRF="'O<lOOOO>
WS.64B•"'o<400>
WS.MAP="0<200>
WS.RCX•"O<lOO>
WS.DEL="'O<lO>
WS.EXT•"'0<4>
WS .WRT="'0<2>
WS.RED•""O<l>

;Address window was successfully created
;One or more windows were unmapped in
;Create address window or map.
;One or more windows were eliminated in
;Create address window
;Reference was successfully received
;64 byte alignment allowed
;Map after create window or receive
by reference
;Exit if no references to receive
;Send with delete access
;Send with extend access
;Send with write access or map with
; write access
;Send with read access

8-57

CHAPTER 9

CROSS-REFERENCES

9.1

EXECUTIVE MODULE TO ROUTINE CROSS-REFERENCE

This cross-reference contains a listing of the executive modules
(driver tables not included) and the routines that they contain. The
routines are in alphabetical order as are the modules. A dollar sign
($) preceeds the label of global routines. All named labels are in
this cross-reference but some are the labels of data areas or fields.
Large and important local routines are in this cross-reference.
A
dollar sign ($) does not preceed these routines because they are not
global.
Module

Routines and Labels

BFCTL

Buffer control routines
$BLXIO - Move block of data
$GTBYT - Get next byte from user buff er
$GTCWD
Get next word from user control buff er
$GTWRD - Get next word from user buffer
$PTBYT - Put next byte in user buffer
$PTWRD - Put next word in user buffer

CORAL

Core buff er allocation routines
$ALCLK - Allocate clock queue core block
$ALOC1 - Allocate core buffer (alternate entry)
$ALOCB - Allocate core buffer
$ALPKT - Allocate SEND or I/O REQUEST core block
$DEAC1 - Deallocate core buffer (alternate entry)
$DEACB - Deallocate core buff er
$DECLK - Deallocate clock aueue core block
$DEPKT - Deallocate SEND
I/O REQUEST core block

CRASH

Crash dump routines
$CRASH - Crash dump routine
$CRSBF - Internal crash stack
$CRSBN - Starting device address
$CRSCS - Checksum of device address
$CRSHT - Halt to wait for the user
$CRSUN - Crash unit number (C$$RUN) stored here
$PANIC - Reference entry label only

CTDRV

TAll tape cassette controller driver
$CTINT - Controller interrupt processing
CTINI - Controller initiator
$CTTBL - Driver dispatch table
SPCBK - Spacing function
RDBLK - Read logical function

9-1

C:ROSS-REPERENCES
Module

Routines and Labels

CTDRV
(cont.)

WRBLK
WREOF
CTOUT

CVRTM

Conver~

DBDRV

RH11-RP04/0S/06 disk pack driver
CNTBL - Address e>f current unit control block
RTTBL - Retry count for current operation
TEMP
- Temporary storage for controller number
OFFAD - Address e>f current off set value
OFFTB - Offset pe>sitioning value table
FUNTBL - Diagnostic function table
$DBTBL - Driver dispatch table
DBINI - Initiator

DLDRV

RLll/RLOl disk driver
CNTBL - Address e>f current unit control block
Retry count for current operation
RTTBL
Temporary storage for controller number
TEMP
$DLTBL
Driver dispatch table
Initiator (get I/O packet)
DLINI
DLINIO
Initiate I/O operation
CLOUT
Device tj.meout
DLDIFF
Cylinder address difference calculator
CLOVER
Error logging routine
Error logging routine
DLDTER

DMD RV

RK611-RK06/RK07 disk cartridge driver
CNTBL - Address off curtrent unit control block
RTTBL - Retry count for current operation
TEMP
- Temporary storage for controller number
FUNTBL - Diagnostic function table
OFFTB - Offset positioning data
$DMTBL - Driver di.spatch table
DMINI - Initiator
DMINIO - I/O initi.ator
DMOUT - Device timeout
DMECC - Error correction
DMECOR - Memory address calculation for correction
DMDVER - Error logging
DMDVTO - Error logging
DMRPAS - Controller register pass routine
DMDINT - Diagnostic interrupt handler

DPDRV

RPll-C/E disk pack controller driver
CNTBL - Address of current unit control block
RTTBL - Error retry count and positioning flag
TEMP
- TemporarY' storage for .controller number
FUNTBL - Diagnostic function code table
$DPTBL - Driver dispatch table
DPINI - Initiator
DPOUT - Device timeout

DRABO

Abort task routine
$DRABO - Abort a specified task

DRASG

Assign a device unit to a logical unit number
$DRASG - Assign logical unit number (LUN)

- Write logical function
- Rewind and write EOF functions
- Device timeout

time routine
$CVRTM - Convert a time interval-time units pair to a
clock ticks count

9-2

CROSS-REFERENCES
Module

Routines and Labels

DRATX

End execution of an asynchronous system trap service
routine
$DRATX - Asynchronous system trap (AST) service exit
routine

DRCIN

Connect or disconnect an interrupt vector to an
interrupt service routine (ISR) in the
task's own space
$DRCIN - Connect to interrupt
$DISIN - Disconnect interrupt. vector

DRCMT

Cancel MARK TIME and SCHEDULE REQUEST directives
$DRCMT - Cancel MARK TIME requests
$DRCSR - Cancel SCHEDULE requests

DRDAR

Disable or enable AST recognition directive processing
$DRDAR - Disable AST recognition
$DREAR - Enable AST recognitionDAR

DRDCP

Disable or enable checkpointing directive processing
$DRDCP - Disable checkpointing
$DRECP - Enable checkpointing

DRDSP

DRDSP contains the directive dispatch table
BTRMV - Bytes to remove on exit
DSPMP - Dispatch mapping table
DSPTBL - Directive dispatch table
$EMTRP - EMT instruction trap routine
$DPLM1 - Get pointer to definition block
$DPLM2 - Get size of definition block
$DRATP - NOP alter priority
$DRLM1 - Get. first word on user stack
$DRLM2 - Get first DPB word
$TRTRP - TRAP instruction trap routine
USRPS - Pointer to user PS word

DREIF

End execution of the issuing task directive processing
$DREIF - Terminate the execution of the issuing task if
the event flag is clear
$DREXT - Terminate the execution of the issuing task
MTQUE - Subroutine to empty queue
SCNLN - Scan logical unit table

DREXP

Extend partition directive processing
$DREXP - Extend the partition of the issuing task

DRGCL

Get MCR command line or release MCR command buff er
directive processing
$DRGCL - Get MCR command line
$RLMCB - Release MCR command buffer

DRGLI

Get logical unit number information directive processing
$DRGLI - Get LUN information

DRGPP

Get partition parameters directive processing
$DRGPP - Get partition parameters

DRGSS

Get sense switch register contents directive processing
$DRGSS - Get sense switch contents

DRGTK

Get task parameters directive processing
$DRGTK - Get task parameters

9-3

CROSS-REFERENCES
Module

Routines and Labels

DRGTP

Get time parameters directive processing
$DRGTP - Get current time parameters

DRMAP

Mapping and send or receive by reference directive
processing
$DRCRW - Create address window
$DRELW - Eliminate address window
$DRGMX - Get mapping context of the task
$DRMAP - Map window to region
$DRRRF - Receive by reference
$DRSRF - Send by reference
$DRUNM - Unmap address window

DRMKT

Mark time and run directive processing
$DRMKT - Mark time: declare a significant event after a
specified interval
$DRRUN - Run the task after a specified interval or
run the task after a specified interval and
repeat the task periodically

DRPUT

Specify floating-point, powerfail, and receive AST traps
directive processing
$DRFEX - Specify floating-point exception ASTs for ·the
issuing task
$DRPUT - Specify power recovery ASTs for the issuing
task
$DRRCV - Specify receive ASTs for the issuing task
$DRRRA
Specify receive by reference ASTs for the
issuing task

DRQIO

Queue I/O directive processing
ATRBK - Build attribute pointer block
Build an I/O packet
BDPKT
Check if access also requested on create
CKACC
Check for file already accessed on LUN
CKALN
Check connect parameter buffer
CK CON
Fill disconnect parameter buffer and interlock
CKDIS
LUN usage
Check for volume marked for dismount
CK OMO
Check for file accessed on LUN
CKNLN
CK RAC
Check for read access priviliges and
exit to transfer function
Access or deaccess interlock
CKRLK
CKWAC
Check for write access priviliges and exit
to transfer function
Exit polish to function exit
CKXIT
$DQLM1 - Zero I/O status block
$DQLM2
Clear I/O status block
$DRQIO - Queue I/O request
$DRQIW - Queue I/O request and wait
$DRQRQ - Insert I/O packet in a controller queue
FCACC
Access file: check if volume marked for dismount
Access file: check if file accessed
FCC AW
Connect to process
FCCON
Create file
FCC RE
FCCTL
Function is control function
FCDAC
Deaccess file~ check if file accessed on LON
FCDIS
Disconnect from process
Function code dispatch vector
FCDSP
FCIFC
Set illegal function status
FCKIL
Flush I/O queue

9-4

CROSS-REFERENCES
Module

Routines and Labels

DRQIO
(Cont.)

FCNCT
FCPKT
FCRVB
FCTRN
FCWVB
FCXFR
FCXIT
FILNM
IEALN
IEBAD
IEBYT
IECMN
IEIFC
IENLN
IENOD
IEOFL
IEOVR
IEPRI
IESPC
ISSUC
MSTK
MOVE3
OPP RM
RQPRM
UNLCK
UNLKT

Network control function
Build an I/O packet
Read virtual block: check if file accessed on LON
Function is a transfer function: address check and
map function
- Write virtual block; check if file accessed on LUN
- Insert parameter 2 (within FCCTL routine)
- Clean stack and retrieve address of I/O
packet (prior to entry into $DRQRQ)
- Insert optional ~ilename block
- File already accessed on LUN; set file already
accessed code
- Bad parameter; set bad parameter status
- Illegal byte count or alignment; declare odd byte
status
- Common error exit
- Illegal function; declare illegal function code
status
- No file accessed on LUN; set no file accessed
status
- No buffer space available: set no buffer status
- Specified device is off line
- Illegal load overlay UCB; declare illegal load
overlay function status
- Privilege violation; set privilege violation status
- Illegal buffer address specified; declare illegal
buffer status
- Function is a NOOP function; declare successful
completion status
- Location to mark stack address
- Move extend and access control words into I/O
packet
- Interpret optional block address
- Interpret required block address
- Unlock block
- Set up registers for unlock and exit
to control address

DRRAS

Receive and send directive processing
$DRREC - Receive data and receive data or exit.
Dequeue data from the issuing task's receive
queue
$DRSND - Send data; queue data in a specified task's
receive queue

DRREG

Attach and detach region directive processing
$DRATR - Attach region to the current task
$DRCRR - Create a region and optionally attach to it
$DRDTR - Detach the specified region, unmapping if
necessary
$DETRG - Detach region by attachment descriptor address

DRREQ

Request task execution directive processing
$DRREQ - Request task execution

DRRES

Resume or suspend task execution or alter task priority
directive processing
$DRATP - Alter task priority of a specified task
$DRRES - Resume executing a task that has issued the
suspend directive
$DRSPN - Suspend execution of the issuing task

9-5

1:ROSS-REFERENCES
Module

Routines and Labels

DRS ED

Significant event and event flag directive processing
$DRCEF - Clear event flag and report its polarity
before clearing
$DRDSE - Declare a significant event
$DRRAF - Read all event flags (local and common)
$DRSEF - Set an event flag and report its polarity
bef·ore setting
$DRWFL - Suspend task execution until LOGICAL OR of
event flags occur
$DRWFS - Suspend task execution until a specified
event flag is set
$DRWSE - Suspend execution of the issuing task until
the next significant event
$TKWSE - Execute a wait for significant event directive
for the current task

DRS ST

Specify SST vector directive processing
$ORSDV - Specify debugging aid SST vector
$DRSTV - Specify task SST vector

DTDRV

TCll DECTAPE controller driver
CNTBL - Address of current unit control block
RTTBL
Error retry count and drive reset flag
TEMP
Temporary storage for controller number
$0TTBL
Driver dispatch table
DTINI
Initiator
OTC AN
Cancel I/O operation
DTOUT
Reference label

DXDRV

RXll floppy disk driver
CNTBL - Address of current UCB for controller
DXCAN - Cancel I/O entry point
DXTBL - Driver dispatch table
DXINI - Initiator
DXOUT - Log device timeout
DXPWF - Powerfail entry point
DXRTY - Retry last function
NXTSEC - Update block number, buffer address, and
buffer pointer
RTTBL - Error retry count for current unit
SETBUF - Set up buffer pointer for CPU1 SILO transfers
TEMP
- Temporary storage for controller number
TRKSEC - Convert logical or physical block number
to track-sector pair

ERROR

Error logging and error log processing
$ALEB1 - Allocate an error message block (EMB)1
(alternate entry)
$ALEMB - Allocate an error message block
$BMSET - Set a driver's bit in the I/O active bitmap
$DTOER - Log timeout error1 EMB formatting routine
DTOTMP - Device timeout storage
$DVCER - Log devi.ce error bit errors1 EMB formatting
routine
$DVERR - Same as $DVCER
$NSO
- Call common nonsense interrupt code1 group
0 - 17
$NS1
- Call common nonsense interrupt code1 group
·20 -

$NS2

- Call common nonsense interrupt code1 group
40 - 57

9-6

CROSS-REFERENCES
Module

Routines and Labels

ERROR
(Cont.)

$NS3
$NS4
$NSS
$NS6
NSI
NS I ER
OPS
OPC
$QEMB
TEMP

- Call common nonsense interrupt. code; group
60 - 77
- Call common nonsense interrupt code; group
100 - 117
- Call common nonsense interrupt code; group
120 - 137
- ca11· common nonsense interrupt code; group
140 - 157
- Nonsense interruption recursion counter
- Nonsense interrupt errors
- Nonsense interruption old PS storage
- Nonsense interruption old PC storage
- Queue an error message block (EMB)
- Nonsense interrupt PS storage

IN I TL

System startup and initialization routine
DEVMG - "DEVICE dduu: NOT IN CONFIGURATION" message
$INITL - System gets control here after a boot to
initialize and start up the system
OP MSG
Send message to terminal
$POOL
Start of pool
PRO MT
Terminal prompt character
$SYBEG
Beginning of dynamic storage region
SYS MG
System identification message
SYS ID
System ID
$SYTOP
Last address in the Executive
Non-existent memory trap routine
TRTRP

IOSUB

I/O related subroutine processing
$ACHCK - Address check, word aligned
$ACHK2 - Address check 2-byte directive parameter block
$ACHKB - Address check byte aligned
$ACHKP - Address check parameter block
$ACHKW - Address check parameter block, word aligned
$ASUMR - Assign UNIBUS mapping ·registers
$BLKC1 - Logical block check routine (alternate
entry)
$BLKCK - Logical block check routine
$CEFI - Convert event flag number for I/O
$CEFN - Convert event flag number for directive
$CRPAS - Common register pass routine
$DEUMR - Deassign UNIBUS mapping registers (UMRs)
$DIV
- Integer divide magnitude numbers
$DQUMR - Dequeue from UNIBUS mapping register (UMR)
wait
$DVMSG - Device message output to task termination
notification task
$ECCOR - Common ECC correction code for RP04/RK06
$GTPKT - Get I/O packet from request queue
$IOALT - I/O done (alternate entry); finish I/O
processing
$IODON - I/O done; finish I/O processing
$IOFIN - Finish I/O processing where unit and controller
are not to be idle
$IOKIL - Kill I/O; flush all I/O requests for the
current task and cancel current I/O
$LCKPR - Lock processing routine
$MPLND'- Map logical unit number (LUN); check for
redirected device
$MPLNE - Map LUN for exit
$MPLUN - Map LUN
$MPPHY - Map to physical address

9-7

CROSS-REFERENCES
Module

Routines and Labels

IOSUB
(Cont.)

$MPPKT - Map a read/write virtual function in an I/O
packet tc• a read/write logical function
$MPUBM - Map UNIBUS to memory
$MPVBM - Map virtual block number
$MUL
- Integer multiply magnitude numbers
$RELOC - Relocate virtual address into a relocation
bias and displacement in block
$RELOM - Relocate and map address
$RELOP - Relocate UNIBUS physical address
$RLCH - Release channel
$ROCH - Request channel
$SCDV1 - Scan devl.ce tables (alternate entry)
$SCDVT - Scan device tables
$STMAP - Set up UNIBUS mapping address
$WTUMR - Wait for change in UNIBUS mapping register
state

LOADR

Task to load and checkpoint all nonresident tasks
IOSB
- I/O status double word
LDRBF - R/W I/O DPB; buffer address
LDRBK - LBN of I/O transfer
LDRDP - ,R/W I/O DPB; DIC, DPB size
LDRFC - R/W I/O DPB; function code
LUN 1
EFN 1
I/O status doubleword address
; no AST service routine
LDRLN - R/W I/O DPB; buffer length
LDRTK - R/W I/O DPB; pointer to request task TCB
$LOADR - 1. Read a non-resident task into memory .
and initialize it for execution
2. Read a previously checkpointed task back
into memory and restart its execution
3. Write a checkpoint image of a running task
and free its partition

LOWCR

START

LPDRV

LPll/LSll line printer controller driver
CNTBL - Address of UCB
Cancel I/O
LP CAN
Driver initiator
LP I NI
Interruption processing
LP INT
Device timeout processing
LPOUT
Powerfail return
LPPWF
Fill line printer buffer
LPRNT
Driver dispatch table
$LPTBL
Temporary storage for controller number
TEMP

Interrupt and trap vectors
$EMTRP - EMT instruction trap
$!LINS - Illegal instruction trap
$IOTRP - IOT instruction trap
$NONSI - Nonsense interrupt vector
$TRACE - Breakpoint trap
$TRP04 - T~ap to 4
$TRTRP - TRAP instruction trap
DSW
- Pointers
Address of directive status
Directive status word
FCS impure area pointer
FORTRAN impure area pointer
Overlay run time system impure area pointer
$STACK - Executive stack area

9-8

CROSS-REFERENCES
Module

Routines and Labels

MMD RV

RH11/RH70 TM02/TM03 magnetic tape controller driver
BSPACE - Backspace one ~ecord
CHKEOV - Check for logical end of volume
CNTBL - Address of current UCB
DRVCLR - Issue drive clear
FMTBL - Format code save area
INTADD - Current interruption service address
LGFCN - Legal function dispatch table
MMCAN - Cancel I/O operation
MMDINT - TU16 diagnostic interruption and timeout
handler
MMINI - Tape controller initiator
MMPWF - Powerfail processing
$MMTBL - Driver dispatch table
REWND - Rewind function
RLCH
- Release channel
ROCH
- Request channel
RTTBL - Error retry count
SELECT - Select drive
SELERR - Select error
SPCBK - Space block function
SPCFL - Space file function
SPTBL - Space checking
TEMP
- Temporary storage for controller number
WRBLK - Write logical function
WREOF - Write tape mark function

MTDRV

TMll magnetic tape controller driver
BSPACE - Backspace one record function
CHKEOV - Check for-logical end of volume
CNTBL - Address of current unit control block
INTADD - Current interuption service address
LGFCN - Legal function dispatch table
MTCAN - Cancel I/O operation
$MTCLK - Reference label for timeout
MTDINI - Diagnostic interruption and timeout handler
MTINI - Tape controller initiator
MTOUT - Device timeout processing
$MTTBL - Driver dispatch table ·
RDBLK - Read logical function
REWND - Rewind function
RTTBL - Error retry count
SELECT - Select a tape drive
SELERR - Select error
SPCBK - Space block function
SPCFL - Space file function
SPTBL - For space checking
TEMP
- Temporary storage for controller number
WRBLK - Write logical function
WREOF - Write tape mark function

NLDRV

Null device driver
$NLTBL - Driver dispatch table
NLINI - Null driver executable code

PARTY

Memory pa·r i ty interrupt handling
ERTRK - Address/data group O and 1, time of last error
EXMSG - Executive parity error message
$PARTS - Dummy control status register (CSR) for
nonexistant registers
$MPCTL - New cache parity CSR contents

9-9

CROSS-R.EFERENCES

Module

Routines and Labels

PARTY
(Cont.)

$MPCSR MSTAT PARLV RECURS STAT
PARER -

PLSUB

Program logical ctddress space (PLAS) common subroutines
$CKACC - Check desired access of a task into a region
$CRATT - Create a1ttachement descriptor
$SRATT - Search for attachment descriptor
$SRNAM - Search for named partition
$SRWND - Search for specified address window
$UNMAP - Unmap address window

POWER

Power failure recovery processing
$LDPWF - Save APR5: reference label for LOAD
PDOWN - Powerfail interrupt processing
$POWER - Power failure recovery processing routine
PUP
- Power up interrupt processing
PWBTM - Volatile register storage
PWVCT - Powerfail vector

PPTAB

Device tables
$PPDAT - Start oj: device tables
$PPEND - End of device tables

PRDRV

PCll/PRll paper tape reader driver
CNTBL - Address of unit control block
PRCAN - In procf~ss I/O tranfers are not terminated
PRINI - Controller initiator
$PRINT - Controller interruption processing
PROUT - Device 1t:imeout processing
PRPWF - Powerfail return
$PRTBL - Driver dispatch table
TEMP
- Temporary storage for controller number

QUEUE

General queue manipulation processing
$CLINS - Clock queue insertion
$CLRMV - Clock queue removal
$QINSF - Queue insertion at end of list
$QINSP - Queue insertion by priority
$QMCRL - Queue MCR command line
$QRMVF - Queue r1~moval from front of list
$QRMVT - Queue r1~moval by TCB address

REQSB

Task re.quest related subroutines
$ABCTK - Abort current task
$ABTSK - Abort task
$ACTTK - Put task in active task list
$ACTRM - Remove task from the· active task list
$BILDS - Build stack and initialize header
$CHKPT - Checkpoint task
$DASTT - Declare AST trap
$DQAC - Dequeue AST block queued by $QASTC
$EXRQF - Executi'lle request with FIFO queue insert
$EXRQN - Executive request with no queue insertion
$EXRQP - Executive request with queue insert by priority
$FNDSP - Find space in PCB list
$ICHKP - Initiate checkpoint
$LOADT - Put task in loader queue

Vector of cache CSR addresses
First two parity CSRs
Interruption recursion level counter
Jump to halt processor
Memory status register
Memory parity error interrupt processing

9-10

CROSS-REFERENCES
Module

Routines and Labels

REQSB
(Cont.)

$MAPTK - Map task address window
$NXTSK - Assign next task to partition
$QASTC - Queue AST to task
$QASTT - Queue AST to task
$RLPAR - Release task partition; get PCB address
$RLPR1 - Release partition; clear busy
$SETCR - Set conditional schedule request
$SETF - Set event flag; convert to mask and address
$SETM - Set event flag
$SETRQ - Set schedule request
$SETRT - Set schedule request for current task
$STPCT - Stop current task
$STPTK - Stop task
$SRSTD - Search system task directory
$TSTCP - Test if checkpoint should be initiated
$TSKRP - Task request (default UIC)
$TSKRQ - Task request (UCB specified)
$TSKRT - Task request (default UCB)
$UISET - Establish default UIC and current UIC

SST SR

Synchronous system trap (SST) service routine
processing
$EMSST - Non-RSX EMT/TRAP instruciton
FLFRK - Floating-point fork block
FLSTS - Floating-point status
$FLTRP - Floating-point exception (11/40)
$FLTRP - Floating-point exception (11/45)
$FPINT - Programmed interrupt request processing
$!LINS - Illegal or reserved instruction trap routine
$IOTRP - IOT instruction trap routine
$SGFLT - Segment fault trap routine
SSTXT - Common SST exit routine
$TRACE - TRACE (T-bit) or break point instruction (BPT)
trap routine
$TRP04 - Traps occuring at 4 (odd address,
non-existant memory, etc.) trap routine

SYSCM

System common data areas
$ABTIM - H.CSP; current stack pointer
$ACTHD - T.MXSZ; active task list listhead
$BTMSK - Bit mask table
$CFLPT - W.BOFF; pointer to first checkpoint file PCB
$CKCNT - T.ASTL+2; address of clock count register
$CKCSR ·- T.EFLG; address of clock control status
register
$CKLDC
T.EFLG+2; clock load count
$CLKHD - P.TCB; clock queue
T.TCB; common event flags 1. - 16.
$COMEF
P.STAT; pointer to command output UCB
$COPT
$CRAVL - P.PRI; dynamic storage listhead
$DEVHD - H.FCS; pointer to first DCB
$0'YPMN - H.VEXT; February, March
$ERRHD - Error logging message queue listhead
$ERRLM - Limit on resident error logging data
$ERRPT - W.BHVR; pointer to error logger TCB
$ERRSQ - Universal error sequence number
$ERRSV - Pointer to error file identification
$ERRSZ
Resident bytes of error logging data
$EXSIZ
W.BSIZ; address of last byte in Executive
$FMASK - P.WAIT+2; system feature mask
$FRKHD - P.SIZE; fork queue listhead

9-11

CROSS-REFERENCES
Module

Routines and Labels

SYS CM
(Cont.)

$HEADR $INTCT $IOABM $LDRPT $LOGHD $LSTLK $MCRCB $MCRPT $MXEXT -

SYSDF

Contains directive status codes, system global and
control block offset definitions

SYS TB

Contains system device tables
$DEVTB - Device tables

SYSXT

System entrance, exit, and processor dispatching
routines
$DIRSV - Directive save routine
$DIRXT - Directive exit
$FINBF - Finish terminal input buffered I/O
$FORK0 - Fork and create system process (alternate
entry)
$FORK1 - Fork and create system process and save RS
$FORK2 - Fork and create system process (CINT$
directive)
Fork and create system process (called from
$FORK
I/O driver)
$INTSC - Interrupt save (CINT$ directive)
$INTSE - Interrupt save (error logging devices)
$INTSV
Interrupt save
$INTX1 - Interrupt exit
$INTXT - Interrupt exit
Nonsense interrupt RTI routine
$NONSI
- Nonsense interrupt vector
$NSO
- Nonsense interrupt vector
$NS1
- N·onsense interrupt vector
$NS2
- Nonsense interrupt vector
$NS3
$NS4
- Nonsense interrupt vector
$NS5
- Nonsense interrupt vector

T.LNK; pointer to current task header
P.MAIN; clock interrupt ticks count
Device 1/0 active bitmap
H.FORT; pointer to loader TCB
T.NRPC; logical device assignment list
T.LDV; lock word (TCB address of owner)
T.LBN+l, MCR command block address
H.OVLY; pointer to MCR TCB
GLobal task size limit for extend task
directiv·e
$PARHD - H.CUIC; pointer to partition table
$PARPT - P.BUSY; parity address vector table pointer
$PKAVL - Pointer to first packet in list
$PKMAX - Maximum number allowed in list
$PKNUM - Number of packets currently in list
$PWRFL - H.EFLM; powerfail recovery pointer
$RQSCH - H.EFSV; schedule request TCB address
$SHFPT - W.BATT; pointer to shuffler TCB
$SIGFL - H.EFLM+21 task waiting for significant event
$STKDP - H.FPSA; stack depth indicator
$SYSID - T.NAM+2,T.RCVL; system identification
$SYSIZ - Size of memory in 32 word blocks
$SYUIC - T.UCB; default system UIC (mapped or unmapped)
$TKNPT - T.RCVL+2; pointer to TKTN TCB
$TKPS - Ticks per second
$TKTCB - H.FPVA; pointer to current task TCB
$TSKHD - W.BLVR; pointer to system task directory
$TTNS - Tick of second
$UMRHD - Mapping assignment block listhead
$UMRWT - UMR wait queue listhead

9-12

CROSS-REFERENCES
Module

Routines and Labels

SYSXT
(Cont.)

$NS6
$NS7
RESCH $SAVNR $SWSTK -

SYTAB

System tables needed for resident tasks and
bootstrapping the system
.LDRHD - Loader task header
$PCBS - Loader partition control block
$STD
- Loader task control block

TD SCH

Time dependent scheduling and device timeout
processing
$CKINT - Clock interrupt processing routine
DVOUT - Test for one second elapsed time
ROBIN - Executive round robin scheduling
RNDCT - Clock ticks to next schedule interval
SWAP
- Disk swapping algorithm1 reduce swapping
priority of resident tasks
SWPCT - Clock ticks to next swapping interval
TDS
- Time dependent scheduling
TIMXT - Exit time dependent scheduling if no
unprocessed clock ticks remain
UPTIM - Update absolute and real time of day and date

TTDRV

Terminal driver for DLll-A line interface and
DHll/DJll/DZll line multiplexers
BECHOB - Echo next byte
CLKSW - DMll-BB clock switch word
CNTBL - Address of unit control block
CRTRUB - Backspace, space, backspace (/ /)
CTRLC - Control output message (MCR>)
CTRLR - Control R processing
CTRLU - Control output message (U)
CTRLZ - Control output message (Z)
DHCSR - DHll CSR address
$DHINP - DHll terminal multiplexer input interrupt
processing
$DHOUT - DHll terminal multiplexer output interrupt
processing
DHTBL - Pointer to DHll table
DHTMP - Temporary storage for controller number (DBll)
OJCSR - DJll CSR address
$DJINP - OJll terminal multiplexer input interrupt
processing
$DJOUT - DJll terminal multiplexer output interrupt
processing
DJSAV - DJll terminal multiplexer save routine
DJTBL - Pointer to DJll UCB table
DJTMP - Temporary storage for controller number (DJll)
$DLINP - DLll terminal input interrupt processing
$DLOUT - DLll terminal output interrupt processing
DLSAV - DLll terminal save routine
DLTMP - Temporary storage for controller number (DLll)
$DM11B - DMll-B or DMll-BB modem control interrupt
processing
DMHUP - Subroutine to hang up a DMll-BB unit if not
ready
DMSAV - DHll terminal multiplexer save routine
DMTBL - DMll-BB CSR address

Nonsense interrupt vector
Nonsense interrupt vector
Rescheduling requested1 clear schedule request
Save non-volatile registers
Switch from task stack to system stack

9-13

CROSS-REFERENCES
Module

Routines and Labels

TTDRV
(Cont.)

DMTMO DOCTLC DZCLK DZCLKS DZCSR $DZINP -

XBDRV

DAll-B Interprocessor Communications Driver
- Unit impure data table (reference label)
CNTBL
- Unit impure data table
UNITBL
$XBTBL:: - Device dispatch table
- DAll-EI parallel communications link controller
DBINIT
I/O initiator entry point
- Successful completion entry
SUCC:
DBTMO:
- Device timeout entry

DMll-BB time out routine
Lock out input characters
Clock queue entry address
DZll clock switch word
OZll CSR address
DZll terminal multiplexer input interrupt
processing
$DZOUT - DZll terminal multiplexer output interrupt
processing
DZSAV - DZll terminal multiplexer save routine
DZTBL - Pointer to DZll UCB table (indexed by
controller number)
DZTMO - DZll time out routine
DZTMP - Temporary storage for controller number (DZll)
ECHOBl - Display (send out) a character
ECHOB - Echo next byte
FCHAR - Send a character to a terminal
FILTB - LA30S carriage return fill table
FWRITE - Breakthrough write (disallow control-0)
GETBF - Get input buff er and set terminal control block
GETBF2 - Allocate a core block
GMCTAB - Terminal characteristics
ICHAR - Process an input character
INPINI - Copy UCB address
INPPT - Input request in progress
INPTO - Enable input character handling
INPTl - Fork to finish an input request
INPT2 - End-of-line fork process
!ODON - Finish I/O operation
JTTINI - Go to terminal initiator
LEVHSM - Leave hold-screen mode ()
MECHOl - Multi-echo processing
OCHAR - Send a character to a terminal
OUTPT - Start or continue an output stream
OUTPTl - Test if a fill should be echoed
SYNTAB - Escape sequence syntax table
TCHRl - Teminal characteristics
TINPl - Unsolicited input fork process
TICAN - Cancel 1/0 operation (force I/O complete)
TTCHK - Terminal driver special parameter checking
TTHUP - Cancel 1/0 and BYE if DMll or DZll line hangs
up
TT IN I - Terminal initiator
TTOUT - Terminal driver timeout entry point
TTOUTl - Terminal timeout; finish I/O operation
TTPWF - Powerfail entry point (loaded as a loadable
driver)
$TTTBL - Device initiator entry point
UCBTB - Address of UCB for line
UCJTB - Address of line's UCB (DJll)
UCZTB - UCB address for each line: indexed
by line (unit) number

9-14

CROSS-REFERENCES
Module

Routines and Labels

XBDRV
(Cont.)

DBCANC:
DBPWRF:
$XBINT::
I EVER:
SUCDN:
INTDN:
TXDN:
NOTHING:
EXIT:
ERR:
DBSET:
DBEXIT:
XBRCV:
RESYNC:
MYSYNC:

XMDRV

RSX-llM DMCll Driver
UCB displacements used
U.XQ:
- Transmit listhead address
U.RQ:
Receive listhead address
Error status
U.ERR:
U.XAST:
Exception AST block address
U.ABO:
Number of I/O requests marked for abort
Listhead displacements
IOTYPE:
SELO request type
COUNT:
Sent count
UMR:
Next UMR to use
Sum of both UMR addresses
UMRSUM:
BASE:
Microprocessor base table
$XMTBL::
Driver dispatch table
UCB address table
CNTBL:
Temporary unit Spve
TEMP:
Listheads
LIST:
Multiple unit base table addresses
BTAB:
Multiple unit listhead addresses
XLTAB:
Address extension bits
AXTAB:
Return point
XMRET:
XMINIT:
Initiate DMC I/O entry
Finish packet with "Is.sue" status
PKTOK:
Alternate entry for PKTOK
FINPKT:
Device not ready
XMDNR:
Illegal buffer
XMSPC:
XMIFC:
Illegal function code
TRAN:
Transfer function
TRY:
Try to give transfer request to DMC
GIVE:
Give buffer address and count to DMC
SETDMC:
Initialize DMC hardware
WRDYIC:
Release port and wait for RDYI clear
WRDYIS:
Wait for RDYI set
MAP22:
Do 22-bit mapping and load data port
$XMINP::
Process RDYI interrupt
~MTRDY:
DMC ready for transmit buffer
RCVRDY:
DMC ready for receive buffer
FPERR:
Force procedure error
$XMOUT::
Process completion interrupt
XMTCOM:
Transmit buffer complete
RCVCOM:
Receive buffer complete
CNTLO:
Control out
BAD:
Exit from interrupt {reference label)
XMINTX:
Exit from interrupt
XMSET:
Setup for interrupt routines and transfer

Device cancellation entry
Device powerfail entry
DAll-B interrupt routine
Unrecoverable error finish
Successful completion
Finish I/O
Check for enable receive
Check for interrupt
Wait for transfer completion
Error checking
Check for valid UCB address and device online
Exit from interrupt
Initiate device for unsolicited receive
- Receive error. Check for receiver active
- Receive error. Device must be resynced

9-15

CROSS-REFERENCES
Module

Routines and Labels

XMDRV
(Cont.)

RDYINT:
BUFCOM:
XMFRK:
XMTMO:
XMCANC:
XMPWRF:
XMCANC:
KILL:
RQPABO:
RQP:
QXAST:
QAST:

DQRAP:
RAP:
ITRY:
PORT:
IPORT:
NTXMT:
NTRCV:
NTFIX:
NTABO:

Give buffer to DMC
Process bu~fer complete
Start fork process if fork process not running
Timeout processing entry
Cancel I/O entry
Powerfail recovery entry
Indicate I/O kill was done
Kill the device
Alternate entry for KILL:
Alternate entry for KILL:
Queue an AST to the CCP (clear AST block address)
Queue an AST to the CCP (declare significant
event)
Dequeue and return an I/O packet
Return an already dequeued I/O packet
Try to set up another buffer from interrupt level
Request the data port
Request the data port from interrupt level
Initiate DECNET transmit
Initiate DECNET receive
DECNET error recovery
Abort by CCB address

XPDRV

DPll Synchronous Communications Driver
CNTBL:
- Reference label for UNITBL:
UNITBL: - UCB addresses
TEMP:
- Reference label for UNIT:
UNIT:
- Temporary storage for unit number
$XPTBL:: - Driver dispatch table
DPINIT: - DPll Synchronous Communications Controller I/O
initiator
DPSUCC: - Return successful status
DP FIN:
- Idle controller and mark unit idle
DPPWRF: - Power fail service routine
DPCANC: - I/O cancellation entry
- Timeout service routine
DPTMO:
$XPINP:: - DPll input interrupt service routine
$XPOUT:: - Transmitter interrupt service routine
DPTXND: - End of transmission
DPRXER: - Receiver error detected. Resync controller
DPRCV:
- Unsolicited receive initialization. Activate
controller
DPSET:
- Set up register R4 with CSR address, RS with UCB
address, unit number in low-order 4 bits of unit
- Dismiss interrupt
DPSXT:

XQDRV

DQll Synchronous Communications Driver
CNTBL:
- Reference label for UNITBL:
UNITBL: - UCB address tabel
TEMP:
- Reference label for UNIT:
UNIT:
- Temporary storage for unit number
$XQTBL:: - Device dispatch table
DQINIT: - DQll Synchronous Communications Controller I/O
initiator
DQRET:
- Return from initiator
- Do I/O done (successful)
SUCC:
UNSUCC: - Do I/O done (unsuccessful)
DQCANC: - I/O cancellation entry
DQPWRF: - Powerfail routine entry
DQTMO:
- Timeout routine entry

9-16

CROSS-REFERENCES
Module

Routines and Labels

XQDRV
(Cont.)

- Select appropriate buffer address register to use
(transmit)
TOAN:
- Select appropriate buffer address register to use
(transmit - double buffering ahead)
RNEXT:
- Select appropriate buffer address register to use
(receive)
ROAN:
- Select appropriate buffer address register to use
(receive - double buffering ahead)
$XQOUT:: - Transmit interrupt routine
TXTRN:
- Finish transmit
DQTXDN: - Transmit done
ERROR:
- Error routine
RBCERR: - Receive BCC error
DQSET:
- Set up R4 with RXCSR address, RS with UCB
address,
unit number in low-order four bits of unit.
$DQEXIT: - Jump to $INIXT to dismiss interrupt
$XQINP:: - Receive interrupt routine
- End of receive routine. Clear spurious clock
RXENT:
error, save registers, check for buffers
finished.
DQRCV:
- Initialize DQ for unsolicited receive
RESYNC: - Re-sync or initialize receiver to
receive from a dead start.
SETUP:
- Set up device with next receive buffer

XU ORV

DUll Synchronous Communications Driver
CNTBL:
- Reference label (for UNITBL:)
UNITBL:
UCB address table
TEMP:
Reference label (for UNIT:)
$XUTBL::
Driver dispatch table
DUINIT:
DUll Synchronous Communication Controller
I/O initiator
Return successful status for mode change
DUSUCC:
full- or half-duplex)
End mode change request routine
DUFIN:
Powerfail service routine
DUPWRF:
DUCANC:
I/O cancellation service routine
Timeout service routine
DUTMO:
Input interrupt service routine
$XUINP::
Transmitter interrupt service routine
$XUOUT::
End of transmitter interrupt service
DUTXND:
Receiver error - re-sync controller
DURXER:
Activate controller to be ready to accept
DURCV:
data
Set up R4 with CSR address, RS with UCB address,
OUSET:
unit number in low-order 4 bits of unit
Jump to $INTXT to dismiss interrupt
DUSXT:

TNEXT:

9-17

CROSS-REFERENCES
Module

Routines and Labels

XWDRV

DUPll Synchronous Communications Driver
CNTBL:
- Reference label for UNITBL:
UNITBL: - UCB address table
TEMP:
- Reference label for UNIT:
UNIT:
- Tempoi;ary storage for unit number
$XWTBL:: - Dr i ve1~ dispatch table
DWINIT: - DUPll Synchronous Communication Controller
I/O initiator
DWSUCC: - Successful device mode change request
- End 01: device mode change request routine
DWFIN:
DUPWRF: - Powerfail service routine
DWCANC: - I/O cancellation service routine
DWTMO:
- Timeout service routine
$XWINP:: - DUPll input interrupt service routine
$XWOUT:: - Transmitter interrupt service routine
DWTXND: - End of transmitter interrupt service
DWRXER: - Receiver error detected. Resync controller
- Activate controller to be ready to receive
DWRCV:
data
- Set R4 with CSR address, RS with UCB address,
DWSET:
unit number in low-order 4 bits of unit

9.2

RSX-llM EXECUTIVE GLOUAL CROSS-REFERENCE

The Executive global cross-reference contains an alphabetic listing of
each global symbol alon9 with its value and the name of each
referencing module.
The value contains the suffix -R if the symbol is relocatable.
The symbol # preceeds the module in which the symbol is defined.
Symbol

Value

C.SYST
DV.MXD
DV.PSE
DV.TTY
DV.UMD
0$$YNM
D.OSP
D.MSK
D.NAM
D.PCB
D.RSOO
D.RSl

000006
000100
010000
000004
000200
000000
000012
000014
000004
000034
000000
177777

D.RSlO
D.RS16

177766
177760

D.RS17
D.RS19
D.RS2
D.RS22
D.RS5
D.RS6
D.RS7
D.RSS

177757
177755
177776
000002
177773
177772
177771
177770

Modules That Reference Symbol
# EX EDF'
# EX EDF'
# EX EDF'
# EXEDF'
DRQIO
# SYSDF'
ORQICt
ORQIO
DRASG
ORQIO
ORS ED
CORAI.
# SYSOli'
ORDCP
ORO SP
PLSUB
# SYSDF'
# SYSOF'
DRDSP'
ORE IF'
ORGLI
DRQIO
ORA BO
DROAR:
ORRAS

TTDRV
IOSUB
IN I TL
IO SUB
# EX EDF
EX EDF
# EX EDF
# EX EDF
# EXEOF
# SYSOF
DREXP

# SYS OF
DRMAP
# SYSDF

ORGPP
DR.RES
DRQIO
# SYSDF
ORREQ
DRDCP

DRRES

9-18

IO SUB
IO SUB

IO SUB

POWER

TOSCH

IN I TL
IOSUB

IOSUB
POWER

TOSCH

DRMAP

DRREG

DRREQ

ORM KT

DRREG

DRRES

DRMAP
DRS ED
# SYSDF

DRRAS
# SYSDF

# SYSDF

DRRES
DREXP
i SYSDF

# SYSOF
DR MAP

DRPUT

CROSS-REFERENCES
Symbol

Value

D.RS80
D.RS81
D.RS84
D.RS85
D.RS86
D.RS87
D.RS90
D.RS92
D.RS93
D.RS94
D.RS95
D.RS96
D.RS97
D.RS98
D.RS99
D.UCB
D.UCBL
D.UNIT
O.VCAN
D.VINI
D.VOUT
D.VPWF
EC.OTO
EC.DVC
EC.NS!
E.LGTH
E.OPC
E.RTRY
IE.ABO
IE.ALN
IE.BAD
IE.BBE
IE.BLK
IE.BYT
IE.CNR
IE.CAA
IE.DAO
IE.DNA
IE.ONR

177660
177657
177654
177653
177652
177651
177646
177644
177643
177642
177641
177640
177637
177636
177635
000002
000010
000006
000002
000000
000004
000006
000140
000001
000141
000056
000022
000016
177761
177736
177777
177710
177754
177755
177667
177770
177763
177771
177775

IE.EOF
IE.EQT
IE.EOV
IE.FHE
IE.FLN
IE.IEF
IE.IFC

177766
177702
177765
177705
177657
177637
177776

IE.LCK
IE .MOD
IE.NLN
IE.NOD
IE.OFL
IE.CVR
IE.PR!
IE.RSU
IE.SPC

177745
177753
}·77733
177751
177677
177756
177760
177757
177772

IE.ULK
IE.VER

177653
177774

Modules That Reference Symbol
DRATX
# SYSDF
DREXP
DRMAP
DRMAP
PL SUB
DRASG
DRASG
CVRTM
DRREG
DRRES
IOSUB
DRDSP
DRS ST
DROSP
DRASG
DRASG
DRASG
# EX EDF
ORQIO
# EX EDF
# EX EDF
ERROR
ERROR
ERROR
ERROR
ERROR
# EX EDF
OTO RV
DRQIO
ADD RV
DRDRV
DXDRV
DRQIO
GRDRV
IO SUB
MMD RV
IO SUB
ADD RV
ICDRV
MMD RV
MMD RV
MMD RV
MM ORV
. ICDRV
GRDRV
DBDRV
DTDRV
TTORV
IO SUB
ICORV
DRQIO
ORQIO
ORQIO
DRQIO
DRQIO
TTORV
AO ORV
TTDRV
IOSUB
OB ORV
DXDRV

DRGCL

DRPUT

DRMAP
# SYSDF
DRREG
# SYSOF
# SYSDF
# SYS OF
# SYSDF
# SYSDF
# SYSDF
# SYSDF
DRS ED
IOSUB
# SYSDF
# EX EDF
# EX EDF
# EXEDF
IO SUB
# EX EDF
TOSCH
POWER
# EXEOF
# EXEOF
# EX EDF
# EXEOF
# EXEOF
IO SUB
IO SUB

# SYSDF

PL SUB

# SYSDF

IOSUB
SSTSR

# SYSDF
# SYSOF

IN I TL
IN I TL
IN I TL

IO SUB
IOSUB
IO SUB

LP ORV

TTDRV

DRQIO
MMD RV
IO SUB
ICDRV

ICORV

TTDRV

DB ORV
MMD RV
NL ORV

DK ORV
TOSCH
TTDRV

DMD RV
TTDRV

DRDRV

DK ORV
ICDRV
UDO RV

DMD RV
IO SUB

DRDRV
ISORV

ORQIO
MMD RV

ISORV
IO SUB

TTDRV

I CD RV

IOSUB

TTORV

ORQIO

GRORV

ICDRV

MM ORV

DKDRV
MMD RV

DMD RV

DRDRV

DTDRV

9-19

CROSS-REFERENCES
Symbol

Value

IE.WCK
IE.WLK

177652
177764

IO.ATT
IO.CLN
IO.CON
IO.DET
IO.DIS
IO.EOF
IO.FLN
IO.GTS
IO.LOV
IO.ONL
IO.RLB

001400
003400
015400
002000
016000
003000
012400
002400
001010
017400
001000

IO.RLV
IO.RPR
IO.RVS
IO.STC
IO.STP
IO.OLK
IO.WLB

001100
004400
010400
002500
016400
005000
000400

IO.WLC
IO.WLT
IO.WLV
IO.WVB
IQ.OMO
IQ.X
IS.ROD

rs.sue

000420
000410
000500
011000
000004
000001
000002
000001

I$$Sll
I.FCN
I .PRI
I.PRM
I.TCB
KISAR5
KISAR6
L.ASG
L.NAM
L.TYPE
L.UCB
L.UNIT
M$$EXT
M$$MGE
M.BFVH
M.BFVL
M.LGTH
M.UMRA
M.UMRN
M.UMVH
M.UMVL
PR4
PRS
PR6
PR7
PS
P.ATT

000000
000012
000002
000024
000004
172352
172354
000010
000002
000005
000006
000004
000000
000000
000011
000012
000014
000002
000004
000010
000006
000200
000240
000300
000340
177776
000036

Modules That Reference Symbol
DBDRV
DBDRV
MMD RV
DRQIO
DRE IF
GRDRV
DRE IF
GRDRV
MMD RV
I CD RV
TTDRV
DRQIO
ICDRV
DBDRV
DTDRV
DTDRV
TTDRV
DRQIO
MMD RV
GRDRV
IO SUB
DMD RV
LOADR
DBDRV
OMDRV
OTDRV
IO SUB
ORQIO
DBDRV
OX ORV
ADO RV
DRQIO
IO SUB
TTDRV
ISO RV
# EXEOF
# EXEOF
# EXEOF
# EXEOF
# EX EDF
ORMAP
DRASG
DRASG
DRASG
DRASG
ORASG
# SYSOF
# SYSOF
# EX EDF
# EX EDF
# EXEOF
# EXEOF
# EXEOF
# EX EDF
# EXEOF
# EX EDF
# EXEOF
# EX EDF
# EX EDF
# EX EDF
DRREG

DKDRV
DKDRV

DMD RV
DMD RV

IOSUB

TTDRV

DRQIO

IO SUB

TTDRV

DKDRV
DXDRV
MMD RV

DMD RV
LOADR

DRDRV
MMD RV

DRQIO
TTDRV

ORO RV
MMORV
DK ORV
DRORV

ORQIO
NL ORV
OMO RV

OXDRV
TTORV
ORD RV

IO SUB

ERROR
OK ORV

IO SUB
OMO RV

ORD RV

DX ORV

OB ORV
DTORV
ISDRV
UOORV

OKDRV
OX ORV
LP ORV

OMDRV
GRDRV
MMORV

ORD RV
ICDRV
NL ORV

GRORV
TTORV
GRDRV
GRDRV
QUEUE
# EX EDF
# EXEOF
# EXEOF
# EXEDF
# EXEDF
# EX EDF

I CO RV

NLDRV

TTDRV

ICORV
ICDRV

NL ORV
TT ORV

TTDRV

GRORV

TTDRV

ICDRV
# SYSDF

TTORV

DRDRV
DRDRV

DTDRV

IOSUB

IO SUB
IO SUB
IO SUB
IO SUB
IO SUB
IO SUB
IO SUB
GRORV
TTDRV
ICDRV
GRORV
GRDRV
PLSUB

9-20

CROSS-REFERENCES
Symbol

Value

P.BLKS
P.BUSY
P.HOR

000016
000024
000032

P.IOC
P.LGTH
P.LNK
P.MAIN
P.NAM
P.OWN
P.SIZE
P.STAT
P.SUB
P.SWSZ
P.TCB
P.WAIT
SP.EIP
SP.ENB
S$$IEN
S$$LDC
S$$RTZ
S$$TPS
S.BMSK
S.BMSV
S.CCB
S.CON

000003
000042
000000
000012
000004
000026
000016
000030
000010
000022
000026
000020
000001
000002
000115
000001
000074
000074
177776
177774
000030
000010

S.CSR

000012

S.CTM

000006

S.OHCK
S.FLG
S.FRK
S.ITM

000030
000000
000016
000007

S.LHD
S.MPR
S.PKT

000000
000030
000014

S.PRI

000004

S.RCNT
S.ROFF
S.STS

177772
177773
000011

S.VCT
TS.CKR
TS.RON
T.ASTL
T.EXT
T.IOC
T.LGTH
T.PCB
T.STAT

000005
000100
040000
000016
000000
000003
000070
000046
000032

Modules That Reference Symbol
# EX EDF
# EX EDF
DREXP
# SYSDF
# EX EDF
DRE IF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EXEDF
# EXEDF
# EXEDF
# EX EDF
# EX EDF
# EXEDF
ERROR
ERROR
# SYSCM
# SYSCM
# SYSCM
# SYSCM
DTDRV
ERROR
# SYSDF
DBDRV
# EX EDF
SYSXT
AO ORV
DTORV
ICDRV
TOSCH
DBDRV
DX ORV
SYSXT
# SYSTB
ICDRV
# EXEOF
DB ORV
OX ORV
TTORV
# EXEOF
IOSUB
DBDRV
OX ORV
MMD RV
ERROR
TOSCH
ERROR
ERROR
DBDRV
# EX EDF
TTDRV
# EXEOF
# EXEOF
# EXEOF
# EXEOF
# SYSDF
# EX EDF
# SYS OF
# EX EDF
# EXEDF

# SYSDF
# SYSOF
ORRES
SYSXT
# SYSDF
DRREG
# SYSDF
# SYSDF
# SYSDF
# SYSDF.
# SYSDF
# SYSDF
# SYSDF
# SYSDF
# SYSDF
# SYSDF
# EXEDF
# EX EDF

ERROR
TD SCH

LOADR
TTDRV

REQSB

# SYSDF

IO SUB

SYSXT

# EX EDF
IO SUB

# SYSDF
# SYSDF

SYSXT
SYSXT

DKDRV
IO SUB
TOSCH
DBDRV
DX ORV
IN I TL
TTDRV
DKDRV
# EX EDF
TOSCH
TTDRV

DMORV
MMD RV

ORD RV
POWER

OXDRV
# SYSOF

OKDRV
ERROR
LPORV

OMO RV
# EXEOF

MMORV

ORO RV
GRORV
# SYSOF

OMO RV
LPDRV
TTORV

ORO RV
MMD RV

# SYSOF

IO SUB
OK ORV
# EXEOF

# SYSOF

SYSXT
ORO RV
MMORV

OTO RV
# SYSOF

OMO RV
# EXEOF
TT ORV
IO SUB

ORO RV
IO SUB

OTDRV
LP ORV

# SYSOF

SYSXT

ERROR
# EX EDF

# SYSOF
# SYSDF
DK ORV
ERROR
# SYS OF
# EX EDF
TTDRV
# EXEDF
# EXEOF
DK ORV
IO SUB

OMDRV
LP ORV

IO SUB
IO SUB
DMD RV
LP ORV

# SYSOF
TTDRV
TTORV
GRORV

TT ORV

GRORV

TTORV

TTDRV
TTDRV

9-21

REQSB

DTORV

# SYSOF

# SYSDF

ORO RV
MM ORV

OTO RV
# SYSDF

CROSS-REFERENCES
Symbol

Value

T.ST2
T.ST3
T2.ABO
T2.AST
UC.KIL
UC.LGH
UC.NPR
UC.PWF
UC.QUE
UISARO
UISORO
US.BSY
US.CRW
US.DSB
US.ECH
OS.FOR
US.LAB
US.MOM
US.MNT
US .OFL
US.OUT
US.PUB
US.SPU
US.OMO
US.WCK
U.ACP
U.ATT

000034
000036
000100
100000
000004
000003
000100
000'020
000040
177640
177600
000200
000004
000010
000002
000040
000004
000020
000100
000001
000001
000004
000002
000010
000010
000032
000022

U.BUF

000024

U.CNT

000030

U.CTL
O.CWl

000004
000010

U.CW2

000012

U.CW3
U.CW4
U.DMCS
U.OWN
U.RED
U.SCB

000014
000016
000064
177776
000002
000020

U.STS

000005

U.ST2

000007

U.UNIT

000006

U.VCB
U2.CRT
02.ESC
U2.HLO
02.LOG
02.LWC
V$$CTR

000034
002000
001000
000040
000400
000001
000400

Modules That Reference Symbol
# EXEOF·
EXEOF
EXEOF'
# EXEOF
# EX EDF'
ORQIO
# · EXEDF'
# EXEOF'
DRQIO
DRMAP·
DRMAP'
# EX EDF'
# EX EDF'
# EX EDF'
# EX EDF'
DRQIO
ORQIO
DRQIO
ORQIO
DRQIO
# EX EDF'
ORQIO
DBDRV'
DRQIO
DBORV
DRRES
DRASGI
TTORV
AO ORV
DRORV
LPORV
AODRV
DTDRV
MMD RV
DRQIO
DRGLI
IOSUB
ADD RV
IOSUEi
DMD RV
# EX EDF'
# SYSTE:
DRQIO
# EX EDF'
DBDRV
DRRES
IN I TI,
TTDRV
DBDRV
DRRES
TOSCH
DRQIO
TTDRV
DBDRV
EX EDF'
#
DRE IF'
# EXEOF'
# EXEOF'
# EXEOF'
# EXEOF'
# EXEOF'
# SYS OF'

*·
*

GRDRV
ICDRV
GRDRV
GRDRV
IOSUB
# EXEDF
IOSUB
POWER
# EX EDF
EX EDF
# EXEDF
IO SUB
TTDRV
TTDRV
TTDRV
DRRES
# EX EDF
# EXEOF
DRRES
# EX EDF
TTDRV
# EX EDF
DKDRV
# EXEOF
DKDRV
# EXEOF
DRE IF

TT ORV
TT ORV
TTDRV

TTDRV

# EXEOF
MM ORV

IO SUB

# EXEOF
IN I TL

IOSUB
POWER

TTORV

DMORV
IOSUB
DMORV
IO SUB
# EXEOF

ORD RV

# EX EDF

ORO RV

# EXEDF

BFCTL
OTDRV
MMD RV
DBDRV
DXDRV
TTDRV
# EXEDF
DRQIO

DBDRV
OXDRV
TTORV
DKDRV
# EX EDF

DKDRV
# EXEOF

OMDRV
IO SUB

DMORV
IOSUB

DRDRV
LPDRV

IOSUB
DRRES

POWER
# EX EDF

IN I TL

DBDRV
LPDRV
# EX EDF
LPDRV
TTDRV
# EXEDF
IO SUB
DKDRV
DTDRV
IO SUB

DMD RV
MMD RV
IO SUB
TTDRV

DTDRV
TTDRV
MMORV

# EX EDF

DMD RV
DXDRV
LPDRV

DRDRV
# EX EDF
MMD RV

DRQIO
ICDRV
SYSXT

DKDRV
# EX EDF
TTDRV
# EX EDF

DMD RV
IO SUB

DRDRV
MMD RV

DRQIO
POWER

IN I TL

IO SUB

POWER

DKDRV
IO SUB
DRQIO
TTDRV
TTDRV
TTDRV
TTDRV
TTDRV

DMD RV
MMD RV
DTDRV

DRDRV
TTDRV
# EX EDF

DXDRV

9-22

IO SUB

TTDRV

MMD RV

CROSS-REFERENCES
Symbol

Value

W.BATT
W.BLGH
W.BOFF
X.AST
X.DSI
X.FORK
X.ISR
X.JSR
X.LEN
X.LNK
X.PSW
X.REL
X.TCB
X.VEC
X.VPC
$ABCTK
$ABTIM
$ABTSK
$ACHCK

000006
000020
000012
000032
000024
000012
000010
000002
000050
000000
000006
000022
000026
000044
000046
016370-R
006174-R
016374-R
007704-R

$ACHKB
$ACHKP

007712-R'
007650-R

$ACHKW
$ACTHO

007674-R
006172-R

$ACTRM
$ACTTK
$AOTBL
$ALCLK
$ALEB1
$ALEMB
$ALOCB

017102-R
016562-R
075350-R
007300-R
034644-R
034630-R
007166-R

$ALOC1
$ALPKT
$ASUMR
$BILOS
$BLKCK

007230-R
007314-R
013154-R
016450-R
010640-R

$BLKC1
$BLXIO
$BMSET

010650-R
006650-R
034740-R

$BTMSK
$BTSTP
$CEFI
$CEFN
$CFLPT
$CHKPT
$CLKHD
$CLPAR
$CLRMV
$CMBEG
$CMEND
$COMEF
$COPT
$CRALT
$CRASH
$CRATT
$CRAVL

006264-R
002626-R
010024-R
010020-R
006212-R
020136-R
006232-R
014666-R
016174-R
006116-R
006430-R
006122-R
006234-R
001674-R
001664-R
036034-R
006166-R

Modules That Reference Symbol
# EX EDF
# EXEDF
# EX EDF
# SYSOF
# SYSDF
# SYSDF
# SYSDF
# SYSDF
# SYSOF
# SYSDF
# SYSDF
# SYS OF
# SYSDF
# SYSDF
# SYSOF
DRATX
QUEUE
DRABO
ADO RV
SYSXT
DRQIO
ORO SP
DRMAP
DRS ST
ORE IF
TOSCH
DRE IF
DRRES
# ADD RV
# CORAL
# ERROR
# ERROR
# CORAL
ERROR
REQSB
# CORAL
# CORAL
# IO SUB
LOADR
DB ORV
# IO SUB
DMD RV
# BFCTL
DBDRV
# ERROR
DRQIO
# CRASH
DRQIO
DROSP
REQSB
DREXP
QUEUE
# PARTY
DRCMT
# SYSCM
# SYSCM
DRS ED
REQSB
# CRASH
# CRASH
DRMAP
CORAL

TTORV
TTDRV
TTDRV

DRE IF
# SYS CM
LOADR
DRATX

# REQSB
TOSCH
PARTY
DRQIO

SST SR

SYSXT

# REQSB
# IOSUB

SSTSR

# IO SUB
DRGLI
DRRAS
# IO SUB
ORSEO

TTDRV
DRGPP
DRS ED

DRGTK
# IOSUB

DRGTP

POWER

REQSB

# SYSCM

DRRES
LOAOR

# REQSB
# REQSB

ORMKT

ORPUT

PARTY
OMDRV
GRORV
TTDRV

POWER
ORE IF
IO SUB

DRQIO
LOA DR

DRREG
PL SUB

ORMAP

DRQIO

DRRAS

# REQSB
DK ORV

DMD RV

ORD RV

DTDRV

DRDRV

# IO SUB

DK ORV
MMD RV
IO SUB
PANIC
GRDRV
DRMAP
# SYSCM
LOAOR
# SYSCM
POWER
# QUEUE

DMD RV

ORD RV

DXDRV

# SYSCM

SYSTB

TTORV

# IO SUB
DRQIO

REQSB
# IO SUB

IOSUB
# SYSCM
EXDBT
LOWCR
DRREG
IN I TL

9-23

# REQSB
TOSCH

REQSB

# SYSCM

SST SR
LOADR
# SYSCM

# PLSUB

CROSS-REFERENCES
Symbol

Value

$CRLF
$CRPAS

052566-R
013634-R

$CRPBF
$CRPST
$CRSBF
$CRSBN
$CRSCS
$CRSHT
$CRSST
$CRSUN
$CRUPC
$CRUST
$CURPR
$CVRTM
$C5TA
$DASTT

001114-R
001160-R
001124-R
001656-R
001662-R
002404-R
001654-R
002410-R
000632-R
000634-R
006121-R
007532-R
006430-R
016740-R

$DBINT
$DBTBL
$DB0
$DEACB

051340-R
050634-R
104756-R
007334-R

$DEAC1
$DECLK
$DEPKT

007374-R
007306-R
007330-R

$DETRG
$DEUMR
$DEVHD
$DEVTB
$DHINP
$DHOUT
$DIRSV
$DIRXT
$DIV

033512-R
013272-R
006204-R
104512-R
045132-R
044600-R
002634-R
003100-R
013730-R

$DKINT
$DKTBL
$DPLM1
$DPLM2
$DQLM1
$DQLM2
$DQUMR
$DRABO
$DRASG
$DRATP
$DRATR
$DRATX
$DRCEF
$DRCMT
$DRCRR
$DRCRW
$DRCSR
$DRDAR
$DROCP
$DRDSE

062702-R
062272-R
023610-R
023614-R
030472-R
030502-R
013472-R
024066-R
024112-R
034030-R
033176-R
024336-R
034350-R
024504-R
032610-R
026052-R
024510-R
024524-R
024560-R
034360-R

$DRDTR
$DREAR
$DRECP
$DREIF

033360-R
024540-R
024604-R
004674-R

Modules That Reference Symbol
CRASH
DBDRV
MMD RV
# CRASH
# CRASH
# CRASH
# -CRASH
# CRASH
# CRASH
# CRASH
# CRASH
# CRASH
# CRASH
REQSB
# CVRTM
# C5TA
DRE IF
# REQSB
# DBDRV
# DBDRV
# SY STE
# CORAL
IN I TL
# CORAL
# CORAL
# CORAL
IO SUB
DRE IF'
# IOSUE;
DRASG
SYSCM
# TTDRV
# TTDRV'
DRDSP'
INITL.
C5TA
DRGLI
# DK ORV
# DK ORV
# DRDSP'
# DRDSP'
# DRQIO
# DRQIO
# IO SUB
# DRABO
# DRASG
DRDSP
ORD SP
# DRATX
DRDSP
# DRCM'JI
DRDSF'
ORD SP
# DRCM'l'
# DRDAR
# DROCP
DROS:t1
# DRS ED
DRDSP
# DRDAFt
# DRDCP
DRDSP

# PANIC
DKDRV

DTDRV

# IOSUB

DRRAS

LOA DR

POWER

OMO RV
LOADR

DRE IF
REQSB

DRGCL
SYSXT

DRREG
TTDRV

DRPUT
DREIF

QUEUE
DRMAP

TD SCH
DRQIO

DRRAS

INITL
# SYS TB

IO SUB

# SYSCM

PARTY
# SYSXT
DBDRV
EXDBT

SST SR

# SYSXT

DKDRV
IN I TL

DMD RV
# IO SUB

ORD RV

EXDBT
EXDBT
EXDBT
EXDBT

SSTSR
SSTSR
SSTSR
SSTSR

DRRAS
TD SCH

DRRES

EXDBT
EXDBT
# SYS CM
ORMKT
DREIF
DRMAP
SSTSR

DRDRV

SYSXT

# DRREG

ORD SP
DRDSP
# DRRES
# DR.REG
ORD SP
# DRS ED
DRDSP
# DRREG
# DRMAP
DR.DSP
DRDSP
DRDSP
DRE IF
POWER
# DRREG
ORD SP
ORD SP
# DRE IF

9-24

DRE IF

DRMAP
REQSB

CROSS-REFERENCES
Symbol

Value

$DRELW
$DREXP
$DREXT
$DRFEX
$DRGCL
$DRGLI
$DRGMX
$DRGPP
$DRGSS
$DRGTK
$DRGTP
$DRINT
$DRLM1
$DRLM2
$DRMAP
$DRMKT
$DRPUT
$DRQIO
$DRQRQ
$DRRAF
$DRRCV
$DRREC
$DRREQ
$DRRES
$DRSPN
$DRSRF
$DRSTV
$DRTBL
$DRUNM
$DRWFL
$DRWFS
$DRWSE
$ORO
$DS0
$DTINT
$DTOER

026300-R
024630-R
004702-R
030066-R
025354-R
025462-R
027472-R
025564-R
025666-R
025676-R
026016-R
047202-R
023514-R
023534-R
026334-R
027716-R
030110-R
030376-R
031472-R
034374-R
030150-R
032262-R
033724-R
033756-R
034016-R
026704-R
034550-R
046372-R
026660-R
034460-R
034522-R
034444-R
105470-R
105672-R
071066-R
034764-R

$DTTBL
$OTO
$DVCER
$DVERR

070444-R
106214-R
035026-R
035026-R

$DVMSG
$DXINT
$DXTBL
$DXO
$DYPMN
$EDIT
$EMSST
$EMTRP
$ERRHD
$ERRLM
$ERRPT
$ERRSQ
$ERRSV
$ERRSZ
$EXRQF
$EXRQN
$EXRQP
$EXSIZ
$FINBF
$FLTRP

010110-R
074122-R
073532-R
106424-R
006250-R
052614-R
021070-R
023440-R
006324-R
006330-R
006210-R
006332-R
006334-R
006336-R
020344-R
020362-R
020336-R
006150-R
004452-R
021124-R

Modules That Reference Symbol
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
# DRDRV
# DRDSP
# DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRE IF
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
DRDSP
# DRDRV
DRDSP
DRDSP
DRDSP
DRDSP
# SYS TB
# SYS TB
# DTDRV
DBDRV
DXDRV
# DTDRV
# SYS TB
# ERROR
DBDRV
DXDRV
DTDRV
# DXDRV
# DXDRV
# SYSTB
# SYSCM
CRASH
DRDSP
# DRDSP
ERROR
ERROR
ERROR
DMD RV
# SYSCM
ERROR
IO SUB
DRE IF
IO SUB
CORAL
DRE IF
EXDBT

# DRMAP
# DREXP
# DREIF
# DRPUT
# DRGCL
# DRGLI
# DRMAP
# DRGPP
# DRGSS
# DRGTK
# DRGTP

EXDBT
EXDBT
# DRMAP
# DRMKT
# DRPUT
# DRQIO
# DRQIO
# DRS ED
# DRPUT
# DRRAS
# DRREQ
# DRRES
# DRRES
# DRMAP
# DRS ST

DR MAP

DRRAS

SYSXT

SSTSR
SSTSR

# DRMAP
# DRS ED
DRQIO
# DRS ED

# DRSED

DKDRV
# ERROR

DMD RV
MMD RV

DRDRV

DTDRV

DKDRV
# ERROR
# IO SUB

DMD RV
MMD RV
LOADR

DRDRV

DTDRV

LPDRV

MMD RV

TD SCH
# PANIC
# SSTSR
EXDBT
# SYSCM
# SYSCM
# SYSCM
ERROR

LOWCR

# SYSCM
QUEUE
# REQSB
# REQSB
# SYSCM
# SYSXT
# SST SR

9-25

# SYSCM
# REQSB
TOSCH

TTDRV

CROSS-REFERENCES
Symbol

Value

$FMASK
$FNDSP
$FORK

006226-R
017660-R
002670-R

$FORKO
$FORK1
$FPPRQ
$FPPR7
$FPPR8
$FRKHD
$GRFRK
$GTWRD
$HEADR

002712-R
002710-R
021146-R
021124-R
021132-R
006222-R
000000
006616-R
006116-R

$ICHKP
$ICINT
$ICTBL
$IDLCT
$IDLFL
$IDLPT
$!LINS
$INITL
$INTCT
$INTSE
$INTSV

020070-R
075320-R
074676-R
006244-R
006245-R
006246-R
021232-R
117656-R
006220-R
002762-R
003020-R

$INTXT
$INTX1
$IOABM
$IOALT
$!ODON

002760-R
003042-R
006340-R
010736-R
010740-R

$IOFIN

011116-R

$IOKIL
$IOTRP
$ISINT
$ISTBL
$LCKPR
$LDPWF
$LDRPT
$LOADR
$LOADT
$LOGHD
$LPINT
$LPTBL
$LPO
$LSTLK
$MAPTK
$MCRCB
$MCRPT
$MMINT
$MMTBL
$MMO
$MPCSR
$MPCTL
$MPLND
$MPLNE
$MPLUN
$MPPHY
$NLO

011374-R
021244-R
075666-R
075570-R
012314-R
016034-R
006240-R
102600-R
020332-R
006156-R
067622-R
067464-R
106546-R
006162-R
020746-R
006160-R
006206-R
054762-R
053406-R
106746-R
014130-R
014126-R
011634-R
011614-R
011576-R
011676-R
117070-R

Modules That Reference Symbol

# SYS CM
ORREG
OBORV
DX ORV
IOSUB
ERROR
·IN I TL
POWER
IN I TL
f SYSCM
GRDRV
# BFCTL
DRATX
LOADR
SYSXT
IO SUB
# I CD RV
# ICDRV
# SYS CM
# SYSCM
# SYSCM
EXDBT
EXDBT
# SYSCM
# SYSXT
ERROR
UODRV
NLDRV
t SYSXT
DTORV
# IOSUB
DBDRV
OXDRV
ADD RV
I SD RV
DRASG
EXOBT
# I SD RV
# I SD RV
# IOSUB
# POWER
IOSUB
# LOA OR
# REQSB
DRASG
# LPDRV
# LPDRV
# SYS TB
DRE IF'
DREXP
ORGCL
QUEUE:
# MMD RV
# MMD RV
# SYSTB
# PARTY
# PARTY'
DRASG
OREIF'
ORASG
DRQIO
# SYS TB

# REQSB
OKDRV
LPORV
SSTSR
GRDRV
# SST SR
# SST SR
# SSTSR
SYSXT

ORD SP
PARTY
SYTAB
# REQSB

DMORV
MMD RV
# SYSXT
# SYSXT

ORD RV
# SYSXT
TOSCH

DTDRV
TTORV

ORE IF
POWER

ORRAS
SSTSR

IO SUB
# SYSCM

# SYSXT

TOSCH

SYSXT
SYSXT
SYSXT
LOWCR
# IN I TL
TOSCH

# SSTSR

GRDRV

SSTSR

# SYSXT

UDO RV

ERROR
TTDRV
DKDRV
# IOSUB
ORQIO
NLDRV
DREIF
LOWCR

# SYSCM

SYSXT

DMD RV
LP ORV
GRDRV
SYSXT
DRQIO
# SSTSR

DRORV
MMD RV
ICDRV
TTDRV
# IO SUB

REQSB
SYTAB

# SYSCM

# SYS CM

LOAOR
# SYSCM
# SYSCM

POWER
POWER
DRQIO
DRRES
DRGLI
GRDRV

9·-26

# REQSB

# IO SUB
# IOSUB
DRQIO
# IO SUB

# IOSUB

OTDRV
TT ORV
# IOSUB
UDDRV

CROSS-REFERENCES
Symbol

Value

$NONSI
$NSO
$NS1
$NS2
$NS3
$NS4
$NS5
$NS6
$NS7
$NXTSK

003142-R
035310-R
035316-R
035324-R
035332-R
035340-R
035346-R
035354-R
035362-R
017232-R

$OUT
$0UTB
$PANIC
$PARBO
$PARPT
$PARTB
$PCBS
$PKAVL
$PKMAX
$PKNUM
$POOL
$POWER
$PTBYT
$PTWRO
$PWRFL
$QASTT
$QEMB
$QINSF

052664-R
052660-R
052562-R
006236-R
006230-R
014034-R
117426-R
006410-R
006413-R
006412-R
117552-R
015664-R
006570-R
006616-R
006152-R
016772-R
035526-R
016242-R

$QINSP

016250-R

$QMCRL
$QRMVF

016306-R
016316-R

$QRMVT
$RELOC

016330-R
012764-R

$RELOM
$RELOP
$RLMCB
$RLPAR
$RLPR1
$RQSCH
$SAVNR
$SCOVT
$SCDV1
$SETCR
$SETF
$SRATT
$SRNAM
$SRSTD
$SRWND
$STACK

013034-R
013554-R
025416-R
017156-R
017220-R
006200-R
004620-R
013050-R
013054-R
016614-R
016674-R
036134-R
035654-R
017042-R
036172-R
000632-R

$STD
$STKDP
$STMAP
$STPCT
$STPTK
$SWSTK
$SYBEG

117462-R
006202-R
013316-R
017132-R
017136-R
004640-R
120756-R

Modules That Reference Symbol
IN I TL
# ERROR
# ERROR
# ERROR
# ERROR
# ERROR
# E·RROR
# ERROR
# ERROR
ORATX
# REQSB
CRASH
CRASH
# PANIC
PLSUB
# SYS CM
IN I TL
SYSCM
CORAL
CORAL
# SYSCM
CORAL
# POWER
# BFCTL
AO ORV
POWER
# REQSB
# ERROR
ORMAP
IOSUB
ORQIO
REQSB
OREIF
DRE IF
# QUEUE
DRRAS
ADO RV
TTDRV
DRATX
DBDRV
DREIF
DRE IF
DRREG
ORS ED
ERROR
# IO SUB
# IO SUB
DRRES
DRRAS
DRGPP
DRGPP
DRDSP
DRMAP
CRASH
SYSXT
SYSCM
DRDSP
OKDRV
LOADR
# REQSB
DRDSP
# IN I TL

LOWCR
LOWCR
LOWCR
LOWCR
LOWCR

# SYSXT

OROCP
TOSCH
# PANIC
# PANIC

OREXP

# SYSCM

TOSCH

# PARTY
# SYTAB
# SYS CM
# SYSCM

SYSCM

DRRES

IOSUB

SYSXT
TTORV
PARTY
DRRES
# QUEUE
LOADR

POWER
ERROR
REQSB
PL SUB

GRDRV

TTDRV
DRRES

LOADR

DRRES
GRDRV

# QUEUE
# IOSUB

REQSB
SYSXT

DRQIO
DMD RV
# DRGCL
LOADR
# REQSB
POWER
IO SUB
POWER

# IO SUB
DRDRV

SST SR
# IOSUB

SYSXT

REQSB
LOAOR
TOSCH

# SYSCM
REQSB

SYSXT
# SYSXT

GRDRV
IO SUB
DRMAP
DRREG
# REQSB
# PL SUB
DROSP

IO SUB
# REQSB
DRREG
# PL SUB

# REQSB

# IN I TL
SYSXT
TTDRV
# BFCTL
# SYSCM
TOSCH
IO SUB
DRRAS
PL SUB
DRRES
TTORV
# QUEUE
DRMAP
SYSXT
DRREG
DRQIO

# QUEUE

# REQSB

# PL SUB

IN I TL

# LOWCR

SSTSR

SSTSR
DTDRV

# SYSCM
# IO SUB

SYSXT

# SYTAB

EXDBT
DMD RV
# REQSB
TTDRV
# SYSXT
SYSCM

9-27

CROSS-REFERENCES
Symbol

Value

$SYSID
$SYSIZ
$SYTOP
$SYUIC
$TKNPT
$TKPS

006126-R
006342-R
124756-R
006144-R
006132-R
006370-R

$TKTCB

006176-R

$TKWSE
$TRACE
$TRP04
$TRTRP
$TSKHO
$TSKRP
$TSKRQ
$TSKRT
$TSTCP
$TTNS
$TTTBL
$TTO
$TT1
$TT10
$TT11
$TT12
$TT13
$TT14
$TT15
$TT16
$TT17
$TT2
$TT20
$TT21
$TT22
$TT23
$TT24
$TT25
$TT26
$TT27
$TT3
$TT30
$TT31
$TT32
$TT33
$TT34
$TT35
$TT36
$TT37
$TT4
$TT40
$TT41
$TT42
$TT43
$TT44
$TT45
$TT46
$TT47
$TT5
$TT50
$TT51
$TT52

034440-R
021324-R
021336-R
023374-R
006242-R
020414-R
020412-R
020406-R
017762-R
006406-R
044570-R
107130-R
114556-R
115046-R
115076-R
115126-R
115156-R
115206-R
115236-R
115266-R
115316-R
114626-R
115346-R
115376-R
115426-R
115456-R
115506-R
115536-R
115566-R
115616-R
114656-R
115646-R
115676-R
115726-R
115756-R
116006-R
116036-R
116066-R
116116-R
114706-R
116146-R
116176-R
116226-R
116256-R
116306-R
116336~R

116366-R
116416-R
114736-R
116446-R
116476-R
116526-R

Module:; That Reference Symbol
EXOB~l'

INITJ:,
# INITJC.
# SYSCM
OREU'
CVRTM
· TTORV
OROS:!?
LOAO:R
SYSX'r
OREI.f!'
EXOB'r
EXOB'r
# ORO SP
REQSB
ORREQ
# REQSB
ERROR
# REQSB
DRGTP
# TTORV
# SYSTB
# SYSTB
# SYSTB
# SYS TB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
# SYS TB
# SYS TB
# SYSTB
# SYSTB
# SYS TB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYSTB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
# SYSTB
# SYS TB

IN I TL
# SYSCM
SYSCM

# SYSCM

IOSUB
ORGTP

REQSB
IN I TL

# SYSCM
# SYSCM

TOSCH

ORE IF
PARTY

ORQIO
REQSB

ORSEO
SSTSR

IO SUB
# SYSCM

ORQIO
LOWCR
LOWCR
EXOBT
# SYSCM
# REQSB

# ORSEO
# SST SR
# SST SR
LOWCR

LOAOR

# REQSB

TOSCH

ERROR

PARTY

9-28

# SYSCM

TOSCH

CROSS-REFERENCES
Symbol
$TT53
$TT54
$TT55
$TT56
$TT57
$TT6
$TT60
$TT7
$UDINT
$UDTBL
$UISET
$UMRHD
$UMRWT
$UNMAP
$USRTB
$WTUMR
$XDT
.CLO

.coo

.DBO
.DBl
.DB2
.DB3
.DKO
.DKl
.DK2
.OTO
.DTl
.DT2
.DT3

.oxo

.DXl
.LBO
.LOR
.LDRHD
.LPO
.MMO
.MMl
.NLO
.SYO
.TIO
.TTO
.TTl
.TTlO
.TTll
.TT12
.TT13
.TT14
.TT15
.TT16
.TT17
.TT2
.TT20
.TT21
.TT22
.TT23
.TT24
.TT25
.TT26
.TT27
.TT3
.TT30

Value
116556-R
116606-R
116636-R
116666-R
116716-R
114766-R
116746-R
115016-R
050560-R
050472-R
020706-R
006416-R
006424-R
036232-R
000000
013516-R
076362-R
117220-R
117174-R
104552-R
104612-R
104652-R
104712-R
105054-R
105114-R
105154-R
105770-R
106034-R
106100-R
106144-R
106320-R
106360-R
117244-R
117462-R
117302-R
106514-R
106636-R
106700-R
117036-R
117270-R
117150-R
107046-R
107222-R
110050-R
110142-R
110234-R
110326-R
110420-R
110512-R
110604-R
110676-R
107314-R
110770-R
111062-R
111154-R
111246-R
111340-R
111432-R
111524-R
111616-R
107406-R
111710-R

Modules That Reference Symbol
# SYSTB
# SYSTB
# SYS TB
# SYSTB
# SYS TB
# SYS TB
# SYSTB
# SYS TB
# UDDRV
# UDDRV
DRMKT
IOSUB
IOSUB
DRMAP
SYSTB
# IOSUB
# EXDBT
# SYS TB
SYSCM
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
IN I TL
SYSCM
# SYTAB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
IN I TL
# SYSTB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYS TB
# SYSTB
# SYS TB
# SYSTB
# SYS TB
# SYSTB
# SYSTB
# SYS TB
# SYSTB

ORREQ
# SYSCM
# SYSCM
DRREG

# REQSB
# PL SUB

# SYSTB

# SYS TB
# SYTAB

SYTAB

# SYSTB

SYTAB

9-29

CROSS-REFERENCES
Symbol
.TT31
.TT32
.TT33
.TT34
.TT35
.TT36
.TT37
.TT4
.TT40
.TT41
.TTS
.TTSO
.TTSl
.TT52
.TT53
.TT54
.TTSS
.TT56
.TT57
.TT6
.TT60
.TT7

9.3

Value
112002-R
112074-R
112166-R
112260-R
112352-R
112444-R
112536-R
107500-R
112630-R
112722-R
107572-R
113550-R
113642-R
113734-R
114026-R
114120-R
114212-R
114304-R
114376-R
107664-R
114470-R
107756-R

Modules That Reference Symbol
i SYSTH
# SYSTB
# SYSTH
i SYSTH
# SYSTH
# SYSTH
#·SYSTH
# SYSTH
# SYSTH
# SYSTH
# SYSTH
# SYSTB
# SYSTH
# SYSTU
# SYSTU
# SYSTH
# SYSTU
# SYSTH
# SYSTU
# SYSTH
# SYSTH
# SYSTES

MCRMU GLOBAL CROSS-REPERENCE

This cross-reference is for a mapped system.
The cross-reference contains an alphabetic listing of each global
symbol along with its value and the name of each referencing module.
When a symbol is defined in several segments within an overlay
structure,
TKB prints the last defined value in the listing.
Similarly, in a real TKB cross-reference listing, TKB would print the
module name more than oncE! for each symbol if the module is loaded in
several segments within the structure.
The Task Builder creates an MCRMU.CRF cross-reference file when /CR is
specified in the Task Builder command file used to build MCRMU. One
of the input files to the Task Builder when building MCRMU is the
Executive symbol table file, RSXllM.STB. RSXllM.STB is needed because
MCRMU references some E>~ecutive symbols.
All the symbols from
RSXllM.STB are put in the MCRMU.CRF symbol table file even though they
are not referenced by MCR. Therefore, some symbols appearing here in
the MCRMU cross-reference are defined in the Executive but not used by
MCRMU. These symbols are shown defined in the Executive LOWCR or
EXEDF modules.
The value contains the suffix -R if the symbol is relocatable.

9-30

CROSS-REFERENCES
Pref ix symbols accompanying
reference as follows:
Pref ix
Symbol

each

module

name

define

type

Reference Type

blank

Module contains a reference that is resolved in the
same segment or in a segment toward the root.

Module
contains a reference that
directly in a segment away from the
co-tree.

is resolved
root or in a

Module
contains a reference
through an autoload_vector.

that

Module
contains a non-autoloadable
This module defines the symbol.
Module contains an autoloadable
module defines the symbol.

*
Symbol

the

Value

C.SCHD
DV.PSE
DV.TTY
DV.UMD
D$$YNM
D.DSP
D.LNK
D.MSK
D.NAM

000002
010000
000004
000200
000000
000012
000000
000014
000004

D.PCB
D.RSOO
D.RSl
D.RSlO
D.RS16
D.RS17
D.RS19
D.RS2
D.RS22
D.RS5
D.RS6
D.RS7
D.RS8
D.RS80
D.RS81
D.RS84
D.RS85
D.RS86
D.RS87
D.RS90
D.RS92
D.RS93
D.RS94
D.RS95
D.RS96
D.RS97
D.RS98
D.RS99
D.UCB

000034
000000
177777
177766
177760
177757
177755
177776
000002
177773
177772
177771
177770
177660
177657
177654
177653
177652
177651
177646
177644
177643
177642
177641
177640
177637
177636
177635
000002

resolved

definition.

This

Modules That Reference Symbol
# EXEDF

FIXOV

# EXEDF
# EXEDF
# EXEDF
# LOWCR
# EXEDF
# EXEDF
# EXEDF
# EXEDF
MCRDIS
# EXEDF
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EXEDF

# LOWCR
# LOWCR
# LOWCR

# LOWCR
FIXOV
# LOWCR
FIXOV

FMTOV

GTTSK

# LOWCR

FMTDV

GTMNM

# LOWCR

FIXOV

9-31

CROSS-REFERENCES
Symbol
D.UCBL
D.UNIT
D.VCAN
D.VINI
D.VOUT
D.VPWF
EC.OTO
EC.DVC
EC.NS!
E.LGTH
E.OPC
E.RTRY
E.SIZE
FE.CAL
FE.MOP
FE.MXT
FE.PLA
H.HDLN
H.LUN
H.WND
IE.ABO
IE.ALN
IE.BAD
IE.BLK
IE.BYT
IE.DAA
IE.DNA
IE.DNR
IE.EOF
IE.IFC
IE.LCK
IE.NLN
IE.NOD
IE .OFL
IE.CVR
IE .PRI
IE.SPC
IE.ULK
IO.ATT
IO.CLN
IO.DET
IO.KIL
IO.LOV
IO.NLK
IO.RLB
IO .RVB
IO.ULK
IO.WLB
IO.WVB
IQ.UMD

rs .sue

KISAR5
KISAR6
L.ASG
L.NAM
L.TYPE
L.UCB
L.UNIT
M$·$MGE
P.ATT
P.BLKS
P.BUSY

Value
000010
000006
000002
000000
000004
000006
000140
000001
000141
000056
000022
000016
000000
000040
000002
040000
000020
000002
000076
000044
177761
177736
177777
177754
177755
177770
177771
177775
177766
177776
177745
177733
177751
177677
177756
177760
177772
177653
001400
003400
002000
000012
001010
011400
001000
010400
005000
000400
011000
000004
000001
172352
172354
000010
000002
000005
000006
000004
000000
000036
000016
000024

Modules That Reference Symbol
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EX EDF
i EX EDF
i EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
MC RD IS
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
LNlOV
# LOWCR
# LOWCR
ERROV
# LOWCR
FIXOV
LNlOV
# LOWCR
# LOWCR
# LOWCR
ERROV
# LOWCR
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
FIXOV
# EXEDF
# EX EDF

FIXOV
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
MC RD IS
FIXOV
MCRDIS
FIXOV
FIXOV
FIXOV
MC ROOT

FMTDV
FMTDV

GTMNM
GTMNM

MCRDIS
MCRDIS

# LOWCR

LUNOV
MC RD IS
# LOWCR

LNlOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR

9-32

# LOWCR

MCRDIS

i LOWCR
i LOWCR

CROSS-REFERENCES
Symbol
P.HDR
P.IOC
P.LGTH
P.LNK
P.MAIN
P.NAM
P.OWN
P.PRI
P.PRO
P.REL
P.SIZE
P.STAT
P.SUB
P.swsz
P.TCB
P.WAIT
SP.EIP
SP.ENS
S.BMSK
S.BMSV
S.CCB
S.CON
S.CSR
S.CTM
S.DZCK
S.FRK
S.ITM
S.LHD
S.MPR
S.PKT
S.PRI
S.RCNT
S.ROFF
S.STS
S.VCT
TS.EXE
TS.OUT
T.ACTL
T.ATT
T.CPCB
T.DPRI
T.EXT
T.LGTH
T.MXSZ
T.NAM
T.OFF
T.PCB
T.PRI
T.RCVL
T.RRFL
T.STAT
T.ST2
T.ST3
T.TCBL
T.UCB
T2.ABO
T2.BFX
T2.CHK
T2.CKD
T2.FXD
T3.ACP
T3.MCR

Value
000032
000003
000042
000000
000012
000004
000026
000002
000034
000014
000016
000030
000010
000022
000026
000020
000001
000002
177776
177774
000030
000010
000012
000006
000030
000016
000007
000000
000030
000014
000004
177772
177773
000011
000005
100000
000400
000052
000054
000004
000040
000000
000070
000050
000006
000060
000046
000002
000012
000064
000032
000034
000036
000030
000026
000100
004000
020000
010000
002000
100000
004000

Modules That Reference Symbol
FIXOV
# EXEOF

FIXOV
# EX EDF
# EX EDF
# EXEOF
# EX EDF
# EX EDF
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# EX EDF
# EXEDF
# EX EDF
# LOWCR
# EX EDF
# EX EDF
# EXEDF
# LOWCR
# EXEDF
# EX EDF
# EX EDF
# EXEOF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
FIXOV
# EX EDF
ABOOV
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
ABOOV
ABOOV
ABOOV
# EX EDF
ABOOV
ABOOV
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
FIXOV
MC RD IS
FIXOV
MCRDIS
MCRDIS
# LOWCR
FIXOV
# EXEDF
MCROIS
FIXOV
MCRDIS
FIXOV
FIXOV
# EX EDF
# EXEDF
# EX EDF
FIXOV
# EX EDF
# EX EDF
FIXOV
FIXOV
LKLST
FIXOV
MCRDIS
MC RD IS

9-33

MCRDIS
MC RD IS

MCRDIS
FIXOV
LKLST

MCRDIS

MCRDIS
FIXOV
FIXOV
FIXOV
MC RD IS
GTMNM
MCRDIS

MCRDIS
LKLST
MCRDIS

MC RD IS

GTTSK

MCRDIS

•=ROSS-REFERENCES

Symbol
T3.PMO
T3.PRV
T3.REM
T3.RST
T3.SLV
UC.ATT
UC.KIL
UC.LGH
UC.NPR
UC.PWF
UC.QUE
UISARO
UISDRO
US.BSY
US.FOR
US.MOM
US.MNT
US.OFL
US.PUB
US.OMO
U.ACP
U.ATT
U.BUF
U.CNT
U.CTL
U.CWl
U.CW2
U.CW3
U.CW4
U.DCB
U.LUIC
U.OWN
U.RED
U.SCB
U.STS
U.ST2
U.UIC
U.UNIT
U.VCB
U2.AT.
U2.HLO
U2.LOG
U2.PRV
V$$CTR
W.BLVR
X.AST
X.DSI
X.FORK
X.ISR
X.JSR
X.LEN
X.LNK
X.PSW
X.REL
X.TCB
X.VEC
X.VPC
$ABCTK
$ABOEP
$ABTIM
$ABTSK
$ACHCK

Value
040000
010000
020000
000400
002000
000010
000004
000003
000100
000020
000040
177640
177600
000200
000040
000020
000100
000001
000004
000010
000032
000022
000024
000030
000004
000010
000012
000014
000016
000000
177774
177776
000002
000020
000005
000007
000052
000006
000034
000020
000040
000400
000010
000410
000002
000032
000024
000012
000010
000002
000050
000000
000006
000022
000026
000044
000046
014460
122036-R
005414
014464
007242

Modules That Reference Symbol
# EXEDF
ABOOV
# EXEDF
# EX EDF
ABOOV
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
ABOOV
# EXEDF
# EX EDF
# EXEDF
# EX EDF
# EX EDF
ABOOV
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
ABOOV
# LOWCR
# EX EDF
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
# ABOOV
# LOWCR
ABOOV
# LOWCR

MCRDIS
# EX EDF
FIXOV
MCRDIS
# EX EDF
# LOWCR
# LOWCR
# LOWCR
t LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EXEDF
# LOWCR
MCRDIS
FMTDV
MCRDIS
# LOWCR
# EX EDF
# LOWCR
# LOWCR
# LOWCR
MCRDIS
# LOWCR
# LOWCR
MCRDIS
MCROIS
FIXOV
# EX EDF
MC ROOT

PRlOV
# LOWCR

9-34

MCRDIS
MCRDIS

FIXOV

# LOWCR

MCRDIS

GTMNM

GTTSK

MC RD IS

GTMNM

# LOWCR

MC RD IS

MC RD IS
FIXOV

MCRDIS

CROSS-REFERENCES
Symbol
$ACHKB
$ACHKP
$ACHKW
$ACTHD
$ACTRM
$ACTTK
$ALCLK
$ALEB1
$ALEMB
$ALOCB
$ALOC1
$ALPKT
$SILOS
$BLKCK
$BLKC1
$BLXIO
$BMSET
$BTMSK
$CANEP
$CATS
$CBDMG
$CBOMG
$CEFI
$CEFN
$CFLPT
$CHKPT
$CKACC
$CKCNT
$CKCSR
$CKINT
$CKLDC
$CLINS
$CLKHD
$CLRMV
$COMEF
$COPT
$CRASH
$CRATT
$CRAVL
$CRPAS
$CRSBF
$CRSBN
$CRSCS
$CRSHT
$CRSST
$CRSUN
$CVRTM
$C5TA
$DASTT
$DBO
$DEACB
$DEAC1
$DECLK
$DEPKT
$DETRG
$DEVHD
$DEVTB
$DIRSV
$DIRXT
$DIV
$DKO
$0PLMl

Value
007250
007206
007232
005634
015172
014652
006636
032634
032620
006524
006566
006652
014540
0'10174
010204
006212
032730
005640
122122-R
125444
123250
123264
007362
007356
005522
016226
033726
005604
005606
017726
005610
014162
005556
014264
005570
005560
001470
034024
005532
012470
000730
001462
001466
001752
001460
001756
007070
005772
015030
043366
006672
006732
006644
006666
031502
005462
043122
002264
002514
012564
043630
021662

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ABOOV
GTTSK
LUNOV
FMTDV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
T.,OWCR
# LOWCR
ERROV
# LOWCR
# LOWCR
FIXOV
# LOWCR
# LOWCR
FIXOV
FIXOV
FIXOV
# LOWCR
# LOWCR
# LOWCR
FMTDV
# LOWCR
# LOWCR

# LOWCR

MCRDIS

PRlOV
MC ROIS

PRlOV

GTMNM

# LOWCR

# LOWCR
# LOWCR

MC RD IS

# LOWCR
# LOWCR
# LOWCR

GTMNM

9-35

# LOWCR

CROSS-REFERENCES
Symbol
$OPLM2
$DQLM1
$DQLM2
$DRABO
$DRASG
$DRATP
$DRATR
$DRATX
$DRCEF
$DRCMT
$DRCRR
$DRCRW
$DRCSR
$DRDAR
$DRDCP
$DRDSE
$DRDTR
$DREAR
$DRECP
$DREIF
$DRELW
$DREXP
$DREXT
$DRFEX
$DRGCL
$DRGLI
$DRGMX
$DRGPP
$DRGSS
$DRGTK
$DRGTP
$DRLM1
$DRLM2
$DRMAP
$DRMKT
$DRPUT
$DRQIO
$DRQRQ
$DRRAF
$DRRCV
$DRREC
$DRREQ
$DRRES
$DRRRA
$DRRRF
$DRRUN
$DRSDV
$DRSEF
$DRSND
$DRSPN
$DRSRF
$DRSTV
$DRUNM
$DRWFL
$DRWFS
$DRWSE
$DSW
$DSO
$DTOER
$OTO
$DVCER
$DVERR

Value
021666
026526
026536
022140
022164
032020
031166
022410
032340
022556
030600
024064
022562
022576
022632
032350
031350
022612
022656
004220
024312
022702
004226
026100
023372
023500
025504
023602
023704
023714
024030
021566
021606
024346
025730
026122
026410
027516
032364
026162
030306
031714
031746
026142
025232
025762
032532
032420
030440
032006
024716
032540
024672
032450
032512
032434
000046
044064
032754
044276
033016
033016

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ABOOV
# -LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
EDCKP
LKLST
# LOWCR
# LOWCR
EDCKP
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ABOOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR

# LOWCR
# LOWCR
# LOWCR

MC RD IS

9-36

CROSS-REFERENCES
Symbol

Value

$DVMSG
$DXO
$DYPMN
$EMSST
$EMTRP
$ERREP
$ERRHD
$ERRLM
$ERRLN
$ERRPT
$ERRSQ
$ERRSV
$ERRSZ
$ERRTB
$EXRQF
$EXRQN
$EXRQP
$EXSIZ
$FINBF
$FIXEP
$FLTRP
$FMASK
$FMTDV
$FNDSP
$FORK
$FORKO
$FORK!
$FPINT
$FRKHD
$GNBLK
$GTBYT
$GTMNM
$GTPKT
$GTTSK
$GTWRD
$HEADR

007446
044472
005470
017156
021512
121660-R
005700
005704
000404
005514
005706
005710
005712
124064-R
016434
016452
016426
005520
003776
122714-R
017212
005552
123156-R
015750
002320
002342
002340
017226
005546
125270-R
006102
125340-R
007510
124714-R
006160
005564

$ICHKP
$!LINS
$INITL
$INTCT
$INTSE
$INTSV
$INTXT
$INTX1
$IOABM
$IOALT
$!ODON
$IOFIN
$IOKIL
$IOTRP
$LCKPR
$LDPWF
$LDRPT
$LN1EP
$LOAD
$LOADR
$LOADT
$LOCKL
$LOGHD
$LPO
$LSTLK

016160
017304
052414
005542
002376
002434
002374
002456
005714
010272
010274
010414
010666
017316
011552
014124
005464
124436-R
121004
041214
016422
125120-R
005624
044614
005630

Modules That Reference Symbol
# LOWCR
# LOWCR
# T..10WCR
# LOWCR
# LOWCR
# ERROV
# LOWCR
# LOWCR
# ERRMSG
FIXOV
# LOWCR
# LOWCR
# LOWCR
# ERRMSG
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# FIXOV
# LOWCR
FIXOV
# FMTDV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# GNBLK
# LOWCR
# GTMNM
# LOWCR
ABOOV
# LOWCR
FIXOV
MC ROOT
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# r... OWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LNlOV
MC ROOT
# LOWCR
# LOWCR
F!XOV
# LOWCR
# LOWCR
LKLST

ERROV
# LOWCR

ERROV

PRlOV
# LOWCR
LUNOV

MC RD IS

GTTSK

MC ROIS

FIXOV

# GTTSK

LNlOV

GTTSK

LKLS'r

r.. rnov

PRlOV

# LKLST
# LOWCR

9-37

f\1CRDIS

# LOWCR

<:ROSS-REFERENCES
Symbol

Value

$LUNEP
$MAPTK
$MBUF
$MCKD
$MCKE
$MCMD

122636-R
017036
120362-R
122212-R
122224-R
120454-R

$MCOV
$MCR
$MCRCB
$MCRPT
$MDIS
$MDPB

120464-R
120634-R
005626
005466
120500-R
120366-R

$MERLO

120720-R

$MERR
$MERRN

120470-R
120474-R

$MLDOV
$MLIMI
$MLINE
$MMO
$MOVRB
$MPARS

120724-R
120632-R
120504-R
045014
120416-R
120424-R

$MPCSR
$MPLND
$MPLNE
$MPLUN
$MPPHY
$MPPKT
$MPRSR
$MPVBN
$MROOT
$MTERM
$MUCB
$MUL
$MXEXT
$NLO
$NNBLK
$NONSI
$NSO
$NS1
$NS2
$NS3
$NS4
$NS5
$NS6
$NS7
$NULL
$NXTSK
$0VEP
$PANIC
$PARHD
$PARPT
$PARTB
$PCBS
$PKAVL
$PKMAX
$PKNUM
$POOL

012734
011126
011106
011070
011170
011240
120460-R
011372
120706-R
120476-R
120364-R
012534
005770
051622
125272-R
002556
033300
033306
033314
033322
033330
033336
033344
033352
043100
015322
121634-R
001470
005422
005554
012670
052164
005764
005767
005766
052310

Modules That Reference Symbol
i LUNOV
i LOWCR
ERROV
# EDCKP
# EDCKP
ERROV
PRlOV
MCRDI:3
ABOOV
# LOWCR
FIXOV
MCR00 r
ABOOV
MCRDIB
ABOOV
i MCROO~r
# MCROO'r
ABOOV
MCRDIB
LNlOV
i MCROO'r
MCRDI:S
# LOWCR
i MCROO'r
ABOOV
MCRDIB
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
MCRDIS
# LOWCR
# MCR00 r
MCRDI:S
ABOOV
# LOWCR
# LOWCR
# LOWCR
# GNBLK
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
# MCRDI:S
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

LNlOV
ERROV
ERROV
FIXOV

LUNOV
MC RD IS
MC ROIS
LNlOV

MC RD IS

i MC ROOT

MC ROIS

# MC ROOT

MC ROOT
ERROV
* MCRDIS

PRlOV
FIXOV

LUNOV

# MC ROOT

FIXOV

LNlOV

LUNOV

LNlOV

LUNOV

MC RD IS

ERROV
FIXOV
PRlOV
# MC ROOT
MC RD IS . # MC ROOT

LNlOV

LUNOV

FIXOV
PRlOV

LNlOV

LUNOV

LNlOV

MC ROIS

# MC ROOT

i LOWCR

ERROV
# MC ROOT
FIXOV
PRlOV

# MC ROOT

ERROV
# MC ROOT

# MC ROOT

# MC ROOT
FIXOV

PRlOV

#.... LOWCR
MC ROOT

9-·38

CROSS-REFERENCES
Symbol

Value

$POWER
$PPO
$PRO
$PR1EP
$PTBYT
$PTWRO
$PWRFL
$QASTT
$QEMB
$QINSF
$QINSP
$QMCRL
$QRMVF
$QRMVT
$RELOC
$RELOM
$RELOP
$REMEP
$RESEP
$RLMCB
$RLPAR
$RLPR1
$RQSCH
$SAVNR
$SCDVT
$SCDV1
$SETCR
$SETF
$SETM
$SETRQ
$SETRT
$SGFLT
$SHFPT
$SIGFL
$SRATT
$SRNAM
$SRSTD
$SRWND
$STACK
$STD
$STKDP
$STPCT
$STPTK
$SWSTK
$SYBEG
$SYSID
$SYSIZ
$SYTOP
$SYUIC
$TKNPT
$TKPS
$TKTCB

013750
045144
045266
121654-R
006132
006160
005416
015062
033516
014332
014340
014376
014406
014420
012222
012272
012410
122714-R
122134-R
023434
015246
015310
005452
004144
012306
012312
014704
014762
014766
014734
014732
017336
005516
005420
034124
033644
015132
034162
000642
052220
005454
015222
015226
004164
053424
005574
005716
063424
005612
005600
005744
005446

$TKWSE
$TRACE
$TRP04
$TRTRP
$TSKHD
$TSKRP
$TSKRQ
$TSKRT
$TSTCP

032430
017376
017410
021446
005512
016504
016502
016476
016052

Modules That Reference ~ymbol
# LOWCR
# LOWCR
# LOWCR
# PRlOV
# LOWCR
# LOWCR
# LOWCR
# .LOWCR
# LOWCR
# LOWCR
FIXOV
# LOWCR
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# FIXOV
# ABOOV
# LOWCR
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
LKLST
# LOWCR
# LOWCR
GTTSK
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
FIXOV
# LOWCR
ABOOV
# LOWCR
LKLST
# LOWCR
# LOWCR
# LOWCR
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR

MCROIS

PRlOV
PRlOV
# LOWCR

# LOWCR
# LOWCR
# LOWCR

MC ROIS

MCRDIS

# LOWCR

EDCKP
MCRDIS
# LOWCR

# LOWCR
MCRDIS

9-39

GTMNM

GTTSK

LKLST

CROSS-REFERENCES
Symbol
$TTNS
$TTO
$TT1
$TT10
$TT11
$TT12
$TT13
$TT14
$TT15
$TT16
$TT17
$TT2
$TT20
$TT21
$TT22
$TT23
$TT24
$TT25
$TT26
$TT27
$TT3
$TT30
$TT31
$TT4
$TT5
$TT6
$TT7
$UISET
$UNFEP
$UNLKL
$UNMAP
$USRTB
$XDT
.CLO

.coo

.OBO
.DBl
.082
.DB3
.DKO
.DKl
.DK2

.osw
.oso
.DSl
.DS2
.OTO
.DTl

.oxo

.DXl
.LBO
.LOR
.LDRHD
.LPO
.MMO
.MMl
.NLO
.PPO
.PRO
.SYO
.TIO

Value
005762
045534
045564
047672
04 7722
047752
050002
050032
050062
050112
050142
047452
050172
050222
051210
051260
051310
051340
051370
051420
047502
051450
051500
047532
047562
047612
047642
016776
122714-R
125210-R
034222
000000
035002
051756
051732
043162
043222
043262
043322
043464
043524
043564
000044
043720
043760
044020
044162
044226
044366
044426
052002
052220
052040
044562
044704
044746
051570
045112
045234
052026
051706

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# r... OWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# FIXOV
FIXOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR.
# LOWCR.
# LOWCR.
# LOWCR
# LOWCF'.
# LOWCF:
# LOWCF:
# LOWCR
# LOWCR
# LOWCR
# LOWCF:
# LOWCR
# LOWCR
# LOWCFt
# LOWCR
# LOWCFt
# LO WC Ft

PRlOV
# LKLST

9-40

MC ROIS

CROSS-REFERENCES
Symbol

Value

Modules That Reference Symbol

.TTO
.TTl
.TTlO
.TTll
.TT12
.TT13
.TT14
.TT15
.TT16
.TT17
.TT2
.TT20
.TT21
.TT22
.TT23
.TT24
.TT25
.TT26
.TT27
.TT3
.TT30
.TT31
.TT4
.TT5
.TT6
.TT7

045362
045452
" 046400
046470
046560
046650
046740
047030
047120
04 7210
045660
047300
047370
050316
050406
050476
050566
050656
050746
045750
051036
051126
046040
046130
046220
046310

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

9.4

# LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

MCRMU SEGMENT CROSS~REFERENCE

The MCRMU segment cross-reference lists
segment and the modules that compose it.
Segment
Name
ERROV
LUNOV
MC ROOT
MCROV
l?RlOV

the name of each overlay
The cross-reference follows:

Resident Modules
EDCKP
EX EDF
EX EDF
EDCKP
ABOOV
LKLST

ERRMSG
FMTDV
LOWCR
EX EDF
EX EDF
LNlOV

ERROV
LUNOV
MC ROOT
GTMNM
FIXOV
PRlOV

9-41

LKLST
GNBLK

MC ROIS
GTMNM

GTTSK

CROSS-REFERENCES
SYS Global Cross-references

9. 5

SYS GLOBAL CROSS-REFUtENCEs

This cross-reference is for a mapped system.
The cross-reference contains an alphabetic listing of each global
symbol along with its value and the name of each referencing module.
When a symbol is defined in several segments within an overlay
structure,
TKB prints the last defined value in the listing.
Similarly, in a real TKB cross-reference listing, TKB would print the
module name more than once for each symbol if the module is loaded in
several segments within the structure.
The Task Builder creates an SYS.CRF cross-reference file when /CR is
specified in the Task Builder command file used to build SYS. One of
the input files to the Tas~: Builder when building SYS is the Executive
symbol table file, RSXllM.STB.
RSXllM.STB is needed because SYS
references some Executive symbols. All the symbols from RSXllM.STB
are put in the SYS.CRF symbol table file even though they are not
referenced by SYS. Therefore, some symbols appearing here in the SYS
cross-reference are defined in the Executive but not used by SYS.
These symbols are shown defined in the Executive LOWCR or EXEDF
modules.
The value contains the sufj:ix -R if the symbol is relocatable.
Prefix symbols accompanyin9
reference as follows:

each

module

name

define

the

type

Pref ix
Symbol

Reference Type

blank

Module contains a reference that is resolved in the
same segment or in a segment toward the root.
Module
contains a reference that
directly in a segment away from the
co-tree.

is resolved
root or in a

Module
contains a reference
through an autoload vector.

that

resolved

Module
contains a reference
This module defines the symbol.

that

resolved

Module contains an autoloadable
module defines the symbol.

definition.

Symbol

Value

DV.Fll
DV. ISP
DV.MNT

040000
002000
100000

DV.OSP
DV.PSE

004000
010000

OV.SQD
OV.TTY

000040
000004

This

Modules That Reference Symbol
# EXE DE'
# EXED.E'
ALLOV
SDSOV
# EX EDF
ALLOV
# LOWCH
DEVOV
ALLOV
# Lowen

SDSOV
RE DOV
DEAOV
SPROV
RE DOV
AS NOV
OPEOV
# EXEDf'
.a.SNOV
SDSOV

9-42

SPROV
DEVOV

# EXE OF

RE DOV

DEAOV
RE DOV

OEVOV
sosov

# EX EDF

ATLOV
SPROV

DEVOV

# EXEOF

SP HOV

CROSS-REFERENCES
Symbol

Value

DV.UMD
D$$YNM
D.DSP
D.LNK
D.MSK
D.NAM

000200
000000
000012
000000
000014
000004

D.PCB
O.RSOO
D.RSl
D.RSlO
O.RS16
D.RS17
D.RS19
D.RS2
D.RS22
D.RS5
D.RS6
D.RS7
D.RS8
D.RS80
D.RS81
D.RS84
D.RS85
D.RS86
D.RS87
D.RS90
D.RS92
D.RS93
D.RS94
D.RS95
D.RS96
D.RS97
D.RS98
D.RS99
D.UCB

000034
000000
177777
177766
177760
.177757
177755
177776
000002
177773
177772
177771
177770
177660
177657
177654
177653
177652
177651
177646
177644
177643
177642
177641
177640
177637
177636
177635
000002

O.UCBL

000010

D.UNIT

000006

D.VCAN
D. VINI
D.VOUT
D.VPWF
EC.OTO
EC.DVC
EC.NS!
E.LGTH
E.OPC
E.RTRY
E.SIZE
FE.ORV
FE.EXP
FE.EXT
FE.EXV
FE.MUP

000002
000000
000004
000006
000140
000001
000141
000056
000022
CT00016
000000
000010
000200
000001
000004
000002

l?E.NLG
FE.PKT
FE.PLA

100000
000100
000020

Modules That Reference Symbol
# EXEDF
# LOWCR
DEVOV
DEAOV
# EX EDF
AS NOV
GTTSK
Sl?ROV
DEVOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DEAOV
# LOWCR
DEAOV
# LOWCR
DEAOV
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EXEDF
DEVOV
# EX EDF
# EX EDF
# EX EDF
ALLOV
RU NOV
# EXEDF
# EX EDF
# EX EDF

LOWCR
# EX EDF
DEVOV
# LOWCR
DEAOV
# LOWCR
$FDUCB
# EX EDF

# LOWCR
# EX EDF

SDSOV

$FDUCB

DEVOV
OPEOV

# EX EDF
RA POV

FMTDV
RE DOV

# LOWCR

OPEOV

DEVOV
OPEOV
DEVOV
sosov
DEVOV
$FDUCB
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EX EDF
SDSOV
PAROV
SPROV
DEAOV
SPROV
SPROV
SDSOV
SETOV

# EX EDF
sosov
# EXEDF
$FDUCB
# EX EDF

FMTDV
$FDUCB
FMTDV

GTMNM

FM'rov

GTMNM

SPROV
SDSOV

SETOV

TASOV

DEVOV

# EX EDF

RPSOV

9-43

SPROV
SPROV

GTMNM

(:ROSS-REFERENCES

Symbol

Value

H.CSP
H.GARD
H.WND
IE.ABO
IE.ALN
IE.BAD
IE.BLK
IE.BYT
IE.DAA
IE.DNA
IE.DNR
IE.IFC
IE.LCK
IE.NLN
IE .NOD
IE.OFL
IE.OVR
IE.PR!
IE.SOP
IE.SPC
IE.OLK
IE.OPN
IO.ATT

000000
000072
000044
177761
177736
177777
177754
177755
177770
177771
177775
177776
177745
177733
177751
177677
177756
177760
177635
177772
177653
177777
001400

IO.CLN
IO.DET

003400
002000

IO.KIL
IO.LOV
IO.RLB
IO.RVS
IO.OLK·
IO.WAL
IO.WLB
IO.WVB

000012
001010
001000
010400
005000
000410
000400
011000

IQ.OMO
IS.SOC
KISAR5
KISAR6
L.ASG
L.LGTH
L.LNK
L.NAM
L.TYPE
L.OCB
L.UNIT
M$$MGE
PADVBF
PR7
PS
P.ATT
P.BLKS
P.BUSY
P.HDR
P.IOC
P.LGTH
P.LNK
P. MAIN
P.NAM
P.OWN

000004
000001
172352
172354
000010
000012
000000
000002
000005
000006
000004
000000
125730-R
000340
177776
000036
000016
000024
000032
000003
000042
000000
000012
000004
000026

Modules That Reference Symbol
ATLOV
ATLOV
# EX EDF
# LOWCR
# LOWCR
# LOWCR
# ·LOWCR
# LOWCR
# LOWCR
# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
ALTOV
# LOWCR
# LOWCR
ASNOV
ASNOV
OPEOV
# LOWCR
ASNOV
OPEOV
ERROV
# LOWCR.
# LOWCB:
# LOWCR
# LOWCR.
SPRov·
# LOWCR
AS NOV
# LOWCR
TASOV
# LOWCR
# LOWCR
# EX EDF'
# EX EDF'
ASNOV
AS NOV
ASNOV
ASNOV
ASNOV
ASNOV
AS NOV
# LOWCFt
DEVOV
# EX EDE'
# EXEDE'
# LOWCFt
# EX EDP
# EX EDE'
ATLOV
# EX EDP
# LOWCH
# EXEDE'
ALTOV
# EX EDP
# EXEDP

# EXEDF
# EX EDF
SYS ROT

ATLOV
PAROV

CLQOV
TASOV

DEVOV

i LOWCR

ATLOV
PAROV

CLQOV
TASOV

DEVOV

f LOWCR

RA POV
OPEOV

TASOV

OPEOV
ATLOV
OPEOV
TIMOV

REAOV
CLQOV
PAROV

DEVOV
SDSOV

ERROV
SPROV

# LOWCR

$FDOCB

$FDOCB
# LOWCR
# LOWCR
# LOWCR
# LOWCR

$FDOCB
$FDOCB
$FDOCB
$FDOCB

# LOWCR
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# PAROV
SETOV
SETOV

# LOWCR
# LOWCR
# LOWCR
# LOWCR
SETOV
# LOWCR
# EX EDF
# LOWCR
# LOWCR

9-44

OPEOV

# LOWCR

CROSS-REFERENCES
Symbol
P.PRI
P.PRO
P.REL
P.SIZE
P.STAT
P.SUB
P.SWSZ
P.TCB
P.WAIT
SP.EIP·
SP.ENB
S.BMSK
S.BMSV

Value

S.CON
S.CSR
S.CTM
S.DZCK
S.FRK
S.ITM
S.LHD
S.MPR
S.PKT
S.PRI
S.RCNT
S.ROFF
S.STS
S.VCT
T.EXT
T.LGTH
T.NAM
T.PCB
T.ST2
T.ST3
T.TCBL
T.UCB

000002
000034
000014
000016
000030
000010
000022
000026
000020
000001
000002
177776
177774
000030
000010
000012
000006
000030
000016
000007
000000
000030
000014
000004
177772
177773
000011
000005
000000
000070
000006
000046
000034
000036
000030
000026

T2.CKD
T3.MCR
UC.ATT
UC.KIL
UC.LGH
UC.NPR
UC.PWF
UC.QUE
UISARO
UISDRO
US.BSY
US.FOR
US.MOM
US.MNT

010000
004000
000010
000004
000003
000100
000020
000040
177640
177600
000200
000040
000020
000100

US.OFL
US.PUB

000001
000004

US.RED
US.UMD
US.WCK
U.ACP
U.ATT

000002
000010
000010
000032
000022

U.BUF

000024

s.ccs

Modules That Reference Symbol
# EX EDF
# LOWCR
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF

ALTOV

# EX EDF

EDF
*## EXEXEDF
EX EDF

# LOWCR
# EX EDF
# EX EDF
# EXEDF
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# LOWCR

CLQOV

# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF

$FDUCB
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EX EDF
# EXEDF
DEVOV
ALLOV
RE DOV
DEVOV
ALLOV
SDSOV
# EX EDF
# EX EDF
# EX EDF
# EX EDF
ALLOV
# EX EDF
# EXEDF

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EX EDF
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR

SETOV

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EX EDF

LKLST
LKLST
RPSOV
SETOV
GTMNM
LKLST
RPSOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EX EDF
DEAOV
# EX EDF

DEAOV
SPROV
RE DOV
# LOWCR
SDSOV
# LOWCR
ASNOV
# LOWCR
# LOWCR

9-45

PAROV
SETOV
SYSOV
GTTSK

SPROV

SYSOV

# EX EDF

# LOWCR

SYSOV

# LOWCR

DEVOV

# LOWCR

DEVOV

SETOV
# EX EDF

# LOWCR

CLQOV

DEVOV

SPROV
.P1TLOV
RE DOV

CROSS-REFERENCES
Symbol

Value

U.CNT
U.CTL
U.CWl

000030
000004
000010

u.cw2

000012

U.CW3
U.CW4
U.DCB

000014
000016
000000

u:LuIC
U.OWN

177774
177776

U.RED

000002

U.SCB
U.STS

000020
000005

U.ST2

000007

U.UIC
U.UNIT
U.VCB
02.CRT
U2.DH1
U2.DJ1
U2 .DZl
02.ESC
U2.HLD
U2.LOG
02.LWC
U2.L3S
U2.L8S
U2 .PRV

.000052
000006
000034
002000
100000
040000
000100
001000
000040
000400
000001
000004
010000
000010

02.RMT
U2.SLV
02.VT5
V$$CTR
W.BLVR
X.AST
X.DSI
X.FORK
X.ISR
X.JSR
X.LEN
X.LNK
X.PSW
X.REL
X.TCB
X.VEC
X.VPC
$ABCTK
$ABTIM
$ABTSK
$ACHCK
$ACHKB
$ACHKP
$ACHKW
$ACTEP

020000
000200
000002
000410
000002
000032
000024
000012
000010
000002
000050
000000
000006
000022
000026
000044
000046
014460
005414
014464
007242
007250
007206
007232
122566-R

Modules That Reference Symbol
i EXEDF
# EX EDF
ALLOV
EX EDF
SPROV
ALLOV
i EX EDF
SPROV
# EXEDF
# EX EDF
i EX EDF
SDSOV
DEVOV
ALLOV

•

sosov

ASNOV
RE DOV
# EX EDF
ALLOV
REDOV
ALLOV
RE DOV
# EX EDF
# EXEDF
DEVOV
# EX EDF
# EXEDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
ALLOV
# EX EDF
# EX EDF
# EX EDF
AS NOV
SDSOV
# EXEDF
# EX EDF
# EX EDF
# LOWCR.
# EXEDF'
# LOWCR
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR.
# LOWCR.
CLQOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ATLOV

# LOWCR
LOWCR
AS NOV
# LOWCR

•

AS NOV
# LOWCR
SYSOV
i LOWCR
SDSOV
FMTDV
$FDUCB
# EX EDF
DEAOV
SPROV
DEVOV
SPROV
# LOWCR
DEAOV
SDSOV
DEAOV
SDSOV

sosov

# LOWCR
# EX EDF

SDSOV
SPROV
SPROV

sosov
sosov

SDSOV
DEVOV
SDSOV

sosov
sosov

ATLOV
SPROV

sosov
SDSOV
sosov
SYS ROT

# LOWCR

9-46

ATLOV
OPEOV

DEAOV
RE DOV

DEVOV
SDSOV

ATLOV
RUNOV

DEAOV
SDSOV

DEVOV
SETOV

SDSOV
SPROV
GTMNM

SETOV
GTTSK

RE DOV

RUNOV
DEVOV

SPROV
# EXEDF

# LOWCR

# EX EDF

GTMNM

# LOWCR

# EX EDF

# LOWCR

# EXEDF

# LOWCR

SETOV
DEVOV
SPROV
DEVOV
SETOV
SPROV
SETOV
# LOWCR
SPROV
SETOV
SPROV
SPROV
# EX EDF
SPROV
SPROV
SPROV
DEAOV
SYSOV
SPROV
SPROV
SPROV

SPROV

# EXEDF

RUNOV

CROSS-REFERENCES
Symbol

Value

$ACTHD
$ACTRM
$ACTTK
$ALCLK
$ALEB1
$ALEMB
$ALLEP
$ALOCB
$ALOC1
$ALPKT
$ALTEP
$ASNEP
$ATLEP
$BILDS
$BLKCK
$BLKC1
$BLXIO
$BMSET
$BRKEP
$BTMSK
$CATS

005634
015172
014652
006636
032634
032620
123350-R
006524
006566
006652
122170-R
122636-R
122556-R
014540
010174
010204
006212
032730
124642-R
005640
127134

$CBDMG
$CBOMG

124206
125304

$CDTB
$CEFI
$CEFN
$CFLPT
$CHKPT
$CKACC
$CKCNT
$CKCSR
$CKINT
$CKLDC
$CLINS
$CLKHD
$CLRMV
$COMEF
$COPT
$COTB
$CRASH
$CRATT
$CRAVL
$CRPAS
$CRSBF
$CRSBN
$CRSCS
$CRSHT
$CRSST
$CRSUN
$CVRTM
$C5TA

127310
007362
007356
005522
016226
033726
005604
005606
017726
005610
014162
005556
014264
005570
005560
127316
001470
034024
005532
012470
000730
001462
001466
001752
001460
001756

$DASTT
$DB0
$DDIV
$DEACB

015030
043366
124454
006672

$DEAC1
$DEAEP
$DECLK

006732
123624-R
006644

0''01010

005772

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ALLOV

ASNOV
# LOWCR
LOWCR
# ALTOV
# AS NOV
# ATLOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# BRKOV
# LOWCR
ALTOV
SPROV
ATLOV
AS NOV
TASOV
GETNUM
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LO.WCR
# LOWCR
CLQOV
# LOWCR
# LOWCR
# LOWCR
ASNOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ATLOV
SDSOV
# LOWCR
# LOWCR
CLQOV
AS NOV
SPROV
# LOWCR
# DEAOV
# LOWCR

•

REAOV
# LOWCR

RPSOV

SETOV

GTTSK
SYSOV
CLQOV
ATLOV

OPEOV

RAPOV

RPSOV

SDSOV
FMTDV

TASOV
GTMNM

SDSOV

RPSOV

TIMOV

RA POV

OPEOV

RUNOV
# LOWCR

GETNUM

OPEOV

$FDUCB

CLQOV
TASOV

ERROV

# LOWCR

PAROV

# LOWCR

RPSOV

RUNOV

SETOV

SDSOV

REAOV

9-47

C:ROSS-REFERENCES
Symbol

Value

$DEPKT
$DETRG
$DEVEP
$DEVHD

006666
031502
122302-R
005462

$DEVTB
$DIRSV
$DIRXT
$DIV
$DKO
$DPLM1
$DPLM2
$DQLM1
$DQLM2
$DRABO
$DRASG
$DRATP
$DRATR
$DRATX
$DRCEF
$DRCMT
$DRCRR
$DRCRW
$DRCSR
$DRDAR
$DRDCP
$DRDSE
$DRDTR
$DREAR
$DRECP
$DREIF
$DRELW
$DREXP
$DREXT
$DRFEX
$DRGCL
$DRGLI
$DRGMX
$DRGPP
$DRGSS
$DRGTK
$DRGTP
$DRLM1
$DRLM2
$DRMAP
$DRMKT
$DRPUT
$DRQIO
$DRQRQ
$DRRAF
$DRRCV
$DRREC
$DRREQ
$DRRES
$DRRRA
$DRRRF
$DRRUN
$DRSDV
$DRSEF
$DRSND
$DRSPN
$DRSRF

043122
002264
002514
012564
043630
021662
021666
026526
026536
022140
022164
032020
031166
022410
032340
022556
030600
024064
022562
022576
022632
032350
031350
022612
022656
004220
024312
022702
004226
026100
023372
023500
025504
023602
023704
023714
024030
021566
021606
024346
025730
026122
026410
027516
032364
026162
030306
031714
031746
026142
025232
025762
032532
032420
030440
032006
024 716

Modules That Reference Symbol

# LOWCR
# LOWCR
# DEVOV
DEAOV
$FDUCEI
# LOWCR
# LOWCR
# LOWCR
FMTDV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
EDCKP
LKLST
# LOWCR
# LOWCR
EDCKP
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

DEVOV

# LOWCR

OPEOV

GTMNM

# LOWCR

TIMOV

# LOWCR
# LOWCR
# LOWCR

9-48

SDSOV

CROSS-REFERENCES
Symbol

Value

$DRSTV
$DRUNM
$0RWFL
$DRWFS
$0RWSE
$0SW
$050
$0TOER
$OTO
$0VCER
$0VERR
$0VMSG
$DXO
$0YPMN
$EMSST
$EMTRP
$ERREP
$ERRHD
$ERRLM
$ERRLN
$ERRPT
$ERRSQ
$ERRSV
$ERRSZ
$ERRTB
$EXRQF
$EXRQN
$EXRQP
$EXSIZ
$FOLGG
$FDLOG

032540
024672
032450
032512
032434
000046
044064
032754
044276
033016
033016
007446
044472
005470
017156
021512
122160-R
005700
005704
000404
005514
005706
005710
005712
124364-R
016434
016452
016426
005520
126422-R
126430-R

$FDUCB
$FINBF
$FLTRP
$FMASK

126436-R
003776
017212
005552

$FMTDV

125176-R

$FNDSP
$FORK
$FORKO
$FORK1
$FPINT
$FRKHO
$GNBLK

015750
002320
002342
002340
017226
005546
126750-R

$GTBYT
$GTMNM
$GTNUM
$GTPKT
$GTTSK
$GTWRO
$HEADR

006102
126034-R
126716-R
007510
125460-R
006160
005564

$ICHKP
$!LINS
$INITL
$INTCT
$INTSE

016160
017304
052414
005542
002376

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ALTOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ERROV
# LOWCR
# LOWCR
# ERRMSG
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ERRMSG
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# $FDUCB
ALLOV
# $FDUCB
AS NOV
# LOWCR
# LOWCR
ALLOV
PAROV
SPROV
ASNOV
TASOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ALLOV
# GNBLK
# LOWCR
# GTMNM
ALTOV
# LOWCR
ALTOV
# LOWCR
GTTSK
RPSOV
$FDUCB
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

ASNOV

TIMOV

ERROV

ERROV
RPSOV

sosov

SETOV

SPROV

AS NOV

DEAOV

RAPOV

ATLOV

REDOV

# $FDUCB

DEAOV
RPSOV
TASOV
ATLOV

DEVOV
RUNOV

# LOWCR
SDSOV

OPEOV
SETOV

DEVOV

# FMTDV

SDSOV

ASNOV

ATLOV

DEAOV

DEVOV

GTTSK
# GETNUM

RA POV

RPSOV

SPROV

# GTTSK

RAPOV

LKLST
RUNOV

# LOWCR
SETOV

OPEOV
SYS ROT

RA POV
TASOV

9-49

SPROV

CROSS-REFERENCES
Symbol

Value

$INTSV
$INTXT
$INTX1
$IOABM
$IOALT
$!ODON
$IOFIN
$IOKIL
$IOTRP
$LCKPR
$LDPWF
$LDRPT
$LOAD
$LOADR
$LOADT
$LOCKL

002434
002374
002456
005714
010272
010274
010414
010666
017316
011552
014124
005464
121004
041214
016422
124564-R

$LOGHD
$LPO
$LSTLK
$MAPTK
$MBUF

005624
044614
005630
017036
120362-R

$MCKD
$MCKE
$MCMD

122512-R
122524-R
120454-R

$MCOV
$MCR

120464-R
120634-R

$MCRCB
$MCRPT
$MDIS
$MDPB

005626
005466
120500-R
120366-R

$MERLO

120720-R

$MERR
$MERRN

120470-R
120474-R

$MLDOV
$MLIMI
$MLINE
$MMO
$MOVRB
$MPARS

120724-R
120632-R
120504-R
045014
120416-R
120424-R

$MPCSR
$MPLND

012734
011126

Modules That Reference Symbol
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
LOWCR
SYS Rm~
i LOWCR
i LOWCR
ASNOV
RE DOV
AS NOV
# LOWCR
LKLST
i LOWCR
ASNOV
OPEOV
SYSOV
i EDCKP
i EDCKP
ERROV
i SYSRO'l~
SPROV
ALLOV
CLQOV
PAROV
SDSOV
TIMOV
i LOWCR
t LOWCR
# SY SRO~~
AS NOV
PAROV
# SYSRO'l'
ALLOV
DEAOV
REAOV
SETOV
TIMOV
# SY SRO~~
ALLOV
DEAOV
RA POV
SDSOV
TASOV
RAPOV
ATLOV
SYSOV
i LOWCR
i SYSRO'l~
ALLOV
DEVOV
REAOV
SETOV
i LOWCR
# LOWCR
f
i
i
i
i
i
i
i
i
t
i
i

DEVOV
TASOV
$FDUCB

i LKLST

PAROV

ATLOV
PAROV
# SYS ROT
ERROV
ERROV
RAPOV

CLQOV
RPSOV
TASOV

DEVOV
SDSOV
TIMOV

ERROV
SPROV

RPSOV

SPROV

SYSOV

SYSOV
ALTOV
DEAOV
REAOV
SETOV

# SYS ROT
ASNOV
DEVOV
RE DOV
SPROV

ATLOV
ERROV
R.PSOV
# SYS ROT

BRKOV
OPEOV
RUNOV
TASOV

ATLOV
SETOV
i LOWCR
i LOWCR

RPSOV
ATLOV
RA POV
TASOV
ALTOV
DEVOV
RE DOV
SPROV

DEVOV
REAOV
TIMOV
AS NOV
OPEOV
RPSOV
SYSOV

ERROV
SDSOV

OPEOV
SPROV

ATLOV
PAROV
RUNOV
# SYS ROT

CLQOV
RAPOV
SDSOV
TASOV

ALTOV
DEVOV
REAOV
SETOV
TIMOV
RPSOV
DEVOV
# SYS ROT

ASNOV
ERROV
RE DOV
SPROV

ATLOV
OPEOV
RPSOV
SYSOV

CLQOV
PAROV
RUNOV
# SYS ROT

SPROV
PAROV

SYSOV
# SYS ROT

# SYS ROT
TASOV

ALTOV
ERROV
RE DOV
SPROV

AS NOV
OPEOV
RPSOV
# SYS ROT

ATLOV
PAROV
RUNOV
TASOV

DEAOV
RA POV
SDSOV
TIMOV

9-50

CROSS-REFERENCES
Symbol

Value

$MPLNE
$MPLUN
$MPPHY
$MPPKT
$MPRSR
$MPVBN
$MROOT
$MTERM
$MUCB

011106
011070
011170
011240
120460-R
011372
120706-R
120476-R
120364-R

$MUL
$MXEXT
$NLO
$NNBLK
$NONSI
$NSO
$NS1
$NS2
$NS3
$NS4
$NS5
$NS6
$NS7
$NULL
$NXTSK
$OPEEP
$PANIC
$PAREP
$PARHD

012534
005770
051622
126752-R
002556
033300
033306
033314
033322
033330
033336
033344
033352
043100
015322
122226-R
001470
123654-R
005422

$PARPT
$PARTB
$PCBS
$PKAVL
$PKMAX
$PKNUM
$POOL
$POWER
$PPO
$PRO
$PTBYT
$PTWRD
$PWRFL
$QASTT
$QEMB
$QIN SF
$QINSP
$QMCRL
$QRMVF
$QRMVT
$RAPEP
$REAEP
$REDEP
$RELOC
$RELOM
$RELOP
$RLMCB
$RLPAR
$RLPR1
$RPSEP
$ROSCH

005554
012670
052164
005764
005767
005766
052310
013750
045144
045266
006132
006160
005416
015062
033516
014332
014340
014376
014406
014420
!22144-R
123142-R
123000-R
012222
012272
012410
023434
015246
015310
122206-R
005452

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
SYSOV
# LOWCR
# SYS ROT
RPSOV
ALLOV
DEVOV
SPROV
# LOWCR
# LOWCR
# LOWCR
# GNBLK
# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ALTOV
# OPEOV
# LOWCR
DEVOV
# LOWCR
SPROV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ALTOV
# LOWCR
# LOWCR
ALTOV
# RA POV
# REAOV
ALTOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# RPSOV
# LOWCR

* SYS ROT
RUNOV
ASNOV
PAROV
SYSOV
RUNOV
SDSOV

SYSOV
ATLOV
RPSOV
i SYS ROT

SPROV

TIMOV

# SYS ROT
CLQOV
RUNOV
TIMOV

DEAOV
SDSOV

SDSOV

SETOV

SPROV

# LOWCR

PAROV
* OPEOV

PAROV

SDSOV
SDSOV

SPROV

# LOWCR

# LOWCR
I RE DOV

9-51

C:ROSS-REPERENCES
Symbol

Value

$RUNEP
$SAVNR
$SCDVT
$SCDV1
$SOSEP
$SETCR
$SETEP
$SETF
$SETM
$SETRQ
$SETRT
$SGFLT
$SHFPT
$SIGFL
$SOVEP
$SPREP
$SRATT
$SRNAM
$SRSTD
$SRWND
$STACK
$STD
$STKDP
$STPCT
$STPTK
$SWSTK
$SYBEG
$SYSID
$SYSIZ
$SYTOP
$SYUIC
$TALEP
$TASEP
$TIMEP
$TKNPT
$TKPS
$TKTCB

122144-R
004144
012306
012312
122676-R
014704
122164-R
014762
014766
014734
014732
017336
005516
005420
122134-R
122700-R
034124
033644
015132
034162
000642
052220
005454
015222
015226
004164
053424
005574
005716
063424
005612
122576-R
122172-R
122260-R
005600
005744
005446

$TKWSE
$TRACE
$TRP04
$TRTRP
$TSKHD
$TSKRP
$TSKRQ
$TSKRT
$TSTCP
$TTNS
$TTO
$TT1
$TT10
$TT11
$TT12
$TT13
$TT14
$TT15
$TT16
$TT17
$TT2
$TT20
$TT21
$TT22

032430
017376
017410
021446
005512
016504
016502
016476
016052
005762
045534
045564
047672
047722
047752
050002
050032
050062
050112
050142
047452
050172
050222
051210

Modules That Reference Symbol
# RUNOV
CBTO
# LOWCR
# LOWCR
# sosov
# LOWCR
# SETOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
LKLST
# SYSOV
# SPROV
# LOWCR
# LOWCR
GTTSK
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ATLOV
# TASOV
# TIMOV
# LOWCR
CLQOV
EDCKP
RPSOV
LKLST
BRKOV
# LOWCR
# LOWCR
ALTOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
CLQOV
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

CBTO

# LOWCR

# LOWCR
"' SYS ROT

t LOWCR

OPEOV

RPSOV

OPEOV

SETOV

SPROV

sosov

SPROV

# LOWCR
GTMNM
SPROV
# LOWCR
i LOWCR

RU NOV
GTTSK
SYSOV

TIMOV
LKLST
$FDUCB

i LOWCR

SETOV

TASOV

# LOWCR

RUNOV

TIMOV

RUNOV

9-52

i LOWCR

CROSS-REFERENCES
Symbol

Value

$TT23
$TT24
$TT25
$TT26
$TT27
$TT3
$TT30
$TT31
$TT4
$TT5
$TT6
$TT7
$UISET
$UNLKL

051260
051310
051340
051370
051420
047502
051450
051500
047532
047562
047612
047642
016776
124654-R

$UNMAP
$USRTB
$XDT
.CBTO
.CLO
.COT2B

034222
000000
035002
124752-R
051756
125056-R
051732
124732-R
124666-R
043162
043222
043262
043322
043464
043524
043564
000044
043720
043760
044020
044162
044226
044366
044426
127020-R
052002
052220
052040
044562
044704
044746
051570
045112
045234
052026
051706
045362
045452
046400
046470
046560
046650
046740
047030
047120
047210
045660

.coo

.C2BTO
.C22TO
.DBO
.DB!
.DB2
.DB3
.DKO
.DKl
.DK2

.osw

.DSO
.DSl
.DS2
.OTO
.DTl

.oxo

.DX!
.KEYWD
.LBO
.LOR
.LDRHD
.LPO
.MMO
.MM!
.NLO
.PPO
.PRO
.SYO
.TIO
.TTO
.TT!
.TTlO
.TTll
.TT12
.TT13
.TT14
.TT15
.TT16
.TT17
.TT2

Modules That Reference Symbol
LOWCR
*•# LOWCR
LOWCR

# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
ALTOV
PAROV
# LOWCR
# LOWCR
# LOWCR
CBTO
# LOWCR
# COT2B
# LOWCR
# CBTO
# CBTO
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# KEYWD
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

•
•

ASNOV
RE DOV

ATLOV
SETOV

DEVOV
SYSOV

DEVOV

OPEOV

PAROV

OPEOV
OPEOV
OPEOV

PAROV
PAROV

OPEOV

RPSOV

9-53

SPROV

# LKLST
TASOV

tCROSS-REFERENCES
Symbol
.TT20
.TT21
.TT22
.TT23
.TT24
.TT25
.TT26
.TT27
.TT3
.TT30
.TT31
.TT4
.TTS
.TT6
.TT7

9.6

Value
047300
047370
050316
050406
050476
050566
050656
050746
045750
051036
051126
046040
046130
046220
046310

Modules That Reference Symbol
i LOWCR
# LOWCR
i LOWCR
t LOWCR
I LOWCR
i LOWCR
I J.,OWCR
# LOWCR
i LOWCR
i LOWCR
# LOWCR
# LOWCR
i LOWCR
i LOWCR
i LOWCR

SYS SEGMENT CROSS-REFE:RENCES

The SYS segment cross-reference lists the name of each overlay and the
modules that compose it. The cross-reference follows:

Segment
Name
ALTOV
ATLOV
CLQOV
DEVOV
ERROV
OPEOV
RAPOV
REAOV
RPSOV
RUNOV
SDSOV
SETOV
SPROV
SYSOV
SYS ROT
TASOV
TIMOV

9.7

Resident Modules
ALTOV
REDOV
ATLOV
LKLST
CLQOV
CBTO
PAROV
EDCKP
BRKOV
AS NOV
GTTSK
ALLOV
EX EDF
EX EDF
EX EDF
EX EDF
EX EDF
EX EDF
EX EDF
EX EDF
GNBLK

E.KEDF
$FDUCB
EX EDF
$FDUCB
E.KEDF
DEVOV

GETNUM

GTMNM

GTTSK

LKLST

FMTDV

GNBLK

GTMNM

GTTSK

EX EDF

FMTDV

GNBLK

LKLST

ERRMSG
C:BTO
E:KEDF
L.KLST
DEAOV
GETNUM
RUNOV
FMTDV
L.KLST
GETNUM
L.KLST
LtOWCR
FMTDV
TIMOV

ERROV
COT2B
f•MTDV
RAPOV
EX EDF
KEYWD

KEYWD
GETNUM
$FDUCB
GNBLK
RPSOV

OPEOV
GNBLK

GTMNM

REAOV

$FDUCB

SDSOV
SETOV
GNBLK
SYSOV
SYS ROT
LKLST

KEYWD

SPROV

$FDUCB

TASOV

BIGFCP GLOBAL CROSS REFERENCES

The cross-reference contains an alphabetic listing of each global
symbol along with its value and the name of each referencing module.
When a symbol is defined in several segments within an overlay
structure,
TKB prints the last defined value in the listing.
Similarly, in a real TKB cross-reference listing, TKB would print the
module name more than once for each symbol if the module is loaded in
several segments within the structure.

9-54

CROSS-REFERENCES
The value contains the suffix -R if the symbol is relocatable.
The Task Builder creates a BIGFCP.CRF cross-reference file when /CR is
specified in the Task Builder command file used to build BIGFCP. One
of the input files to the Task Builder when building BIGFCP is the
Executive symbol table file, RSXllM.STB. RSXllM.STB is needed because
BIGFCP references some Executive symbols.
All the symbols from
RSXllM.STB are put in the BIGFCP.CRF symbol table file even though
they are not referenced· by BIGFCP. Therefore, some symbols appearing
here in the BIGFCP cross-reference are defined in the Executive but
not used by BIGFCP. These symbols are shown defined in the Executive
LOWCR or EXEOF modules.
Prefix symbols accompanying
reference as follows:

each

module

name

define

the

type

Pref ix
Symbol

Reference Type

blank

Module contains a reference that is resolved in the
same segment or in a segment toward the root.

Module
contains a reference that
directly in a segment away from the
co-tree.

is resolved
root or in a

Module
contains a reference
through an autoload vector.

that

Module
contains a non-autoloadable
This module defines the symbol.
Module contains an autoloadable
module defines the symbol.

*
Symbol
AT.FCB
AT.HOR
AT.ION
AT.MAP
AT.PRO
AT.RO
OV.PSE
DV.TTY
DV.UMD
D$$YNM
D.DSP
D.MSK
O.NAM
D.PCB
D.RSOO
D.RSl

Value
000100
000000
000001
000002
000040
000200
010000
000004
000200
000000
000012
000014
000004
000034
000000
1'17777

Modules That Reference Symbol
# ATC TL
# ATC~L
# ATC TL
# ATCTL
# ATC TL
# ATC TL
# EX EDF
# EX EDF
# EXEOF
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# LOWCR

RAT CM

WAT CM
WATCM
# LOWCR
# LOWCR
# LOWCR
LOWCR
*## LOWCR
LOWCR

# LOWCR

9-55

WAT CM

resolved

definition.

This

CROSS-REFERENCES
Symbol

Value

D.RSlO
D.RS16
D.RS17
D.RS19
D.RS2
D.RS22
D.RS5
D.RS6
D.RS7
D.RSS
D.RS80
D.RS81
D.RS84
D.RS85
D.RS86
D.RS87
D.RS90
D.RS92
D.RS93
D.RS94
D.RS95
D.RS96
D.RS97
D.RS98
D.RS99
D.UCB
D.UCBL
D.UNIT
D.VCAN
D.VINI
D.VOUT
D.VPWF
EC.OTO
EC.DVC
EC.NS!
E.BDHD
E.LGTH
E.OPC
E.RTRY
E.SIZE
FE.MUP
F.EFBK
F.FFBY
F.HIBK
F.RSIZ
F.RTYP
IE .ABO
IE.ALC
IE .ALN
IE.BAD

177766
177760
177757
177755
177776
000002
177773
177772
177771
177770
177660
177657
177654
177653
177652
177651
177646
177644
177643
177642
177641
177640
177637
177636
177635
000002
000010
000006
000002
000000
000004
000006
000140
000001
000141
000000
000056
000022
000016
000000
000002
000010
000014
000004
000002
000000
177761
177654
177736
177777

IE.BDR
IE .BHD
IE.BLK
IE.BVR
IE.BYT
IE.CKS
IE.CLO
IE.DAA
IE.DFU
IE.DNA

177716
177700
177754
177701
177755
177742
177732
177770
177750
177771

Modules That Reference Symbol
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ·LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR .
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# DI SPAT
# EX EDF
# EX EDF
# EX EDF
# EX EDF
CRFIL
DRACC
DRACC
DRACC
DRACC
DRACC
# LOWCR
SMALC
# LOWCR.
ACCESS
DRINI
LOCAT
DRACC
NXHD.R
# LOWCR
ENTNM.
# LOWCR
RDHDR:
ACCESS
# LOWCR.
SMALC
# LOWCR.

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
RDHDR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EXEDF
DREOF
DREOF
DREOF

PROCK

RWVBL
CRFIL
ENTNM
# LOWCR

DEA CC
EX COM
RWATT

DI SPAT
GTFID
RWVB

RDHDR

SMDEL

SMSCN

9-56

DLMRK
INWIN

CROSS-REFERENCES
Symbol
IE.DNR
IE.DUP
IE.EOF
IE.HFU
IE.IFC
IE.IFU
IE.LCK
IE.NLN
IE.NOD
IE.NSF
IE.OFL
IE.CVR
IE .PRI
IE.RER
IE.SNC
IE.SPC
IE.SOC
IE.OLK
IE.OPN
IE.WAC
IE.WAT
IE.WER
IE.WLK
IO.ACR
IO.ATT
IO.CLN
IO.CRE
IO.DEL
IO.OET
IO.EXT
IO.FNA
IO.LOV
IO.RLB
IO.RVB
IO•OLK
IO.WLB
IO.WVB
IQ.OMO
IS.SOC
KISARS
KISAR6
L.ASG
L.NAM
L.TYPE
L.OCB
L.ONIT
M$$MGE
NB.SNM
NB.STP
NB.SVR
N.DID
N.FNAM
N.FVER
N.NEXT
N.STAT
P.ATT
P.BLKS
P.BUSY
P.HDR
P.IOC
P.LGTH
P.LNK

Va.lue
177775
177707
177766
177744
177776
177747
177745
177733
177751
177746
177677
177756
177760
177740
177735
177772
177734
177653
177777
177743
177741
177737
177764
006400
001400
003400
012000
012400
002000
011400
004400
001010
001000
010400
005000
000400
011000
000004
000001
172352
172354
000010
000002
000005
000006
000004
000000
000040
000020
000010
000024
000006
000016
000022
000020
000036
000016
000024
000032
000003
000042
000000

Modules That ·Reference Symbol
# LOWCR

ENTNM
RWVB
EXCMP
# LOWCR
CRFID
ACCESS
GTFID
ALLOC
DLMRK
# LOWCR
# LOWCR
i LOWCR
RWlLB
RDHDR
# LOWCR
NXHDR
i LOWCR
RWVBL
ACCESS
RATCM
CLNUP
CRFIL
ACCESS
# LOWCR
# LOWCR
CLCOM
CLCRE
# LOWCR
DREXT
ORA CC
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# EXEDF
# EXEDF
# EX EDF
# EX EDF
# LOWCR
ENTNM
ENTNM
ENTNM
ORIN I
FNDNM
ENTNM
ENTNM
ENTNM
# LOWCR
# EXEDF
# EX EDF
CRFIL
# EX EDF
# LOWCR
# EX EDF

RWVBL

TRUNC

i LOWCR
i LOWCR
# LOWCR

TRUNC

WAC CK

FDRMV

RWVBL
PROCK

RDHDR

PROCK

TRUNC

WRATT

RDHDR
RWlLB
WAT CM
RWlLB
PROCK

DLFIL
IX EXT
RWVBL

RWlLB

RWVBL
RWVBL

RWlLB

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

FDRMV
FDRMV
FDRMV
FNDNM

LOCAT
LOCAT
LOCAT

FDRMV
FDRMV
FDRMV
# LOWCR

# LOWCR
# LOWCR

# LOWCR

9-57

PROCK

i::ROSS-REFERENCES
Symbol
P.MAIN
P.NAM
P.OWN
P.PRI
P.PRO
P.REL
P.SIZE
P.STAT
P.SUB

P.swsz

P.TCB
P.WAIT
R.FIX
SP.EIP
SP.ENB
S.BMSK
S.BMSV
S.CCB
S.CON
S.CSR
S.CTM
S.DRFN
S.DZCK
S.FRK
S.ITM
S.LHD
S.MPR
S.NFEN
S.PKT
S.PRI
S.RCNT
S.ROFF
S.STS
S.VCT
T.EXT
T.LGTH
UC.ATT
UC.KIL
UC.LGH
UC.NPR
UC.PWF
UC.QUE
UIS ARO
UISDRO
US.BSY
US.FOR
US.MOM
US.MNT
US.OFL
US.PUB
US.UMD
U.ACP
U.ATT
U.BUF
U.CNT
U.CTL
u.cw1
U.CW2
U.CW3
U.OWN
U.RED
U.SCB

Value
000012
000004
000026
000002
000034
000014
000016
000030
000010
000022
000026
000020
000001
000001
000002
177776
177774
000030
000010
000012
000006
000032
000030
000016
000007
000000
000030
000020
000014
000004
177772
177773
000011
000005
000000
000070
000010
000004
000003
000100
000020
000040
177640
177600
000200
000040
000020
000100
000001
000004
000010
000032
000022
000024
000030
000004
000010
000012
000014
177776
000002
000020

Modules That Reference Symbol
# EX EDF
# EXEDF
# EX EDF
t EX EDF
# LOWCR
# EX EDF
# .EXEDF
# EX EDF
i EX EDF
# EX EDF
i EX EDF
# EX EDF
DRACC
# EX EDF
# EX EDF
# EX EDF
# EX EDF
# LOWCR
# EX EDF
# EX EDF
# EX EDF
DREX
# LOWCR
# EX EDF
# EX EDF
# EX EDF
# LOWCB:
DRACC
# EX EDF'
# EX EDF'
# EX EDF'
# EXEDF'
i EX EDF'
# EX EDF'
# LOWCFl
i LO WC Ft
# EX EDP'
i EX EDF'
# EXEDF'
i EXEDli'
# EXED!i'
# EX EDE'
# EX EDE'
# EX EDE'
# EX EDE'
# EXED!i'
DISP~~T

DMOUNT
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP
# EX EDP

i LOWCR
# LOWCR
# LOWCR
i LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR
DRINI

# LOCAT

RMVNM

# LOWCR
# LOWCR
# LOWCR

ENTNM
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DMOUNT
# EX EDF
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

9-58

FDRMV

# EX EDF
# LOWCR

# LOWCR

CROSS-REFERENCES
Symbol
U.STS
U.ST2
U.UNIT
U.VCB
V$$CTR
X.AST
X.OSI
X.FORK
X.ISR
X.JSR
X.LEN
X.LNK
X.PSW
X.REL
X.TCB
X.VEC
X.VPC
$ABCTK
$ABTIM
$ABTSK
$ACHCK
$ACHKB
$ACHKP
$ACHKW
$ACTHD
$ACTRM
$ACTTK
$ALCLK
$ALEB1
$ALEMB
$ALERR
$ALOCB
$ALOC1
$ALPKT
$SILOS
$BLKCK
$BLKC1
$BLXIO
$BMSET
$BTMSK
$CEFI
$CEFN
$CFLPT
$CHKPT
$CKACC
$CKCNT
$CKCSR
$CKINT
$CKLDC
$CLINS
$CLKHD
$CLRMV
$COMEF
$COPT
$CRASH
$CRATT
$CRAVL
$CRPAS
$CRSBF
$CRSBN
$CRSCS
$CRSHT

Value
000005
000007
000006
000034
000410
000032
000024
000012
000010
000002
000050
000000
000006
000022
000026
000044
000046
014460
005414
014464
007242
007250
007206
007232
005634
015172
014652
006636
032634
032620
122774-R
006524
006566
006652
014540
010174
010204
006212
032730
005640
007362
007356
005522
016226
033726
005604
005606
017726
005610
014162
005556
<H4264
005570
005560
001470
034024
005532
012470
000730
001462
001466
001752

Modules That Reference Symbol
DI SPAT
# EX EDF
# EXEOF
CLNUP
# LOWCR
# LOWCR
# LOWCR
i LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# OVERR
ALLOC
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
BLXIO
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

DMOUNT
# LOWCR
# LOWCR
DI SPAT

# LOWCR

9-59

# EXEDF

# LOWCR

DMOUNT

# EX EDF

t LOWCR

CROSS-REFERENCES
Symbol

Value

Modules 'i~hat Reference Symbol

$CRSST
$CRSUN
$CVRTM
$C5TA
$DASTT
$080
$DDIV
$DEACB
$DEAC1
$DECLK
$DEPKT
$DETRG
$DEVHD
$DEVTB
$DIRSV
$DIRXT
$·DIV

001460
001756
007070
005772
015030
043366
121164-R
006672
006732
006644
006666
031502
005462
043122
002264
002514
012564

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# OARITH
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

$DKO
$DMUL
$DPLM1
$DPLM2
$DQLM1
$DQLM2
$DRABO
$DRASG
$DRATP
$DRATR
$DRATX
$DRCEF
$DRCMT
$DRCRR
$DRCRW
$DRCSR
$DRDAR
$DRDCP
$DRDSE
$DRDTR
$DREAR
$DRECP
$DREIF
$DRELW
$DREXP
$DREXT
$DRFEX
$DRGCL
$DRGLI
$DRGMX
$DRGPP
$DRGSS
$DRGTK
$DRGTP
$DRLM1
$DRLM2
$DRMAP
$DRMKT
$DRPUT
$DRQIO
$DRQRQ
$DRRAF
$DRRCV
$DRREC

043630
121126-R
021662
021666
026526
026536
022140
022164
032020
031166
022410
032340
022556
030600
024064
022562
022576
022632
032350
031350
022612
022656
004220
024312
022702
004226
026100
023372
023500
025504
023602
023704
023714
024030
021566
021606
024346
025730
026122
026410
027516
032364
026162
030306

DAT IM
SMDEL
# LOWCR
# DARI TH
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCH
# LOWCF:
# LOWCR
# LOWCFt
# LOWCR
# LO WC Ft
# LOWCR
# LOWCR
# LOWCR
# LOWCH
# LOWCR
# LOWCH
# LOWCH
# LOWCH
DMOUNT
# LOWCR
# LOWCH.
# LOWCR
# LOWC:R
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

SMALC
RLEAS

SMDEL

DLHDR

INWIN

SMALC

# LOWCR

RWVB

9-60

IXEXT

# LOWCR

CROSS-REFERENCES
Symbol
$DRREQ
$DRRES
$DRRRA
$DRRRF
$DRRUN
$DRSDV
$DRSEF
$DRSND
$DRSPN
$DRSRF
$DRSTV
$DRUNM
$DRWFL
$DRWFS
$DRWSE
$DSW
$050
$DTOER
$OTO
$DVCER
$DVERR
$DVMSG
$DXO
$DYPMN
$EMSST
$EMTRP
$ERRHD
$ERRLM
$ERRPT
$ERRSQ
$ERRSV
.$ERRSZ
$EXRQF
$EXRQN
$EXRQP
$EXSIZ
$FINBF
$FLTRP
$FMASK
$FNDSP
$FORK
$FORKO
$FORK1
$FPINT
$FRKHD
$GTBYT
$GTPKT
$GTWRD
$HEADR
$ICHKP
$!LINS
$INITL
$INTCT
$INTSE
$INTSV
$INTXT
$INTX1
$IOABM
$IOALT
$IODON
$IOFIN
$IOKIL

Value
031714
031746
026142
025232
025762
032532
032420
030440
032006
024716
032540
024672
032450
032512
032434
000046
044064
032754
044276
033016
033016
007446
044472
005470
017156
021512
005700
005704
005514
005706
005710
005712
016434
016452
016426
005520
003776
017212
005552
015750
002320
002342
002340
017226
005546
006102
007510
006160
005564
016160
017304
052414
005542
002376
002434
002374
002456

005714
010272
010274
010414
010666

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
OVERR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DMOUNT
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
CRFIL
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DI SPAT
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DI SPAT
# LOWCR

RWVBL

RWlLB

# LOWCR

PROCK

# LOWCR

MPVBN

# LOWCR

9-61

CROSS-REFERENCES
Symbol
$IOTRP
$LCKPR
$LDPWF
$LDRPT
$LOADR
$LOADT
$LOGHD
$LPO
$LSTLK
$MAPTK
$MCRCB
$MCRPT
$MMO
$MPCSR
$MPLND
$MPLNE
$MPLUN
$MPPHY
$MPPKT
$MPVBN
$MUL
$MXEXT
$NLO
$NON SI
$NSO
$NS1
$NS2
$NS3
$NS4
$NS5
$NS6
$NS7
$NULL
$NXTSK
$PANIC
$PARHD
$PARPT
$PARTB
$PCBS
$PKAVL
$PKMAX
$PKNUM
$POOL
$POWER
$PPO
$PRO
$PTBYT
$PTWRD
$PWRFL
$QASTT
$QEMB
$QIN SF
$QINSP
$QMCRL
$QRMVF
$QRMVT
$RELOC
$RELOM
$RELOP
$RLMCB
$RLPAR
$RLPR1

Value
017316
011552
014124
005464
041214
016422
005624
044614
005630
017036
005626
005466
045014
012734
011126
011106
011070
011170
011240
011372
012534
005770
051622
002556
033300
033306
033314
033322
033330
033336
033344
033352
043100
015322
001470
005422
005554
012670
052164
005764
005767
005766
052310
013750
045144
045266
006132
006160
005416
015062
033516
014332
014340
014376
014406
014420
012222
012272
012410
023434
015246
015310

Modules; That Reference Symbol
# LOWCB:
# LOWC:R
# LOWCF:
# LOWCR
# LOWCR:
fl: LOWCR
# LOWCR
# LOWCR
# LOWCR:
# LOWCR
# LOWCR:
# LOWCR:
LOWC:R
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
LOWCR.
DATIM
# LOWCR.
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
fl: LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DI SPAT
# LOWCR
BLXIO
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

RWVB
MPVBN
# LOWCR

fl: LOWCR

# LOWCR

9-62

RWVBL
RATCM

WATCM

CROSS-REFERENCES
Symbol
$RQSCH
$SAVNR
$SCDVT
$SCDV1
$SETCR
$SETF
$SETM
$SETRQ
$SETRT
$SGFLT
$SHFPT
$SIGFL
$SRATT
$SRNAM
$SRSTD
$SRWND
$STACK
$STD
$STKDP
$STPCT
$STPTK
$SWSTK
$SYBEG
$SYSID
$SYSIZ
$SYTOP
$SYUIC
$TKNPT
$TKPS
$TKTCB
$TKWSE
$TRACE
$TRP04
$TRTRP
$TSKHD
$TSKRP
$TSKRQ
$TSKRT
$TSTCP
$TTNS
STTO
$TT1
$TT10
$TTll
$TT12
$TT13
$TT14
$TT15
$TT16
$TT17
$TT2
$TT20
$TT21
$TT22
$TT23
$TT24
$TT25
$TT26
$TT27
$TT3
$TT30
$TT31

Value
005452
004144
012306
012312
014704
014762
014766
014734
014732
017336
005516
005420
034124
033644
015132
034162
000642
052220
005454
015222
015226
004164
053424
005574
005716
063424
005612
005600
005744
005446
032430
017376
017410
021446
005512
016504
016502
016476
016052
005762
045534
045564
04 7672
04 7722
047752
050002
050032
050062
050112
050142
047452
050172
050222
051210
051260
051310
051340
051370
051420
047502
051450
051500

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DI SPAT
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
DI SPAT
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR

WTRNl

# LOWCR

DMOUNT

9-63

# LOWCR

CROSS-REFERENCES
Symbol

Value

$TT4
$TT5
$TT6
$TT7
$UISET
$UNMAP
$USRTB
$XDT
.ACBMX
.ACCES
.AGAIN
.ALCAD
.ALCTL
.ALFCB
.ALLOC
.ALOBT
.ATCTL
.ATMAX
.BLXI
.BLXIl
.BLXO

047532
047562
047612
047642
016776
034222
000000
035002
000006
136540-R
121406-R
121640-R
121632-R
120252-R
120274-R
126144-R
137414-R
000016
120340-R
120344-R
120372-R

.BLXOl
.CKFRE
.CKSMl
.CKSUM
.CLACC
.CLACl
.CLCRE
.CLDAC
.CLDEL
.CLDIR

120376-R
126136-R
120430-R
120424-R
120450-R
120516-R
136722-R
121034-R
136520-R
137030-R

.CLEXI
.CLEXT
.CLEXl
.CLEX2
.CLFCB
.CLFCl
.CLNUP
.CLRAT
.CLWAT
.CLO

137730-R
137134-R
121302-R
121304-R
137526-R
121316-R
137744-R
136660-R
136702-R
051756
051732
122062-R
137466-R
137670-R
140346-R
043162
043222
043262
043322
140502-R
126154-R
043464
043524
043564
140110-R
140130-R
140304-R
121314-R
140356-R

.coo

.CRFCB
.CRFID
.CRFIL
.DATIM
.DBO
.DB!
.DB2
.DB3
.DEACC
.DELBT
.DKO
.DKl
.DK2
.DLBLK
.DLBLl
.DLFIL
.OLFLl
.DLHDR

Modules That Reference Symbol
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# ATCTL
* ACCESS
# DISPA~r
EXCMP
EXCMP
# ALLOC
ACCESS
SMALC
* ATCTL
# ATCTL
# BLXIO
# BLXIO
# BLXIO
EX COM
# BLXIO
SMALC
# CK SUM
# CK SUM
i CLACC
# CLACC
* CLCRE
# CLDAC
CL COM
* CLDIR
* FNDNM
* CLNUP
CLCRE
# DISPA~r
# DISPA~r
* CLFCB
CL COM
* CLNUP
* CL COM
* CLCOM
# LOWCR
# LOWCR
ACCESS
* CRFID
* CRFIL
CRFIL
# LOWCR
# LOWCR
# LOWCR
# LOWCR
* DEA CC
SMDEL
# LOWCR
# LOWCR
# LOWCR
CL EXT
CLEXT
CLCRE
CLOAC
CL COM

RATCM

WATCM

@ DI SPAT

DREXT
EX COM
EX COM
INFCB
# ALLOC
# SMSCN
RATCM
RATCM
DRINI
CLCRE
RATCM

IXEXT
EX TEN
EXTEN

# FllCM
# FllCM

SMALC

WAT CM
WAT CM
EX TEN

GTFID

WATCM

CRFIL

DREX

EXCMP

RDHDR

WRHDR

INWIN

# SMSCN
DREXT
CLNUP
CLDAC
CLNUP
CLNUP
CLNUP
CLNUP

DEA CC
DREOF

DREXT

CLNUP

@ DI SPAT

CL EXT

# DISPAT

EXTHD
EXTHD

# INFCB

DRWRT

@ DI SPAT

* CLEXT

TRUNC
EXTHD
@ DI SPAT
CLDAC
@ FllCM
CLNUP
CLNUP
DRACC
CRFIL
@ DI SPAT
* DATIM

DEA CC

@ DI SPAT

# SMSCN

* DLBLK
* DLBLK

@ DI SPAT

# DI SPAT

CLEXT

9-64

DLFIL

DREXT

* DLFIL
DLMRK
DLFIL

* DLHDR

RDATT

CROSS-REFERENCES
Symbol

Value

.OLHDl
.OLMRK
.OMOUN
.ORACC
.ORACl
.ORALC
.ORBUF
.ORCPY
.OREFl
.ORENB
.OREOF
.DREX
.OREXT
.OREXl
.DRFNB
.ORFRE
.ORGET
.ORHRC
.ORHVR
.DRINI
.ORLBN
.ORLVB
.ORNLB
.ORPAC
.DRSEF
.ORUCB

140404-R
140516-R
140716-R
141160-R
121324-R
140652-R
131232-R
141704-R
121322-R
134232-R
142020-R
142100-R
142132-R
121320-R
122252-R
122246-R
142624-R
122242-R
122244-R
143050-R
131226-R
122250-R
134232-R
143172-R
142040-R
131224-R

.ORVLB
.ORWEX
.ORWRT
.ORXl
.OSPAT

.ox1
.ENTNM
.ENTRY
.ERMSG
.EXCMP
.EXCMl
.EXCM2
.EXCM3
.EXCNT
.EXCOM
.EXDSP

143250-R
143416-R
143354-R
142104-R
121452-R
000044
043720
043760
044020
044162
044226
044366
044426
143446-R
121330-R
121604-R
141550-R
121276-R
121310-R
121312-R
142624-R
142114-R
121616-R

.EXFCB
.EXFNU
.EXHDJ
.EXHDR
.EXIT
.EXNHD
.EXSTS

12·1630-R
121626-R
142030-R
121622-R
121510-R
121624-R
121617-R

.osw
.oso

.DSl
.052
.OTO
.OTl

.oxo

.EXTEN
.EXTEl

142770-R
143064-R

Modules That Reference Symbol
CLCRE
@ DI SPAT
@ DI SPAT
@ DI SPAT

# DI SPAT
DRALC
* DRGET
* DRCPY
# DI SPAT
ORGET
@ DI SPAT
* DREX
@ DI SPAT
# DI SPAT
ORIN I
ENTNM
* DRGET
# LOCAT
ENTNM
* DRINI
DRWRT
ENTNM
DRGET
* DRPAC
* DREOF
CLNUP
SCFAC
DRCPY
* ORWRT
ORWRT
* DREX
* DI
SPAT
#
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
@ DI SPAT
# DI SPAT
# FllCM
@ DI SPAT
# DI SPAT
# DI SPAT
# DI SPAT
@ DI SPAT
@ DI SPAT
CLCRE
# FllCM
EXCMP
CL EXT
@ DI SPAT
CLCOM
CLNUP
CL EXT
ACCESS
CRFIL
RDATT
@ DI SPAT
@ DI SPAT

CLEXT
* DLMRK
DMOUNT
** DRACC
ENTNM
DREXT
DRWRT
DREXT
DRWRT
# FllCM
* DREOF
FNDNM
* OREXT
ENTNM
ENTNM
# LO CAT
ENTNM
# LOCAT·
ENTNM
# FllCM
FDRMV
ENTNM
ENTNM
DREXT
OMOUNT

DRGET
ENTNM
ENTNM
ORWRT
ORACC

* DLHDR
FNONM

RMVNM

# FllCM

FDRMV

# LOCAT

@ LOCAT

FNONM
# LO CAT
# FllCM

RMVNM

FNONM

RMVNM

DRGET

ENTNM

* DRVLB

ENTNM

# FllCM

RMVNM
RMVNM
DREXT

* ENTNM

* EXCMP

DREXT
EX COM
EXCMP
* EXCOM
* EXCOM
CLNUP
IX EXT
E'XCOM
EX THO
* EXCMP
CLEXT
# DI SPAT
EXTHD
CLCRE
DEA CC
TRUNC
TEN
* EX
EX
* TEN
9-65

EX TEN

IXEXT

DI SPAT

DLFIL

EX THO
# FllCM

# FllCM

EX COM

# FllCM

TRUNC

# FllCM

TRUNC
CL EXT
EXTHD

# FllCM

CLDAC
EX COM
WRATT

DR EXT

CLNUP

C:ROSS-REFERENCES

Symbol

Value

.EXTHD
.EXTHl
.EXTNl
.EXTSV
.FCBAD

143320-R
121306-R
121274-R
121620-R
121614-R

.FDRMV
.FILNO

144032-R
121606-R

.FILSQ

121610-R

.FNDNM
.FREPT
.FRLH
.FlEND
.FlORG
.GTFID

144360-R
125620-R
121644-R
136134-R
134234-R
121720-R

.GTMAP

122044-R

.HDBUF

130224-R

.HDLBN
.HOUCB

130220-R
130216-R

Modules That Reference Symbol
EXCMP
# DISPA1'

CRFIL
CL COM
ACCESS
CLFCB
DREOF
ENTNM
FNDNM
RATCM
WAC CK
* FDRMV
ACCESS
DRINI
IX EXT
CRFIL
ROH DR
@ DISPA'l'
EXCMP
ALLOC
# FllCM
# FllCM
ACCESS
RWATT
CL COM
EXCMP
NXHDR
ACCESS:
DEA CC
DREOF
# FllCM
RATCM
WTRNl
CRFIL
CL COM
DMOONT
WRHDR
CLFCB
# INFCB
@ DISPA'I
ACCESS:
CLNUP
DREXT
SMALC
ACCESS
EXCMP
SMALC
@ DISPA'l
CLNUP
# LOWCR
# LOWCR
# LOWCR
ENTNM
i LOWCR
# LOWCR
# LOWCR
CRFIL
DRVLB
* DREXT
* DREXT
# LOWCR
# DI SPAT

.INFCB

122100-R

.INIT
.INWIN
.IOPKT

143772-R
144034-R
121570-R

.IOSTS

121600-R

.IXEXT
.IXEXl
.LBO
.LOR
.LDRHD
.LOCAT
.LPO
.MMO
.MMl
.MPHDR
.MPVBN
.NDRLB
.NORSZ
.NLO
.NOOP

144526-R
121300-R
052002
052220
052040
122304-R
044562
044704
044746
122604-R
122650-R
142126-R
142124-R
051570
121566-R

* EXTHD

EX COM
t DI SPAT
CL EXT
CLACC
DEA CC
DREXT
EXCMP
i FllCM
RDATT
WATCM
FNDNM
CLACC
EXCMP
RDATT
DRINI
SCFCB
* FNDNM
EX COM
# FllCM
INIT
INIT
DEA CC

EX COM
CLCOM
DLMRK
DRGET
EX COM
GTFID
RDHDR

# FllCM
CLDAC
DRACC
DRPAC
EXTHD
INWIN
SCFAC

TRUNC
CLDIR
DRCPY
DRWRT
FDRMV
IXEXT
TRUNC

RMVNM
CLCRE
FNDNM
RDHDR
FNDNM

CRFIL
# FllCM
SCFCB
# FllCM

DLMRK
GTFID

# SM COM
INIT

RLEAS

RLEAS
DLMRK

EX TEN

# GTFID

# GT MAP

CRFIL

DLFIL
INFCB

CLEXT
DLMRK
EX COM
NXHDR
WAT CM

CRFIL
DRACC
EX THO
PROCK
WRHDR

IX EXT

CL EXT
EX COM
RD HOR
CL COM
DLBLK
DREXT
GT MAP
ROH DR

CLFCB
EX THO
TRUNC
CLO AC
DLHDR
EXCMP
INFCB
TRUNC

EXTHD
CLNUP
DREXT

# FllCM
CRFID
EX THO

INFCB
DLBLK
# FllCM

DLHDR
ROH DR

DRACC
RDATT
* INIT
ORA CC
DI SPAT
DRVLB
SMNXB
CL EXT
EX COM
WATCM
w IXEXT
CRFIL

DREXT
WAT CM

EXCMP

EX THO

DRACC
FDRMV

DREX
# FllCM

DI SPAT
# FllCM

DREXT
RWVBL

# DI SPAT

FDRMV

# LOCAT

EXTHD
EX TEN

# MPH DR
MPH DR

9-66

* INWIN

DLBLK
ENTNM
TRUNC
CLNUJ?
EXTHD

ROH DR
i MPVBN

CROSS-REFERENCES
Symbol

Value

.NXHDR
.NXHDl
.PPO
.PRCKl
.PRCK2
.PRCK3
.PROCK

122706-R
122724-R
045112
123024-R
123034-R
123044-R
123014-R

.PRO
.QIOST
.RATCM
.RDATT
.RDFHD

045234
121574-R
144370-R
144614-R
123256-R

.RDHDR
.RDNLB
.RDlLB

123316-R
124222-R
124242-R

.RHDFN
.RHDLB
.RLEAS

123334-R
123342-R
123512-R

.RLFCB
.RMVNM
.RWATT
.RWSIZ
.RWVB.
.RWVBL
.RWVBl
.SCFAC

123554-R
145002-R
144772-R
124220-R
145046-R
123646-R
121326-R
124376-R

.SCFCB
.SMALC
.SMBUF
.SMCNT
.SMCTL
.SMDEL
.SMEXT
.SMFLG
.SMNXB
.SMRVB

124466-R
124530-R
127216-R
125614-R
125611-R
145050-R
125610-R
100000
125622-R
125730-R

.SMSCN
.SMUCB

126102-R
127212-R

.SMVBN

127214-R

.SMlAD
.SMlBT

125572-R
125564-R

.SMlMK
.SMlVB
.SM2AD
.SM2BT
.SM2MK
.SM2VB
.SSTSZ
.SSTVC
.STACK
.START

125570-R
125574-R
125600-R
125604-R
125602-R
125576-R
000007
121646-R
120252-R
121334-R

Modules That Reference Symbol
ACCESS
CLEXT
# LOWCR
# PROCK
DLMRK
ENTNM
ACCESS
WAT CM
# LOWCR
FllCM
ACCESS
@ DI SPAT
ACCESS
DRACC
# RDHDR
CLFCB
DRGET
CRFID
RDHDR
CL EXT
# ROH DR
CLACC
DMOUNT
RLFCB
CLACC
@ DI SPAT
RDATT
# RWlLB
@ DI SPAT
DI SPAT
# DI SPAT
ACCESS
RWATT
DRPAC
DRALC
# FllCM
SMALC
DRALC
CL EXT
EX COM
# FllCM
SMALC
CLEXT
SMDEL
SMALC
CLACC
INWIN
CL COM
SMSCN
SMALC
CLEXT
SMALC
SMALC
SMALC
# SM COM
SMALC
# SMCOM
SMALC
# FllCM
# FllCM
CLNUP
# DI SPAT

EX COM
DLFIL

# NXHDR
# NXHDR

RDA'l'T

TRUNC

FDRMV
EX TEN

# PROCK
# PROCK

RWATT

TRUNC

RWVBL

RWlLB
RDATT
DEACC
EXCMP

DLMRK
EX TEN

DLHDR
SMRVB
NXHOR

DRCPY

EX THO

ROATT

# RDHOR

CLDIR
RATCM
WATCM
# RLFCB

CLNUP
RDATT

DEACC
# RLEAS

DREXT

BXTEN

SMALC
SMDEL
EX COM
* SMDEL

SMDEL
SMNXB
SMALC

SMNXB

SMNXB
SMSCN
DREXT
# SMRVB
# SMSCN
CLNUP
SMRVB
# FllCM

SMRVB

EXCMP
SMDEL

# PROCK

* RATCM

* RDATT

CLCRE
DREOF
RWATT
RDHDR
# RWlLB
CRFIL
# RWlLB
EXTHD

CL COM
EXT EN
SCFAC
CLFCB
* RMVNM
* RWATT

* RWVB
# RWVBL
RWVB
DLMRK
# SCFAC
SCFAC
EX COM
INWIN
# SMCOM
EXCMP
DLBLK
# SMCOM
SMALC
# SMNXB
DLFIL
SMNXB
SMDEL
CL COM
SMALC
CLNUP
# SM COM

DRALC
SM COM
# SM COM
# SMCOM

CLFCB
DREXT
WIT RN

WRATT

DRACC
# SCFCB
# SMALC

EXCMP

SMALC

OMOUNT

# FllCM

SMALC

SMNXB

EX COM
TRUNC

EXTHD

SMDEL

# SM COM

DI SPAT
RWVB

9-67

DRACC

# SMCOM

# FllCM

CROSS-REFERENCES
Symbol

Value

.SVLBN
.SYO
.TIO
.TRUNC
.TTO
.TTl
.TTlO
.TTll
.TT12
.TT13
.TT14
.TT15
.TT16
.TT17
.TT2
.TT20
.TT21
.TT22
.TT23
.TT24
.TT25
.TT2"6
.TT27
.TT3
.TT30
.TT31
.TT4
.TT5
.TT6
.TT7
.UCBAD

125560-R
052026
051706
145274-R
045362
045452
046400
046470
046560
046650
046740
047030
047120
047210
045660
047300
047370
050316
050406
050476
050566
050656
050746
045750
051036
051126
046040
046130
046220
046310
121572-R

.USEPT
.WACCK
.WATCH
.WITRN

125616-R
145172-R
145212-R
126172-R

.WNDOW

121612-R

.WRATT
.WRHDR

145542-R
126272-R

.WRHDl
.WRlLB

126304-R
124234-R

.WTRNl
.ZERCT

126330-R
000021

Modules That Reference Symbol
DLBLK
# LOWCR.
# LOWCR
DLMRK
# LOWCR
# LOWCR
LOWCR.
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR.
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
# LOWCR
CLACC
DLBLK
# FllCM
SMALC
EXCMP
DRACC
CRFIL
DRVLB
RWVB
ACCESS
EXCMP
IN WIN
@ DI SPAT
CL COM
DREOF
# WRHDR
CRFID
DLHDR
WRHDR
ACCESS
DI SPAT

EXCMP

EX COM

# SMCOM

CLNUP
DMOUNT
PROCK
SMRVB
EX COM
EXTEN
DEACC
EX TEN
RWVBL
CLACC
EX TEN
IXEXT
* WRATT
CLDAC
DR EXT

CRFID
DREXT
RDHDR
WRHDR
# SM COM
* WAC CK
* WATCM
IN WIN
# WIT RN
CLDIR
EXTHD
TRUNC

CRFIL
DRGET
RWVB

DI SPAT
ENTNM
SCFAC

WRATT
WRATT
IX EXT

MPH DR

DEA CC
# FllCM
WRATT

DRVLB
GTFID

CLEXT
EXCMP

CRFIL
EXTHD

DLMRK
WRATT

DLHDR
DRCPY

# WRHDR

DRWRT

# RWlLB

SMRVB

EXCMP
# FllCM

EXTHD

WIT RN

# WTRNl

* TRUNC

9-68

CROSS-REFERENCES
9.8

BIGFCP SEGMENT CROSS-REFERENCES

The BIGFCP segment cross-reference lists the name of each overlay
the modules that compose it. The cross-reference follows:

Segment
Name
FCPHI

FCPLO

FllACP

9.9

and

Resident Modules
ACCESS
DMOUNT
INIT
WAC CK
CLCOM
DLBLK
DREOF
DRVLB
RMVNM
ALLOC
DI SPAT
INFCB
OVERR
RWlLB
SMRVB

ATCTL
DRACC
INWIN
WATCM
CLCRE
DLFIL
DREX
DRWRT
SMDEL
BLXIO
EX EDF
LOCAT
PROCK
SCFAC
SMSCN

CRFID
EXCMP
RATCM
WRATT
CLDIR
DLHDR
DREXT
ENTNM
TRUNC
CK SUM
FllACP
LOWCR
RDHDR
SCFCB
WIT RN

CRFIL
EX COM
RDATT

DAT IM
EX TEN
RWATT

DEA CC
EXTHD
RWVB

CL EXT
DLMRK
DRGET
FDRMV

CLFCB
DRALC
ORIN I
FNDNM

CLNUP
DRCPY
DRPAC
IX EXT

CLACC
FllCM
MPH DR
RLEAS
SMALC
WRHDR

CLO AC
GTFID
MPVBN
RLFCB
SMCOM
WTRNl

DARI TH
GT MAP
NXHDR
RWVBL
SMNXB

CONDITIONAL ASSEMBLY PARAMETER TO MODULE CROSS-REFERENCE

This cross-reference contains a listing of the conditional assembly
parameters that are contained in the Executive modules. Listed to the
right of each parameter are those Executive modules that contain
conditional assemblies affected by the parameter.
Conditional
Assembly
Parameter

Modules That Contain
The Parameter

A$$CHK

DRATX
DRQIO
TTDRV

DRDSP
DRRAS

DRGLI
DRS ED

DRGPP
DRS ST

DRGTK
IO SUB

DRGTP
SST SR

A$$CPS

DK TAB
IOSUB

DMTAB

DRQIO

DRRES

OTT AB

DX TAB

A$$001

BFCTL

A$$Fll

BFCTL

A$$NSI

DRQIO

MMTAB

MTORV

MTTAB

A$$PRI

DRDSP

DRE IF

DRRES

A$$TRP

ORATX
ORMAP
REQSB

DRCIN
DRPUT
SYSXT

ORO AR
DRREG
TD SCH

ORE IF
LOADR

DREXP
POWER

B$$00T

CRASH

C$$CDA

CRASH

9-69

ORD SP
IOSUB
TTORV

1:::ROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Parameter

C$$CKP

ORATX
IOSUB
TTORV

ORDCP
LO.AOR

ORD SP
REQSB

ORE IF
SYSCM

OREXP
SYSXT

ORREG
TOSCH

C$$INT

ORCIN

ORDCP

REQSB

SYSXT

ORO SP

DRE IF

C$$MPT

XU ORV

C$$RSH

CRASH

0$$Bll

XBORV

D$$Bll-1

XBORV

D$$Hll

LOWCR

TTDRV

O$$IAG

CTTAB
OPORV
IOSUB
PPTAB

OB ORV
ORiQIO
LP'TAB
SYSTB

OK TAB
OTO RV
MMD RV

OLD RV
OTTAB
MMTAB

OMDRV
DX TAB
MTDRV

OMTAB
ERROR
MTTAB

0$$ISK

ORDCP
LO.AOR

ORO SP
REQSB

ORE IF
TOSCH

ORREG

ORRES

0$$Jll

ORATX
IO SUB
TTDRV

0$$Lll

TTORV

D$$Mll

TTORV

O$$Pll

XPORV

O$$Pll-l

XPORV

D$$Qll

XQDRV

0$$Qll-1

XQDRV

O$$SHF

ORCIN

IO.SUB

PARTY

REQSB

TD SCH

0$$Ull

XU ORV

0$$Ull-1

XUDRV

D$$Wll

XWDRV

0$$Wll-1

XWDRV

D$$WCK

OBORV

DMD RV

OPDRV

D$$YNC

DREXP

LO.ADR

REQSB

SYSCM

D$$YNM

ORCIN
ORREQ
SYSXT

ORO SP
IO.SUB
TOSCH

ORE IF
PLSUB
TT ORV

DREXP
REQSB

0$$Zll

TTDRV

D$$ZMO

TT ORV

9-70

ORGPP
SYSCM

DRREG
SYSOF

CROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Parameter

E$$DVC

CTDRV
DMTAB
DX TAB
MTDRV
SYSXT

CTTAB
DPDRV
ERROR
MTTAB

E$$EAE

POWER

SYSXT

E$$NSI

DRCIN

E$$PER

DBDRV
DRDRV.
IOSUB
POWER

DK TAB
DTDRV
LPTAB
PPTAB

DLDRV
DTTAB
MMD RV
SYSCM

DMD RV
DXDRV
MMTAB
SYSTB

ERROR

LOWCR

POWER

SYSCM

SYSXT

ERROR

PARTY

POWER

E$$XPR

DRDSP

DREXP

LOADR

SYSCM

F$$AST

POWER

SSTSR

F$$LPP

DRDSP
SYSXT

DRE IF

DRPUT

POWER

REQSB

SST SR

F$$LTP

SSTSR

G$$TPP

DRDSP

DRGPP

G$$TSS

DRDSP

DRGSS

G$$TTK

DRDSP

DRGTK

G$$WRD

BFCTL

I$$Cll

LOWCR

!$$CAD

BFCTL

I$$RAR

DRE IF

TTDRV

I$$RDN

DRE IF

TTDRV

K$$CNT

SYSCM

K$$CSR

SYS CM

K$$LDC

SYSCM

K$$Wll

POWER

L$$11R

LPDRV

L$$50H

TTDRV

L$$ASG

DRASG

L$$DRV

CTTAB
OX TAB
PPTAB
TOSCH

DKTAB
IOSUB
QUEUE
TT ORV

DMTAB
LP TAB
REQSB

DRGLI
MM TAB
SYSCM

DRQIO
MTTAB
SYSTB

DTTAB
POWER
SYSXT

L$$LDR

LOADR

SYSCM

SYTAB

L$$Pll

LPDRV

TD SCH

9-71

CROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Paramet1~r

L$$SI1

CRASH

LD$$H

TTDRV

LD$$J

TTDRV

LD$$L

TTDRV

LD$$Z

TTDRV

LD$CT

CTTAB

LD$DK

DK TAB

LD$DM

DMTAB

LD$DT

DTTAB

LD$DX

DXTAB

LD$LP

LPTAB

LD$MM

MMTAB

LD$MT

MTTAB

LD$NL

SYSTB

LD$PP

PPTAB

LD$PR

PPTAB

LD$TT

SYSTB

LD$TT

XMDRV

M$$CRI

TTDRV

M$$CRX

DRDSP

O:REIF

DRGCL

M$$EXT

DBDRV
DRDRV
MTDRV
XMDRV

DJKTAB
o•roRv
MrTAB
X1;:)DRV

OLD RV
DTTAB
POWER

M$$IXD

DBDRV

!(')SUB

MMD RV

M$$MGE

BFCTL
DMD RV
DRDSP
DRGTP
DRS ST
IO SUB
MMTAB
PPTAB
SYS TB
XMDRV

CRASH
DMTAB
DRE IF
D.RQIO
o·roRv
LOADR
MrDRV
QUEUE
SYSXT
x:eORV

CTTAB
DP ORV
DREXP
DRRAS
DTTAB
LOWCR
MTTAB
REQSB
SYTAB
XQDRV

IN I TL

POWER

SYSCM

SYSXT

TTDRV

DMD RV
IN I TL
SYSCM

DMTAB
IOSUB
SYSDF

DP ORV
MMD RV
XBDRV

DBDRV
DRATX
DRGLI
DRREG
DXDRV
LPDRV
PARTY
SST SR
TOSCH
XUDRV

DK TAB
DRCIN
DRGPP
DRREQ
DXTAB
LP TAB
PL SUB
SYSCM
TTDRV
XWDRV

DLDRV
DRDRV
DRGTK
DRS ED
IN I TL
MMD RV
POWER
SYSDF
XBDRV

TTIDRV

9-72

CROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Parameter

M$$MUP

CTTAB
DRMKT
DX TAB
SYS CM

DKTAB
DRQIO
LPTAB
SYS TB

DMTAB
DRRAS
MMTAB
TTDRV

DRASG
DRREQ
MTTAB

DRDSP
DRRES
PP TAB

DRGTK
DTTAB
REQSB

M$$NET

DRQIO
XU ORV

LOWCR
XWDRV

XBDRV

XMDRV

XPDRV

XQDRV

N$$MOV

BFCTL

N$$UMR

SYS CM

P$$D70

PARTY

P$$GMX

ORD SP

DRMAP

P$$LAS

DRDSP
DRREG
SYSCM

DREIF
LOADR
SYSXT

DREXP
LOWCR
SYTAB

DRGPP
PL SUB
TTDRV

DRMAP
REQSB

DRPUT
SSTSR

P$$P45

NULTK

P$$Rll

PRDRV

P$$RFL

DRDSP

DREIF

DRPUT

POWER

REQSB

P$$RTY

IN I TL

PARTY

POWER

SYSCM

P$$SRF

DRDSP
SY TAB

DREIF

DRMAP

DRPUT

LOADR

REQSB

P$$WRD

BFCTL

Q$$22

XMDRV

Q$$IO

XMDRV

Q$$0PT

CORAL

IO SUB

SYSCM

Q$$CRC

XQDRV

Q$$MPT

XQDRV

R$$11S

DRGTK

IN I TL

LOADR

SYSCM

SYTAB

TTDRV

R$$60F

DMD RV

IOSUB

R$$611

DMD RV

IO SUB

R$$DER

CORAL

R$$EXV

SYS CM

SYSXT

R$$JP1

DBDRV

IOSUB

R$$JPO

DBDRV

IOSUB

R$$JS1

IO SUB

9-73

CROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Paramete·r

R$$Kll

IO SUB

R$$Lll

OLORV

ICiSUB

R$$LKL

ORQIO

IOSUB

R$$Mll

IOSUB

R$$MOF

IOSUB

R$$NOC

TOSCH

R$$Pll

OPORV

ICISUB

R$$SNO

ORO SP

R$$Xll

DXDRV

S$$ECC

SYSXT

TTORV

DFtEIF

DRPUT

DRRAS

LOADR

DBDRV

DMD RV

IOSUB

S$$WPC

LOADR

RE:QSB

TOSCH

S$$WPR

LOADR

S$$YSZ

SYSCM

T$$18S

TTDRV

T$$30P

SYSXT

T$$All

CTDRV

T$$ACR

SYSTB

T'J~DRV

T$$BTW

SYS TB

T'JmRV

T$$BUF

DREIF

DHEXP

SYSXT

TTDRV

T$$Cll

DTDRV

IO SUB

T$$CCA

SYS TB

T~rDRV

T$$CCO

SYS TB

T~rDRV

T$$CTR

TTDRV

T$$ESC

SYSTB

T~rDRV

T$$GMC

SYS TB

T~rDRV

T$$GTS

SYS TB

T~rDRV

T$$HLD

SYS TB

T~rDRV

T$$Jl6

MMD RV

T$$KMG

DRE IF

T$$LWC

TTDRV

T'J~DRV

DRREG

IOSUB

9-74

REQSB

CROSS-REFERENCES
Conditional
Assembly
Parameter

Modules That Contain
The Parameter

T$$Mll

MTDRV

T$$MIN

TTDRV

T$$RNE

TTDRV

T$$RPR

SYS TB

T$$RST

TTDRV

T$$RUB

TTDRV

T$$SMC

SYSXT

TTDRV

T$$SYN

SYSXT

TTDRV

T$$TRW

SYSXT

TTDRV

T$$UTB

SYSXT

TTDRV

T$$VBF

SYSXT

TTDRV

U$$ADM

BFCTL

V$$CTR

LOWCR

X$$18

XMDRV

X$$22

XMDRV

X$$LDM

XMDRV

X$$Mll-l

XMDRV

X$$Mll

XMDRV

9.10

TTDRV

SYSDF

MODULE TO CONDITIONAL ASSEMBLY PARAMETER CROSS-REFERENCE

This cross-reference contains a listing of the Executive modules that
contain conditional assembly parameters. Listed to the right of each
module are the parameters that affect the assembly of the module.
Module

Conditional Assembly Parameters in Module

BFCTL

A$$001
N$$MOV

A$$Fll
P$$WRD

CORAL

Q$$0PT

R$$DER

CRASH

B$$00T

C$$CDA

CTDRV

E$$DVC

T$$All

CTTAB

D$$IAG
M$$MUP

E$$DVC

G$$WRD
U$$ADM

!$$CAD

M$$MGE

C$$RSH

L$$SI1

M$$MGE

L$$DRV

LD$CT

· M$$MGE

9-75

CROSS-REFERENCES
Module

Conditional Assembly Parameters in Module

DBDRV

D$$IAG
M$$MGE

D$$WCK
R$$JP1

E$$DVC
R$$JPO

M$$EXT
S$$ECC

M$$IXD

DKTAB

A$$CPS
M$$EXT

0$$IAG
M$$MUP

E$$DVC

L$$DRV

LD$DK

OLD RV

O$$IAG · E$$DVC

M$$EXT

M$$MGE

R$$Lll

DMD RV

0$$IAG
R$$60F

D$$WCK
R$$611

E$$DVC
S$$ECC

M$$EXT

M$$MGE

DMTAB

A$$CPS
M$$EXT

D$$IAG
M$$MGE

E$$DVC
M$$MUP

L$$DRV

LD$DM

DPDRV

O$$IAG
R$$Pll

0$$WCK

E$$DVC

M$$EXT

M$$MGE

DRASG

L$$ASG

M$$MUP

DRATX

A$$CHK

A$$TRP

C$$CKP

O$$ISK

M$$MGE

DRCIN

A$$TRP
M$$MGE

C$$INT

D$$SHF

D$$YNM

E$$NSI

ORD AR

A$$TRP

DROCP

C$$CKP

C$$INT

0$$ISK

DRDRV

E$$DVC

M$$EXT

M$$MGE

ORD SP

A$$CHK
D$$ISK
G$$TSS
P$$GMX

A$$PRI
O$$YNM
G$$TTK
P$$LAS

A$$TRP
E$$XPR
M$$CRX
P$$RFL

C$$CKP
F$$LPP
M$$MGE
P$$SRF

C$$INT
G$$TPP
M$$MUP
R$$SND

DRE IF

A$$PRI
D$$YNM
M$$MGE
T$$BUF

A$$TRP
F$$LPP
P$$LAS
T$$KMG

C$$CKP
I$$RAR
P$$RFL

C$$INT
I$$RON
P$$SRF

O$$ISK
M$$CRX
R$$SND

DREXP

A$$TRP
M$$MGE

C$$CKP
P$$LAS

0$$YNC
T$$BUF

0$$YNM

E$$XPR

DRGCL

M$$CRX

DRGLI

A$$CHK

L$$DRV

M$$MGE

DRGPP

A$$CHK

0$$YNM

'G$$TPP

M$$MGE

P$$LAS

DRGSS

G$$TSS

DRGTK

A$$CHK

G$$TTK

M$$MGE

M$$MUP

R$$11S

DRGTP

A$$CHK

M$$MGE

DRMAP

A$$TRP

P$$GMX

P$$LAS

P$$SRF

DRMKT

M$$MUP

9·-76

CROSS-REFERENCES
Module

Conditional Assembly Parameters in Module

DRPUT

A$$TRP
R$$SND

F$$LPP

P$$LAS

P$$RFL

P$$SRF

DRQIO

A$$CHK
M$$MGE

A$$CPS
M$$MUP

A$$NSI
M$$NET

D$$IAG
R$$LKL

L$$DRV

DRRAS

A$$CHK

M$$MGE

M$$MUP

R$$SND

DR REG

A$$TRP
P$$LAS

C$$CKP
T$$BUF

0$$ISK

0$$YNM

DRREQ

0$$YNM

M$$MGE

M$$MUP

DRRES

A$$CPS

A$$PRI

0$$ISK

M$$MUP

DRS ED

A$$CHK

M$$MGE

DRS ST

A$$CHK

M$$MGE

DTDRV

0$$IAG

E$$DVC

M$$EXT

M$$MGE

DTTAB

A$$CPS
M$$EXT

O$$IAG
M$$MGE

E$$DVC
M$$MUP

L$$DRV .· -·~L~$DT

DXDRV

E$$DVC

M$$MGE

R$$Xll

DXTAB

A$$CPS
M$$MGE

O$$IAG
M$$MUP

E$$DVC

L$$DRV

ERROR

D$$IAG

E$$DVC

E$$NSI

E$$PER

IN I TL

L$$SI1

M$$EXT

M$$MGE

P$$RTY

R$$11S

IO SUB

A$$CHK
D$$ISK
M$$EXT
R$$611
R$$Lll
S$$ECC

A$$CPS
D$$SHF
M$$IXD
R$$JPO
R$$Mll
T$$KMG

A$$TRP.
O$$YNM
M$$MGE
R$$JS1«·
R$$Pll

C$$CKP
E$$DVC
·Q$$0PT
R$$Cll
R$$LKL

D$$IAG
L$$DRV
R$$60F
R$$Kll
R$$MOF

LOADR

A$$TRP
L$$LDR
R$$SND

C$$CKP
M$$MGE
S$$WPC

D$$ISK
P$$LAS
S$$WPR

D$$YNC
P$$SRF

E$$XPR
R$$11S

LOWCR

0$$.Hll
P$$LAS

E$$NSI
V$$CTR

I$$Cll

M$$MGE

M$$NET

LP ORV

L$$11R

L$$Pll

M$$MGE · ·

LPTAB

O$$IAG
M$$MUP

E$$DVC

L$$DRV

LD$LP

M$$MGE

MMD RV

O$$IAG
T$$Jl6

E$$DVC

M$$EXT

M$$IXD

M$$MGE

MMTAB

A$$NSI
LD$MT

D$$IAG
M$$MGE

E$$0VC
M$$MUP

L$$0RV

LD$MM

MTORV

A$$NSI
T$$Mll

O$$IAG

E$$DVC

M$$EXT

M$$MGE

9-77

M$$MGE

";~$.$~11

LD$DX

CROSS-REFERENCES
Module

Conditional Assembly Parameters in Module

MTTAB

A$.$NSI
M$$EXT

NULTK

P$$P45 ·

PARTY

D$$SHF

D$$IAG
M$$MGE

E$$DVC
M$$MUP

L$$DRV

LD$MT

. E$$PER

M$$MGE

P$$D70

P$$RTY

-'.

PLSUB

D$$YNM

M$$MGE

P$$LAS

POWER

A$$TRP
F$$AST
M$$EXT

E$$DVC
F$$LPP
M$$MGE

E$$EAE
K$$Wll
P$$RFL

E$$NSI
L$$DRV
P$$RTY

E$$PER
L$$SI1

PPTAB

D$$IAG
M$$MGE

E$$DVC
M$$MUP

L$$DRV

LD$PP

LD$PR

PRDRV

P$$Rll

QUEUE

L$$DRV

M$$MGE

REQSB

A$$TRP
D$$YNC
M$$MUP'
S$$WPC

C$$CKP
D$$YNM
P$$LAS

C$$INT: . D$$ISK
F$$LPP.
L$$DRV
P$$RFL
P$$SRF

D$$SHF
M$$MGE
R$$SND

SSTSR

A$$CHK
P$$LAS

F$$AST

F$$LPP

F$$LTP

M$$MGE

SYS CM

C$$CKP
E$$XPR
L$$LDR
N$$UMR
R$$EXV

D$$YNC
K$$CNT
L$$SI1
P$$LAS
S$$YSZ

D$$YNM
K$$CSR
M$$EXT
P$$RTY

E$$DVC
K$$LDC
M$$MGE
Q$$0PT

E$$NSI
L$.$DRV
M$$MUP
R$$11S

SYSDF

D$$YNM

M$$EXT

M$$MGE

V$$CTR

SYS TB

D$$IAG
M$$MGE
T$$CCO
T$$RPR

E$$DVC
M$$MUP
T$$ESC

L$$DRV
T$$ACR
T$$GMC

LD$NL
T$$BTW
T$$GTS

LD$TT
T$$CCA
T$$HLD

SYSXT

A$$TRP
E$$EAE
M$$MGE
T$$SMC
T$$VBF

C$$CKP
E$$NSI
P$$.LAS
T$$SYN

C$$INT
F$$LPP
R$$EXV
T$$TRW

D$$YNM
L$$DRV
R$$LKL
T$$UTB

E$$DVC
L$$SU
T$$BUF
T$$30P

SYTAB

L$$LDR

M$$M.GE

P$$LAS

P$$SRF

R$$11S

TOSCH

A$$TRP
K$$Wll

C$$CKP
L$$:0RV

0$$ISK
M$$MGE

D$$SHF
R$$NDC

D$$YNM
S$$WPC

9-78

CROSS-REPERENCES
Module

Conditional Assembly Parameters i"'n Module

TTDRV

A$$CHK
D$$Lll
I$$RAR
LD$$H
M$$CRI
R$$LKL
T$$BUF
T$$GMC
T$$RNE
T$$SYN

A$$TRP
0$$Mll
I$$RDN
LD$$J
M$$MGE
T$$18S
T$$CCA
T$$GTS
T$$RPR
T$,$TRW

XBDRV

0$$811

M$$EXT ; M$$MGE

XMDRV

LD$XM
M$$EXT
Q$$IO
X$$18
X$$Mll-l

M$$MGE - M$$NET··. ;0$$22
X$$22
X$$LDM ;X$·$Mll

XPDRV

M$$MGE

D$$Pl~-l

O$$Pll

M$$EXT

M$$MGE

XQDRV

M$$NET

0$$011"'.'l. 0$$Qll
Q$$HP,..:

Q$$CRC~

C$$CKP
0$$811 : ))$'$Jll
0$$Zll ,, D$$ZMD
D$$YNM
L$$50H
L$$DRV
L$$SI1
LO$$Z · .. :..LD$TT
LD$$L
M$$MUP
P$$LAS
R$$11S
T$$ACR ,~ · .:T$$BTW
T$$30P
T$$ESC
T$$CCO
T$$CTR
T$$HLIF11' ~T$$LWC' · ~'!'$.$MIN
T$$SMC
T$$RUB
T$$RST
T$$UTB" T$$VBF r-:
Y'•

...

M$$NET

XU ORV

C$$MPT

D$$Uli.;.l .'D$$Ull

M$$MGE: ·' -M$$NET

XWDRV

C$$MPT

D$$Wl+:-1 D$$Wll

M$$MGE

9-79

M$$NET