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Document:	DHU11 Interface User's Guide
Order Number:	EK-DHU11-UG
Revision:	001
Pages:	112
Original Filename:

OCR Text

EK-DHU11-UG-001

DHU11 Interface
User's Guide

Prepared by Educational Services
of

Digital Equipment Corporation

First Edition, June 1984

The information in this document is subject to change without
notice. Digital Equipment Corporation assumes no responsibility
for any errors herein.

Printed in U.S.A.

The following are trademarks of Digital Equipment Corporation.

DEC

PDP

DECwriter
DIBOL
MASSBUS

Rainbow
RSTS
RSX

DECmate
DECUS

P/OS
Professional

UNIBUS
VAX

VMS
VT
Work Processor

CONTENTS

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ooooooooooooooooooooooooooooooo

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---------

Electrical Requirements
Performance

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General Description
Physical Description
Versions of DHU11
Configurations
Connections

oooooooooooooooooooooooooooooooo

ooooooooooooooooooooooooooooooo

Throughput. .................
INTERFACES. ......................
System Bus Interface
Serial Interfaces

ooooooooooooooooooooooooooooooo

-------------------------------

ooooooooooooooooooooooooooooooo

Speed/Distance Conmderatxons
FUNCTIONAL DESCRIPTION
Control Function

------

ooooooooooooooooooooooooooooooo

-------------------------------

-----------------

ooooooooooooooooooooooooooooooo

ooooooooooooooo

ooooooooooooooooooooooooooooooo

oooooooooooooooooo

ooooooooooooooooooooooooooooooo

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INTRODUCTION
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CHAPTER 1

................................

Bus Request (BR) Interrupt-Priority Switches

W N

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I

................................

Steal Grant
Backplane
Connection to the UNIBUS
Bus Grant Continuity Cards
NPG Continuity
PRIORITY SELECTION
Non-Processor Request............
- Bus Request
MODULE INSTALLATION..........
ooooooooooooooooooooo

........................

................................

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CHAPTER 2

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CHAPTER 3

Line-Loopback Test Connector H325 ..., 2-15
Null Modem Cables ......ccvviiiiiiieniniiiiienenennaesososnssaes 2-15
Modem Cables . .. ovvtii ittt ittt ettt 2-17
Data-Rate to Cable-Length Relationships.................. .o 2-18
MULTIPLE COMMUNICATIONS OPTIONS ...... ... iiiiiiiiioian. 2-18
s 2-18
Floating Device-Addresses. . ........coviiiinnn
Floating Vectors. ... vuviiiee et etiiiiiiaaererennnaeneesencnnnas 2-22
ns 2-24
tt
ittt innanaaanaana
INSTALLATION TESTING. ..ot
ns
PDP-11 Installation Tests .. ..ovveierinnrerneniiiiearnnrnonennne 2-24
PDP-11 Installation Test Sequence. ...........cvvvrievieenennn 2-25
VAX Installation Tests. . ......cvviiiiineneniniiirienareeneanens 2-25
EVDALI Standalone Diagnostic ..............ccoiiiiiiiiin... 2-25
EVDAH On-Line Diagnostic............coiiiiiiiiiieinnanan. 2-25

VAX/VMS System Exerciser UETP................ ..ot 2-25
VAX Installation Test Sequence ...........ccviiiiiiiinrinennenann. 2-26

PROGRAMMING

23 PP 3-1
oY@0
RS ..ottt ittt ittt it tie et ensanenaenasanns 3-1
REGISTE
REZISTET ACCESS + v v vt vttt iinneneaanaeeneanaeseonnannn. 3-1
Register Bit Definitions. .. ......... .ot 3-2
.ciilt, 3-3
.. ....
Base Control-and-Status Register (CSR) ........
Receive Buffer (RBUF). ...t 3-6
Receive Timer Register (RXTIMER)............. ...t 3-7
.... 3-8
.. i,
Line Parameter Register (LPR) . .....
FIFO Data Register (FIFODATA)......... ..., 3-10
FIFO Size Register (FIFOSIZE).......... ..o, 3-11
Line Status Register (STAT) ...... ..., 3-12
Line Control Register (LNCTRL)........... .o, 3-13
Transmit Buffer Address Register Number 1 (TBUFFADI)...... 3-16
Transmit Buffer Address Register Number 2 (TBUFFAD?2)...... 3-16
Transmit DMA Buffer Counter (TBUFFCT) .................... 3-17
iii e 3-18
PROGRAMMING FEATURES. ... .. it
Initialization .. .....coovrviiiieenenennennes e 3-18
in 3-19
naneeens
tett
it iinrennnasaae
ConfigUration . .. .....ouu
ananasaenans 3-19
TranSmitting . . . ..o vttt et et ittt ittt
DMA Transfers. .. oovov ittt ettt 3-19
Programmed Transfers............ooiiiiiiiiinenn, 3-19
ittt 3-20
Methods of Control . .......coiiiiiiii
A 1 1~ I 3-20
=y
Interrupt Control .............. P 3-20
ittt ittt 3-21
Auto XON and XOFF ...
itii 3-22
ttt
ittt
covi
it
Error Indication . . ....
Modem Control . ... o vttt ittt it ettt 3-22
Maintenance Programming. . ...........ciiiiiiiiniiii i, 3-23
iiiiin 3-23
it it
Diagnostic Codes. .......oouii
nns 3-23
iiiiiiiiiiiniee
.........ccoivv
Self-Test Diagnostic Codes.
..
... ..ot
Interpretation of Self-Test Codes...........
i
it
ttt
..o
...
Self-Test.
Skipping
...
Background Monitor Program (BMP)...................
i it
PROGRAMMING EXAMPLES ... .
Resettingthe DHUILL . ... ... .. it
en
it
.oiuiii
ittt
Configuration . .......

3-23
3-25
3-25
3-26
3-26
3-27

MAINTENANCE

W W WL LW W w

o UuhwLWLWWW
wio
=

Backgrouhd Monitor Program (BMP) ................ccoovviiin...

.
.

BN
-

XXDP+ Dlagnostlcs .................................................

N —

BNp—ap—mpflp—nh‘
e e o
SRR R Y N S S

ARPRARAARRARDAALDARRARRARRARDARDPRARRARAALAD

CHAPTER 4

Transmitting . ...
o i i
i
e
e
Programmed Transfer.............ccoiiiiiiiiiiiinnninennn...
DMA Transfer .....cooiiiiiiiiii
et iiiieee
iiiie
s,
Aborting a TransSmission .. ..........oviiiintennneenrnennnnnn.
RECEIVING. ..ottt
i
i
e
e
e
Auto XON and XOFF .......oiiiiiiiiiiiiet
e iieeeaaananns,
ie
Checking Diagnostic Codes...........covviiiiii
e iinnnnnnn.
ine
Modem Control . ...ttt
et
e

Loading the Diagnostic. ..........coiviiiin
it i,
Four Steps to Run a DRS Diagnostic................ccovviivin....
DRS Commands ..........oiiiiiiiiiiii
it e,

DN
W
-

N —

N h WK
-

A
e

R A

L psRbbBRRLNNONDNDD=

NHhLWWN
-

DECX/11 EXerCiser. .. vuviit
ittt
ittt
e,
PDP-11 Diagnostic Services Summary .............cooviiirirneeennnnn..

Control Characters Supported. .........coviiiiiiiin
...
Example Printouts. .. ..ottt
e e
VAX DIAGNOSTICS. ..
e
e e
e
EVDALI Standalone Diagnostic............coviiiiii
i eneennnn.
Running the EVDALI Standalone Diagnostic ........................
Starting Up. ...
i
e
e
L0 o5 10 - PP
Event Flags . ... .. ..
i
i
Sections ................... P
Error Messages . ....oviiuini
it it
it
e
EVDAH On-Line Diagnostic .........ooviiiiiinnine e,
Running the EVDAH On-Line Diagnostic................c.o.u.....
Starting Up. ...t
i i
O PtIONS . . ottt it i
e
e
e
Event Flags ...
i
S CtIONS .. vttt
e
e e
Error Messages . ..o
ittt it i e e
e
e
VAX Test Sequence. .....oviitin
ittt ittt
EVDAH Test Sequence ..........c.ovuiiiiiniinininneneenennnn
:
EVDAI Test Sequence ...........covviiininiiniiiininenennns
FIELD REPLACEABLE UNITS (FRUS) ......coiiviiiiiiiininaenn.

APPENDIX A GLOSSARY OF TERMS

Al
A2

SCOPE ...\ttt et e e e A-1
tt . A-2
et
ot
GLOSSARY ..ittt

APPENDIX B

MODEM CONTROL

B.1
B.2
B.2.1

e B-1
e e
e
SCOPE ...t
et i i B-1
i it .
MODEM CONTROL . ..
Example of Auto-Answer Modem Control for the PSTN.............. B-2
FIGURES

Figure No.

Title

Page

1-1
1-2
1-3
1-4
1-5
2-1
2-2
2-3
2-4
2-5
2-6
2-7
3-1
3-2
4-1
4-2
4-3
4-4

M3I05 Module. ...t
i i e e e
e
e 1-3
Example of DHUI11 Configuration.............
.. .. oo, 1-4
DHUII Connections . . ... v vtitititti it ineneeententennn
e, 1-5
Serial Character Format . ...ttt ittt 1-9
DHUI1I Functional Block. ... ~1-11
SWItCh LoCations ... oottt ittt ittt e it et
2-2
DHUIL Installation. .. ...covvtt
ittt et e et 2-8
H3029 Layout. .. ....ooiitii it
i it ittt 2-10
H3029 Circuit Diagram . .........ottt 2-11
Staggered-Loopback Circuit of H3029..........
... .. ...
i, 2-14
Line-Loopback Test Connector ..ottt
nen.. 2-15
Null Modem Cable Connections . .. .....vvuirintrnnnieneninrinnnenn. 2-17
Register Coding. . ....ovvtnini ittt ittt ittt 3-3
Diagnostic/Status Byte ... 3-24
Troubleshooting Connection Diagram ............
... . ... . oo, 4-2
Troubleshooting Flowchart for XXDP+ Diagnostics . .................... 4-11
Example of Channel Allocation. .. ......... ... it 4-20
EVDALI Troubleshooting Flowchart .. ............
... ... ..o it 4-21

TABLES
Table No.

Title

1-1
1-2
2-1
2-2

san e eninenes 1-6
DHUIL Data Rates. .. .ot vi ittt ittt ittt
EIA/CCITT Signal Relationships. ..., 1-8
e 2-2
i
Cabinet Kits for the DHUILL . ... ... .
Device Address Selection Guide......... ..ottt
i, 2-3

B-1

Modem Control Leads ..........co i

2-3
2-4
2-5
2-6
2-7
2-8
2-9
3-1
3-2
3-3

Page

Vector Selection Guide . ...ttt
i
e i
Interrupt-Priority Switches . ....... ... . . i
Backplane Connections . ........c..itit
ittt
H3029 Connections . . ........ooviiiiiin
i,e
Data-Rate/Cable-Length Relationships ..............
... .. .. oo it
Floating Device-Address Assignments............coviviiinrnennnenenn,
Floating-Vector Address Assignments .............coviiiiiinenenenanns
DHUII Registers. . ......covviiiriiniennenennnnnns e
Data Rates. .. ..ottt
it e et
e
DHUI11 Self-Test Error Codes ..................... e

2-4
2-4
2-5
2-12
2-18
2-19
2-22
3-2
3-10
3-24

B-2

PREFACE

This document describes the DHU11 and its installation requirements. It contains information on userlevel maintenance. A substantial programming chapter and a glossary are included.
This manual was written primarily for the DHU11 user. However, information concerning such items as
option installation and checkout is intended for qualified Field Service personnel.

The manual is organized into four chapters plus appendices.

Chapter 1
Chapter 2
Chapter 3
Chapter 4
Appendix A
Appendix B

—
—
—
—
-

Introduction
Installation
Programming
Maintenance
Glossary of Terms
Modem Control

The following is a list of related titles.
Document

Number

Communications Mini-Reference Guide
Terminals and Communications Handbook
DHU11 Technical Manual
DHUI11 Maintenance Card
DHUI11 Field Maintenance Print Set

EK-CMINI-RM
EB-20752-20

EK-DHU11-TM
EK-DHU11-MC

MP-01794

vil

CHAPTER 1
INTRODUCTION

1.1
SCOPE
\
Chapter 1 provides general information and specifications. It describes how the module can be configured,
and how it interfaces with the system bus and the serial data lines. Physical and functional descriptions are
also included.

1.2

OVERVIEW

1.2.1
General Description
The DHU11 option is an asynchronous multiplexer which provides 16 full-duplex, asynchronous, serial
data channels on UNIBUS systems. The option can be used in many applications. These include data
concentration, terminal interfacing, and cluster controlling.

The main features of the DHU11 are as follows.
e

Sixteen full-duplex asynchronous data channels

A256-entry first-in-first-out (FIFO) buffer for received characters, dataset status changes, and
diagnostic information

DMA orprogrammed transfers on transmit. Each channel has a 64-byte FIFO for output data

Programmable delay-timer for receive interrupts

RS-423-A/V.10/X.26 and RS-232-C/V.28 compatible

Full-duplex point-to-point or auto-answer dial-up operation

Programmable split speed per line

Total module throughput of 15 000 characters per second

Automatic flow control of transmitted and received data

Self-test and background monitor diagnostics

Programmable test facilities

Single hex-height module (M3105)

All communications functions are programmable

1-1

Enough modem control is provided on all 16 channels to allow auto-answer dial-up operation over the

public switched telephone network (PSTN). The DHU11

can also be used for point-to-point operation

over private lines. Modem control is implemented by software in the host.

The module provides DMA or programmed transfers from the host system to the serial lines via sixteen
64-byte FIFO buffers (one per channel). A common 256-character FIFO buffer is provided for data
received from the serial lines.

. By using microcomputers (referred to as PROC 1 and PROC 2 in this manual) the DHU11
host system from many of the data-handling tasks.

releases the

One 8051 microcomputer controls DMA transmissions from the host system to the DHU11. A second
8051 controls eight DUARTS which carry out the serial/parallel and parallel/serial conversion of data.
The DHUI11 carries ROM-based diagnostics which are executed independently of the host. A full range
of diagnostic programs is also available for both PDP-11 and VAX-11 systems.

A green LED gives the GO/NO-GO status of the module. More detailed diagnostic information is also
made available to the host system via the received-character FIFO. Locpback test connectors are
supplied for use with the system-based diagnostics.

I/0 addresses, interrupt vectors, and interrupt priority for the module are selected on three switchpacks.

All other DHU11 functions and configurations are programmable.

To prevent loss of data at high throughput levels, the DHU11 can be programmed for automatic flow
control using XON and XOFF characters.
1.2.2

Physical Description

The DHU11 consists of amodule kit DHU1 1-M, and one ofseveral cabkits. The DHU1 1-M consists of:
e
e

A hex-height module (M3105)
The DHU11 User Guide (EK-DHU11-UG).

Figure 1-1 shows major features of the module. Its dimensions are 21.4 cm X 39.9 cm (8.4 inches X 15.7
inches). The module is connected to the backplane via connectors A to F. J1 to J4 are connected to the
communications lines via BCOSL cables, and distribution panels.
1.2.3 Versions of DHUI11
To facilitate installation in different system packages, and to allow installation in unshielded cabinets, the
DHU11 can be supplied in three upgrade-kit versions. All versions consist of the DHU11-M and a cabkit.
The three cabkits are:

CK-DHU11-Al For unshielded cabinets — (19-inch rack mount)
CK-DHUI11-AD For general-purpose expansion cabinets
CK-DHUI11-AE For VAX-11/730 and VAX-11/750 kernel systems

A system-integrated DHU11 (DHUI11-M plus appropriate cabkit) installed at the factory has the
common reference DHU11-AP.
Cabkit details are given in Chapter 2, Installation.

1-2

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1.2.4 Configurations
Figure 1-2 shows some possible DHU11 configurations. Any or all of the data channels can be connected
to a terminal or to a data-communications line.

HOST
PROCESSOR

DEVICE

|
|

DEVICE

R
|

(
\

UNIBUS

M3105 MODULE

b
-

I_._. —

|16 DATA CHANNELS

|
|

EQUIPMENT

I
Y

LOCAL

| DHU11 OPTION

e o

REMOTE

EQUIPMENT

:
TELEPHONE OR

MODEM p——%
- MODEM
DATA COMMS
LINE

REMOTE

R AAINAL

|___JLOCAL

TERMINAL

TELEPHONE OR

|
|

DATA COMMS
e

e e e

REMOTE

LINE

PROCESSOR

(

RD1 721

Figure 1-2

Example of DHUI11 Configuration

1.2.5
Connections
Figure 1-3 shows an example of DHU11 connections. These include normal operating connections and
test connections. More detail is shown in Figure 2-2 in Chapter 2, Installation.

1-4

CHANNELS |

BACK OF

NOTE:

H3029
ELSJSL'BUT'ON

STAGGERED LOOPBACK CONNECTORS
ARE NOT POLARIZED

H325
LINE LOOPBACK

TEST CONNECTOR

]

—

CHANS 8 TO 11

|
——

CHANS 4707

CHANS O TO 3

25-PIN D-TYPE
CONNECTORS

‘

CHANNELS |
0TO 7

FRONT OF H3029

DISTRIBUTION PANEL

Figure 1-3
1.3

DHU11 Connections

SPECIFICATION

1.3.1

Environmental Conditions

e
e
e
1.3.2

o
e
o

Storage temperature: —40°C to 66°C (—40°F to 151°F)
Operating temperature: 5°C to 60°C (41°F to 140°F)
Relative humidity: 10% to 95% non-condensing
Electrical Requirements

+5 Vdc + or- 5% at 6 A (typical)
+15Vdc + or- 4% at 400 mA (typical)
—-15 V dc + or — 4% at 400 mA (typical)

Loads applied to the UNIBUS are as follows.
°
°

(

UNIBUS ac loads
UNIBUS dc loads

2.5 ac loads
1.0 dc load

1-5

-—)
=

M31056
MODULE

RED LINE

LOOPBACK
CONNECTORS

CHANS 12TO 15

t—)

NORMAL CONNECTION

wm)

TEST CONNECTION

UNIBUS

STAGGERED

3 1]

BCO5L-xx CABLES CAN BE INSTALLED
EITHER WAY AROUND IN J10/J11

8 TO 15

1.3.3

Performance

1.3.3.1 Data Rates — Each channel can be programmed to operate at one of a number of speeds. If
needed, the transmission and reception rates can be different (split speed). Table 1-1 shows the data rates
which are possible.

The 16 serial channels are implemented with 8 DUARTSs. Channels are paired as follows: 0/1, 2/3, 4/5,
6/7, 8/9, 10/11, 12/13, 14/15. Because of the method of data-rate generation within the DUARTS, all
transmit and receive rates for a DUART channel-pair must be in the same group (A or B).
DHUI11 Data Rates
Groups

wwwmwmmwoomITM
T

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50
75
110
134.5
150
300
600
1200
1 800
2000
2400
4 800
-7 200
9 600
19 200
38 400

Speed
(Bits/s)

Table 1-1

Data-rate selection is covered in Chapter 3 (Programming).

1.3.3.2
°
e
e

Throughput — The approximate maximum throughput figures for DHUI11 are quoted below.
Transmit (per channel)
Receive (per channel)
Total aggregate throughput

—
-

1 000 chars/s
4 000 chars/s *
15 000 chars/s

Several factors limit DHUI11 throughput. Such factors may apply to transmission only. or to both

transmission and reception.

The ratio between a channel’s data-signaling rate and the number of bits in a character,
(bits/s)/(bits/char), limits the maximum throughput in both the Transmit and Rececive
directions. The following example shows the relationships between two selected data rates and
character formats. In each case, a start bit, a parity bit, and one stop bit are assumed.

* Seven-bit character with start bit, parity bit and one stop bit.

1-6

Data Rate
(Bits/s)

38 400
4 800

5-Bit Characters
(Chars/s)

7-Bit Characters
(Chars/s)

4 800
600

3 840
480

The Transmit firmware can supply a maximum of 1 000 chars/s to any channel. Therefore,
unless further limited by factor a or ¢, the maximum Transmit throughput per channel is 1 000
chars/s.

Communications firmware can handle a total of 15 000 chars/s. Unless limited by factor a, this
is the maximum total throughput for the option.

NOTES
15 000 characters per second is the sum of both
transmitted and received characters on all channels.
This throughput could support continuous transmission or reception on all channels at 9 600
bits/s, or continuous transmission and reception
on all channels at 4 800 bits/s.
9 600 bits/s is equivalent to 1 000 characters * per
second. If a higher data rate is selected for a
Transmit line, the duration of characters will be
reduced but there will be gaps in transmission.

1.4

INTERFACES

1.4.1
System Bus Interface
The M3105 module can be connected directly to the system-unit (backplane). UNIBUS signals, together
with pin details, are listed in Table 2-5 (in Chapter 2, Installation).
1.4.2

Serial Interfaces

1.4.2,1
Interface Standards-— The DHUI1 1 provides interface signals which conform to a subset of the
EIA/CCITT standard RS-232-C/V.24. The electrical characteristics conform to EIA/CCITT standards
RS-232-C/V.28 and RS-423-A (unbalanced interface). The interface is compatible with X.26/V.10
standards but does not comply with the slew-rate requirements.
Connections to the external equipment are via 25-pin male subminiature D-type connectors.

By means of suitable cables and connectors (not supplied or supported by DIGITAL) the channels can be
made compatible with the following.

1.
2.

Subset of EIA interchange standard RS-449
EIA electrical standard RS-422 (balanced)

Table 1-2 shows RS-232-C/V.24/RS-449 signal relationships, and pin connections for the 25-pin male
subminiature D-type connectors.

* Seven-bit character with start bit, parity bit and one stop bit.

1-7

Table 1-2

EIA/CCITT Signal Relationships

D-Type
Pin

Signal
Name

Circuit
RS-232-C Circuit
CCITT V.24 RS-449

(GND)

Signal Ground

(SIG GND)

102

Transmit Data

(TXD)

103

Receive Data

(RXD)

104

Request to Send

(RTS)

105

Clear to Send

(CTS)

106

Data Set Ready

(DSR)

107

Data Terminal Ready

(DTR)

108/2

(RI)

125

(DCD)

109

Protective Ground

Ring Indicator

Data Carrier Detect

NOTE

The backward channels listed below are not

supported. However, by using another channel
for this function, and by connecting a suitable
cable (H1200 or H1201, for example), backwardchannel operation is possible.

Circuit No.

Function

118
120
119

Transmitted backward-channel data
Transmit backward-channel line signal
Received backward-channel data

122

Backward-channel-received line-signal detector

121

Backward channel ready

1.4.2.2 Serial Data Format — Serial characters are made up of an encoded sequence of bits which are
enclosed between a start and a stop signal. The start signal is always 1 bit long but the stop signal is
programmable to 1, 1.5, or 2 bits. The duration of a bit is dependent on the selected data rate.
Character codes may be 5, 6, 7, or 8 bits long, optionally followed by a parity bit. Parity can be

programmed as even, odd, or no parity.

On serial data channels controlled viathe DHU1 1, the data line is held marking when inactive. Transfer of
each character begins with a start bit (space) and ends with one or more stop bits (mark).

1-8

Figure 1-4 shows the reception of an 8-bit character with parity. The Least-Significant Bit (LSB) of the
character code is transmitted first. If another character is not ready for transmission, the line will stay
marking. The figure shows 1, 1.5, and 2 stop bits.

NOTE

| This description applies to signals at the DUART
pins. Signals measured on the interchange circuits
will have the opposite polarity to those shown.

The data-rate clock, which samples the serial data, is 16 times the programmed data rate. Arrows show
when the bits are tested for polarity.

8 DATA BITS

STOP BIT(S)

bbb

b
P/

Mppvesecoces o
START BIT

LSB FIRST

MSB LAST

PARITY BIT

RD1 144

Figure 1-4

Serial Character Format

The DHU11 allows the following serial character formats.
e
e
°

Characters of 5, 6, 7, or 8 bits with or without parity and with 1 stop bit
Characters of 5 bits with or without parity and with 1.5 stop bits
Characters of 6, 7, or 8 bits with or without parity and with 2 stop bits

1.4.2.3 Line Receivers — The serial line receivers used in this module are 9637 AC or equivalent. They
convert the EIA input signals to TTL levels suitable for the DUARTS.
Signals are inverted by the receivers.
1.4.2.4 Line Transmitters— The serial line transmitters used in this module are 9636
AC or equivalent.
They convert TTL level signals from the DUARTS to EIA levels on the data lines.
Signals are inverted by the transmitters.

1-9

1.4.2.5

Speed/Distance Considerations — The maximum data rate which can be used on a line

depends upon a number of factors. These are:

The characteristics of the line transmitters and receivers
The characteristics of the serial cable
The length of the cable
Noise (interference) which affects the line.

A ‘speed against distance’ table for typical conditions is provided in Section 2.6.6.
1.5

FUNCTIONAL DESCRIPTION

1.5.1

Control Function

In the DHU11 module (Figure 1-5), data is transferred to and from the serial interface by three methods:
1.

By DMA. Blocks of data are transferred from system memory to the serial interface. DMA data
is routed via the UNIBUS data transceivers, the TX FIFO (for the addressed channel), and
PROC2.
'

In the programmed transfer mode, characters are transferred from the host to the serial
interface. The route for characters is via the UNIBUS data transceivers, the TX FIFO (for the
addressed channel), and PROC?2.

Received characters are transferred from the serial interface to the host via PROC2, the RX
FIFO, and the UNIBUS data transceivers.

At the center of the control section is a 1 K-word RAM. By writing control words or bytes to registers in the
RAM, the host can configure and command the module. The host can also write data for transmission on
the serial lines, to TX FIFOs (one per channel) in the RAM. TX FIFO addresses are provided by TX
FIFO control.

Two microcomputers (PROC 1 and PROC 2), which have associated microprogram ROMs, scan the
RAM and the FIFO logic in order to detect a new configuration, or data to be transferred. They also write
status information to the RAM, which can then be read by the host.

PROC 2 configures the DUARTS, and transfers Transmit and Receive data between the FIFOs and the
DUARTS. Received characters are written to the RX FIFO and transmit characters are read fromthe TX
FIFO.

Among other functions, PROC 1 controls DMA transfers to the TX FIFO. PROC 1 keeps track of DMA
addresses and character count, and reports to the host when the block has been transferred.
Both microcomputers execute background diagnostics when not busy with other tasks.
1.5.2

UNIBUS Interface

The DHU11 module is programmed by the host via a number of I/O registers. When the DHU11
recognizes a valid address, it allows the host to access the FIFOs and the registers. When TX or RX
FIFOs are being accessed, FIFO controllers provide the RAM addresses.
Module address switches are connected to a comparator which monitors the address transceivers. When
- an I/O address from the host matches the address on the switches, the DHU11 responds to the host.

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Vector address switches are indirectly connected to the data transceivers. These allow the DHU11 to
supply one of two interrupt vectors (transmit or receive) to the host during an interrupt acknowledge
sequence.

UNIBUS control signals and register addresses are decoded to generate internal control signals. DMA
and interrupt transactions are initiated by control signals from the DHU11.
1.5.3
Serial Interfaces
Sixteen full-duplex serial interfaces are provided by eight DUARTSs. These ICs are configured by
PROC?2 as instructed by the host. They carry out the serial/parallel and parallel/serial conversion.
The status of modem control lines for each channel is polled by PROC 2. If programmed to do so, the
DHU11 will report changes of modem status to the host. Such reports are made via the RX FIFO and the
device registers.

1-12

CHAPTER 2
INSTALLATION

2.1

SCOPE
This chapter contains information on how to prepare and install the DHU11 option. It contains sections
on the following.

The selection of vectors and device addresses
The selection of interrupt-priority levels
Rules for backplane positioning
Recommended cables
Test connectors
The assignment of vectors and floating addresses
Testing after installation

2.2 DHUI11 OPTIONS
There are a number of versions of the DHU11, all of which are based on the DHU11-M. This may be
ordered with one of three cabinet kits.
The DHU11-M consists of:
Part Number

Description

M3105
EK-DHU11-UG

DHU11 module
User Guide

Quantity

1
|

A DHUI11, installed into a system at the factory, consists of a DHU11-M and a cabinet kit. Such
DHUI1s are given the common reference DHU11-AP.
Table 2-1 lists the parts for each cabinet kit.

Check that you have received all the items on the packing list. Examine all parts for physical damage.
Report damaged or missing items to the shipper and the DIGITAL representative.
CAUTION
The M3105 module is supplied in a protective
sleeve. Do not remove the sleeve until you are
about to install the module. Protect the module
from static during installation.

2-1

Table 2-1
Cabinet Kit

Cabinet Kits for the DHU11

Description

Number

CK-DHUI11-AE

VAX-11/730 and VAX-11/750 kernel systems -

CK-DHU11-AD

General-purpose expansion cabinet

CK-DHU11-Al

Unshielded cabinet

Contains:

H325
H3029
BCO5SL-07
BCO51L-10
H9544-S]

Single-line loopback connector
8-line 25-way distribution panel
40-way ribbon cable
40-way ribbon cable
19-inch frame and fastenings

1
2

4
1

1
2
4

NOTE

BCO5L-xx cables are 3 ft, 7 ft, and 10 ft as
indicated by xx.
STEAL
GRANT
SELECTION

BR LEVELS
5 AND 6
SELECTION

L1 [2]s]a]sfef7]s][s]t]

O F FOR RX INT
1 FOR FO TX INT

AN
N\
Ve

nREnEnEnn
Y

Y O YOY

OYOY

T2]s[«]5]e]

EEERERE

oYy

4——————— SWI|TCHES —————{ 0 | 0]
171161514

MSB

|13

12l11l10]9|8|7]6]5|4

«—— SWITCHES —{1/g|

3|2]1

DEVICE ADDRESS

O | O

g|7|efs]a]al2]1]o
LSB

MSB

VECTOR

LSB

RD1724

Figure 2-1

Switch Locations

2-2

2.3
MODULE CONFIGURATION
Figure 2-1 shows the location and function of switchpacks which configure device addresses, vectors, and
interrupt priority. See the previous CAUTION (in Section 2.2) before configuring the module.
2.3.1
Address Switches
The device address for the DHU11 is set on switchpack E173. Table 2-2 explains the relationship
between device addresses and switch positions.

Table 2-2
MSB

Device Address Selection Guide

LSB

17 (16

|16

|14

{13

SWITCH
NUMBER

E173

|12}

|10|
9

71|

SWITCHES

OFF
-

OFF

NOTE:

OFF

SWITCH E173-10
MUST BE OFF

OFF | OFF

OFF
OFF

DEVICE
ADDRESS

760020
760040

760060

760100
760200

|OFF

OFF

760300

760400

OFF

760500

OFF|

OFF

760600

OFF|

OFF | OFF

760700

OFF

761000

OFF

762000

OFF | OFF

763000

OFF

764000

OFF

770000

'OFF = SWITCH OPEN TO RESPOND TO A LOGICAL 1
RD1Y 744

2-3

2.3.2

Vector Switches

During an interrupt-acknowledge sequence, the DHU11 returns a 9-bit interrupt vector to the host. The
six high-order bits of this vector are derived from E60-S1 to S6. Table 2-3 explains how switch positions
relate to the vector.

Table 2-3

Vector Selection Guide

MSB

LSB

«————— SWITCHES ———{1/0|

[

SWITCH
NUMBER

1121

OFF | OFF

OFF

OFF | OFF

SWITCH E60-7 TO 10
MUST BE OFF

OFF | OFF

OFF | OFF |OFF
OFF | OFF

1 TX INTERRUPT
0 RX INTERRUPT

VECTOR

300

310

OFF

320

330

340

OFF

350

|OFF | OFF

360

OFF | OFF |OFF |OFF | OFF

370
400

OFF

500

OFF

THE STATE OF TXIRQ.H WHICH
INDICATES:

OFF | OFF

OFF | OFF |OFF

3]4|5]|6s

OFF | OFF

NOTE:

|\DATABIT2 REFLECTS

e
T
T
T
I
E60

OFF | OFF

600

OFF |OFF | OFF

700

OFF = SWITCH OPEN TO PRODUCE A LOGICAL 1
RD1Y 745

2.3.3
Bus Request (BR) Interrupt-Priority Switches
The M3105 module can be switch-selected to interrupt at BR levels 5 or 6. Table 2-4 indicates how BR
levels are selected.
Table 2-4

BR Level

Interrupt-Priority Switches

State of Switchpack E121-S1 to S8

OFF

2-4

2.3.4
Steal Grant
This facility is used to improve UNIBUS latency by ‘stealing’ a bus grant (BG) intended for a device
further along the priority chain. If a BG is received while BNPR is asserted, passive release of the
UNIBUS will occur. Thus the device which raised the NPR will not be delayed.
Steal grant is enabled/disabled by E121-S9 and S10 as follows.
S9 OFF, S10 ON
S10 OFF, S9 ON
2.3.5

=
=

steal grant disabled
steal grant enabled

Backplane

2.3.5.1
Connection to the UNIBUS — The DHU11 interfaces with the system via the UNIBUS. The
physical connection is made via the A, B, C, D, E, and F edge connectors on the module.
Backplane signals and pin designations are listed in Table 2-5.
Table 2-§

Backplane Connections

Signal

BUSAO0.L
BUSAO1.L

EH2
EHI

BPB.L

CS1

BUSAO3.L

EV2

BUSAOQ2.L
BUSAO04.L
BUSAOS.L

BUSAO06.L
BUSAO7.L

EF1

BUSDO00.L
BUSDO1.L

EU2
EVI

EUI

BUSDO2.L
'

BUSAO08.L
BUSAO09.L

EN2
ERI

BUSA10.L
BUSAIIL.L
BUSA12.L

CU2

BUSDO3.L

CT2

BUSDOS5.L

CP2

BUSDO4.L

EP2

CS2
CR2

CN2

BUSDO06.L
BUSDO7.L

CVv2
CM2

EPI
EL1
EC1

BUSDOS8.L
BUSDO09.L
BUSDI10.L

BUSA14.L

EK1

BUSDI11.L

CL2
CK2
CJ2

CHI1

BUSDI12.L

CH2

BUSAI1S.L
BUSAI16.L
BUSAI17.L

ED2
EE2
EDI

BUSDI13.L
BUSDI14.L
BUSDI15.L

CF2
CE2
CD2

BBSY.L

FDI1

BDCLO.L
BG4IN.H
BGSIN.H
BG6IN.H

CN1
DS2
DP2
DM2

‘GROUND

BTI

GROUND
GROUND
GROUND
GROUND

CTl1
DTI
ET1
FTI

GROUND

AC2

BUSAI13.L

BG7IN.H
BG4OUT.H

EK2

DK?2
DT2

BG50UT.H
BG60OUT.H

DR2
DN2

BG70UT.H

DL2

GROUND

GROUND
GROUND
GROUND

2-5

BC2

CC2
DC2
EC2

Table 2-5

Backplane Connections (Cont)

Signal

BR4.L
BR5.L
BR6.L
BR7.L

DH2
DF2
DE2
DD2

GROUND
GROUND
NPGIN.H
NPGOUT.H

FC2
ATl
CAl
CBl1

BUSCO.L
BUSCI.L
BINIT.L
BINTR.L
BMSYN.L
BNPR.L
BSACK.L
BSSYN.L

EJ2
EF2
DL1
FM1
EEl
FJ1
FT2
EJ1

+5V
+5V
+5V
+5V
+5V
+5V
+15V
-15V

AA2
BA2
CA2
DA2
EA2
FA2
CU1
FB2

2.3.5.2 Bus Grant Continuity Cards— Typical system-units into which the M3105 module is installed
are DD1 1-C (four slots) and DD11-D (nine slots). For occupied slots, bus-grant continuity is provided by
the installed module. However, unused slots between the first slot and the terminator must have a busgrant card installed to extend the grant.

2.3.5.3

NPG Continuity — Onunused SPC slots, NPG continuity is provided by a wire link between

backplane pins CAl and CBI.

NOTE

When installing the M310S5 module in a slot, you
must remove this link from the slot. If you later
remove the module, replace the link. See also
Section 2.3.5.2.

2.4

PRIORITY SELECTION

The DHU11 uses BR5 or BR6 to request interrupt service.

Non-processor request (NPR) priorities are determined by an option’s position on the bus. The bus
position may be a compromise between NPR and interrupt-priority requirements. As a general rule, NPR
priorities should be considered first, and then interrupt requests.
2.4.1

Non-Processor Request

On systems with more than one DMA device there is a chance of bus-latency problems. To minimize this,
a device which will lose data if its NPRs are not serviced quickly should be placed nearer to the CPU than
a device which can wait longer.

DMA latency is unlikely to affect the DHU11. The worst effect would be to reduce device throughput.
Transmit data will not be lost.

If there is only one DMA device on the system, there is no DMA contention.

2-6

24.2

Bus Request

The DHUI11

is normally assigned BR level 5. Requests are made on bus-request line BR5. An arbitrator
(usually in the host CPU) monitors the request lines. If the host CPU is not engaged in a higher-priority

task it grants the use of the bus to the device with the highest priority.

BR contention only occurs between devices with the same BR level. Within any priority group, priority is
decided by bus position. Devices with time-critical interrupts should be nearer the CPU, unless this

conflicts with NPR priority.

The final configuration can be tested by the appropriate system-exerciser diagnostic. Some changes may

be needed for optimum performance.
2.5

MODULE INSTALLATION
Once you have defined the backplane position of the DHU1 1, you can install the module and check the

backplane with a testmeter.

NOTE
This checkout should be used by trained maintenance personnel only.

CAUTION
Switch off power before inserting or removing
modules. Be careful not to snag module com-

ponents on the card guides or adjacent modules.
The M310S5 is a fine-line-etch PCB. Handle it
carefully to avoid damaging the etch.
Take anti-static measures to protect the module.

Remove the backplane NPG link between CAl and CBI.

Using Figures 2-2 and 1-3 as a guide, install the option.
Figure 2-2 shows how to install distribution panels in the H9544-SJ frame. This frame forms
part of the 19-in rack-mounting kit, CK-DHU11-A1, which is listed in Section 2.2.

Make sure that +5 V is present between AA2 and ground.

Make sure that +15 V is present between CU1 and ground.

Make sure that —15 V is present between FB2 and ground.

2-7

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2.6 CABLES AND CONNECTORS
2.6.1
Distribution Panel
Each H3029 distribution panel adapts two of the DHU11’s Berg * connectors to eight subminiature
D-type RS-232-C connectors. Noise filtering is provided on each pin of the RS-232-C connectors. This
reduces electromagnetic radiation from the cables, and provides the logic with some protection against
static discharge. Noise-filtering increases line capacitance by 850 pF.

Figure 2-3 shows the layout, and Figure 2-4 shows the circuit. There is no CCITT equivalent of EIA
circuit AA (protective ground). To implement this circuit, a ground strap must be installed between the

H3029 and the system cabinet. The 0-ohm link W1 (not installed at the factory) can then be installed to
connect this circuit, and removed to disconnect it, as needed.
NOTE

Staggered-loopback connectors are incorporated
in the H3029 distribution panels. The circuit,
which is shown separately in Figure 2-5, is the
same as the H3277 staggered-loopback connector.

Table 2-6 gives the pin/signal relationships for two distribution panels. Information in parentheses applies

to channels 8 to 16.

The following is an example of the use of Table 2-6.
°

Signal TXDO is the Transmit Data line for channel 0. Its CCITT circuit number is 103. It is
connected to J8 pin B on the H3029 for channels O to 7.

Signal TXDS8 is the Transmit Data line for channel 8. Its CCITT circuit number is 103. It is
connected to J8 pin B on the H3029 for channels 8 to 15.

* Berg is a registered trademark of the Berg Corporation.

2-9

4-40 CAPTIVE
SCREWS
(EIGHT OFF)

STAGGERED LOOPBACK

TEST CONNECTORS

J11
~

PIN 13

—pPiN25

EIGHT
D TYPE

CONNECTORS
(25 PIN)

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CONNECTIONS

RD1726

Figure 2-3

H3029 Layout
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Table 2-6

H3029 Connections

Circuit

J8 Pin

Number

SIG GND 0(8)

102

SIG GND 1(9)
TXDI1(9)
RXD1(9)
DTRI1(9)
RI1(9)
CTS1(9)
RTS1(9)
DSR1(9)
DCD1(9)

102
103
104
108/2
125
106
105
107
109

M
N
P
R
S
T

DCD2(10)
DSR2(10)
RTS2(10)
CTS2(10)
RI2(10)
DTR2(10)
RXD2(10)
TXD2(10)
SIG GND 2(10)

109
107
105
106
125
108/2
104
103
102

Y
Z
BB
CC
DD
EE
FF
HH
JJ

DCD3(11)
DSR3(11)
RTS3(11)
CTS3(11)
RI3(11)
DTR3(11)
RXD3(11)
TXD3(11)
SIG GND 3(11)

109
107
105
106
125
108/2
104
103
102

KK
LL
NN
PP
RR
SS
TT
Uu
\'AY

Signal

TXDO(8)
RXDO0O(8)
DTRO(8)
RIO(8)
CTSO0(8)
RTSO(8)
DSRO(8)
DCDO(8)

103
104
108/2
125
106
105
107
109

B
C
D
E
F
H
K
L

U
\%Y%
X

2-12

Name

Transmit Data
Receive Data
Data Terminal Ready
Ring Indicator
Clear to Send
Request to Send
Data Set Ready
Data Carrier Detect

Table 2-6

H3029 Connections (Cont)

Signal

Circuit

J8 Pin

Number

SIG GND 4(12)
TXD4(12)

102
103

A
B

Transmit Data

RXD4(12)
DTR4(12)
RI4(12)
CTS4(12)
RTS4(12)
DSR4(12)
DCD4(12)

104
108/2
125
106
105
107
109

C
D
E
F
H
K
L

Receive Data
Data Terminal Ready
Ring Indicator
Clear to Send
Request to Send
Data Set Ready
Data Carrier Detect

SIG GND 5(13)
TXD5(13)

102
103

M
N

RXD5(13)
DTRS5(13)
RI5(13)
CTS5(13)
RTS5(13)
DSR5(13)
DCD5(13)

104
108/2
125
106
105
107
109

P
R
S
T
U
w
X

DCD6(14)
DSR6(14)
RTS6(14)
CTS6(14)
RI6(14)
DTR6(14)

109
107
105
106
125
108/2

Y
Z
BB
CC
DD
EE

RXD6(14)

104

TXD6(14)

103

SIG GND 6(14)

102

HH
JJ

DCD7(15)
DSR7(15)
RTS7(15)
CTS7(15)
RI7(15)
DTR7(15)
RXD7(15)
TXD7(15)
SIG GND 7(15)

109
107
105
106
125
108/2
104
103
102

KK
LL
NN
PP
RR
SS
TT
Uu
\'AY

2-13

Name

2.6.2

Staggered-Loopback Test Connector

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See Figure 2-5. Two staggered-loopback test connectors are built into the H3029 distribution panel for
use during diagnostic tests. Systems which do not use the H3029 will be supplied with a separate loopback
connector (H3277) which implements the loopback circuits of the H3029. Using these connectors, all
channels can be tested. A channel fault can be traced to one of two channels.

<:o§og919%0%630%0%o§9§oto§9:om98080$o§oNo<oxo§o<oc049m?mqv?zogoroxoLo:omOmoc?o?mo>

J10

Figure 2-5

Staggered-Loopback Circuit of H3029

2-14

2.6.3
Lme-Loopback Test Connector H325
This connector is shownin Figure 2-6. It can be used during diagnostic tests to trace a fault to a single
channel.
CCITT No.

NAME

NOT USED
NOT USED
NOT USED
NOT USED

24
———»
15
17
11
——

NOT USED 12

103

TXD

104

RXD_——-—

105

RTS

106

CTS S

109

DCD 8

NOT USED

® ® & & © & & & o & o o o

H325

DSR 6

108.2

DTR

PHYSICAL ARRANGEMENT

;

E}@....O.....j@

—————»

107
125

W1 IS PERMANENTLY IN

FOR DHU11 TESTING

CONNECTIONS

RD1729

Figure 2-6

Line-Loopback Test Connector

2.6.4
Null Modem Cables
Null modem cables are used for local RS-232-C connection. Because of Federal Communications
Commission (FCC) regulations, the cable specifications for the United States and Canada are different
from those for non-FCC countries. Other countries may also have similar electromagnetic interference
(EMI) control regulations. EMC/RFI shielded cabinets (see Appendix A, Glossary) are now available
for systems which conform to FCC requirements.

2-15

Recommended null modem cables are as follows.

BC22D (for EMC/RFI shielded cabinets)

Round 6-conductor fully shielded cable to FCC specification

Subminiature 25-pin D-type female connector moulded on each end

Lengths available.
3.1 m (10 ft)
BC22D-10
7.62 m (25 ft)
BC22D-25
10.72 m (35 ft)
BC22D-35
15.24 m (50 ft)
BC22D-50
BC22D-75 - 22.9 m (75 ft)
BC22D-A0 - 30.48 m (100 ft)
BC22D-B5 - 76.2 m (250 ft).

BCO3M

Round 6-conductor (three twisted pairs), each pair shielded

Cables over 30.48 m (100 ft) have a 25-pin subminiature D-type female connector at one
end. The other end is unterminated, for passing through a conduit.

Cables 30.48 m (100 ft) and less have a 25-pin subminiature D-type female connector at

Lengths available.

each end.

BCO3M-25 - 7.62 m (25 ft)
BCO3M-A0 - 30.48 m (100 ft)
BCO3M-B5S - 76.2 m (250 ft)
BCO3M-E0O - 152.4 m (500 ft)
BCO3M-LO - 304.8 m (1000 ft).
3.

BC22A

Round 6-conductor cable

Subminiature 25-pin D-type female connector moulded at each end

Lengths available.
BC22A-10
BC22A-25

3.1 m (10 ft)
7.62 m (25 ft).

Cables of groups 1, 2, and 3 are all connected as in Figure 2-7. The cables are not polarized. They can be
connected either way round.

2-16

PIN .
NUMBERS

PIN
NUMBERS

1 o PROTECTIVE GROUND

PROTECTIVE GROUND o1

2 O TRANSMITTED DATA

RECEIVED DATA 0 3

30 RECEIVED DATA

TRANSMITTED DATA 02

7 o SIGNAL GROUND

SIGNAL GROUND o7

6 O DATA SET READY

DATA TERMINAL READY 0 20

20 O DATA TERMINAL READY

DATA SET READY 06
RD1150

Figure 2-7

Null Modem Cable Connections

2.6.5 Modem Cables
Recommended modem cables are as follows.
1.

BC22F (for EMC/RFI shielded cabinets)
Round 25-conductor fully shielded cable

Subminiature 25-pin D-type female connector on one end, male connector on the other
Lengths available.
BC22F-10
BC22F-25
BC22F-35
BC22F-50
BC22F-75
2.

—
-

3.1
m (10 f)
7.62
m (25 ft)
10.72
m (35 ft)
15.24
m (50 ft)
22.9
m (75 ft).

BCO5SD
Round 25-conductor cable

Subminiature 25-pin D-type female connector on one end, male connector on the other
Lengths available.

BCO5D-10
BCO5D-25
BCO5D-50
BCO5D-60
BCOSD-A0

- 3.1 m (10 ft)
- 7.62 m (25 ft)
- 15.24 m (50 ft)
- 18.6 m (60 ft)
- 30.48 m (100 ft).
CAUTION

In some countries, protective hardware may be
needed when connecting to certain lines. Refer to
the national regulations before making a connection.

2-17

2.6.6 Data-Rate to Cable-Length Relationships
Allthe recommended cables have data-rate/cable-length characteristics as in Table 2-7. Cables of lengths
different from those quoted in Sections 2.6.4 and 2.6.5 will have to be specially made. An acceptable nonFCC cable for this purpose is Belden type 8777.
Table 2-7

Data-Rate/Cable-Length Relationships

Data Rate

(Bits/s)
110
300
1200
2 400
4 800
9 600

Cable Length

914

3000

914
152
152
76
76

3000
500
500
250
250

(Meters)

(Feet)

NOTE
Cables longer than 15.24 m (50 ft), or with a
capacitance greater than 2.5 nanofarads, violate
RS-232-C and V.28 specifications.
2.7

MULTIPLE COMMUNICATIONS OPTIONS

2.7.1
Floating Device-Addresses
On UNIBUS and Q-bus systems, a block of addresses in the top 4K words of address space is reserved for
options with floating device-addresses. For UNIBUS systems, the floating-address range is 760010g to
763776g.
Options which can be assigned floating device-addresses are listed in Table 2-8. This table gives the
sequence of addresses for both UNIBUS and Q-bus options. For example, the address sequences could
be:
UNIBUS

Q-Bus

DJ11

DHI11
DQI11
DUI11

DHI11
DQI11
DUVI11

DUPI11

and so on.

Having one list allows us to use one set of configuration rules and one configuration program.
Devices of the same type are given addresses in sequence, so all DZ11s have addresses higher than
DUI11s and lower than RL11s.

The column ‘Size’, in Table 2-8, shows how many words of address space are needed for each device. The
column ‘Modulus’ is the modulus used for starting-addresses. For example, devices with an octal modulus
of 10 must start at an address which is a multiple of 10g. The same rule is used to select a gap-address (see
the assignment rules) after an option, or for a nonexistent device.

2-18

Table 2-8
Rank

Floating Device-Address Assignments

Device

Size

(Decimal)

(Octal)

Modulus

Notes

1
2
3
4
5

DJ11
DHI11
DQl1
DU11, DUV11
DUPI11

4
8
4
4
4

10
20
10
10
10

6
7
8

LKI1A
DMCI11/DMRI11
DZ11/DZV11,

4
4
4

10
10
10

9
10

DZS11, DZ32
KMCl11
LPP11

4
4

10
10

11
12
13
14
15

VMV21
VMV31
DWR70
RL11, RLVI11
LPA11-K

4
8
4
4
8

10
20
10
10
20

16
17
18

4
4

10
10

19
20

KW11-C
Reserved
RX11/RX211,
RXV11/RXV21
DRI11-W
DRI11-B

4
4

10
10

21
22
23
24
25

DMPI11
DPV1l1
ISB11
DMV11
DEUNA

4
4
4
8
4

10
10
10
20
10

26
27
28
29

UDAS50/RQDX1
DMF32
KMSI11
VS100

2
16
6
8

4
40
20
20

31
32

KMV11
DHV11/DHU11

8
8

20
20

Reserved

DMC before DMR
A. DZ11 before DZ32

B
B

B
RX11 before RX211

DZI11-E and DZ11-F are treated as two DZ11s.

The first device of this type has a fixed address. Any extra devices have a floating address.

The first two devices of this type have a fixed address. Any extra devices have a floating address.

2-19

The address-assignment rules are as follows.
1.

Addresses, starting at 760010g for UNIBUS systems, are assigned according to the sequence
of Table 2-8.

Option- and gap-addresses are assigned according to the octal modulus as follows.
a.

Devices with an octal modulus of 4 are assigned an address on a 4g boundary (the two
lowest-order address bits = 0).

Devices with an octal modulus of 10 are assigned an address on a 10g boundary (the three
lowest-order address bits = 0).

Devices with an octal modulus of 20 are assigned an address on a 20g boundary (the four

lowest-order address bits = 0).

Devices with an octal modulus of 40 are assigned an address on a 40g boundary (the five
lowest-order address bits = 0).

Address space equal to the device’s modulus must be allowed for each device which is
connected to the bus.

A l-word gap, assigned according to rule 2, must be allowed after the last device of each type.
This gap could be bigger when rule 2 is applied to the following rank.

A l-word gap, assigned according to rule 2, must be allowed for each unused rank on the listif a

device with a higher address is used. This gap could be bigger when rule 2 is applied to the
following rank.
If extra devices are added to a system, the floating addresses may have to be reassigned in agreement with
these rules.
In the following example, a brief description of UNIBUS address assignment is given. Note that the list
includes floating-vector addresses. These are explained in Section 2.7.2.
Example: One DU11, one RL11, and two DHU11s

Address

Vector

(Octal)
760010
760020
760030
760040
760050

DJ11 gap
DHI11 gap
DQI11 gap
DU11
DUI11 gap

760060
760070
760100
760110
760120

DUPI11 gap
LK11A gap
DMCI11 gap
DZ11 gap
KMCI11 gap

2-20

300

Address

Vector

(Octal)
760130
760140
760160
760170
760200

LPP11 gap
VMV21 gap
VMV31 gap
DWRT70 gap
RL11

760210
760220
760230
760240
760250

RL11 gap
LPA11-K gap
KWI11-C gap
reserved gap
RX11 gap

760260
760270
760300
760310
760320

DR11-W gap
DRI11-B gap
DMP11 gap
DPV11 gap
ISB11 gap

760340
760350
760354
760400
760420

DMV11 gap
DUENA gap
UDASO gap
DMF32 gap
KMS11 gap

760440
760444
760460
760500
760520

VS100 gap
reserved gap
KMVI11 gap
1st DHU11
2nd DHUI11

760540

DHU11 gap

310

320
330

The first floating address is 760010. As the DJ11 has a modulus of 10g, its gap can be assigned to 760010.
The next available location becomes 760012,
As the DH11 has a modulus of 20g, it cannot be assigned to 760012. The next modulo 20 boundary is
760020, so the DH11 gap is assigned to this address. The next available location is therefore 760022.

A DQI11 has a modulus of 10g. It cannot be assigned to 760022. Its gap is therefore assigned to 760030.
The next available location is 760032.

A DUI11 has a modulus of 10g. It cannot be assigned to 760032. It is therefore assigned to 760040. As the
‘size’ of DU11 is four words, the next available address is 760050.
There is nosecond DU11, so a gap must be left to indicate that there are nomore DU11s. As 760050 ison
a 10g boundary, the DU11 gap can be assigned to this address. The next available address is 760052.
And so on.

2-21

2.7.2

Floating Vectors

Addresses between 300g and 774g are designated as the floating-vector space. These addresses are
assigned in sequence as in Table 2-9.

Each device needs two 16-bit locations for each vector. For example, a device with one receive and one
transmit vector needs four words of vector space.

The vector assignment rules are as follows.

Each device occupies vector address space equal to ‘Size’ words. For example, the DLV11-J
occupies 16 words of vector space. Ifits vector was 300g, the next available vector would be at
340g.

There are no gaps, except those needed to align an octal modulus.

An example of floating-vector address assignment is given in Section 2.7.1.

Table 2-9

Floating-Vector Address Assignments

Rank

Device

Size
(Decimal)

Modulus
(Octal)

1
1
2
2
2

DCl11
TUSS8
KL11
DL11-A
DL11-B

4
4
4
4
4

10
10
10
10
10

2
2
3
4
5

DLV11-]
DLV11, DLV11-F
DP11
DMI11-A
DNI11

16
4
4
4
2

10
10
10
10
4

6
7
8
9
10

DMI11-BB/BA
DH11 modem control
DR11-A, DRV11-B
DR11-C, DRV11
PAG611 (reader + punch)

2
2
4
4
8

4
4
10
10
10

DTO07

LPDI11

13
14
15

DXI11
DL11-C to DLVI11-E
DIJI1

4
4
4

10
10
10

16
17
17
18
19

DH11
VT40
VSV11
LPS11
DQIl11

4
8
8
12
4

10
10
10
10
10

Notes

A
A
A

A KLI11 or DL11 used as the console has a fixed vector.

2-22

Table 2-9

Rank

Floating-Vector Address Assignments (Cont)

Device

Size

Modulus

(Decimal)

(Octal)

20
21
22
23
24

KW11-W, KWV11
DUI11, DUV11
DUPI11
DV11 + modem control
LKI11-A

4
4
4
6
4

10
10
10
10
10

25
26
27

4
4
4

10
10
10

DWUN
DMCI11/DMRI11
DZ11/DZS11/DZV11,
DZ32
KMCl11

29
30
31
32
33

LPP11
VMV21
VMV3l1
VTVO1
DWR70

4
4
4
4
4

10
10
10
10
10

34
35
36
37
38

RLI11/RLV11
TS11, TUSO
LPA11-K
IP11/IP300
KW11-C

2
2
4
2
4

4
4
10
4
10

RX11/RX211

RXV11/RXV21

Notes

DMC before DMR
DZ11 before DZ32

B
B

RX11 before RX211

40
41
42

DRI11-W
DRI11-B
DMP11

2
2
4

4
4
10

43
44
45
46
47

DPV1l1
ML11

4
2
4
4

10
4
10
10

B
B

ISB11
DMVI11
DUENA

49
50
51
52

UDA50/RQDX1
DMF32
KMSI11
PCLI11-B
VS100

2
16
6
4
2

4
4
10
10
4

53
54
55
56
57

reserved
KMV1l1
reserved
IEX
DHV11/DHU11

2
4
4
4
4

10
10
10

The first device of this type has a fixed vector. Any extra devices have a floating vector.
MLI1 is a MASSBUS device which can connect to UNIBUS via a bus adapter.

2-23

2.8

INSTALLATION TESTING

the
This section identifies the diagnostic tests that should be run on PDP-11 or VAX systems after
detailed
more
and
installation of a DHU11. Chapter 4, Maintenance, contains descriptions of the tests,
information on how they should be run.

DHUI11 diagnostics are available for both PDP-11 and VAX systems. There are four types.
Power-up self-test

On-line diagnostics (VAX systems only)
Functional verification tests
System exercisers

The first three types provide an ascending level of confidence in the option.

As well as providing the highest level of confidence, functional verification tests also provide a means of
quickly identifying a defective FRU.

System exercisers check that the options of a system will work together.
PDP-11 Installation Tests

2.8.1

The following diagnostics should be run on PDP-11 systems after installation. Note that each diagnostic
name has a revision and a patch level. For example, ZDHUALI identifies test ZDHU, revisionlevel A and
patch level 1. The symbol ? is a global indicator for revision and patch levels.
1.

Self-test

Functional verification tests ZDHU??, ZDHV??, ZDHW??, and ZDHX?"?

DECX/11 exerciser XDHU??

XDHU?? is not directly runnable. The DECX/11 exerciser must first be configured into a run-time
exerciser (see Chapter 4, Section 4.4.2). All individual device diagnostics should be run without error
before DECX/11 is run.

The self-test runs automatically when the bus or DHU11 is reset. If no fault is found, the diagnostic LED
will flash OFF/ON/OFF and then come ON permanently. The first OFF state is very short and may not
be seen. However, if the LED goes OFF before coming ON permanently the diagnostic has found no
faults. This does not prove that the option is serviceable.

During the self-test diagnostic operation, bytes are written to the RX FIFO. By reading these bytes, the
engineer can receive more detailed information about the state of the DHU1 1. Diagnostic bytes and their
interpretation are described in Chapter 3 of this document. The self-test can take up to 2.5 seconds.
The ZDHU??, ZDHV??, ZDHW??, and ZDHX?? diagnostics can be used:
e

For testing a new installation

As a comprehensive confidence check.

For troubleshooting

The diagnostic listings describe these tests, and how to run them.

2-24

2.8.1.1

PDP-11 Installation Test Sequence

Switch on power, or reset the system. Check the diagnostic LED sequence.

Install staggered-loopback connectors on the BCO5SL cables.

Run all the ZDH diagnostics in sequence for one error-free pass. If there are no errors, the
module is probably good.

Run the DECX/11 exerciser to verify that the DHUI11 will run with other options of the
system.

Re-cable the option for normal operation (see Figure 2-2). The DHUI1 should now be ready for
connection to external equipment. See Section 2.6 if necessary, for recommended modem and nullmodem cables.

If any of the tests show errors, refer to Chapter 4, Maintenance, Sections 4.4 and 4.5, for diagnostic
information and a troubleshooting flowchart.

2.8.2 VAX Installation Tests
In addition to the self-test, which functions as described in Section 2.8.1, the following VAX diagnostics
are available.

e
e
e
2.8.2.1

Standalone VAX diagnostic EVDAI
On-line VAX diagnostic EVDAH
User Environmental Test Program (UETP)
EVDALI Standalone Diagnostic — EVDALI is a suite of functional verification tests that can be

used:

e
e
e

As installation tests
For troubleshooting
As a more comprehensive confidence check.

The diagnostic listing ZZ-EVDALI describes the tests and how they are run.

LIIA.(,)I\,)»—\

2.8.2.2
EVDAH On-Line Diagnostic — This diagnostic provides a confidence check of DHU11s in
VAX/VMS systems. Channels which have not been allocated to a process can be checked while the
system is running application programs. The following tests can be selected.
Internal data-loopback test on selected channels
in sequence.
Internal DMA data-loopback test on selected channels in sequence.
Internal data-loopback test on selected channels at the same time.
External loopback test (via H325) of modem control signals.
External data-loopback via a modem or H325. If a modem is used, it must be set up manually.

Diagnostic listing ZZ-EVDAH describes the tests and how to run them.

2.8.2.3
VAX/VMS System Exerciser UETP - This exerciser package checks that there is no
unwanted interaction between the options connected to the system.

2-25

VAX Installation Test Sequence

2.8.3

The test sequence after installation is as follows.
1.

Switch on power, or reset the system. Check the diagnostic LED sequence.

Install staggered-loopback connectors on the BCOSL cables.

Run EVDALI for one error-free pass on all lines, in staggered-loopback mode.
Connect the option for normal operation.

Run EVDAH tests 1, 2, and 3 in internal-loopback mode for one error-free pass on all lines.
Run the system exerciser package UETP to verify that the DHU11 will run with other options
of the system.

NOTE

Before EVDAI or EVDAH is run, the DHUI11
must be ‘attached’ to the system (see the VAX
Diagnostic System User’s Guide). The form of the

ATTACH command is:

DS> ATTACH DHUI11 DWO0 TYA xoxxx yyy S
where xxxxxx is the device address and yyy is the
vector.

The DHU11 should now be ready for connection to external equipment. See Section 2.6 if necessary, for
recommended modem and null-modem cables.

If any of the tests show errors, refer to Chapter 4, Section 4.6 for diagnostic information and a

troubleshooting flowchart for the EVDAI diagnostic.

2-26

CHAPTER 3
PROGRAMMING

3.1
SCOPE
This chapter describes the control-and-status registers, and how they are used to control and monitor the
DHUI11. The chapter covers:
e
e

The bit functions and format of each register
Programming features available to the host.

Some programming examples are also included.

3.2 REGISTERS
The host controls and monitors the DHU11 module via a number of control-and-status registers. Command words or bytes written to the registers are interpreted and processed by the firmware. Status
reports and data are also transferred via the registers.
3.2.1
Register Access
DHUI11 registers occupy eight words (16 bytes) of UNIBUS memory-mapped I/O space. However, by
indexing, this is expanded internally to 115 words.
The position of the eight words within the I/O page is switch-selected on the DHU11. In order to access
the module, bits <12:4> of an I/O address must match the address switch coding.

Table 3-1 lists the DHU1 1 registers and their addresses. The suffix (M) means that there are 16 of these
registers, one for each channel. When an (M) register is accessed, the channel is selected by the contents of
CSR<3:0>.
The term ‘base’ means the lowest I/O address on the module, that is to say, when the four low-order

address bits = 0.
Registers are accessed by instructions which use ‘base + n’ as a source or destination. However, before
multiple (M) registers are accessed, the channel number must be written to the CSR. The following
example explains this.

To read the line-control register of channel 3, the following PDP-11 instructions are executed:

MOVB # CHAN,@#BASE
MOV @#BASE+10,R0

;WRITE CHANNEL NUMBER (SEE BELOW) TO CSR
;READ THE LINE-CONTROL REGISTER

3-1

In the example:

= the RXIE bit
= the MRST bit (would be 0)
and 0011 = channel number 3

Where ¢

CHAN = 0er00011,

and r

NOTE

Not all register bits are specified. During a

write, all unspecified bits must be written as
0s. During a read, unspecified bits are
undefined.

The exception to the above rule is that a bit
may be written as logical 1 or 0 if it is read as
logical 1. That is to say, read-modify-write
instructions work correctly. Read-modifywrite instructions should not be used on the
base address or base + 2.
Table 3-1

DHUI1 Registers

Control-and-Status Register
Receive Buffer
Receive Timer *
Line Parameter Register
FIFO Data
FIFO Size
Line Status
Line Control
Transmit Buffer Address 1
Transmit Buffer Address 2
Transmit Buffer Count
*

(CSR)
(RBUF)
(RXTIMER)
(LPR)
(FIFODATA)
(FIFOSIZE)
(STAT)
(LNCTRL)
(TBUFFAD1)
(TBUFFAD2)
(TBUFFCT)

Address (Octal)

Type

Base
Base + 2
Base + 2
Base + 4 (M)
Base + 6 (M)
Base + 6 (M)
Base + 7 (M)
Base + 10 (M)
Base + 12 (M)
Base + 14 (M)
Base + 16 (M)

Read/Write
Read
Write (byte)
Read/Write
Write
Read (byte)
Read (byte)
Read/Write
Read/Write
Read/Write
Read/Write

Only accessible when CSR<3:0> = 0000. See 3.2.2.1.
Register Bit Definitions

3.2.2

The register formats, which precede the definitions of the register bits, are coded as follows.

e
e

Bits marked with an asterisk (*) may hold data-set status, or special information from the

diagnostic programs. These are covered in Section 3.3.10.

Registers which are modified by reset sequences are coded as shown in Figure 3-1.

3-2

CLEARED BY MASTER RESET

SET BY MASTER RESET

CLEARED BY BINIT, POWER-UP OR POWER-DOWN

BUT NOT BY MASTER RESET
RD1179

Figure 3-1

3.2.2.1

Base Control-and-Status Register (CSR)
CSR (BASE)

RR/V\dRRRRRRRR/WR/WR/WR/WR/WR/WR/W
Z

ACTION

DIAGNOSTIC

|FAIL

RCVE

TRANSMIT.
LINE NUMBER
TRANSMIT
INT. ENABLE

TRANSMIT
DMA ERROR

SKIP

INT.

EF';‘XA"EBLE
(RXIE)

RCVE DATA
AVAILABLE

MASTER
RESET

INDIRECT ADDRESS
REG POINTER

(CHANNEL NUMBER)

RD1827

Bit

<3:0>
4

Name

Description

IND.ADDR.REG

These bits are used to select the channel when accessing a block of

which is to be accessed.

SKIP
(Skip Self-Test)

This bit is used to make the DHU1 1 skip the self-test operation. This
will shorten the reset/initialization sequence to about 25 milliseconds.

(Indirect Address

(R/'W)

indexed (M) registers. They form the binary number of the channel

The bit must only be set at the same time as MASTER.RESET
(write 60 to CSR). It must be cleared not less than 20 microseconds
after it is set.

Bit

Name

Description

MASTER.RESET
(Master Reset)
(R/'W)

Set by the host, in order to reset the DHU11 to a known state. Stays
set while the DHU1 1 runs a self-test diagnostic and then performs an
initialization sequence. The bit is then cleared to tell the host that the
process is complete.

This bit is set by BINIT (bus initialization signal), or by the host
processor setting CSR<5>.

The host must not write to any register, or read RBUF, while this bit
is set, except during a ‘skip self-test’ operation.

RXIE

When set, this bit allows the DHUI11 to interrupt the host when

Enable) (R/W)

following conditions:

(Receiver Interrupt

RX.DATA.AVAIL is set. An interrupt is generated under the
1. RXIE is set and a character is placed into the empty RX FIFO
2. The RX FIFO is not empty and RXIE is changed fromO to 1.
Cleared by BINIT but not by MASTER.RESET.

The receive interrupt may be delayed by use of the RXTIMER
register (see Section 3.2.2.3).

RX.DATA.AVAIL
(Received Data
Available) (RD)

When set, indicates that a received character is available. This bit is
clear when the RX FIFO is empty. It is used to request an RX
interrupt.

Set after MASTER.RESET because the RX FIFO contains
diagnostic information.

<11:8>

TX.LINE
(Transmit Line

If TX.ACTION is set, these bits hold the binary number of the
channel on which one of the following has just occurred.

Number) (RD)

1. The TX FIFO has become empty.

2. A DMA transfer has been completed normally.
3. A DMA abort sequence has been completed.
If TX.DMA.ERROR is also set, these bits contain the binary
number of the channel which has failed during a DMA transfer.

TX.DMA.ERROR
(Transmit DMA
Error) (RD)

Ifset with TX.ACTION also set, means that the channel indicated
by CSR<11:8> has failed to transfer DMA data within 21.3
microseconds.
of the bus request being acknowledged, or that there is
a memory parity error.

The TBUFFADI1 and TBUFFAD?2 registers will contain the
address of the memory location which could not be accessed.
TBUFFCT will be cleared.

3-4

Bit

Name

Description

DIAG.FAIL
(Diagnostic Fail)

When set, indicates that the DHUI11 internal diagnostics have
detected an error. The error may have been detected by the self-test

(RD)

diagnostic or by the BMP.
This bit is associated with the diagnostic-passed LED. Wheniit is set,
the LED will be off. When it is cleared, the LED will be on.

The bit is set by MASTER.RESET. It is cleared after the internal
diagnostic programs have been run successfully.
DIAG.FAIL is only valid after MASTER.RESET (CSR<5>) has
been cleared.
14

TXIE (Transmit
Interrupt Enable)

(R/W)
15

TX.ACTION
(Transmit Action)

(RD)

When set, allows the DHU11 to interrupt the host when CSR<15>
(TX.ACTION) becomes set.

Cleared by BINIT but not by MASTER.RESET.
This bit is set by DHU11 when:

1. The last character of a DMA buffer has been transmitted

2. An abort sequence has been completed
. 3. A DMA transfer has been terminated by the DHU11 because
nonexistent memory has been addressed, or because of a
memory parity error

A TX FIFO becomes empty during a TX FIFO output
sequence.

This bit is cleared if the host reads the CSR after the TX Action
FIFO has become empty. To avoid losing TX Action reports, the
host must not let more than 16 reports accumulate. It is advisable to
read the CSR until TX.ACTION becomes clear, otherwise a TX
interrupt will not be generated when further reports are loaded.
Also cleared by MASTER.RESET.
NOTE
CSR contents should only be changed by a PDP-11 MOV or
MOVB instruction,
or the VAX equivalent (MOVW or MOVB).
Other instructions may lose the state of the TX.ACTION bit
(CSR<15>).

3-5

3.2.2.2 Receive Buffer (‘RBUF)V—- This is a read-only register at address Base + 2. Reading the register
accesses the oldest word in the 256-word RX FIFO. The least-significant bit (LSB) of the character is in

bit 0.

RBUF (READ BASE+2)
*

DATA
VALID

|[FRAMING
[ERROR

OO0

RECEIVED
CHARACTER

RECEIVE
LINE NUMBER

OVERRUN PARITY

DATA SET

ERROR ~ ERROR

STATUSIo FLAGS

(FROM HIGH BYTE

OF STAT)

DIAGNOSTIC INFO

Bit

Name

<7:0>

RX.CHAR
(Received

Character) (RD)

RD1855

Description

If RBUF<14:12> = 000, these eight bits contain the oldest

.character in the FIFO. The character is good.

If RBUF<14:12> = 001, 010, or 011, these eight bits contain the
oldest character in the FIFO. The character is bad.
If RBUF<14:12> = 111, these eight bits contain diagnostic or
modem status information. In this case, RBUF<0> has the
following meanings.

0 = Modem status in RBUF<7:1> (see Section 3.2.2.7)
1 = Diagnostic information in RBUF<7:1> (see Section 3.3.10).
If there is an overrun condition, the UART data buffer for that
channel will be cleared. A null character with RBUF<14> set
(40000g) will be placed in the RX FIFO. The cleared data will be
lost.

The DHU11 does not have a break-detect bit. A line break is
indicated to the program as a null character with the FRAME.ERR
set (20000g).

<11:8>

RX.LINE
(Receive Line
Number) (RD)

These bits hold the binary number of the channel on which the
character of RBUF<7:0> was received or on which a data-set
change was reported.

3-6

Bit

Name

Description

PARITY.ERR
(Parity Error)

Set if this character has a parity error and parity is enabled for the
channel indicated by bits <11:8> (also see RX.CHAR).

(RD)

FRAME.ERR

(Framing Error)

Set if the first stop bit of the received character was not detected (also

see RX.CHAR).

(RD)

OVERRUN.ERR
(Overrun Error)

(RD)

Set if one or more previous characters of the channel indicated by bits
<11:8> were lost because of a full FIFO, or failure to service the

UARTS:S (also see RX.CHAR).
NOTE

The “all 1s’ code for bits <14:12>> is reserved. This code indicates
that modem status or diagnostic information is held in RBUF<7:0>.

DATA.VALID

(Data Valid)

(RD)

Set if the FIFOis not empty. Cleared by MASTER.RESET or by

the FIFO becoming empty.

After self-test, diagnostic information is loaded into the RX FIFO.
Therefore, this bit is always set after a successful master-reset
sequence.

3.2.2.3 Receive Timer Register (RXTIMER) — The indirect address register (CSR<3:0>) must
= 0000 in order to access the receive timer. It can be used by the host to delay the receive interrupt.

Rx TIMER (BASE+2)
15

OO
y

WIW|IWIW]|IWIW]|W|W
A
A
4 _ /4
RD1774

Bit

Name

Description

<7:0>

RX. TIMER
(Receive Timer)

The receive interrupt is normally raised when a received character is
loaded into the previously empty RX FIFO. The binary number

(WR BYTE)

loaded into RXTIMER modifies this procedure as follows.
0

Infinite timeout. This timeout will be overridden

by the conditions below.

timeout.

The

interrupt

immediately.

2 to 255 =

3-7

Timer delay in milliseconds

will

raised

Description

Name

Bit

The timer is overridden when the FIFO becomes three-quarters full
(critical) or when a modem status change is written to the FIFO.
Set to 1 by MASTER RESET.

3.2.2.4

Line Parameter Register (LPR) — This register is used to configure its associated channel. Bit

function is as follows.

LPR (BASE +4)

AN 4

R/W|R/W R/W/R/W R/W|R/W R/VV/R/W R/W/R/W R/W/R/W R/W|R/W w
A

STOP
CODE

TRANSMIT
SPEED

EVEN
PARITY

RECEIVE
SPEED

Bit

<2:1>

PARITY
ENABLE

DIAGNOSTIC
CODE

CHARACTER
LENGTH

Name

Description

DIAG

'Diagnostic control codes. Used by the host as follows.

(Diagnostic Code)

(R/W)

Normal operation

Causes the background monitor program (BMP) to
report the DHUI11 status via the RX FIFO. BMP
reports are covered in Section 3.3.10.

Set to 00 by MASTER.RESET.

<4:3>

CHAR.LGTH

(Character Length)

(R/W)

Defines the length of characters. Does not include start, stop, and
parity bits.
00
01
10
11

=
=
=
=

5 bits
6 bits
7 bits
8 bits

Set to 11 by MASTER.RESET.

3-8

Bit

Name

Description

PARITY.ENAB

Parity enable. Causes a parity bit to be generated on transmit, and

(Parity Enable)
(R/W)

checked and stripped on receive.
1 = Parity enabled
0 = Parity disabled

Cleared by MASTER.RESET.

EVEN.PARITY

(Even Parity)

(R/W)

If LPR<5> is set, this bit defines the type of parity.
1 = Even parity

0 = Odd parity

Cleared by MASTER.RESET.

STOP.CODE

(Stop code)

(R/W)

Defines the length of the transmitted stop bit.
0 = 1 stop bit for 5-, 6-, 7- or 8-bit characters
1 = 2 stop bits for 6-, 7-, or 8-bit characters or 1.5 stop bits for
5-bit characters

Cleared by MASTER.RESET.

<11:8>

<15:12>

RX.SPEED

Set to 1101 by MASTER.RESET. (9 600 bits/s)

Rate) (R/W)

Defines receive data rate (Table 3-2).

TX.SPEED

Set to 1101 by MASTER.RESET. (9 600 bits/s)

Rate) (R/W)

Defines transmit data rate (Table 3-2).

(Received Data

(Transmitted Data

3-9

Table 3-2
Code

Data Rates

Data Rate

Maximum

(Bits/s)

0000
0001
0010
0011

Groups

Error (%)

50
75
110
134.5

0.01
0.01
0.08
0.07

A
B
A and B
A and B

0100
0101
0110
0111

150
300
600
1200

0.01
0.01
0.01
0.01

B
A and B
A and B
A and B

1000
1001
1010
1011

1 800
2 000
2 400
4 800

0.01
0.19
0.01
0.01

B
B
A and B
A and B

1100
1101
1110
1111

7 200
9 600
19 200
38 400

0.01
0.01
0.01
0.01

A
A and B
B
A

NOTE

The DHUI11 16-channel interface uses eight dualchannel ICs. Channels 0/1, 2/3, 4/5, 6/7, 8/9,
10/11, 12/13, and 14/15 are paired. It is the
responsibility of the user to select transmit and
receive data rates of the same group (A or B), for
any pair of channels.
If channels within the same DUART are configured
in different groups, the resulting data rates are
undefined.
3.2.2.5
FIFO Data Register (FIFODATA) - A write to FIFODATA is interpreted as a write toa TX
FIFO. Tosend acharacter or characters viaa TX FIFO, the host writes the character(s) to the FIFO data
register of the appropriate channel. To make sure that there is room in the TX FIFO, the host should first
read the associated FIFO size register (See Section 3.2.2.6). If single characters are sent, they must be
written to the low byte of FIFODATA.
FIFODATA (BASE+6)
15

y, -

TX DATA CHARACTER

3-10

Bit

Name

Description

<7:0>

FIFODATA<7:0>
(FIFO Data Byte

Contains a single character for transfer via the TX FIFO. After a
write-byte action to this register, FIFODATA<7:0> is transferred

to the FIFO.

(WR BYTE)
The least-significant bit of the character is in
Unused bits must be cleared.

FIFODATA bit O.

Cleared by MASTER.RESET.
<15:0>

FIFODATA<15:0>
(FIFO Data
Register) (WR)

Contains two characters for transfer via the TX FIFO. After a writeword action to this register, FIFODATA<T7:0> -and then
FIFODATA<15:8> are transferred to the FIFO.
The least-significant bits of the characters are in FIFODATA, bits 0

and 8. Unused bits must be cleared.
Cleared by MASTER.RESET.

3.2.2.6

FIFO Size Register (FIFOSIZE) — This low-byte register holds a number which indicates

the space available in the TX FIFO.
FIFOSIZE (BASE+6)
15

11t

OO0

ALW/L\YS 0
FIFO SIZE O - 64

Bit

Name

Description

7:0

FIFOSIZE
(FIFO Size)
(RD BYTE)

Indicates the available space (in characters) in the TX FIFO. The
range is 000g (019) to 100g (6410). This register should be read
before sending a character, or a sequence of characters, to the FIFO
data register.
NOTE
This register can be read (RD WORD) at the same time as the
STAT register.
Set to 100g by MASTER.RESET

3-11

3.2.2.7

Line Status Register (STAT) — This high-byte register is read from base + 7. It holds modem

status information.

STAT (BASE+7)
15

08
4

OO0

]

DCD

DSR

ALWAYS 1

CTS

(RING
INDICATOR)

Bit

Name

Description

DHUID

Tells the host whether a DHU11 or a DHV11 is installed. This bit is

(DHU11 Identifier)
(RD)

CTS

(Clear to Send)

(RD)

DCD (Data

Carrier Detect)

(RD)

RI (Ring Indicator)

(RD)

not valid while MASTER.RESET is set.
Always 1 on DHU11 (0 on DHV11).

Gives the present status of the Clear To Send (CTS) signal from the
modem.
1 =
0 =

Gives the present status of the Data Carrier Detect (DCD) signal
from the modem.
1 =
0 =

DSR

(Data Set Ready)

ON
OFF

Gives the present status of the Ring Indicator (RI) signal from the
modem.
1 =
0 =

ON
OFF

Gives the present status of the Data Set Ready (DSR) signal from the

modem.

(RD)

In order to report a change of modem status, the DHUIl writes the
contents of STAT<15:9> into RBUF<7:1>. RBUF bit0 will be
clear. RBUF<14:12> = 111 to tell the host that RBUF<7:0> do
not hold a received character (see Section 3.3.8, Modem Control).
This register can be read (RD WORD) at the same time as the
FIFO size register.

3-12

3.2.2.8 Line Control Register (LNCTRL) — The main function of this register is to control the line
interface.
LNCTRL (BASE+10)
15

R/'W

RTS

R/W [R"W|R/W|R“WIR/W|R/W|R/W|R/W|R/W|R/W
Pa

DTR

OAUTO | RX

LINK

FORCE

TYPE
XOFF
MAINTENANCE
MODE

Bit

ENABLE | ABORT

BREAK

Name

Description

TX.ABORT
(Transmitter
Abort) (R/W)

Set by the host to halt the transfer of data.

I AUTO

If a DMA transfer was in progress, the DMA address and count
registers (TBUFFAD1, TBUFFAD2, and TBUFFCT) will be
updated to reflect the number of characters which have been
transmitted. The transfer can be continued by clearing TX.ABORT,
and then setting TX.DMA.START in TBUFFAD2. No characters
will be lost.
The program must make sure that TX. ABORT is clear before setting
TX.DMA.START. Otherwise the transfer will be aborted before
any characters are transmitted.
If a programmed transfer was in progress, characters in the TX
FIFO will be discarded. Because of firmware delays, it is possible to
transmit a few characters before the abort is actioned. Therefore, the
host cannot determine how many characters have been lost.

When an abort sequence has been cbmpleted, the DHU11 will set
the TX.ACTION bit in the CSR. If the transmitter interrupt is
enabled, the program will be interrupted at the transmit vector.
See Section 3.3.3.1, DMA Transfers, for the use of TX.ABORT.
Cleared by MASTER.RESET.
IAUTO.FLOW
(Incoming Auto
Flow) (R/W)

This is the auto-flow control bit for incoming characters. If this bit is
set, the DHU11 will control incoming characters by transmitting
XON and XOFF codes.
If the RX FIFO becomes congested, the DHUI11 will send an
XOFF code to channels with this bit set. An XON will be sent when
the congestion is reduced. See Section 3.3.6, Auto XON and
XOFF.

3-13

Bit

Name

Description

Cleared by MASTER.RESET.
NOTE

An XON code = 21g = DC1 = CTRL/Q.
An XOFF code = 233 = DC3 = CTRL/S.
No other codes are specified for the interface.
RX.ENA (Receiver
Enable) (R/W)

If this bit is set, this receiver channel is enabled.

If this bit is reset when this DUART channel is assembling a

character, that character may be lost.
Cleared by MASTER.RESET.
BREAK
(Break Control)

(R/W)

If set, this bit forces the transmitter of this channel to the spacing
state.

Transmission is restarted when the bit is cleared.
Cleared by MASTER.RESET.
NOTE

‘There is a short delay between writing the bit and the channel
changing state. The delay is dependent on the amount of DHU11
activity. Because of the normal length of a BREAK signal, this
should not cause problems.

OAUTO
(Outgoing Auto
Flow) (R/W)

This bit is the auto-flow control bit for outgoing characters. When
OAUTO and RX.ENA are both set, the DHU11 will automatically
respond to XON and XOFF codes received from a channel. The
DHU11 uses the TX.ENA bitin TBUFFAD?2 to stop and start the
flow. See Section 3.3.6, Auto XON and XOFF.
Cleared by MASTER.RESET.

FORCE.XOFF
(Force XOFF)

(R/W)

This bit can be set by the program to indicate that this channel is
congested at the host system (for example, if the typeahead buffer is
full). When it sees this bit set, the DHU11 will send an XOFF code.
Until the bit is reset, XOFFs will be sent after every alternate
character received on that channel. When the bit is reset, an XON
will be sent unless IAUTO is set and the RX FIFO is critical. See
Section 3.3.6, Auto XON and XOFF.

Cleared by MASTER.RESET.

3-14

Bit

Name

Description

<7:6>

MAINT
(Maintenance
Mode) (R/W)

These bits can be written by the driver or test programs, in order to
test the channel.
The coding is as follows.
00 =

Normal operation

Automatic echo mode
— Received data is retransmitted
(regardless of the state of TX.ENA) at the data rate
selected for the receiver. The received characters
are processed normally and placed in the RX FIFO.
In this mode, the DHU11 will not transmit any
characters (this includes internally generated flowcontrol characters). The RX.ENA bit must be set

when operating in this mode.

10 =

Local loopback — The DUART channel output is
internally connected to the input. Normal received
data is ignored and the transmit data line is held
marking. In this mode, flow-control characters will
be looped back instead of being transmitted. The
data rate selected for the transmitter is used for both
transmission and reception. The TX.ENA bit still
controls transmission in this mode. RX.ENA is
ignored.

Remote loopback — In this mode received data is
retransmitted at a clock rate equal to the received
clock rate. The data is not placed in the RX FIFO.
The state of TX.ENA is ignored but RX.ENA must
be set.

Cleared to 00 by MASTER.RESET.

LINK.TYPE
(Link Type)

(R/W)

This bit must be set if the channel is to be connected to a modem.
When the bit is set, any change in modem status will be reported via

the RX FIFO as well as the STAT register.

If this bit is reset, this channel becomes a ‘data leads only’ channel.
Modem status information is loaded in the high byte of STAT but is
not placed in the FIFO.
Cleared by MASTER.RESET.

DTR (Data

This bit controls the Data Terminal Ready (DTR) signal to the

Terminal Ready)

(R/W)

Cleared by MASTER.RESET.

3-15

Bit

Name

Description

RTS (Request

This bit controls the Request To Send (RTS) signal to the modem.

to Send) (R/W)

1 =
0 =

ON
OFF

Cleared by MASTER.RESET.

Transmit Buffer Address Register Number 1 (TBUFFADI) -

3.2.2.9

TBUFFAD1 (BASE +12)

OO0

W
|R/W|R/W
R/W[R/
|R/W [R/W|R/W|R/W
W|R/W|
[R"W|R/W
R/W|R/W|R’W|R/W|R/

|l||l|||ll||\1|||
TXMIT DMA ADDRESS
(BITS 0—15)

Bit

<15:0>

Name

Description

TBUFFAD<15:0>

Bits <15:0> of the DMA address (also see Section 3.2.2.10).

Address [Low])

Cleared by MASTER.RESET.

(Transmit Buffer

(R/W)
Transmit Buffer Address Register Number 2 (TBUFFAD?2) -

3.2.2.10

TBUFFAD2 (BASE+14)

R/'W

TXMIT

ENABLE

R/WIR/W
Va

DMA

TXMIT DMA ADDRESS

START

(BITS 17-16)

3-16

Bit
<1:.0>

Name

Description

TBUFFAD<17:16>

Bits <17:16> of the DMA address.

(Transmit Buffer

Address [High])

Before

(R/W)

a DMA transfer, TBUFFAD1

and the low byte of

TBUFFAD?2 are loaded with the start address of the DMA buffer.

This address is not valid during a DMA transfer. When TX.ACTION
is returned, the address will be valid.
Cleared by MASTER.RESET.

TX.DMA.START

Set by the host to start a DMA transfer. The DHU11 will reset the

(Transmit DMA
Start) (R/W)

bit before returning TX.ACTION.

Cleared by MASTER.RESET.
NOTE

After setting this bit, the host must not write to TBUFFCT,
TBUFFADI1, TBUFFAD2 <7:0>, or FIFODATA until the
TX.ACTION report has been returned.
'
15

TX.ENA

When this bit is set, the DHU11 will transmit all characters.

(Transmitter

Enable) (R/W)

When this bit is cleared, the DHU11 will only transmit internally
generated flow-control characters.

In the OAUTO mode, this bit is used by the DHU11 to control
outgoing characters. See Section 3.3.6, Auto XON and XOFF.
Set by MASTER.RESET.

3.2.2.11

Transmit DMA Buffer Counter (TBUFFCT) TBUFFCT (BASE+16)

O00

R'WIR“W|R"W|R/"W|{R/W|R/W|R"W |R/W|R/W|R/W|R"W|R/W |R/W|R/W |R"W|R/W

DMA CHARACTER COUNT

(WHEN VALID, HOLDS NO. OF CHARS. STILL TO BE SENT)
RD1854

3- 17

Bit

Name

Description

<15:0>

TX.CHAR.CT

Loaded with the number of characters to be transferred by DMA.

(Transmit Character

Count) (R/W)

The number of characters is specified as a 16-bit unsigned integer.
After a DMA transfer has been aborted this location will hold the
number of characters still to be transferred.
See also the previous note (Section 3.2.2.10, TX.DMA.START).
Cleared by MASTER.RESET.

3.3 PROGRAMMING FEATURES
3.3.1 Initialization
The DHUI11 is initialized by its on-board firmware.

Initialization takes place after a bus-reset sequence, or when the host sets CSR<5> (MASTER.
RESET).
.
Before starting initialization, the on-board diagnostics run a self-test program. The results of this test are
reported by eight diagnostic bytes in the RX FIFO.
NOTE

This self-test diagnostic can be skipped on
command from the program. This is covered in
Section 3.3.10.3.
The DHUI11 state, after a successful self-test, is as follows.
Eight diagnostic codes are placed in the RX FIFO
The diagnostic fail bit (CSR<13>>) is reset
All channels set for:

LTOBITFRTITERE ML

1.
2.
3.

Send and receive 9 600 bits/s
Eight data bits
One stop bit
No parity
Parity odd
Auto-flow off
RX disabled
TX enabled
No break on line
No loopback
No modem control
DTR and RTS off
DMA character count zero
DMA start address zero
TX.DMA.START cleared
TX.DMA.ABORT cleared
FIFO SIZE set to 100g

3-18

The DHU11 clears the MASTER.RESET bit (CSR<5>) when initialization and self-test are complete.
3.3.2

Configuration

After DHU11 self-initialization, the driver program can configure the module as needed. This is done via

the LPR and LNCTRL registers.

By writing to the associated LPR and LNCTRL, the program can select datarate, character length, parity,
and number of stop bits for each channel. Individual receivers and transmitters can be enabled and autoflow selected.

For operation with any device which uses modem control signals, LINK.TYPE of the associated
LNCTRL register should be set.
3.3.3

Transmitting

Data can be transferred to the serial interface by two methods. Blocks of characters can be transferred
under DMA control, or the host can write one or two characters at a time to the FIFO data register. Such
transfers are covered in the following subsections.

3.3.3.1 DMA Transfers — Before setting up the transfer of a DMA buffer, the program should make
sure that TX.DMA.START is not set. TBUFFCT, TBUFFADI, TBUFFAD?2, and FIFODATA
should not be written unless TX.DMA.START is clear.

Transmission will start when the program sets TX.DMA.START.

The size of the DMA buffer, and its start address, can be written to TBUFFCT, TBUFFADI, and
TBUFFAD?2 in any order. However, TBUFFAD?2 contains TX.ENA and TX.DMA.START, so itis
simpler to writt TBUFFAD2 last. By using byte operations on this register, TX.ENA and
TX.DMA.START can be separated.

The DHU11 will perform the transfer, and set TX.ACTION when it is complete. If TXIE is set, the
program will be interrupted at the transmit vector. Otherwise, TX. ACTION must be polled to detect the
end of the DMA operation.

To abort a DMA transfer, the program must set TX.ABORT. The DHU11 will stop transmission, and
update TBUFFCT, TBUFFADI1, and TBUFFAD2<7:0> to reflect the number of characters which
have been transmitted. TX.DMA.START will be cleared. If the interrupt is enabled, TX.ACTION will
interrupt the program at the transmit vector. Ifthe program clears TX. ABORT and sets TX.DMA.START, the
transfer can be resumed without loss of characters.

If a DMA transfer fails because of a memory error, the transmission will be terminated. TBUFFAD1 and
TBUFFAD?2 will point to the failing location. TBUFFCT will be cleared, and TX.DMA.ERROR and
TX.ACTION will be set. If TXIE is set, the TX interrupt will be raised.

3.3.3.2 Programmed Transfers — Before writing a character or a sequence of characters to the FIFO
data register (FIFODATA), the program should read the FIFO size register (FIFOSIZE) to check that
there is space in the TX FIFO.

If there is space for characters, they can be written as bytes (one character) or words (two characters) to
FIFODATA. After a low-byte write, FIFODATA<7:0> will be transferred to the FIFO. After a word
write, FIFODATA<7:0> and then FIFODATA<15:8> will be transferred to the FIFO. High-byte
writes to FIFODATA are not allowed.

The DHUI11 returns TX.ACTION when the TX FIFO becomes empty. As with DMA transfers, this bit
can be sensed via interrupt or by polling the CSR.

3-19

In programmed-transfer FIFO mode, TX.ACTION is returned when the DHUI11 transfers the last
character from the RX FIFO to the DUART, not when it has been transmitted. Each channel has a twocharacter buffer. Thus, if modem status bits or line parameters are changed immediately after the last
TX.ACTION of a message, the end of the message could be lost. The program can avoid loss by adding
two null characters to the end of each programmed-transfer

FIFO message.

To abort a programmed transfer, the program must set TX.ABORT. The DHU11 will terminate the
transfer and then set TX.ACTION. If TXIE is set, the TX interrupt will be raised. Characters in the TX
FIFO will be discarded. but because of firmware delays the host cannot determine how many characters
have been lost.

3.3.3.3

Methods of Control — Examples of control by polling or by the use of interrupts are given in

Section 3.4, Programming Examples.

3.3.4

Receiving

Received characters, tagged with the channel number and DATA.VALID, are placed in the RX FIFO
buffer (RBUF). Ifa characteris putin an empty RBUF.the DHU11 sets RX.DATA.AVAIL. Itremains
set while there is valid data in there. If RXIE is set, the program will be interrupted at the receive vector.
The program’s interrupt routine should read RBUF until DATA.VALID is reset.
NOTE

Subject to the RX timer, a receive interrupt is
generated when RX.DATA.AVAIL and RXIE
both become set. If the interrupt routine does not
empty the FIFO, RXIE must be toggled to raise
another interrupt.

If RXIE is not set, the program must poll RBUF often enough to prevent data loss.
3.3.5

Interrupt Control

An interrupt priority level of5 or 6 is selected by switches on the module. During an interrupt sequence,

the DHU11 will provide one of two vectors.

1.
2.

A “base’ vector set on the interrupt vector switches
A ‘base + 4’ vector

Subject to the value in RXTIMER (Section 3.2.2.3), the base vector is supplied whenever data is put into
an empty RX FIFO.
The ‘base + 4° vector is supplied when:

A TXFIFO has become empty. This may be because all characters have been transmitted. or
because the program has aborted the transfer.

A complete DMA block has been transferred.

A DMA transfer has been aborted, or terminated due to a memory error.

At the two vectors, the host must provide the addresses of suitable routines to deal with the above
conditions.

3-20

3.3.6

Auto XON and XOFF

XON and XOFF codes are commonly used to control data flow on communications channels. To use this
facility, interfaces must have suitable decoding hardware or software.

A channel which receives an XOFF stops sending characters until it receives an XON. A channel which
is becoming overrun by received data, sends an XOFF. It sends an XON when the congestion is relieved.
If the DHU11 is programmed for automatic flow control (auto-flow), it can automatically regulate the
flow of characters. Three bits control this function:

1.
2.
3.

IAUTO
FORCE.XOFF
OAUTO

—
—

LNCTRL<1I>
LNCTRL<5>
LNCTRL<4>

IAUTO and FORCE.XOFF both control incoming characters. IAUTO is an enable bit which allows the
state of the RX FIFO counters to control the generation of XOFF and XON codes. The FORCE.XOFF
bit is a direct command from the program.

The DHUI11 hardware recognizes when the FIFO is three-quarters full and half full. The
firmware uses these states for auto flow control.

If the program sets a channel’s IAUTO bit, the DHU11 will send that channel an XOFF if it
receives a character after the FIFO becomes three-quarters full. If the channel does not respond
to XOFF, the DHUI11 will send an XOFF in reply to every alternate character received. An
XON will be sent when the FIFO becomes less than half full, unless FORCE.XOFF for that
channel is set. XONs are only sent to channels to which an XOFF has been sent.

By inserting XON and XOFF characters into the data stream, the program can perform flow
control directly. However, if the DHUI11 is in the IAUTO or FORCE.XOFF mode, the
results will be unpredictable.

These internally generated XONs and XOFFs will be transmitted even if TX.ENA is cleared.
2.

When FORCE.XOFTF is set, the DHU11 sends an XOFF and then acts as if IAUTO is set
and the FIFO is critical (was three-quarters full, not yet less than half full). When
FORCE.XOFTF is reset, an XON will be sent unless the FIFO is critical and IAUTO is set
(see 1, IAUTO).

NOTE

Ifboth FORCE.XOFF and IAUTO become clear
after XOFF has been sent, an XON will be sent
immediately.

If the program sets OAUTO, the DHUI11 will automatically respond to XON and XOFF
characters from the channel. It does this by setting and clearing the TX.ENA bit.
The program may also control the TX.ENA bit. In this case it is important to keep track of
received XON and XOFF characters.

3-21

Received XON and XOFF characters will always be reported via the FIFO. It is possible
during read/modify/write operations by the program, for the DHU11 to change the TX.ENA

bit between the read and the write action. For this reason, if DMA transfers are started while
OAUTO is set, it is advisable to write to the low byte of TBUFFAD?2 only.

NOTE
1.

The

DHUIll

may

change

the

state

TX.ENA for up to 20 microseconds after
OAUTO is cleared by the program.
2.

When checking for flow-control characters, the
DHUI11 only checks characters which do not
contain transmission errors. The parity bit is
stripped and the remaining bits are checked
for XON (21g) and XOFF (23g) codes.

3.3.7
Error Indication
The program is informed of transmission and reception errors by means of four bits.
1.
2.
3.
4.

TX.DMA.ERR

—

CSR<12>.

PARITY.ERR
FRAME.ERR
OVERRUN.ERR

—
—
—

RBUF<12>.
RBUF<13>.
RBUF<14>.

See Section 3.2.2.1

See Section 3.2.2.2
See Section 3.2.2.2
See Section 3.2.2.2.

RBUF<14:12> are also used to identify a diagnostic or modem status code.

3.3.8
Modem Control
<
Each channel of the module provides modem control bits for RTS and DTR. Modem status inputs CTS,
DSR, RI, and DCD are also provided on each channel. These bits can be used for modem control or as
general-purpose outputs and inputs (see Section 3.2.2.7, STAT Register).
CTS, DSR and DCD are sampled by PROC?2 every 10 ms, and also when a character is received while
LINK.TYPE (LNCTRL<8>) is set. Therefore, to make sure that a change is detected, these bits must
stay steady for at least 10 ms after a change. Rl is also sampled every 10 ms, but a change is not reported
unless the new state is held for three consecutive samples. There are no hardware controls between the
modem control logic and the receiver and transmitter logic. Any coordination should be done under
program control. Modem-status-change reports are placed in the RX FIFO at the correct position relative
to the received characters.
By setting LINK. TYPE (LNCTRL<8>), a channel can be selected for modem operation. Any change of

the modem status inputs will be reported to the program via the RX FIFO. Modem control bits must be
driven by the program’s communication routines. Control bits are written to the LNCTRL register.

Appendix B gives more detail of modem control.

3-22

By clearing LINK.TYPE the channel is selected as a ‘data lines only’ channel. Modem control and status
bits can still be managed by the program, but status bits must be polled at the line status register. Changes
of modem status will not be reported to the program.
NOTE

When transmitting by the programmed transfer
method, up to two characters can be buffered in
DHU11 hardware. If modem control bits are to be
changed at the end of a transmission, two null
characters should be added. When TX.ACTION
is set after the second null character, the last
genuine character has left the UART.

Status change reporting is done via the RX FIFO as follows.

3.3.9

When OVERRUN.ERR,

FRAME.ERR, and PARITY.ERR are all set, the eight low-order

bits contain either status change or diagnostic information. In this case:

IfRBUF<0> = 0, RBUF<7:1> hold STAT<15:9> (see Section 3.2.2.7).

IfRBUF<0> = 1, RBUF<7:1> hold diagnostic information (see Section 3.3.10).

Maintenance Programming

As well as using on-board and external diagnostic programs, the LNCTRL register allows each channel to
be configured in normal, automatic-echo, local-loopback, and remote-loopback modes (see Section
3.2.2.8, LNCTRL).
3.3.10

Diagnostic Codes

3.3.10.1 Self-Test Diagnostic Codes — After bus reset or master reset, the DHU11 executes a self-test
and initialization sequence. At the end of the sequence, eight diagnostic codes are put in the RX FIFO.
RX.DATA.AVAIL is set and MASTER.RESET is cleared.

After an error-free test, DIAG.FAIL will be reset. The ‘diagnostic passed’ LED will be on. If an error is
detected, DIAG.FAIL will be set and the LED will be off.

An example program which reads and checks the diagnostic codes from RBUF is included in Section
3.4.1.

3.3.10.2 Interpretation of Self-Test Codes— All self-test codes in RBUF will have the top four bits set.
Bits <11:8> indicate the sequence of the diagnostic byte. That is to say, O = first byte, 1 = second byte,
and so on.

Figure 3-2 shows how the diagnostic code in the low byte of RBUF should be interpreted. Table 3-3 gives
the meaning of each implemented diagnostic byte.

3-23

DIAGNOSTIC STATUS BYTE

O = MODEM STATUS CODE
1 = DIAGNOSTIC CODE

—» 0 = PROC1 SPECIFIC ERRORS IN D4-D2

—» 1 = PROC2 SPECIFIC ERRORS IN D4—-D2
IF D7 =1, THEN:

— 0 = ERROR CODES IN D4—Dt1
— 1 = DEFECTIVE CHANNEL NUMBER IN D4—D1
IF D7 =1, THEN:

—— 0 = SELF-TEST CODE IN D5~ D1
—— 1 = BMP CODE IN D5—D1

———» 0 = ROM VERSION IN D6—D2, D1 IS THE PROC No.
——— 1 = DIAGNOSTIC CODE IN D6—D2, D1 IS THE PROC NUMBER
RD1B24

Figure 3-2

Table 3-3

Diagnostic/Status Byte

DHUI11 Self Test Error Codes

Code
(Octal)

Test

201
203
205
207
211
213
215
217
225
227
231
233

“Self-test null code (used as a filler)
Self-test skipped
Interprocessor link error detected by PROCI
Interprocessor link error detected by PROC2
Basic data-path error from PROC2
Undefined UART error
Transmit-character-FIFO logic error
Received-character-FIFO logic error
PROCI1 to common RAM error
PROC2 to common RAM error
PROCI internal RAM error
PROC?2 internal RAM error

235
237

PROC1 ROM CRC error
PROC2 ROM CRC error

The odd numbers from 241g to 277g indicate
indicated by D4 to D1.

a UART access or function error on the channel

If D7 = 0, the ROM version number is in D6 to D2.
D1 = PROC number (0 = PROCI1, 1 = PROC2)

NOTE
Codes not shown in this table indicate undefined
errors.

3-24

After self-test, the eight codes in the RX FIFO will consist of six diagnostic codes and two ROM version
codes.

After an error-free test, six 201 codes and two ROM version codes will be returned.

If self-test is skipped (see next section), six 203 codes and two ROM version codes will be returned.
3.3.10.3 Skipping Self-Test — Self-test takes up to 2.5 seconds to complete. Depending on system
software, this may cause a 2.5 second hang-up. The ‘skip self-test’ facility allows the program to bypass
the self-test diagnostic.

There are two methods of skipping self-test.

e
e

DHVI11 compatible method
DHUI11 (direct) method

The DHV11 compatible method is as follows.
1.

The program resets the DHUI11.

The diagnostic firmware writes 125252g throughout the common RAM within eight
milliseconds of reset.

The program waits 10 ms (+ or — 1 ms) after issuing reset. It then writes 052525g throughout
the control registers (LPR, LNCTRL, TBUFFADI1, TBUFFAD2, and TBUFFCT) for lines
0 to 7, within the next 4 ms.

The diagnostic firmware waits until 16 ms after reset. It then checks for a 052525g code in
common RAM.

If it finds the code, self-test is skipped. The DIAG.FAIL bit is cleared and control is passed to

the communications firmware which begins initialization.
If the code is not found, self-test begins.
NOTE

The program must not write to the CSR or the
control registers during the period starting 15 ms
after reset and ending when the MASTER.RESET
bit is cleared. This could cause a diagnostic fail
condition.

The direct method is to set SKIP (CSR bit4) and MASTER.RESET (CSR bit 5) at the same time. That is
to say, write 60g to the base CSR. SKIP must not be cleared until at least 20 microseconds after it is set.
SKIP must be cleared by the host to enable the communications firmware to complete the master reset
sequence.

3.3.10.4 Background Monitor Program (BMP) - When not busy with other tasks, the DHU11’s
microcomputers perform background tests on the option. This is done by checking the timer-generated
interrupts used by the firmware (one interrupt in PROC]1 and two in PROC2). One of two codes is loaded
into the RX FIFO.

e
°

305¢
307¢

—

DHUII running
DHUI11 defective
3-25

A single diagnostic word is feturned via the FIFO. The low byte contains the diagnostic code. In the high

byte OVERRUN.ERR, FRAME.ERR, and PARITY.ERR are all set to indicate that bits<7:0> do not
hold a normal character. The line number (RBUF<11:8>) =0

If PROC2 stops running, PROC1 will set DIAG.FAIL and will turn off the LED. The LED will stay off,
even if the fault clears. If PROCI stops running, PROC2 will load a 307 code into the FIFO.
Normally, the BMP will only report when it finds an error. However, if the host suspects that the DHU11
is dead, it can obtain a BMP report at any time. This is done by setting DIAG (LPR <2:1>) of any
channel, to O1. The line number returned is that of the LPR used to request the report.
On completion of the check, the BMP will clear the 01 code in DIAG. The host should not write to the
LPR of that channel until DIAG has been cleared.

NOTE
If an error clears and then recurs, the BMP error
code will be placed in the RX FIFO each time the
€rror occurs.

3.4
PROGRAMMING EXAMPLES
This section contains programming examples. They are not presented as the only method of dr1v1ng the
option. These programs are not guaranteed or supported.

3.4.1
Resetting the DHU11
In the following example:
DIAG is a routine to check the diagnostic codes. It returns with CARRY set if it detects an
error code (see Section 3.3.10).

Theloop at 1$ can take up to 2.5 seconds, so the programmer could poll via a timer or poll at
interrupt level zero.

“e

CORRECTLY.

ROUTINE

RESET

THE

DHUll

AND

CHECK

THAT

FUNCTIONING

;

SET

CLEAR

#40,Q#DHUCSR
1$

BIT

#20000,@#DHUCSR

BNE

DIAGER

M
N

BIT.

MASTER.RESET

CLEAR.
CHECK THE
NOTE: TEST

FOR

AND
ENABLES.

WAIT

INTERRUPT

BIT
BNE

MASTER.RESET

SET

PENDING.
COUNT

GET

DIAGNOSTIC

INSTRUCTION

#8.,R5

MOV

@Q#RBUFF,R0

JSR

PC,DIAG

BCS

DIAGER

PROCESS IT.
CARRY SET AN

THERE

ARE

2$:

MOV

TX.ACTS

FAIL

BECAUSE

DIAGNOSTICS

1$:

#40,@#DHUCSR

MOV

DHURES:
:

3-26

ERROR.

MUST

CODE.

HAVE

BEEN

SOB

RS5,2$

’

RTS

’

RETURN

BACK

FOR

CARD

CODE.

RESET.

DHUl1l

THE

HAS

FAILED

SERVICE

RESET

PROPERLY,

HALT

AND WAIT

FOR

ENGINEER.

FIELD

DIAGER:

HALT
BR

DIAGER

Shwh
-

3.4.2 Configuration
This routine sets the characteristics of channel 1 as follows.
Transmit and receive at 300 bits/s
Seven data bits with even parity and one stop bit
Transmitters and receivers enabled
No modem control
No automatic flow control.

#2 00,@#TBFAD2+1

RTS

3.4.3
3.4.3.1

MOVB

#4 + @#LNCTRL

MOV

#0 52560,@#LPR

DATA

MOV

LOAD
WITH

PARITY

AND

WMs

#1 @ DHUCSR

ENABLE

THE

RECEIVER.

MOV

ENABLE

THE

TRANSMITTER.

SETUP::

INDEX

CHANNEL

REG

RATE,

RETURN

NO,

STOP

BITS,

LENGTH

CHANNEL

DONE.

Transmitting
Programmed Transfer — The following is a program to send a message on channel 1.

The CSR is polled for TX Action reports, but a TX.ACTION interrupt could also be used.

MODE

ROUTINE

WRITE

(PROGRAMM ED

MESSAGE

CHANNEL

USING

FIFO

OUTPUT

TRANSFERS)
.

Wme

This program functions on a DHUI11 with only this channel active. If other channels were active, this
program would lose TX Action reports for them. A program to control all channels would be too big to use
as an example.

W
wms
We

#MESIZE,R1

POINT

®e

#MESS,
R0

MOV

PUT

MOV

POINT

CHECK

#1,@#DHUCSR

THE

MOV

MOVE

FIFOUT::

TALK

CHANNEL

WISH

SPACE

TO.

MESSAGE.

COUNT

1$:
TSTB
BEQ

@#FIFOSIZE

MOVB

(RO)+,@#FIFODATA

S0OB

R1,1$

3-27

THAT

THERE

FIFO.

CHARACTER

BACK

FOR

TRANSMIT
CHARACTER.

FIFO

2$:

@#DHUCSR,R2
2%

;

WAIT FOR TX.ACT

BPL

BIC

#170377,R2

;

ISOLATE CHANNEL NUMBER.

CMP

#000409,R2

MOV

IGNORE THE TX.ACT IF ITS

;
;

NOT OURS

RTS

pPC

MESSAGE

MESS:

.ASCII

MESIZE

.~MESS

BNE

TRANSMIT

FIFO

MESSAGE

(SHOULDN'T

HAPPEN)

SENT.

FOR CHANNEL

« EVEN

DMA Transfer —

THIS

PROGRAM

SENDS

A MESSAGE

OUT

EACH

LINE

THE

DHUll

AND

HALTS THE MACHINE WHEN ALL TRANSMISSIONS HAVE COMPLETED.

THE MESSAGES ARE TRANSMITTED USING DMA MODE,
USED TO SIGNAL TRANSMISSION COMPLETION.

AND

INTERRUPTS

ARE

WNe

WME

WMo

3.4.3.2

DMAINT:
:

$#TXINT,@#TXVECT

;

$#240,Q#TXPSW

;

SET

MOV

#16.,R0
R1

;
;

SIXTEEN LINES TO START.
START AT LINE ZERO.

R1,@#DHUCSR
#DMASIZ ,@#TBFCNT
#DMAMES ,@#TBFAD1

;
;
;

SELECT THE REGISTER BANK.
SET LENGTH OF MESSAGE.
SET LOWER 16 ADDRESS BITS.

MOV

CLR

1$:
MOVB
MOV
MOV
MOV

;

#100200,@#TBFAD2

;

UP THE

INTERRUPT VECTORS.

INTERRUPT PRIORITY FIVE,

START DMA WITH TRANSMITTER
ENABLED

(ASSUME

BITS

R1
RO,1$

;
;:

POINT TO NEXT CHANNEL.
REPEAT FOR ALL LINES.

R5
#100,08#DHUCSR+1

;
;

R5 IS USED BY INTERRUPT ROUTINE.
ENABLE TRANSMITTER INTERRUPTS.

CMP

#16.,R5

;

WAIT FOR ALL

LINES TO FINISH.

BNE

23
;

ALL

STOP.

INC
SOB
CLR
MOVB

2$:

HALT

DONE,

ZERQ).

TRANSMITTER

INTERRUPT

ROUTINE.

INCREMENTED

EACH

LINE

@#DHUCSR,R9
#100000,R0
43,

;
;
;

COMPLETES.

“we

ARE

UPPER ADDRESS

;

TXINT::
MOV

BIT
BEQ

GET LINE NUMBER OF FINISHED LINE.
CHECK FOR (ANOTHER) TX.ACTION.
IF NOT, GO RETURN AND WAIT.

3-28

BIT

#010000,R0

BNE

INC

TXINT

CHECK FOR
GO HALT -

DMA FAILURE.
MEMORY PROBLEM.

FLAG

ANOTHER

THAT

LINE

HAS

FINISHED.

RTI

5$:

DMAMES:

MEMORY

HALT

PROBLEM

.ASCII

<15><12><7><7><7>/SYSTEM

DMASIZ

CLOSING

DOWN

NOW/

. -DMAMES
. EVEN

Aborting a Transmission —

THIS

PROGRESS

3.4.3.3

ROUTINE

ASSUMPTION

IS
A

CALLED

SPECIFIED

TRANSMISSION

THIS

THERE

ARE

OTHER

CONTAINS

THE

NUMBER

(EITHER

THE

FIFO)

(RATHER

DMA

RASH)

ROUTINE

MAKES

TRANSFERS

PROGRESS.

ENTRY,

THE

LINE

ABORTED.

THAT

ABORT

LINE.

MOV

@#DHUCSR,R1

BPL

SWAB

BIC

#177769,R1

CMP

RO,R1

BNE

weo

#1,@#LNCTRL

POINT

RO, @#DHUCSR

BIS

SET

-e

MOV

WAIT

TXABRT::

CHECK

ITS

OUR

THE

CHANNEL

TRANSMIT

ABORT

ABORTED.

BIT.

1$:

“e

IGNORE

“e

ASSUMPTION

CLEAR

FOR

BUFFER

pPC

LINE.

IF
DMA

REGISTERS

REFLECT

THE

DHUll

GOT

DOWN

ITS

NOT

(OUR

WAS

WRONG!)

THE

ABORT

FLAG

TIME.

COMPLETELY

DMA

WAS

HAD

ABORTED,

PROGRESS,

THE

WHERE

TO.

Receiving

THIS

OFF.

3.4.4

TX.ACT

RTS

THE

#1,@#LNCTRL

BIC

FOR

ROUTINE

OTHER

XOFF
IF

PROCESSES

RECEIVED

RECEIVED,

XON

RECEIVED,

ARE

CHARACTERS

TRANSMITTER

THE

UNDER

FOR

TRANSMITTER

THAT

INTERRUPT

CHANNEL

TURNED

BACK

CONTROL.

TURNED

ON.

ALL

IGNORED.

USE

THE

JUST

EXAMPLE,

AUTOMATIC

BETTER

CAPABILITIES

WAY

THE

DHUll.

PERFORM

FLOW

CONTROL

THIS

CHARACTERS

THE

#RXINT,@#RXVECT

MOV

#240,@#RXPSW

3-29

TMo

MOV

SET

RXAUTO:
:
PRIORITY

THE

INTERRUPT

LEVEL

FIVE,

VECTORS.

MOV

$#16.,R0

CLR

R1l

MOVB

R1,@#DHUCSR

BIS

ENABLE ALL THE RECEIVERS,
STARTING AT CHANNEL ZERO,

SELECT THE LINE.
ENABLE THIS RECEIVER.
SET POINTER TO NEXT CHANNEL.

15:

SELECT

;

SET

#100,@#DHUCSR

;

ENABLE

THE

;

RETURN

S0OB

RG,1$

MOVB

MOV

#0,@#DHUCSR
#20.,04#RXTIMR

MOVB
RTS

CHANNEL

DELAY

ZERO.

20MS.

RECEIVER

INTERRUPTS

INTERRUPTS.
DO THE

RESET.

INTERRUPT

ROUTINE

THE

MAIN

TASK.

T I

T )

INC

$4,@#LNCTRL
R1

MOV

R@,
- (SP)

SAVE

MOV

@#RBUFF,
R0

GET

BPL

RXIEND

RXINT::

MOV

R@,
- (SP)

REGISTERS.

CALLERS

BIC

+
7,
(SP)
#10777

DIAGNOSTICS

BNE

RXNXTC
#170200,R0

SWAB

TM8

BIC

CHARACTER.

Wme

THE

IF NO
CHECK

RXNXTC:

$100,R0

R@,@#DHUCSR

“s

BIS

MOVB

DATA VALID,
FOR ERRORS,

JUST

WE'VE FINISHED.
MODEM AND

CODES.

IGNORE

THEM

(BAD

PRACTICE).

REMOVE

UNNECESSARY BITS.
POINT TO THIS CHARACTERS LINE.
(ADD THE INTERRUPT ENABLE BIT.)

PUT
WAS

CHARACTER BACK
IT AN "XON"?

LOWER

BYTE.

SWAB

CMPB

#21,R0

BNE

NO - GO CHECK FOR AN

BISB

#200,Q#TBFAD2+1

RXNXTC

ENABLE THE TRANSMITTER.
GO CHECK FOR MORE CHARACTERS.

1$:
CMPB

$23,R0

BNE

RXNXTC

"XOFF"

WAS IT AN "XOFF"?
NO - GO CHECK FOR MORE

BICB

#200,@#TBFAD2+1

RXNXTC

MOV

(SP)+,R0

RESTORE

DISABLE

CHECK

THE

CHARACTERS.

TRANSMITTER.

FOR

CHARACTERS,

RXIEND:

THE

DESTROYED

RTI

Auto XON and XOFF

THIS PROGRAM SENDS A MESSAGE OUT ON EACH
HALTS THE MACHINE WHEN ALL TRANSMISSIONS

LINE
HAVE

OF THE DHUll
COMPLETED.

AND

THE MESSAGES ARE TRANSMITTED USING DMA MODE,
USED TO SIGNAL TRANSMISSION COMPLETION.

AND

INTERRUPTS ARE

AUTOMATIC

FLOW CONTROL

ENABLED

WMo

WMy

3.4.5

3-30

THE

OUTGOING

DATA.

MOVB

R1,@#DHUCSR

BIS

#24,Q@#LNCTRL

$#16.,R0O

CLR

INTERRUPT

“e

MOV

SET

SIXTEEN

#240,Q#TXPSW

START

#ATOINT,@#TXVECT

MOV

SELECT

THE

MOV

ENABLE

AUTOMATIC

TXAUTO:
:

THE

INTERRUPT

TRANSMITTED

PRIORITY

LINES

LINE

VECTORS.

FIVE.

START.

ZERO.

#100200,Q#TBFAD2

MOV

SET

LENGTH

#AUTOMS, @#TBFAD1

SET

LOWER

#AUTOSZ ,@#TBFCNT

MOV

START

WNe

#16.,R5

BNE

CMP

POINT
REPEAT
R5

ENABLE
WAIT

FOR

ALL

LINES

ALL

DONE,

STOP.

UPPER

:
$100,Q@#DHUCSR+1

BITS.

TRANSMITTER

WITH

CLR

MOVB

MESSAGE.

-e

R@,1$

DMA

CONTROL

DATA.

ADDRESS

-e

INC

SOB

BANK.

FLOW

ENABLED (ASSUME
BITS ARE ZERO).

MOV

THE

ADDRESS

CHANNEL.

FOR

ALL

LINES.

USED

INTERRUPT

TRANSMITTER

ROUTINE,

INTERRUPTS.

28
TO

FINISH.

3%
HALT

TRANSMITTER

INTERRUPT

ROUTINE.

INCREMENTED

EACH

LINE

COMPLETES.

28
#10000,R0
43

CHECK
GO

BIT

BNE

GET

LINE

RETURN

NUMBER

FOR

FLAG

MEMORY

PROBLEM

AUTOMS:

.AS CITI

<15><12><7><7><7>/SYSTEM

CLOSING

AUTOSZ

.-AUTOMS

ATOINT

FOR

LINE.

TX.ACTIONS.

FAILURE.

CHECK

THAT

DMA

FINISHED

MEMORY

TMo

HALT

-e

INC

@#DHUCSR,
R0

BPL

MOV

ATOINT:
:

PROBLEM,

ANOTHER

LINE

HAS

FINISHED.

TX.ACTIONS.

2$:
RTI

43:
HAL T

DOWN

NOW/

.EV EN

Checking Diagnostic Codes

THIS

ROUTINE

CHECKS

THE

DIAGNOSTICS

CODES

RETURNED

FROM

THE

DHUll.

ENTRY,

EXIT,

THE

CONTAINS

THE

CHARACTER

RECEIVED

FROM

THE

DHUll.

SUCCESS,

SET

FOR

CARRY

BIT

WILL

CLEAR

WMo

3.4.6

3-31

FOR

FAILURE.

DIAG::

MOV

RO, -~ (SP)

;

SAVE THE CODE

BIC

#107776,R0

;

CHECK THAT

CMP

#070001,R0

FOR

LATER.

IT'S A DIAG.

BNE

DIAGEX

;

IF NOT,

MOV

(SP) ,R0

;

GET THE CODE

BITB

$#200,R0

;

CHECK FOR ROM VERSION NUMBER.

BEQ

DIAGEX

;

SELF TEST NULL CODE.

;

SELF TEST SKIPPED CODE.

;

DHU RUNNING CODE.

;

ALL THE

;
;

AN ERROR CODE WAS RECEIVED,
SET THE CARRY FLAG.

;

EVERYTHING OK,

;

RESTORE THE CHARACTER/INFO.

CMPB

#201,R0O

BEQ

DIAGEX

CMPB

#203,R0

BEQ

DIAGEX

CMPB

#305,R0

BEQ

DIAGEX

SEC
BR

DIAGXX

JUST

CODE.

EXIT NORMALLY.
BACK.

REST ARE

ERROR CODES.

DIAGEX:

CLC
DIAGXX:

(SP)+,R0O

RTS

Modem Control

THIS

ROUTINE WILL ANSWER A MODEM CALL,

WMs

4.7

MOV

SO CLEAR CARRY.

HANG

PRINT OUT A MESSAGE AND

PHONE.

FIFO OUTPUT MODE WERE USED, THEN
BE PADDED OUT WITH TWO NULLS DUE

INTERNAL

THE

BUFFERING

THE
TO

DHU1ll.

Wme
Wms

DMA MODE IS USED.
1IF
MESSAGE WOULD NEED TO

THE

MODEM:
:

MOV

#16.,R0

CLR

;

SET

MOVB
MOVB
MOV
INC
SOB
MOV
MOV

UP ALL CHANNELS

FOR MODEMS.

R1,@#DHUCSR
#125,Q4#LPR+1
#400,Q4#LNCTRL
R1
RO, 1%

;
;
;
;
;

POINT TO CHANNEL TO BE SET UP.
300 BPS DATA RATE,
SET MODEM
DISABLE RECEIVER.
POINT TO NEXT CHANNEL,
SET UP ALL CHANNELS.

#MRXINT,@#RXVECT
#240,8#RXPSW

;
:

SET UP INTERRUPT
(INTERRUPT LEVEL

2$:

MOV

#MTXINT,@#TXVECT

MOV

#240,Q#TXPSW

MOV

#40100,@#DHUCSR

;

ENABLE

238

;

LET

THE

W
wme

INTERRUPT

ROUTINE.

TRANSMITTER

3-32

INTERRUPTS.

INTERRUPT

EVERYTHING

VECTORS.
FIVE)

ROUTINES

MOV

R@,-(SP)

SAVE
GET

@#DHUCSR,
RO

BPL

SWAB

$100,R0
R@,Q@#DHUCSR

MOVB
BR

#400,@#LNCTRL
1$

MOV

(SP)+,R0

MOV

INTERRUPTING

(RETAIN
DROP

DTR,

RTS

CHECK

FOR

;

RESTORE

USE,.

LINE

INTERRUPT

#177769,R0

BIS

BIC

THE

GO RETURN IF NO MORE
SELECT THIS CHANNELS

-e

MOV

;

1$:

“s

MTXINT:

NUMBER.

TX.ACTIONS.
REGISTERS.

ENABLE)

AND

CLEAR

ABORT.

TX.ACTIONS.

23
THE

USED.

RECEIVER

INTERRUPT

ROUTINE.

TMo

RTI

SAVE

GET

EXIT

SAVE

TEST

WTM

R@,-(SP)

SKIP

-y

MOV

SELECT

-e

MRXINT::

(RETAIN

THE

USE.

MRXLOP:

#070000,R0

BNE

MRXNXT

MOV

(SP) ,RD

SWAB

BIC

#177760,R0

BIS

#100,R0

MOVB

RO ,@#DHUCSR

MOV

(SP) ,R®

BIC

#177547,R0

CMP
BNE

#230,R0
1$

BIC

#1,@#LNCTRL

#23,@#LNCTRL+1

FOR

LATER

USE.

FOR

MODEM

INFO.

CHECK

DSR,
CLEAR

SET

DONE,

NOT.
REGISTERS

INTERRUPT

FOR

DCD

READY

CTS

DOWN

FOR

NOT

WITHOUT

SET,

(IN

DMA

(TRANSMITTER

INTERRUPT

CLEARS

DOWN

THE

FOR

MORE.

MOV

$100200,@4TBFAD2

MRXNXT

BIT

#200,R0

BEQ

MOVB

#23,@#LNCTRL+1

MRXNXT

#NOSYSZ,@4#TBFCNT

¥NOSYS,@#TBFAD1

CASE

ASSERTED

TRY

BIT

OUTPUT

MOV

TRANSMISSION.

ASSERT

MOV

RTS

LINE,

ENABLE)

FOR

ABORT

THIS

WERE

®P

MOVB

CMP

#107776,R0

R@,-(SP)

BIC

ALL

LINE.

MOV

INTERRUPTING

MRXEND

WNe

@#RBUFF,
R0

BPL

MOV

CTS

THE

START.

CASE

PROGRESS).
AND

SAME

DSR
TIME.

MESSAGE.

LOOK

ROUTINE

CALL.)

CHECK

Wme

ASSERT

CHECK

wme

“e

ASSERT

wme

ABORT

ANY

DROP

MODEM

FOR
GO

DSR.

CHECK

FOR

NEW

CALL.

RTS.

LOOK

FOR

MORE,

23
BIT

#40, (SP)

BEQ

MOVB

#3,@#LNCTRL+1

MRXNXT

BISB

#1,@#LNCTRL

MOVB

#1,@#LNCTRL+1

FOR
GO

INDICATOR.
CALL.

DTR.

LOOK

3-33

RING

CLOSEDOWN

FOR MORE.
CURRENT

DMA

SIGNALS.

TRANSFERS.

MRXNXT
:

+
(SP)

MRXLOP

MOV

(SP)+,R0

REMOVE SIGNALS FROM THE STACK.
e

TST

GO ROUND AGAIN.

MRXEND:
’

RESTORE

THE

USED.

RTI

NOSYS:

+ASCII

<15><12><7><7><7>/SYSTEM
. ~NOSYS

NOSYSZ

.EVEN

3-34

UNAVAILABLE,

PLEASE TRY

LATER/

CHAPTER 4
MAINTENANCE

4.1

SCOPE

4.2

MAINTENANCE STRATEGY

This chapter explains the maintenance strategy and how the diagnostic programs are used to find a
defective field replaceable unit (FRU). The description is supplemented by troubleshooting flowcharts.

4.2.1

Preventive Maintenance

No preventive maintenance is planned for this option. However, if the host system is being serviced, a
visual check should be made for loose connectors and damaged cables.

4.2.2

Corrective Maintenance

The M3105 module, BCO5L-xx cables, and distribution panels are all FRUs. Corrective maintenance is
therefore based on finding and replacing the defective FRU. However, if the fault is not in the option, it
may be possible to perform tests of external equipment. Figure 4-1 can be used as a basis for

troubleshooting.

Flowcharts 4-2 and 4-4 provide recommended test sequences for PDP-11 and VAX systems

respectively.

4.3

INTERNAL DIAGNOSTICS

Internal diagnostics run without intervention from the operator. There are two tests, called self-test and

background monitor program.
4.3.1

Self-Test

This test starts immediately after bus or device reset. It checks the internally accessible parts of the
DHU11 and gives a GO/NOGO indication via the CSR<DIAG.FAIL> bit and the ‘diagnostics passed’
LED. Self-test also reports error or status information to the host via the RX FIFO. This information is
used by system-based diagnostics.

During a successful (no defects) self-test, the LED flashes OFF/ON/OFF before coming ON
permanently. The first OFF period is very short and may not be seen. However, if the LED goes OFF and
then comes ON permanently, the diagnostic has found no faults. If self-test is skipped (see Chapter 3,
Section 3.3.10.3), the LED will flash OFF and then come ON permanently.

Because of the limitations of self-test, a correct sequence does not guarantee that all sections of the module
are good.

4-1

STAGGERED
LOOPBACK

TEST

CONNECTIONS

NOTE:
STAGGERED LOOPBACK
CONNECTORS ARE NOT
POLARIZED
BCO5L-xx CABLES CAN
BE INSTALLED EITHER
WAY ARCUND IN J10/J11

————

J2
OR

——
———

—__

NORMAL

CONNECTIONS

—

C— H325

c——

——;

—

M3105

]
S—

H3029

BCO5L-XX
CABLES

MODEM 0 MODEM

=¢

ZESMINAL

RD1743

Figure 4-1

Troubleshooting Connection Diagram

4-2

4.3.2 Background Monitor Program (BMP)

The BMP performs limited tests of the DHU11 when the option is not engaged in other tasks. If it detects
an error, the BMP reports to the host via the RX FIFO. It also switches off the ‘diagnostics passed’ LED.

By writing codes to the LPR, the host can cause the BMP to report the DHU11 status even if an error has
not been detected. It is used if the host suspects that the DHU11 is defective.
NOTE

A full description of self-test and BMP diagnostic
codes is provided in Chapter 3, Section 3.3.10.
4.4

XXDP+ DIAGNOSTICS

In order to run these diagnostics, the host PDP-11 system must have at least the minimum configuration
specified. Loopback connectors will be needed for some of the tests. For more information, refer to the
program documentation at the beginning of the ZDHU??, ZDHV??, ZDHW??, and ZDHX?? listings.
44.1

ZDHU??, ZDHV??, ZDHW??, and ZDHX??

These programs form a functional verification test (FVT) which runs on UNIBUS members of the
PDP-11 processor family. The test runs under the PDP-11 Diagnostic Supervisor.
The minimum system requirements are:
UNIBUS CPU
32K bytes memory
Console terminal
XXDP+ load device with Diagnostic Runtime Services
DHUI11 option.
.

In order to test the full DMA address capability of the DHU1 1, the diagnostic uses the following address
patterns. If the high address lines are to be tested, the host must have memory at the following locations as
well as the 32K bytes defined in the previous paragraph.

Address bits
Memory address

(High bank)

Memory address
(Low bank)

If memory is not available at these locations, some high DMA address bits will not be tested. This will not
be considered as an error. The operator, by answering a prompt, can display information specifying the
bits which were tested.

The ZDHU?? diagnostic has no loopback mode. ZDHV??, ZDHW??, and ZDHX?? function in the
following modes.

1.
2.
3.

Internal loopback
Staggered loopback
External (H325) loopback

4-3

In addition to the above, ZDHX?? has two extra modes.

4,
5.

Modem loopback
Keyboard echo

In modem-loopback mode the modem must be set up manually. The diagnostic will test to where the line is
looped back.
In keyboard-echo mode, received data is retransmitted. This allows the input from a terminal keyboard to
be displayed on a terminal. Modem control signals are permanently set so that modem links can also be
tested.

Each mode can be selected by answering a prompt from the diagnostic program. Example printouts,
together with a summary of the use of the diagnostic supervisor, are provided in Section 4.5.
A troubleshooting flowchart is provided in Figure 4-2.
4.4.1.1
Functions of ZDHU?? - This program checks the reset, skip self-test, and the register-access
functions. It checks the TX-enable function, bus requests, and interrupts. CSR and RXFIFO reports from
the self-test and BMP are also checked. Loopback connectors are not needed for this test.

4.4.1.2 Functions of ZDHV?? - This program checks the operation of the RX-interrupt timer and the

register bits which control the flow of data and the operation of the FIFOs. A staggered loopback
connector is needed for some of these tests.

4.4.1.3 Functions of ZDHW?? - This program verifies the correct operation of the modem controland-status lines, and checks that there is no unwanted interaction between them. The tests will only run if
one of the external loopback modes is selected.
4.4.1.4 Functions of ZDHX?? - This program checks DMA transfers and addressing, split-speed
operation, and the reporting of data errors. Modem loopback and keyboard echo tests can be selected.
ZDHX?? performs extensive data-transfer checks. One of the external loopback modes should be
selected.

NOTE
Each of these diagnostics verifies that the handshake between the DHUI11 and the host is operating
correctly.

44.2
DECX/11 Exerciser
When a DHU11 or other option is installed or replaced, it is necessary to run the DECX/11 exerciser
XDHU??. The exerciser must first be configured to match the host system. For more information, refer to
the DECX/11 User Manual (AC-FO35B-MC) and DECX/11 Cross-Reference (AC-FO55C-MC).

DECX/11 should not be run until all modules have passed their own diagnostic tests. Therefore, before
running the exerciser, the DHU11 must pass all phases of the FVT.

4-4

4.5

PDP-11 DIAGNOSTIC SERVICES SUMMARY

The FVT diagnostics have been written for use with the Diagnostic Runtime Services. DRS provides the
interface between the operator and the diagnostic programs. By answering parameter questions when
prompted, the operator can define the following.

1.
2.

The hardware configuration of the DHU11s being tested
The type of test information to be reported

The conditions under which the test should be terminated or continued.
Loading the Diagnostic

4.5.1

The diagnostic program may be loaded and started in the normal way, using any of the supported load
systems. For example, using XXDP+, the program ZDHV??.BIN is loaded and started by typing
R ZDHV??.

The diagnostic and the DRS will be loaded and the program started. The program types the following
message.

DRS LOADED
DIAG.RUN-TIME SERVICES

CZDHV-B-0
DHU11
FUNCTIONAL VERIFICATION TEST
UNIT IS DHU11
RESTART ADDRESS xxxxxx
DR>

DR>> is the prompt from the DRS. At this point a DRS command must be entered (supervisor commands
are listed in Section 4.5.3).

BO on the end of CZDHYV indicates the revision level (B) and the patch level (0).
Four Steps to Run a DRS Diagnostic

4.5.2
1.

Enter the start command.

When the prompt DR> is issued, type:

STA/PASS:1/FLAGS:HOE
The switches and flags are optional.

Answer the hardware parameter questions.
The program prompts with:

CHANGE HW?

You must answer Y to this query if you want to change the hardware parameter tables. The
program will then ask a number of hardware parameter questions in sequence. For example, the
first question is:

# UNITS?

At this point, enter the number of units to be tested.
NOTE

Some versions of the DRS do not ask the
CHANGE HW? question at the first start
command. Instead they go straight into the
hardware parameter question sequence.

The answers to the questions are used to build hardware parameter tables (P-tables) in
memory. A series of questions is posed for each device to be tested. A hardware P-table is built
for each device.
Answer the software parameter questions.

When all the hardware P-tables are built the program responds with:
CHANGE SW?

If other than default parameters are wanted for the software, type Y. If the default parameters
are wanted, type N.

If you type Y, a series of software questions will be asked and the answers to these will be
entered into the software P-table in memory. The software questions will be asked only once,
regardless of the number of units to be tested.
Diagnostic execution

After the software questions have been answered, the diagnostic starts to run.

What happens next is determined by the switch options selected with the start command, or
errors occurring during execution of the diagnostic.

4.5.3
DRS Commands
The DRS commands that may be issued in response to the DR> prompt are as follows.
START

Starts a diagnostic program.

RESTART

When adiagnostic has stopped and control is given back to DRS, this command
restarts the program from the beginning.

CONTINUE
PROCEED

Allows a diagnostic to continue running from where it was stopped.
Causes the diagnostic to resume with the next test after the one in which it
halted.

EXIT

Transfers control to the XXDP+ monitor.

DROP

Drops units specified until an ADD or START command is given.

ADD

Adds units specified. These units must have previously been dropped.

DISPLAY

Displays P-Tables.

4-6

FLAGS

Used to change flags.

ZFLAGS

Clears flags.

All of the DRS commands except EXIT, DISPLAY, FLAGS, and ZFLAGS can be used with switch
options.

4.5.3.1

Command Switches — Switch options may be used with most DRS commands. The available

switches and their functions are as follows.

/TESTS:

‘

Used to specify the tests to be run (the default is all tests). An example of the

tests switch used with the start command to run tests 1 to 5, 19, and 34 to 38
would be:

DR> START/TESTS:1-5:19:34-38

/PASS:

Used to specify the number of passes for the diagnostic to run. For example:
DR> START/PASS:1 GeD

In this example, the diagnostic would complete one pass and give control back
to the DRS.

/EOP:

/ UNITS':

/FLAGS:

Used to specify how many passes of the diagnostic will occur before the end-of-

pass message is printed (the default is one).

Used to specify the units to be run. This switch is valid only if N was entered in
response to the CHANGE HW? question.

Used to check for conditions and modify program execution accordingly. The

conditions checked for are as follows.

‘HOE

Halt on error (transfers control back to the supervisor)

:LOE

Loop on error

IER

Inhibit error reports

‘IBE

Inhibit basic error information

IXE

Inhibit extended error information

:PRI

Print errors on line printer

:PNT

Print the number of the test being executed before execution

:BOE

Ring bell on error

:UAM

Run in unattended mode, bypass manual intervention tests

ISR

Inhibit statistical reports

:JOU

Inhibit dropping of units by program.

4.5.4 Control Characters Supported
The keyboard functions supported by DRS are as follows.

CTRL/C (*C)

Returns control to the DRS. The DR> prompt would be typed in response

CTRL/Z (*2Z)

Used during hardware or software dialogue to terminate the dialogue and

CTRL/O (*O)

Disables all printouts. This is valid only during a printout.

CTRL/S(*S)

Used during a printout to temporarily freeze the printout.

CTRL/Q(*Q)

Resumes a printout after a CTRL/S.

to CTRL/C. This function can be typed at any time.

select default values.

4.5.5 Example Printouts
Three examples of diagnostic printouts follow. The first is error-free. In the second test, the device address

is incorrect but extended error reporting is not selected. In the third test, extended error reporting is
selected.

If the answer to the software question ‘EXTENDED ERROR REPORTING ?’is ‘N’ (or default), error
reports will be ‘TEST FAILED’ only. For example:

‘DMA-START BIT TEST FAILED’

‘RXTIMER TEST FAILED’

For more detailed reporting, the answer must be ‘Y.
Note that the question:

‘NUMBER OF INDIVIDUAL ERRORS TO BE REPORTED ON A LINE ?
will not be asked unless the previous answer was ‘Y’.

Entries by the operator are underlined. An underline without an entry shows that the operator has pressed
the RETURN key to select the default parameter.
1.

Error-free pass
+R_ZDHVB@
ZDHVB@.BIC
DRSD®

CZDHV-B-0

DHU-11
UNIT

RESTART

FUNCT TEST
ADDR:

147670

DR>STA/PAS:
1
CHANGE

UNITS

UNIT

PART2

DHU-11

(L)

(D)

? Y

2 1

CSR ADDRESS:
(8) 160460 ? _
INTERRUPT VECTOR ADDRESS: (8) 318 ?__
ACTIVE LINE BIT MAP: (@) 1777772
_

(l=INTERNAL,

TYPE OF LOOPBACK
CHANGE

(L)

2=H3029 OR H3277):

CZDHV

EOP

2 2_

REPORT UNIT NUMBER AS EACH UNIT
EXTENDED ERROR

(8)

REPORTING:

(L)

IS TESTED:

(L)

Y ?2___

N 2?2

TOTAL

ERRORS

DR>

Test with wrong device address selected
DR>STA/PAS:1
CHANGE

UNITS

UNIT

(L)

? Y

? 1

(D)

CSR ADDRESS:
(#) 1684608 ? 160500
INTERRUPT VECTOR ADDRESS: (@) 310 ?_
ACTIVE LINE BIT MAP: (@) 177777 ?_

TYPE OF LOOPBACK
CHANGE

(L)

(l1=INTERNAL,

25=H3829 OR H3277):

(@)

? __

2 ?_

? Y

REPORT UNIT NUMBER AS
EXTENDED ERROR

IS TESTED:

EACH UNIT

REPORTING:

(L)

CZDHV DVC FTL ERROR @@1@01 ON UNIT @@ TST @21 SUB 009 PC:
DEVICE

DROPPED

UNIT

FROM

£21252

ERRORS

FURTHER TESTING

THS UNIT
1
TOTAL ERRORS

PASS ABRTD
CZDHV EOP
1
DR>

Wrong device address selected and extended error reporting enabled.
DR>STA/PAS:1
CHANGE
#

UNITS

UNIT

(L)

(D)

? Y
2

CSR ADDRESS:
(@)
160460
INTERRUPT VECTOR ADDRESS:
ACTIVE LINE BIT MAP:
(@)

TYPE OF LOOPBACK
CHANGE

(L)

160500
(@)
310
177777 2

(1=INTERNAL,

? Y

2 __
10000

2=H3029 OR H3277):

(9)

2 ?

REPORT

UNIT

NUMBER

EACH

EXTENDED ERROR REPORTING:
NUMBER OF INDIVIDUAL DATA

CZDHV

DVC

DEVICE

FTL

ERR

00101

ACCESS

UNIT

(L) N
ERRORS

UNIT

BUS

TIME-OUT

TRAP

CAUSED

READ

TIME-OUT

TRAP

CAUSED

WRITE

DHU

MAY

THE

WRONG

UNIBUS

FROM

FURTHER

UNIT

DROPPED

PASS

ABRTD

THS

CZDHV

EOP

TOTAL

ERRS

TST

(L)

@001

SUB

?2__

LINE:
009

PC:

(D)

?2__

021252

ERRORS

BUS

TESTED:

2?2 Y
TO REPORT

ATTEMPT
ATTEMPT

ADDRESS
TESTING

UNIT

DR>EXIT

4.6 VAX DIAGNOSTICS
VAX diagnostics for the DHU11 are:

EVDAI
EVDAH
UETP
4.6.1

Standalone diagnostic (level 3)
On-line diagnostic (level 2R)
User environmental test package (exerciser).

EVDALI Standalone Diagnostic

EVDALI is a comprehensive suite of functional verification tests. The tests run standalone under the VAX

Diagnostic Supervisor (VDS) V6.13 or later. The diagnostic may be used:
e
e
e

For installation tests
For troubleshooting
As a more comprehensive confidence check.

EVDALI has five modes of operation.
AR
=

—
—

Internal loopback
External (H325) loopback
Staggered loopback
Modem loopback
Terminal echo

Modes 1, 2, and 3 are used to test the DHU11, whereas modes 4 and 5 are generally used to resolve
line/modem/terminal faults or compatibility problems.

The format of the START command (Section 4.6.2.2) determines which tests are to be performed. A
complete test in modes 1, 2, 3, or 4 takes about five minutes. Terminal echo runs until it is deselected.
The EVDALI diagnostic is supported by the off-line help facility
4.6.2 Running the EVDAI Standalone Diagnostic
The minimum hardware requirements for EVDALI are:

Any VAX system with a UNIBUS

A console terminal

One to eight DHUI1s.

An extra terminal would be needed to run the terminal echo test.

4-10

EVDAIL HLP.

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X Diagnostic System User’s Guide (EK-DS780-UG) provides instructions on how to load and
The VA
run programs under the diagnostic supervisor. For details of the standalone tests, refer to the diagnostic
listing ZZ-EVDAL

Starting Up - Before EVDAI can be run, the diagnostic supervisor must be booted. The
4.6.2.1
then:
must
operator
Load EVDAI
Attach the DHU11(s)
Select the device(s) to be tested
Start the diagnostic.

An example of how to attach the DHUI1 1, and to load and run EVDAI follows. In the example, TRACE
is set to cause all tests to be reported.
DIAGNOSTIC SUPERVISOR.

ZZ-ENSAA-Y6.

13-519

8-FEB-1983

DS> LOAD EVDAI

; load the program

DS> SET TR,H

;

DS> ATTACH DHUll

DW@ TYA 7604608

10:47:03

set trace and halt on error

310

l_‘- BR interrupt level (range 4 to 7)

Vector address (range 000 to 770)
The CSR address
Name unit
The option is linked to UBA
Device to be attached
ATTACH command

;
;

DS> SEL TYA
DS> ST

4.6.2.2
a.

b.
C.

select the device for test
start the diagnostic

Options — Once the program starts, the user will be asked to select a number of options.
Lines to be tested
Line speed
Type of loopback

In the following example, default values ALL and 4800 are selected for a and b. Staggered loopback mode
is selected for c. The test starts to run when the type of loopback has been selected.
..

Program:
1.0,

Testing:

DHUll - VAX Functional Verification Test,

tests,

revision

1#:55:11.30.

TYA

lines to test [(ALL) or 1,2,...14,15]
Line Speed [(48006),
56,
75,
118,
134.5,
154,
309,
6049,
1800, 2000, 24900, 7 200, 9600, 19200, 38400)
1200,
loop type [(INTERNAL), EXTERNAL, STAGGERED, MODEM] STAGGERED
Test 1: Device Register Address Test
Test 2: Master Reset Selftest Test
Test 3: Master Reset Skip Selftest Test
Test 4: Diag Field (BMP) Test
Test 5: Selftest Forced Failure Test
Test 6: ROM Version Printout Test
Micro Processor number 1 ROM version is

4-12

Micro

Processor

number

2 ROM version

egister Address
d Bit Test

Test
Test

Test

Action

Enable

Test

Rx Data Available/Rx Data Valid/Rx

Test

Maintenance

Mode

Test

Interrupts

Test

Byte

Swapper

Test

RX Interrupt Holdoff Timer
DMA Start/DMA Abort Test
Byte Count Register Test

Test

Speed

Test

XON/XOFF

Test

Data

Test

Modem Signal Test
Framing Error/Break

Test

FIFO

Test
Test

Test

Recognition

Test

Format

Test

Bit Test
Parity Generation/Detection Test
Overrun Detection Test

Test

Exerciser

Test
Test

Test

@ errors detected, pass count is

End of run,
time

10:58:50.63

8-FEB-1983

Enable

Test

The default selection of tests to be run is 1 to 26. A sequence of tests, and the number of passes, can be
selected via the start command.
For example:

4.6.2.3

tests 7 to 26

DS> START/PASS:3/TEST:7

;

3 passes,

DS> START/PASS:0/TEST:7:10

;

loop on test,

DS> START/TEST:5:5

;

1 pass,

tests 7 to 10

test 5 only

Event Flags — Event flag 1 can be set to disable the ROM version number message.
DS> SET EVENT 1

4.6.2.4 Sections— Section is part of the start command. If the section is not specified, tests from 1 to 26
will be run. By specifying the section, modem loopback tests or terminal echo tests can be selected.
For example:
DS>

ST/SE:MODEM

Program:
1.8,

Testing:

DHUll - VAX Functional Verification Test,

tests,

revision

11:22:10.11.

TYA

lines to test [(ALL) or 1,2,...14,15]
13
3008,
150,
134.5,
11¢,
75,
50,
[(4800),
Speed
Line
18090, 2000, 2400, 7 200, 9600, 19200, 38400] 2400
1200,
when
keys
type RETURN
Put all modems into loopback mode,
Yes]
Y
[ (No),
Test

27:

Modem

End of run,
time

Loop

Test

@ errors detected,

8-FEB-1983

pass count

11:22:31.48

DS>

4-13

600,
done

DS>

ST/SEC:ECHO

.«

Program:
1.0,

DHUll

tests,

- VAX Functional

Testing: _TYA
lines to test
Line
2000,

[(ALL) or
[(4800), 50,

Speed
2409,

200,

Verification Test,

revision

11:25:26.34.

1,2,....14,15]
75, 114, 134.5,

9600,

19200,

14
150,
9680

38400]

396,

600,

1200,

1800,

The test will run until either an error or Control Y is detected.
By pressing the break key when the terminal echo test is running, communication between terminal and
DHUI11 can be proven. ‘Break’ causes a framing error which generates an error message.

-4———
Test

28:

Terminal

Echo

DHUll

VAX

k*kkkxk*
Pass

test

Hard

error

k*kkkkkk*x

.«

Halt

Test

Functional

28,

subtest

while

testing

TYA:

Fnd

error

Hard

break key on terminal pressed

error

Verification

error

Terminal

number

Test

8-FEB-1983

Echo

Test

1.8

‘> ****x*xx

11:26:27.70

failed

***x*xkx*%

@P0@6F7F
(X)

DS>

4.6.2.5
Error Messages — An error message may indicate that the option is defective or that an illegal
parameter has been selected. Error numbers are interpreted in the diagnostic listing ZZ-EVDALI. See the
previous section (4.6.2.4) for an example of an error message.

4.6.3

EVDAH On-Line Diagnostic

This diagnostic runs in the on-line mode under VMS V4.0 or later versions. The operator interface is via

SR
-

the VA
X diagnostic supervisor (VDS), V6.13 or later. EVDAH provides a confidence check of DHU11s
in VAX/VMS systems. It consists of five tests.
Internal data-loopback test on selected channels in sequence
Internal DMA data-loopback test on selected channels in sequence
Internal data-loopback test on selected channels at the same time

External loopback test (via H325) of modem control signals
External data loopback via a modem or H325. If a modem is used, it must be set up manually.

Before running EVDAH, the user should be aware of the following points.
1.

The tests are on-line, therefore it is essential to define the channels to be tested. The test will not
run if a channel which is allocated to a process is selected for testing. Channel allocations can be
checked by a Show Device command such as SH DEV/FULL TYA. In the typical response
which follows, channels O and 1 are free and channel 2 is allocated to job control.

Device

TYA@:
on

Error

line

count

Operations

Reference
Device

3-FEB-1984 17:02: 14.04

completed

count

TYAl:
on

Owner

process

1id

Owner

process

name

)

Default

3-FEB-1984

Error count
Reference

completed

17:02:

size

14.08

count

Owner process

Owner

name

Default

TYA2:
on

buffer

00000000

line

Operations

Device

3-FEB-1984

process

buffer

17:02:

size

go0000900
80

14.15

line

Spooled

Allocated

Error count
Operations completed
Reference count

Y
9
1

Owner process id
Owner process name
Default buffer size

00010074
JOB_CONTROL

132

Iftest4istoberun, an H325 loopback connector must be installed on the selected channel. By
setting event flag 20, the operator can cause the program to halt between channel tests. This
allows the H325 to be moved to the next channel to be tested. Another event flag(21) causes the

program to halt after each DHU11 has been tested.

IftestSistoberun,

amodemoran H325 mustbe installed on the selected channel. The event

flags also function in this test.

Iftests 4 or5 are run without some form of loopback installed, error messages will be generated.

Inthe DHUI11 hardware, adjacent channels are paired (refer to Chapter 1, Section 1.3.3.1).
Any attempt to change a baud rate that will change the group of an allocated channel will
generate error messages. The baud rate will not be changed.

The EVDAH diagnostic is supported by the on-line help facility EVDAH.HLP.
4.6.4 Running the EVDAH On-Line Diagnostic
The minimum hardware requirements for EVDAH are:

e
e
e

Any VAX system with a UNIBUS
A console terminal
One to eight DHU11s.

The VAX Diagnostic System User’s Guide (EK-DS780-UG) provides instructions on how to load and
run programs under the diagnostic supervisor. For details of on-line tests, refer to the diagnostic listing
ZZ-EVDAH.

Starting Up — Before EVDAH can be run, VMS must be booted. The operator must then:

4.6.4.1

Log into the system maintenance account
Allocate the lines to be tested
Load the diagnostic supervisor
Attach the DHU11(s)
Select the device(s) for test
Start the diagnostic.

An example of how to attach the DHU11 and to load and run EVDAH follows. Where appropriate,
commands for different systems are included.

S ALL TYAQ

; Allocate lines to be tested

ALL

TYAl

;

ALL

TYA2

;

$ RUN ESSAA
or

$ RUN ECSAA
or

$ RUN ENSAA

DIAGNOSTIC SUPERVISOR

;

For

(11/788), Supervisor

;

For

(11/750)

;

For

(11/730)

13-510

ZZ-ENSAA-Y6.

DS> ATT DW788 SBI DW@ 3 4

;

For

11/750

DS> ATT DW73@ HUB DW¢

;

For

11/730

DS> LOAD EVDAH

DS> ATT DW75¢ HUB DW@
or

DW@
TYA

LINK?
NAME?

DEVICE

DS> ATT DHU1l1l

760460

WME

CSR?

300

DS>

SEL

DS>

START

TMy

BR?

VECTOR?

;

TYA:

27-JAN-1984 12:00: 00.00

; For 11/780 Attach the UBA on the SBI

;

Load the DHUll diagnostic

Attach the DHUll

The option is linked to
The option named unit:

the

UBA

(range=A-F)
The CSR address:

(range=76000808-777776)

Vector address: (range=000-770)
BR Interrupt Level: (range=4-7)
Select

Unit

Under

Test

Start diagnostic execution

The program should now be running

If preferred, the Attach command and parameters can be input as one statement. The following is an

example of such a single-line entry.
DS>ATTACH DHUll

DW@ TYA 760460

300

level (range = 4 to 7)

interrupt
— BR
Vector address (range = 000 to 770)
The CSR address
Name unit (range = A to H)
The option is linked to UBA
Device to be attached
ATTACH command

4-16

4.6.4.2

Options — Once the program starts, the user is asked to select a number of options.

1.
2.
3.

Lines which are to be tested
Baud rate
Type of loopback

Lines which are to be tested

The following question will be displayed.

Lines to test [(ALL),REV,EVE,ODD,0,1,2,3,4,5,6,7,8,9,10,11,12, 13,14,15]
Various responses can be given.

ALL

—

Test all lines (0 to 15) in ascending order. This is the default (press the RETURN
key only).

REV

—

Test all lines (15 to 0) in descending order.

EVE

—

Test lines 0, 2, 4, 6, 8, 10, 12, and 14.

ODD

Testlines1,3,5,7,9,11, 13, and 15.

—

Test line n (where n can be any line number).

n,m

— Test lines n,m (where n,m can be any combination of line numbers; for example,
0,15,3,7,1). The lines will be tested in the sequence entered.

Any invalid entry will display an error message:
7?7 Invalid response
followed by a reprompt of the input request.
2.

Baud rate

The following question will be displayed.

Baud Rate [(9600),50,75,110,134,150,300,600,1200,1800,2000,2400,4800,7200,19200,
38400]

One of two responses can be given.
n

A specific value

RET

—

The default rate (9 600 bits/s)

Any invalid entry will display an error message:
?? Invalid response

followed by a reprompt of the input request.

4-17

Type of loopback

The following question will be displayed:

Loop Type [(INTERNAL), MODEM, H325]
Various responses can be given.

INTERNAL

Internal loopback will be used in the test. This is the default response (press
the RETURN key only.

MODEM

—~

A modem preset to loopback.

H325

—

External loopback connector is to be used.

Any invalid entry will display an error message:
7?7 Invalid response

followed by a reprompt of the input request.

4.6.4.3

Event Flags — Event flags are used to control multichannel or multi-DHU11

tests. Flags are set

by the Set Event command. For example:
DS>

SET

EVENT

Event flag 20

—

Functions in tests 4 and 5 only. When flag 20 is set, the program is
suspended after each channel is tested. A supervisor message will invite
the operator to transfer the H325 or modem to the next channel to be
tested.

Event flag 21

—

Functions in all tests. It is useful when more than one DHU11

is being

tested. Event flag 21 has different functions in internal and external
loopback tests.

Test

Flag 21

Function

1to3

Only the first DHUI11 selected is tested.

Ito3

All DHUI11s are tested in the selected order. Console messages indicate the
module under test. For example:
INTERNAL LOOPBACK ON UNIT 000
INTERNAL LOOPBACK ON UNIT 001
INTERNAL LOOPBACK ON UNIT 002
INTERNAL LOOPBACK ON UNIT 003

4 and 5

Only the first DHUI11 selected is tested.

4 and 5

The program is suspended before each module is tested. Console messages
warn the user to transfer the H325 or modem.

4.6.4.4 Sections— Section is part of the start command. If the section is not specified, the default is tests
1, 2, and 3. If the section is specified as MANUAL, tests 4 and 5 are selected. For example:
;
;

DS> START
DS> START/SEC=MANUAL

runs tests 1, 2, and
runs tests 4 and 5

4.6.4.5 Error Messages — If an error is detected during test, the program will output an error message.
This may indicate that the option is defective or that an illegal parameter has been selected. Error numbers
are interpreted in the diagnostic listing ZZ-EVDAH. The error messages below were generated by
running tests 4 and 5 with the incorrect loopback mode selected.
Test

Test

Loopback

4 - Modem Signal

kkkkkkk*
DHUL1l 16 LINE ASYNC MUX TEST - 1.0
*#kxxx*kx*
3-FEB-1984 15:50:21.44
Pass 1, test 4, subtest @, error 2,
System fatal error while testing TYA: INVALID LOOPBACK SELECTED
End of System fatal error number 2 **kkkkkx

kxkkk*x*
[aborted]

Test 5: Test 5 - External Data Loopback
DHULl 16 LINE ASYNC MUX TEST - 1.0 | r*kkkkkkx
kkkkkkk*
3-FEB-1984 15:50:22.71
Pass 1, test 5, subtest @, error 2,
System fatal error while testing TYA: INVALID LOOPBACK SELECTED

*kkkxkk* End of System fatal error number
[aborted]

End of run,

time

@ errors detected, pass count is

3-FEB-1984

15:50:23.89

DS>

4.6.5

2 **kkkkki

VAX Test Sequence

The precise sequence of diagnostic tests will depend on the state of the system and the fault which has been
reported. If the system is on-line, it might be easier to run EVDAH before EVDAI However, if it is offline, EVDAI would probably be run immediately.

4.6.5.1 EVDAH Test Sequence - Figure 4-3 gives an example of H3029 distribution panels connected
to a DHU11. A Show Device command would be used to check for ‘owners’ of channels O, 1, and 2.
With the allocation shown:

a.
b.

Runtests 1, 2, and 3 on lines 3 to 15
Run test 4 on lines 3 to 15

Put the modem in loopback mode. Run test 5 on channels 1, and 3 to 15.
NOTE

The event-flag facility would be useful for b and c.

L( \

MODEM [—— FREE

Wwih -0

ALLOCATED

6
7

H325

| F

M3105

)

]

| ALL

]

FREE

—

)
RD1781

Figure 4-3

Example of Channel Allocation

4.6.5.2 EVDAI Test Sequence — Most of the EVDAI diagnostic will run in staggered loopback mode.
Therefore, unless individual channel problems are indicated, tests should start with this mode.
A troubleshooting diagram and a flowchart are provided by Figures 4-1 and 4-4. The flowchart shows a
complete sequence that also checks the distribution panel and loopback connectors. However, if the initial
test of all lines in staggered mode is error-free, the option is probably good.
4.7
FIELD REPLACEABLE UNITS (FRUs)
The FRUs are:
Reference No.Item

M3105
BCOSL-xx
H3029
H325
H3277

Hex-height module
Flat cable, 40-conductor
Distribution panel (includes staggered loopback connector)
Line loopback connector
Staggered loopback connector (if supplied).

Depending on local maintenance strategy, modems and/or external cables may also be
Figure 4-1.

4-20

FRUs. See

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APPENDIX A

GLOSSARY OF TERMS

A.l1

SCOPE

This appendix contains a glossary of terms used in this manual. The terms are in alphabetical order for
easy reference.

A.2

GLOSSARY

asynchronous

A method of serial transmission in which data is preceded by a start bit and followed by

a stop bit. The receiver provides the intermediate timing to identify the data bits.

A facility of a modem or terminal to automatically answer a call.

auto-answer

Automatic flow control. A method by which the DHU11 controls the flow of data by means

auto-flow

of special characters within the data stream.

backward channel

A channel which transmits in the opposite direction to the usual data flow.

Normally used for supervisory or control signals.
base address

The address of the CSR.

Background Monitor Program.

BMP

CCITT

Comite Consultatif International de Telephonie et de Telegraphie. An international standards

dataset

See modem.

committee for telephone, telegraph, and data communications networks.

Dual-In-Line. The term describes ICs and components with two parallel rows of pins.

DIL

DMA

Direct Memory Access. A method which allows a bus master to transfer data to and from

DUART

Dual Universal Asynchronous Receiver Transmitter. An IC used for transmission and

system memory without using the host CPU.

reception of serial asynchronous data on two channels.

A method of transmitting and receiving on the same channel at the same time.

duplex

EIA

Electrical Industries of America. An American organization with the same function as the

EMC

Electro-Magnetic Compatibility. The term denotes compliance with field-strength, susceptibility,

FCC

Federal Communications Commission. An American organization which regulates and licenses

CCITT.

and static discharge standards.

communications equipment.

FIFO

First In First Out. The term describes a register or memory from which the oldest data is

removed first.

floating address
A CSR address assigned to an option which does not have a fixed address allocated.
The address is dependent on other floating address devices connected to the bus.
floating vector
An interrupt vector assigned to an option which does not have a fixed vector allocated.
The vector is dependent on other floating vector devices connected to the bus.
FRU

Field Replaceable Unit.

GO/NOGO

A test or indicator which defines only an ‘error’ or ‘no error’ condition.

Integrated Circuit.

I/O

Input/Output.

LSB

Least Significant Bit.

LSI-11 bus

Another name for the Q-bus.

microcomputer

An IC which contains a microprocessor and peripheral circuitry such as memory, I/O

ports, timers, and UARTSs.

modem

The word is a contraction of MOdulator DEModulator. A modem interfaces a terminal to a

transmission line. A modem is sometimes called a dataset.
MSB

Most Significant Bit.

multiplexer

NPR

A circuit which connects a number of lines to one line.

Non-Processor Request. Requests for control of the UNIBUS for DMA transactions.

null modem

A cable which allows two terminals which use modem control signals to be connected

together directly. Only possible over short distances.
PCB

Printed Circuit Board.

protocol

A set of rules which define the control and flow of data in a communications system.

PSTN

Public Switched Telephone Network.

Q-bus

A global term for a specific DIGITAL bus on which the address and data are multiplexed.

RAM

Random Access Memory.

RFI

Radio Frequency Interference.

ROM

SPC

Read Only Memory.

Small Peripheral Controller.

split-speed
A facility of a data communications channel which can transmit and receive at different
data rates at the same time.

A-2

Universal Asynchronous Receiver Transmitter. An IC used for transmission and reception of

UART

serial asynchronous data on a channel.

A DIGITAL bus, common to a number of PDP-11 and VAX systems.

UNIBUS

XOFF

A control code (233g) used to disable a transmitter. Special hardware or software is needed for

XON

A control code (21g) used to enable a transmitter which has been disabled by an XOFF code.

this function.

A-3

APPENDIX B
MODEM CONTROL
B.1

SCOPE

This appendix contains information useful to both the programmer and the engineer. It defines control
signals, describes typical modem control methods, and warns against likely network faults. A detailed

example of auto-answer operation is included.
B.2

MODEM CONTROL

The DHUI 1 supports sufficient modem control to permit full-duplex operation over the public switched
telephone network (PSTN) and over private telephone lines. Table B-1 lists the control leads supported by
the DHU1 1, together with an explanation of their use and purpose. In this appendix, the terms MODEM
and DATASET have the same meaning. They refer to the device which is used to modulate and
demodulate the signals transmitted over the communications circuits.

The DHU11 modem control interface can be used in many applications. These include control of serial
line printers, terminal cluster controllers, and industrial I/O equipment, in addition to the more usual
applications in telephone networks. Use of the control leads described in Table B-1 is therefore
completely application dependent, although there are international standards which telephone network
applications should obey. There are no hardware interlocks between the modem control logic and the
transmitter and receiver logic. Program control manages these actions as necessary.

A subset of the leads listed in Table B-1 could be used to establish a communications link using modems
connected to the switched telephone network. Ring Indicator (RI), Data Terminal Ready (DTR), and
Data Carrier Detected (DCD) are the absolute minimum requirements. In some countries Dataset Ready
(DSR) is also needed. It is usually desirable, however, to implement modem control protocols which will
operate over most telephone systems in the world. Also, some protection should be included to guard
against network faults, particularly in applications such as dial-up time-sharing systems. Such faults
include:

Making a channel permanently busy (hung) because of a misdialed connection from a non-data

Connecting a new incoming call on an in-use channel. This fault might occur, for example, after
a temporary carrier loss, if the host system assumed that the carrier was reasserted by the

station

original caller.

Modem control with some protection against common faults, and which is compatible with the telephone
networks in most geographic areas, can be implemented by using all the signals listed in Table B-1, in the
way described by the CCITT V.24 recommendations. Section B.2.1 describes a method of implementing
a full-duplex auto-answer communications link via modems over the PSTN. It is provided here only to
show the operation and interaction of DHU11 modem control leads in a typical application.

Table B-1
Name

RS-232-C

V.24

GND

25-Pin

Modem Control Leads
Definition

Protective ground. This provides a path between the
modem and DHU11 for discharge of potentials such as

static electricity.

GND

102

Signal Ground. This is a reference level for the data and
control signals used at the EIA interface.

TXD

103

From DHU11 to modem. This signal contains the
serial bit stream to be transmitted to the remote station.

RXD

104

From modem to DHUI11. This signal is the serial bit
stream received by the mcdem from the remote station.

RTS

105

From DHU11 to modem. Causes the modem’s carrier
to be placed on the line.

CTS

106

From modem to DHUI1 1. Indicates that the modem
has successfully placed its carrier on the line and that
data presented on circuit BA will be transmitted to the
communication channel.

DSR

107

From modem to DHUI 1. Indicates that the modem
has completed all call establishment functions and is

successfully connected to a communications channel.

DTR

108/2

From DHU11 to modem. Indicates to the modem that
the DHUI1 is powered up and ready to answer an

incoming call.

DCD

109

From modem to DHUI1 1. Indicates to the DHU 11 that
the remote station’s carrier signal has been detected and
is within appropriate limits.

125

From modem to DHUI1 1. Indicates that a new incoming
call is being received by the modem.

B.2.1
Example of Auto-Answer Modem Control for the PSTN
The system operator determines which DHU11 channels should be configured for either local or remote
operation. Local operation implies control of data-leads only, while remote operation implies that modem
control will be supported. The host software will assert DTR and RTS together with the Link Type bit in
the LNCTRL register for all DHU11 channels configured for remote operation. DTR informs the modem
that the DHU11 is powered up and ready to acknowledge control signals from the modem. RTS is
asserted for the full-duplex mode of operation and causes the modem to place its carrier on the telephone
line when the modem answers a call. Link Type (LNCTRL<8>>) enables modem status information to be
placed in the receive character FIFO where it will be handled by an interrupt service routine. Modem
status changes are always reported in the STAT register regardless of the state of LNCTRL<8>. The
modem is now prepared to auto-answer an incoming call.

B-2

. This informs the DHU11 that
Dialing the modem’s number causes Rl to be asserted at the EIA interface
or else the change will not be
ms
30
least
a new call is being received. RI has to be in a stable state for at
swer the incoming call
auto-an
will
modem
the
,
reported by the DHU11. Since DTR is already asserted
e the handshaking
complet
to
needed
time
The
and start its handshaking sequence with the calling station.
satellite links are
and
n
selectio
speed
-mode
fallback
sequence can be in the order of tens of seconds if
successfully
been
has
call
the
that
DHUI11
the
to
involved. The modem will assert DSR to indicate
answered and a connection established.

NOTE

On some older types of modem used on the PSTN,
the opposite effect is also true. The RI signal may

be very short, or it may not even occur if DTR is
previously asserted. When this type of modem

answers an incoming call it asserts DSR almost
immediately and deasserts RI at the EIA interface.
Programs must therefore expect RI or DSR or

DCD as the first dataset status change received
from the modem when establishing a connection.

when DSR is asserted.
As RTS was previously asserted, the modem’s carrier will be placed on the line
which indicates to the
CTS
assert
will
it
line
the
on
carrier
its
When the modem has successfully placed
a misdialed number
of
result
the
be
call
g
incomin
the
Should
data.
DHUI1 that it may start to transmit
host starts a timer
the
this,
against
guard
To
received.
be
never
would
then it is possible that a carrier signal
time the carrier
which
within
seconds,
40
to
15
of
range
the
in
usually
is
when it detects RI or DSR. This
must be detected. When the modem detects the remote modem’s carrier signal on the line, it will assert
DCD which indicates to the DHU11 that data is valid on the RXD line.

for as long as DCD,
The modem may now exchange data between the DHUI 1 and the calling station
be detected during
should
RI
DSR, and CTS stay asserted. If any of these three signals disappear, or if
signals would
these
of
any
of
normal transmission, it would indicate a fault condition. A change of state
cause an interrupt via the receive FIFO.

e systems tolerate a
The handling of the fault conditions now becomes country-specific as some telephon
if carrier resumes
call
a
with
proceed
to
usual
is
it
transient carrier loss while others do not. In the USA
as dial-tone, to
such
signals,
ory
supervis
e
telephon
for
within two seconds. In non-USA areas it is possible
would assume
program
host
the
case
this
In
carrier.
of
on
be misinterpreted by the modem as a resumpti
channel. To
‘hung’
a
cause
would
and
caller
original
the
to
shed
that the connection had been reestabli
to abort the
DSR
or
CTS,
DCD,
of
loss
the
after
ely
immediat
ed
prevent this, DTR should be deassert
connection. DTR should stay deasserted for at least two seconds, after which time a new call could be
answered.

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DHU11 Interface
User's Guide

EK-DHU11-UG-001

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