DQ11 NPR Synchronous Line Interface Manual

This document is the DQ11 NPR Synchronous Line Interface Manual (2nd Edition, April 1975) for Digital Equipment Corporation's PDP-11 computers.

The manual provides comprehensive information for the installation, operation, and maintenance of the DQ11, a high-speed, double-buffered communications device designed to interface a PDP-11 processor to a serial-synchronous communication channel.

Key aspects summarized include:

1. Purpose and Features: The DQ11 enables PDP-11 systems for remote batch, concentrator, and front-end synchronous line control. It utilizes Non-Processor Requests (NPR) for extremely fast, direct memory access (DMA) data transfers on a cycle-steal basis, minimizing CPU overhead.

   • Standard Features: Supports transmission speeds up to 1 megabaud, full- or half-duplex operation, Vertical Redundancy Check (VRC) for parity, data set control, programmable sync characters, programmable character size (up to 16 bits), and double-buffered data/count/address registers. It includes auto idle, strip sync, and self-testing capabilities, interfacing with modems like Bell 201 and 303.
   • Optional Features (Expander Units):
     • DQ11-AB (Error Detection Expander): Provides programmable error detection using Longitudinal Redundancy Checking (LRC) or Cyclic Redundancy Checking (CRC) with polynomials up to 24 bits.
     • DQ11-BB (Character Recognition Expander): Offers programmable character recognition (up to 16 characters) and hardware sequence control for complex protocol handling (e.g., IBM BISYNC), including DLE insertion/deletion.

2. Physical Description and Installation: The DQ11 consists of a basic unit and optional expander units, each a modular assembly. The manual details equipment checklists for various configurations (DQ11-DA, -EA, -AB, -BB, -KA), power requirements, and the step-by-step installation procedure. Crucially, it provides instructions for setting device addresses (M105 module) and interrupt vectors (M7821 module) via jumper configurations before module installation, and outlines module-specific switch/jumper selections for various operational modes and clocking options.

3. Programming: This section is dedicated to software interaction with the DQ11. It lists and describes the register bit assignments for primary control/status registers (RX CSR, TX CSR, REG/ERR) and secondary registers (Character Count/Bus Address, Character Detect, Sync, Miscellaneous, Transmit Buffer, Sequence, BCC, Polynomial). It covers general programming procedures for initializing the DQ11, managing transmit and receive operations (including data transfers, error detection, and protocol handling), and provides programming examples for clearing the device, using test loop modes, and implementing BCC and protocol features.

4. Detailed Hardware Description: The most extensive part of the manual provides in-depth functional and logical descriptions of each module (M7818, M7815, M7812, M7813, M7816, M7817), detailing the circuits responsible for bus selection, shift registers, character counting, error checking (BCC generators), and protocol control. This section often references specific integrated circuits and includes block diagrams and truth tables for logical operations.

In essence, this manual serves as a comprehensive technical guide for engineers and programmers working with the PDP-11 and the DQ11 interface, covering everything from high-level features and installation to intricate low-level hardware logic and programming routines.