VT05 Display and Cursor Control Logic

This document contains a series of 14 detailed schematic diagrams for the Digital Equipment Corporation VT05 display terminal, outlining the electronic logic for its display and cursor control functionalities.

The schematics describe several key subsystems:

• X and Y Counters: Both dynamic and static X and Y counters (Dynamic Y Counter, Static X-Counter, Dynamic X Counter) are presented, detailing the generation of horizontal and vertical timing signals, including raster lines, character locations, and synchronization pulses (V-sync, H-sync) using various clock frequencies (e.g., 1.56 KHz, 1.7472 MHz, 20.9664 MHz).
• Cursor Movement and Positioning Logic: Dedicated circuits are shown for manipulating the cursor, covering actions such as Cursor Up, Cursor Down or LF (Line Feed), Cursor To Right, Cursor To Left, Carriage Return (CR), Automatic CR/LF, and the HOME function. These involve intricate gate logic and flip-flop stages to update cursor coordinates based on input commands.
• X & Y Comparator: A circuit designed to compare the states of the X and Y counters, likely used for precise cursor positioning or boundary detection.
• Row Select Circuit: This system manages the selection of display rows, using a 15.6 KHz clock and X-D-Counter signals to generate outputs for the display cursor circuit.
• Character Location Counter: This core timing circuit uses a master clock (20.9664 MHz) and frequency dividers to produce various video buffer clocks and precise timing for individual character elements on the display.
• Tab Logic: Logic for horizontal tabulation is included, along with provisions for automatic carriage return and line feed under specific conditions.

The document provides comprehensive logic diagrams, component interconnections, and associated timing diagrams, illustrating the fundamental operational principles for the VT05's display management and interactive cursor control.