PDP-11/70 HARDWARE STUDENT HANDOUTS

This document comprises a comprehensive set of student handouts for a PDP-11/70 hardware maintenance course, spanning 15 days of instruction. It provides a detailed overview of the PDP-11/70 computer system, covering its architecture, operational principles, and troubleshooting procedures.

Key topics covered include:

• System Overview: Introduction to the PDP-11/70, its components, physical configuration, and addressing space, with a focus on the KB11-B processor.
• Processor Internals: Detailed explanations of data paths, control block diagrams, timing (basic, pause, RAR, RBR), control ROM, flow diagram concepts, and control console operations.
• Instruction Execution: In-depth coverage of various instruction types, including condition code, branch, single/double operand, and register instructions, with microcode examples for multiply and divide operations.
• Memory System: Extensive treatment of the MJ11 Core Memory (3-wire operation, configuration, main memory bus, timing), cache memory (concepts, operations like read hit/miss, write, processor bust-bend cycles), and memory management (relocation logic, protection logic, multiple modes, timing, internal registers, Unibus map).
• Addressing and Mapping: Diagrams illustrating 16, 18, and 22-bit address mapping, physical address generation, and Unibus map logic and transactions.
• System Control & Diagnostics: Discussions on BRQ operations, interrupts, traps, power-up/down sequences, processor service priority, and a list of diagnostic programs for CPU, cache, memory management, and other subsystems.
• Troubleshooting: Integrated troubleshooting laboratories are a significant part of the curriculum, complemented by practical memory management familiarization labs.
• Hardware Details: Numerous block diagrams, flowcharts, timing diagrams, and circuit schematics illustrating the internal workings of the processor, cache, memory controller, and core memory components like sense amplifiers and drivers.