KXT11-CA Single-Board Computer

This document serves as a user's guide for the KXT11-CA Single-Board Computer (SBC), model M8377, providing detailed information for hardware, software, and field engineers on its application, programming, and maintenance.

The KXT11-CA is a quad-height, extended-length, single-width board that executes the PDP-11 instruction set. It can operate in two primary modes:

1. Standalone Mode: Functions as a dedicated controller or general-purpose microcomputer, independent of Q-Bus signals. It can receive power from the Q-Bus backplane or an external source. Communication occurs via its integrated I/O ports.
2. Peripheral Processor Mode: Interfaces with Digital's Q-Bus (22-bit address/16-bit data) as a bus slave and DMA master, allowing existing Q-Bus systems to offload tasks to the KXT11-CA SBC.

Key hardware features of the KXT11-CA SBC include:

• A T-11 16-bit microprocessor with 64 KB direct addressing.
• On-board memory: 32 KB static RAM, sockets for up to 32 KB additional PROM or static RAM, and 8 KB of native PROM firmware.
• Three serial I/O ports (one asynchronous console, one synchronous/asynchronous with full modem support, and one asynchronous secondary channel).
• One 20-line parallel I/O port, compliant with IEEE 488 electrical standards.
• A two-channel 16-bit Direct Transfer Controller (DTC) for high-speed data transfers between local memory, Q-Bus memory, or between Q-Bus locations.
• Three programmable timers/counters.
• Four local status/control registers and programmable LED indicators for diagnostics.
• A 16-word, two-port RAM (TPR) file for command and data exchange with the Q-Bus arbiter.
• A Q-Bus Interrupt Register (QIR) for signaling Q-Bus interrupts.

The native firmware of the SBC controls essential operations such as power-up selftest, device initialization, application program loading (bootstrapping), and an Octal Debugging Technique (ODT) monitor. It supports various communication protocols and handles restarts, including those caused by Q-Bus commands or internal events. The document also covers the physical and environmental specifications, detailed theory of operations, software programmable registers, and configuration/installation/maintenance procedures, including jumper settings and diagnostic testing. Appendices provide information on the PDP-11 instruction set, performance parameters, schematic drawings, and addressing environment.