Bus to Bus Adapter

This document describes the PDP-X Bus to Bus Adapter, a device designed to connect two processors together via the IO Bus. It serves to facilitate interprocessor communications in multi-processor configurations and control communications between arithmetic and IO processors.

The adapter operates in a full duplex manner, consisting of two independent receiver-transmitter pairs. Data transfer is managed by the transmitter sending a command list to the receiver, outlining the quantity and nature of the data. The receiver can then process this command list, allocate memory, and either accept, selectively receive, or defer data transfer without data loss. Both the transmitter and receiver utilize Status Registers (SR) that can be read, tested, and altered using specific I/O instructions, controlling operational states and indicating conditions like bus busy, request, low interrupt, or unusual events. The system supports operation in either programmed mode or under multiplexor channel control, and its components can be physically separated for long-distance connections using a dedicated transfer bus. The document also provides programming examples for transmitter and receiver routines, detailing instruction sequences for initialization, data transfer, and interrupt handling, along with diagrams illustrating its general and detailed organization.