| Volume | 3 |
This technical memorandum, dated April 25, 1967, outlines the objectives for the PDP-X project, emphasizing modern processor design, fourth-generation capabilities, and I/O standardization.
The primary goals include a significant improvement in price-performance ratio, targeting twice the PDP-9 performance at half its price, by making more efficient use of available technology, especially through enhanced Op Code structures and flexible addressing. The architecture aims to minimize total system costs by reducing core storage requirements and enabling neat expansion using Read Only Storage (ROS) for Op Code expansion and specialized peripheral controllers. Ultimately, the PDP-X architecture is envisioned to replace the PDP-8, PDP-9, and PDP-24 with a common design.
Furthermore, the design must be forward-looking, easily adaptable for future generations, and amenable to large-scale integration (LSI) technologies. It will natively support complex software systems with features like dynamic memory allocation and protection. While full multiprocessing is a long-term goal, the design will facilitate "mini-multiprocessor" configurations for larger peripherals and eventually allow horizontal system expansion by adding identical processors. I/O standardization, likely via a standard byte interface, is crucial to minimize peripheral costs across all processor versions.
Software development is planned in three stages: a basic assembler/editor/utilities, followed by a macro assembler/compiler/I/O system, and finally a keyboard/extended monitor. The software will be modular, minimize core residency, and be re-entrant to support multi-user and interrupt-driven environments. An anticipated schedule is provided, with hardware architecture targeted for September 1967 and a running prototype by July 1968, alongside concurrent software and documentation development.
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