Me11-L Core Memory System Manual

This document is the ME11-L Core Memory System Manual for the PDP-11 family of computers, published by Digital Equipment Corporation (DEC) in 1972, with printings up to 1973.

The manual provides theory of operation and maintenance information for the ME11-L system, assuming the user is familiar with basic digital computer theory and PDP-11 use.

Key aspects covered:

• System Overview: The ME11-L is a Unibus-compatible, 900-ns read/write core memory system. It consists of a basic 8K (8192 words, 16-bit) MM11-L core memory, its own power supply, and a rack-mountable 5-1/4 x 19 inch mounting box. The memory is expandable in 8K increments up to 24K.

• Functional Units:

  • Unibus: The system interfaces with the PDP-11's asynchronous, high-speed Unibus for data and signal transfer.
  • Memory (MM11-L): Composed of three modules: G110 (control logic, data register, sense amplifiers, inhibit drivers, device selector), G231 (address selection logic, current generators, switches, drivers, stack discharge), and H214 (the 8K core stack array). It supports word and byte addressing.
  • Power Supply: A forced-air-cooled unit providing regulated +5V (for logic) and -15V (for memory drive circuits), along with power fail signals (BUS AC LO L and BUS DC LO L) to the Unibus. It operates on either 115 Vac or 230 Vac.
  • Mounting Box: A physical enclosure for the system, including internal cabling and a backplane for module interconnection.

• Memory Operations: Details four basic modes: Read/restore (DATI), Read pause (DATIP), Write (DATO), and Write byte (DATOB), explaining how they interact with the core array, current generators, and data registers.

• Detailed Descriptions: Provides in-depth explanations of the AC input circuit, DC Regulator Module operation, core array structure, device and word selection logic, read/write current generation and sensing, stack discharge circuit, DC LO circuit, and various control logic timing circuits (timing, slave synchronization, pause/write restart, strobe generation).
• Maintenance: Includes procedures for preventive maintenance, adjustments (e.g., strobe delay), circuit waveforms for troubleshooting, a troubleshooting chart for common malfunctions, and parts identification.
• Programming Tests: Describes specific DEC programs (Address Test Up/Down, No Dual Address Test, Basic Memory Patterns Test, Worst Case Noise Test) used to diagnose memory issues.

In essence, the manual serves as a comprehensive guide for understanding, installing, and maintaining the ME11-L core memory system within a PDP-11 environment.