Memory Bus Receiver

Order Number: M565

This document is a technical schematic for a Memory Bus Receiver, a component designed and manufactured by the Digital Equipment Corporation (DEC) in 1970.

The schematic details the circuit logic, utilizing a variety of transistors (specifically DEC4258 and DEC4274 models), diodes (FD777, D664, and D662), and various resistors and capacitors. The page includes a comprehensive parts list, providing specifications for 21 unique components, including physical hardware like eyelets and handles, as well as electronic parts such as resistors and capacitors. The circuit operates using power rails of +5V, -15V, and -2.2V, with an "Enable (L)" function. The document also references associated assembly and coordinate hole location diagrams.

M565
2000
1 pages
Quality

Original
0.1MB

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