10-2 Input Nand Gates M113

This document is a technical schematic from 1967 by the Digital Equipment Corporation. It illustrates a circuit design featuring ten 2-input NAND gates based on the DEC7400N integrated circuit. The schematic includes the necessary power connections (pin 7 for GND and pin 14 for +5V), a resistor-capacitor biasing network, and a parts list detailing the specific resistors, capacitors, and integrated circuits required for the assembly.