VAXBI Maintenance Guide

This document is a preliminary internal maintenance guide for the VAXBI (VAX Bus Interconnect) system.

It provides comprehensive details on:

• Address Space: Mapping of BI memory and I/O.
• Registers: In-depth descriptions of various BI and BIIC (BI Interface Controller) registers, including device, control, status, error, interrupt, and general-purpose registers.
• Signals: A detailed breakdown of BI and BCI (Bus Controller Interface) signals, their groupings, descriptions, and encoding for commands, data lengths, responses, and arbitration.
• Transaction Descriptions: Elaborate explanations of different bus transactions, such as various read and write operations, interprocessor interrupts, broadcast, stop, and invalidate commands, often including their formats and responses.
• Troubleshooting: A flowchart to assist in diagnosing and resolving VAXBI-related problems.