VAX-11/750 Memory System Technical Description

This document, "VAX-11/750 Memory System Technical Description," published in September 1980, provides a detailed technical overview of the VAX-11/750's memory controller (L0011).

The L0011 memory controller serves as the interface between the CMI bus (used by devices like CPUs) and up to eight MS750 MOS memory arrays. It manages all memory operations, including:

• Read, Long-Word Write, and Byte Write Cycles: Facilitating data transfer to and from memory.
• MOS Memory Refresh: Periodically refreshing dynamic memory rows to preserve data.
• Power-On Initialization: Setting memory to a known state (all zeros with proper ECC) upon system startup.
• Error Checking and Correction (ECC): Detecting and correcting single-bit data errors, and detecting (but not correcting) double-bit errors. Error information is logged in Control/Status Registers (CSR0).
• Diagnostic Modes: Supporting various diagnostic functionalities (ECC disable, page mode, diagnostic check mode) for system testing.
• Bootstrap ROMs: Containing firmware essential for system startup.
• Battery Backup Option: Detailing the system's ability to retain memory contents during AC power loss.

The document describes the CMI bus architecture, data transaction protocols, address and control signal decoding, and the intricate internal logic for memory cycle sequencing, address selection, clock generation, and data handling. Appendices further detail specific gate arrays integral to the memory controller's functionality, such as the Memory Address Processor (MAP), Memory Data Loop (MDL), and Memory Error Correction (MEC) circuits.