KDJ11-A CPU Module User's Guide

This "KDJ11-A CPU Module User's Guide" provides comprehensive technical documentation for the KDJ11-A, a dual-height processor module designed for high-speed, real-time, multiuser, and multitasking LSI-11 type bus systems.

The document is structured into nine chapters and two appendices, covering:

1. Architecture: Details the KDJ11-A's core components, including its implementation of the complete PDP-11 integer and FP-11 floating-point instruction sets. It describes the full 22-bit memory management unit (MMU) with kernel, supervisor, and user protection modes, memory mapping capabilities (16-bit, 18-bit, and 22-bit virtual addressing), and associated registers (General Purpose, System Control, Memory Management, Floating Point). It also introduces the 8 Kbyte write-through direct map cache and self-diagnostic LEDs.

2. Installation: Provides guidance on configuring and physically installing the KDJ11-A module. This includes setting various jumpers for power-up options, HALT behavior, and boot addresses. It explains the functions of diagnostic LEDs for troubleshooting, outlines power-up and power-down sequences, and lists compatible and restricted LSI-11 hardware options and enclosures.

3. Console On-Line Debugging Technique (ODT): Describes the KDJ11-A's microcode-based debugging tool, which emulates a programmer's console. It explains how to access and use ODT, detailing its terminal interface, entry conditions, and command set for interacting with memory and CPU registers using 22-bit addresses.

4. Functional Theory: Offers an in-depth technical explanation of how the KDJ11-A works. This includes detailing the DCJ11 microprocessor, the cache data path, the state sequencer, I/O control circuits, and bus interface transceivers. It covers signal descriptions, bus transactions (NOP, read, write), and timing diagrams.

5. Extended LSI-11 Bus: Explains the characteristics of the LSI-11 bus, emphasizing the additional address lines for 22-bit addressing and 4 megabytes of main memory. It covers bus signal nomenclature, data transfer bus cycles (DATI, DATO, DATIO), Direct Memory Access (DMA) protocols, interrupt handling, system control functions, and electrical characteristics (signal levels, loading, termination).

6. Addressing Modes and Base Instruction Set: Details the KDJ11-A's instruction set and the various addressing modes it supports (single-operand, double-operand, direct, deferred, and PC-relative modes). It provides a comprehensive list of instructions, categorized by function (general, logical, program control, shift/rotate, multiple-precision, PS word operators, traps, miscellaneous, and condition code operators).

7. Floating-Point Arithmetic: Focuses specifically on the floating-point instruction set, its compatibility with FP11, and support for single and double-precision operations. It describes floating-point data formats (nonvanishing, zero, undefined variables), the floating-point status register (FPS), and exception registers (FEC, FEA), along with instruction addressing and accuracy considerations.

8. Programming Techniques: Discusses advanced programming concepts enabled by the KDJ11-A's architecture, such as position-independent code (PIC), effective use of stacks, subroutine linkage, interrupt service routines, reentrancy, coroutines, and recursion. It also covers programming peripherals and provides PDP-11 programming examples and looping techniques.

9. Boot ROMs and Diagnostics: Explains the system booting procedures, both automatic and manual, using the MXV11-B2 ROM set. It also details the error and help messages users might encounter and the diagnostic programs (XXDP+) available for verifying system functionality and isolating faults.

Appendices provide detailed instruction timing information and a summary of programming differences between the KDJ11-A and other PDP-11 processors.

In essence, the guide is a complete technical reference for understanding, installing, programming, and troubleshooting the KDJ11-A CPU module.