KD11-B Processor Maintenance Manual

This document is the KD11-B Processor Maintenance Manual, first published in January 1975 by Digital Equipment Corporation. It serves as a comprehensive guide for understanding, troubleshooting, and maintaining the KD11-B Processor, which is a core component of the PDP-11/05/10 and PDP-11/05S computer systems.

The manual is structured into five main chapters:

1. Introduction: Provides an overview of the KD11-B processor's role (Unibus control, arithmetic/logic operations, instruction execution) and the manual's organization, listing other related technical documents.
2. Microprogram Control: Explains the microprogrammed architecture of the KD11-B, contrasting it with conventional control. It details the structure of the control store (ROMs), how conditional branching within microroutines works, the microprogram flow (including instruction interpretation, Unibus control, interrupts, traps, and console functions), and provides symbolic and binary listings of the microprogram for debugging.
3. Console Description: Describes the console's logic and operation, including the address/data register (switches, display, multiplexer, clock, counter) and control switches (LOAD ADRS, EXAM, CONT, DEP, START, HALT/ENABLE). It also covers features like bounce buffers, panel lock mode, and power loss handling.
4. KD11-B Detailed Description: This is the most extensive section, detailing the logic and physical implementation of the processor's key components:
   • Data Path (DP): Centered around an Arithmetic Logic Unit (ALU) that performs Boolean and arithmetic operations, fed by various registers like the A-Multiplexer (AMUX) and B-Register (BREG).
   • Control Logic (DPC): Explains how ROMs are used as generalized gates to implement the processor's control functions.
   • Memory and Registers: Covers the Scratch Pad Memory (SPM), Processor Status Word (PSW), and Constants Generator.
   • Instruction Handling: Details instruction decoding, processor clock timing, and Unibus control (data transfers like DATI, DATIP, DATO, byte operations, bus error detection).
   • Peripheral Interfaces: Describes the Serial Communications Line (SCL) and Line Clock, including their operation and baud rate adjustments.
   • Power Management: Explains the power fail/auto restart circuitry.
5. KD11-B and Console Maintenance: Offers practical techniques for isolating and repairing failures. It outlines the use of diagnostic programs, categorizes failure types, lists suggested test equipment, provides general troubleshooting procedures, and details specific adjustments for the processor and SCL clocks. It also explains the function and use of the KM11 Maintenance Panel for single-step debugging and guides users on console maintenance procedures.

The document is intended for technical personnel involved in the maintenance and repair of the KD11-B processor, providing deep insights into its microarchitecture and operational specifics.