KA680 CPU Module Technical Manual

This Technical Manual provides comprehensive documentation for the KA680 CPU Module, including information related to the MS690 memory expansion modules and the H3604 console module. Designed for the VAX 4000-500 product, it covers functional, physical, and environmental characteristics.

The manual is structured into three main parts:

1. Overview and Installation: Introduces the KA680 CPU module, its components (NVAX CPU, cache RAMs, NCA, NMC, SSC, SGEC, SHAC, CQBIC, Firmware ROMs), and its role as an arbiter CPU on the Q22-bus. It details the physical installation and configuration procedures for the KA680, MS690 memory, and H3604 console modules, including aspects like DSSI cabling and device naming.
2. Architecture: Delves into the technical specifics of the module's subsystems:
   • Central Processor: Describes the NVAX CPU (DC246), its instruction set, data types, processor state (registers, PSL, IPRs), memory management (translation buffer), interrupts, exceptions, and CPU references (NDAL transactions).
   • Cache Memory: Provides an overview of the 3-level cache architecture (Virtual Instruction Cache, Primary Cache, Backup Cache), explaining their organization, operation modes, and error handling.
   • Main Memory System: Details the NVAX Memory Controller (NMC) and GMI memory interface chip (GMX), outlining their support functions, transaction handling (NDAL and NMI), error checking, and memory organization.
   • I/O Subsystem: Explains the NVAX CP-bus Bus Adapter (NCA), its architecture, addressing, and interfaces to DSSI mass storage, Ethernet, and Q22-bus, along with its error handling.
   • Console Line and TOY Clock: Describes the console serial line registers, baud rate, interrupts, and the time-of-year clock and programmable timers.
   • Boot and Diagnostic Facility: Covers the boot and diagnostic registers, EPROM memory (resident firmware operations and power-up modes), battery-backed RAM, and system initialization processes.
   • Q22-bus Interface: Explains address translation, interprocessor communications, interrupt handling, and error reporting specific to the Q22-bus.
   • Network Interface: Provides an overview of Ethernet, the SGEC controller, programming details, and support for CSMA/CD counters and events.
   • Mass Storage Interface: Introduces the SHAC host adapter chip and its role in the CI-DSSI interconnect.
3. Appendices: Offers detailed reference information on NVRAM partitioning, data structures, error messages, machine state on power-up, MOP support, Q22-bus specifications, general module specifications (dimensions, connectors, power, operating conditions), VAX Instruction Set, and address assignments.

The document serves as a critical resource for understanding, installing, configuring, diagnosing, and maintaining the KA680 CPU module in VAX systems.