DSV11 Communications Option Technical Description

This document, "DSV11 Communications Option Technical Description" (Order Number EK-DSV1M-TD-001, June 1988), provides a comprehensive technical overview of the DSV11 synchronous communications controller for Digital Equipment Corporation's Q22-bus systems.

Key aspects covered include:

1. Overview and Features: The DSV11 is a controller capable of handling two independent communication lines simultaneously, supporting various speeds and protocols. It's available in two forms: DSV11-S (a single quad-sized module) and DSV11-M (a module with a separate distribution panel). Key features include compatibility with numerous interface standards (e.g., RS-232-C/D, RS-422/423, V.24/V.35), full modem control, and support for synchronous protocols like DDCMP, HDLC, SDLC, and IBM BISYNC with 16-bit CRC.

2. Architecture and Control: The DSV11 is controlled by a 68000 microprocessor running ROM-based firmware. It interfaces with the Q22-bus via a QIC (Q-bus Interface Chip) and uses Direct Memory Access (DMA) for data transfer between the host system's memory and its internal data buffers. Serial communication is managed by an 8530A Serial Communications Controller (SCC) and an 8237A-5 DMA Controller (DMAC). An internal "backport bus" connects these main components to the buffer RAM.

3. Programming Interface: The document details the programming model, explaining how the host system interacts with the DSV11. This is primarily done through four Q22-bus I/O registers (Flag Register, Command Memory Address Register, Command Memory Data Registers) and a "command list" structure. The command list consists of linked 32-byte elements, each containing a command function (e.g., transmit data, initialize channel, reset channel, report status), channel number, status, buffer information, and parameters. The DSV11 converts completed command blocks into response blocks to report status.

4. Physical and Functional Description: It outlines the physical dimensions and connections of the DSV11 module, including serial line receiver and transmitter devices. The functional description provides block diagrams and explanations of internal data paths, clock multiplexing, EOP (End Of Packet) detection, and byte-word multiplexing for data handling.

5. Maintenance and Diagnostics: The manual describes the self-test procedures initiated on power-up or reset, including error codes reported to the host. It details the use of MicroVAX Diagnostic Monitor (MDM) tests (verify mode, service mode, cable tests) for troubleshooting and fault isolation. Practical troubleshooting notes for specific cable types and issues are provided, along with a list of field-replaceable units (FRUs).

Appendices provide in-depth reference material on communication protocol details (SDLC/HDLC, DDCMP, BISYNC), electrical and environmental specifications, descriptions of the main integrated circuits (68000, 8530A, 8237A-5), Q-bus interface specifics, connectors and cables, floating address assignments, and a glossary of terms.