PDP-9 Extended Memory Checkerboard

This document describes the PDP-9 Extended Memory Checkerboard diagnostic, a program designed to verify the operational status of core memory. It specifically tests for core failures on half-selected lines under worst-case noise conditions. The diagnostic can test any memory configuration from 8K to 32K words, in 4K segments, using eight distinct data patterns across four tests (each pattern and its complement).

The program's core testing methodology involves writing a pattern, performing a series of read/complement/write cycles on each memory location (16 times without error checking, then 4 times with error checking on the second read), and repeating this with random stalls. It automatically relocates itself between 4K memory fields to test all specified memory, preferring to avoid fields that have previously shown errors.

Operators interact with the program via the teletype keyboard to specify test limits (the first and last 4K fields to test). Auxiliary Control Switches (ACS) provide extensive control over the diagnostic, allowing the operator to:

• Halt the program after a test or error printout (ACS 0).
• Inhibit error printouts and halt on error (ACS 1).
• Sound a TTY bell on error (ACS 2).
• Select specific tests (ACS 3-6).
• Inhibit or force program relocation to a specific 4K field (ACS 9 and ACS 12).
• Suppress the "PROGRAM IS IN FIELD" message (ACS 11).
• Initiate a "Scope Loop" for continuous testing of a user-defined address range with no error checking (ACS 13).
• Suppress error printouts for specific bit positions (ACS 14).

When errors are detected, the program prints detailed information including the test number, octal address, expected ("GOOD") data, actual ("BAD") data, and the pattern control word. The program is self-starting after loading and typically takes about 30 seconds to complete all four tests on a single 4K memory field. It emphasizes using ACS 0 for halting rather than the STOP key to ensure predictable operation.