IO Initialization

Minimal Configuration (Parts 1 & 2)

Order Number: XX-D1D82-2D

This document is an assembly language listing, likely for a system initialization routine, divided into two main parts: "IOINI1 - IO Initialization Part 1" and "IOINI2 - IO Initialization Part 2," both pertaining to a "Minimal Configuration."

Part 1 (IOINI1) primarily focuses on defining foundational system elements and setting up core I/O functionalities. It includes macros for defining system parameters like name, date, version, and custom tape drives, as well as an ACPDL macro for configuring PI (Program Interrupt) channels. The document details the system's I/O architecture, defining interrupt service routines and assigning devices (such as APR, CTY, SCN, and DTC) to specific PI channels. Critical sections are dedicated to generating save and restore routines for these channels to manage accumulator contents and program device lists. Furthermore, it outlines system data storage, allocating memory for variables related to job control, user data, device availability flags, and error counters for each I/O channel. The initialization process is defined, including calls to device-specific initialization routines and clock setup, alongside clock control parameters and byte pointers for accessing system data.

Part 2 (IOINI2) builds upon these foundations by detailing the structure and assembly of various device-specific data blocks crucial for the minimal configuration. It reiterates the system configuration parameters and defines APR (Automatic Program Restart) PI bits for interrupt control. A significant portion is dedicated to the SCNDDB macro for console/TTY device data blocks, defining their structure and parameters. Similar data blocks are specified for Magnetic Tape, Dectape, Line Printer, Card Reader, Paper Tape Reader, and Paper Tape Punch devices, each outlining their unique configurations, I/O parameters, and linkages. The document also describes a general mechanism for generating and linking these device data blocks into a system-wide chain and includes parameters for core allocation and tracking system memory usage.

XX-D1D82-2D
2000
39 pages
Quality

Original
2.2MB

OCR Version
2.2MB

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