PDP-6 Instruction Manual

This instruction manual details the maintenance of two PDP-6 memory types: the Fast Memory Type 162 and the Core Memory Type 161C.

The Introduction (Chapter 1) provides a general description of both memories, including their operating specifications and physical/electrical characteristics. It outlines three types of memory access (Read, Write, Read-Write) and explains system organization, addressing (18-bit addresses selecting 16K memories), and memory interleaving. The Fast Memory is a rapid, volatile scratchpad using flip-flop registers, while the Core Memory is a slower, non-volatile storage utilizing ferromagnetic cores, requiring a full read-write cycle for each access. Physical dimensions, power requirements, and logic levels are also detailed.

Fast Memory Type 162 (Chapter 2) focuses on the logic, addressing, and timing sequence of the Fast Memory. It uses 16 flip-flop registers, allowing immediate response and non-destructive readout. It is designed for exclusive access by a single processor.

Core Memory Type 161C (Chapter 3) describes the core memory's control logic, address and data buffers (CMA, CMB), and its timing sequence, which includes a priority network for handling requests from multiple processors. It explains how interleaving can reduce processor waiting time. The chapter also covers the core logic's drive and sense circuits, addressing within 4K stacks, read-write switches, inhibit logic, and sense amplifiers.

Circuits (Chapter 4) delves into the specialized circuits for the core memory, such as Memory Drivers, Read-Write Switches, Inhibit Drivers, Inhibit Field Selects, Sense Amplifiers, Master Slice Control, and Memory Power Supplies.

Maintenance (Chapter 5) provides comprehensive guidelines for preventive and corrective maintenance. It lists required test equipment and describes "Maindec" diagnostic programs used for checking fast and core memories. Maintenance schedules (daily, weekly, 500-hour, 1000-hour) are provided, along with power supply output specifications and troubleshooting procedures for various malfunctions (e.g., logic errors, shorted diodes, single-bit errors). Key adjustments for read-write current, inhibit current, sense amplifier clamp level, and read strobe timing are also detailed.

Chapter 6 (Engineering Drawings) contains reduced engineering drawings and information on semiconductor substitutions, while a Glossary defines technical terms and prefix codes used throughout the manual.