This document describes the Digital Equipment Corporation (DEC) Programmed Data Processor-6 (PDP-6), a general-purpose digital computing system designed for large-scale scientific data processing. Introduced in 1965, the PDP-6 emphasizes modularity and flexibility, allowing users to customize and expand their system configurations.
Key hardware features include a 36-bit word length, 16 index registers and/or accumulators, and core memory expandable up to 262,144 words with a 1.75 µsec cycle time, complemented by faster 0.4 µsec memory modules. The system supports asynchronous operation, memory overlap, and up to 128 input-output devices managed by a seven-channel priority interrupt system. The Type 166 Arithmetic Processor is a 36-bit unit featuring built-in floating point arithmetic, byte operations, and memory protection/relocation registers essential for time-sharing operations. The PDP-6's architecture is based on processor-memory and processor-input/output busses, facilitating direct memory access, memory cycle overlap, and multiprocessor capabilities. A comprehensive range of peripheral equipment is available, including DECtape, magnetic tape, card readers, printers, display systems, drum processors, and analog-to-digital converters.
The programming system is specifically designed for time-sharing, enabling multiple users to concurrently prepare, debug, and execute programs. It consists of a supervisory control program (monitor), system programs, and a robust library of routines. Core software components include a Symbolic Assembler and Macro Processor (MACRO-6), FORTRAN II and FORTRAN IV compilers, and debugging aids (DDT). The supervisory program oversees command processing, program scheduling, resource allocation (including I/O devices and memory), and I/O control, ensuring efficient resource management in a multi-user environment. The system's design streamlines program development by minimizing the need for off-line conversions and supporting on-line programming and debugging.
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