Instruction Manual Drum Processor Type 167

This document serves as an instruction manual for the Digital Equipment Corporation (DEC) Type 167 Drum Processor (DP). Its primary function is to facilitate high-speed, direct data transfer between an input/output (I/O) device and the random-access memory of a modular PDP-6 system, handling characters of various sizes at up to 4 MHz.

The 167 DP is typically housed in a single-bay cabinet, complete with register and status indicators, an integral power supply, and a cooling system, utilizing standard DEC FLIP CHIP™ modules for its logic circuits. Key functional units include an AP/DP Interface for communication with the Arithmetic Processor, an 18-bit Memory Address Register (MA) and Word Counter (WC) for managing memory locations and transfer counts, and Buffer (BR) and Shift (SR) Registers for buffering and assembling/disassembling 36-bit words. Auxiliary controls like SR Shift Controls (SRSH), Character Counter (CHC), SR-BR Controls (SBC), and Memory Controls (MC) coordinate the intricate data flow, shifting operations, and memory access cycles.

Operation involves a programmed setup from the Arithmetic Processor using CONO and DATAO instructions to specify data transfer direction, word count, and initial memory address. Data transfers occur asynchronously, with the DP requesting an interrupt upon completion. The manual details system flow, timing diagrams, and provides specifications including physical dimensions, weight, power requirements (115 VAC, 60 cps), and operating temperature range. It also covers programming instructions and outlines maintenance procedures, emphasizing reliance on the Type 166 Arithmetic Processor Maintenance Manual, diagnostic programs, and console controls. Engineering drawings and conventions are included for detailed understanding and servicing.