PDP 12 Detailed Flow Diagrams

This document contains detailed flow diagrams illustrating various operational sequences for the PDP-12 computer system. It provides a low-level technical reference by breaking down complex processes into sequential steps, including control signals, register operations, and decision points.

The document is organized into the following major sections:

• Multiply: Outlines the fetching, decoding, deferring, and execution phases of multiplication, handling different data types and signs.
• Data Break: Details the direct memory access (DMA) mechanism, including break requests, word count management, and data transfer.
• Linc Shift and Rotates: Explains the micro-operations for shifting and rotating register contents, specifically for LINC instructions.
• Power Up: Describes the system initialization sequence upon power activation, involving clearing states and setting up basic functions.
• Key I/O Preset: Documents the actions performed when the "Key I/O Preset" switch is activated, primarily for resetting processor states and I/O conditions.
• Key Fill: Shows the procedure for manually loading data into memory using the "Key Fill" switch.
• Key Exam: Illustrates the process of examining memory contents via the "Key Exam" switch.
• Key Fill Step: Details the single-step execution mode for memory filling operations, allowing for precise control.

Overall, this document is a comprehensive guide to the internal control logic for these fundamental PDP-12 operations, essential for system understanding and maintenance.