A PDP-11/40E Microprogramming Primer

Order Number: XX-5BECB-45

This document serves as an introductory tutorial and reference for microprogramming on the PDP-11/40E system, developed at the University of Minnesota's microprogramming laboratory. The PDP-11/40E is an enhanced PDP-11/40 minicomputer, extended with a Writable Control Store (WCS 11/40).

The WCS 11/40 enables user microprogramming, extends the processor's data manipulation capabilities, and allows microprograms to control all functional hardware units. This includes defining new machine language instructions or altering the basic PDP-11 instruction set by utilizing unused op-codes.

The report details the PDP-11/40's (KD11-A processor) architecture, including its UNIBUS structure, registers, instruction formats, and its 56-bit horizontal microinstruction format. It then describes the WCS 11/40, which features a 1K 80-bit RAM control store (also usable as a 5K 16-bit data scratchpad), a 16-word stack, and specialized units like a shift/mask and carry control.

The integration of the WCS 11/40 extends the KD11-A's microinstruction format to 80 bits and expands the control store address space from 256 to 2K words. The interface between the KD11-A and WCS 11/40 leverages existing data paths (DMUX BUS, RD BUS) and control signals. The WCS 11/40 includes a PROM for bootstrap microcode, facilitating RAM loading and directing control transfers for unused PDP-11 op-codes to user-defined microprograms in the RAM control store. The document also explains the mechanisms for RAM read/write operations and stack management within this extended architecture.

XX-5BECB-45
July 1978
40 pages
Quality

Original
2.2MB

Site structure and layout ©2025 Majenko Technologies