rtVAX 300 Hardware User's Guide

This document is the "rtVAX 300 Hardware User's Guide" (Order Number EK-382AB-UG-002), a comprehensive technical manual for the rtVAX 300 processor. It is intended for hardware and software technical personnel who design and program subsystems and configurations based on this processor.

The guide provides detailed technical and physical specifications, and information necessary for configuring the rtVAX 300 into various host and target systems. Key areas covered include:

• Processor Overview: Description of the rtVAX 300 processor, its central processor, floating-point accelerator, Ethernet coprocessor, system support functions, and resident firmware.
• Technical Specification & Hardware Architecture: Detailed functional descriptions, hardware configuration, bus connections, pin and signal descriptions, memory and I/O space, bus cycles, and in-depth hardware architecture of the central processor, cache, and Ethernet coprocessor.
• Firmware: Information on system firmware ROM format, console programs, entity-based modules, and diagnostic operations.
• Interfaces: Dedicated sections explain the memory system interface (speed, RAMs, parity, cache control), console and boot ROM interface, network interconnect (DECnet, Ethernet, ThinWire, Thickwire), and general I/O device interfacing (interrupt structure, DMA, Digital Signal Processor applications).
• Appendices: Supplemental information on physical, electrical, and environmental characteristics, acronyms, address assignments, and programming samples for user boot/diagnostic ROMs and setup frame buffer creation.