PDP11 15 KC11 Block Diagram

This document is a block diagram for the KCII, a component designed for the PDP-11 UNIBUS system.

The diagram illustrates the major functional blocks and their interconnections, encompassing:

1. UNIBUS Interface: Connections to the PDP-11 UNIBUS for data (bits 15-8 and 7-0), address decoding, priority, and bus requests, managed by dedicated bus interface and control units.
2. Console Interface: Components for user interaction and system status, including address and data displays, a switch register, control displays, and switches, all connected through a bus and console control unit.
3. Data Paths: Core processing elements like an Adder & Rotate/Shift unit (likely an ALU) and associated input gating and latches, along with special trap markers.
4. Registers: A central block of general-purpose and special-purpose registers (R0-R6, Stack Pointer (SP), Program Counter (PC), Temp, Source, and Unused registers) for data storage and manipulation.
5. Control Logic: An Instruction Register (IR) and its decoder for interpreting commands, a timing and states unit (including basic clock and state shift registers), and various control units for data paths, registers, states, and flags.
6. Status and System Management: A status register providing priority and condition codes, along with an optional power fail restart mechanism.

The diagram explicitly notes that it depicts only major data flows, with numerous control signals also interconnecting the blocks, implying a high-level functional overview rather than a detailed circuit schematic.