This document is the DF10 Data Channel Maintenance Manual (DEC-10-18BA-D) from June 1968, produced by Digital Equipment Corporation for the PDP-10 System.
The manual provides comprehensive information for the installation, operation, and maintenance of the DF10 Data Channel Unit. The DF10 is an optional transfer device that facilitates data movement between I/O devices and the PDP-10's core memory. It allows up to eight I/O devices to connect to the memory bus, with one device communicating at a time on a first-come, first-served basis. The DF10 functions as an I/O processor, handling data transfers independently once initialized by the program.
Key aspects covered include:
- Operation and Programming: Describes how the DF10 is initiated by I/O devices, the format and evaluation of control words (which specify data address and word count), and the functions of the indicator panel. It also details how devices can write control words and specify even parity for maintenance checks.
- Principles of Operation: Explains the detailed logic behind the DF10, including initial setup, control word fetching and evaluation, and data transfer processes (read/write cycles). It outlines the various signals exchanged between the I/O device and the data channel for communication and control.
- Maintenance: Divided into preventive (periodic checks, cleaning, power supply verification) and corrective (system troubleshooting, signal tracing, handling intermittent failures) maintenance procedures.
- Physical Specifications: Details the dimensions, weight, power requirements, maximum transfer rate (10^6 words/second), and environmental conditions for the DF10 unit.
- Engineering Drawings: Lists and explains the terminology, logic symbols, logic levels, and FLIP-CHIP pulse characteristics used in the associated engineering drawings (found in the PDP-10 Peripheral Device Engineering Drawing Set).
The manual assumes the reader has familiarity with DEC's logic symbology and the general operations of PDP-10 processors and connected devices.