MG10 Schematic Jun75

This document, titled "MGIO Engineering Drawings" by Digital Equipment Corporation (copyright 1975), is a comprehensive technical manual for the MG10 Core Memory system. It details the design, construction, operation, and testing of the memory unit, including variations for 32K, 64K, and 128K Core Memory configurations.

The document includes:

• Drawing Directories and Indexes: Providing an exhaustive listing of all included engineering drawings, specifications, parts lists, and unit variations.
• System Architecture: Detailed mechanical assembly breakdowns and illustrations of the physical structure, from the main cabinet and its panels to internal sub-assemblies like cooling systems, backplanes, and stack logic.
• Electrical Design: Extensive schematics covering memory cycle flow, detailed timing diagrams (for read/write cycles, stack operations, and general timing), data and address pathways (registers, transceivers), port request and priority control logic, sense/inhibit circuits, X-Y drive mechanisms, and error detection systems (parity check, check logic).
• Power Management: Schematics and wiring diagrams for various power supplies (H7420, H744, H754, H770), voltage regulators, power line monitoring, and the integrated 857/858 Power Control unit.
• Interconnections & Components: Diagrams and listings for internal cables, jumpers, flexprint connectors, the memory bus interface, and various external components like indicator drivers and SBUS terminators.
• Configuration & Options: Information on jumper settings for system configuration and a dedicated engineering specification for the "MG10-G Additional Access Port Option."
• Testing Procedures: Specifications for memory system acceptance tests and diagnostic tests to ensure proper functionality and data integrity.

Overall, the document serves as a complete technical reference, encompassing the mechanical, electrical, and functional aspects necessary for understanding, manufacturing, and maintaining the MG10 Core Memory system.