Dolphin Communications Unit Record Plan Feb79

This document, dated February 28, 1979, outlines the "Dolphin Communications/Unit Record (Comm/UR) Plan," which proposes leveraging hardware developed for the "Hydra" project (a high-availability, high-data-integrity multiprocessor system based on Comet) to meet Dolphin's I/O requirements.

Core Solution & Benefits: The plan centers on utilizing the Hydra/Mercury hardware, including an ICCS (Interprocessor Communication and Control System) bus and a Mercury Comm/UR box equipped with F11-based microcontrollers and various line unit modules. This is expected to provide Dolphin with:

• High Availability & Data Integrity: New hardware with parity on buses, redundant paths, external cabling for EMI/RFI, and power-on line card replacement.
• Cost-Effectiveness & Performance: Use of the latest LSI processor and communication chips, a low-overhead high-speed CPU interconnect, and microcontrollers to offload processing from the host CPU. This is projected to reduce host CPU overhead significantly (e.g., from 66-70% on current KL systems to 19-21% on Dolphin).
• Modularity & Scalability: Support for a wide range of asynchronous and synchronous lines (e.g., up to 128 async, 6 sync for hi-availability systems) and unit record devices (card readers, line printers). Line cards are designed for power-on replacement.
• Superior Cost/Performance: Dolphin/Mercury hardware is estimated to offer 6 to 9 times better cost/performance compared to the existing KL system, alongside improved Reliability, Availability, Maintainability, and Performance (RAMP).

Implementation & Architecture: The Dolphin Comm/UR I/O relies on Hydra/Mercury hardware for high-availability features and an ICCS port adapter for the Dolphin bus. The ICCS bus is a 5-10 Mbyte/sec packet-oriented contention bus. The Mercury communication subsystem includes an I/O Subsystem (Link, Miniport, Microcontrollers, Memory modules) and a Line Card Assembly. Three line card types (RS-232-C Sync/Async, CCITT V.35 Sync, depopulated RS-232-C Async) will be available at First Customer Ship (FCS), with two more (DMCl1-style modem, RS-422/423) planned later.

Schedule & Staffing: Key milestones include Mercury Spec (March 1979), Hardware Design Done (July 1979), Dolphin Mercury Proto Available (April 1980), Proto Mercury/ICCS Running (December 1980), and FCS targeted for June 1981. Staffing is allocated across hardware and software teams.

Risks & Dependencies:

• High Risk: The Hydra hardware is all-new, and the development in Tewksbury appears "disorganized," posing a significant risk.
• Specific Risks: Potential failure or delays of the ICCS bus or Mercury Comm/UR box, delays in staffing for the ICCS bus adapter, worse-than-expected synchronous performance (especially with added DECNET functionality), and memory constraints (256KB or 64K RAM availability).
• Dependencies: Successful and timely development of the ICCS bus (in Tewksbury, currently without a manager), Mercury/Hydra hardware, and the Dolphin/ICCS port adapter (developed in Marlboro).

Unresolved Issues: A substantial list of technical issues remains, including final memory size for controllers, ICCS bus bandwidth, detailed design of various components (Link, ICCS bus, Mercury controller, line cards), software partitioning (e.g., sharing code with Hydra, TTYSER integration), and the impact of expanded DECNET functionality.

Backup Plan: An alternative "original Dolphin Comm/UR plan" (using Unibus-based KMC, DUP, DZ11, LP20, and CD20 devices) exists as a backup. However, this backup plan compromises Dolphin's goals for performance, data integrity, availability (many single-point failures, no live line-card replacement), and high-speed inter-CPU link functionality. A decision between the primary (Hydra/Mercury) and backup plan is required by June 1979.