This document is a highly technical, multi-page listing that details the low-level microcode and firmware specifications for a computer system, likely a mainframe or minicomputer.
It serves as a comprehensive reference guide, defining:
- Memory Maps and Register Usage: Specifies memory addresses for system-level data (e.g., reserved regions, page fail words, MUUO flags) and outlines the functions of various registers (e.g., PC FLAGS, AC-OP, PMA, TIME).
- Arithmetic Logic Unit (ALU) Operations: Provides detailed definitions for ALU functions, shift operations, two's complement arithmetic, and specific operations like multiply and divide, including their associated bit fields and default values.
- Control Flow and Instruction Definitions: Describes various console commands, jump operations, call/return sequences, conditional branching, and a wide array of specific instructions for data manipulation, memory access, and program control (e.g., MOVE, ADD, SUB, MUL, DIV, ASH, LSH, ROT).
- Interrupt and Error Handling: Details the architecture's approach to managing interrupts (Priority Interrupt System, TTY receiver interrupts, dataset change interrupts), processor halts, memory errors (e.g., memory fault, bus error, NXM), and page faults.
- Input/Output (I/O) and Memory Management: Defines routines for reading/writing to memory, managing command and response buffers, handling I/O operations, and implementing paging mechanisms.
- System Initialization and Testing: Includes routines for initializing registers, performing system tests, and verifying hardware components.
The document essentially lays out the intricate workings of the system's core processing and memory units at a very granular, machine-specific level, referring to systems like TOPS10, TOPS20, AMD2904, and specific hardware components (e.g., 2910, 2914, 8628).