prelimKS10 fsRef

This document is a confidential reference manual titled "TITLEIKS1® REFERENCE MATERIAL" for a KS10 system. It contains information gathered from existing documentation, condensed here, and also includes new and preliminary material intended for a pilot training seminar. The document is proprietary and should not be disseminated to non-DIGITAL personnel. Suggestions and corrections are welcomed and should be directed to the KS10 Field Service Documentation Team.

The document provides detailed descriptions and block diagrams for various components and operations of the KS10 system, including:

• General System Information: KS10 Backplane, Parity Generation and Checking, and Bus.
• CPU: Data paths, block diagrams for CRA, CRM, and internal registers, CPU board descriptions, microcode definitions and operations, clocks, and basic CPU functions like memory fetch and cache hit descriptions.
• Console: Console module block diagram, general information, commands, bus arbitration, register details, and error codes.
• Memory: MOS memory block diagram, status register bit definitions, logic descriptions (write, read-pause-write, refresh, read cycles).
• Unibus Adapter (UBA): Unibus to KS10 adapter, wrap-around test, and signal pins.
• Power System: KS10 power distribution and L.H power supply.
• Miscellaneous: Device address and vector assignments, external registers, and drive command function codes.

The document is for internal use and explicitly states "DO NOT DUPLICATE."