KS703

This document is a Table of Contents and Cross-Reference Listing for KS10 Microcode V124, dated July 27, 1984.

It outlines the structure and components of the microcode, including:

• Revision History: A detailed log of changes and fixes made to the microcode over time.
• Microcode Field Definitions: Explanations of how to interpret microcode fields, labels, comments, and macro definitions.
• Register Usage: A breakdown of how various registers (e.g., PC, AR, ARX, BR, BRX, EBR, UBR, PI, FLG) are utilized within the 2901 processor architecture.
• Microcode Field Sections: Detailed definitions and functions of various microcode fields, such as Data Path Chip, RAM File Address and D-Bus, Parity Generation & Half Word Control, SPEC, Dispatch, Skip, Time Control, Random Control Bits, and Number Field.
• Macros: Definitions of macros used for Data Path Chip operations (General, Q, Misc.), Microcode Work Space, Memory Control, VMA, Time Control, SCAD/SC/FE Logic, Data Path Field Control, Shift Path Control, Special Functions, PC Flags, Page Fail Flags, Single Skips, and Special Dispatch Macros.
• Dispatch ROM Definitions: Listings for instruction processing, including the instruction loop (start, fetch arguments, store answers), various instruction groups (Move, Exch, Halfword, Boolean, Rotates and Logical Shifts, Test, Compare, Arithmetic Skips, Conditional Jumps, AC Decode Jumps), and Extended Addressing Instructions.
• Subroutines: Detailed listings for various subroutines covering Stack Operations (PUSHJ, POPJ, ADJSP), Subroutine Call/Return (JSR, JSP, JSA, JRA), Illegal Instructions and UUO's, Arithmetic (ADD, SUB, MUL, DIV, DADD, DSUB, DMUL, DDIV), Byte Group Operations (IBP, ILD8, LDB, IOPB, DPB, Increment Byte Pointer, Byte Effective Address Evaluator, Load/Deposit Byte in Memory, Adjust Byte Pointer), BLT Bytes, Floating Point Operations (FAD, FSB, FMP, FDV, FLTR, FSC, FIX, FIXR, Normalize, Round Answer, DFAD, DFSB, DFMP, DFDV), Extended Instruction Set Decoders, Move/Compare/Edit String Operations, Decimal/Binary Conversion, and various Internal Device controls.
• Traps and Interrupts: Sections on Trap handling, Priority Interrupts, External I/O Instructions, and Small Subroutines.
• UMOVE and UMOVEM: Instructions for block memory transfers.
• WRITE HALT STATUS BLOCK: Logic related to writing halt status information.
• PAGE FAIL REFIL LOGIC: Logic for handling page faults and reloading page tables.
• Cross-Reference Index: An index for DCODE and UCODE locations.

The document appears to be a comprehensive reference guide for understanding and working with the KS10 Microcode, providing definitions, functional descriptions, and a detailed table of contents for navigation.