This document is the DECsystem-10 KI10 Central Processor Maintenance Manual, published in October 1973 by Digital Equipment Corporation. Its primary purpose is to aid service personnel in the operation and maintenance of the KI10 central processor and its associated basic input-output devices.
The manual is structured to provide comprehensive information, starting with a general system description and progressing to detailed hardware logic and maintenance procedures. Key areas covered include:
- Physical and Electrical Characteristics of the KI10 system.
- Logical Organization outlining the processor's control, memory interface, arithmetic logic, and input-output functions.
- Operational Aspects, detailing the use of processor control panels, indicators, operating keys, switches, and console I/O equipment (reader, punch, teletypewriter).
- Conventions and Notation for understanding the technical documentation, including logic drawings and flowcharts.
Detailed System Logic, with dedicated chapters on:
- Control: Basic control elements, processor cycles (instruction, fetch, execute, store, page fail), trap logic, and mode control.
- Memory Logic: Memory data, addressing, associative memory, page checking, and memory control.
- Arithmetic Logic: Adders, registers (AR, BR, MQ), extensions, and shift-count logic.
- Instruction Flow: Execution sequences for various instruction types, including data transmission, control/test, fixed-point arithmetic, and single/double precision floating-point arithmetic.
- Input-Output: I/O transfer control, priority interrupt system, and interfaces for basic I/O devices.
Maintenance Information, including guidance on using engineering drawings, maintenance operations, adjustments, and diagnostic programs.
- Appendices provide instruction and device mnemonics, word formats, ASCII code, and diagrams of the processor control panels.