KI10 PrelimMaint 1972

Order Number: XX-FFF12-2C

This preliminary manual, published in 1972 by Digital Equipment Corporation, serves as a detailed guide for service personnel on the operation and maintenance of the KI10 Central Processor within the DECsystem-10 computing system.

The document provides a comprehensive overview of the KI10, focusing on its core functions and associated basic input-output devices (reader, punch, and teletypewriter). It begins with an introduction to the physical and electrical characteristics, followed by an explanation of the system's logical organization, covering control, memory interface, arithmetic logic, and input-output mechanisms. It also details operational procedures, including the use of control panels and console I/O equipment.

The bulk of the manual is dedicated to an in-depth description of the system's logic and hardware. This includes the processor's timing (clock, time states, instruction, fetch, execute, store, and page fail cycles), instruction decoding, program counting, address bus management, and the functioning of fast memory. Memory logic is covered extensively, detailing memory data handling, addressing, associative memory, page checking, and memory control/subroutines. The arithmetic logic describes the adders (AD, ADX), various registers (AR, BR, MQ, SC, FE), and their roles in computations. The input-output section details the I/O transfer control, bus operations, basic I/O logic, and the priority interrupt system.

The manual also dedicates a chapter to the conventions and notation used in its logic drawings and flow charts, which is essential for understanding the detailed technical descriptions. Appendices include instruction and device mnemonics, ASCII code, word formats, and diagrams of the processor's control and indicator panels. Notably, a chapter on advanced maintenance procedures (Chapter 10) is indicated as "to be supplied," highlighting the preliminary nature of this document.

XX-FFF12-2C
May 1972
160 pages
Quality

Original
12MB

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