KC10 PortHardware Nov82

Order Number: XX-F7ED9-54

This preliminary information package, dated November 12, 1982, describes the hardware and initial functional details of an "intelligent" Port designed for the KC10 computer system. The core purpose of this port is to offload real-time I/O processing from the main CPU, acting as a specialized interface to various peripherals and networks.

Each KC10 port functions as an independent, microcode-controlled computer, typically comprising two main modules: a Port Processor and a Port Data Mover, supplemented by adapter-specific modules (e.g., for Cluster Interconnect - CI, or Network Interface - NI ports).

  1. Port Processor:

    • A small, microcode-controlled computer, utilizing AMD 2901s for its CPU and a 2910 for microprogram sequencing.
    • It executes instructions from command queues stored in the KC10's main memory, performing control functions and managing read/write operations to both KC10 main memory and its local "RAMFILE" (1K x 36 bits of memory).
    • It interfaces with the system's TTL I/O bus and the Peripheral Link Interface (PLI).
    • Its detailed operation is defined by a 68-bit microword format, which specifies control over data paths, addressing, and other functions.
  2. Port Data Mover:

    • A specialized Direct Memory Access (DMA) engine, also microcode-controlled with a 2910 sequencer (1K x 44 bits of CRAM).
    • It acts as a slave to the Port Processor; once initiated, it autonomously handles block data transfers between the port adapters (via the PLI) and the KC10's system memory (via the TTL I/O Bus).
    • It supports various data packing and unpacking modes (e.g., core dump, high density, industry compatible, 7-bit ASCII) and includes logic for data formatting, buffering, and parity checking.
    • Its functionality is defined by a 44-bit microword.

The document provides extensive detail on the data paths within both modules, their microcode instruction formats, and how they interact with the I/O bus, PLI, and internal memory. It explicitly states its preliminary nature, with several sections (e.g., error handling, specific CI/NI port functional descriptions, MSCP Disk Transfers) noted as "available" or requiring future expansion.

XX-F7ED9-54
November 1982
27 pages
Quality

Original
1.7MB

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