This document is Volume I of the Digital Equipment Corporation (DEC) PDP-10 Maintenance Manual, specifically for the KA10 Central Processor. Published in 1968 (with a 1970 revision), it serves as a comprehensive guide for technical personnel on the operation, theory, and maintenance of the KA10 hardware.
The manual begins with general information about the PDP-10 as a general-purpose, 36-bit computer system, highlighting the KA10 as its primary control unit. It details system characteristics, memory capacity (up to 262,144 words), and available hardware options, including fast memory, memory protection/relocation, and extended instruction sets.
The system description delves into the arithmetic processor (its asynchronous nature, register types and sizes, and instruction capabilities), core memory organization (including bus structure, priority access, read/write/read-modify-write cycles, and parity), and the input/output (I/O) subsystem (I/O bus, control devices, data transfers, and priority interrupt system). It also covers programming aspects like user/executive modes, memory protection/relocation techniques, and the use of Unimplemented User Operations (UUOs). A detailed overview of the extensive instruction set is provided, classifying instructions into data transmission, arithmetic/logical, executive, push-down, and I/O operations, explaining their effective address calculations and execution.
Further sections focus on central processor organization, detailing the functions of the KA10's numerous registers (e.g., Arithmetic, Buffer, Multiplier Quotient, Program Counter, Instruction Register, Memory Address, Protection, Relocation, Priority Interrupt registers) and the adder. It outlines the fundamental Instruction, Address, Fetch, Execute, and Store cycles, and describes a wide array of specific instructions including fixed-point and floating-point arithmetic, block transfers, byte manipulation, and various jump and test operations.
Operating procedures guide users on the operator's console (switches, indicators), basic I/O devices (paper tape reader/punch, DECtape, and teleprinter), and hardware "Read In" functions.
The document culminates in troubleshooting and maintenance procedures, offering in-depth guidance on diagnosing and resolving hardware faults. This includes utilizing a suite of diagnostic and reliability test programs, understanding the margin check system for voltage control, and performing checks on system delays, indicators, and console switches. Appendices provide crucial reference material for flow diagram interpretations, instruction codes, instruction word formats, and device mnemonics.
The manual is intended for readers already familiar with the PDP-10 System Reference Manual, focusing on the intricate details of hardware implementation rather than fundamental data processing concepts.
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