DEC-10-HMAA D KA10 Maint Dec68

Order Number: XX-AB6B1-09

This document is Volume I of the "PDP-10 KA10 Central Processor Maintenance Manual" by Digital Equipment Corporation. It serves as a comprehensive guide to the operating instructions, principles of operation, and maintenance procedures for the KA10 Central Processor, a core component of the PDP-10 system.

The manual details the KA10's architecture, emphasizing its 36-bit word length, expandable core memory (up to 262,144 words), 16 accumulators, and its asynchronous operation. It provides in-depth descriptions of:

  • The Arithmetic Processor, including its various registers and adders.
  • The Memory System, covering its modules, bus, priority handling, various memory cycles (read, write, read-modify-write), parity, and multiplexor.
  • The Input/Output (I/O) System, explaining the I/O bus, different transfer types, the priority interrupt system, and hardware read-in.
  • Programming Concepts as implemented by hardware, such as time allotment, memory protection and relocation, I/O handling via Unimplemented User Operations (UUOs), and conditions storage.
  • The extensive KA10 Instruction Set, detailing both basic and additional/extended instructions, including Boolean, arithmetic, data transfer, jump, test, stack, block transfer, byte manipulation, and floating-point operations. It also outlines the five fundamental instruction execution cycles (Instruction, Address, Fetch, Execute, and Store).

Additionally, the document covers operating procedures for the operator's console (switches and indicators) and the margin check and maintenance panel, along with specific controls for basic I/O devices like the paper tape reader/punch and teleprinter.

For troubleshooting and maintenance, it offers guidance on using test equipment, processor diagnostic programs (for fault isolation and reliability), error recognition, and margin checking techniques. Appendices provide crucial reference materials like flow diagram interpretation, instruction codes, and instruction word formats. The manual assumes the reader's familiarity with the PDP-10 System Reference Manual, focusing on the hardware implementation of instructions. Volume II is noted to contain supplementary engineering and logic diagrams.

XX-AB6B1-09
December 1968
83 pages
Quality

Original
6.3MB

Site structure and layout ©2025 Majenko Technologies